V1.0.2

修改模拟IIC默认延时时间为20 添加需要特别注意P20_2是不能用于输出的，仅仅只有输入的功能注意事项将摄像头采集DMA改为link传输，可以大大降低DMA中断次数修改默认的软件IIC引脚定义将6050等需要用到软件IIC的模块，在初始化函数中默认调用模拟IIC初始化添加小钻风驱动程序
2026-06-04 03:32:56 +00:00 · 2020-04-15 20:07:26 +08:00
parent 2a5dfba027
commit deec768bb2
250 changed files with 8242 additions and 490 deletions
--- a/Seekfree_TC264_Opensource_Library/Libraries/doc/version.txt
+++ b/Seekfree_TC264_Opensource_Library/Libraries/doc/version.txt
@@ -1,9 +1,17 @@
 V1.0.0
-    <EFBFBD><EFBFBD>ʼ<EFBFBD>汾
+	<EFBFBD><EFBFBD>ʼ<EFBFBD>汾
 	
 	
 V1.0.1
 	<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ĳ<EFBFBD><C4B3>жϽ<D0B6><CFBD><EFBFBD><EFBFBD>޸ģ<DEB8><C4A3>жϱ<D0B6>־λΪ0<CEAA>Ųɼ<C5B2><C9BC><EFBFBD>һ<EFBFBD><D2BB>ͼ<EFBFBD>񣬱<EFBFBD><F1A3ACB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʳ<EFBFBD>ͻ
 	<09>޸<EFBFBD>SPI<50><49>ʼ<EFBFBD><CABC><EFBFBD>еĴ<D0B5><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˹̶<CBB9><CCB6><EFBFBD>SPI2<49><32><EFBFBD><EFBFBD>ַ
 	<09>޸<EFBFBD>STM<54><4D><EFBFBD>޷<EFBFBD>ʹ<EFBFBD><CAB9>STM1<4D><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
-	<09>޸<EFBFBD>gtm pwm<77><6D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>ձ<EFBFBD>ֻ<EFBFBD><D6BB>GTM_ATOM0_PWM_DUTY_MAX<41><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+	<09>޸<EFBFBD>gtm pwm<77><6D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ռ<EFBFBD>ձ<EFBFBD>ֻ<EFBFBD><D6BB>GTM_ATOM0_PWM_DUTY_MAX<41><58><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ч<EFBFBD><D0A7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+	
+V1.0.2
+	<09>޸<EFBFBD>ģ<EFBFBD><C4A3>IICĬ<43><C4AC><EFBFBD><EFBFBD>ʱʱ<CAB1><CAB1>Ϊ20 
+	<09><><EFBFBD><EFBFBD> <20><>Ҫ<EFBFBD>ر<EFBFBD>ע<EFBFBD><D7A2>P20_2<5F>ǲ<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD> ע<><D7A2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+	<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4>󽵵<EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
+	<09>޸<EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
+	<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
+	<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/common/common.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/common/common.c
@@ -22,7 +22,7 @@
 #include "SysSe/Bsp/Bsp.h"
 #include "common.h"

-uint8 camera_type;
+uint8 camera_type;	//<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD>ͺ<EFBFBD>  1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>   2<><32><EFBFBD><EFBFBD>ͫ<EFBFBD><CDAB><EFBFBD><EFBFBD>δ֧<CEB4>֣<EFBFBD>3<EFBFBD><33>С<EFBFBD><D0A1><EFBFBD><EFBFBD>



--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/common/common.h
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/common/common.h
@@ -111,7 +111,7 @@ typedef enum //ö
 #include <string.h>


-extern uint8 camera_type;
+extern uint8 camera_type;	//<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD>ͺ<EFBFBD>  1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>   2<><32><EFBFBD><EFBFBD>ͫ<EFBFBD><CDAB><EFBFBD><EFBFBD>δ֧<CEB4>֣<EFBFBD>3<EFBFBD><33>С<EFBFBD><D0A1><EFBFBD><EFBFBD>


 void get_clk(void);
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/headfile.h
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/headfile.h
@@ -62,6 +62,7 @@
 #include "SEEKFREE_L3G4200D.h"
 #include "SEEKFREE_WIRELESS.h"
 #include "SEEKFREE_IPS200_PARALLEL8.h"
+#include "SEEKFREE_7725.h"

 #endif

--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/zf_eru_dma.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/zf_eru_dma.c
@@ -21,9 +21,18 @@
 #include "IfxDma_Dma.h"
 #include "IfxScuEru.h"
 #include "isr_config.h"
+#include "zf_assert.h"
 #include "zf_eru_dma.h"


+typedef struct
+{
+    Ifx_DMA_CH IFX_ALIGN(256) linked_list[8];//DMA<4D><41><EFBFBD><EFBFBD>
+    IfxDma_Dma_Channel channel;              //DMAͨ<41><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+}DMA_LINK;
+
+
+DMA_LINK dma_link_list;

 //-------------------------------------------------------------------------------------------------------------------
 //  @brief      eru<72><75><EFBFBD><EFBFBD>dma<6D><61>ʼ<EFBFBD><CABC>
@@ -36,7 +45,7 @@
 //	@return		void
 //  Sample usage:
 //-------------------------------------------------------------------------------------------------------------------
-void eru_dma_init(IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, ERU_PIN_enum eru_pin, TRIGGER_enum trigger, uint16 dma_count)
+uint8 eru_dma_init(IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, ERU_PIN_enum eru_pin, TRIGGER_enum trigger, uint16 dma_count)
 {
 	IfxDma_Dma_Channel dmaChn;
 	//eru<72><75><EFBFBD><EFBFBD>DMAͨ<41><CDA8><EFBFBD><EFBFBD>   <20><>eru<72>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>eru<72><75><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
@@ -51,27 +60,85 @@ void eru_dma_init(IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destinatio
    IfxDma_Dma_ChannelConfig cfg;
    IfxDma_Dma_initChannelConfig(&cfg, &dma);

-    cfg.transferCount                   = dma_count;
+	uint8  list_num, i;
+	uint16 single_channel_dma_count;
+
+	ZF_ASSERT(!(dma_count%8));//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ8<CEAA>ı<EFBFBD><C4B1><EFBFBD>
+
+
+	list_num = 1;
+	single_channel_dma_count = dma_count / list_num;
+	if(16384 < single_channel_dma_count)
+	{
+		while(TRUE)
+		{
+			single_channel_dma_count = dma_count / list_num;
+			if((single_channel_dma_count <= 16384) && !(dma_count % list_num))
+			{
+				break;
+			}
+			list_num++;
+			if(list_num > 8) ZF_ASSERT(FALSE);
+		}
+	}
+
+
+	if(1 == list_num)
+	{
+		cfg.shadowControl 				= IfxDma_ChannelShadow_none;
+		cfg.operationMode       	    = IfxDma_ChannelOperationMode_single;
+		cfg.shadowAddress				= 0;
+	}
+	else
+	{
+		cfg.shadowControl 				= IfxDma_ChannelShadow_linkedList;
+		cfg.operationMode       		= IfxDma_ChannelOperationMode_continuous;
+		cfg.shadowAddress 				= IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[1]);
+	}
+
    cfg.requestMode                     = IfxDma_ChannelRequestMode_oneTransferPerRequest;
    cfg.moveSize                        = IfxDma_ChannelMoveSize_8bit;
+    cfg.busPriority 					= IfxDma_ChannelBusPriority_high;

-    cfg.busPriority = IfxDma_ChannelBusPriority_high;
-
-    cfg.sourceAddress      				= (unsigned)(source_addr);
+    cfg.sourceAddress      				= IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), source_addr);
    cfg.sourceAddressCircularRange      = IfxDma_ChannelIncrementCircular_none;
    cfg.sourceCircularBufferEnabled     = TRUE;

-    cfg.destinationAddress 				= IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr);
    cfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1;
-    cfg.operationMode       			= IfxDma_ChannelOperationMode_single;
-	cfg.channelId          				= (IfxDma_ChannelId)dma_ch;
-	cfg.hardwareRequestEnabled  		= TRUE;
-	cfg.channelInterruptEnabled       	= TRUE;

+	cfg.channelId          				= (IfxDma_ChannelId)dma_ch;
+	cfg.hardwareRequestEnabled  		= FALSE;
+	cfg.channelInterruptEnabled       	= TRUE;
 	cfg.channelInterruptPriority      	= ERU_DMA_INT_PRIO;
 	cfg.channelInterruptTypeOfService 	= (IfxSrc_Tos)ERU_DMA_INT_SERVICE;

+
+
+	cfg.destinationAddress 				= IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr);
+
+	cfg.transferCount                   = single_channel_dma_count;
+
 	IfxDma_Dma_initChannel(&dmaChn, &cfg);
+
+	if(1 < list_num)
+	{
+		i = 0;
+		while(i < list_num)
+		{
+			cfg.destinationAddress 		= IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr + single_channel_dma_count * i);
+			if(i == (list_num - 1))	cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[0]);
+			else					cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[i+1]);
+			cfg.transferCount           = single_channel_dma_count;
+
+			IfxDma_Dma_initLinkedListEntry((void *)&dma_link_list.linked_list[i], &cfg);
+			i++;
+		}
+	}
+
+
+	IfxDma_Dma_getSrcPointer(&dma_link_list.channel)->B.CLRR = 1;
+
+	return list_num;
 }


--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/zf_eru_dma.h
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/zf_eru_dma.h
@@ -29,9 +29,9 @@
 #define CLEAR_DMA_FLAG(dma_ch)	IfxDma_clearChannelInterrupt(&MODULE_DMA, dma_ch);


-#define DMA_SET_DESTINATION(dma_ch, destination_addr)	IfxDma_setChannelDestinationAddress(&MODULE_DMA, dma_ch, (void *)destination_addr)
+#define DMA_SET_DESTINATION(dma_ch, destination_addr)	IfxDma_setChannelDestinationAddress(&MODULE_DMA, dma_ch, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr))

-void eru_dma_init(IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, ERU_PIN_enum eru_pin, TRIGGER_enum trigger, uint16 dma_count);
+uint8 eru_dma_init(IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, ERU_PIN_enum eru_pin, TRIGGER_enum trigger, uint16 dma_count);
 void dma_stop(IfxDma_ChannelId dma_ch);
 void dma_start(IfxDma_ChannelId dma_ch);

--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/zf_gpio.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/zf_gpio.c
@@ -60,6 +60,7 @@ Ifx_P* get_port(PIN_enum pin)
 //  @param      pinmode     <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD>zf_gpio.h<>ļ<EFBFBD><C4BC><EFBFBD>GPIOMODE_enumö<6D><C3B6>ֵȷ<D6B5><C8B7><EFBFBD><EFBFBD>
 //  @return     void
 //  Sample usage:           gpio_init(P00_0, GPO, 1, PUSHPULL);//P00_0<5F><30>ʼ<EFBFBD><CABC>ΪGPIO<49><4F><EFBFBD>ܡ<EFBFBD><DCA1><EFBFBD><EFBFBD><EFBFBD>ģʽ<C4A3><CABD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD>ƽ<EFBFBD><C6BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+//  @note					<09><>Ҫ<EFBFBD>ر<EFBFBD>ע<EFBFBD><D7A2>P20_2<5F>ǲ<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
 //-------------------------------------------------------------------------------------------------------------------
 void gpio_init(PIN_enum pin, GPIODIR_enum dir, uint8 dat, GPIOMODE_enum pinmode)
 {
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/zf_gpio.h
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_libraries/zf_gpio.h
@@ -38,6 +38,15 @@ typedef enum    // ö

 #define GET_PORT_IN_ADDR(pin)	(uint8 *)(&IfxPort_getAddress((IfxPort_Index)(pin/32))->IN + pin%32/8)

+
+
+//<2F><>Ҫ<EFBFBD>ر<EFBFBD>ע<EFBFBD><D7A2>P20_2<5F>ǲ<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
+//<2F><>Ҫ<EFBFBD>ر<EFBFBD>ע<EFBFBD><D7A2>P20_2<5F>ǲ<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
+//<2F><>Ҫ<EFBFBD>ر<EFBFBD>ע<EFBFBD><D7A2>P20_2<5F>ǲ<EFBFBD><C7B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
+
+
+
+
 //------------------------------------------------------
 //ͨ<><CDA8>GPIO<49><4F><EFBFBD><EFBFBD>
 void gpio_init(PIN_enum pin, GPIODIR_enum dir, uint8 dat, GPIOMODE_enum pinconf);
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_7725.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_7725.c
@@ -0,0 +1,262 @@
+/*********************************************************************************************************************
+ * COPYRIGHT NOTICE
+ * Copyright (c) 2020,<2C><><EFBFBD>ɿƼ<C9BF>
+ * All rights reserved.
+ * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>QQȺ<51><C8BA><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>824575535
+ *
+ * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD>У<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҵ<EFBFBD><D2B5>;<EFBFBD><CDBE>
+ * <20><>ӭ<EFBFBD><D3AD>λʹ<CEBB>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>޸<EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>뱣<EFBFBD><EBB1A3><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC>İ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+ *
+ * @file       		main
+ * @company	   		<09>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾
+ * @author     		<09><><EFBFBD>ɿƼ<C9BF>(QQ3184284598)
+ * @version    		<09>鿴doc<6F><63>version<6F>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
+ * @Software 		tasking v6.3r1
+ * @Target core		TC264D
+ * @Taobao   		https://seekfree.taobao.com/
+ * @date       		2020-3-23
+ * @note		
+					<09><><EFBFBD>߶<EFBFBD><DFB6>壺
+					------------------------------------ 
+					ģ<><C4A3><EFBFBD>ܽ<EFBFBD>           			<09><>Ƭ<EFBFBD><C6AC><EFBFBD>ܽ<EFBFBD>
+					SDA   				<09>鿴SEEKFREE_IIC<49>ļ<EFBFBD><C4BC>ڵ<EFBFBD>SEEKFREE_SDA<44>궨<EFBFBD><EAB6A8>
+					SCL         	           <20>鿴SEEKFREE_IIC<49>ļ<EFBFBD><C4BC>ڵ<EFBFBD>SEEKFREE_SCL<43>궨<EFBFBD><EAB6A8>
+					<09><><EFBFBD>ж<EFBFBD>(VSY)         	<09>鿴SEEKFREE_OV7725.h<>ļ<EFBFBD><C4BC>е<EFBFBD>OV7725_VSYNC_PIN<49>궨<EFBFBD><EAB6A8>
+					<09><><EFBFBD>ж<EFBFBD>(HREF)			δʹ<CEB4>ã<EFBFBD><C3A3><EFBFBD><EFBFBD>˲<EFBFBD><CBB2><EFBFBD>
+					<09><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>(PCLK)      	<09>鿴SEEKFREE_OV7725.h<>ļ<EFBFBD><C4BC>е<EFBFBD>OV7725_PCLK_PIN<49>궨<EFBFBD><EAB6A8>
+					<09><><EFBFBD>ݿ<EFBFBD>(D0-D7)		<09>鿴SEEKFREE_OV7725.h<>ļ<EFBFBD><C4BC>е<EFBFBD>OV7725_DATA_PIN<49>궨<EFBFBD><EAB6A8>
+					------------------------------------ 
+	
+					Ĭ<>Ϸֱ<CFB7><D6B1><EFBFBD><EFBFBD><EFBFBD>            		160*120
+					Ĭ<><C4AC>FPS            	50֡
+ ********************************************************************************************************************/
+
+
+#include "IfxDma.h"
+#include "IfxScuEru.h"
+#include "zf_stm_systick.h"
+#include "zf_gpio.h"
+#include "zf_eru.h"
+#include "zf_eru_dma.h"
+#include "SEEKFREE_IIC.h"
+#include "SEEKFREE_7725.h"
+
+
+
+IFX_ALIGN(4) uint8 image_bin[OV7725_H][OV7725_W/8];                      //<2F><><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+uint8 image_dec[OV7725_H][OV7725_W];
+
+uint8 ov7725_idcode = 0;
+
+//-------------------------------------------------------------------------------------------------------------------
+//  @brief      С<><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ڲ<EFBFBD><DAB2>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>(<28>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
+//  @param      NULL
+//  @return     uint8			<09><><EFBFBD><EFBFBD>0<EFBFBD><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD>ɹ<EFBFBD>
+//  @since      v1.0
+//  Sample usage:
+//-------------------------------------------------------------------------------------------------------------------
+uint8 ov7725_reg_init(void)
+{
+    simiic_delay_set(500);
+    simiic_write_reg ( OV7725_DEV_ADD, OV7725_COM7, 0x80 );	//<2F><>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>ͷ
+    systick_delay_ms(STM0, 50);
+	ov7725_idcode = simiic_read_reg( OV7725_DEV_ADD, OV7725_VER ,SCCB);
+    if( ov7725_idcode != OV7725_ID )    return 0;			//У<><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷID<49><44>
+
+    //ID<49><44>ȷ<EFBFBD><C8B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>   Ȼ<><C8BB><EFBFBD><EFBFBD><EFBFBD>üĴ<C3BC><C4B4><EFBFBD>
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_COM4         , 0xC1);  
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_CLKRC        , 0x01);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_COM2         , 0x03);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_COM3         , 0xD0);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_COM7         , 0x40);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_COM8         , 0xCE);   //0xCE:<3A>ر<EFBFBD><D8B1>Զ<EFBFBD><D4B6>ع<EFBFBD>  0xCF<43><46><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ع<EFBFBD>
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_HSTART       , 0x3F);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_HSIZE        , 0x50);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_VSTRT        , 0x03);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_VSIZE        , 0x78);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_HREF         , 0x00);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_SCAL0        , 0x0A);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_AWB_Ctrl0    , 0xE0);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_DSPAuto      , 0xff);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_DSP_Ctrl2    , 0x0C);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_DSP_Ctrl3    , 0x00);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_DSP_Ctrl4    , 0x00);
+    
+    if(OV7725_W == 80)              simiic_write_reg(OV7725_DEV_ADD, OV7725_HOutSize    , 0x14);
+    else if(OV7725_W == 160)        simiic_write_reg(OV7725_DEV_ADD, OV7725_HOutSize    , 0x28);
+    else if(OV7725_W == 240)        simiic_write_reg(OV7725_DEV_ADD, OV7725_HOutSize    , 0x3c);
+    else if(OV7725_W == 320)        simiic_write_reg(OV7725_DEV_ADD, OV7725_HOutSize    , 0x50);
+    
+    if(OV7725_H == 60)              simiic_write_reg(OV7725_DEV_ADD, OV7725_VOutSize    , 0x1E);
+    else if(OV7725_H == 120)        simiic_write_reg(OV7725_DEV_ADD, OV7725_VOutSize    , 0x3c);
+    else if(OV7725_H == 180)        simiic_write_reg(OV7725_DEV_ADD, OV7725_VOutSize    , 0x5a);
+    else if(OV7725_H == 240)        simiic_write_reg(OV7725_DEV_ADD, OV7725_VOutSize    , 0x78);
+    
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_REG28        , 0x01);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_EXHCH        , 0x10);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_EXHCL        , 0x1F);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM1         , 0x0c);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM2         , 0x16);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM3         , 0x2a);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM4         , 0x4e);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM5         , 0x61);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM6         , 0x6f);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM7         , 0x7b);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM8         , 0x86);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM9         , 0x8e);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM10        , 0x97);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM11        , 0xa4);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM12        , 0xaf);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM13        , 0xc5);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM14        , 0xd7);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_GAM15        , 0xe8);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_SLOP         , 0x20);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_LC_RADI      , 0x00);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_LC_COEF      , 0x13);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_LC_XC        , 0x08);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_LC_COEFB     , 0x14);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_LC_COEFR     , 0x17);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_LC_CTR       , 0x05);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_BDBase       , 0x99);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_BDMStep      , 0x03);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_SDE          , 0x04);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_BRIGHT       , 0x00);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_CNST         , 0x40);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_SIGN         , 0x06);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_UVADJ0       , 0x11);
+    simiic_write_reg(OV7725_DEV_ADD, OV7725_UVADJ1       , 0x02);
+
+
+    simiic_delay_set(SIMIIC_DELAY_TIME);//<2F>޸<EFBFBD>ΪĬ<CEAA>ϵ<EFBFBD>20
+    return 1;
+
+
+}
+
+
+
+
+
+//-------------------------------------------------------------------------------------------------------------------
+//  @brief      С<><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>(<28>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>)
+//  @param      NULL
+//  @return     void
+//  @since      v1.0
+//  Sample usage:
+//-------------------------------------------------------------------------------------------------------------------
+void ov7725_port_init(void)
+{
+	uint8 i;
+    camera_type = 3;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD>
+    
+	//<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD>ʼ<EFBFBD><CABC>
+	//<2F><>ʼ<EFBFBD><CABC> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+	for(i=0; i<8; i++)
+	{
+		gpio_init((PIN_enum)(OV7725_DATA_PIN+i), GPI, 0, PULLUP);
+	}
+	eru_dma_init(OV7725_DMA_CH, GET_PORT_IN_ADDR(OV7725_DATA_PIN), image_bin[0], OV7725_PCLK_PIN, FALLING, OV7725_DMA_NUM);
+    eru_init(OV7725_VSYNC_PIN, FALLING);	//<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD>½<EFBFBD><C2BD>ش<EFBFBD><D8B4><EFBFBD><EFBFBD>ж<EFBFBD>
+    
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+//  @brief      С<><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7>ʼ<EFBFBD><CABC>(<28><><EFBFBD><EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD>ú<EFBFBD><C3BA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɲɼ<C9B2>ͼ<EFBFBD><CDBC>)
+//  @param      NULL
+//  @return     0
+//  @since      v1.0
+//  Sample usage:
+//-------------------------------------------------------------------------------------------------------------------
+uint8 ov7725_init(void)
+{
+	simiic_init();
+	ov7725_reg_init();                                          //<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+    ov7725_port_init();                                         //<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ż<EFBFBD>DMA<4D><41><EFBFBD><EFBFBD>
+    return 0;
+}
+
+
+
+
+uint8   ov7725_finish_flag = 0;
+//-------------------------------------------------------------------------------------------------------------------
+//  @brief      С<><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ж<EFBFBD>
+//  @param      NULL
+//  @return     void
+//  @since      v1.0
+//  Sample usage:					<09>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD>isr.c<>б<EFBFBD>eru<72><75>GPIO<49>жϣ<D0B6><CFA3>жϵ<D0B6><CFB5><EFBFBD>
+//-------------------------------------------------------------------------------------------------------------------
+void ov7725_vsync(void)
+{
+	CLEAR_GPIO_FLAG(OV7725_VSYNC_PIN);
+
+	if(!ov7725_finish_flag)//<2F>鿴ͼ<E9BFB4><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD>δʹ<CEB4><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򲻿<EFBFBD>ʼ<EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʳ<EFBFBD>ͻ
+	{
+		DMA_SET_DESTINATION(OV7725_DMA_CH, image_bin[0]);
+		dma_start(OV7725_DMA_CH);
+	}
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+//  @brief      С<><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷDMA<4D><41><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
+//  @param      NULL
+//  @return     void
+//  @since      v1.0
+//  Sample usage:					<09>˺<EFBFBD><CBBA><EFBFBD><EFBFBD><EFBFBD>isr.c<>б<EFBFBD>dma<6D>жϵ<D0B6><CFB5><EFBFBD>
+//-------------------------------------------------------------------------------------------------------------------
+void ov7725_dma(void)
+{
+    CLEAR_DMA_FLAG(OV7725_DMA_CH);
+	ov7725_finish_flag = 1;
+	dma_stop(OV7725_DMA_CH);
+}
+
+
+
+
+//-------------------------------------------------------------------------------------------------------------------
+//  @brief      С<><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ݽ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>
+//  @param      *data1				Դ<><D4B4>ַ
+//  @param      *data2				Ŀ<>ĵ<EFBFBD>ַ
+//  @return     void
+//  @since      v1.0
+//  Sample usage:					Image_Decompression(da1,dat2[0]);//<2F><>һά<D2BB><CEAC><EFBFBD><EFBFBD>dat1<74><31><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD>ά<EFBFBD><CEAC><EFBFBD><EFBFBD>dat2<74><32>.
+//-------------------------------------------------------------------------------------------------------------------
+void image_decompression(uint8 *data1,uint8 *data2)
+{
+    uint8  temp[2] = {0,255};
+    uint16 lenth = OV7725_SIZE;
+    uint8  i = 8;
+
+        
+    while(lenth--)
+    {
+        i = 8;
+        while(i--)
+        {
+            *data2++ = temp[(*data1 >> i) & 0x01];
+        }
+        data1++;
+    }
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+//  @brief      С<><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷδ<CDB7><CEB4>ѹͼ<D1B9><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD>鿴ͼ<E9BFB4><CDBC>
+//  @param      *imgaddr			ѹ<><D1B9>ͼ<EFBFBD><CDBC><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>ַ
+//  @param      *imgsize			ͼ<><CDBC><EFBFBD><EFBFBD>С(ֱ<><D6B1><EFBFBD><EFBFBD>дOV7725_SIZE)
+//  @return     void
+//  @since      v1.0
+//  Sample usage:					<09><><EFBFBD>øú<C3B8><C3BA><EFBFBD>ǰ<EFBFBD><C7B0><EFBFBD>ȳ<EFBFBD>ʼ<EFBFBD><CABC>uart2
+//-------------------------------------------------------------------------------------------------------------------
+void seekfree_sendimg_7725(UARTN_enum uartn)
+{
+    uart_putchar(uartn, 0x00);uart_putchar(uartn, 0xff);uart_putchar(uartn, 0x01);uart_putchar(uartn, 0x01);//<2F><><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD><C4B8>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
+    uart_putbuff(uartn, image_bin[0], OV7725_SIZE);   //<2F>ٷ<EFBFBD><D9B7><EFBFBD>ͼ<EFBFBD><CDBC>
+}
+
+
+
+
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_7725.h
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_7725.h
@@ -0,0 +1,243 @@
+/*********************************************************************************************************************
+ * COPYRIGHT NOTICE
+ * Copyright (c) 2020,<2C><><EFBFBD>ɿƼ<C9BF>
+ * All rights reserved.
+ * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>QQȺ<51><C8BA><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>824575535
+ *
+ * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD>У<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҵ<EFBFBD><D2B5>;<EFBFBD><CDBE>
+ * <20><>ӭ<EFBFBD><D3AD>λʹ<CEBB>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>޸<EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>뱣<EFBFBD><EBB1A3><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC>İ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+ *
+ * @file       		main
+ * @company	   		<09>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾
+ * @author     		<09><><EFBFBD>ɿƼ<C9BF>(QQ3184284598)
+ * @version    		<09>鿴doc<6F><63>version<6F>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
+ * @Software 		tasking v6.3r1
+ * @Target core		TC264D
+ * @Taobao   		https://seekfree.taobao.com/
+ * @date       		2020-3-23
+ * @note		
+					<09><><EFBFBD>߶<EFBFBD><DFB6>壺
+					------------------------------------ 
+					ģ<><C4A3><EFBFBD>ܽ<EFBFBD>           			<09><>Ƭ<EFBFBD><C6AC><EFBFBD>ܽ<EFBFBD>
+					SDA   				<09>鿴SEEKFREE_IIC<49>ļ<EFBFBD><C4BC>ڵ<EFBFBD>SEEKFREE_SDA<44>궨<EFBFBD><EAB6A8>
+					SCL         	           <20>鿴SEEKFREE_IIC<49>ļ<EFBFBD><C4BC>ڵ<EFBFBD>SEEKFREE_SCL<43>궨<EFBFBD><EAB6A8>
+					<09><><EFBFBD>ж<EFBFBD>(VSY)         	<09>鿴SEEKFREE_OV7725.h<>ļ<EFBFBD><C4BC>е<EFBFBD>OV7725_VSYNC_PIN<49>궨<EFBFBD><EAB6A8>
+					<09><><EFBFBD>ж<EFBFBD>(HREF)			δʹ<CEB4>ã<EFBFBD><C3A3><EFBFBD><EFBFBD>˲<EFBFBD><CBB2><EFBFBD>
+					<09><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>(PCLK)      	<09>鿴SEEKFREE_OV7725.h<>ļ<EFBFBD><C4BC>е<EFBFBD>OV7725_PCLK_PIN<49>궨<EFBFBD><EAB6A8>
+					<09><><EFBFBD>ݿ<EFBFBD>(D0-D7)		<09>鿴SEEKFREE_OV7725.h<>ļ<EFBFBD><C4BC>е<EFBFBD>OV7725_DATA_PIN<49>궨<EFBFBD><EAB6A8>
+					------------------------------------ 
+	
+					Ĭ<>Ϸֱ<CFB7><D6B1><EFBFBD><EFBFBD><EFBFBD>            		160*120
+					Ĭ<><C4AC>FPS            	50֡
+ ********************************************************************************************************************/
+
+
+
+#ifndef _SEEKFREE_7725_h
+#define _SEEKFREE_7725_h
+
+#include "common.h"
+#include "IfxDma_cfg.h"
+#include "zf_uart.h"
+
+
+//<2F><><EFBFBD><EFBFBD>ͷID<49><44>
+#define OV7725_ID               0x21
+    
+//<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD>        
+#define OV7725_GAIN             0x00
+#define OV7725_BLUE             0x01
+#define OV7725_RED              0x02
+#define OV7725_GREEN            0x03
+#define OV7725_BAVG             0x05
+#define OV7725_GAVG             0x06
+#define OV7725_RAVG             0x07
+#define OV7725_AECH             0x08
+#define OV7725_COM2             0x09
+#define OV7725_PID              0x0A
+#define OV7725_VER              0x0B
+#define OV7725_COM3             0x0C
+#define OV7725_COM4             0x0D
+#define OV7725_COM5             0x0E
+#define OV7725_COM6             0x0F
+#define OV7725_AEC              0x10
+#define OV7725_CLKRC            0x11
+#define OV7725_COM7             0x12
+#define OV7725_COM8             0x13
+#define OV7725_COM9             0x14
+#define OV7725_COM10            0x15
+#define OV7725_REG16            0x16
+#define OV7725_HSTART           0x17
+#define OV7725_HSIZE            0x18
+#define OV7725_VSTRT            0x19
+#define OV7725_VSIZE            0x1A
+#define OV7725_PSHFT            0x1B
+#define OV7725_MIDH             0x1C
+#define OV7725_MIDL             0x1D
+#define OV7725_LAEC             0x1F
+#define OV7725_COM11            0x20
+#define OV7725_BDBase           0x22
+#define OV7725_BDMStep          0x23
+#define OV7725_AEW              0x24
+#define OV7725_AEB              0x25
+#define OV7725_VPT              0x26
+#define OV7725_REG28            0x28
+#define OV7725_HOutSize         0x29
+#define OV7725_EXHCH            0x2A
+#define OV7725_EXHCL            0x2B
+#define OV7725_VOutSize         0x2C
+#define OV7725_ADVFL            0x2D
+#define OV7725_ADVFH            0x2E
+#define OV7725_YAVE             0x2F
+#define OV7725_LumHTh           0x30
+#define OV7725_LumLTh           0x31
+#define OV7725_HREF             0x32
+#define OV7725_DM_LNL           0x33
+#define OV7725_DM_LNH           0x34
+#define OV7725_ADoff_B          0x35
+#define OV7725_ADoff_R          0x36
+#define OV7725_ADoff_Gb         0x37
+#define OV7725_ADoff_Gr         0x38
+#define OV7725_Off_B            0x39
+#define OV7725_Off_R            0x3A
+#define OV7725_Off_Gb           0x3B
+#define OV7725_Off_Gr           0x3C
+#define OV7725_COM12            0x3D
+#define OV7725_COM13            0x3E
+#define OV7725_COM14            0x3F
+#define OV7725_COM16            0x41
+#define OV7725_TGT_B            0x42
+#define OV7725_TGT_R            0x43
+#define OV7725_TGT_Gb           0x44
+#define OV7725_TGT_Gr           0x45
+#define OV7725_LC_CTR           0x46
+#define OV7725_LC_XC            0x47
+#define OV7725_LC_YC            0x48
+#define OV7725_LC_COEF          0x49
+#define OV7725_LC_RADI          0x4A
+#define OV7725_LC_COEFB         0x4B
+#define OV7725_LC_COEFR         0x4C
+#define OV7725_FixGain          0x4D
+#define OV7725_AREF1            0x4F
+#define OV7725_AREF6            0x54
+#define OV7725_UFix             0x60
+#define OV7725_VFix             0x61
+#define OV7725_AWBb_blk         0x62
+#define OV7725_AWB_Ctrl0        0x63
+#define OV7725_DSP_Ctrl1        0x64
+#define OV7725_DSP_Ctrl2        0x65
+#define OV7725_DSP_Ctrl3        0x66
+#define OV7725_DSP_Ctrl4        0x67
+#define OV7725_AWB_bias         0x68
+#define OV7725_AWBCtrl1         0x69
+#define OV7725_AWBCtrl2         0x6A
+#define OV7725_AWBCtrl3         0x6B
+#define OV7725_AWBCtrl4         0x6C
+#define OV7725_AWBCtrl5         0x6D
+#define OV7725_AWBCtrl6         0x6E
+#define OV7725_AWBCtrl7         0x6F
+#define OV7725_AWBCtrl8         0x70
+#define OV7725_AWBCtrl9         0x71
+#define OV7725_AWBCtrl10        0x72
+#define OV7725_AWBCtrl11        0x73
+#define OV7725_AWBCtrl12        0x74
+#define OV7725_AWBCtrl13        0x75
+#define OV7725_AWBCtrl14        0x76
+#define OV7725_AWBCtrl15        0x77
+#define OV7725_AWBCtrl16        0x78
+#define OV7725_AWBCtrl17        0x79
+#define OV7725_AWBCtrl18        0x7A
+#define OV7725_AWBCtrl19        0x7B
+#define OV7725_AWBCtrl20        0x7C
+#define OV7725_AWBCtrl21        0x7D
+#define OV7725_GAM1             0x7E
+#define OV7725_GAM2             0x7F
+#define OV7725_GAM3             0x80
+#define OV7725_GAM4             0x81
+#define OV7725_GAM5             0x82
+#define OV7725_GAM6             0x83
+#define OV7725_GAM7             0x84
+#define OV7725_GAM8             0x85
+#define OV7725_GAM9             0x86
+#define OV7725_GAM10            0x87
+#define OV7725_GAM11            0x88
+#define OV7725_GAM12            0x89
+#define OV7725_GAM13            0x8A
+#define OV7725_GAM14            0x8B
+#define OV7725_GAM15            0x8C
+#define OV7725_SLOP             0x8D
+#define OV7725_DNSTh            0x8E
+#define OV7725_EDGE0            0x8F
+#define OV7725_EDGE1            0x90
+#define OV7725_DNSOff           0x91
+#define OV7725_EDGE2            0x92
+#define OV7725_EDGE3            0x93
+#define OV7725_MTX1             0x94
+#define OV7725_MTX2             0x95
+#define OV7725_MTX3             0x96
+#define OV7725_MTX4             0x97
+#define OV7725_MTX5             0x98
+#define OV7725_MTX6             0x99
+#define OV7725_MTX_Ctrl         0x9A
+#define OV7725_BRIGHT           0x9B
+#define OV7725_CNST             0x9C
+#define OV7725_UVADJ0           0x9E
+#define OV7725_UVADJ1           0x9F
+#define OV7725_SCAL0            0xA0
+#define OV7725_SCAL1            0xA1
+#define OV7725_SCAL2            0xA2
+#define OV7725_SDE              0xA6
+#define OV7725_USAT             0xA7
+#define OV7725_VSAT             0xA8
+#define OV7725_HUECOS           0xA9
+#define OV7725_HUESIN           0xAA
+#define OV7725_SIGN             0xAB
+#define OV7725_DSPAuto          0xAC
+
+
+#define OV7725_DEV_ADD			0x42>>1
+
+
+//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD>
+#define OV7725_W                160                             //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷͼ<CDB7><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>	<09><><EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><C3B2><EFBFBD> 80 160 240 320
+#define OV7725_H                120                             //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷͼ<CDB7><CDBC><EFBFBD>߶<EFBFBD>	<09><><EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><C3B2><EFBFBD> 60 120 180 240
+#define OV7725_SIZE             (OV7725_W * OV7725_H/8 )        //ͼ<><CDBC>ռ<EFBFBD>ÿռ<C3BF><D5BC><EFBFBD>С
+#define OV7725_DMA_NUM          (OV7725_SIZE)                   //һ<><D2BB>ͼ<EFBFBD><CDBC>DMA<4D>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD>
+
+
+//--------------------------------------------------------------------------------------------------
+//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+//--------------------------------------------------------------------------------------------------
+#define OV7725_VSYNC_PIN       	ERU_CH3_REQ6_P02_0  //<2F><><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>	<09><>ѡ<EFBFBD><D1A1>Χ<EFBFBD>ο<EFBFBD>ERU_PIN_enumö<6D><C3B6> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>Ϊͬһ<CDAC><D2BB>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǹ<EFBFBD><C7B9><EFBFBD><EFBFBD>жϵ<D0B6>ͨ<EFBFBD><CDA8>
+													//<2F><><EFBFBD>糡<EFBFBD>ж<EFBFBD>ѡ<EFBFBD><D1A1>ERU_CH3 <20><>ô<EFBFBD><C3B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>žͲ<C5BE><CDB2><EFBFBD>ѡ<EFBFBD><D1A1>ERU_CH7<48><37><EFBFBD><EFBFBD>Ϊ3<CEAA><33>7<EFBFBD><37><EFBFBD>ж<EFBFBD><D0B6>ǹ<EFBFBD><C7B9>õġ<C3B5>
+
+#define OV7725_DATA_PIN        	P00_0  				//<2F><><EFBFBD><EFBFBD>D0<44><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>  <20><><EFBFBD><EFBFBD>D0<44><30><EFBFBD><EFBFBD>ΪP00_0 <20><>ôD1<44><31>ʹ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪP00_1<5F><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+													//<2F><><EFBFBD><EFBFBD><EFBFBD>ò<EFBFBD><C3B2><EFBFBD>P00_0<5F><30>P02_0<5F><30>P15_0<5F><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+
+#define OV7725_PCLK_PIN        	ERU_CH2_REQ14_P02_1 //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ѡ<EFBFBD><D1A1>Χ<EFBFBD>ο<EFBFBD>ERU_PIN_enumö<6D><C3B6> <20><><EFBFBD><EFBFBD><EFBFBD>볡<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><D1A1>Ϊͬһ<CDAC><D2BB>ͨ<EFBFBD><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ǹ<EFBFBD><C7B9><EFBFBD><EFBFBD>жϵ<D0B6>ͨ<EFBFBD><CDA8>
+													//<2F><><EFBFBD>糡<EFBFBD>ж<EFBFBD>ѡ<EFBFBD><D1A1>ERU_CH3 <20><>ô<EFBFBD><C3B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>žͲ<C5BE><CDB2><EFBFBD>ѡ<EFBFBD><D1A1>ERU_CH7<48><37><EFBFBD><EFBFBD>Ϊ3<CEAA><33>7<EFBFBD><37><EFBFBD>ж<EFBFBD><D0B6>ǹ<EFBFBD><C7B9>õġ<C3B5>
+
+#define OV7725_DMA_CH			IfxDma_ChannelId_5	//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD>DMAͨ<41><CDA8> 0-47<34><37>ѡ  ͨ<><CDA8><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD>Խ<EFBFBD><D4BD>
+													//<2F>޸Ĵ˴<C4B4>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>޸Ķ<DEB8>Ӧ<EFBFBD><D3A6>ERU<52>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD>ΪIfxDma_ChannelId_5<5F><35><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6>ERU<52>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ5
+
+
+
+extern uint8 image_bin[OV7725_H][OV7725_W/8];                   //<2F><><EFBFBD><EFBFBD><EFBFBD>洢<EFBFBD><E6B4A2><EFBFBD><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+extern uint8 image_dec[OV7725_H][OV7725_W];                     //ͼ<><CDBC><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+
+extern uint8 ov7725_finish_flag;								//ͼ<><CDBC><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD>ɱ<EFBFBD>־λ
+
+
+//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
+uint8   ov7725_init(void);
+void    ov7725_vsync(void);
+void    ov7725_dma(void);
+void    image_decompression(uint8 *data1,uint8 *data2);
+void    seekfree_sendimg_7725(UARTN_enum uartn);
+
+
+
+#endif
+
+
+
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_ICM20602.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_ICM20602.c
@@ -68,6 +68,7 @@ void icm20602_self1_check(void)
 //-------------------------------------------------------------------------------------------------------------------
 void icm20602_init(void)
 {
+	simiic_init();
    systick_delay_ms(STM0, 10);  //<2F>ϵ<EFBFBD><CFB5><EFBFBD>ʱ
    
    //<2F><><EFBFBD><EFBFBD>
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_IIC.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_IIC.c
@@ -50,7 +50,7 @@ uint8 IIC_num;     //



-static uint16 simiic_delay_time=100;   //ICM<43>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>Ϊ100
+static uint16 simiic_delay_time = SIMIIC_DELAY_TIME;   //ICM<43>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>Ϊ20


 //-------------------------------------------------------------------------------------------------------------------
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_IIC.h
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_IIC.h
@@ -34,8 +34,12 @@



-#define SEEKFREE_SCL    P13_0                           //<2F><><EFBFBD><EFBFBD>SCL<43><4C><EFBFBD><EFBFBD>  <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>IO
-#define SEEKFREE_SDA    P13_1                           //<2F><><EFBFBD><EFBFBD>SDA<44><41><EFBFBD><EFBFBD>  <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>IO
+#define SEEKFREE_SCL    P02_3                           //<2F><><EFBFBD><EFBFBD>SCL<43><4C><EFBFBD><EFBFBD>  <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>IO
+#define SEEKFREE_SDA    P02_2                           //<2F><><EFBFBD><EFBFBD>SDA<44><41><EFBFBD><EFBFBD>  <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>IO
+
+
+#define SIMIIC_DELAY_TIME	20
+

 typedef enum IIC       //DACģ<43><C4A3>
 {
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_L3G4200D.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_L3G4200D.c
@@ -65,6 +65,7 @@ void l3g4200d_self_check(void)
 //-------------------------------------------------------------------------------------------------------------------
 void l3g4200d_init(void)
 {
+	simiic_init();
    systick_delay_ms(STM0, 50);
    
    l3g4200d_self_check();
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_MMA8451.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_MMA8451.c
@@ -68,6 +68,7 @@ void mma8451_self_check(void)
 //-------------------------------------------------------------------------------------------------------------------
 uint8 mma845x_init(void)
 {       
+	simiic_init();
    systick_delay_ms(STM0, 50);
    
    mma8451_self_check();
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_MPU6050.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_MPU6050.c
@@ -71,6 +71,7 @@ void mpu6050_self1_check(void)
 //-------------------------------------------------------------------------------------------------------------------
 void mpu6050_init(void)
 {
+	simiic_init();
    systick_delay_ms(STM0, 100);                                   //<2F>ϵ<EFBFBD><CFB5><EFBFBD>ʱ

    mpu6050_self1_check();
--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_MT9V03X.c
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_MT9V03X.c
@@ -38,7 +38,6 @@
 #include "zf_gpio.h"
 #include "zf_eru.h"
 #include "zf_eru_dma.h"
-#include "stdio.h"
 #include "SEEKFREE_MT9V03X.h"


@@ -49,6 +48,8 @@ uint8   receive[3];
 uint8   receive_num = 0;
 vuint8  uart_receive_flag;

+uint8   link_list_num;
+
 //<2F><>Ҫ<EFBFBD><D2AA><EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
 int16 MT9V03X_CFG[CONFIG_FINISH][2]=
 {
@@ -305,7 +306,7 @@ void mt9v03x_init(void)
 		gpio_init((PIN_enum)(MT9V03X_DATA_PIN+i), GPI, 0, PULLUP);
 	}

-    eru_dma_init(MT9V03X_DMA_CH, GET_PORT_IN_ADDR(MT9V03X_DATA_PIN), mt9v03x_image[0], MT9V03X_PCLK_PIN, RISING, MT9V03X_W);
+    link_list_num = eru_dma_init(MT9V03X_DMA_CH, GET_PORT_IN_ADDR(MT9V03X_DATA_PIN), mt9v03x_image[0], MT9V03X_PCLK_PIN, RISING, MT9V03X_W*MT9V03X_H);

    eru_init(MT9V03X_VSYNC_PIN, FALLING);	//<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD>½<EFBFBD><C2BD>ش<EFBFBD><D8B4><EFBFBD><EFBFBD>ж<EFBFBD>
    restoreInterrupts(interrupt_state);
@@ -313,7 +314,6 @@ void mt9v03x_init(void)


 uint8   mt9v03x_finish_flag = 0;    //һ<><D2BB>ͼ<EFBFBD><CDBC><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD>ɱ<EFBFBD>־λ
-uint8	now_col;					//<2F><>ǰ<EFBFBD><C7B0><EFBFBD>ڲɼ<DAB2><C9BC><EFBFBD><EFBFBD><EFBFBD>
 //-------------------------------------------------------------------------------------------------------------------
 //  @brief      MT9V03X<33><58><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ж<EFBFBD>
 //  @param      NULL
@@ -324,16 +324,15 @@ uint8	now_col;					//
 void mt9v03x_vsync(void)
 {
 	CLEAR_GPIO_FLAG(MT9V03X_VSYNC_PIN);
-	now_col = 0;
+
 	if(!mt9v03x_finish_flag)//<2F>鿴ͼ<E9BFB4><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD>δʹ<CEB4><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>򲻿<EFBFBD>ʼ<EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʳ<EFBFBD>ͻ
 	{
-		DMA_SET_DESTINATION(MT9V03X_DMA_CH, (void *)&mt9v03x_image[0]);
 		dma_start(MT9V03X_DMA_CH);
 	}

 }

-
+uint8	mt9v03x_dma_int_num;	//<2F><>ǰDMA<4D>жϴ<D0B6><CFB4><EFBFBD>
 //-------------------------------------------------------------------------------------------------------------------
 //  @brief      MT9V03X<33><58><EFBFBD><EFBFBD>ͷDMA<4D><41><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
 //  @param      NULL
@@ -344,16 +343,15 @@ void mt9v03x_vsync(void)
 void mt9v03x_dma(void)
 {
 	CLEAR_DMA_FLAG(MT9V03X_DMA_CH);
+	mt9v03x_dma_int_num++;

-	now_col++;
-
-	if(MT9V03X_H > now_col)
-	{
-		dma_start(MT9V03X_DMA_CH);
-	}
-	else
+	if(mt9v03x_dma_int_num >= link_list_num)
 	{
+		//<2F>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD>
+		mt9v03x_dma_int_num = 0;
 		mt9v03x_finish_flag = 1;//һ<><D2BB>ͼ<EFBFBD><CDBC><EFBFBD>Ӳɼ<D3B2><C9BC><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ3.8MS<EFBFBD><EFBFBD><EFBFBD><EFBFBD>(50FPS<50><53>188*120<32>ֱ<EFBFBD><D6B1><EFBFBD>)
+		dma_stop(MT9V03X_DMA_CH);
+
 	}
 }

--- a/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_MT9V03X.h
+++ b/Seekfree_TC264_Opensource_Library/Libraries/seekfree_peripheral/SEEKFREE_MT9V03X.h
@@ -63,9 +63,7 @@
 													//<2F><><EFBFBD>糡<EFBFBD>ж<EFBFBD>ѡ<EFBFBD><D1A1>ERU_CH3 <20><>ô<EFBFBD><C3B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>žͲ<C5BE><CDB2><EFBFBD>ѡ<EFBFBD><D1A1>ERU_CH7<48><37><EFBFBD><EFBFBD>Ϊ3<CEAA><33>7<EFBFBD><37><EFBFBD>ж<EFBFBD><D0B6>ǹ<EFBFBD><C7B9>õġ<C3B5>

 #define MT9V03X_DMA_CH			IfxDma_ChannelId_5	//<2F><><EFBFBD><EFBFBD>ʹ<EFBFBD>õ<EFBFBD>DMAͨ<41><CDA8> 0-47<34><37>ѡ  ͨ<><CDA8><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD>Խ<EFBFBD><D4BD>
-													//<2F>޸Ĵ˴<C4B4>֮<EFBFBD><D6AE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>޸Ķ<DEB8>Ӧ<EFBFBD><D3A6>ERU<52>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD>ΪIfxDma_ChannelId_5<5F><35><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6>ERU<52>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ5
-             
-                        
+
 //<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD>ö<EFBFBD><C3B6>
 typedef enum
 {
--- a/Seekfree_TC264_Opensource_Library/USER/Cpu0_Main.c
+++ b/Seekfree_TC264_Opensource_Library/USER/Cpu0_Main.c
@@ -26,7 +26,6 @@ int core0_main(void)
 	get_clk();//<2F><>ȡʱ<C8A1><CAB1>Ƶ<EFBFBD><C6B5>  <20><><EFBFBD>ر<EFBFBD><D8B1><EFBFBD>

    //<2F>û<EFBFBD><C3BB>ڴ˴<DAB4><CBB4><EFBFBD><EFBFBD>ø<EFBFBD><C3B8>ֳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
-
    enableInterrupts();

    while (TRUE)
--- a/Seekfree_TC264_Opensource_Library/USER/isr.c
+++ b/Seekfree_TC264_Opensource_Library/USER/isr.c
@@ -98,7 +98,8 @@ IFX_INTERRUPT(eru_ch3_ch7_isr, ERU_CH3_CH7_INT_SERVICE, ERU_CH3_CH7_INT_PRIO)
 	if(GET_GPIO_FLAG(ERU_CH3_REQ6_P02_0))//ͨ<><CDA8>3<EFBFBD>ж<EFBFBD>
 	{
 		CLEAR_GPIO_FLAG(ERU_CH3_REQ6_P02_0);
-		if(1 == camera_type)mt9v03x_vsync();
+		if		(1 == camera_type)	mt9v03x_vsync();
+		else if	(3 == camera_type)	ov7725_vsync();

 	}
 	if(GET_GPIO_FLAG(ERU_CH7_REQ16_P15_1))//ͨ<><CDA8>7<EFBFBD>ж<EFBFBD>
@@ -113,7 +114,8 @@ IFX_INTERRUPT(eru_ch3_ch7_isr, ERU_CH3_CH7_INT_SERVICE, ERU_CH3_CH7_INT_PRIO)
 IFX_INTERRUPT(dma_ch5_isr, ERU_DMA_INT_SERVICE, ERU_DMA_INT_PRIO)
 {

-	if(1 == camera_type)	mt9v03x_dma();
+	if		(1 == camera_type)	mt9v03x_dma();
+	else if	(3 == camera_type)	ov7725_dma();
 }