mirror of
https://gitee.com/seekfree/TC264_Library.git
synced 2026-06-04 03:32:56 +00:00
V1.0.4
默认勾选上生成HEX的功能 对Cpu1_Main.c中的core1_main函数默认添加 开启总中断的函数。 修复CPU1无法响应中断的问题 删除汇编中的包含路径信息 修复总钻风小分辨只采集一次的问题 添加RDA5807 FM模块驱动代码 修改LSL文件,方便通过#pragma 来指定变量或者程序放在指定RAM,具体如何使用请参考库例程Specifies_Variable_Or_Code_Location_Demo
This commit is contained in:
@@ -169,94 +169,13 @@
|
||||
<inputType id="com.tasking.ctc.cc.msInputType.1535524086" name="MS" superClass="com.tasking.ctc.cc.msInputType"/>
|
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</tool>
|
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<tool id="com.tasking.ctc.as.abs.debug.1390239146" name="Assembler" superClass="com.tasking.ctc.as.abs.debug">
|
||||
<option id="com.tasking.ctc.as.includePaths.1708708624" name="Include paths" superClass="com.tasking.ctc.as.includePaths" valueType="includePath">
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src}""/>
|
||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Config}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Tricore}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Tricore/Cfg_Illd}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Tricore/Demo_Illd}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Tricore/Main}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Cpu}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Cpu/CStart}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Cpu/Irq}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Cpu/Std}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Cpu/Trap}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Config}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Config/Common}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Tricore}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Tricore/Cfg_Illd}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Tricore/Demo_Illd}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/0_Src/AppSw/Tricore/Main}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/Doc}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/AppSw/Doc/Source}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/_Build}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/_Impl}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/_Lib}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/_Lib/DataHandling}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/_Lib/InternalMux}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/_PinMap}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Asclin}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Ccu6}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Cif}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Cpu}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Dma}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Dsadc}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Dts}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Emem}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Eray}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Eth}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Fce}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Fft}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Flash}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Gpt12}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Gtm}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Hssl}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/I2c}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Iom}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Msc}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Mtu}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Multican}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Port}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Psi5}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Psi5s}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Qspi}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Scu}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Sent}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Smu}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Src}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Stm}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/iLLD/TC26B/Tricore/Vadc}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Infra}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Infra/Platform}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Infra/Platform/Tricore}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Infra/Platform/Tricore/Compilers}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Infra/Sfr}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Infra/Sfr/TC26B}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Infra/Sfr/TC26B/_Reg}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/_Utilities}""/>
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||||
<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/If}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/If/Ccu6If}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/StdIf}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/SysSe}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/SysSe/Bsp}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/SysSe/Comm}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/SysSe/General}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/SysSe/Math}""/>
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<listOptionValue builtIn="false" value=""${workspace_loc:/${ProjName}/src/BaseSw/Service/CpuGeneric/SysSe/Time}""/>
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</option>
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<option id="com.tasking.ctc.as.includePaths.1708708624" name="Include paths" superClass="com.tasking.ctc.as.includePaths"/>
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<inputType id="com.tasking.ctc.asmInputType.1471959711" name="ASM" superClass="com.tasking.ctc.asmInputType"/>
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</tool>
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<tool id="com.tasking.ctc.lk.abs.debug.1142239087" name="Linker" superClass="com.tasking.ctc.lk.abs.debug">
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<option id="com.tasking.ctc.lk.lslFile.598041464" name="Linker script file:" superClass="com.tasking.ctc.lk.lslFile" value=""${workspace_loc:/${ProjName}/Lcf_Tasking_Tricore_Tc.lsl}"" valueType="string"/>
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<option id="com.tasking.ctc.lk.mapFile.mapFile.1792361467" name="Generate map file (.map)" superClass="com.tasking.ctc.lk.mapFile.mapFile" value="false" valueType="boolean"/>
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<option id="com.tasking.ctc.lk.outputFormat.ihex.500806129" name="Generate Intel Hex format file" superClass="com.tasking.ctc.lk.outputFormat.ihex" value="true" valueType="boolean"/>
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<inputType id="com.tasking.ctc.lkObjInputType.654191777" name="OBJ" superClass="com.tasking.ctc.lkObjInputType"/>
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<inputType id="com.tasking.ctc.lkLibInputType.907568174" name="LIB" superClass="com.tasking.ctc.lkLibInputType"/>
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</tool>
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@@ -270,12 +270,19 @@ derivative tc26
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{
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select "(.data.data_cpu1|.data.data_cpu1*)";
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select "(.bss.bss_cpu1|.bss.bss_cpu1*)";
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select ".bss.cpu1_dsram";
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select ".data.cpu1_dsram";
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select ".zdata.cpu1_dsram";
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}
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group (ordered, contiguous, align = 4, run_addr = mem:dsram0)
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{
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select "(.data.data_cpu0|.data.data_cpu0*)";
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select "(.bss.bss_cpu0|.bss.bss_cpu0*)";
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select ".bss.cpu0_dsram";
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select ".data.cpu0_dsram";
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select ".zdata.cpu0_dsram";
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}
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# if LCF_DEFAULT_HOST == LCF_CPU1
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@@ -413,6 +420,7 @@ derivative tc26
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group (ordered, run_addr=mem:pfls0)
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{
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select ".rodata*";
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}
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group (ordered, run_addr=mem:pfls0)
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{
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@@ -17,4 +17,36 @@ V1.0.2
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<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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V1.0.3
|
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<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
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<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
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|
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V1.0.4
|
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Ĭ<>Ϲ<EFBFBD>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>HEX<45>Ĺ<EFBFBD><C4B9><EFBFBD>
|
||||
<09><>Cpu1_Main.c<>е<EFBFBD>core1_main<69><6E><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵĺ<CFB5><C4BA><EFBFBD><EFBFBD><EFBFBD>
|
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<09><EFBFBD>CPU1<55><EFBFBD><DEB7><EFBFBD>Ӧ<EFBFBD>жϵ<D0B6><CFB5><EFBFBD><EFBFBD><EFBFBD>
|
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ɾ<><C9BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>еİ<D0B5><C4B0><EFBFBD>·<EFBFBD><C2B7><EFBFBD><EFBFBD>Ϣ
|
||||
<09><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD>ֱ<EFBFBD>ֻ<EFBFBD>ɼ<EFBFBD>һ<EFBFBD>ε<EFBFBD><CEB5><EFBFBD><EFBFBD><EFBFBD>
|
||||
<09><><EFBFBD><EFBFBD>RDA5807 FMģ<4D><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
<09><EFBFBD>LSL<53>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>#pragma <20><>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>߳<EFBFBD><DFB3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>RAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><CEBF><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Specifies_Variable_Or_Code_Location_Demo
|
||||
//ʹ<><CAB9>#pragma section all "cpu0_dsram" <20><> #pragma section all restore<72><65><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>cpu0_dsram
|
||||
//<2F><><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>仰<EFBFBD>м伴<D0BC>ɣ<EFBFBD>ʹ<EFBFBD><CAB9>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#pragma section all "cpu0_dsram"
|
||||
uint8 test_arry[5]; //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>cpu0_dsram<61><6D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>cpu0_dsram<61><6D>Ϊcpu1_dsram <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>cpu1_dsram<61><6D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//<2F><><EFBFBD>ǽ<EFBFBD><C7BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>CPUִ<55>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD>õı<C3B5><C4B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>±<EFBFBD><C2B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>cpu1_dsram<61><6D><EFBFBD><EFBFBD>
|
||||
#pragma section all restore
|
||||
|
||||
//ʹ<><CAB9>#pragma section all "cpu0_psram" <20><> #pragma section all restore<72><65><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>cpu0_psram
|
||||
//<2F><><EFBFBD><EFBFBD>ֻ<EFBFBD><D6BB>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>仰<EFBFBD>м伴<D0BC>ɣ<EFBFBD>ʹ<EFBFBD><CAB9>ʾ<EFBFBD><CABE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#pragma section all "cpu0_psram"
|
||||
void delay_tset(void) //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>cpu0_psram<61><6D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4>
|
||||
{
|
||||
int i;
|
||||
i = 999;
|
||||
while(i--);
|
||||
}
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>cpu0_psram<61><6D>Ϊcpu1_psram <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD>cpu1_psram<61><6D><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
//<2F><><EFBFBD>ǽ<EFBFBD><C7BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĸ<EFBFBD>CPUִ<55>У<EFBFBD><D0A3><EFBFBD><F2BDABBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ص<EFBFBD><D8B5><EFBFBD><EFBFBD>ĸ<EFBFBD><C4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڣ<EFBFBD>Ĭ<EFBFBD>ϲ<EFBFBD>ָ<EFBFBD><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>£<EFBFBD><C2A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ǵ<EFBFBD>flash<73><68><EFBFBD>ز<EFBFBD>ִ<EFBFBD><D6B4>
|
||||
//ͨ<><CDA8><EFBFBD><EFBFBD><EFBFBD>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RAM<41><4D><EFBFBD>У<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD>еij<D0B5><C4B3><EFBFBD><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>cache<68><EFBFBD><F3A3ACBB><EFBFBD><EFBFBD>ֳ<EFBFBD><D6B3><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD>ٶȽ<D9B6><C8BD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ǾͿ<C7BE><CDBF>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>RAMִ<4D>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ٶ<EFBFBD>
|
||||
#pragma section all restore
|
||||
|
||||
|
||||
@@ -24,7 +24,7 @@
|
||||
|
||||
uint8 camera_type; //<2F><><EFBFBD><EFBFBD>ͷ<EFBFBD>ͺ<EFBFBD> 1<><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 2<><32><EFBFBD><EFBFBD>ͫ<EFBFBD><CDAB><EFBFBD><EFBFBD>δ֧<CEB4>֣<EFBFBD>3<EFBFBD><33>С<EFBFBD><D0A1><EFBFBD><EFBFBD>
|
||||
|
||||
|
||||
uint32 te;
|
||||
|
||||
App_Cpu0 g_AppCpu0; //Ƶ<><C6B5><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD>
|
||||
void get_clk(void)
|
||||
@@ -40,4 +40,6 @@ void get_clk(void)
|
||||
g_AppCpu0.info.cpuFreq = IfxScuCcu_getCpuFrequency(IfxCpu_getCoreIndex());
|
||||
g_AppCpu0.info.sysFreq = IfxScuCcu_getSpbFrequency();
|
||||
g_AppCpu0.info.stmFreq = IfxStm_getFrequency(&MODULE_STM0);
|
||||
|
||||
te = IfxScuCcu_getSriFrequency();
|
||||
}
|
||||
|
||||
@@ -63,6 +63,7 @@
|
||||
#include "SEEKFREE_WIRELESS.h"
|
||||
#include "SEEKFREE_IPS200_PARALLEL8.h"
|
||||
#include "SEEKFREE_7725.h"
|
||||
#include "SEEKFREE_RDA5807.h"
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -50,7 +50,6 @@ void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time);
|
||||
|
||||
|
||||
//------------------------------------<2D><><EFBFBD>´<EFBFBD><C2B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PIT<49>ж<EFBFBD>------------------------------------
|
||||
//-----------------<2D><><EFBFBD>ñ<EFBFBD><C3B1>꺯<EFBFBD><EABAAF>ǰ<EFBFBD><C7B0><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȵ<EFBFBD><C8B5><EFBFBD>pit_init<69><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Գ<EFBFBD>ʼ<EFBFBD><CABC>PIT<49><54><EFBFBD><EFBFBD>-------------------
|
||||
#define pit_interrupt_ms(ccu6n, pit_ch, time) pit_init(ccu6n, pit_ch, time*1000) //(<28><>λΪ <20><><EFBFBD><EFBFBD>)
|
||||
#define pit_interrupt_us(ccu6n, pit_ch, time) pit_init(ccu6n, pit_ch, time) //(<28><>λΪ <><CEA2>)
|
||||
|
||||
|
||||
@@ -314,6 +314,7 @@ void mt9v03x_init(void)
|
||||
|
||||
|
||||
uint8 mt9v03x_finish_flag = 0; //һ<><D2BB>ͼ<EFBFBD><CDBC><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD>ɱ<EFBFBD>־λ
|
||||
uint8 mt9v03x_dma_int_num; //<2F><>ǰDMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief MT9V03X<33><58><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ж<EFBFBD>
|
||||
// @param NULL
|
||||
@@ -324,15 +325,20 @@ uint8 mt9v03x_finish_flag = 0; //һ
|
||||
void mt9v03x_vsync(void)
|
||||
{
|
||||
CLEAR_GPIO_FLAG(MT9V03X_VSYNC_PIN);
|
||||
|
||||
mt9v03x_dma_int_num = 0;
|
||||
if(!mt9v03x_finish_flag)//<2F>鿴ͼ<E9BFB4><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD>δʹ<CEB4><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>ʳ<EFBFBD>ͻ
|
||||
{
|
||||
if(1 == link_list_num)
|
||||
{
|
||||
//û<>в<EFBFBD><D0B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӵ<EFBFBD><D3B4><EFBFBD>ģʽ <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŀ<EFBFBD>ĵ<EFBFBD>ַ
|
||||
DMA_SET_DESTINATION(MT9V03X_DMA_CH, mt9v03x_image[0]);
|
||||
}
|
||||
dma_start(MT9V03X_DMA_CH);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
uint8 mt9v03x_dma_int_num; //<2F><>ǰDMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief MT9V03X<33><58><EFBFBD><EFBFBD>ͷDMA<4D><41><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||
// @param NULL
|
||||
|
||||
@@ -0,0 +1,220 @@
|
||||
/*********************************************************************************************************************
|
||||
* COPYRIGHT NOTICE
|
||||
* Copyright (c) 2020,<2C><><EFBFBD>ɿƼ<C9BF>
|
||||
* All rights reserved.
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>QQȺ<51><C8BA><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>824575535
|
||||
*
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD>У<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҵ<EFBFBD><D2B5>;<EFBFBD><CDBE>
|
||||
* <20><>ӭ<EFBFBD><D3AD>λʹ<CEBB>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>뱣<EFBFBD><EBB1A3><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC>İ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*
|
||||
* @file MPU6050
|
||||
* @company <09>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||
* @author <09><><EFBFBD>ɿƼ<C9BF>(QQ3184284598)
|
||||
* @version <09>鿴doc<6F><63>version<6F>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||
* @Software tasking v6.3r1
|
||||
* @Target core TC264D
|
||||
* @Taobao https://seekfree.taobao.com/
|
||||
* @date 2020-3-23
|
||||
* @note
|
||||
<09><><EFBFBD>߶<EFBFBD><DFB6>壺
|
||||
------------------------------------
|
||||
<09><><EFBFBD><EFBFBD>IIC
|
||||
SCL <20>鿴SEEKFREE_IIC<49>ļ<EFBFBD><C4BC>ڵ<EFBFBD>SEEKFREE_SCL<43>궨<EFBFBD><EAB6A8>
|
||||
SDA <20>鿴SEEKFREE_IIC<49>ļ<EFBFBD><C4BC>ڵ<EFBFBD>SEEKFREE_SDA<44>궨<EFBFBD><EAB6A8>
|
||||
|
||||
Ӳ<><D3B2>IIC
|
||||
SCL <20>鿴init_mpu6050_hardware<72><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SDA <20>鿴init_mpu6050_hardware<72><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
------------------------------------
|
||||
ע<><D7A2><EFBFBD><EFBFBD><EFBFBD>RDA5807<30><37>SCL<43><4C>SDA<44><41><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>1K<31><4B><EFBFBD><EFBFBD>Ȼ<EFBFBD><C8BB><EFBFBD><EFBFBD><EFBFBD>뵥Ƭ<EBB5A5><C6AC><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
|
||||
********************************************************************************************************************/
|
||||
|
||||
|
||||
|
||||
#include "SEEKFREE_IIC.h"
|
||||
#include "zf_stm_systick.h"
|
||||
#include "SEEKFREE_RDA5807.h"
|
||||
|
||||
|
||||
#define ack 1 //<2F><>Ӧ<EFBFBD><D3A6>
|
||||
#define no_ack 0 //<2F><>Ӧ<EFBFBD><D3A6>
|
||||
|
||||
|
||||
#define FM_ADDRESS 0x20>>1
|
||||
|
||||
uint8 rda5807_config_reg[] = {
|
||||
0xc1, 0x03, // Register 0x2
|
||||
0x00, 0x00, // Register 0x3
|
||||
0x0a, 0x00, // Register 0x4
|
||||
0x88, 0x0f, // Register 0x5
|
||||
0x00, 0x00, // Register 0x6
|
||||
0x42, 0x02, // Register 0x7
|
||||
};
|
||||
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief rda5807ģ<37><C4A3>IIC<49><43>ȡ<EFBFBD><C8A1><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// @param dev_add <09>豸<EFBFBD><E8B1B8>ַ(<28><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ַ)
|
||||
// @param data[] <09><><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD>ĵ<EFBFBD>ַָ<D6B7><D6B8>
|
||||
// @param num <09><>ȡ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// @return void
|
||||
// @since v1.0
|
||||
// Sample usage:
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void rad5807m_simiic_write(uint8 dev_add, uint8 data[], uint8 num)
|
||||
{
|
||||
uint8 i;
|
||||
simiic_start();
|
||||
send_ch( (dev_add<<1) | 0x00); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>дλ
|
||||
|
||||
for(i=0;i<num;i++)
|
||||
send_ch(data[i]); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
simiic_stop();
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief ģ<><C4A3>IIC<49><43>ȡ<EFBFBD><C8A1><EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// @param dev_add <09>豸<EFBFBD><E8B1B8>ַ(<28><><EFBFBD><EFBFBD>λ<EFBFBD><CEBB>ַ)
|
||||
// @param dat_add <09><><EFBFBD>ݱ<EFBFBD><DDB1><EFBFBD><EFBFBD>ĵ<EFBFBD>ַָ<D6B7><D6B8>
|
||||
// @param num <09><>ȡ<EFBFBD>ֽ<EFBFBD><D6BD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// @return uint8 <09><><EFBFBD>ؼĴ<D8BC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// @since v1.0
|
||||
// Sample usage:
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void rda5807m_simiic_read(uint8 dev_add,uint8 *dat_add,uint8 num)
|
||||
{
|
||||
simiic_start();
|
||||
|
||||
send_ch( (dev_add<<1) | 0x01); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ӷ<EFBFBD>λ
|
||||
while(--num)
|
||||
{
|
||||
*dat_add = read_ch(ack); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
dat_add++;
|
||||
|
||||
}
|
||||
*dat_add = read_ch(no_ack); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
|
||||
|
||||
simiic_stop();
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief Ƶ<>ʼĴ<CABC><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD>
|
||||
// @param channel Ƶ<>ʼĴ<CABC><C4B4><EFBFBD>ֵ
|
||||
// @return void
|
||||
// @since v1.0
|
||||
// Sample usage:
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void rda5807_channel_config(uint16 reg_chn)
|
||||
{
|
||||
rda5807_config_reg[0] = 0xc0;
|
||||
rda5807_config_reg[1] = 0x01;
|
||||
rda5807_config_reg[2] = (uint8)(reg_chn >> 2);
|
||||
rda5807_config_reg[3] = (uint8)(((reg_chn & 0x3) << 6) | 0x18);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief rda5807<30><37><EFBFBD><EFBFBD>Ƶ<EFBFBD><C6B5> <09><><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD>
|
||||
// @param freq Ƶ<><C6B5>ֵ
|
||||
// @return void
|
||||
// @since v1.0
|
||||
// Sample usage:
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void rda5807_set_channel(float freq)
|
||||
{
|
||||
uint16 reg_chn=0;
|
||||
reg_chn = (int)((freq - 76.0) * 10.0 + 0.5);
|
||||
rda5807_channel_config(reg_chn);
|
||||
rad5807m_simiic_write(FM_ADDRESS,rda5807_config_reg, 4);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief rda5807<30><37><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ģʽ
|
||||
// @param NULL
|
||||
// @return void
|
||||
// @since v1.0
|
||||
// Sample usage:
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void rda5807_set_idle(void)
|
||||
{
|
||||
rda5807_config_reg[1] &= ~(1<<0);//Power Up Disabled.
|
||||
rad5807m_simiic_write(FM_ADDRESS,rda5807_config_reg, 4);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief rda5807<30><37><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD>ģʽ
|
||||
// @param NULL
|
||||
// @return void
|
||||
// @since v1.0
|
||||
// Sample usage:
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void rda5807_set_transimt(void)
|
||||
{
|
||||
rda5807_config_reg[1] |= 1<<0;//Power Up Enable.
|
||||
rad5807m_simiic_write(FM_ADDRESS,rda5807_config_reg, 4);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
uint8 rda5807_read_reg[10];
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief rda5807<30><37>ȡID<49><44><EFBFBD>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD>
|
||||
// @param NULL
|
||||
// @return void
|
||||
// @since v1.0
|
||||
// Sample usage:
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void rda5807_read_id(void)
|
||||
{
|
||||
rda5807m_simiic_read(FM_ADDRESS,rda5807_read_reg,10);
|
||||
}
|
||||
|
||||
|
||||
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
// @brief rda5807<30><37>ʼ<EFBFBD><CABC>
|
||||
// @param NULL
|
||||
// @return void
|
||||
// @since v1.0
|
||||
// Sample usage:
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void rda5807_init(float freq)
|
||||
{
|
||||
uint8 dat[2] = {0x00,0x02};
|
||||
|
||||
|
||||
//iic<69><63>ʼ<EFBFBD><CABC>
|
||||
simiic_init();
|
||||
simiic_delay_set(100);//<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪĬ<CEAA><C4AC><EFBFBD><EFBFBD><EFBFBD>ʽϸ<CABD>
|
||||
//<2F><>λ
|
||||
rad5807m_simiic_write(FM_ADDRESS,dat,2);
|
||||
|
||||
systick_delay_ms(STM0, 600);
|
||||
|
||||
while(rda5807_read_reg[8] != 0x58)
|
||||
{
|
||||
//<2F><>ȡ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Լ졣
|
||||
rda5807m_simiic_read(FM_ADDRESS,rda5807_read_reg,10);
|
||||
systick_delay_ms(STM0, 50);
|
||||
//<2F><><EFBFBD><EFBFBD>һֱ<D2BB><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>鿴SCL<43><4C>SDA<44>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Ӻá<D3BA>
|
||||
//<2F><>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>SEEKFREE_IIC.h<>ļ<EFBFBD><C4BC>е<EFBFBD>SIMIIC_DELAY_TIMEֵ<45><D6B5><EFBFBD><EFBFBD>60
|
||||
}
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD>
|
||||
rad5807m_simiic_write(FM_ADDRESS,rda5807_config_reg,sizeof(rda5807_config_reg));
|
||||
//Ƶ<><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
rda5807_set_channel(freq);
|
||||
|
||||
simiic_delay_set(SIMIIC_DELAY_TIME);//<2F><>ԭģ<D4AD><C4A3>IICĬ<43><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
@@ -0,0 +1,56 @@
|
||||
/*********************************************************************************************************************
|
||||
* COPYRIGHT NOTICE
|
||||
* Copyright (c) 2020,<2C><><EFBFBD>ɿƼ<C9BF>
|
||||
* All rights reserved.
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>QQȺ<51><C8BA><EFBFBD><EFBFBD>Ⱥ<EFBFBD><C8BA>824575535
|
||||
*
|
||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݰ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD>У<EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ҵ<EFBFBD><D2B5>;<EFBFBD><CDBE>
|
||||
* <20><>ӭ<EFBFBD><D3AD>λʹ<CEBB>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>뱣<EFBFBD><EBB1A3><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC>İ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
*
|
||||
* @file MPU6050
|
||||
* @company <09>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||
* @author <09><><EFBFBD>ɿƼ<C9BF>(QQ3184284598)
|
||||
* @version <09>鿴doc<6F><63>version<6F>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||
* @Software tasking v6.3r1
|
||||
* @Target core TC264D
|
||||
* @Taobao https://seekfree.taobao.com/
|
||||
* @date 2020-3-23
|
||||
* @note
|
||||
<09><><EFBFBD>߶<EFBFBD><DFB6>壺
|
||||
------------------------------------
|
||||
<09><><EFBFBD><EFBFBD>IIC
|
||||
SCL <20>鿴SEEKFREE_IIC<49>ļ<EFBFBD><C4BC>ڵ<EFBFBD>SEEKFREE_SCL<43>궨<EFBFBD><EAB6A8>
|
||||
SDA <20>鿴SEEKFREE_IIC<49>ļ<EFBFBD><C4BC>ڵ<EFBFBD>SEEKFREE_SDA<44>궨<EFBFBD><EAB6A8>
|
||||
|
||||
Ӳ<><D3B2>IIC
|
||||
SCL <20>鿴init_mpu6050_hardware<72><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
SDA <20>鿴init_mpu6050_hardware<72><65><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ʼ<EFBFBD><CABC>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
------------------------------------
|
||||
ע<><D7A2><EFBFBD><EFBFBD><EFBFBD>RDA5807<30><37>SCL<43><4C>SDA<44><41><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>1K<31><4B><EFBFBD><EFBFBD>Ȼ<EFBFBD><C8BB><EFBFBD><EFBFBD><EFBFBD>뵥Ƭ<EBB5A5><C6AC><EFBFBD><EFBFBD><EFBFBD>ӣ<EFBFBD><D3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
|
||||
********************************************************************************************************************/
|
||||
|
||||
|
||||
#ifndef _FM5807_H
|
||||
#define _FM5807_H
|
||||
#include "common.h"
|
||||
#include "SEEKFREE_FONT.h"
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
void rda5807_init(float freq);
|
||||
void rda5807_set_transimt(void);
|
||||
void rda5807_set_idle(void);
|
||||
void rda5807_set_channel(float freq);
|
||||
void rda5807_channel_config(uint16 reg_chn);
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@@ -19,19 +19,23 @@
|
||||
|
||||
|
||||
#include "headfile.h"
|
||||
#pragma section all "cpu0_dsram"
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>#pragma section all restore<72><65><EFBFBD><EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD>ȫ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CPU0<55><30>RAM<41><4D>
|
||||
|
||||
|
||||
uint32 data;
|
||||
int core0_main(void)
|
||||
{
|
||||
get_clk();//<2F><>ȡʱ<C8A1><CAB1>Ƶ<EFBFBD><C6B5> <20><><EFBFBD>ر<EFBFBD><D8B1><EFBFBD>
|
||||
|
||||
//<2F>û<EFBFBD><C3BB>ڴ˴<DAB4><CBB4><EFBFBD><EFBFBD>ø<EFBFBD><C3B8>ֳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
enableInterrupts();
|
||||
//<2F>û<EFBFBD><C3BB>ڴ˴<DAB4><CBB4><EFBFBD><EFBFBD>ø<EFBFBD><C3B8>ֳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
enableInterrupts();
|
||||
|
||||
while (TRUE)
|
||||
{
|
||||
//<2F>û<EFBFBD><C3BB>ڴ˴<DAB4><CBB4><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
while (TRUE)
|
||||
{
|
||||
//<2F>û<EFBFBD><C3BB>ڴ˴<DAB4><CBB4><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
#pragma section all restore
|
||||
|
||||
@@ -18,14 +18,18 @@
|
||||
********************************************************************************************************************/
|
||||
|
||||
#include "headfile.h"
|
||||
#pragma section all "cpu1_dsram"
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>#pragma section all restore<72><65><EFBFBD><EFBFBD>֮<EFBFBD><D6AE><EFBFBD><EFBFBD>ȫ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>CPU1<55><31>RAM<41><4D>
|
||||
|
||||
|
||||
|
||||
void core1_main(void)
|
||||
{
|
||||
disableInterrupts();
|
||||
IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
|
||||
|
||||
//<2F>û<EFBFBD><C3BB>ڴ˴<DAB4><CBB4><EFBFBD><EFBFBD>ø<EFBFBD><C3B8>ֳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
|
||||
enableInterrupts();
|
||||
while (TRUE)
|
||||
{
|
||||
//<2F>û<EFBFBD><C3BB>ڴ˴<DAB4><CBB4><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
@@ -33,3 +37,7 @@ void core1_main(void)
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
#pragma section all restore
|
||||
|
||||
@@ -20,28 +20,30 @@
|
||||
|
||||
#include "isr_config.h"
|
||||
#include "isr.h"
|
||||
//<2F><>isr.c<><63><EFBFBD>жϺ<D0B6><CFBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵڶ<C4B5><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̶<EFBFBD>Ϊ0<CEAA><30><EFBFBD>벻Ҫ<EBB2BB><D2AA><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD>CPU1<55><31><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ҳ<EFBFBD><D2B2>Ҫ<EFBFBD><D2AA><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD>ҪCPU1<55><31><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ֻ<EFBFBD><D6BB>Ҫ<EFBFBD><D2AA>isr_config.h<><68><EFBFBD>Ķ<DEB8>Ӧ<EFBFBD>ĺ궨<C4BA>弴<EFBFBD><E5BCB4>
|
||||
|
||||
|
||||
//PIT<49>жϺ<D0B6><CFBA><EFBFBD> ʾ<><CABE>
|
||||
IFX_INTERRUPT(cc60_pit_ch0_isr, CCU6_0_CH0_INT_SERVICE, CCU6_0_CH0_ISR_PRIORITY)
|
||||
IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
||||
{
|
||||
PIT_CLEAR_FLAG(CCU6_0, PIT_CH0);
|
||||
|
||||
}
|
||||
|
||||
|
||||
IFX_INTERRUPT(cc60_pit_ch1_isr, CCU6_0_CH1_INT_SERVICE, CCU6_0_CH1_ISR_PRIORITY)
|
||||
IFX_INTERRUPT(cc60_pit_ch1_isr, 0, CCU6_0_CH1_ISR_PRIORITY)
|
||||
{
|
||||
PIT_CLEAR_FLAG(CCU6_0, PIT_CH1);
|
||||
|
||||
}
|
||||
|
||||
IFX_INTERRUPT(cc61_pit_ch0_isr, CCU6_1_CH0_INT_SERVICE, CCU6_1_CH0_ISR_PRIORITY)
|
||||
IFX_INTERRUPT(cc61_pit_ch0_isr, 0, CCU6_1_CH0_ISR_PRIORITY)
|
||||
{
|
||||
PIT_CLEAR_FLAG(CCU6_1, PIT_CH0);
|
||||
|
||||
}
|
||||
|
||||
IFX_INTERRUPT(cc61_pit_ch1_isr, CCU6_1_CH1_INT_SERVICE, CCU6_1_CH1_ISR_PRIORITY)
|
||||
IFX_INTERRUPT(cc61_pit_ch1_isr, 0, CCU6_1_CH1_ISR_PRIORITY)
|
||||
{
|
||||
PIT_CLEAR_FLAG(CCU6_1, PIT_CH1);
|
||||
|
||||
@@ -50,7 +52,7 @@ IFX_INTERRUPT(cc61_pit_ch1_isr, CCU6_1_CH1_INT_SERVICE, CCU6_1_CH1_ISR_PRIORITY)
|
||||
|
||||
|
||||
|
||||
IFX_INTERRUPT(eru_ch0_ch4_isr, ERU_CH0_CH4_INT_SERVICE, ERU_CH0_CH4_INT_PRIO)
|
||||
IFX_INTERRUPT(eru_ch0_ch4_isr, 0, ERU_CH0_CH4_INT_PRIO)
|
||||
{
|
||||
if(GET_GPIO_FLAG(ERU_CH0_REQ4_P10_7))//ͨ<><CDA8>0<EFBFBD>ж<EFBFBD>
|
||||
{
|
||||
@@ -63,7 +65,7 @@ IFX_INTERRUPT(eru_ch0_ch4_isr, ERU_CH0_CH4_INT_SERVICE, ERU_CH0_CH4_INT_PRIO)
|
||||
}
|
||||
}
|
||||
|
||||
IFX_INTERRUPT(eru_ch1_ch5_isr, ERU_CH1_CH5_INT_SERVICE, ERU_CH1_CH5_INT_PRIO)
|
||||
IFX_INTERRUPT(eru_ch1_ch5_isr, 0, ERU_CH1_CH5_INT_PRIO)
|
||||
{
|
||||
if(GET_GPIO_FLAG(ERU_CH1_REQ5_P10_8))//ͨ<><CDA8>1<EFBFBD>ж<EFBFBD>
|
||||
{
|
||||
@@ -77,7 +79,7 @@ IFX_INTERRUPT(eru_ch1_ch5_isr, ERU_CH1_CH5_INT_SERVICE, ERU_CH1_CH5_INT_PRIO)
|
||||
}
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷpclk<6C><6B><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD> 2ͨ<32><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ﲻ<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD>
|
||||
//IFX_INTERRUPT(eru_ch2_ch6_isr, ERU_CH2_CH6_INT_SERVICE, ERU_CH2_CH6_INT_PRIO)
|
||||
//IFX_INTERRUPT(eru_ch2_ch6_isr, 0, ERU_CH2_CH6_INT_PRIO)
|
||||
//{
|
||||
// if(GET_GPIO_FLAG(ERU_CH2_REQ7_P00_4))//ͨ<><CDA8>2<EFBFBD>ж<EFBFBD>
|
||||
// {
|
||||
@@ -93,7 +95,7 @@ IFX_INTERRUPT(eru_ch1_ch5_isr, ERU_CH1_CH5_INT_SERVICE, ERU_CH1_CH5_INT_PRIO)
|
||||
|
||||
|
||||
|
||||
IFX_INTERRUPT(eru_ch3_ch7_isr, ERU_CH3_CH7_INT_SERVICE, ERU_CH3_CH7_INT_PRIO)
|
||||
IFX_INTERRUPT(eru_ch3_ch7_isr, 0, ERU_CH3_CH7_INT_PRIO)
|
||||
{
|
||||
if(GET_GPIO_FLAG(ERU_CH3_REQ6_P02_0))//ͨ<><CDA8>3<EFBFBD>ж<EFBFBD>
|
||||
{
|
||||
@@ -111,7 +113,7 @@ IFX_INTERRUPT(eru_ch3_ch7_isr, ERU_CH3_CH7_INT_SERVICE, ERU_CH3_CH7_INT_PRIO)
|
||||
|
||||
|
||||
|
||||
IFX_INTERRUPT(dma_ch5_isr, ERU_DMA_INT_SERVICE, ERU_DMA_INT_PRIO)
|
||||
IFX_INTERRUPT(dma_ch5_isr, 0, ERU_DMA_INT_PRIO)
|
||||
{
|
||||
|
||||
if (1 == camera_type) mt9v03x_dma();
|
||||
@@ -120,61 +122,61 @@ IFX_INTERRUPT(dma_ch5_isr, ERU_DMA_INT_SERVICE, ERU_DMA_INT_PRIO)
|
||||
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ʾ<><CABE>
|
||||
IFX_INTERRUPT(uart0_tx_isr, UART0_INT_SERVICE, UART0_TX_INT_PRIO)
|
||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
||||
}
|
||||
IFX_INTERRUPT(uart0_rx_isr, UART0_INT_SERVICE, UART0_RX_INT_PRIO)
|
||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
||||
}
|
||||
IFX_INTERRUPT(uart0_er_isr, UART0_INT_SERVICE, UART0_ER_INT_PRIO)
|
||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
||||
}
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||
IFX_INTERRUPT(uart1_tx_isr, UART1_INT_SERVICE, UART1_TX_INT_PRIO)
|
||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
||||
}
|
||||
IFX_INTERRUPT(uart1_rx_isr, UART1_INT_SERVICE, UART1_RX_INT_PRIO)
|
||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
||||
mt9v03x_uart_callback();
|
||||
}
|
||||
IFX_INTERRUPT(uart1_er_isr, UART1_INT_SERVICE, UART1_ER_INT_PRIO)
|
||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
||||
}
|
||||
|
||||
|
||||
//<2F><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||
IFX_INTERRUPT(uart2_tx_isr, UART2_INT_SERVICE, UART2_TX_INT_PRIO)
|
||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
||||
}
|
||||
IFX_INTERRUPT(uart2_rx_isr, UART2_INT_SERVICE, UART2_RX_INT_PRIO)
|
||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
||||
wireless_uart_callback();
|
||||
}
|
||||
IFX_INTERRUPT(uart2_er_isr, UART2_INT_SERVICE, UART2_ER_INT_PRIO)
|
||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||
}
|
||||
|
||||
|
||||
|
||||
IFX_INTERRUPT(uart3_tx_isr, UART3_INT_SERVICE, UART3_TX_INT_PRIO)
|
||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
||||
}
|
||||
IFX_INTERRUPT(uart3_rx_isr, UART3_INT_SERVICE, UART3_RX_INT_PRIO)
|
||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
||||
}
|
||||
IFX_INTERRUPT(uart3_er_isr, UART3_INT_SERVICE, UART3_ER_INT_PRIO)
|
||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||
{
|
||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user