lhye200/TC264_Library_seekfree
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V1.0.4

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默认勾选上生成HEX的功能
 对Cpu1_Main.c中的core1_main函数默认添加 开启总中断的函数。
 修复CPU1无法响应中断的问题
 删除汇编中的包含路径信息
 修复总钻风小分辨只采集一次的问题
 添加RDA5807 FM模块驱动代码
 修改LSL文件，方便通过#pragma 来指定变量或者程序放在指定RAM，具体如何使用请参考库例程Specifies_Variable_Or_Code_Location_Demo
This commit is contained in:
SEEKFREE_Kang
2020-04-27 17:41:10 +08:00
parent 3f923caa1a
commit c1083dc65f
1344 changed files with 840944 additions and 1398 deletions
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41
Example/1-ADC_Demo/USER/isr.c
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@@ -20,28 +20,29 @@
#include "isr_config.h"
#include "isr.h"
//<2F><>isr.c<><63><EFBFBD>жϺ<D0B6><CFBA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵڶ<C4B5><DAB6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>̶<EFBFBD>Ϊ0<CEAA><30><EFBFBD>벻Ҫ<EBB2BB><D2AA><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD>ʹ<EFBFBD><CAB9><EFBFBD><EFBFBD>CPU1<55><31><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ҳ<EFBFBD><D2B2>Ҫ<EFBFBD><D2AA><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD>ҪCPU1<55><31><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>ֻ<EFBFBD><D6BB>Ҫ<EFBFBD><D2AA>isr_config.h<><68><EFBFBD>޸Ķ<DEB8>Ӧ<EFBFBD>ĺ궨<C4BA>弴<EFBFBD><E5BCB4>
//PIT<49>жϺ<D0B6><CFBA><EFBFBD> ʾ<><CABE>
IFX_INTERRUPT(cc60_pit_ch0_isr, CCU6_0_CH0_INT_SERVICE, CCU6_0_CH0_ISR_PRIORITY)
IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
{
PIT_CLEAR_FLAG(CCU6_0, PIT_CH0);
}
IFX_INTERRUPT(cc60_pit_ch1_isr, CCU6_0_CH1_INT_SERVICE, CCU6_0_CH1_ISR_PRIORITY)
IFX_INTERRUPT(cc60_pit_ch1_isr, 0, CCU6_0_CH1_ISR_PRIORITY)
{
PIT_CLEAR_FLAG(CCU6_0, PIT_CH1);
}
IFX_INTERRUPT(cc61_pit_ch0_isr, CCU6_1_CH0_INT_SERVICE, CCU6_1_CH0_ISR_PRIORITY)
IFX_INTERRUPT(cc61_pit_ch0_isr, 0, CCU6_1_CH0_ISR_PRIORITY)
{
PIT_CLEAR_FLAG(CCU6_1, PIT_CH0);
}
IFX_INTERRUPT(cc61_pit_ch1_isr, CCU6_1_CH1_INT_SERVICE, CCU6_1_CH1_ISR_PRIORITY)
IFX_INTERRUPT(cc61_pit_ch1_isr, 0, CCU6_1_CH1_ISR_PRIORITY)
{
PIT_CLEAR_FLAG(CCU6_1, PIT_CH1);
@@ -50,7 +51,7 @@ IFX_INTERRUPT(cc61_pit_ch1_isr, CCU6_1_CH1_INT_SERVICE, CCU6_1_CH1_ISR_PRIORITY)
IFX_INTERRUPT(eru_ch0_ch4_isr, ERU_CH0_CH4_INT_SERVICE, ERU_CH0_CH4_INT_PRIO)
IFX_INTERRUPT(eru_ch0_ch4_isr, 0, ERU_CH0_CH4_INT_PRIO)
{
if(GET_GPIO_FLAG(ERU_CH0_REQ4_P10_7))//ͨ<><CDA8>0<EFBFBD>ж<EFBFBD>
{
@@ -63,7 +64,7 @@ IFX_INTERRUPT(eru_ch0_ch4_isr, ERU_CH0_CH4_INT_SERVICE, ERU_CH0_CH4_INT_PRIO)
}
}
IFX_INTERRUPT(eru_ch1_ch5_isr, ERU_CH1_CH5_INT_SERVICE, ERU_CH1_CH5_INT_PRIO)
IFX_INTERRUPT(eru_ch1_ch5_isr, 0, ERU_CH1_CH5_INT_PRIO)
{
if(GET_GPIO_FLAG(ERU_CH1_REQ5_P10_8))//ͨ<><CDA8>1<EFBFBD>ж<EFBFBD>
{
@@ -93,7 +94,7 @@ IFX_INTERRUPT(eru_ch1_ch5_isr, ERU_CH1_CH5_INT_SERVICE, ERU_CH1_CH5_INT_PRIO)
IFX_INTERRUPT(eru_ch3_ch7_isr, ERU_CH3_CH7_INT_SERVICE, ERU_CH3_CH7_INT_PRIO)
IFX_INTERRUPT(eru_ch3_ch7_isr, 0, ERU_CH3_CH7_INT_PRIO)
{
if(GET_GPIO_FLAG(ERU_CH3_REQ6_P02_0))//ͨ<><CDA8>3<EFBFBD>ж<EFBFBD>
{
@@ -111,7 +112,7 @@ IFX_INTERRUPT(eru_ch3_ch7_isr, ERU_CH3_CH7_INT_SERVICE, ERU_CH3_CH7_INT_PRIO)
IFX_INTERRUPT(dma_ch5_isr, ERU_DMA_INT_SERVICE, ERU_DMA_INT_PRIO)
IFX_INTERRUPT(dma_ch5_isr, 0, ERU_DMA_INT_PRIO)
{
if (1 == camera_type) mt9v03x_dma();
@@ -120,61 +121,61 @@ IFX_INTERRUPT(dma_ch5_isr, ERU_DMA_INT_SERVICE, ERU_DMA_INT_PRIO)
//<2F><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ʾ<><CABE>
IFX_INTERRUPT(uart0_tx_isr, UART0_INT_SERVICE, UART0_TX_INT_PRIO)
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
{
IfxAsclin_Asc_isrTransmit(&uart0_handle);
}
IFX_INTERRUPT(uart0_rx_isr, UART0_INT_SERVICE, UART0_RX_INT_PRIO)
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
{
IfxAsclin_Asc_isrReceive(&uart0_handle);
}
IFX_INTERRUPT(uart0_er_isr, UART0_INT_SERVICE, UART0_ER_INT_PRIO)
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
{
IfxAsclin_Asc_isrError(&uart0_handle);
}
//<2F><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
IFX_INTERRUPT(uart1_tx_isr, UART1_INT_SERVICE, UART1_TX_INT_PRIO)
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
{
IfxAsclin_Asc_isrTransmit(&uart1_handle);
}
IFX_INTERRUPT(uart1_rx_isr, UART1_INT_SERVICE, UART1_RX_INT_PRIO)
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
{
IfxAsclin_Asc_isrReceive(&uart1_handle);
mt9v03x_uart_callback();
}
IFX_INTERRUPT(uart1_er_isr, UART1_INT_SERVICE, UART1_ER_INT_PRIO)
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
{
IfxAsclin_Asc_isrError(&uart1_handle);
}
//<2F><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
IFX_INTERRUPT(uart2_tx_isr, UART2_INT_SERVICE, UART2_TX_INT_PRIO)
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
{
IfxAsclin_Asc_isrTransmit(&uart2_handle);
}
IFX_INTERRUPT(uart2_rx_isr, UART2_INT_SERVICE, UART2_RX_INT_PRIO)
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
{
IfxAsclin_Asc_isrReceive(&uart2_handle);
wireless_uart_callback();
}
IFX_INTERRUPT(uart2_er_isr, UART2_INT_SERVICE, UART2_ER_INT_PRIO)
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
{
IfxAsclin_Asc_isrError(&uart2_handle);
}
IFX_INTERRUPT(uart3_tx_isr, UART3_INT_SERVICE, UART3_TX_INT_PRIO)
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
{
IfxAsclin_Asc_isrTransmit(&uart3_handle);
}
IFX_INTERRUPT(uart3_rx_isr, UART3_INT_SERVICE, UART3_RX_INT_PRIO)
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
{
IfxAsclin_Asc_isrReceive(&uart3_handle);
}
IFX_INTERRUPT(uart3_er_isr, UART3_INT_SERVICE, UART3_ER_INT_PRIO)
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
{
IfxAsclin_Asc_isrError(&uart3_handle);
}