mirror of
https://gitee.com/seekfree/TC264_Library.git
synced 2026-06-04 03:32:56 +00:00
修复编码器结构体名称错误
This commit is contained in:
SEEKFREE_BUDING
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
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}
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#endif
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#if WIFI_UART_AUTO_CONNECT == 2
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if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
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if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
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{
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zf_log(0, "connect UDP server failed");
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return_state = 1;
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@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
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}
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#endif
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#if WIFI_UART_AUTO_CONNECT == 3
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if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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{
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zf_log(0, "build TCP server failed");
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return_state = 1;
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@@ -59,7 +59,7 @@
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#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
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#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
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#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
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#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
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#endif
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//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
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@@ -71,7 +71,7 @@
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#if (WIFI_UART_AUTO_CONNECT > 3)
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#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
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#else
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#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
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#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
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#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
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#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
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#endif
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@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
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switch(encoder_n)
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{
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case TIM2_ENCOEDER:
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case TIM2_ENCODER:
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{
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if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
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else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
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if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
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else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
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else zf_assert(FALSE);
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if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
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else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
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if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
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else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
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else zf_assert(FALSE);
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}break;
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case TIM3_ENCOEDER:
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case TIM3_ENCODER:
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{
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if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
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if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
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else zf_assert(FALSE);
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if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
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if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
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else zf_assert(FALSE);
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}break;
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case TIM4_ENCOEDER:
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case TIM4_ENCODER:
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{
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if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
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if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
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else zf_assert(FALSE);
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if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
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else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
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if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
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else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
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else zf_assert(FALSE);
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}break;
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case TIM5_ENCOEDER:
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case TIM5_ENCODER:
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{
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if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
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else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
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if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
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else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
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else zf_assert(FALSE);
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if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
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else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
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if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
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else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
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else zf_assert(FALSE);
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}break;
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case TIM6_ENCOEDER:
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case TIM6_ENCODER:
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{
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if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
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else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
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if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
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else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
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else zf_assert(FALSE);
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if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
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if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
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else zf_assert(FALSE);
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}break;
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}
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@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
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// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
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// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
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// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
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// <20><>ע<EFBFBD><D7A2>Ϣ
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//-------------------------------------------------------------------------------------------------------------------
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int16 encoder_get_count (encoder_index_enum encoder_n)
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@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
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int16 encoder_data = 0;
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switch(encoder_n)
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{
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case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
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case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
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case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
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case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
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case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
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case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
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case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
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case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
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case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
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case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
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default: encoder_data = 0;
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}
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return encoder_data;
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@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
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// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
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// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
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// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
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// <20><>ע<EFBFBD><D7A2>Ϣ
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//-------------------------------------------------------------------------------------------------------------------
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void encoder_clear_count (encoder_index_enum encoder_n)
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{
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switch(encoder_n)
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{
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case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
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case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
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}
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}
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@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
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// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
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// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
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// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
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// <20><>ע<EFBFBD><D7A2>Ϣ
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//-------------------------------------------------------------------------------------------------------------------
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void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
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@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
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switch(encoder_n)
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{
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case TIM2_ENCOEDER:
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case TIM2_ENCODER:
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{
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IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
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IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
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@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
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IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
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}break;
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case TIM3_ENCOEDER:
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case TIM3_ENCODER:
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{
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IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
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IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
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@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
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IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
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}break;
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case TIM4_ENCOEDER:
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case TIM4_ENCODER:
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{
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IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
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IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
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@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
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IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
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}break;
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case TIM5_ENCOEDER:
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case TIM5_ENCODER:
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{
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IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
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IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
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@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
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IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
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}break;
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case TIM6_ENCOEDER:
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case TIM6_ENCODER:
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{
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IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
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IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
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@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -1188,7 +1188,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 2
|
||||
if(wifi_uart_connect_udp_transfer(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_MINE_PORT, WIFI_UART_SERIANET)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // <20><><EFBFBD><EFBFBD>UDP<44><50><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "connect UDP server failed");
|
||||
return_state = 1;
|
||||
@@ -1196,7 +1196,7 @@ uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi
|
||||
}
|
||||
#endif
|
||||
#if WIFI_UART_AUTO_CONNECT == 3
|
||||
if(wifi_uart_creat_tcp_servers(WIFI_UART_MINE_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // <20><><EFBFBD><EFBFBD>TCP<43><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
zf_log(0, "build TCP server failed");
|
||||
return_state = 1;
|
||||
|
||||
@@ -59,7 +59,7 @@
|
||||
#define WIFI_UART_RTS_PIN (P10_2) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> ָʾ<D6B8><CABE>ǰģ<C7B0><C4A3><EFBFBD>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 0-<2D><><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> 1-<2D><><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_HARDWARE_RST (1) // <20><><EFBFBD><EFBFBD><EFBFBD>Ƿ<EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> 0-ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ 1-ʹ<><CAB9>Ӳ<EFBFBD><D3B2> RST
|
||||
#if WIFI_UART_HARDWARE_RST // <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>׳<EFBFBD><D7B3>ֵ<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><DEB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ģ<EFBFBD><C4A3>
|
||||
#define WIFI_UART_RST_PIN (P02_8) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#define WIFI_UART_RST_PIN (P11_6) // <20><><EFBFBD><EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
||||
#endif
|
||||
//=================================================WIFI_UART <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
@@ -71,7 +71,7 @@
|
||||
#if (WIFI_UART_AUTO_CONNECT > 3)
|
||||
#error "WIFI_UART_AUTO_CONNECT <20><>ֵֻ<D6B5><D6BB>Ϊ [0,1,2,3]"
|
||||
#else
|
||||
#define WIFI_UART_TARGET_IP "192.168.2.152" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_IP "192.168.137.1" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD><EFBFBD> IP
|
||||
#define WIFI_UART_TARGET_PORT "8080" // <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD><C4BF><EFBFBD>Ķ˿<C4B6>
|
||||
#define WIFI_UART_LOCAL_PORT "8080" // <20><><EFBFBD><EFBFBD><EFBFBD>˿<EFBFBD>
|
||||
#endif
|
||||
|
||||
@@ -53,54 +53,54 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
if (TIM2_ENCOEDER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCOEDER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
|
||||
else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM2_ENCOEDER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCOEDER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
|
||||
else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
if (TIM3_ENCOEDER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM3_ENCOEDER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
if (TIM4_ENCOEDER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM4_ENCOEDER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCOEDER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
|
||||
else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
if (TIM5_ENCOEDER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCOEDER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
|
||||
else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM5_ENCOEDER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCOEDER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
|
||||
else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
if (TIM6_ENCOEDER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCOEDER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
|
||||
else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
|
||||
else zf_assert(FALSE);
|
||||
|
||||
if (TIM6_ENCOEDER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
|
||||
else zf_assert(FALSE);
|
||||
}break;
|
||||
}
|
||||
@@ -116,7 +116,7 @@ static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݲɼ<DDB2>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCOEDER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> int16 speed; speed = encoder_get_count(TIM2_ENCODER); // ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
@@ -124,11 +124,11 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
int16 encoder_data = 0;
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCOEDER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCOEDER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCOEDER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCOEDER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
|
||||
case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
|
||||
default: encoder_data = 0;
|
||||
}
|
||||
return encoder_data;
|
||||
@@ -137,18 +137,18 @@ int16 encoder_get_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> gptn ѡ<><D1A1><EFBFBD><EFBFBD>ʹ<EFBFBD>õĶ<C3B5>ʱ<EFBFBD><CAB1>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCOEDER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_clear_count(TIM2_ENCODER);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
{
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCOEDER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCOEDER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCOEDER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCOEDER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -158,7 +158,7 @@ void encoder_clear_count (encoder_index_enum encoder_n)
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin ENCODER ͨ<><CDA8> 1
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin ENCODER ͨ<><CDA8> 2
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD><EFBFBD>ΪAͨ<41><CDA8> P00_8<5F><38><EFBFBD><EFBFBD>ΪBͨ<42><CDA8>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
|
||||
@@ -170,7 +170,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
|
||||
switch(encoder_n)
|
||||
{
|
||||
case TIM2_ENCOEDER:
|
||||
case TIM2_ENCODER:
|
||||
{
|
||||
IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -178,7 +178,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM3_ENCOEDER:
|
||||
case TIM3_ENCODER:
|
||||
{
|
||||
IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -186,7 +186,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM4_ENCOEDER:
|
||||
case TIM4_ENCODER:
|
||||
{
|
||||
IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -194,7 +194,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM5_ENCOEDER:
|
||||
case TIM5_ENCODER:
|
||||
{
|
||||
IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -202,7 +202,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
|
||||
}break;
|
||||
|
||||
case TIM6_ENCOEDER:
|
||||
case TIM6_ENCODER:
|
||||
{
|
||||
IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
|
||||
IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
|
||||
@@ -218,7 +218,7 @@ void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum coun
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch1_pin <20><><EFBFBD>ü<EFBFBD><C3BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch2_pin <20><><EFBFBD>÷<EFBFBD><C3B7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCOEDER, TIM2_ENCOEDER_CH1_P00_7, TIM2_ENCOEDER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// ʹ<><CAB9>T2<54><32>ʱ<EFBFBD><CAB1> P00_7<5F><37><EFBFBD>Ž<EFBFBD><C5BD>м<EFBFBD><D0BC><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>P00_8<5F><38><EFBFBD><EFBFBD>
|
||||
// <20><>ע<EFBFBD><D7A2>Ϣ Ӣ<><D3A2><EFBFBD><EFBFBD>ϵ<EFBFBD>е<EFBFBD>Ƭ<EFBFBD><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˴<EFBFBD><CBB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڷ<D3BF><DAB7><EFBFBD><EFBFBD>û<EFBFBD>ʹ<EFBFBD><CAB9>
|
||||
//-------------------------------------------------------------------------------------------------------------------
|
||||
void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
|
||||
|
||||
@@ -41,44 +41,44 @@
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH1_P33_7,
|
||||
TIM2_ENCODER_CH1_P00_7, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH1_P33_7,
|
||||
|
||||
TIM3_ENCOEDER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH1_P02_6, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH1_P02_8, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM5_ENCOEDER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH1_P10_3,
|
||||
TIM5_ENCODER_CH1_P21_7, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH1_P10_3,
|
||||
|
||||
TIM6_ENCOEDER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCOEDER_CH1_P10_2,
|
||||
TIM6_ENCODER_CH1_P20_3, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH1_P10_2,
|
||||
}encoder_channel1_enum;
|
||||
|
||||
// <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6>岻<EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD>
|
||||
typedef enum // ö<>ٱ<EFBFBD><D9B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCOEDER_CH2_P33_6,
|
||||
TIM2_ENCODER_CH2_P00_8, // T2<54><32>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM2_ENCODER_CH2_P33_6,
|
||||
|
||||
TIM3_ENCOEDER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM3_ENCODER_CH2_P02_7, // T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
|
||||
TIM4_ENCOEDER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCOEDER_CH2_P33_5,
|
||||
TIM4_ENCODER_CH2_P00_9, // T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM4_ENCODER_CH2_P33_5,
|
||||
|
||||
TIM5_ENCOEDER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCOEDER_CH2_P10_1,
|
||||
TIM5_ENCODER_CH2_P21_6, // T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM5_ENCODER_CH2_P10_1,
|
||||
|
||||
TIM6_ENCOEDER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
TIM6_ENCODER_CH2_P20_0, // T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||
}encoder_channel2_enum;
|
||||
|
||||
typedef enum // ö<><C3B6> <20><>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||
{
|
||||
TIM2_ENCOEDER,
|
||||
TIM3_ENCOEDER,
|
||||
TIM4_ENCOEDER,
|
||||
TIM5_ENCOEDER,
|
||||
TIM6_ENCOEDER,
|
||||
TIM2_ENCODER,
|
||||
TIM3_ENCODER,
|
||||
TIM4_ENCODER,
|
||||
TIM5_ENCODER,
|
||||
TIM6_ENCODER,
|
||||
}encoder_index_enum;
|
||||
|
||||
//====================================================<3D><><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
|
||||
|
||||
Reference in New Issue
Block a user