mirror of
https://gitee.com/seekfree/TC264_Library.git
synced 2026-06-04 03:32:56 +00:00
V3.2.5
修复延时函数初始化参数及中断向量表问题
This commit is contained in:
@@ -1,3 +1,5 @@
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V3.2.5
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<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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V3.2.4
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V3.2.4
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<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
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<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
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<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
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<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
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@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
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IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
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IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
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IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
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stm1_isr_flag = 0;
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stm1_isr_flag = 0;
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}
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}
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//-------------------------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------------------------
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
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@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
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}
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}
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else
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else
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{
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{
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if(stm_index == IfxStm_Index_0)
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switch(stm_index)
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{
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case IfxStm_Index_0:
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{
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{
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Ifx_STM *stm_sfr = &MODULE_STM0;
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Ifx_STM *stm_sfr = &MODULE_STM0;
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stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
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stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
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stm0_isr_flag = 1;
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stm0_isr_flag = 1;
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while(stm0_isr_flag);
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while(stm0_isr_flag);
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}
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}break;
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else if(stm_index == IfxStm_Index_1)
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case IfxStm_Index_1:
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{
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{
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Ifx_STM *stm_sfr = &MODULE_STM1;
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Ifx_STM *stm_sfr = &MODULE_STM1;
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stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
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stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
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stm1_isr_flag = 1;
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stm1_isr_flag = 1;
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while(stm1_isr_flag);
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while(stm1_isr_flag);
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}break;
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case IfxStm_Index_none: break;
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}
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}
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}
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}
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}
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}
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@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
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//-------------------------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------------------------
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void system_delay_ms (uint32 time)
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void system_delay_ms (uint32 time)
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{
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{
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if(time > 40000)
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if(time > 40000)
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{
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{
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while(time > 40000)
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while(time > 40000)
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@@ -165,10 +167,10 @@ void system_delay_init(void)
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IfxStm_initCompare(&MODULE_STM0, &stmConfig);
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IfxStm_initCompare(&MODULE_STM0, &stmConfig);
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IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
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IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
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stmConfig.comparator = IfxStm_Comparator_1;
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stmConfig.comparator = IfxStm_Comparator_0;
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stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
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stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
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stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
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stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
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stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
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stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
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stmConfig.ticks = 1;
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stmConfig.ticks = 1;
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stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
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stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
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stmConfig.typeOfService = IfxSrc_Tos_cpu1;
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stmConfig.typeOfService = IfxSrc_Tos_cpu1;
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@@ -178,3 +180,4 @@ void system_delay_init(void)
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restoreInterrupts(interrupt_state);
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restoreInterrupts(interrupt_state);
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}
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}
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@@ -1,3 +1,5 @@
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V3.2.5
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||||||
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<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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V3.2.4
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V3.2.4
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||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
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<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
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<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
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<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
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@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
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IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
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IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
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IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
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stm1_isr_flag = 0;
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stm1_isr_flag = 0;
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}
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}
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//-------------------------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------------------------
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
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// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
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// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
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@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
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}
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}
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else
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else
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{
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{
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if(stm_index == IfxStm_Index_0)
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switch(stm_index)
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{
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case IfxStm_Index_0:
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{
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{
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Ifx_STM *stm_sfr = &MODULE_STM0;
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Ifx_STM *stm_sfr = &MODULE_STM0;
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stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
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stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
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stm0_isr_flag = 1;
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stm0_isr_flag = 1;
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while(stm0_isr_flag);
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while(stm0_isr_flag);
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}
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}break;
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else if(stm_index == IfxStm_Index_1)
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case IfxStm_Index_1:
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{
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{
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Ifx_STM *stm_sfr = &MODULE_STM1;
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Ifx_STM *stm_sfr = &MODULE_STM1;
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stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
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stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
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stm1_isr_flag = 1;
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stm1_isr_flag = 1;
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while(stm1_isr_flag);
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while(stm1_isr_flag);
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}break;
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case IfxStm_Index_none: break;
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}
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}
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}
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}
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}
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}
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@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
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//-------------------------------------------------------------------------------------------------------------------
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//-------------------------------------------------------------------------------------------------------------------
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void system_delay_ms (uint32 time)
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void system_delay_ms (uint32 time)
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{
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{
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if(time > 40000)
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if(time > 40000)
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{
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{
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while(time > 40000)
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while(time > 40000)
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@@ -165,10 +167,10 @@ void system_delay_init(void)
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IfxStm_initCompare(&MODULE_STM0, &stmConfig);
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IfxStm_initCompare(&MODULE_STM0, &stmConfig);
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IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
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IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
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stmConfig.comparator = IfxStm_Comparator_1;
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stmConfig.comparator = IfxStm_Comparator_0;
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stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
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stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
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stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
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stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
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stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
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stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
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stmConfig.ticks = 1;
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stmConfig.ticks = 1;
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stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
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stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
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stmConfig.typeOfService = IfxSrc_Tos_cpu1;
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stmConfig.typeOfService = IfxSrc_Tos_cpu1;
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@@ -178,3 +180,4 @@ void system_delay_init(void)
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restoreInterrupts(interrupt_state);
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restoreInterrupts(interrupt_state);
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}
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}
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@@ -1,3 +1,5 @@
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V3.2.5
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||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
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IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
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||||||
{
|
{
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||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
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IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
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stm1_isr_flag = 0;
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stm1_isr_flag = 0;
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||||||
}
|
}
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||||||
|
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||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
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||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
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||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
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|||||||
}
|
}
|
||||||
else
|
else
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||||||
{
|
{
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||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
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||||||
|
{
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||||||
|
case IfxStm_Index_0:
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||||||
{
|
{
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||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
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||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
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||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
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||||||
}
|
}break;
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||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
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||||||
{
|
{
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||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.5
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.4
|
V3.2.4
|
||||||
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
<20>Ż<EFBFBD><C5BB><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>Ϊ<EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>ر<EFBFBD><D8B1><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>Ϊ<EFBFBD><CEAA>ͨ<EFBFBD><CDA8>ʱ
|
||||||
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
<20>Ż<EFBFBD>ips114<31><34>Ļ<EFBFBD>ij<EFBFBD>ʼ<EFBFBD><CABC>ʱ<EFBFBD>䣬<EFBFBD>Ƴ<EFBFBD><C6B3><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD>ʱ
|
||||||
|
|||||||
@@ -57,10 +57,9 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_1);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
stm1_isr_flag = 0;
|
stm1_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> system<65><6D>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
|
||||||
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> time <20><>ʱһ<CAB1>ֵ<EFBFBD>ʱ<EFBFBD>䣨<EFBFBD><E4A3A8>λΪ<CEBB><CEAA><EFBFBD>룬<EFBFBD><EBA3AC><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-20000000<30><30>
|
||||||
@@ -79,19 +78,23 @@ void system_delay_10ns (uint32 time)
|
|||||||
}
|
}
|
||||||
else
|
else
|
||||||
{
|
{
|
||||||
if(stm_index == IfxStm_Index_0)
|
switch(stm_index)
|
||||||
|
{
|
||||||
|
case IfxStm_Index_0:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM0;
|
Ifx_STM *stm_sfr = &MODULE_STM0;
|
||||||
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm0_isr_flag = 1;
|
stm0_isr_flag = 1;
|
||||||
while(stm0_isr_flag);
|
while(stm0_isr_flag);
|
||||||
}
|
}break;
|
||||||
else if(stm_index == IfxStm_Index_1)
|
case IfxStm_Index_1:
|
||||||
{
|
{
|
||||||
Ifx_STM *stm_sfr = &MODULE_STM1;
|
Ifx_STM *stm_sfr = &MODULE_STM1;
|
||||||
stm_sfr->CMP[1].U = stm_sfr->TIM0.U + time;
|
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
|
||||||
stm1_isr_flag = 1;
|
stm1_isr_flag = 1;
|
||||||
while(stm1_isr_flag);
|
while(stm1_isr_flag);
|
||||||
|
}break;
|
||||||
|
case IfxStm_Index_none: break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
@@ -128,7 +131,6 @@ void system_delay_us (uint32 time)
|
|||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
void system_delay_ms (uint32 time)
|
void system_delay_ms (uint32 time)
|
||||||
{
|
{
|
||||||
|
|
||||||
if(time > 40000)
|
if(time > 40000)
|
||||||
{
|
{
|
||||||
while(time > 40000)
|
while(time > 40000)
|
||||||
@@ -165,10 +167,10 @@ void system_delay_init(void)
|
|||||||
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
IfxStm_initCompare(&MODULE_STM0, &stmConfig);
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM0, IfxStm_Comparator_0);
|
||||||
|
|
||||||
stmConfig.comparator = IfxStm_Comparator_1;
|
stmConfig.comparator = IfxStm_Comparator_0;
|
||||||
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
stmConfig.compareOffset = IfxStm_ComparatorOffset_0;
|
||||||
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
stmConfig.compareSize = IfxStm_ComparatorSize_32Bits;
|
||||||
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir1;
|
stmConfig.comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0;
|
||||||
stmConfig.ticks = 1;
|
stmConfig.ticks = 1;
|
||||||
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
stmConfig.triggerPriority = IFX_INTPRIO_STM1_SR0;
|
||||||
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
stmConfig.typeOfService = IfxSrc_Tos_cpu1;
|
||||||
@@ -178,3 +180,4 @@ void system_delay_init(void)
|
|||||||
|
|
||||||
restoreInterrupts(interrupt_state);
|
restoreInterrupts(interrupt_state);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -233,14 +233,6 @@ IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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Reference in New Issue
Block a user