mirror of
https://gitee.com/seekfree/TC264_Library.git
synced 2026-06-04 03:32:56 +00:00
优化串口中断函数
This commit is contained in:
@@ -24,7 +24,7 @@
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* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
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* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
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* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
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* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
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* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
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* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
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* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
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* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
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*
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*
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@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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pit_clear_flag(CCU60_CH0);
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pit_clear_flag(CCU60_CH0);
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}
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}
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@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
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// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
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// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
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// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
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IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
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IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrTransmit(&uart0_handle);
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}
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}
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IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
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IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrReceive(&uart0_handle);
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#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
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debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
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#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
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#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
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}
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}
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IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrError(&uart0_handle);
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}
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// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
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// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
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IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
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IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrTransmit(&uart1_handle);
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@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
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IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
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IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrReceive(&uart1_handle);
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camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
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camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
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}
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}
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IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrError(&uart1_handle);
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}
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// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
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// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
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IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
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IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrTransmit(&uart2_handle);
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}
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IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
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}
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// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
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IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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}
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IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
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}
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IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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}
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}
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IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
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// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
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IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrReceive(&uart2_handle);
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IfxAsclin_Asc_isrError(&uart3_handle);
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wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
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}
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IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrError(&uart3_handle);
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}
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}
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IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
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IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrError(&uart2_handle);
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IfxAsclin_Asc_isrError(&uart2_handle);
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}
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IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrTransmit(&uart3_handle);
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}
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IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrReceive(&uart3_handle);
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gps_uart_callback();
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}
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}
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IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
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IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrError(&uart3_handle);
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IfxAsclin_Asc_isrError(&uart3_handle);
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}
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}
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// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
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@@ -134,7 +134,6 @@ void uart_rx_interrupt_handler (void)
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IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
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IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
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{
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{
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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IfxAsclin_Asc_isrReceive(&uart0_handle);
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uart_rx_interrupt_handler(); // <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD>
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uart_rx_interrupt_handler(); // <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD>
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}
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}
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@@ -24,7 +24,7 @@
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* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
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* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
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* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
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* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
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* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
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* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
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*
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@@ -39,16 +39,14 @@
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// <20><><EFBFBD><EFBFBD>TCϵ<43><CFB5>Ĭ<EFBFBD><C4AC><EFBFBD>Dz<EFBFBD>֧<EFBFBD><D6A7><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD>ģ<D7B5>ϣ<EFBFBD><CFA3>֧<EFBFBD><D6A7><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʹ<EFBFBD><CAB9> interrupt_global_enable(0); <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
// <20><><EFBFBD><EFBFBD>TCϵ<43><CFB5>Ĭ<EFBFBD><C4AC><EFBFBD>Dz<EFBFBD>֧<EFBFBD><D6A7><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD>ģ<D7B5>ϣ<EFBFBD><CFA3>֧<EFBFBD><D6A7><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʹ<EFBFBD><CAB9> interrupt_global_enable(0); <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
// <20><EFBFBD>˵ʵ<CBB5><CAB5><EFBFBD>Ͻ<EFBFBD><CFBD><EFBFBD><EFBFBD>жϺ<D0B6>TCϵ<43>е<EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> interrupt_global_disable(); <20><><EFBFBD>ܾ<EFBFBD><DCBE><EFBFBD>Ӧ<EFBFBD>κε<CEBA><CEB5>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD> interrupt_global_enable(0); <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6><CFB5><EFBFBD>Ӧ<EFBFBD><D3A6>
|
// <20><EFBFBD>˵ʵ<CBB5><CAB5><EFBFBD>Ͻ<EFBFBD><CFBD><EFBFBD><EFBFBD>жϺ<D0B6>TCϵ<43>е<EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> interrupt_global_disable(); <20><><EFBFBD>ܾ<EFBFBD><DCBE><EFBFBD>Ӧ<EFBFBD>κε<CEBA><CEB5>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD> interrupt_global_enable(0); <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6><CFB5><EFBFBD>Ӧ<EFBFBD><D3A6>
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>TCϵ<43><CFB5>Ĭ<EFBFBD><C4AC><EFBFBD>Dz<EFBFBD>֧<EFBFBD><D6A7><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD>ģ<D7B5>ϣ<EFBFBD><CFA3>֧<EFBFBD><D6A7><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD>ж<EFBFBD><D0B6><EFBFBD>ʹ<EFBFBD><CAB9> interrupt_global_enable(0); <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
// <20><EFBFBD>˵ʵ<CBB5><CAB5><EFBFBD>Ͻ<EFBFBD><CFBD><EFBFBD><EFBFBD>жϺ<D0B6>TCϵ<43>е<EFBFBD>Ӳ<EFBFBD><D3B2><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> interrupt_global_disable(); <20><><EFBFBD>ܾ<EFBFBD><DCBE><EFBFBD>Ӧ<EFBFBD>κε<CEBA><CEB5>жϣ<D0B6><CFA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD>Լ<EFBFBD><D4BC>ֶ<EFBFBD><D6B6><EFBFBD><EFBFBD><EFBFBD> interrupt_global_enable(0); <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6><CFB5><EFBFBD>Ӧ<EFBFBD><D3A6>
|
|
||||||
|
|
||||||
// **************************** PIT<49>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** PIT<49>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -169,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
//IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
//IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
//{
|
//{
|
||||||
// interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
// interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
// IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
//
|
//
|
||||||
//#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
//#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
// debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
// debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
//#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
//#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
//
|
|
||||||
//}
|
//}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -208,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
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|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
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|
||||||
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|
||||||
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|
||||||
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|
||||||
}
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|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
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|
||||||
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|
||||||
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|
||||||
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|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
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|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
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IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
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|
||||||
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|
||||||
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|
||||||
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|
||||||
|
|
||||||
}
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|
||||||
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|
||||||
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|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
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|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -46,6 +46,7 @@
|
|||||||
// pit_clear_flag(CCU60_CH0);
|
// pit_clear_flag(CCU60_CH0);
|
||||||
//
|
//
|
||||||
//
|
//
|
||||||
|
//
|
||||||
//}
|
//}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -46,6 +46,7 @@
|
|||||||
// pit_clear_flag(CCU60_CH0);
|
// pit_clear_flag(CCU60_CH0);
|
||||||
//
|
//
|
||||||
//
|
//
|
||||||
|
//
|
||||||
//}
|
//}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -46,6 +46,7 @@
|
|||||||
// pit_clear_flag(CCU60_CH0);
|
// pit_clear_flag(CCU60_CH0);
|
||||||
//
|
//
|
||||||
//
|
//
|
||||||
|
//
|
||||||
//}
|
//}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -24,7 +24,7 @@
|
|||||||
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> isr
|
||||||
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD><EFBFBD>˾
|
||||||
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
* <20>汾<EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.8.0
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.9.4
|
||||||
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
|
||||||
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
|
||||||
*
|
*
|
||||||
@@ -45,7 +45,8 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
|
|||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
pit_clear_flag(CCU60_CH0);
|
pit_clear_flag(CCU60_CH0);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
@@ -166,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -205,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
@@ -167,37 +167,28 @@ IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
|
|||||||
|
|
||||||
|
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
||||||
|
// <20><><EFBFBD><EFBFBD>0Ĭ<30><C4AC><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart0_handle);
|
|
||||||
|
|
||||||
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
#if DEBUG_UART_USE_INTERRUPT // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> debug <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
debug_interrupr_handler(); // <20><><EFBFBD><EFBFBD> debug <20><><EFBFBD>ڽ<EFBFBD><DABD>մ<EFBFBD><D5B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ݻᱻ debug <20><><EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ȡ
|
||||||
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
#endif // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><DEB8><EFBFBD> DEBUG_UART_INDEX <20><><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD>ж<EFBFBD>ȥ
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart0_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
// <20><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
|
||||||
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -206,74 +197,70 @@ IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
|
|||||||
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart1_handle);
|
|
||||||
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
camera_uart_handler(); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrError(&uart1_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
// <20><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
|
||||||
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrTransmit(&uart2_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
// <20><><EFBFBD><EFBFBD>3Ĭ<33><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD>GPS<50><53>λģ<CEBB><C4A3>
|
||||||
|
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
gps_uart_callback(); // GPS<50><53><EFBFBD>ڻص<DABB><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
}
|
||||||
|
IFX_INTERRUPT(uart4_rx_isr, 0, UART3_RX_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
|
|
||||||
|
// <20><><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>
|
||||||
|
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrReceive(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
wireless_module_uart_handler(); // <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>
|
}
|
||||||
|
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
|
||||||
|
{
|
||||||
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart2_handle);
|
IfxAsclin_Asc_isrError(&uart2_handle);
|
||||||
|
|
||||||
}
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrTransmit(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
|
||||||
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
|
|
||||||
{
|
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
|
||||||
IfxAsclin_Asc_isrReceive(&uart3_handle);
|
|
||||||
|
|
||||||
|
|
||||||
gps_uart_callback();
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxAsclin_Asc_isrError(&uart3_handle);
|
IfxAsclin_Asc_isrError(&uart3_handle);
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
}
|
}
|
||||||
// **************************** <20><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ****************************
|
|
||||||
|
|||||||
Reference in New Issue
Block a user