优化所有SPI通信屏幕(OLED除外)的通信方式,显示速率将提升一倍左右
        修改串口的默认通信方式
This commit is contained in:
SEEKFREE_BUDING
2023-10-08 17:16:00 +08:00
parent e18d49ffa2
commit 8942c85ae8
242 changed files with 12214 additions and 8222 deletions

View File

@@ -31,6 +31,8 @@
* <20>޸ļ<DEB8>¼
* <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><>ע
* 2022-09-15 pudding first version
* 2023-09-27 pudding <20>޸Ĵ<DEB8><C4B4>ڷ<EFBFBD><DAB7>ͺͽ<CDBA><CDBD>յ<EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD>߼<EFBFBD><DFBC><EFBFBD><EFBFBD><EFBFBD>ֱ<EFBFBD>Ӵӵײ<D3B5><D7B2><EFBFBD>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8><EFBFBD>жϴ<D0B6><CFB4><EFBFBD>
* 2023-10-07 pudding <20><><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
********************************************************************************************************************/
#include "IFXPORT.h"
@@ -40,6 +42,7 @@
#include "SysSe/Bsp/Bsp.h"
#include "isr_config.h"
#include "zf_common_debug.h"
#include "zf_common_function.h"
#include "zf_driver_uart.h"
@@ -54,18 +57,14 @@ static IfxAsclin_Asc_Config uart_config;
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڻ<EFBFBD><DABB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
static uint8 uart0_tx_buffer[UART0_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
static uint8 uart0_rx_buffer[UART0_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
static uint8 uart1_tx_buffer[UART1_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
static uint8 uart1_rx_buffer[UART1_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
static uint8 uart2_tx_buffer[UART2_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
static uint8 uart2_rx_buffer[UART2_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
static uint8 uart3_tx_buffer[UART3_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
static uint8 uart3_rx_buffer[UART3_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
static uint8 uart0_tx_buffer[1 + sizeof(Ifx_Fifo) + 8];
static uint8 uart0_rx_buffer[1 + sizeof(Ifx_Fifo) + 8];
static uint8 uart1_tx_buffer[1 + sizeof(Ifx_Fifo) + 8];
static uint8 uart1_rx_buffer[1 + sizeof(Ifx_Fifo) + 8];
static uint8 uart2_tx_buffer[1 + sizeof(Ifx_Fifo) + 8];
static uint8 uart2_rx_buffer[1 + sizeof(Ifx_Fifo) + 8];
static uint8 uart3_tx_buffer[1 + sizeof(Ifx_Fifo) + 8];
static uint8 uart3_rx_buffer[1 + sizeof(Ifx_Fifo) + 8];
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>
@@ -125,29 +124,29 @@ void uart_set_buffer (uart_index_enum uartn)
{
uart_config.txBuffer = &uart0_tx_buffer;
uart_config.rxBuffer = &uart0_rx_buffer;
uart_config.txBufferSize = UART0_TX_BUFFER_SIZE;
uart_config.rxBufferSize = UART0_RX_BUFFER_SIZE;
uart_config.txBufferSize = 1;
uart_config.rxBufferSize = 1;
}break;
case UART_1:
{
uart_config.txBuffer = &uart1_tx_buffer;
uart_config.rxBuffer = &uart1_rx_buffer;
uart_config.txBufferSize = UART1_TX_BUFFER_SIZE;
uart_config.rxBufferSize = UART1_RX_BUFFER_SIZE;
uart_config.txBufferSize = 1;
uart_config.rxBufferSize = 1;
}break;
case UART_2:
{
uart_config.txBuffer = &uart2_tx_buffer;
uart_config.rxBuffer = &uart2_rx_buffer;
uart_config.txBufferSize = UART2_TX_BUFFER_SIZE;
uart_config.rxBufferSize = UART2_RX_BUFFER_SIZE;
uart_config.txBufferSize = 1;
uart_config.rxBufferSize = 1;
}break;
case UART_3:
{
uart_config.txBuffer = &uart3_tx_buffer;
uart_config.rxBuffer = &uart3_rx_buffer;
uart_config.txBufferSize = UART3_TX_BUFFER_SIZE;
uart_config.rxBufferSize = UART3_RX_BUFFER_SIZE;
uart_config.txBufferSize = 1;
uart_config.rxBufferSize = 1;
}break;
default: IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
}
@@ -251,23 +250,10 @@ void uart_mux (uart_index_enum uartn, uart_tx_pin_enum tx_pin, uart_rx_pin_enum
else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
}break;
default:break;
}
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڵȴ<DAB5><C8B4><EFBFBD><EFBFBD><EFBFBD>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uart_n <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> zf_driver_uart.h <20><> uart_index_enum ö<><C3B6><EFBFBD><EFBFBD><E5B6A8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> dat <20><>Ҫ<EFBFBD><D2AA><EFBFBD>͵<EFBFBD><CDB5>ֽ<EFBFBD>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> uart_write_byte_wait(UART_1, 0xA5); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD>ķ<EFBFBD><C4B7>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4>0xA5<41><35><EFBFBD><EFBFBD><EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
// <20><>ע<EFBFBD><D7A2>Ϣ
//-------------------------------------------------------------------------------------------------------------------
void uart_write_byte_wait (uart_index_enum uart_n, const uint8 dat)
{
Ifx_SizeT count = 1;
(void)IfxAsclin_Asc_write(uart_get_handle(uart_n), &dat, &count, TIME_INFINITE);
while(TRUE == uart_get_handle(uart_n)->txInProgress);
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD>д<EFBFBD><D0B4>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uart_n <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> zf_driver_uart.h <20><> uart_index_enum ö<><C3B6><EFBFBD><EFBFBD><E5B6A8>
@@ -278,10 +264,12 @@ void uart_write_byte_wait (uart_index_enum uart_n, const uint8 dat)
//-------------------------------------------------------------------------------------------------------------------
void uart_write_byte (uart_index_enum uart_n, const uint8 dat)
{
Ifx_SizeT count = 1;
(void)IfxAsclin_Asc_write(uart_get_handle(uart_n), &dat, &count, TIME_INFINITE);
}
IfxAsclin_Asc* uart_handle;
uart_handle = uart_get_handle(uart_n);
while(IfxAsclin_getTxFifoFillLevel(uart_handle->asclin) != 0);
IfxAsclin_write8(uart_handle->asclin, &dat, 1);
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڷ<EFBFBD><DAB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
@@ -329,8 +317,14 @@ void uart_write_string (uart_index_enum uart_n, const char *str)
//-------------------------------------------------------------------------------------------------------------------
uint8 uart_read_byte (uart_index_enum uart_n)
{
while(!IfxAsclin_Asc_getReadCount(uart_get_handle(uart_n)));
return (uint8)IfxAsclin_Asc_blockingRead(uart_get_handle(uart_n));
uint8 return_num = 0;
IfxAsclin_Asc* uart_handle;
uart_handle = uart_get_handle(uart_n);
while(IfxAsclin_getRxFifoFillLevel(uart_handle->asclin) == 0);
IfxAsclin_read8(uart_handle->asclin, &return_num, 1);
return return_num;
}
@@ -345,9 +339,11 @@ uint8 uart_read_byte (uart_index_enum uart_n)
uint8 uart_query_byte (uart_index_enum uart_n, uint8 *dat)
{
uint8 return_num = 0;
if(IfxAsclin_Asc_getReadCount(uart_get_handle(uart_n)) >0)
IfxAsclin_Asc* uart_handle;
uart_handle = uart_get_handle(uart_n);
if(IfxAsclin_getRxFifoFillLevel(uart_handle->asclin) > 0)
{
*dat = IfxAsclin_Asc_blockingRead(uart_get_handle(uart_n));
IfxAsclin_read8(uart_handle->asclin, dat, 1);
return_num = 1;
}
return return_num;
@@ -378,7 +374,6 @@ void uart_tx_interrupt (uart_index_enum uart_n, uint32 status)
{
IfxSrc_disable(src);
}
IfxAsclin_enableTxFifoOutlet(asclinSFR, (boolean)status);
}
@@ -407,9 +402,9 @@ void uart_rx_interrupt (uart_index_enum uart_n, uint32 status)
{
IfxSrc_disable(src);
}
IfxAsclin_enableRxFifoInlet(asclinSFR, (boolean)status);
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> uartn <20><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3><EFBFBD><EFBFBD>(UART_0,UART_1,UART_2,UART_3)
@@ -422,23 +417,22 @@ void uart_rx_interrupt (uart_index_enum uart_n, uint32 status)
//-------------------------------------------------------------------------------------------------------------------
void uart_init (uart_index_enum uart_n, uint32 baud, uart_tx_pin_enum tx_pin, uart_rx_pin_enum rx_pin)
{
boolean interrupt_state = disableInterrupts();
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uart_n);
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); // <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); // <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
uart_set_buffer(uart_n); // <20><><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
uart_set_buffer(uart_n); // <20><><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD>
uart_set_interrupt_priority(uart_n); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>
uart_set_interrupt_priority(uart_n); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ȼ<EFBFBD>
uart_config.clockSource = IfxAsclin_ClockSource_ascFastClock; // ʹ<>ø<EFBFBD><C3B8><EFBFBD>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>6.25M
uart_config.baudrate.prescaler = 4;
uart_config.baudrate.baudrate = (float32)baud;
uart_config.baudrate.oversampling = IfxAsclin_OversamplingFactor_8;
IfxAsclin_Asc_Pins pins; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
IfxAsclin_Asc_Pins pins; // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
pins.cts = NULL;
pins.rts = NULL;
uart_mux(uart_n, tx_pin, rx_pin, (uint32 *)&pins.tx, (uint32 *)&pins.rx);
@@ -448,6 +442,7 @@ void uart_init (uart_index_enum uart_n, uint32 baud, uart_tx_pin_enum tx_pin, ua
uart_config.pins = &pins;
IfxAsclin_Asc_initModule(uart_get_handle(uart_n), &uart_config);
uart_rx_interrupt(uart_n, 0);
uart_tx_interrupt(uart_n, 0);
restoreInterrupts(interrupt_state);
}

View File

@@ -31,6 +31,7 @@
* <20>޸ļ<DEB8>¼
* <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><>ע
* 2022-09-15 pudding first version
* 2023-10-07 pudding <20><><EFBFBD><EFBFBD>ͳһ<CDB3>ص<EFBFBD><D8B5><EFBFBD><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
********************************************************************************************************************/
#ifndef _zf_driver_uart_h_
@@ -39,19 +40,6 @@
#include "ifxAsclin_Asc.h"
#include "zf_common_typedef.h"
#define UART0_TX_BUFFER_SIZE 256 // <20><><EFBFBD><EFBFBD><E5B4AE>0<EFBFBD><30><EFBFBD>ͻ<EFBFBD><CDBB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С
#define UART0_RX_BUFFER_SIZE 16 // <20><><EFBFBD><EFBFBD><E5B4AE>0<EFBFBD><30><EFBFBD>ջ<EFBFBD><D5BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>С
#define UART1_TX_BUFFER_SIZE 256
#define UART1_RX_BUFFER_SIZE 16
#define UART2_TX_BUFFER_SIZE 256
#define UART2_RX_BUFFER_SIZE 16
#define UART3_TX_BUFFER_SIZE 256
#define UART3_RX_BUFFER_SIZE 16
typedef enum // ö<>ٴ<EFBFBD><D9B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><>ö<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><E5B2BB><EFBFBD><EFBFBD><EFBFBD>û<EFBFBD><C3BB>޸<EFBFBD>
{
UART0_TX_P14_0, // <20><><EFBFBD><EFBFBD>0 <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
@@ -127,7 +115,6 @@ extern IfxAsclin_Asc uart2_handle;
extern IfxAsclin_Asc uart3_handle;
//====================================================<3D><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
void uart_write_byte_wait (uart_index_enum uart_n, const uint8 dat);
void uart_write_byte (uart_index_enum uartn, const uint8 dat);
void uart_write_buffer (uart_index_enum uartn, const uint8 *buff, uint32 len);
void uart_write_string (uart_index_enum uartn, const char *str);