+ * \endcode
+ *
+ * \subsection IfxLld_Ccu6_Timer_Variables Variables
+ *
+ * Declare the TIMER handle as global variable in your C code:
+ *
+ * \code
+ * // used globally
+ * static IfxCcu6_Timer timer;
+ * \endcode
+ *
+ * \subsection IfxLld_Ccu6_Timer_Interrupt Interrupt Handler Installation
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priority for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
+ *
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define IFX_INTPRIO_CCU6 1
+ * \endcode
+ *
+ * Add the interrupt service routine to your C code.
+ *
+ * \code
+ * IFX_INTERRUPT(ccu60ISR_Timer, 0, IFX_INTPRIO_CCU6)
+ * {
+ * //user code
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ *
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler(&ccu60ISR_Timer, IFX_INTPRIO_CCU6);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Ccu6_Timer_Init Module Initialisation
+ *
+ * The module initialisation can be done in the same function. Here an example:
+ *
+ * \code
+ * // create configuration
+ * IfxCcu6_Timer_Config timerConfig;
+ * IfxCcu6_Timer_initModuleConfig(&timerConfig, &MODULE_CCU60);
+ *
+ * // configure the frequency of the timer in case of internal start
+ * // this frequency will be set for the timer block selected later
+ * timerConfig.base.frequency = 400000;
+ *
+ * // configure the period of the timer
+ * timerConfig.base.period = 100;
+ *
+ * // configure the waiting time in case of delayed T13 start in sync with T12
+ * timerConfig.base.waitingTime = 0;
+ *
+ * // select the timer that needs to be started
+ * timerConfig.timer = IfxCcu6_TimerId_t12;
+ *
+ * // select the synchronous operation if both timers need to be start at the same time
+ * // previous selection of timer block can be ignored in this mode
+ * timerConfig.synchronousOperation = TRUE;
+ *
+ * // configure the clock for internal mode
+ * timerConfig.clock.t12ExtClockEnabled = FALSE;
+ * timerConfig.clock.t12ExtClockInput = NULL_PTR;
+ * timerConfig.clock.t12countingInputMode = IfxCcu6_CountingInputMode_internal;
+ *
+ * // configure the selcted timer block
+ * timerConfig.timer12.countMode = IfxCcu6_T12CountMode_edgeAligned;
+ * timerConfig.timer12.counterValue = 0;
+ *
+ * // configure the interrupts
+ * timerConfig.interrupt1.interruptSource = IfxCcu6_InterruptSource_t12PeriodMatch;
+ * timerConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_2;
+ * timerConfig.interrupt1.priority = IFX_INTRPRIO_CCU6;
+ * timerConfig.interrupt1.typeOfService = IfxSrc_Tos_cpu0;
+ *
+ * // configure input and output triggers
+ * timerConfig.trigger.t12ExtInputTrigger = IfxCcu60_T12HRB_P00_7_IN;
+ * timerConfig.trigger.t13ExtInputTrigger = NULL_PTR;
+ * timerConfig.trigger.extInputTriggerMode = IfxCcu6_ExternalTriggerMode_risingEdge;
+ * timerConfig.trigger.t13InSyncWithT12 = FALSE;
+ *
+ * // initialize the module
+ * IfxCcu6_Timer_initModule(&timer, &timerConfig);
+ * \endcode
+ *
+ *
+ * The Timer is ready for use now!
+ *
+ *
+ * \section IfxLld_Ccu6_Timer_Control Control
+ *
+ *
+ * The TIMER driver provides simple to use timer Control functions
+ *
+ * This means: In addition to start and stop a single timer, you can start and stop both the timer blocks at the same time
+ * you can also run the timer in single shot mode and finally you an manually make the timer count each step
+ *
+ * Start the timer
+ *
+ * \code
+ * IfxCcu6_Timer_start(&timer);
+ * \endcode
+ *
+ * Stop the timer
+ *
+ * \code
+ * IfxCcu6_Timer_stop(&timer);
+ * \endcode
+ *
+ * Start both the timers synchronously, when the synchronousOperation mode is selected in the configuration
+ *
+ * \code
+ * IfxCcu6_Timer_synchronousStart(&timer);
+ * \endcode
+ *
+ * Stop both the timers synchronously, when the synchronousOperation mode is selected in the configuration
+ *
+ * \code
+ * IfxCcu6_Timer_synchronousStop(&timer);
+ * \endcode
+ *
+ * Start the selected timer in single shot mode
+ *
+ * \code
+ * IfxCcu6_Timer_startSingleShotMode(&timer);
+ * \endcode
+ *
+ * Make the timer count each step manually
+ *
+ * \code
+ * uint8 i;
+ * for (i=0; i<50; i++)
+ * {
+ * IfxCcu6_Timer_countOneStep(&timer);
+ * }
+ * \endcode
+ *
+ * \defgroup IfxLld_Ccu6_Timer TIMER Interface driver
+ * \ingroup IfxLld_Ccu6
+ * \defgroup IfxLld_Ccu6_Timer_DataStructures Data Structures
+ * \ingroup IfxLld_Ccu6_Timer
+ * \defgroup IfxLld_Ccu6_Timer_Module_Initialize_Functions Module Initialize Functions
+ * \ingroup IfxLld_Ccu6_Timer
+ * \defgroup IfxLld_Ccu6_Timer_Timer_Control_Functions Timer Control Functions
+ * \ingroup IfxLld_Ccu6_Timer
+ */
+
+#ifndef IFXCCU6_TIMER_H
+#define IFXCCU6_TIMER_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Ccu6/Std/IfxCcu6.h"
+#include "If/Ccu6If/Timer.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Ccu6_Timer_DataStructures
+ * \{ */
+/** \brief Structure for clock configuration
+ */
+typedef struct
+{
+ boolean t12ExtClockEnabled; /**< \brief Timer 12 external clock enable / disable selection */
+ IfxCcu6_T12hr_In *t12ExtClockInput; /**< \brief External input signal selection for timer 12 */
+ IfxCcu6_CountingInputMode t12countingInputMode; /**< \brief Input event leading to a counting action of the timer T12 */
+ boolean t13ExtClockEnabled; /**< \brief Timer 13 external clock enable / disable selection */
+ IfxCcu6_T13hr_In *t13ExtClockInput; /**< \brief External input signal selection for timer 13 */
+ IfxCcu6_CountingInputMode t13countingInputMode; /**< \brief Input event leading to a counting action of the timer T13 */
+} IfxCcu6_Timer_Clock;
+
+/** \brief Structure for interrupt configuration
+ */
+typedef struct
+{
+ IfxCcu6_InterruptSource source; /**< \brief Interrupt source selection */
+ IfxCcu6_ServiceRequest serviceRequest; /**< \brief Selection of service request outputs */
+ uint16 priority; /**< \brief Interrupt priority */
+ IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
+} IfxCcu6_Timer_InterruptConfig;
+
+/** \brief Structure for Timer 12
+ */
+typedef struct
+{
+ IfxCcu6_T12CountMode countMode; /**< \brief Operating mode of Timer 12 */
+ uint16 counterValue; /**< \brief 16-bit counter value of Timer12 */
+} IfxCcu6_Timer_Timer12;
+
+/** \brief Structure for Timer 13
+ */
+typedef struct
+{
+ uint16 counterValue; /**< \brief 16-bit counter value of Timer13 */
+ IfxCcu6_T13TriggerEvent t12SyncEvent; /**< \brief T12 sync trigger event to start T13 */
+ IfxCcu6_T13TriggerDirection t12SyncDirection; /**< \brief Additional information to control trigger event selection */
+} IfxCcu6_Timer_Timer13;
+
+/** \brief Configuration structure for external triggers
+ */
+typedef struct
+{
+ IfxCcu6_T12hr_In *t12ExtInputTrigger; /**< \brief External input signal selection for timer 12 */
+ IfxCcu6_T13hr_In *t13ExtInputTrigger; /**< \brief External input signal selection for timer 13 */
+ IfxCcu6_ExternalTriggerMode extInputTriggerMode; /**< \brief Event of signal T1xHR that can set the run bit T1xR by HW */
+ boolean t13InSyncWithT12; /**< \brief Selection of Timer 13 start in sync with T12 */
+} IfxCcu6_Timer_TriggerConfig;
+
+/** \} */
+
+/** \brief Structure for CCU6 output pin configuration
+ */
+typedef struct
+{
+ IFX_CONST IfxCcu6_T12hr_In *t12hr; /**< \brief T12HR input signal */
+ IFX_CONST IfxCcu6_T13hr_In *t13hr; /**< \brief T13HR input signal */
+ IfxPort_InputMode t1xhrInputMode; /**< \brief The T1xHR pin input mode which should be configured */
+} IfxCcu6_Timer_Pins;
+
+/** \addtogroup IfxLld_Ccu6_Timer_DataStructures
+ * \{ */
+/** \brief Module handle
+ */
+typedef struct
+{
+ Timer base; /**< \brief Base Timer object */
+ Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
+ IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
+ IfxCcu6_Timer_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
+} IfxCcu6_Timer;
+
+/** \brief Configuration structure of the module
+ */
+typedef struct
+{
+ Timer_Config base; /**< \brief Base configuration */
+ Ifx_CCU6 *ccu6; /**< \brief Pointer to the base of CCU6 registers */
+ IfxCcu6_TimerId timer; /**< \brief Timer number (T12 / T13) */
+ boolean synchronousOperation; /**< \brief Synchronous operation selection (starting / stopping both the timers at the same time) */
+ IfxCcu6_Timer_Clock clock; /**< \brief Structure for clock configuration */
+ IfxCcu6_Timer_Timer12 timer12; /**< \brief Structure for Timer 12 */
+ IfxCcu6_Timer_Timer13 timer13; /**< \brief Structure for Timer 13 */
+ IfxCcu6_Timer_InterruptConfig interrupt1; /**< \brief Structure for first interrupt configuration */
+ IfxCcu6_Timer_InterruptConfig interrupt2; /**< \brief Structure for second interrupt configuration */
+ IfxCcu6_Timer_InterruptConfig interrupt3; /**< \brief Structure for third interrupt configuration */
+ IfxCcu6_Timer_InterruptConfig interrupt4; /**< \brief Structure for fourth interrupt configuration */
+ IfxCcu6_Timer_TriggerConfig trigger; /**< \brief Structure for trigger configuration */
+ IfxCcu6_Timer_Pins *pins; /**< \brief Structure for CCU6 output pin configuration */
+} IfxCcu6_Timer_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Ccu6_Timer_Module_Initialize_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the module with default configuration
+ * \param timer Module handle
+ * \param config Configuration structure of the module
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
+ *
+ */
+IFX_EXTERN void IfxCcu6_Timer_initModule(IfxCcu6_Timer *timer, const IfxCcu6_Timer_Config *config);
+
+/** \brief Fills the config structure with default values
+ * \param config Configuration structure of the module
+ * \param ccu6 Pointer to the base of CCU6 registers
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
+ *
+ */
+IFX_EXTERN void IfxCcu6_Timer_initModuleConfig(IfxCcu6_Timer_Config *config, Ifx_CCU6 *ccu6);
+
+/** \} */
+
+/** \addtogroup IfxLld_Ccu6_Timer_Timer_Control_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Counts the timer one step
+ * \param timer Module handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
+ *
+ */
+IFX_EXTERN void IfxCcu6_Timer_countOneStep(IfxCcu6_Timer *timer);
+
+/** \brief Starts the timer
+ * \param timer Module handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
+ *
+ */
+IFX_EXTERN void IfxCcu6_Timer_start(IfxCcu6_Timer *timer);
+
+/** \brief Starts the single shot mode of the timer
+ * \param timer Module handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
+ *
+ */
+IFX_EXTERN void IfxCcu6_Timer_startSingleShotMode(IfxCcu6_Timer *timer);
+
+/** \brief Stops the timer
+ * \param timer Module handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
+ *
+ */
+IFX_EXTERN void IfxCcu6_Timer_stop(IfxCcu6_Timer *timer);
+
+/** \brief Starts both the timers together
+ * \param timer Module handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
+ *
+ */
+IFX_EXTERN void IfxCcu6_Timer_synchronousStart(IfxCcu6_Timer *timer);
+
+/** \brief Starts both the timers together
+ * \param timer Module handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Ccu6_Timer_Usage
+ *
+ */
+IFX_EXTERN void IfxCcu6_Timer_synchronousStop(IfxCcu6_Timer *timer);
+
+/** \} */
+
+#endif /* IFXCCU6_TIMER_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.c
new file mode 100644
index 0000000..1f96a90
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.c
@@ -0,0 +1,379 @@
+/**
+ * \file IfxCcu6_TimerWithTrigger.c
+ * \brief CCU6 TIMERWITHTRIGGER details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxCcu6_TimerWithTrigger.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "stddef.h"
+#include "string.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver)
+{
+ boolean event;
+ event = IfxCcu6_isT12OneNotification(driver->ccu6);
+
+ if (event)
+ {
+ IfxCcu6_clearT12OneNotification(driver->ccu6);
+ }
+ else
+ {}
+
+ return event;
+}
+
+
+boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver)
+{
+ boolean event;
+ event = IfxCcu6_isT13CompareNotification(driver->ccu6);
+
+ if (event)
+ {
+ IfxCcu6_clearT13CompareNotification(driver->ccu6);
+ }
+ else
+ {}
+
+ return event;
+}
+
+
+void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver)
+{
+ IfxCcu6_enableShadowTransfer(driver->ccu6, TRUE, TRUE);
+}
+
+
+void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver)
+{
+ IFX_UNUSED_PARAMETER(driver)
+}
+
+
+float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver)
+{
+ return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
+}
+
+
+float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver)
+{
+ return driver->base.clockFreq;
+}
+
+
+Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver)
+{
+ return driver->base.period;
+}
+
+
+volatile uint32 *IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver)
+{
+ return IfxCcu6_getT12TimerPointer(driver->ccu6);
+}
+
+
+float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver)
+{
+ return 1.0 / driver->base.clockFreq;
+}
+
+
+boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config)
+{
+ boolean result = TRUE;
+ IfxCcu6_TimerWithTrigger_Base *base = &driver->base;
+ Ifx_CCU6 *module;
+
+ driver->ccu6 = config->ccu6;
+ module = driver->ccu6;
+
+ base->triggerEnabled = config->base.trigger.enabled;
+
+ /** - Enable/initialise the CCU6 if it has not been enabled. See IfxCcu6_isModuleEnabled() */
+ if (IfxCcu6_isModuleEnabled(module) == FALSE)
+ {
+ IfxCcu6_enableModule(module);
+ }
+
+ /* Initialize the timer part */
+ IfxCcu6_setT12CountMode(module, (config->base.countDir == IfxStdIf_Timer_CountDir_upAndDown) ? IfxCcu6_T12CountMode_centerAligned : IfxCcu6_T12CountMode_edgeAligned);
+
+ driver->base.countDir = config->base.countDir;
+
+ uint16 prescaler;
+ float32 freqT12 = 0, periodT12;
+ float32 freqCC6 = (float32)IfxScuCcu_getSpbFrequency();
+
+ for (prescaler = 0; prescaler < 16; prescaler++)
+ {
+ freqT12 = freqCC6 / (1U << prescaler);
+ periodT12 = freqT12 / config->base.frequency;
+
+ if ((periodT12 <= 16386.0) && (periodT12 > config->base.minResolution))
+ {
+ break;
+ }
+ }
+
+ if (prescaler < 16)
+ {
+ Ifx_CCU6_TCTR0 tctr0;
+ tctr0.U = module->TCTR0.U;
+ tctr0.B.T12CLK = (prescaler & 0x7U);
+ tctr0.B.T12PRE = ((prescaler & 0x8U) != 0);
+ module->TCTR0.U = tctr0.U;
+ }
+ else
+ {
+ /** \retval IfxCcu6_Stat_wrongPwmFreq if the T12 prescaler can't fulfill the
+ * required frequency */
+ result = FALSE;
+ }
+
+ IfxCcu6_TimerWithTrigger_updateInputFrequency(driver);
+
+ if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
+ {
+ result = FALSE;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+ else
+ {}
+
+ IfxCcu6_TimerWithTrigger_setFrequency(driver, config->base.frequency);
+ /* Initialize the trigger part */
+
+ /** - The T13 is used to generate additional PWM for internal trigger purpose (e.g.
+ * ADC) or external trigger purpose (e.g. sensor synchronisation). */
+
+ if (base->triggerEnabled)
+ {
+ Ifx_CCU6_TCTR0 tctr0 = module->TCTR0;
+ module->TCTR0.B.T13CLK = tctr0.B.T12CLK;
+ module->TCTR0.B.T13PRE = tctr0.B.T12PRE;
+ IfxCcu6_setT13PeriodValue(module, (uint16)(base->period - 1));
+
+ module->MODCTR.B.T13MODEN = 0;
+ IfxCcu6_enableModulationOutput(module, IfxCcu6_TimerId_t13, IfxCcu6_ChannelOut_cout3);
+
+ IfxCcu6_setOutputPassiveLevel(module, IfxCcu6_ChannelOut_cout3, config->base.trigger.risingEdgeAtPeriod);
+
+ IfxCcu6_setSingleShotModeEnable(module, FALSE, TRUE);
+
+ IfxCcu6_setT13TriggerEventMode(module, IfxCcu6_T13TriggerEvent_onT12Zero);
+ IfxCcu6_setT13TriggerEventDirection(module, IfxCcu6_T13TriggerDirection_onT12CountingUp);
+
+ if (config->base.trigger.outputEnabled)
+ {
+ if (config->triggerOut != NULL_PTR)
+ {
+ /*Initialize the port */
+ IfxCcu6_initCout63Pin(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
+ }
+ else
+ {
+ result = FALSE;
+ }
+ }
+ else
+ {}
+
+ IfxCcu6_TimerWithTrigger_setTrigger(driver, config->base.trigger.triggerPoint);
+ }
+ else
+ {}
+
+ /* Interrupt configuration */
+ {
+ boolean timerHasIrq = config->base.isrPriority > 0;
+ boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
+
+ if (timerHasIrq || triggerHasIrq)
+ {
+ volatile Ifx_SRC_SRCR *src;
+
+ IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t12PeriodMatch);
+ IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t12OneMatch);
+ IfxCcu6_clearInterruptStatusFlag(module, IfxCcu6_InterruptSource_t13CompareMatch);
+
+ if (timerHasIrq)
+ {
+ if (config->base.countDir == IfxStdIf_Timer_CountDir_upAndDown)
+ {
+ IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t12OneMatch); /* full period */
+ }
+ else
+ {
+ IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t12PeriodMatch); /* half-period*/
+ }
+
+ module->INP.B.INPT12 = config->serviceReqNrPeriod;
+ src = IfxCcu6_getSrcAddress(module, config->serviceReqNrPeriod);
+ IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (triggerHasIrq)
+ {
+ IfxCcu6_enableInterrupt(module, IfxCcu6_InterruptSource_t13CompareMatch); /* trigger event */
+ module->INP.B.INPT13 = config->serviceReqNrTrigger;
+
+ src = IfxCcu6_getSrcAddress(module, config->serviceReqNrTrigger);
+ IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
+ IfxSrc_enable(src);
+ }
+ }
+ }
+
+ /* Transfer the shadow registers */
+ IfxCcu6_TimerWithTrigger_applyUpdate(driver);
+ return result;
+}
+
+
+void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6)
+{
+ IfxStdIf_Timer_initConfig(&config->base);
+ config->ccu6 = ccu6;
+ config->serviceReqNrPeriod = IfxCcu6_ServiceRequest_0;
+ config->serviceReqNrTrigger = IfxCcu6_ServiceRequest_1;
+ config->triggerOut = NULL_PTR;
+}
+
+
+void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver)
+{
+ IfxCcu6_startTimer(driver->ccu6, TRUE, FALSE);
+}
+
+
+boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency)
+{
+ Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
+
+ return IfxCcu6_TimerWithTrigger_setPeriod(driver, period);
+}
+
+
+boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period)
+{
+ driver->base.period = period;
+ IfxCcu6_setT12PeriodValue(driver->ccu6, (uint16)((driver->ccu6->TCTR0.B.CTM == 1) ?
+ ((period / 2) - 1) : (period - 1)));
+
+ return TRUE;
+}
+
+
+void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled)
+{
+ if (enabled)
+ {
+ IfxCcu6_enableSingleShotMode(driver->ccu6, IfxCcu6_TimerId_t12);
+ }
+ else
+ {
+ IfxCcu6_disableSingleShotMode(driver->ccu6, IfxCcu6_TimerId_t12);
+ }
+}
+
+
+void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint)
+{
+ driver->ccu6->CC63SR.U = triggerPoint;
+}
+
+
+boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver)
+{
+ /* Ensure the stdif is reset to zeros */
+ memset(stdif, 0, sizeof(IfxStdIf_Timer));
+
+ /* *INDENT-OFF* Note: this file was indented manually by the author. */
+ /* Set the API link */
+ stdif->driver = driver;
+ stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxCcu6_TimerWithTrigger_getFrequency;
+ stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxCcu6_TimerWithTrigger_getPeriod;
+ stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxCcu6_TimerWithTrigger_getResolution;
+ stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxCcu6_TimerWithTrigger_setFrequency;
+ stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxCcu6_TimerWithTrigger_updateInputFrequency;
+ stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxCcu6_TimerWithTrigger_applyUpdate;
+ stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxCcu6_TimerWithTrigger_disableUpdate;
+ stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxCcu6_TimerWithTrigger_getInputFrequency;
+ stdif->run =(IfxStdIf_Timer_Run )&IfxCcu6_TimerWithTrigger_run;
+ stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxCcu6_TimerWithTrigger_setPeriod;
+ stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxCcu6_TimerWithTrigger_setSingleMode;
+ stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxCcu6_TimerWithTrigger_setTrigger;
+ stdif->stop =(IfxStdIf_Timer_Stop )&IfxCcu6_TimerWithTrigger_stop;
+ stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq;
+ stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq;
+ /* *INDENT-ON* */
+
+ return TRUE;
+}
+
+
+void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver)
+{
+ IfxCcu6_stopTimer(driver->ccu6, TRUE, TRUE);
+}
+
+
+void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver)
+{
+ uint16 prescaler;
+ prescaler = driver->ccu6->TCTR0.B.T12CLK;
+
+ driver->base.clockFreq = IfxScuCcu_getSpbFrequency() / (1U << prescaler);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h
new file mode 100644
index 0000000..19fb076
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TimerWithTrigger/IfxCcu6_TimerWithTrigger.h
@@ -0,0 +1,299 @@
+/**
+ * \file IfxCcu6_TimerWithTrigger.h
+ * \brief CCU6 TIMERWITHTRIGGER details
+ * \ingroup IfxLld_Ccu6
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Ccu6_TimerWithTrigger_Usage How to use the CCU6 TimerWithTrigger Interface driver?
+ * \ingroup IfxLld_Ccu6_TimerWithTrigger
+ * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
+ * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
+ *
+ * \defgroup IfxLld_Ccu6_TimerWithTrigger TimerWithTrigger Interface driver
+ * \ingroup IfxLld_Ccu6
+ * \defgroup IfxLld_Ccu6_TimerWithTrigger_Data_Structures Data Structures
+ * \ingroup IfxLld_Ccu6_TimerWithTrigger
+ * \defgroup IfxLld_Ccu6_TimerWithTrigger_Timer_StdIf_Functions Timer StdIf Functions
+ * \ingroup IfxLld_Ccu6_TimerWithTrigger
+ * \defgroup IfxLld_Ccu6_TimerWithTrigger_Timer_Functions Timer Functions
+ * \ingroup IfxLld_Ccu6_TimerWithTrigger
+ */
+
+#ifndef IFXCCU6_TIMERWITHTRIGGER_H
+#define IFXCCU6_TIMERWITHTRIGGER_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_PinMap/IfxCcu6_PinMap.h"
+#include "Ccu6/Std/IfxCcu6.h"
+#include "StdIf/IfxStdIf_Timer.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Data_Structures
+ * \{ */
+/** \brief Structure for the timer base
+ */
+typedef struct
+{
+ Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
+ boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
+ float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
+ IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
+} IfxCcu6_TimerWithTrigger_Base;
+
+/** \} */
+
+/** \brief CCU6 Timer interface
+ */
+typedef struct
+{
+ IfxCcu6_TimerWithTrigger_Base base; /**< \brief Timer base structure */
+ Ifx_CCU6 *ccu6; /**< \brief CCU6 module used for the timer functionality */
+} IfxCcu6_TimerWithTrigger;
+
+/** \brief Configuration structure for T12 and T13 Timer
+ */
+typedef struct
+{
+ IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
+ Ifx_CCU6 *ccu6; /**< \brief CCU6 module used for the timer functionality */
+ IfxCcu6_Cout63_Out *triggerOut;
+ IfxCcu6_ServiceRequest serviceReqNrPeriod; /**< \brief Service request used for the period */
+ IfxCcu6_ServiceRequest serviceReqNrTrigger; /**< \brief Service request used for the Trigger */
+} IfxCcu6_TimerWithTrigger_Config;
+
+/** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Timer_StdIf_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the timer event
+ * \param driver CCU6 Timer interface Handle
+ * \return Timer event
+ *
+ * \see IfxStdIf_Timer_AckTimerIrq
+ *
+ */
+IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTimerIrq(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Returns the trigger event
+ * \param driver CCU6 Timer interface Handle
+ * \return Timer event
+ *
+ * \see IfxStdIf_Timer_AckTriggerIrq
+ *
+ */
+IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_acknowledgeTriggerIrq(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Enable the transfer of the shadow registers
+ * \param driver CCU6 Timer interface Handle
+ * \return None
+ *
+ * \see IfxStdIf_Timer_ApplyUpdate
+ *
+ */
+IFX_EXTERN void IfxCcu6_TimerWithTrigger_applyUpdate(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Disables the upadte\n
+ * This function is has an empty body as the updated is disabled automatically after the shadow transfer
+ * \param driver CCU6 Timer interface Handle
+ * \return None
+ *
+ * \see IfxStdIf_Timer_DisableUpdate
+ *
+ */
+IFX_EXTERN void IfxCcu6_TimerWithTrigger_disableUpdate(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Returns the frequency
+ * \param driver CCU6 Timer interface Handle
+ * \return Frequency
+ *
+ * \see IfxStdIf_Timer_GetFrequency
+ *
+ */
+IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getFrequency(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Returns the Input frequncy
+ * \param driver CCU6 Timer interface Handle
+ * \return Frequency
+ *
+ * \see IfxStdIf_Timer_GetInputFrequency
+ *
+ */
+IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getInputFrequency(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Returns the period of the timer
+ * \param driver CCU6 Timer interface Handle
+ * \return Period
+ *
+ * \see IfxStdIf_Timer_GetPeriod
+ *
+ */
+IFX_EXTERN Ifx_TimerValue IfxCcu6_TimerWithTrigger_getPeriod(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Returns the resolution
+ * \param driver CCU6 Timer interface Handle
+ * \return Resolution
+ *
+ * \see IfxStdIf_Timer_GetResolution
+ *
+ */
+IFX_EXTERN float32 IfxCcu6_TimerWithTrigger_getResolution(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Runs the timer
+ * \param driver CCU6 Timer interface Handle
+ * \return None
+ *
+ * \see IfxStdIf_Timer_Run
+ *
+ */
+IFX_EXTERN void IfxCcu6_TimerWithTrigger_run(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Sets the frequency
+ * \param driver CCU6 Timer interface Handle
+ * \param frequency Frequency
+ * \return TRUE on success else FALSE
+ *
+ * \see IfxStdIf_Timer_SetFrequency
+ *
+ */
+IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setFrequency(IfxCcu6_TimerWithTrigger *driver, float32 frequency);
+
+/** \brief Sets the period for the timer
+ * \param driver CCU6 Timer interface Handle
+ * \param period Period value
+ * \return TRUE on success else FALSE
+ *
+ * \see IfxStdIf_Timer_SetPeriod
+ *
+ */
+IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_setPeriod(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue period);
+
+/** \brief Sets the single shot mode of the timer
+ * \param driver CCU6 Timer interface Handle
+ * \param enabled If TRUE, sets the single shot mode
+ * \return None
+ *
+ * \see IfxStdIf_Timer_SetSingleMode
+ *
+ */
+IFX_EXTERN void IfxCcu6_TimerWithTrigger_setSingleMode(IfxCcu6_TimerWithTrigger *driver, boolean enabled);
+
+/** \brief Sets the trigger
+ * \param driver CCU6 Timer interface Handle
+ * \param triggerPoint Trigger point value
+ * \return None
+ *
+ * \see IfxStdIf_Timer_SetTrigger
+ *
+ */
+IFX_EXTERN void IfxCcu6_TimerWithTrigger_setTrigger(IfxCcu6_TimerWithTrigger *driver, Ifx_TimerValue triggerPoint);
+
+/** \brief Initializes the standard interface timer
+ * \param stdif Standard interface object, will be initialized by the function
+ * \param driver CCU6 Timer interface Handle
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Stops the timer
+ * \param driver CCU6 Timer interface Handle
+ * \return None
+ *
+ * \see IfxStdIf_Timer_Stop
+ *
+ */
+IFX_EXTERN void IfxCcu6_TimerWithTrigger_stop(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Updates the input frequency
+ * \param driver CCU6 Timer interface Handle
+ * \return None
+ *
+ * \see IfxStdIf_Timer_UpdateInputFrequency
+ *
+ */
+IFX_EXTERN void IfxCcu6_TimerWithTrigger_updateInputFrequency(IfxCcu6_TimerWithTrigger *driver);
+
+/** \} */
+
+/** \addtogroup IfxLld_Ccu6_TimerWithTrigger_Timer_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the pointer to timer channel
+ * \param driver CCU6 Timer interface Handle
+ * \return Pointer
+ *
+ * \see IfxStdIf_Timer_DisableUpdate
+ *
+ */
+IFX_EXTERN volatile uint32 *IfxCcu6_TimerWithTrigger_getPointer(IfxCcu6_TimerWithTrigger *driver);
+
+/** \brief Initialises the timer object\n
+ * T12 is configured as timer, T13 is optionally configured as trigger\n
+ * T12CLK, T12PRE and T12PR are chosen to achieve maximum PWM resolution\n
+ * Note: To achieve maximum PWM resolution, the requested T12 frequency should be the\n
+ * lowest PWM frequency.\n
+ * \param driver CCU6 Timer interface Handle
+ * \param config Configuration structure for Timer
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxCcu6_TimerWithTrigger_init(IfxCcu6_TimerWithTrigger *driver, IfxCcu6_TimerWithTrigger_Config *config);
+
+/** \brief Initializes the configuration structure to default
+ * \param config Configuration structure for Timer
+ * \param ccu6 Pointer to CCU6 module
+ * \return None
+ */
+IFX_EXTERN void IfxCcu6_TimerWithTrigger_initConfig(IfxCcu6_TimerWithTrigger_Config *config, Ifx_CCU6 *ccu6);
+
+/** \} */
+
+#endif /* IFXCCU6_TIMERWITHTRIGGER_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Cam/IfxCif_Cam.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Cam/IfxCif_Cam.c
new file mode 100644
index 0000000..cb43c11
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Cam/IfxCif_Cam.c
@@ -0,0 +1,848 @@
+/**
+ * \file IfxCif_Cam.c
+ * \brief CIF CAM details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxCif_Cam.h"
+#include "Src/Std/IfxSrc.h"
+
+/******************************************************************************/
+/*----------------------------------Macros------------------------------------*/
+/******************************************************************************/
+
+#define IFXCIF_CAM_ALIGN(size, align) ((((size) / (align)) * (align)) + ((((size) % (align)) != 0) ? (align) : 0))
+
+#define IFXCIF_CAM_MEM_ALIGN(size) IFXCIF_CAM_ALIGN(size, IFXCIF_CAM_MEM_ALIGN_SIZE)
+
+/** \addtogroup IfxLld_Cif_Cam_camEnumerations
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/**
+ * \param cam cam handle
+ */
+IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize(IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Cam_camFunctions
+ * \{ */
+/******************************************************************************/
+/*------------------------Inline Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/**
+ */
+IFX_INLINE uint32 IfxCif_Cam_calcMem(uint32 bytes, float32 frames);
+
+/**
+ * \return None
+ */
+IFX_INLINE void IfxCif_Cam_initPictInfo(IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg);
+
+/** \brief initializes GPIO Ports for image capturing
+ * \return None
+ */
+IFX_INLINE void IfxCif_Cam_initPortPins(IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
+
+/**
+ */
+IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable(void);
+
+/**
+ * \param cam cam handle
+ */
+IFX_INLINE uint32 IfxCif_Cam_yuvMemSize(const IfxCif_Cam *cam);
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief OVT OV10630 sensor Camera SensorcConfig subroutine , Config file is preloaded to pflash
+ */
+IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera(const IfxCif_Cam_Config *config);
+
+/** \brief Initialises the CIF for image capturing
+ * \param cam cam handel
+ * \return None
+ */
+IFX_STATIC void IfxCif_Cam_initCif(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
+
+/**
+ * \return None
+ */
+IFX_STATIC void IfxCif_Cam_initCifDownscaler(const IfxCif_Cam_Downscaling *ds);
+
+/**
+ * \param cam cam handle
+ * \return None
+ */
+IFX_STATIC void IfxCif_Cam_initCifExtraPath(const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config);
+
+/**
+ * \return None
+ */
+IFX_STATIC void IfxCif_Cam_initCifIspUnit(const IfxCif_Cam_Config *config);
+
+/**
+ * \return None
+ */
+IFX_STATIC void IfxCif_Cam_initCifJpegEncoder(const IfxCif_Cam_Config *config);
+
+/**
+ * \param cam cam handle
+ * \return None
+ */
+IFX_STATIC void IfxCif_Cam_initCifMemInterface(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config);
+
+/** \brief Enables CIF and EMEM and initialises all memory to 0
+ * \return None
+ */
+IFX_STATIC void IfxCif_Cam_initEmem(void);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE uint32 IfxCif_Cam_calcMem(uint32 bytes, float32 frames)
+{
+ float32 fbytes = (float32)bytes * frames;
+ uint32 ubytes = (uint32)__roundf(fbytes);
+
+ return Ifx_AlignOn32(ubytes);
+}
+
+
+IFX_INLINE void IfxCif_Cam_initPictInfo(IfxCif_Cam_PictureInfo *m, const IfxCif_Cam_MemConfig *mcfg)
+{
+ m->hSize = mcfg->hSize;
+ m->vSize = mcfg->vSize;
+ m->hOffset = mcfg->hOffset;
+ m->vOffset = mcfg->vOffset;
+}
+
+
+IFX_INLINE void IfxCif_Cam_initPortPins(IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
+{
+ /* Setup the P00.0..9, P02.0..8 pad drivers */
+ IfxPort_setGroupPadDriver(&MODULE_P02, 0, 0x01FFU, padDriver);
+ IfxPort_setGroupPadDriver(&MODULE_P00, 0, 0x03FFU, padDriver);
+
+ /* CIF Data Lines */
+ /* P02.0 .. 8 as input for CIFD0..D8 */
+ /* P00.0 .. 6 as input for CIFD9..D15 */
+ IfxPort_setGroupModeInput(&MODULE_P02, 0, 0x01FFU, inputMode);
+ IfxPort_setGroupModeInput(&MODULE_P00, 0, 0x007FU, inputMode);
+
+ /* CIF synchronisation lines */
+ IfxPort_setPinModeInput(&MODULE_P00, 8, inputMode); /* CIFVSNC */
+ IfxPort_setPinModeInput(&MODULE_P00, 9, inputMode); /* CIFHSNC */
+ IfxPort_setPinModeInput(&MODULE_P00, 7, inputMode); /* CIFCLK */
+}
+
+
+IFX_INLINE boolean IfxCif_Cam_isEmulationExtensionAvailable(void)
+{
+ return (MODULE_SCU.CHIPID.B.EEA != 0) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE uint32 IfxCif_Cam_yuvMemSize(const IfxCif_Cam *cam)
+{
+ return cam->memAreas.y.size + cam->memAreas.cb.size + cam->memAreas.cr.size;
+}
+
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam)
+{
+ (void)cam;
+ MODULE_CIF.JPE.STATUS_ICR.U = 0xFFFFFFFFUL;
+ MODULE_CIF.MI.ICR.U = 0xFFFFFFFFUL;
+ MODULE_CIF.ISP.ICR.U = 0xFFFFFFFFUL;
+}
+
+
+void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam)
+{
+ IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_JpegData, IfxCif_State_Disabled);
+ IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed);
+
+ if (cam->ispMode == IfxCif_Cam_IspMode_raw)
+ {
+ IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Enabled);
+ }
+ else
+ {
+ IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Enabled);
+ }
+}
+
+
+void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam)
+{
+ IFX_UNUSED_PARAMETER(cam);
+ IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Disabled);
+ IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Disabled);
+ IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder);
+ IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_JpegData, IfxCif_State_Enabled);
+}
+
+
+IFX_CONST IfxCif_Cam_PictureInfo *IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
+{
+ const IfxCif_Cam_PictureInfo *m = NULL_PTR;
+
+ if (z <= IfxCif_ExtraPath_5)
+ {
+ m = &(cam->memAreas.ep[z].image);
+ }
+
+ return m;
+}
+
+
+boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size)
+{
+ boolean result = FALSE;
+
+ if (IfxCif_Cam_isJpegEncodingComplete(cam))
+ {
+ /* event for sending JPEG encoded image */
+ IfxCif_Cam_clearJpegEncodingCompleteFlag(cam);
+ Ifx_AddressValue nextAddress = IfxCif_Cam_getNextJpegFrameAddress(cam);
+
+ if (((IfxCif_Cam_JfifHeader *)nextAddress)->app0 == 0xE0FF)
+ {
+ /* correct JPEG header was detected. */
+ *address = IfxCif_Cam_getLastFrameAddress(cam);
+ *size = IfxCif_Cam_getJpegEncodedSize(cam);
+ result = TRUE;
+ }
+ else
+ {}
+ }
+
+ return result;
+}
+
+
+IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam)
+{
+ /* Try allocating image areas for EMEM */
+ IfxCif_Cam_Status result = IfxCif_Cam_initMemSize(cam, config);
+
+ /* Check if EMEM is available */
+ if (IfxCif_Cam_isEmulationExtensionAvailable() == FALSE)
+ {
+ result = IfxCif_Cam_Status_notAvailable;
+ }
+ else
+ {
+ IfxCif_Cam_initEmem();
+ }
+
+ /* Initialse camera if needed */
+ if ((result == IfxCif_Cam_Status_ok) && (initCam != FALSE))
+ {
+ result = IfxCif_Cam_initCamera(config);
+ }
+
+ /* Finally, initialise the CIF */
+ if (result == IfxCif_Cam_Status_ok)
+ {
+ if (IfxCif_getModuleState() == IfxCif_State_Enabled)
+ {
+ IfxCif_setKernelResetRequestState(IfxCif_State_Enabled);
+ }
+
+ IfxCif_Cam_initPortPins(IfxPort_InputMode_noPullDevice, IfxPort_PadDriver_ttlSpeed1);
+ IfxCif_Cam_initCif(cam, config);
+ }
+
+ cam->configResult = result;
+
+ return result;
+}
+
+
+IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initCamera(const IfxCif_Cam_Config *config)
+{
+ IfxCif_Cam_Status result = IfxCif_Cam_Status_ok;
+ IfxI2c_I2c i2c;
+ IfxI2c_I2c_Device i2cDev;
+
+ { /* Initialise I2C module as master */
+ IfxI2c_I2c_Config i2cConfig;
+ IfxI2c_I2c_initConfig(&i2cConfig, &MODULE_I2C0);
+
+ const IfxI2c_Pins pins = {
+ &IfxI2c0_SCL_P15_4_INOUT,
+ &IfxI2c0_SDA_P15_5_INOUT,
+ IfxPort_PadDriver_ttlSpeed1
+ };
+
+ i2cConfig.pins = &pins;
+ i2cConfig.baudrate = 400000; /* 400 kHz */
+ IfxI2c_I2c_initModule(&i2c, &i2cConfig);
+
+ IfxI2c_I2c_deviceConfig i2cDeviceConfig;
+ IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c); /* Device config for Bus of i2c handle */
+
+ /* device address is obtained from the setup data table */
+ i2cDeviceConfig.deviceAddress = (0xFFU & config->setupDataTable[0]);
+ IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);
+ }
+
+ /* Send camera configuration array */
+ {
+ uint32 count;
+
+ for (count = 0; count < config->setupDataCount && result == IfxCif_Cam_Status_ok; count++)
+ {
+ uint32 nakCnt = 0; /* counts the NAKs */
+
+ while (IfxI2c_I2c_write(&i2cDev, ((uint8 *)&(config->setupDataTable[count])) + 1, 3) == IfxI2c_I2c_Status_nak)
+ {
+ nakCnt++;
+
+ if (nakCnt >= IFXCIF_MAX_I2CNAK) /* ~400 - 500 us */
+ {
+ result = IfxCif_Cam_Status_cameraCommError;
+ break;
+ }
+ }
+ }
+ }
+
+ return result;
+}
+
+
+IFX_STATIC void IfxCif_Cam_initCif(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
+{
+ const IfxCif_Cam_Common *common = config->common;
+
+ IfxCif_setModuleStateRequest(IfxCif_State_Enabled);
+ IfxCif_setSoftwareResetMode(IfxCif_Submodules_AllModules, IfxCif_State_Enabled);
+
+ //IfxCif_setInternalClockMode(IfxCif_Submodules_Debug, IfxCif_State_Enabled);
+ //IfxCif_setInternalClockMode(IfxCif_Submodules_SecurityWatchdog, IfxCif_State_Enabled);
+
+ IfxCif_Cam_initCifDownscaler(config->downscaling);
+ IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_1, config);
+ IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_2, config);
+ IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_3, config);
+ IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_4, config);
+ IfxCif_Cam_initCifExtraPath(cam, IfxCif_ExtraPath_5, config);
+
+ IfxCif_Cam_initCifMemInterface(cam, config);
+ IfxCif_Cam_initCifIspUnit(config);
+
+ if (common->jpegEnabled)
+ {
+ IfxCif_Cam_enableJpegEncoder(cam);
+ }
+ else
+ {
+ IfxCif_Cam_disableJpegEncoder(cam);
+ }
+
+ if (common->jpegTables != NULL_PTR)
+ {
+ IfxCif_Cam_initCifJpegEncoder(config);
+ }
+}
+
+
+IFX_STATIC void IfxCif_Cam_initCifDownscaler(const IfxCif_Cam_Downscaling *ds)
+{
+ if (ds != NULL_PTR)
+ {
+ IfxCif_setInternalClockMode(IfxCif_Submodules_LinearDownscaler,
+ ds->enabled ? IfxCif_State_Enabled : IfxCif_State_Disabled);
+ IfxCif_setLinearDownscalerScalingFactors(ds->hFactor, ds->vFactor);
+ IfxCif_setLinearDownscalerScalingModes(ds->hMode, ds->vMode);
+ }
+}
+
+
+IFX_STATIC void IfxCif_Cam_initCifExtraPath(const IfxCif_Cam *cam, IfxCif_ExtraPath ep, const IfxCif_Cam_Config *config)
+{
+ const IfxCif_Cam_Common *common = config->common;
+ const IfxCif_Cam_MemConfig *mcfg = &(common->extraPaths[ep]);
+
+ /* configuration of extra path is requested when each {hSize, vSize, memFactor} is positive. */
+
+ if ((mcfg->hSize > 0) && (mcfg->vSize > 0) && (mcfg->memFactor > 0))
+ {
+ if ((mcfg->vSize + mcfg->vOffset) > common->ispIn.vSize)
+ {
+ /* invalid setting, the vSize and vOffset is outside the ISP acquisition */
+ IFXCIF_DEBUG;
+ }
+
+ IfxCif_setInternalClockMode(IfxCif_Submodules_ExtraPaths, IfxCif_State_Enabled);
+ IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_PictureDataPath, IfxCif_State_Enabled);
+ IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_InitBaseAddress, IfxCif_State_Enabled);
+ IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_InitOffsetCounter, IfxCif_State_Enabled);
+
+ if (config->ispMode == IfxCif_Cam_IspMode_raw)
+ {
+ IfxCif_setEpWriteFormat(ep, (config->ispRawBpp <= 8) ? IfxCif_EpWriteFormat_Raw8Bit : IfxCif_EpWriteFormat_RawGreater);
+ IfxCif_setEpFeatureEnableState(ep, IfxCif_EpFeatures_ByteSwap, mcfg->byteSwap ? IfxCif_State_Enabled : IfxCif_State_Disabled);
+ }
+ else
+ {
+ IfxCif_setEpWriteFormat(ep, IfxCif_EpWriteFormat_YCbCr);
+ }
+
+ if ((mcfg->hSize + mcfg->hOffset) > common->ispIn.hSize)
+ {
+ /* invalid setting, the hSize and hOffset is outside the ISP acquisition */
+ IFXCIF_DEBUG;
+ }
+
+ IfxCif_setEpCroppingEnableState(ep, IfxCif_State_Enabled);
+ IfxCif_setEpCroppingPictureSizes(ep, mcfg->hSize, mcfg->vSize);
+ IfxCif_setEpCroppingOffsetsOutputWindow(ep, mcfg->hOffset, mcfg->vOffset);
+ IfxCif_setEpBaseInitAddress(ep, IfxCif_Cam_getBbbAddress(cam, cam->memAreas.ep[ep].start));
+ IfxCif_setEpInitSize(ep, cam->memAreas.ep[ep].size);
+ IfxCif_epForceConfigurationUpdate(ep);
+ }
+}
+
+
+IFX_STATIC void IfxCif_Cam_initCifIspUnit(const IfxCif_Cam_Config *config)
+{
+ const IfxCif_Cam_Common *common = config->common;
+
+ IfxCif_setInternalClockMode(IfxCif_Submodules_ImageSignalProcessing, IfxCif_State_Enabled);
+
+ IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode_MainPathAndRawMode);
+ IfxCif_setNumberOfAcquisitionFrames(1);
+
+ if (config->ispRawBpp == 8)
+ {
+ IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
+ IfxCif_setIspInputInterface(IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb);
+ }
+ else if (config->ispRawBpp == 10)
+ {
+ IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
+ IfxCif_setIspInputInterface(IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb);
+ }
+ else if (config->ispRawBpp == 12)
+ {
+ IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
+ IfxCif_setIspInputInterface(IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb);
+ }
+ else if (config->ispRawBpp == 14)
+ {
+ IfxCif_setIspInputSelectionAppendState(IfxCif_State_Enabled);
+ IfxCif_setIspInputInterface(IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb);
+ }
+ else if (config->ispRawBpp == 16)
+ {
+ IfxCif_setIspInputSelectionAppendState(IfxCif_State_Disabled);
+ IfxCif_setIspInputInterface(IfxCif_IspInputInterface_16BitExternalInterface);
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ IfxCif_setIspHSyncPolarity(config->hSyncPolarity);
+ IfxCif_setIspVSyncPolarity(config->vSyncPolarity);
+ IfxCif_setIspSamplingEdge(config->samplingEdge);
+
+ if (config->ispMode == IfxCif_Cam_IspMode_raw)
+ {
+ IfxCif_setIspMode(IfxCif_IspMode_RawPicture);
+ IfxCif_setIspFieldInvertState(IfxCif_State_Disabled);
+ IfxCif_setIspAcquisitionSizes(common->ispIn.hSize, common->ispIn.vSize);
+
+ /* the followings are ignored, but set to default */
+ IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence_YCbYCr);
+ IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255);
+ IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255);
+ }
+ else if ((config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
+ || (config->ispMode == IfxCif_Cam_IspMode_yuvPlanar))
+ {
+ IfxCif_setIspMode(IfxCif_IspMode_ItuRBT601);
+ IfxCif_setIspFieldInvertState(IfxCif_State_Enabled);
+ IfxCif_setIspAcquisitionSizes(common->ispIn.hSize * 2, common->ispIn.vSize);
+
+ IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence_YCbYCr);
+ IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255);
+ IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255);
+ }
+ else
+ {
+ /* undefined */
+ IFXCIF_DEBUG;
+ }
+
+ IfxCif_setIspAcquisitionOffsets(common->ispIn.hOffset, common->ispIn.vOffset);
+ IfxCif_setIspPictureSizes(common->ispIn.hSize, common->ispIn.vSize);
+ IfxCif_setIspOutputWindowOffsets(common->ispIn.hOffset, common->ispIn.vOffset);
+
+ IfxCif_setIspisEnableState(IfxCif_State_Enabled);
+ IfxCif_setIspisPictureSizes(common->mainPath.hSize, common->mainPath.vSize);
+ IfxCif_setIspisOutputWindowOffsets((IfxCif_ImageTiers)common->mainPath.hOffset, common->mainPath.vOffset);
+
+ IfxCif_generateIspImmediateConfigUpdateSignal();
+
+ IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources_FrameCompletelyPutOut, IfxCif_State_Enabled);
+ //IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources_IspTurnedOff, IfxCif_State_Enabled);
+
+ if (common->ispInterrupt.priority > 0)
+ {
+ volatile Ifx_SRC_SRCR *srcr = &SRC_CIFISP;
+ IfxSrc_init(srcr, (IfxSrc_Tos)common->ispInterrupt.provider, (Ifx_Priority)common->ispInterrupt.priority);
+ IfxSrc_enable(srcr);
+ }
+}
+
+
+IFX_STATIC void IfxCif_Cam_initCifJpegEncoder(const IfxCif_Cam_Config *config)
+{
+ const IfxCif_Cam_JpegTables *jpeTables = config->common->jpegTables;
+
+ IfxCif_setInternalClockMode(IfxCif_Submodules_JpegEncoder, IfxCif_State_Enabled);
+
+ /* Select encoding table */
+ IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_Y, IfxCif_JpeQTableSelector_Table0);
+ IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_U, IfxCif_JpeQTableSelector_Table1);
+ IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents_V, IfxCif_JpeQTableSelector_Table1);
+
+ /* Programming encoding table */
+ IfxCif_programJpeTable(IfxCif_JpeTableId_QTable0, jpeTables->y.q.entry, jpeTables->y.q.length);
+ IfxCif_programJpeTable(IfxCif_JpeTableId_QTable1, jpeTables->uv.q.entry, jpeTables->uv.q.length);
+ IfxCif_programJpeTable(IfxCif_JpeTableId_VlcDcTable0, jpeTables->y.dc.entry, jpeTables->y.dc.length);
+ IfxCif_programJpeTable(IfxCif_JpeTableId_VlcDcTable1, jpeTables->uv.dc.entry, jpeTables->uv.dc.length);
+ IfxCif_programJpeTable(IfxCif_JpeTableId_VlcAcTable0, jpeTables->y.ac.entry, jpeTables->y.ac.length);
+ IfxCif_programJpeTable(IfxCif_JpeTableId_VlcAcTable1, jpeTables->uv.ac.entry, jpeTables->uv.ac.length);
+
+ /* JPEG Codec Image Size */
+ const IfxCif_Cam_MemConfig *mcfg = &(config->common->mainPath);
+
+ if (config->ispMode == IfxCif_Cam_IspMode_raw)
+ {
+ IfxCif_setJpegCodecImageSizes(mcfg->hSize, mcfg->vSize);
+ }
+ else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
+ {
+ IfxCif_setJpegCodecImageSizes(mcfg->hSize, mcfg->vSize);
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ /* JPE Header Mode Definition Register */
+ IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode_JfifHeader);
+
+ /* JPE Status Interrupt Mask Register */
+ IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources_EncodingComplete, IfxCif_State_Enabled);
+ //IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources_HeaderGenerationComplete, IfxCif_State_Enabled);
+
+ /* JPE Command To Start Stream Header Generation Register */
+ IfxCif_jpeGenerateHeader();
+
+ /* JPE Start Command To Start JFIF Stream Encoding Register */
+ IfxCif_startJpegJfifStreamEncoder();
+ IfxCif_setJpegJfifStreamEncoderContinuousMode
+ (IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically);
+
+ /* JPE Automatic Configuration Update Register */
+ IfxCif_initJpegEncoder();
+}
+
+
+IFX_STATIC void IfxCif_Cam_initCifMemInterface(const IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
+{
+ IfxCif_setInternalClockMode(IfxCif_Submodules_MemoryInterface, IfxCif_State_Enabled);
+
+ if (config->ispMode == IfxCif_Cam_IspMode_raw)
+ {
+ IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_RawData, IfxCif_State_Enabled);
+ IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength_8BeatBursts);
+
+ if (config->ispRawBpp > 8)
+ {
+ IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit);
+ }
+ else
+ {
+ IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit);
+ }
+ }
+ else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
+ {
+ IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths_MainPictureData, IfxCif_State_Enabled);
+ IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength_8BeatBursts);
+ IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit); /* interleaved mode */
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State_Enabled);
+ IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents_Y, IfxCif_Cam_getBbbAddress(cam, cam->memAreas.y.start));
+ IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents_Y, cam->memAreas.y.size);
+ IfxCif_generateMiImmediateConfigUpdateSignal();
+
+ IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources_MainPictureFrameEnd, IfxCif_State_Enabled);
+ //IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources_FillMainPictureY, IfxCif_State_Enabled);
+}
+
+
+IFX_STATIC void IfxCif_Cam_initEmem(void)
+{
+ IfxEmem_setClockEnableState(IfxEmem_State_enabled);
+ __nop();
+
+ if (IfxEmem_LockedState_locked == IfxEmem_getLockedState())
+ {
+ /* apply unlock sequence */
+ IfxEmem_setUnlockStandbyLockFlag(0x1);
+ IfxEmem_setUnlockStandbyLockFlag(0x3);
+ IfxEmem_setUnlockStandbyLockFlag(0x7);
+ /* wait one cycle for unlock */
+ __nop();
+ }
+
+ IfxEmem_setTileConfigMode(IfxEmem_TileConfigMode_calibMode, IfxEmem_TileNumber_0);
+
+#if IFXCIF_CAM_INITIALIZE_EMEM
+ {
+ uint64 *pmem;
+ uint32 i;
+
+ /* initialize the whole EMEM with 0 */
+ pmem = (uint64 *)IFXEMEM_START_ADDR_CPU;
+
+ for (i = 0; (uint64)i < (IFXEMEM_SIZE / 8); i += 1)
+ {
+ *(pmem++) = 0;
+ }
+ }
+#endif
+}
+
+
+IFX_STATIC IfxCif_Cam_Status IfxCif_Cam_initMemSize(IfxCif_Cam *cam, const IfxCif_Cam_Config *config)
+{
+ IfxCif_Cam_Status result = IfxCif_Cam_Status_ok;
+ IfxCif_Cam_MemAreas *m = &cam->memAreas;
+ const IfxCif_Cam_Common *common = config->common;
+ const IfxCif_Cam_MemConfig *mcfg = &(common->mainPath);
+
+ cam->nextFreeAddress = 0x00000000;
+ cam->availMemSize = 0x00100000;
+ cam->cif = &MODULE_CIF;
+ cam->emem = &MODULE_EMEM;
+ cam->configResult = IfxCif_Cam_Status_ok;
+ cam->totalMemSize = 0;
+ cam->ispMode = config->ispMode;
+ cam->jfif = NULL_PTR;
+
+ memset(m, 0, sizeof(IfxCif_Cam_MemAreas));
+
+ uint32 numPixels = mcfg->hSize * mcfg->vSize;
+
+ /* Calculate MainPath memory usage information ------------------------------------ */
+ if (config->ispMode == IfxCif_Cam_IspMode_raw)
+ {
+ cam->ispBpp = (config->ispRawBpp > 8) ? 2 : 1;
+ m->y.size = IfxCif_Cam_calcMem(numPixels * cam->ispBpp, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
+ IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
+ m->cb.size = 0 + IFXCIF_CAM_MEM_GAPSIZE;
+ m->cr.size = 0 + IFXCIF_CAM_MEM_GAPSIZE;
+ }
+ else if (config->ispMode == IfxCif_Cam_IspMode_yuvInterleaved)
+ {
+ cam->ispBpp = 2;
+ m->y.size = IfxCif_Cam_calcMem(numPixels * cam->ispBpp, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
+ IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
+ m->cb.size = 0;
+ m->cr.size = m->cb.size;
+ }
+ else if (config->ispMode == IfxCif_Cam_IspMode_yuvPlanar)
+ {
+ IFXCIF_DEBUG; /* not tested! */
+ cam->ispBpp = 2;
+ m->y.size = IfxCif_Cam_calcMem(numPixels, mcfg->memFactor) + IFXCIF_CAM_MEM_GAPSIZE;
+ IfxCif_Cam_initPictInfo(&m->y.image, mcfg);
+ m->cb.size = m->y.size / 2;
+ m->cr.size = m->cb.size;
+ }
+
+ m->y.start = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
+
+ if (common->jpegEnabled != 0)
+ {
+ cam->memAreas.y.size = Ifx_AlignOn32(cam->memAreas.y.size / 8);
+ }
+
+ m->cb.start = (Ifx_AddressValue)((uint32)m->y.start + m->y.size);
+ m->cr.start = (Ifx_AddressValue)((uint32)m->cb.start + m->cb.size);
+
+ cam->totalMemSize = IFXCIF_CAM_MEM_ALIGN(IfxCif_Cam_yuvMemSize(cam));
+
+ IfxCif_ExtraPath z = IfxCif_ExtraPath_1;
+ Ifx_AddressValue nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
+
+ /* Calculate ExtraPath 1 memory usage information --------------------------------- */
+ IfxCif_Cam_MemInfo *mep = &(m->ep[z]);
+ mcfg = &common->extraPaths[z];
+ mep->start = nextStart;
+ mep->size = IfxCif_Cam_calcMem(cam->ispBpp * (mcfg->vSize * mcfg->hSize), mcfg->memFactor);
+ IfxCif_Cam_initPictInfo(&mep->image, mcfg);
+
+ if (config->downscaling != NULL_PTR)
+ {
+ const IfxCif_Cam_Downscaling *downscaling = config->downscaling;
+
+ if (downscaling->enabled)
+ {
+ /* NOTE: preliminary version (using 2x or 4x downscaling only) */
+ /* It should be possible to compute the size from the given parameters */
+ if ((downscaling->sizeFactor != 4) && (downscaling->sizeFactor != 2))
+ {
+ IFXCIF_DEBUG;
+ }
+
+ mep->size /= (downscaling->sizeFactor * downscaling->sizeFactor);
+
+ if (downscaling->hMode != IfxCif_LinearDownscalerScalingMode_Disabled)
+ {
+ mep->image.hSize /= downscaling->sizeFactor;
+ }
+
+ if (downscaling->vMode != IfxCif_LinearDownscalerScalingMode_Disabled)
+ {
+ mep->image.vSize /= downscaling->sizeFactor;
+ }
+ }
+ }
+
+ cam->totalMemSize = cam->totalMemSize + IFXCIF_CAM_MEM_ALIGN(mep->size);
+ nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
+
+ /* Calculate ExtraPath 2..5 memory usage information ------------------------------ */
+ for (z = IfxCif_ExtraPath_2; z <= IfxCif_ExtraPath_5; z++)
+ {
+ mep = &(m->ep[z]);
+ mcfg = &common->extraPaths[z];
+ mep->start = nextStart;
+ mep->size = IfxCif_Cam_calcMem(cam->ispBpp * (mcfg->vSize * mcfg->hSize), mcfg->memFactor);
+ IfxCif_Cam_initPictInfo(&mep->image, mcfg);
+ cam->totalMemSize = cam->totalMemSize + IFXCIF_CAM_MEM_ALIGN(mep->size);
+ nextStart = (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + cam->totalMemSize);
+ }
+
+ /* Total memory usage ------------------------------------------------------------- */
+ if (cam->totalMemSize <= cam->availMemSize)
+ {
+ /* if enough memory available..... */
+ cam->availMemSize -= cam->totalMemSize;
+
+ if (cam->nextFreeAddress == 0)
+ {
+ cam->nextFreeAddress = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
+ }
+
+ cam->nextFreeAddress = (Ifx_AddressValue)((uint32)cam->nextFreeAddress + cam->totalMemSize);
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ result = IfxCif_Cam_Status_notEnoughMemory;
+ }
+
+ return result;
+}
+
+
+void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames)
+{
+ (void)cam;
+ IfxCif_setNumberOfAcquisitionFrames(frames);
+ IfxCif_setIspOutputState(IfxCif_State_Enabled);
+ IfxCif_generateIspFrameSynchronousConfigUpdateSignal();
+}
+
+
+void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames)
+{
+ (void)cam;
+ IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State_Enabled);
+ IfxCif_generateMiImmediateConfigUpdateSignal();
+ IfxCif_setNumberOfAcquisitionFrames(frames);
+ IfxCif_setIspInputFormatterState(IfxCif_State_Enabled);
+ IfxCif_setIspOutputState(IfxCif_State_Enabled);
+ IfxCif_generateIspImmediateConfigUpdateSignal();
+}
+
+
+void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam)
+{
+ (void)cam;
+ IfxCif_setIspOutputState(IfxCif_State_Disabled);
+ IfxCif_generateIspImmediateConfigUpdateSignal();
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Cam/IfxCif_Cam.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Cam/IfxCif_Cam.h
new file mode 100644
index 0000000..3bbff21
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Cam/IfxCif_Cam.h
@@ -0,0 +1,624 @@
+/**
+ * \file IfxCif_Cam.h
+ * \brief CIF CAM details
+ * \ingroup IfxLld_Cif
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cif_Cam CAM
+ * \ingroup IfxLld_Cif
+ * \defgroup IfxLld_Cif_Cam_camEnumerations Camera Enumerations
+ * \ingroup IfxLld_Cif_Cam
+ * \defgroup IfxLld_Cif_Cam_camFunctions Camera Functions
+ * \ingroup IfxLld_Cif_Cam
+ * \defgroup IfxLld_Cif_Cam_camStructures Camera Structures
+ * \ingroup IfxLld_Cif_Cam
+ */
+
+#ifndef IFXCIF_CAM_H
+#define IFXCIF_CAM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cif/Std/IfxCif.h"
+#include "_PinMap/IfxCif_PinMap.h"
+#include "Emem/Std/IfxEmem.h"
+#include "I2c/I2c/IfxI2c_I2c.h"
+#include "string.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXCIF_CAM_MEM_ALIGN_SIZE (64)
+
+#define IFXCIF_CAM_MEM_GAPSIZE 0x0
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Cif_Cam_camEnumerations
+ * \{ */
+/** \brief CIF ISP mode
+ */
+typedef enum
+{
+ IfxCif_Cam_IspMode_undefined = -1, /**< \brief undefined */
+ IfxCif_Cam_IspMode_raw = 0, /**< \brief raw */
+ IfxCif_Cam_IspMode_yuvInterleaved = 1, /**< \brief yuv interleaved */
+ IfxCif_Cam_IspMode_yuvPlanar = 2 /**< \brief yuv planar */
+} IfxCif_Cam_IspMode;
+
+/** \brief Driver acquisition state
+ */
+typedef enum
+{
+ IfxCif_Cam_State_stopped = 0, /**< \brief stopped */
+ IfxCif_Cam_State_running = 1 /**< \brief running */
+} IfxCif_Cam_State;
+
+/** \brief Driver status
+ */
+typedef enum
+{
+ IfxCif_Cam_Status_ok = 0, /**< \brief ok */
+ IfxCif_Cam_Status_notEnoughMemory = 1, /**< \brief not enough Memory */
+ IfxCif_Cam_Status_cameraCommError = 2, /**< \brief camera comm Error */
+ IfxCif_Cam_Status_notAvailable = 3 /**< \brief not available */
+} IfxCif_Cam_Status;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Cif_Cam_camStructures
+ * \{ */
+typedef struct
+{
+ uint8 length; /**< \brief length */
+ IFX_CONST uint8 *entry; /**< \brief entry */
+} IfxCif_Cam_TableInfo;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Cam_camStructures
+ * \{ */
+/** \brief Single component JPEG tables
+ */
+typedef struct
+{
+ IfxCif_Cam_TableInfo q; /**< \brief q */
+ IfxCif_Cam_TableInfo dc; /**< \brief dc */
+ IfxCif_Cam_TableInfo ac; /**< \brief ac */
+} IfxCif_Cam_JpegTable;
+
+/** \brief Picture info
+ */
+typedef struct
+{
+ uint16 hSize; /**< \brief horizontal (number of pixel) */
+ uint16 vSize; /**< \brief vertical (number of lines) */
+ uint16 hOffset; /**< \brief horizontal offset */
+ uint16 vOffset; /**< \brief vertical offset */
+} IfxCif_Cam_PictureInfo;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Cam_camStructures
+ * \{ */
+/** \brief JPEG tables for all components
+ */
+typedef struct
+{
+ IfxCif_Cam_JpegTable y; /**< \brief y */
+ IfxCif_Cam_JpegTable uv; /**< \brief uv */
+} IfxCif_Cam_JpegTables;
+
+/** \brief Single path memory interface configuration (used in initialisation/configuration)
+ */
+typedef struct
+{
+ float32 memFactor; /**< \brief multiples of frame count for memory allocation */
+ uint16 hSize; /**< \brief horizontal (number of pixel) */
+ uint16 vSize; /**< \brief vertical (number of lines) */
+ uint16 hOffset; /**< \brief horizontal offset */
+ uint16 vOffset; /**< \brief vertical offset */
+ boolean byteSwap; /**< \brief byte swapping */
+} IfxCif_Cam_MemConfig;
+
+/** \brief Single path memory interface information (used in Runtime)
+ */
+typedef struct
+{
+ Ifx_AddressValue start; /**< \brief start address */
+ uint32 size; /**< \brief size in bytes */
+ IfxCif_Cam_PictureInfo image; /**< \brief image */
+} IfxCif_Cam_MemInfo;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Cam_camStructures
+ * \{ */
+/** \brief Common configuration
+ */
+typedef struct
+{
+ IfxCif_Cam_PictureInfo ispIn; /**< \brief ispIn */
+ IfxCif_Cam_MemConfig mainPath; /**< \brief main path */
+ IfxCif_Cam_MemConfig extraPaths[IFXCIF_EXTRA_PATHS]; /**< \brief extra paths */
+ IfxCif_InputInterface inputInterface; /**< \brief input interface */
+ Ifx_IsrSetting ispInterrupt; /**< \brief isp interrupt */
+ boolean debugPathEnabled; /**< \brief debug path enabled */
+ boolean watchdogEnabled; /**< \brief watchdog enabled */
+ IFX_CONST IfxCif_Cam_JpegTables *jpegTables; /**< \brief jpeg tables */
+ boolean jpegEnabled; /**< \brief jpeg enabled */
+} IfxCif_Cam_Common;
+
+/** \brief Downscaler configuration
+ */
+typedef struct
+{
+ boolean enabled; /**< \brief enable */
+ IfxCif_LinearDownscalerScalingMode hMode; /**< \brief hMode */
+ IfxCif_LinearDownscalerScalingMode vMode; /**< \brief vMode */
+ uint8 hFactor; /**< \brief horizontal factor to program into IfxCif_setLinearDownscalerScalingFactors() */
+ uint8 vFactor; /**< \brief vertical factor to program into IfxCif_setLinearDownscalerScalingFactors() */
+ uint8 sizeFactor; /**< \brief memory size factor, e.g. half in both H and V usually gives factor of 4 */
+} IfxCif_Cam_Downscaling;
+
+/** \brief JPEG JFIF header structure
+ */
+typedef struct
+{
+ uint16 unknown; /**< \brief unknown */
+ uint16 app0; /**< \brief app0 */
+ uint16 length; /**< \brief length */
+ uint8 ident[5]; /**< \brief ident */
+ uint16 version; /**< \brief version */
+ uint8 density; /**< \brief density */
+ uint16 densityX; /**< \brief densityX */
+ uint16 densityY; /**< \brief densityY */
+ uint8 thumbX; /**< \brief thumbX */
+ uint8 thumbY; /**< \brief thumbY */
+ uint8 thumbData[20]; /**< \brief thumbData */
+} IfxCif_Cam_JfifHeader;
+
+/** \brief All paths memory partitioning
+ */
+typedef struct
+{
+ IfxCif_Cam_MemInfo y; /**< \brief y */
+ IfxCif_Cam_MemInfo cb; /**< \brief cb */
+ IfxCif_Cam_MemInfo cr; /**< \brief cr */
+ IfxCif_Cam_MemInfo ep[IFXCIF_EXTRA_PATHS]; /**< \brief ep */
+} IfxCif_Cam_MemAreas;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Cam_camStructures
+ * \{ */
+/** \brief Structure which is used as handle for the CIF-CAM functions.
+ * This stores cached variables useful for run-time operations.
+ */
+typedef struct
+{
+ IfxCif_Cam_MemAreas memAreas; /**< \brief memory area definition */
+ uint32 totalMemSize; /**< \brief total occupied memory area (in bytes) */
+ Ifx_AddressValue nextFreeAddress; /**< \brief next free storage address */
+ uint32 availMemSize; /**< \brief total available RAM space left (in bytes) */
+ Ifx_CIF *cif; /**< \brief pointer to base address of CIF module SFRs */
+ Ifx_EMEM *emem; /**< \brief pointer to base address of EMEM module SFRs */
+ IfxCif_Cam_JfifHeader *jfif; /**< \brief pointer to the last acquired JPEG header */
+ IfxCif_Cam_Status configResult; /**< \brief status of last configuration (or initialisation) */
+ IfxCif_Cam_IspMode ispMode; /**< \brief actual ISP mode */
+ boolean ispBpp; /**< \brief byte per pixel */
+} IfxCif_Cam;
+
+/** \brief Camera specific configuration
+ */
+typedef struct
+{
+ IFX_CONST IfxCif_Cam_Common *common; /**< \brief pointer to common configuration */
+ IfxCif_Cam_IspMode ispMode; /**< \brief ISP mode */
+ uint16 ispRawBpp; /**< \brief bytes per pixel of the input stream */
+ IfxCif_IspSyncPolarity hSyncPolarity; /**< \brief polarity of HSYNC signal */
+ IfxCif_IspSyncPolarity vSyncPolarity; /**< \brief polarity of VSYNC signal */
+ IfxCif_IspSamplingEdge samplingEdge; /**< \brief sampling edge */
+ uint16 setupDataCount; /**< \brief number of camera-specific configuration data (in DWORDS) */
+ IFX_CONST uint32 *setupDataTable; /**< \brief pointer to the first entry of camera-specific configuration data */
+ IFX_CONST IfxCif_Cam_Downscaling *downscaling; /**< \brief downscaling settings for ExtraPath 1 */
+} IfxCif_Cam_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Cam_camFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear the frame reception flag
+ * \param cam cam handle
+ * \return None
+ */
+IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag(const IfxCif_Cam *cam);
+
+/** \brief Clear the JPEG encoder completed flag
+ * \param cam cam handle
+ * \return None
+ */
+IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam);
+
+/** \brief Convert the CPU address into BBB address
+ * \param cam cam handle
+ * \param cpuAddress Address value
+ */
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress);
+
+/** \brief Returns the size (in bytes) of one last acquired extra-path image data
+ * \param cam cam handle
+ * \param z Extra path
+ */
+IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
+
+/**
+ * \param cam cam handle
+ * \param z Extra path
+ */
+IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getExtraPathMemInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
+
+/** \brief Returns the size (in bytes) of last acquired main-path image data
+ * \param cam cam handle
+ */
+IFX_INLINE uint32 IfxCif_Cam_getFrameSize(const IfxCif_Cam *cam);
+
+/** \brief Returns the size (in bytes) of last encoded main-path image data
+ * \param cam cam handle
+ */
+IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam);
+
+/** \brief Returns the address location of last acquired extra-path image frame data
+ * \param cam cam handle
+ * \param z Extra path
+ */
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
+
+/**
+ * \param cam cam handle
+ * \param z Extra path
+ * \param address Address Value
+ * \param size const IfxCif_Cam_MemInfo *m;
+ * *size = IfxCif_Cam_getExtraFrameSize(cam, z);
+ * *address = IfxCif_Cam_getLastExtraAddress(cam, z);
+ * m = IfxCif_Cam_getExtraPathMemInfo(cam, z);
+ * return m;
+ */
+IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastExtraCaptureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size);
+
+/** \brief Returns the address location of last acquired main-path image frame data
+ * \param cam cam handle
+ * \return address location of last acquired main-path image frame data
+ */
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam);
+
+/**
+ * \param cam cam handle
+ * \param address Address value
+ * \param size Size
+ */
+IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastFrameCaptureInfo(const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size);
+
+/** \brief Returns the address location of next acquired main-path image frame data
+ * \param cam cam handle
+ */
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress(const IfxCif_Cam *cam);
+
+/** \brief Returns the address location of next acquired JPEG image frame data
+ * \param cam cam handle
+ */
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam);
+
+/** \brief Increment the address related to memory interface of for main-path. The address is wrapped around at the boundary of the allocated RAM size
+ * \param cam cam handle
+ * \param address Address value
+ */
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress(const IfxCif_Cam *cam, Ifx_AddressValue address);
+
+/** \brief Returns TRUE if JPEG encoding is completed
+ * \param cam cam handle
+ * \return TRUE if one frame reception is completed
+ */
+IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete(const IfxCif_Cam *cam);
+
+/** \brief
+ * \param cam cam handle
+ * \return TRUE if JPEG encoding is completed
+ */
+IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam);
+
+/**
+ * \param cam cam handle
+ * \return None
+ */
+IFX_INLINE void IfxCif_Cam_skipPicture(const IfxCif_Cam *cam);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear all CIF module notification flags
+ * \param cam cam handle
+ * \return None
+ */
+IFX_EXTERN void IfxCif_Cam_clearAllFlags(const IfxCif_Cam *cam);
+
+/** \brief Disable the JPEG encoder and route the acquisition path accordingly to the 'original' configuration, i.e. RAW or main path.
+ * \param cam cam handle
+ * \return None
+ */
+IFX_EXTERN void IfxCif_Cam_disableJpegEncoder(const IfxCif_Cam *cam);
+
+/** \brief Enable the JPEG encoder and route the acquisition path accordingly
+ * \param cam cam handle
+ * \return None
+ */
+IFX_EXTERN void IfxCif_Cam_enableJpegEncoder(const IfxCif_Cam *cam);
+
+/** \brief Returns pointer to the variable storing picture info of an extra-path
+ * \param cam cam handle
+ * \param z Extra Path
+ * \return pointer to the variable storing picture info of an extra-path
+ */
+IFX_EXTERN IFX_CONST IfxCif_Cam_PictureInfo *IfxCif_Cam_getExtraPathPictureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z);
+
+/** \brief Returns pointer to the memory structure storing last JPEG encoding process
+ * \param cam cam handle
+ * \param address EMEM address which stores the JPEG frame
+ * \param size size of JPEG frame
+ * \return TRUE if there was new frame encoded, else FALSE
+ */
+IFX_EXTERN boolean IfxCif_Cam_getLastJpegEncodingInfo(IfxCif_Cam *cam, Ifx_AddressValue *address, sint32 *size);
+
+/** \brief Initialise the CIF, EMEM, PORT, I2C and the camera itself
+ * \param cam cam handel
+ * \param config configurations structure
+ * \param initCam if TRUE camera will be reconfigured, else camera will not be reconfigured.
+ */
+IFX_EXTERN IfxCif_Cam_Status IfxCif_Cam_init(IfxCif_Cam *cam, const IfxCif_Cam_Config *config, boolean initCam);
+
+/** \brief Restart capture by enabling the ISP output
+ * \param cam cam handle
+ * \param frames Number of acquisitions. Set to zero for continuous acquisition
+ * \return None
+ */
+IFX_EXTERN void IfxCif_Cam_restartCapture(const IfxCif_Cam *cam, uint8 frames);
+
+/** \brief Start capture by enabling the ISP output and initialising the MI counter
+ * \param cam cam handle
+ * \param frames Number of acquisitions. Set to zero for continuous acquisition
+ * \return None
+ */
+IFX_EXTERN void IfxCif_Cam_startCapture(const IfxCif_Cam *cam, uint8 frames);
+
+/** \brief Stop capture by disabling the ISP output
+ * \param cam cam handle
+ * \return None
+ */
+IFX_EXTERN void IfxCif_Cam_stopCapture(const IfxCif_Cam *cam);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxCif_Cam_clearFrameReceptionFlag(const IfxCif_Cam *cam)
+{
+ (void)cam;
+ MODULE_CIF.ISP.ICR.U = (IFX_CIF_ISP_ICR_ICR_FRAME_MSK << IFX_CIF_ISP_ICR_ICR_FRAME_OFF);
+}
+
+
+IFX_INLINE void IfxCif_Cam_clearJpegEncodingCompleteFlag(const IfxCif_Cam *cam)
+{
+ (void)cam;
+ MODULE_CIF.JPE.STATUS_ICR.U = (IFX_CIF_JPE_STATUS_ICR_ENCODE_DONE_MSK << IFX_CIF_JPE_STATUS_ICR_ENCODE_DONE_OFF);
+}
+
+
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getBbbAddress(const IfxCif_Cam *cam, Ifx_AddressValue cpuAddress)
+{
+ (void)cam;
+
+ return (Ifx_AddressValue)(((uint32)cpuAddress & 0x00FFFFFFU) + IFXEMEM_START_ADDR_BBB);
+}
+
+
+IFX_INLINE uint32 IfxCif_Cam_getExtraFrameSize(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
+{
+ sint32 size = 0;
+
+ if (z <= IfxCif_ExtraPath_5)
+ {
+ size = cam->memAreas.ep[z].image.hSize * cam->memAreas.ep[z].image.vSize;
+
+ if ((cam->ispMode != IfxCif_Cam_IspMode_raw) || (cam->ispBpp > 1))
+ {
+ size = size * 2;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return (uint32)size;
+}
+
+
+IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getExtraPathMemInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
+{
+ return &(cam->memAreas.ep[z]);
+}
+
+
+IFX_INLINE uint32 IfxCif_Cam_getFrameSize(const IfxCif_Cam *cam)
+{
+ (void)cam;
+ sint32 size = MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.U - MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U;
+
+ if (size <= 0)
+ {
+ size += MODULE_CIF.MI.MP_Y_SIZE_INIT.U;
+ }
+
+ return (uint32)size;
+}
+
+
+IFX_INLINE uint32 IfxCif_Cam_getJpegEncodedSize(const IfxCif_Cam *cam)
+{
+ (void)cam;
+
+ /* 0x240 is size of JFIF header. */
+ return 0x240 + IfxCif_Cam_getFrameSize(cam);
+}
+
+
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastExtraAddress(const IfxCif_Cam *cam, IfxCif_ExtraPath z)
+{
+ Ifx_AddressValue address = 0;
+
+ if (z <= IfxCif_ExtraPath_5)
+ {
+ address = (Ifx_AddressValue)((uint32)cam->memAreas.ep[z].start + MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U);
+ }
+
+ return address;
+}
+
+
+IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastExtraCaptureInfo(const IfxCif_Cam *cam, IfxCif_ExtraPath z, Ifx_AddressValue *address, uint32 *size)
+{
+ const IfxCif_Cam_MemInfo *m;
+ *size = IfxCif_Cam_getExtraFrameSize(cam, z);
+ *address = IfxCif_Cam_getLastExtraAddress(cam, z);
+ m = IfxCif_Cam_getExtraPathMemInfo(cam, z);
+ return m;
+}
+
+
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getLastFrameAddress(const IfxCif_Cam *cam)
+{
+ (void)cam;
+
+ return (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U);
+}
+
+
+IFX_INLINE IFX_CONST IfxCif_Cam_MemInfo *IfxCif_Cam_getLastFrameCaptureInfo(const IfxCif_Cam *cam, Ifx_AddressValue *address, uint32 *size)
+{
+ const IfxCif_Cam_MemInfo *m;
+ *size = IfxCif_Cam_getFrameSize(cam);
+ *address = IfxCif_Cam_getLastFrameAddress(cam);
+ m = &(cam->memAreas.y);
+ return m;
+}
+
+
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextFrameAddress(const IfxCif_Cam *cam)
+{
+ (void)cam;
+
+ return (Ifx_AddressValue)(IFXEMEM_START_ADDR_CPU_CACHED + MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.U);
+}
+
+
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_getNextJpegFrameAddress(IfxCif_Cam *cam)
+{
+ Ifx_AddressValue address = IfxCif_Cam_getNextFrameAddress(cam);
+ cam->jfif = (IfxCif_Cam_JfifHeader *)address; /* note: no cast to (void *) to satisfy C++ compilers */
+ return address;
+}
+
+
+IFX_INLINE Ifx_AddressValue IfxCif_Cam_incrementAddress(const IfxCif_Cam *cam, Ifx_AddressValue address)
+{
+ address = (Ifx_AddressValue)((uint32)address + 4U);
+
+ if ((uint32)address >= (IFXEMEM_START_ADDR_CPU_CACHED + cam->memAreas.y.size))
+ { /* back to base */
+ address = (Ifx_AddressValue)IFXEMEM_START_ADDR_CPU_CACHED;
+ }
+
+ return address;
+}
+
+
+IFX_INLINE boolean IfxCif_Cam_isFrameReceptionComplete(const IfxCif_Cam *cam)
+{
+ (void)cam;
+
+ return MODULE_CIF.ISP.RIS.B.RIS_FRAME != 0;
+}
+
+
+IFX_INLINE boolean IfxCif_Cam_isJpegEncodingComplete(const IfxCif_Cam *cam)
+{
+ (void)cam;
+
+ return MODULE_CIF.JPE.STATUS_RIS.B.ENCODE_DONE != 0;
+}
+
+
+IFX_INLINE void IfxCif_Cam_skipPicture(const IfxCif_Cam *cam)
+{
+ (void)cam;
+ IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State_Disabled);
+ IfxCif_miSkipPicture();
+}
+
+
+#endif /* IFXCIF_CAM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Std/IfxCif.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Std/IfxCif.c
new file mode 100644
index 0000000..a634a67
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Std/IfxCif.c
@@ -0,0 +1,3964 @@
+/**
+ * \file IfxCif.c
+ * \brief CIF basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxCif.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxCif_clearEpError(IfxCif_EpErrorClearSources source)
+{
+ if (source == IfxCif_EpErrorClearSources_ExtraPath5SizeError)
+ {
+ MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_5_IC_SIZE_ERR_CLR = 1;
+ }
+ else if (source == IfxCif_EpErrorClearSources_ExtraPath4SizeError)
+ {
+ MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_4_IC_SIZE_ERR_CLR = 1;
+ }
+ else if (source == IfxCif_EpErrorClearSources_ExtraPath3SizeError)
+ {
+ MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_3_IC_SIZE_ERR_CLR = 1;
+ }
+ else if (source == IfxCif_EpErrorClearSources_ExtraPath2SizeError)
+ {
+ MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_2_IC_SIZE_ERR_CLR = 1;
+ }
+ else if (source == IfxCif_EpErrorClearSources_ExtraPath1SizeError)
+ {
+ MODULE_CIF.MIEP.STA_ERR_CLR.B.EP_1_IC_SIZE_ERR_CLR = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
+{
+ if (5 > z)
+ {
+ MODULE_CIF.MIEP.ICR.U = (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource)
+{
+ if (errorSource == IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule)
+ {
+ MODULE_CIF.ISP.ERR_CLR.B.OUTFORM_SIZE_ERR_CLR = 1;
+ }
+ else if (errorSource == IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule)
+ {
+ MODULE_CIF.ISP.ERR_CLR.B.IS_SIZE_ERR_CLR = 1;
+ }
+ else if (errorSource == IfxCif_IspErrorSources_SizeErrorInInformSubmodule)
+ {
+ MODULE_CIF.ISP.ERR_CLR.B.INFORM_SIZE_ERR_CLR = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource)
+{
+ if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
+ {
+ MODULE_CIF.ISP.ICR.B.ICR_WD_TRIG = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
+ {
+ MODULE_CIF.ISP.ICR.B.ICR_H_START = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
+ {
+ MODULE_CIF.ISP.ICR.B.ICR_V_START = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
+ {
+ MODULE_CIF.ISP.ICR.B.ICR_FRAME_IN = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
+ {
+ MODULE_CIF.ISP.ICR.B.ICR_PIC_SIZE_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
+ {
+ MODULE_CIF.ISP.ICR.B.ICR_DATA_LOSS = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
+ {
+ MODULE_CIF.ISP.ICR.B.ICR_FRAME = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
+ {
+ MODULE_CIF.ISP.ICR.B.ICR_ISP_OFF = 1;
+ }
+}
+
+
+void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource)
+{
+ if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
+ {
+ MODULE_CIF.JPE.ERROR_ISR.B.VLC_TABLE_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
+ {
+ MODULE_CIF.JPE.ERROR_ISR.B.R2B_IMG_SIZE_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
+ {
+ MODULE_CIF.JPE.ERROR_ISR.B.DCT_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
+ {
+ MODULE_CIF.JPE.ERROR_ISR.B.VLC_SYMBOL_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
+ {
+ MODULE_CIF.JPE.STATUS_ISR.B.GEN_HEADER_DONE = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
+ {
+ MODULE_CIF.JPE.STATUS_ISR.B.ENCODE_DONE = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource)
+{
+ if (interruptSource == IfxCif_MiInterruptSources_BusError)
+ {
+ MODULE_CIF.MI.ICR.B.BUS_ERROR = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
+ {
+ MODULE_CIF.MI.ICR.B.WRAP_MP_CR = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
+ {
+ MODULE_CIF.MI.ICR.B.WRAP_MP_CB = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
+ {
+ MODULE_CIF.MI.ICR.B.WRAP_MP_Y = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
+ {
+ MODULE_CIF.MI.ICR.B.FILL_MPY = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
+ {
+ MODULE_CIF.MI.ICR.B.MBLK_LINE = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
+ {
+ MODULE_CIF.MI.ICR.B.MP_FRAME_END = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source)
+{
+ if (source == IfxCif_MiStatusClearSources_ExtraPath5FifoFull)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.EP_5_FIFO_FULL = 1;
+ }
+ else if (source == IfxCif_MiStatusClearSources_ExtraPath4FifoFull)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.EP_4_FIFO_FULL = 1;
+ }
+ else if (source == IfxCif_MiStatusClearSources_ExtraPath3FifoFull)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.EP_3_FIFO_FULL = 1;
+ }
+ else if (source == IfxCif_MiStatusClearSources_ExtraPath2FifoFull)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.EP_2_FIFO_FULL = 1;
+ }
+ else if (source == IfxCif_MiStatusClearSources_ExtraPath1FifoFull)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.EP_1_FIFO_FULL = 1;
+ }
+ else if (source == IfxCif_MiStatusClearSources_BusWriteError)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.BUS_WRITE_ERROR = 1;
+ }
+ else if (source == IfxCif_MiStatusClearSources_MainPictureCrFifoFull)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.MP_CR_FIFO_FULL = 1;
+ }
+ else if (source == IfxCif_MiStatusClearSources_MainPictureCbFifoFull)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.MP_CB_FIFO_FULL = 1;
+ }
+ else if (source == IfxCif_MiStatusClearSources_MainPictureYFifoFull)
+ {
+ MODULE_CIF.MI.STATUS_CLR.B.MP_Y_FIFO_FULL = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource)
+{
+ if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
+ {
+ MODULE_CIF.WD.ICR.B.ICR_WD_VES_TO = 1;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
+ {
+ MODULE_CIF.WD.ICR.B.ICR_WD_VSE_TO = 1;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
+ {
+ MODULE_CIF.WD.ICR.B.ICR_WD_HES_TO = 1;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
+ {
+ MODULE_CIF.WD.ICR.B.ICR_WD_HSE_TO = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_dpResetCounter(IfxCif_DpCounters counter)
+{
+ if (counter == IfxCif_DpCounters_PredividerCounter)
+ {
+ MODULE_CIF.DP.CTRL.B.RST_PD = 1;
+ }
+ else if (counter == IfxCif_DpCounters_TimestampCounter)
+ {
+ MODULE_CIF.DP.CTRL.B.RST_TSC = 1;
+ }
+ else if (counter == IfxCif_DpCounters_LineNumberCounter)
+ {
+ MODULE_CIF.DP.CTRL.B.RST_LNC = 1;
+ }
+ else if (counter == IfxCif_DpCounters_FrameNumberCounter)
+ {
+ MODULE_CIF.DP.CTRL.B.RST_FNC = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z)
+{
+ if (5 > z)
+ {
+ Ifx_CIF_MIEP_CH_INIT init;
+ init.U = MODULE_CIF.MIEP.CH_1S[z].INIT.U;
+ init.B.MI_EP_CFG_UPD = 1;
+ MODULE_CIF.MIEP.CH_1S[z].INIT.U = init.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_epSkipPicture(IfxCif_ExtraPath z)
+{
+ if (5 > z)
+ {
+ Ifx_CIF_MIEP_CH_INIT init;
+ init.U = MODULE_CIF.MIEP.CH_1S[z].INIT.U;
+ init.B.MI_EP_SKIP = 1;
+ MODULE_CIF.MIEP.CH_1S[z].INIT.U = init.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISP.OUT_H_OFFS_SHD.B.ISP_OUT_H_OFFS_SHD;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISP.OUT_V_OFFS_SHD.B.ISP_OUT_V_OFFS_SHD;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISP.OUT_H_SIZE_SHD.B.ISP_OUT_H_SIZE_SHD;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISP.OUT_V_SIZE_SHD.B.ISP_OUT_V_SIZE_SHD;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (source == IfxCif_DpControlSources_UserDefinedSymbol8)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS8;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol7)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS7;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol6)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS6;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol5)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS5;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol4)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS4;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol3)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS3;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol2)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS2;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol1)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.UDS1;
+ }
+ else if (source == IfxCif_DpControlSources_TimestampCounter)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.TSC_EN;
+ }
+ else if (source == IfxCif_DpControlSources_LineNumberCounter)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.LNC_EN;
+ }
+ else if (source == IfxCif_DpControlSources_FrameNumberCounter)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.DP.CTRL.B.FNC_EN;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (counter == IfxCif_DpCounters_PredividerCounter)
+ {
+ retValue = MODULE_CIF.DP.PDIV_STAT.B.PDIV_VAL;
+ }
+ else if (counter == IfxCif_DpCounters_TimestampCounter)
+ {
+ retValue = MODULE_CIF.DP.TSC_STAT.B.TSC_VAL;
+ }
+ else if (counter == IfxCif_DpCounters_LineNumberCounter)
+ {
+ retValue = MODULE_CIF.DP.FLC_STAT.B.LNC_VAL;
+ }
+ else if (counter == IfxCif_DpCounters_FrameNumberCounter)
+ {
+ retValue = MODULE_CIF.DP.FLC_STAT.B.FNC_VAL;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getDpUserDefinedSymbol(uint8 x)
+{
+ uint16 retValue = 0xffff;
+
+ if (8 > x)
+ {
+ retValue = MODULE_CIF.DP.UDS_1S[x].B.UDS;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read base address from unsigned component of the register structure because lower bits are tied
+ * to 0 as base address needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].BASE_AD_SHD.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read base address from unsigned component of the register structure because lower bits are tied to 0
+ * as base address needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].BASE_AD_INIT.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DX;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DY;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].H_OFFS_SHD.B.H_OFFS_SHD;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].V_OFFS_SHD.B.V_OFFS_SHD;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].H_SIZE_SHD.B.H_SIZE_SHD;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].V_SIZE_SHD.B.V_SIZE_SHD;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (5 > z)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.EP_IC_1S[z].CTRL.B.IC_EN;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].MAX_DX.B.MAX_DX;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].MAX_DY.B.MAX_DY;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (5 > z)
+ {
+ if (0 != MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source)
+{
+ IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
+
+ if (source == IfxCif_EpErrorSources_ExtraPath5FifoFull)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_5_FIFO_FULL;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath4FifoFull)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_4_FIFO_FULL;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath3FifoFull)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_3_FIFO_FULL;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath2FifoFull)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_2_FIFO_FULL;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath1FifoFull)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_1_FIFO_FULL;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath5SizeError)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_5_IC_SIZE_ERR;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath4SizeError)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_4_IC_SIZE_ERR;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath3SizeError)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_3_IC_SIZE_ERR;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath2SizeError)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_2_IC_SIZE_ERR;
+ }
+ else if (source == IfxCif_EpErrorSources_ExtraPath1SizeError)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MIEP.STA_ERR.B.EP_1_IC_SIZE_ERR;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (5 > z)
+ {
+ if (feature == IfxCif_EpFeatures_InitOffsetCounter)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_OFFSET_EN;
+ }
+ else if (feature == IfxCif_EpFeatures_InitBaseAddress)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_BASE_EN;
+ }
+ else if (feature == IfxCif_EpFeatures_ByteSwap)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.BYTE_SWAP;
+ }
+ else if (feature == IfxCif_EpFeatures_PictureDataPath)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_ENABLE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read size from unsigned component of the register structure because lower bits are tied to 0
+ * as size needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].SIZE_INIT.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read interrupt offset from unsigned component of the register structure because lower bits are tied
+ * to 0 as interrupt offset needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_INIT.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read offset counter from unsigned component of the register structure because lower bits are tied
+ * to 0 as offset counter needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_INIT.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (5 > z)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL_SHD.B.EP_ENABLE_IN;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (5 > z)
+ {
+ if (0 !=
+ (MODULE_CIF.MIEP.IMSC.
+ U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read interrupt offset from unsigned component of the register structure because lower bits are tied
+ * to 0 as interrupt offset needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_SHD.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read offset counter from unsigned component of the register structure because lower bits are tied
+ * to 0 as offset counter needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_SHD.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read offset counter from unsigned component of the register structure because lower bits are tied
+ * to 0 as offset counter needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (5 > z)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MIEP.CH_1S[z].CTRL_SHD.B.EP_ENABLE_OUT;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z)
+{
+ uint8 retValue = 0xff;
+
+ if (5 > z)
+ {
+ retValue = MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getEpSize(IfxCif_ExtraPath z)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (5 > z)
+ {
+ /* read size from unsigned component of the register structure because lower bits are tied
+ * to 0 as size needs to be a word aligned value */
+ retValue = MODULE_CIF.MIEP.CH_1S[z].SIZE_SHD.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z)
+{
+ IfxCif_EpWriteFormat retValue = IfxCif_EpWriteFormat_Raw8Bit;
+
+ if (5 > z)
+ {
+ retValue = (IfxCif_EpWriteFormat)MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_WRITE_FORMAT;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table)
+{
+ uint8 retValue = 0xff;
+
+ if (table == IfxCif_HuffmanTables_Table0)
+ {
+ retValue = MODULE_CIF.JPE.TAC0_LEN.B.TAC0_LEN;
+ }
+ else if (table == IfxCif_HuffmanTables_Table1)
+ {
+ retValue = MODULE_CIF.JPE.TAC1_LEN.B.TAC1_LEN;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (table == IfxCif_HuffmanTables_Table0)
+ {
+ if (1 != (MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT & ~(1 << component)))
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (table == IfxCif_HuffmanTables_Table1)
+ {
+ if (0 != (MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT & ~(1 << component)))
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table)
+{
+ uint8 retValue = 0xff;
+
+ if (table == IfxCif_HuffmanTables_Table0)
+ {
+ retValue = MODULE_CIF.JPE.TDC0_LEN.B.TDC0_LEN;
+ }
+ else if (table == IfxCif_HuffmanTables_Table1)
+ {
+ retValue = MODULE_CIF.JPE.TDC1_LEN.B.TDC1_LEN;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (table == IfxCif_HuffmanTables_Table0)
+ {
+ if (1 != (MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT & ~(1 << component)))
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (table == IfxCif_HuffmanTables_Table1)
+ {
+ if (0 != (MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT & ~(1 << component)))
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (submodule == IfxCif_Submodules_Debug)
+ {
+ if (0 != MODULE_CIF.ICCL.B.CIF_DEBUG_PATH_CLK_EN)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_ExtraPaths)
+ {
+ if (0 != MODULE_CIF.ICCL.B.CIF_EXTRA_PATHS_CLK_ENABLE)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_LinearDownscaler)
+ {
+ if (0 != MODULE_CIF.ICCL.B.CIF_LIN_DSCALER_CLK_ENABLE)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_SecurityWatchdog)
+ {
+ if (0 != MODULE_CIF.ICCL.B.CIF_WATCHDOG_CLK_ENABLE)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+
+ else if (submodule == IfxCif_Submodules_MemoryInterface)
+ {
+ if (0 != MODULE_CIF.ICCL.B.CIF_MI_CLK_ENABLE)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_JpegEncoder)
+ {
+ if (0 != MODULE_CIF.ICCL.B.CIF_JPEG_CLK_ENABLE)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
+ {
+ if (0 != MODULE_CIF.ICCL.B.CIF_ISP_CLK_ENABLE)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISP.ACQ_H_SIZE.B.ACQ_H_SIZE;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISP.ACQ_V_SIZE.B.ACQ_V_SIZE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource)
+{
+ IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
+
+ if (errorSource == IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule)
+ {
+ if (0 != MODULE_CIF.ISP.ERR.B.OUTFORM_SIZE_ERR)
+ {
+ retValue = IfxCif_ErrorState_Error;
+ }
+ }
+ else if (errorSource == IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule)
+ {
+ if (0 != MODULE_CIF.ISP.ERR.B.IS_SIZE_ERR)
+ {
+ retValue = IfxCif_ErrorState_Error;
+ }
+ }
+ else if (errorSource == IfxCif_IspErrorSources_SizeErrorInInformSubmodule)
+ {
+ if (0 != MODULE_CIF.ISP.ERR.B.INFORM_SIZE_ERR)
+ {
+ retValue = IfxCif_ErrorState_Error;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getIspInputSelectionAppendState(void)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (1 != MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
+ {
+ if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_WD_TRIG)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
+ {
+ if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_H_START)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
+ {
+ if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_V_START)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
+ {
+ if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_FRAME_IN)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
+ {
+ if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_PIC_SIZE_ERR)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
+ {
+ if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_DATA_LOSS)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
+ {
+ if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_FRAME)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
+ {
+ if (0 != MODULE_CIF.ISP.IMSC.B.IMSC_ISP_OFF)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISPIS.DISPLACE.B.DX;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISPIS.DISPLACE.B.DY;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISPIS.H_OFFS_SHD.B.IS_H_OFFS_SHD;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISPIS.V_OFFS_SHD.B.IS_V_OFFS_SHD;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISPIS.H_SIZE_SHD.B.ISP_H_SIZE_SHD;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISPIS.V_SIZE_SHD.B.ISP_V_SIZE_SHD;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISPIS.MAX_DX.B.IS_MAX_DX;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISPIS.MAX_DY.B.IS_MAX_DY;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISPIS.H_OFFS.B.IS_H_OFFS;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISPIS.V_OFFS.B.IS_V_OFFS;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.ISPIS.H_SIZE.B.IS_H_SIZE;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.ISPIS.V_SIZE.B.IS_V_SIZE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getIspisRecenterEnableState(void)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (0 != MODULE_CIF.ISPIS.RECENTER.B.RECENTER)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source)
+{
+ IfxCif_JpeDebugSignalState retValue = IfxCif_JpeDebugSignalState_Inactive;
+
+ if (source == IfxCif_JpeDebugSignalSources_BadTableAccess)
+ {
+ retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_BAD_TABLE_ACCESS;
+ }
+ else if (source == IfxCif_JpeDebugSignalSources_VlcTableBusy)
+ {
+ retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_VLC_TABLE_BUSY;
+ }
+ else if (source == IfxCif_JpeDebugSignalSources_R2BMemoryFull)
+ {
+ retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_R2B_MEMORY_FULL;
+ }
+ else if (source == IfxCif_JpeDebugSignalSources_VlcEncodeBusy)
+ {
+ retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_VLC_ENCODE_BUSY;
+ }
+ else if (source == IfxCif_JpeDebugSignalSources_QiqTableAccess)
+ {
+ retValue = (IfxCif_JpeDebugSignalState)MODULE_CIF.JPE.DEBUG.B.DEB_QIQ_TABLE_ACC;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.VLC_TABLE_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.R2B_IMG_SIZE_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.DCT_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.JPE.ERROR_IMR.B.VLC_SYMBOL_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.JPE.STATUS_IMR.B.GEN_HEADER_DONE;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.JPE.STATUS_IMR.B.ENCODE_DONE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component)
+{
+ IfxCif_JpeQTableSelector retValue = IfxCif_JpeQTableSelector_Table0;
+
+ if (component == IfxCif_JpeQTableSelectorComponents_Y)
+ {
+ retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_Y_SELECT.B.TQ0_SELECT;
+ }
+ else if (component == IfxCif_JpeQTableSelectorComponents_U)
+ {
+ retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_U_SELECT.B.TQ1_SELECT;
+ }
+ else if (component == IfxCif_JpeQTableSelectorComponents_V)
+ {
+ retValue = (IfxCif_JpeQTableSelector)MODULE_CIF.JPE.TQ_V_SELECT.B.TQ2_SELECT;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (source == IfxCif_JpeScalingValueSources_Y)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.JPE.Y_SCALE_EN.B.Y_SCALE_EN;
+ }
+ else if (source == IfxCif_JpeScalingValueSources_CbCr)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.JPE.CBCR_SCALE_EN.B.CBCR_SCALE_EN;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getKernelResetRequestState(void)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if ((0 != MODULE_CIF.BBB.KRST0.B.RST) && (0 != MODULE_CIF.BBB.KRST1.B.RST))
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.LDS.CTRL.B.LDS_H_EN;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.LDS.CTRL.B.LDS_V_EN;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier)
+{
+ uint8 retValue = 0xff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = MODULE_CIF.LDS.FAC.B.LDS_H_FAC;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = MODULE_CIF.LDS.FAC.B.LDS_V_FAC;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier)
+{
+ IfxCif_LinearDownscalerScalingMode retValue = IfxCif_LinearDownscalerScalingMode_SingleSkip;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ retValue = (IfxCif_LinearDownscalerScalingMode)MODULE_CIF.LDS.CTRL.B.LDS_H_MODE;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ retValue = (IfxCif_LinearDownscalerScalingMode)MODULE_CIF.LDS.CTRL.B.LDS_V_MODE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component)
+{
+ uint32 retValue = 0xffffffff;
+
+ /* read base address from unsigned component of the register structure because lower bits are tied to 0
+ * as base address needs to be a word aligned value */
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ retValue = MODULE_CIF.MI.MP_Y_BASE_AD_INIT.U;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ retValue = MODULE_CIF.MI.MP_CB_BASE_AD_INIT.U;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ retValue = MODULE_CIF.MI.MP_CR_BASE_AD_INIT.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (5 > z)
+ {
+ if (0 !=
+ (MODULE_CIF.MIEP.MIS.
+ U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ else
+ {}
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
+ {
+ if (0 != MODULE_CIF.ISP.MIS.B.MIS_WD_TRIG)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
+ {
+ if (0 != MODULE_CIF.ISP.MIS.B.MIS_H_START)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
+ {
+ if (0 != MODULE_CIF.ISP.MIS.B.MIS_V_START)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
+ {
+ if (0 != MODULE_CIF.ISP.MIS.B.MIS_FRAME_IN)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
+ {
+ if (0 != MODULE_CIF.ISP.MIS.B.MIS_PIC_SIZE_ERR)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
+ {
+ if (0 != MODULE_CIF.ISP.MIS.B.MIS_DATA_LOSS)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
+ {
+ if (0 != MODULE_CIF.ISP.MIS.B.MIS_FRAME)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
+ {
+ if (0 != MODULE_CIF.ISP.MIS.B.MIS_ISP_OFF)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.VLC_TABLE_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.R2B_IMG_SIZE_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.DCT_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_MIS.B.VLC_SYMBOL_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_MIS.B.GEN_HEADER_DONE;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_MIS.B.ENCODE_DONE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (interruptSource == IfxCif_MiInterruptSources_BusError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.BUS_ERROR;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_CR;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_CB;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.WRAP_MP_Y;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.FILL_MP_Y;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.MBLK_LINE;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.MIS.B.MP_FRAME_END;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_VES_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_VSE_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_HES_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.MIS.B.MIS_WD_HSE_TO;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (dataPath == IfxCif_MiDataPaths_RawData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.RAW_ENABLE_IN;
+ }
+ else if (dataPath == IfxCif_MiDataPaths_JpegData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.JPEG_ENABLE_IN;
+ }
+ else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.MP_ENABLE_IN;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (dataPath == IfxCif_MiDataPaths_RawData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.RAW_ENABLE_OUT;
+ }
+ else if (dataPath == IfxCif_MiDataPaths_JpegData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.JPEG_ENABLE_OUT;
+ }
+ else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL_SHD.B.MP_ENABLE_OUT;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (dataPath == IfxCif_MiDataPaths_RawData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.RAW_ENABLE;
+ }
+ else if (dataPath == IfxCif_MiDataPaths_JpegData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.JPEG_ENABLE;
+ }
+ else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.CTRL.B.MP_ENABLE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (interruptSource == IfxCif_MiInterruptSources_BusError)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.BUS_ERROR;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_CR;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_CB;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.WRAP_MP_Y;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.FILL_MP_Y;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.MBLK_LINE;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.MI.IMSC.B.MP_FRAME_END;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ retValue = MODULE_CIF.MI.MP_Y_BASE_AD_SHD.B.MP_Y_BASE_AD;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ retValue = MODULE_CIF.MI.MP_CB_BASE_AD_SHD.B.MP_CB_BASE_AD;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ retValue = MODULE_CIF.MI.MP_CR_BASE_AD_SHD.B.MP_CR_BASE_AD;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component)
+{
+ uint32 retValue = 0xffffffff;
+
+ /* read size from unsigned component of the register structure because lower bits are tied to 0
+ * as size needs to be a word aligned value */
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ retValue = MODULE_CIF.MI.MP_Y_SIZE_INIT.U;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ retValue = MODULE_CIF.MI.MP_CB_SIZE_INIT.U;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ retValue = MODULE_CIF.MI.MP_CR_SIZE_INIT.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component)
+{
+ uint32 retValue = 0xffffffff;
+
+ /* read offset counter from unsigned component of the register structure because lower bits are tied to 0
+ * as offset counter needs to be a word aligned value */
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_INIT.U;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_INIT.U;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_INIT.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_SHD.B.MP_Y_OFFS_CNT;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_SHD.B.MP_CB_OFFS_CNT;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_SHD.B.MP_CR_OFFS_CNT;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component)
+{
+ uint32 retValue = 0xffffffff;
+
+ /* read offset counter from unsigned component of the register structure because lower bits are tied to 0
+ * as offset counter needs to be a word aligned value */
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ retValue = MODULE_CIF.MI.MP_Y_OFFS_CNT_START.U;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ retValue = MODULE_CIF.MI.MP_CB_OFFS_CNT_START.U;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ retValue = MODULE_CIF.MI.MP_CR_OFFS_CNT_START.U;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component)
+{
+ uint32 retValue = 0xffffffff;
+
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ retValue = MODULE_CIF.MI.MP_Y_SIZE_SHD.B.MP_Y_SIZE;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ retValue = MODULE_CIF.MI.MP_CB_SIZE_SHD.B.MP_CB_SIZE;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ retValue = MODULE_CIF.MI.MP_CR_SIZE_SHD.B.MP_CR_SIZE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source)
+{
+ IfxCif_ErrorState retValue = IfxCif_ErrorState_NoError;
+
+ if (source == IfxCif_MiStatusInformationSources_BusWriteError)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.BUS_WRITE_ERROR;
+ }
+ else if (source == IfxCif_MiStatusInformationSources_MainPictureCrFifoFull)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_CR_FIFO_FULL;
+ }
+ else if (source == IfxCif_MiStatusInformationSources_MainPictureCbFifoFull)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_CB_FIFO_FULL;
+ }
+ else if (source == IfxCif_MiStatusInformationSources_MainPictureYFifoFull)
+ {
+ retValue = (IfxCif_ErrorState)MODULE_CIF.MI.STATUS.B.MP_Y_FIFO_FULL;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (5 > z)
+ {
+ if (0 !=
+ (MODULE_CIF.MIEP.RIS.
+ U & (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count))))
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
+ {
+ if (0 != MODULE_CIF.ISP.RIS.B.RIS_WD_TRIG)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
+ {
+ if (0 != MODULE_CIF.ISP.RIS.B.RIS_H_START)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
+ {
+ if (0 != MODULE_CIF.ISP.RIS.B.RIS_V_START)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
+ {
+ if (0 != MODULE_CIF.ISP.RIS.B.RIS_FRAME_IN)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
+ {
+ if (0 != MODULE_CIF.ISP.RIS.B.RIS_PIC_SIZE_ERR)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
+ {
+ if (0 != MODULE_CIF.ISP.RIS.B.RIS_DATA_LOSS)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
+ {
+ if (0 != MODULE_CIF.ISP.RIS.B.RIS_FRAME)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
+ {
+ if (0 != MODULE_CIF.ISP.RIS.B.RIS_ISP_OFF)
+ {
+ retValue = IfxCif_InterruptTriggeredState_Triggered;
+ }
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.VLC_TABLE_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.R2B_IMG_SIZE_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.DCT_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.ERROR_RIS.B.VLC_SYMBOL_ERR;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_RIS.B.GEN_HEADER_DONE;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.JPE.STATUS_RIS.B.ENCODE_DONE;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (interruptSource == IfxCif_MiInterruptSources_BusError)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.BUS_ERROR;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_CR;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_CB;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.WRAP_MP_Y;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.FILL_MP_Y;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.MBLK_LINE;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.MI.RIS.B.MP_FRAME_END;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
+{
+ IfxCif_InterruptTriggeredState retValue = IfxCif_InterruptTriggeredState_NotTriggered;
+
+ if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_VES_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_VSE_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_HES_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
+ {
+ retValue = (IfxCif_InterruptTriggeredState)MODULE_CIF.WD.RIS.B.RIS_WD_HSE_TO;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_VES_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_VSE_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_HES_TO;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
+ {
+ retValue = (IfxCif_State)MODULE_CIF.WD.IMSC.B.IMSC_WD_HSE_TO;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter)
+{
+ uint16 retValue = 0xffff;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
+ {
+ retValue = MODULE_CIF.WD.H_TIMEOUT.B.WD_HES_TO;
+ }
+ else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
+ {
+ retValue = MODULE_CIF.WD.H_TIMEOUT.B.WD_HSE_TO;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
+ {
+ retValue = MODULE_CIF.WD.V_TIMEOUT.B.WD_VES_TO;
+ }
+ else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
+ {
+ retValue = MODULE_CIF.WD.V_TIMEOUT.B.WD_VSE_TO;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule)
+{
+ IfxCif_State retValue = IfxCif_State_Disabled;
+
+ if (submodule == IfxCif_Submodules_AllModules)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_GLOBAL_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_Debug)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_DEBUG_PATH_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_ExtraPaths)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_EXTRA_PATHS_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_LinearDownscaler)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_LIN_DSCALER_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_SecurityWatchdog)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_WATCHDOG_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_MemoryInterface)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_MI_SOFT_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_JpegEncoder)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_JPEG_SOFT_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_ISP_SOFT_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else if (submodule == IfxCif_Submodules_YCSplitter)
+ {
+ if (0 != MODULE_CIF.IRCL.B.CIF_YCS_SOFT_RST)
+ {
+ retValue = IfxCif_State_Enabled;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ return retValue;
+}
+
+
+void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length)
+{
+ uint16 i;
+ boolean programTable = TRUE;
+
+ if ((tableId == IfxCif_JpeTableId_QTable0) || (tableId == IfxCif_JpeTableId_QTable1))
+ {
+ MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
+ }
+ else if (tableId == IfxCif_JpeTableId_VlcDcTable0)
+ {
+ MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
+ IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables_Table0, length);
+ }
+ else if (tableId == IfxCif_JpeTableId_VlcDcTable1)
+ {
+ MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
+ IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables_Table1, length);
+ }
+ else if (tableId == IfxCif_JpeTableId_VlcAcTable0)
+ {
+ MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
+ IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables_Table0, length);
+ }
+ else if (tableId == IfxCif_JpeTableId_VlcAcTable1)
+ {
+ MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
+ IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables_Table1, length);
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ programTable = FALSE;
+ }
+
+ if (programTable != FALSE)
+ {
+ for (i = 0; i < (length / 2); i++)
+ {
+ Ifx_CIF_JPE_TABLE_DATA data;
+ data.B.TABLE_WDATA_H = tableEntry[i * 2 + 1];
+ data.B.TABLE_WDATA_L = tableEntry[i * 2];
+ MODULE_CIF.JPE.TABLE_DATA.U = data.U;
+ }
+ }
+}
+
+
+void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ cifBbb->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ cifBbb->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == cifBbb->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ cifBbb->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter)
+{
+ if (counter == IfxCif_SecurityWatchdogCounters_Predivider)
+ {
+ MODULE_CIF.WD.CTRL.B.RST_PD_CNT = 1;
+ }
+ else if (counter == IfxCif_SecurityWatchdogCounters_Vertical)
+ {
+ MODULE_CIF.WD.CTRL.B.RST_V_CNT = 1;
+ }
+ else if (counter == IfxCif_SecurityWatchdogCounters_Horizontal)
+ {
+ MODULE_CIF.WD.CTRL.B.RST_H_CNT = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState)
+{
+ if (source == IfxCif_DpControlSources_UserDefinedSymbol8)
+ {
+ MODULE_CIF.DP.CTRL.B.UDS8 = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol7)
+ {
+ MODULE_CIF.DP.CTRL.B.UDS7 = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol6)
+ {
+ MODULE_CIF.DP.CTRL.B.UDS6 = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol5)
+ {
+ MODULE_CIF.DP.CTRL.B.UDS5 = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol4)
+ {
+ MODULE_CIF.DP.CTRL.B.UDS4 = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol3)
+ {
+ MODULE_CIF.DP.CTRL.B.UDS3 = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol2)
+ {
+ MODULE_CIF.DP.CTRL.B.UDS2 = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_UserDefinedSymbol1)
+ {
+ MODULE_CIF.DP.CTRL.B.UDS1 = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_TimestampCounter)
+ {
+ MODULE_CIF.DP.CTRL.B.TSC_EN = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_LineNumberCounter)
+ {
+ MODULE_CIF.DP.CTRL.B.LNC_EN = enableState;
+ }
+ else if (source == IfxCif_DpControlSources_FrameNumberCounter)
+ {
+ MODULE_CIF.DP.CTRL.B.FNC_EN = enableState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue)
+{
+ // only the predivider counter can be set
+ if (counter == IfxCif_DpCounters_PredividerCounter)
+ {
+ MODULE_CIF.DP.PDIV_CTRL.B.PDIV_VAL = counterValue;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value)
+{
+ if (8 > x)
+ {
+ MODULE_CIF.DP.UDS_1S[x].B.UDS = value;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress)
+{
+ if (5 > z)
+ {
+ /* write base address to unsigned component of the register structure because lower bits are tied to 0
+ * as base address needs to be a word aligned value */
+ MODULE_CIF.MIEP.CH_1S[z].BASE_AD_INIT.U = (uint32)baseAddress;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
+{
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DX = displacement;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.EP_IC_1S[z].DISPLACE.B.DY = displacement;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState)
+{
+ if (5 > z)
+ {
+ MODULE_CIF.EP_IC_1S[z].CTRL.B.IC_EN = enableState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement)
+{
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.EP_IC_1S[z].MAX_DX.B.MAX_DX = displacement;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.EP_IC_1S[z].MAX_DY.B.MAX_DY = displacement;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset)
+{
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS = offset;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS = offset;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset)
+{
+ if (5 > z)
+ {
+ MODULE_CIF.EP_IC_1S[z].H_OFFS.B.H_OFFS = hOffset;
+ MODULE_CIF.EP_IC_1S[z].V_OFFS.B.V_OFFS = vOffset;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size)
+{
+ if (5 > z)
+ {
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE = size;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE = size;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize)
+{
+ if (5 > z)
+ {
+ MODULE_CIF.EP_IC_1S[z].H_SIZE.B.H_SIZE = hSize;
+ MODULE_CIF.EP_IC_1S[z].V_SIZE.B.V_SIZE = vSize;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState)
+{
+ if (5 > z)
+ {
+ if (feature == IfxCif_EpFeatures_InitOffsetCounter)
+ {
+ MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_OFFSET_EN = enableState;
+ }
+ else if (feature == IfxCif_EpFeatures_InitBaseAddress)
+ {
+ MODULE_CIF.MIEP.CH_1S[z].CTRL.B.INIT_BASE_EN = enableState;
+ }
+ else if (feature == IfxCif_EpFeatures_ByteSwap)
+ {
+ MODULE_CIF.MIEP.CH_1S[z].CTRL.B.BYTE_SWAP = enableState;
+ }
+ else if (feature == IfxCif_EpFeatures_PictureDataPath)
+ {
+ MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_ENABLE = enableState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size)
+{
+ if (5 > z)
+ {
+ /* write size to unsigned component of the register structure because lower bits are tied to 0
+ * as size needs to be a word aligned value */
+ MODULE_CIF.MIEP.CH_1S[z].SIZE_INIT.U = size;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset)
+{
+ if (5 > z)
+ {
+ /* write interrupt offset to unsigned component of the register structure because lower bits are tied
+ * to 0 as interrupt offset needs to be a word aligned value */
+ MODULE_CIF.MIEP.CH_1S[z].IRQ_OFFS_INIT.U = interruptOffset;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter)
+{
+ if (5 > z)
+ {
+ /* write offset counter to unsigned component of the register structure because lower bits are tied
+ * to 0 as offset counter needs to be a word aligned value */
+ MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_INIT.U = offsetCounter;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState)
+{
+ if (5 > z)
+ {
+ if (IfxCif_State_Enabled == interruptEnableState)
+ {
+ MODULE_CIF.MIEP.IMSC.U |=
+ (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
+ }
+ else
+ {
+ MODULE_CIF.MIEP.IMSC.U &=
+ ~(((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource)
+{
+ if (5 > z)
+ {
+ MODULE_CIF.MIEP.ISR.U = (((uint32)1 << (uint32)interruptSource) << ((uint32)z * IfxCif_EpInterrupts_Count));
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter)
+{
+ if (5 > z)
+ {
+ /* write offset counter to unsigned component of the register structure because lower bits are tied
+ * to 0 as offset counter needs to be a word aligned value */
+ MODULE_CIF.MIEP.CH_1S[z].OFFS_CNT_START.U = offsetCounter;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value)
+{
+ if (5 > z)
+ {
+ MODULE_CIF.EP_IC_1S[z].RECENTER.B.RECENTER = value;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat)
+{
+ if (5 > z)
+ {
+ MODULE_CIF.MIEP.CH_1S[z].CTRL.B.EP_WRITE_FORMAT = writeFormat;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length)
+{
+ if (table == IfxCif_HuffmanTables_Table0)
+ {
+ MODULE_CIF.JPE.TAC0_LEN.U = length; // 32-bit access is needed
+ }
+ else if (table == IfxCif_HuffmanTables_Table1)
+ {
+ MODULE_CIF.JPE.TAC1_LEN.U = length; // 32-bit access is needed
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
+{
+ if (table == IfxCif_HuffmanTables_Table0)
+ {
+ MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT &= ~(1 << component);
+ }
+ else if (table == IfxCif_HuffmanTables_Table1)
+ {
+ MODULE_CIF.JPE.AC_TABLE_SELECT.B.AC_TABLE_SELECT |= (1 << component);
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length)
+{
+ if (table == IfxCif_HuffmanTables_Table0)
+ {
+ MODULE_CIF.JPE.TDC0_LEN.U = length; // 32-bit access is needed
+ }
+ else if (table == IfxCif_HuffmanTables_Table1)
+ {
+ MODULE_CIF.JPE.TDC1_LEN.U = length; // 32-bit access is needed
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component)
+{
+ if (table == IfxCif_HuffmanTables_Table0)
+ {
+ MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT &= ~(1 << component);
+ }
+ else if (table == IfxCif_HuffmanTables_Table1)
+ {
+ MODULE_CIF.JPE.DC_TABLE_SELECT.B.DC_TABLE_SELECT |= (1 << component);
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState)
+{
+ Ifx_CIF_ICCL iccl = MODULE_CIF.ICCL;
+
+ if (submodule == IfxCif_Submodules_Debug)
+ {
+ iccl.B.CIF_DEBUG_PATH_CLK_EN = clockState;
+ }
+ else if (submodule == IfxCif_Submodules_ExtraPaths)
+ {
+ iccl.B.CIF_EXTRA_PATHS_CLK_ENABLE = clockState;
+ }
+ else if (submodule == IfxCif_Submodules_LinearDownscaler)
+ {
+ iccl.B.CIF_LIN_DSCALER_CLK_ENABLE = clockState;
+ }
+ else if (submodule == IfxCif_Submodules_SecurityWatchdog)
+ {
+ iccl.B.CIF_WATCHDOG_CLK_ENABLE = clockState;
+ }
+ else if (submodule == IfxCif_Submodules_MemoryInterface)
+ {
+ iccl.B.CIF_MI_CLK_ENABLE = clockState;
+ }
+ else if (submodule == IfxCif_Submodules_JpegEncoder)
+ {
+ iccl.B.CIF_JPEG_CLK_ENABLE = clockState;
+ }
+ else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
+ {
+ iccl.B.CIF_ISP_CLK_ENABLE = clockState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ MODULE_CIF.ICCL.U = iccl.U;
+}
+
+
+void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS = offset;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS = offset;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.ISP.ACQ_H_SIZE.B.ACQ_H_SIZE = size;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.ISP.ACQ_V_SIZE.B.ACQ_V_SIZE = size;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState)
+{
+ /* CIF module has a NO append enable bit -> invert appendState */
+ if (appendState == IfxCif_State_Enabled)
+ {
+ MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP = 0;
+ }
+ else
+ {
+ MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION_NO_APP = 1;
+ }
+}
+
+
+void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState)
+{
+ if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
+ {
+ MODULE_CIF.ISP.IMSC.B.IMSC_WD_TRIG = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
+ {
+ MODULE_CIF.ISP.IMSC.B.IMSC_H_START = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
+ {
+ MODULE_CIF.ISP.IMSC.B.IMSC_V_START = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
+ {
+ MODULE_CIF.ISP.IMSC.B.IMSC_FRAME_IN = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
+ {
+ MODULE_CIF.ISP.IMSC.B.IMSC_PIC_SIZE_ERR = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
+ {
+ MODULE_CIF.ISP.IMSC.B.IMSC_DATA_LOSS = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
+ {
+ MODULE_CIF.ISP.IMSC.B.IMSC_FRAME = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
+ {
+ MODULE_CIF.ISP.IMSC.B.IMSC_ISP_OFF = interruptEnableState;
+ }
+}
+
+
+void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource)
+{
+ if (interruptSource == IfxCif_IspInterruptSources_SecurityWatchdogTimeout)
+ {
+ MODULE_CIF.ISP.ISR.B.ISR_WD_TRIG = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfHSync)
+ {
+ MODULE_CIF.ISP.ISR.B.ISR_H_START = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_StartEdgeOfVSync)
+ {
+ MODULE_CIF.ISP.ISR.B.ISR_V_START = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_SampledInputFrameComplete)
+ {
+ MODULE_CIF.ISP.ISR.B.ISR_FRAME_IN = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_PictureSizeViolationOccurred)
+ {
+ MODULE_CIF.ISP.ISR.B.ISR_PIC_SIZE_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_LossOfData)
+ {
+ MODULE_CIF.ISP.ISR.B.ISR_DATA_LOSS = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_FrameCompletelyPutOut)
+ {
+ MODULE_CIF.ISP.ISR.B.ISR_FRAME = 1;
+ }
+ else if (interruptSource == IfxCif_IspInterruptSources_IspTurnedOff)
+ {
+ MODULE_CIF.ISP.ISR.B.ISR_ISP_OFF = 1;
+ }
+}
+
+
+void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS = offset;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS = offset;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE = pictureSize;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE = pictureSize;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.ISPIS.DISPLACE.B.DX = displacement;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.ISPIS.DISPLACE.B.DY = displacement;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.ISPIS.MAX_DX.B.IS_MAX_DX = displacement;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.ISPIS.MAX_DY.B.IS_MAX_DY = displacement;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.ISPIS.H_OFFS.B.IS_H_OFFS = offset;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.ISPIS.V_OFFS.B.IS_V_OFFS = offset;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.ISPIS.H_SIZE.B.IS_H_SIZE = size;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.ISPIS.V_SIZE.B.IS_V_SIZE = size;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState)
+{
+ if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
+ {
+ MODULE_CIF.JPE.ERROR_IMR.B.VLC_TABLE_ERR = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
+ {
+ MODULE_CIF.JPE.ERROR_IMR.B.R2B_IMG_SIZE_ERR = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
+ {
+ MODULE_CIF.JPE.ERROR_IMR.B.DCT_ERR = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
+ {
+ MODULE_CIF.JPE.ERROR_IMR.B.VLC_SYMBOL_ERR = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
+ {
+ MODULE_CIF.JPE.STATUS_IMR.B.GEN_HEADER_DONE = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
+ {
+ MODULE_CIF.JPE.STATUS_IMR.B.ENCODE_DONE = interruptEnableState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource)
+{
+ if (interruptSource == IfxCif_JpeInterruptSources_VlcTableError)
+ {
+ MODULE_CIF.JPE.ERROR_ICR.B.VLC_TABLE_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_R2BImageSizeError)
+ {
+ MODULE_CIF.JPE.ERROR_ICR.B.R2B_IMG_SIZE_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_DcTableError)
+ {
+ MODULE_CIF.JPE.ERROR_ICR.B.DCT_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_VlcSymbolError)
+ {
+ MODULE_CIF.JPE.ERROR_ICR.B.VLC_SYMBOL_ERR = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_HeaderGenerationComplete)
+ {
+ MODULE_CIF.JPE.STATUS_ICR.B.GEN_HEADER_DONE = 1;
+ }
+ else if (interruptSource == IfxCif_JpeInterruptSources_EncodingComplete)
+ {
+ MODULE_CIF.JPE.STATUS_ICR.B.ENCODE_DONE = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector)
+{
+ if (component == IfxCif_JpeQTableSelectorComponents_Y)
+ {
+ MODULE_CIF.JPE.TQ_Y_SELECT.B.TQ0_SELECT = selector;
+ }
+ else if (component == IfxCif_JpeQTableSelectorComponents_U)
+ {
+ MODULE_CIF.JPE.TQ_U_SELECT.B.TQ1_SELECT = selector;
+ }
+ else if (component == IfxCif_JpeQTableSelectorComponents_V)
+ {
+ MODULE_CIF.JPE.TQ_V_SELECT.B.TQ2_SELECT = selector;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable)
+{
+ if (source == IfxCif_JpeScalingValueSources_Y)
+ {
+ MODULE_CIF.JPE.Y_SCALE_EN.B.Y_SCALE_EN = scalingEnable;
+ }
+ else if (source == IfxCif_JpeScalingValueSources_CbCr)
+ {
+ MODULE_CIF.JPE.CBCR_SCALE_EN.B.CBCR_SCALE_EN = scalingEnable;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE = size;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE = size;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState)
+{
+ Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ ldsCtrl.B.LDS_H_EN = enableState;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ ldsCtrl.B.LDS_V_EN = enableState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
+}
+
+
+void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor)
+{
+ Ifx_CIF_LDS_FAC ldsFac = MODULE_CIF.LDS.FAC;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ ldsFac.B.LDS_H_FAC = factor;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ ldsFac.B.LDS_V_FAC = factor;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ MODULE_CIF.LDS.FAC.U = ldsFac.U;
+}
+
+
+void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor)
+{
+ Ifx_CIF_LDS_FAC ldsFac = MODULE_CIF.LDS.FAC;
+
+ ldsFac.B.LDS_H_FAC = horizFactor;
+ ldsFac.B.LDS_V_FAC = vertFactor;
+ MODULE_CIF.LDS.FAC.U = ldsFac.U;
+}
+
+
+void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode)
+{
+ Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
+
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ ldsCtrl.B.LDS_H_MODE = mode;
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ ldsCtrl.B.LDS_V_MODE = mode;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+
+ MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
+}
+
+
+void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode)
+{
+ Ifx_CIF_LDS_CTRL ldsCtrl = MODULE_CIF.LDS.CTRL;
+
+ ldsCtrl.B.LDS_H_EN = (horizMode != IfxCif_LinearDownscalerScalingMode_Disabled);
+ ldsCtrl.B.LDS_V_EN = (vertMode != IfxCif_LinearDownscalerScalingMode_Disabled);
+ ldsCtrl.B.LDS_H_MODE = horizMode;
+ ldsCtrl.B.LDS_V_MODE = vertMode;
+ MODULE_CIF.LDS.CTRL.U = ldsCtrl.U;
+}
+
+
+void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState)
+{
+ if (dataPath == IfxCif_MiDataPaths_RawData)
+ {
+ MODULE_CIF.MI.CTRL.B.RAW_ENABLE = enableState;
+ }
+ else if (dataPath == IfxCif_MiDataPaths_JpegData)
+ {
+ MODULE_CIF.MI.CTRL.B.JPEG_ENABLE = enableState;
+ }
+ else if (dataPath == IfxCif_MiDataPaths_MainPictureData)
+ {
+ MODULE_CIF.MI.CTRL.B.MP_ENABLE = enableState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState)
+{
+ if (interruptSource == IfxCif_MiInterruptSources_BusError)
+ {
+ MODULE_CIF.MI.IMSC.B.BUS_ERROR = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
+ {
+ MODULE_CIF.MI.IMSC.B.WRAP_MP_CR = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
+ {
+ MODULE_CIF.MI.IMSC.B.WRAP_MP_CB = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
+ {
+ MODULE_CIF.MI.IMSC.B.WRAP_MP_Y = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
+ {
+ MODULE_CIF.MI.IMSC.B.FILL_MP_Y = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
+ {
+ MODULE_CIF.MI.IMSC.B.MBLK_LINE = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
+ {
+ MODULE_CIF.MI.IMSC.B.MP_FRAME_END = interruptEnableState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource)
+{
+ if (interruptSource == IfxCif_MiInterruptSources_BusError)
+ {
+ MODULE_CIF.MI.ISR.B.Bus_ERROR = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCr)
+ {
+ MODULE_CIF.MI.ISR.B.WRAP_MP_CR = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureCb)
+ {
+ MODULE_CIF.MI.ISR.B.WRAP_MP_CB = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_WrapMainPictureY)
+ {
+ MODULE_CIF.MI.ISR.B.WRAP_MP_Y = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_FillMainPictureY)
+ {
+ MODULE_CIF.MI.ISR.B.FILL_MP_Y = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MacroBlockLine)
+ {
+ MODULE_CIF.MI.ISR.B.MBLK_LINE = 1;
+ }
+ else if (interruptSource == IfxCif_MiInterruptSources_MainPictureFrameEnd)
+ {
+ MODULE_CIF.MI.ISR.B.MP_FRAME_END = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength)
+{
+ MODULE_CIF.MI.CTRL.B.BURST_LEN_LUM = burstLength;
+}
+
+
+void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address)
+{
+ uint32 baseAddress = (uint32)address;
+
+ /* write base address to unsigned component of the register structure because lower bits are tied to 0
+ * as base address needs to be a word aligned value */
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ MODULE_CIF.MI.MP_Y_BASE_AD_INIT.U = baseAddress;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ MODULE_CIF.MI.MP_CB_BASE_AD_INIT.U = baseAddress;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ MODULE_CIF.MI.MP_CR_BASE_AD_INIT.U = baseAddress;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size)
+{
+ /* write size to unsigned component of the register structure because lower bits are tied to 0
+ * as size needs to be a word aligned value */
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ MODULE_CIF.MI.MP_Y_SIZE_INIT.U = size;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ MODULE_CIF.MI.MP_CB_SIZE_INIT.U = size;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ MODULE_CIF.MI.MP_CR_SIZE_INIT.U = size;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter)
+{
+ /* write offset counter to unsigned component of the register structure because lower bits are tied to 0
+ * as offset counter needs to be a word aligned value */
+ if (component == IfxCif_MiMainPicturePathComponents_Y)
+ {
+ MODULE_CIF.MI.MP_Y_OFFS_CNT_INIT.U = offsetCounter;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cb)
+ {
+ MODULE_CIF.MI.MP_CB_OFFS_CNT_INIT.U = offsetCounter;
+ }
+ else if (component == IfxCif_MiMainPicturePathComponents_Cr)
+ {
+ MODULE_CIF.MI.MP_CR_OFFS_CNT_INIT.U = offsetCounter;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setModuleStateRequest(IfxCif_State state)
+{
+ uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(l_TempVar);
+
+ /* bit is inverted */
+ MODULE_CIF.BBB.CLC.B.DISR = (IfxCif_State_Enabled == state) ? 0 : 1;
+
+ while (MODULE_CIF.BBB.CLC.B.DISS == (IfxCif_State_Enabled == state) ? 1 : 0)
+ {}
+
+ IfxScuWdt_setCpuEndinit(l_TempVar);
+}
+
+
+void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState)
+{
+ if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
+ {
+ MODULE_CIF.WD.IMSC.B.IMSC_WD_VES_TO = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
+ {
+ MODULE_CIF.WD.IMSC.B.IMSC_WD_VSE_TO = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
+ {
+ MODULE_CIF.WD.IMSC.B.IMSC_WD_HES_TO = interruptEnableState;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
+ {
+ MODULE_CIF.WD.IMSC.B.IMSC_WD_HSE_TO = interruptEnableState;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource)
+{
+ if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout)
+ {
+ MODULE_CIF.WD.ISR.B.ISR_WD_VES_TO = 1;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout)
+ {
+ MODULE_CIF.WD.ISR.B.ISR_WD_VSE_TO = 1;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout)
+ {
+ MODULE_CIF.WD.ISR.B.ISR_WD_HES_TO = 1;
+ }
+ else if (interruptSource == IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout)
+ {
+ MODULE_CIF.WD.ISR.B.ISR_WD_HSE_TO = 1;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout)
+{
+ if (tier == IfxCif_ImageTiers_Horizontal)
+ {
+ if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
+ {
+ MODULE_CIF.WD.H_TIMEOUT.B.WD_HES_TO = timeout;
+ }
+ else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
+ {
+ MODULE_CIF.WD.H_TIMEOUT.B.WD_HSE_TO = timeout;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else if (tier == IfxCif_ImageTiers_Vertical)
+ {
+ if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_EndStart)
+ {
+ MODULE_CIF.WD.V_TIMEOUT.B.WD_VES_TO = timeout;
+ }
+ else if (timeoutCounter == IfxCif_SecurityWatchdogTimeoutCounters_StartEnd)
+ {
+ MODULE_CIF.WD.V_TIMEOUT.B.WD_VSE_TO = timeout;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
+
+
+void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode)
+{
+ if (submodule == IfxCif_Submodules_AllModules)
+ {
+ MODULE_CIF.IRCL.B.CIF_GLOBAL_RST = resetMode;
+ }
+ else if (submodule == IfxCif_Submodules_Debug)
+ {
+ MODULE_CIF.IRCL.B.CIF_DEBUG_PATH_RST = resetMode;
+ }
+ else if (submodule == IfxCif_Submodules_ExtraPaths)
+ {
+ MODULE_CIF.IRCL.B.CIF_EXTRA_PATHS_RST = resetMode;
+ }
+ else if (submodule == IfxCif_Submodules_LinearDownscaler)
+ {
+ MODULE_CIF.IRCL.B.CIF_LIN_DSCALER_RST = resetMode;
+ }
+ else if (submodule == IfxCif_Submodules_SecurityWatchdog)
+ {
+ MODULE_CIF.IRCL.B.CIF_WATCHDOG_RST = resetMode;
+ }
+ else if (submodule == IfxCif_Submodules_MemoryInterface)
+ {
+ MODULE_CIF.IRCL.B.CIF_MI_SOFT_RST = resetMode;
+ }
+ else if (submodule == IfxCif_Submodules_JpegEncoder)
+ {
+ MODULE_CIF.IRCL.B.CIF_JPEG_SOFT_RST = resetMode;
+ }
+ else if (submodule == IfxCif_Submodules_ImageSignalProcessing)
+ {
+ MODULE_CIF.IRCL.B.CIF_ISP_SOFT_RST = resetMode;
+ }
+ else if (submodule == IfxCif_Submodules_YCSplitter)
+ {
+ MODULE_CIF.IRCL.B.CIF_YCS_SOFT_RST = resetMode;
+ }
+ else
+ {
+ IFXCIF_DEBUG;
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Std/IfxCif.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Std/IfxCif.h
new file mode 100644
index 0000000..8d9478a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Std/IfxCif.h
@@ -0,0 +1,3040 @@
+/**
+ * \file IfxCif.h
+ * \brief CIF basic functionality
+ * \ingroup IfxLld_Cif
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cif_Std_stdEnumerations Standard Enumerations
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_ispEnum ISP Enumerations
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_stdFunctions Standard Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_ispFunctions ISP Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_ldsFunctions Linear Downscaler Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_ldsEnumerations Linear Downscaler Enumerations
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_miFunctions Memory Interface Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_miEnumerations Memory Interface Enumerations
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_jpeFunctions JPEG Encoder Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_jpeEnumerations JPEG Encoder Enumerations
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_swFunctions Security Watchdog Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_swEnumerations Security Watchdog Enumerations
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_ispisFunctions ISP Image Stabilization Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_ispisEnumerations ISP Image Stabilization Enumerations
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_epFunctions Extra Path Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_epEnumerations Extra Path Enumerations
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_dpFunctions Debug Path Functions
+ * \ingroup IfxLld_Cif_Std
+ * \defgroup IfxLld_Cif_Std_dpEnumerations Debug Path Enumerations
+ * \ingroup IfxLld_Cif_Std
+ */
+
+#ifndef IFXCIF_H
+#define IFXCIF_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxCif_cfg.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "IfxCif_bf.h"
+#include "IfxCif_reg.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Cif_Std_stdEnumerations
+ * \{ */
+/** \brief Enumerator for data path of main path
+ */
+typedef enum
+{
+ IfxCif_DataPathSelectorForMainPath_Disabled = 0, /**< \brief Main path is disabled */
+ IfxCif_DataPathSelectorForMainPath_DataToMemoryInterfaceUncompressed = 1, /**< \brief Main path is routed to the Memory Interface */
+ IfxCif_DataPathSelectorForMainPath_DataToJpegEncoder = 2 /**< \brief Main path is routed to the JPEG encoder */
+} IfxCif_DataPathSelectorForMainPath;
+
+/** \brief Enumerator for the state of an error
+ */
+typedef enum
+{
+ IfxCif_ErrorState_NoError = 0, /**< \brief No error occurred */
+ IfxCif_ErrorState_Error = 1 /**< \brief Error occurred */
+} IfxCif_ErrorState;
+
+/** \brief Enumerator for the extra paths
+ */
+typedef enum
+{
+ IfxCif_ExtraPath_1 = 0,
+ IfxCif_ExtraPath_2 = 1,
+ IfxCif_ExtraPath_3 = 2,
+ IfxCif_ExtraPath_4 = 3,
+ IfxCif_ExtraPath_5 = 4
+} IfxCif_ExtraPath;
+
+/** \brief Enumerator for tiers
+ */
+typedef enum
+{
+ IfxCif_ImageTiers_Horizontal = 0, /**< \brief Horizontal tier */
+ IfxCif_ImageTiers_Vertical = 1 /**< \brief Vertical tier */
+} IfxCif_ImageTiers;
+
+/** \brief Enumerator for input interfaces supported by the CIF interface
+ */
+typedef enum
+{
+ IfxCif_InputInterface_ParallelInterface = 0 /**< \brief Parallel interface (currently the only supported input interface) */
+} IfxCif_InputInterface;
+
+/** \brief Enumerator for the state of an interrupt
+ */
+typedef enum
+{
+ IfxCif_InterruptTriggeredState_NotTriggered = 0, /**< \brief Interrupt was not triggered */
+ IfxCif_InterruptTriggeredState_Triggered = 1 /**< \brief Interrupt was triggered */
+} IfxCif_InterruptTriggeredState;
+
+/** \brief Enumerator for port input selections
+ */
+typedef enum
+{
+ IfxCif_PortInputSelection_PinMapping0 = 0, /**< \brief pin mapping 0 */
+ IfxCif_PortInputSelection_PinMapping1 = 1 /**< \brief pin mapping 1 */
+} IfxCif_PortInputSelection;
+
+/** \brief Enumerator for states
+ */
+typedef enum
+{
+ IfxCif_State_Disabled = 0, /**< \brief Disabled state */
+ IfxCif_State_Enabled = 1 /**< \brief Enabled state */
+} IfxCif_State;
+
+/** \brief Enumerator for submodules of the CIF interface
+ */
+typedef enum
+{
+ IfxCif_Submodules_AllModules = 0, /**< \brief All submodules */
+ IfxCif_Submodules_Debug = 1, /**< \brief Debug submodule */
+ IfxCif_Submodules_ExtraPaths = 2, /**< \brief Extra Paths submodule */
+ IfxCif_Submodules_LinearDownscaler = 3, /**< \brief Linear Downscaler submodule */
+ IfxCif_Submodules_SecurityWatchdog = 4, /**< \brief Security Watchdog submodule */
+ IfxCif_Submodules_MemoryInterface = 5, /**< \brief Memory Interface submodule */
+ IfxCif_Submodules_JpegEncoder = 6, /**< \brief JPEG Encoder submodule */
+ IfxCif_Submodules_ImageSignalProcessing = 7, /**< \brief Image Signal Processing submodule */
+ IfxCif_Submodules_YCSplitter = 8 /**< \brief Y/C-Splitter submodule */
+} IfxCif_Submodules;
+
+/** \brief Enumerator for channel mode of Y/C splitter
+ */
+typedef enum
+{
+ IfxCif_YCSplitterChannelMode_Disabled = 0, /**< \brief Y/C splitter is disabled */
+ IfxCif_YCSplitterChannelMode_MainPathAndRawMode = 1 /**< \brief Y/C splitter is enabled for main path and RAW mode */
+} IfxCif_YCSplitterChannelMode;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_ispEnum
+ * \{ */
+/** \brief Enumerator for the ISP CCIR sequence
+ */
+typedef enum
+{
+ IfxCif_IspCcirSequence_YCbYCr = 0, /**< \brief YCbYCr */
+ IfxCif_IspCcirSequence_YCrYCb = 1, /**< \brief YCrYCb */
+ IfxCif_IspCcirSequence_CbYCrY = 2 /**< \brief CbYCrY */
+} IfxCif_IspCcirSequence;
+
+/** \brief Enumerator for the clipping range of the crominance for the ISP output
+ */
+typedef enum
+{
+ IfxCif_IspColorSpaceMatrixCrominanceClippingRange_16To240 = 0, /**< \brief CbCr range 16..240 according to ITU-R BT.601 standard */
+ IfxCif_IspColorSpaceMatrixCrominanceClippingRange_0To255 = 1 /**< \brief full UV range 0..255 */
+} IfxCif_IspColorSpaceMatrixCrominanceClippingRange;
+
+/** \brief Enumerator for the clipping range of the luminance for the ISP output
+ */
+typedef enum
+{
+ IfxCif_IspColorSpaceMatrixLuminanceClippingRange_16To235 = 0, /**< \brief Y range 16..235 according to ITU-R BT.601 standard */
+ IfxCif_IspColorSpaceMatrixLuminanceClippingRange_0To255 = 1 /**< \brief full Y range 0..255 */
+} IfxCif_IspColorSpaceMatrixLuminanceClippingRange;
+
+/** \brief Enumerator for error sources of the ISP module
+ */
+typedef enum
+{
+ IfxCif_IspErrorSources_SizeErrorInOutmuxSubmodule = 0, /**< \brief Size error is generated in outmux submodule */
+ IfxCif_IspErrorSources_SizeErrorInImageStabilizationSubmodule = 1, /**< \brief Size error is generated in image stabilization submodule */
+ IfxCif_IspErrorSources_SizeErrorInInformSubmodule = 2 /**< \brief ize error is generated in inform submodule */
+} IfxCif_IspErrorSources;
+
+/** \brief Enumerator for the sampled input fields
+ */
+typedef enum
+{
+ IfxCif_IspFieldSelection_AllFields = 0, /**< \brief sample all fields (don't care about fields) */
+ IfxCif_IspFieldSelection_OnlyEvenFields = 1, /**< \brief sample only even fields */
+ IfxCif_IspFieldSelection_OnlyOddFields = 2 /**< \brief sample only odd fields */
+} IfxCif_IspFieldSelection;
+
+/** \brief Enumerator for current field information
+ */
+typedef enum
+{
+ IfxCif_IspInformFieldInformation_Odd = 0, /**< \brief Odd field */
+ IfxCif_IspInformFieldInformation_Even = 1 /**< \brief Even field */
+} IfxCif_IspInformFieldInformation;
+
+/** \brief Enumerator for the supported input interfaces of the ISP
+ */
+typedef enum
+{
+ IfxCif_IspInputInterface_8BitExternalInterfaceAppendMsb = 0, /**< \brief 8-bit external Interface if enabled append 8 MSBs as LSBs */
+ IfxCif_IspInputInterface_8BitExternalInterfaceAppendZeros = 1, /**< \brief 8-bit external Interface if enabled append 8 zeroes as LSBs */
+ IfxCif_IspInputInterface_10BitExternalInterfaceAppendMsb = 2, /**< \brief 10-bit external Interface if enabled append 6 MSBs as LSBs */
+ IfxCif_IspInputInterface_10BitExternalInterfaceAppendZeros = 3, /**< \brief 10-bit external Interface if enabled append 6 zeroes as LSBs */
+ IfxCif_IspInputInterface_12BitExternalInterfaceAppendMsb = 4, /**< \brief 12-bit external Interface if enabled append 4 MSBs as LSBs */
+ IfxCif_IspInputInterface_12BitExternalInterfaceAppendZeros = 5, /**< \brief 12-bit external Interface if enabled append 4 zeroes as LSBs */
+ IfxCif_IspInputInterface_14BitExternalInterfaceAppendMsb = 6, /**< \brief 14-bit external Interface if enabled append 2 MSBs as LSBs */
+ IfxCif_IspInputInterface_14BitExternalInterfaceAppendZeros = 7, /**< \brief 14-bit external Interface if enabled append 2 zeroes as LSBs */
+ IfxCif_IspInputInterface_16BitExternalInterface = 8 /**< \brief 16-bit external Interface */
+} IfxCif_IspInputInterface;
+
+/** \brief Enumerator for interrupt sources of the ISP submodule
+ */
+typedef enum
+{
+ IfxCif_IspInterruptSources_SecurityWatchdogTimeout = 0, /**< \brief A watchdog timeout was triggered at the ISP input */
+ IfxCif_IspInterruptSources_StartEdgeOfHSync = 1, /**< \brief Start Edge of h_sync */
+ IfxCif_IspInterruptSources_StartEdgeOfVSync = 2, /**< \brief Start Edge of v_sync */
+ IfxCif_IspInterruptSources_SampledInputFrameComplete = 3, /**< \brief Sampled Input Frame is Complete */
+ IfxCif_IspInterruptSources_PictureSizeViolationOccurred = 4, /**< \brief Picture Size Violation Occurred */
+ IfxCif_IspInterruptSources_LossOfData = 5, /**< \brief Loss of Data */
+ IfxCif_IspInterruptSources_FrameCompletelyPutOut = 6, /**< \brief Frame was Completely Put Out */
+ IfxCif_IspInterruptSources_IspTurnedOff = 7 /**< \brief Isp was Turned Off (vsynced) */
+} IfxCif_IspInterruptSources;
+
+/** \brief Enumerator for the ISP mode
+ */
+typedef enum
+{
+ IfxCif_IspMode_RawPicture = 0, /**< \brief RAW picture */
+ IfxCif_IspMode_ItuRBT656 = 1, /**< \brief ITU-R BT.656 (YUV with embedded sync) */
+ IfxCif_IspMode_ItuRBT601 = 2, /**< \brief ITU-R BT.601 (YUV input with H and Vsync signals) */
+ IfxCif_IspMode_DataMode = 4, /**< \brief datamode (ISP bypass, sync signals interpreted as data enable) */
+ IfxCif_IspMode_RawPictureWithItuRBT656Sync = 6 /**< \brief RAW picture mode with ITU-R BT.656 synchronization */
+} IfxCif_IspMode;
+
+/** \brief Enumerator for ISP sampling edge
+ */
+typedef enum
+{
+ IfxCif_IspSamplingEdge_NegativeEdge = 0, /**< \brief negative edge sampling */
+ IfxCif_IspSamplingEdge_PositiveEdge = 1 /**< \brief positive edge sampling */
+} IfxCif_IspSamplingEdge;
+
+/** \brief
+ */
+typedef enum
+{
+ IfxCif_IspSyncPolarity_HighActive = 0, /**< \brief high active sync polarity */
+ IfxCif_IspSyncPolarity_LowActive = 1 /**< \brief low active sync polarity */
+} IfxCif_IspSyncPolarity;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_ldsEnumerations
+ * \{ */
+/** \brief Enumerator for scaling mode of linear downscaler
+ */
+typedef enum
+{
+ IfxCif_LinearDownscalerScalingMode_SingleSkip = 0, /**< \brief Scaling mode single skip */
+ IfxCif_LinearDownscalerScalingMode_DoubleSkip = 1, /**< \brief Scaling mode double skip */
+ IfxCif_LinearDownscalerScalingMode_SinglePass = 2, /**< \brief Scaling mode single pass */
+ IfxCif_LinearDownscalerScalingMode_DoublePass = 3, /**< \brief Scaling mode double pass */
+ IfxCif_LinearDownscalerScalingMode_Disabled = -1 /**< \brief Disabled */
+} IfxCif_LinearDownscalerScalingMode;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_miEnumerations
+ * \{ */
+/** \brief Enumerator for burst length affecting the write port of the memory interface
+ */
+typedef enum
+{
+ IfxCif_MiBurstLength_4BeatBursts = 0, /**< \brief 4-beat bursts */
+ IfxCif_MiBurstLength_8BeatBursts = 1 /**< \brief 8-beat bursts */
+} IfxCif_MiBurstLength;
+
+/** \brief Enumerator for data paths of the memory interface
+ */
+typedef enum
+{
+ IfxCif_MiDataPaths_RawData = 0, /**< \brief RAW data path */
+ IfxCif_MiDataPaths_JpegData = 1, /**< \brief JPEG data path */
+ IfxCif_MiDataPaths_MainPictureData = 2 /**< \brief main picture data path */
+} IfxCif_MiDataPaths;
+
+/** \brief Enumerator for interrupt sources of the memory interface submodule
+ */
+typedef enum
+{
+ IfxCif_MiInterruptSources_BusError = 0, /**< \brief Bus write or read error interrupt (from handshake target interfaces) */
+ IfxCif_MiInterruptSources_WrapMainPictureCr = 1, /**< \brief Main picture Cr address wrap interrupt */
+ IfxCif_MiInterruptSources_WrapMainPictureCb = 2, /**< \brief Main picture Cb address wrap interrupt */
+ IfxCif_MiInterruptSources_WrapMainPictureY = 3, /**< \brief Main picture Y address wrap interrupt */
+ IfxCif_MiInterruptSources_FillMainPictureY = 4, /**< \brief Main picture Y address wrap interrupt */
+ IfxCif_MiInterruptSources_MacroBlockLine = 5, /**< \brief Macroblock line interrupt of main picture (16 lines of Y, 8 lines of Cb and 8 lines of Cr are written into RAM) */
+ IfxCif_MiInterruptSources_MainPictureFrameEnd = 6 /**< \brief Picture end of frame interrupt */
+} IfxCif_MiInterruptSources;
+
+/** \brief Enumerator for main picture path components of the memory interface
+ */
+typedef enum
+{
+ IfxCif_MiMainPicturePathComponents_Y = 0, /**< \brief Y-component */
+ IfxCif_MiMainPicturePathComponents_Cb = 1, /**< \brief Cb-component */
+ IfxCif_MiMainPicturePathComponents_Cr = 2 /**< \brief Cr-component */
+} IfxCif_MiMainPicturePathComponents;
+
+/** \brief Enumerator for write formats of data written into memory
+ */
+typedef enum
+{
+ IfxCif_MiMainPictureWriteFormat_PlanarOrData8Bit = 0, /**< \brief planar (YCbCr mode) / RAW & data mode (8 bit) */
+ IfxCif_MiMainPictureWriteFormat_SemiPlanarOrData8Bit = 1, /**< \brief semi-planar for YCbCr 4:2:x / RAW 8 bit */
+ IfxCif_MiMainPictureWriteFormat_InterleavedOrDataGreater8Bit = 2 /**< \brief interleaved_combined for YCbCr 4:2:2 only / RAW & data mode (greater 8 up to 16 bit) */
+} IfxCif_MiMainPictureWriteFormat;
+
+/** \brief Enumerator for status clear sources of the memory interface module
+ */
+typedef enum
+{
+ IfxCif_MiStatusClearSources_ExtraPath5FifoFull = 0, /**< \brief FIFO full flag in extra path 5 */
+ IfxCif_MiStatusClearSources_ExtraPath4FifoFull = 1, /**< \brief FIFO full flag in extra path 4 */
+ IfxCif_MiStatusClearSources_ExtraPath3FifoFull = 2, /**< \brief FIFO full flag in extra path 3 */
+ IfxCif_MiStatusClearSources_ExtraPath2FifoFull = 3, /**< \brief FIFO full flag in extra path 2 */
+ IfxCif_MiStatusClearSources_ExtraPath1FifoFull = 4, /**< \brief FIFO full flag in extra path 1 */
+ IfxCif_MiStatusClearSources_BusWriteError = 5, /**< \brief Bus write error flag */
+ IfxCif_MiStatusClearSources_MainPictureCrFifoFull = 6, /**< \brief Cr FIFO full flag in main path */
+ IfxCif_MiStatusClearSources_MainPictureCbFifoFull = 7, /**< \brief Cb FIFO full flag in main path */
+ IfxCif_MiStatusClearSources_MainPictureYFifoFull = 8 /**< \brief Y FIFO full flag in main path */
+} IfxCif_MiStatusClearSources;
+
+/** \brief Enumerator for status information sources of the memory interface submodule
+ */
+typedef enum
+{
+ IfxCif_MiStatusInformationSources_BusWriteError = 0, /**< \brief An Bus error occurred while writing to the Bus (main/self path) since last clear */
+ IfxCif_MiStatusInformationSources_MainPictureCrFifoFull = 1, /**< \brief FIFO full flag of Cr FIFO in main path asserted since last clear */
+ IfxCif_MiStatusInformationSources_MainPictureCbFifoFull = 2, /**< \brief FIFO full flag of Cb FIFO in main path asserted since last clear */
+ IfxCif_MiStatusInformationSources_MainPictureYFifoFull = 3 /**< \brief FIFO full flag of Y FIFO in main path asserted since last clear */
+} IfxCif_MiStatusInformationSources;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_jpeEnumerations
+ * \{ */
+/** \brief Enumerator for the Huffman Table components
+ */
+typedef enum
+{
+ IfxCif_HuffmanTableComponents_Component0 = 0, /**< \brief Component 0 */
+ IfxCif_HuffmanTableComponents_Component1 = 1, /**< \brief Component 1 */
+ IfxCif_HuffmanTableComponents_Component2 = 2 /**< \brief Component 2 */
+} IfxCif_HuffmanTableComponents;
+
+/** \brief Enumerator for the Huffman Tables
+ */
+typedef enum
+{
+ IfxCif_HuffmanTables_Table0 = 0, /**< \brief Huffman Table 0 */
+ IfxCif_HuffmanTables_Table1 = 1 /**< \brief Huffman Table 1 */
+} IfxCif_HuffmanTables;
+
+/** \brief Enumerator for the debug signal sources
+ */
+typedef enum
+{
+ IfxCif_JpeDebugSignalSources_BadTableAccess = 0, /**< \brief Debug Bad Table Access (set if an access to the TABLE_DATA or to the TABLE_ID register is performed, when the JPEG_ENCODER is busy) */
+ IfxCif_JpeDebugSignalSources_VlcTableBusy = 1, /**< \brief Debug VLC Table Busy (vlc access to hufftables) */
+ IfxCif_JpeDebugSignalSources_R2BMemoryFull = 2, /**< \brief R2B Memory Full (line memory status of r2b) */
+ IfxCif_JpeDebugSignalSources_VlcEncodeBusy = 3, /**< \brief VLC Encode Busy (vlc encode processing active) */
+ IfxCif_JpeDebugSignalSources_QiqTableAccess = 4 /**< \brief QiqTableAccess */
+} IfxCif_JpeDebugSignalSources;
+
+/** \brief Enumerator for the debug signal state
+ */
+typedef enum
+{
+ IfxCif_JpeDebugSignalState_Inactive = 0, /**< \brief Debug signal is inactive */
+ IfxCif_JpeDebugSignalState_Active = 1 /**< \brief Debug signal is active */
+} IfxCif_JpeDebugSignalState;
+
+/** \brief Enumerator for the header generation debug control
+ */
+typedef enum
+{
+ IfxCif_JpeHeaderGenerationMode_WaitForEncodedImage = 0, /**< \brief wait for encoded image data to fill output buffer */
+ IfxCif_JpeHeaderGenerationMode_TransmitLastHeaderBytes = 1 /**< \brief immediately transmit last header bytes */
+} IfxCif_JpeHeaderGenerationMode;
+
+/** \brief Enumerator for the JPE header mode
+ */
+typedef enum
+{
+ IfxCif_JpeHeaderMode_NoAppnHeader = 0, /**< \brief no APPn header */
+ IfxCif_JpeHeaderMode_JfifHeader = 2 /**< \brief JFIF header */
+} IfxCif_JpeHeaderMode;
+
+/** \brief Enumerator for interrupt sources of the JPEG encoder module
+ */
+typedef enum
+{
+ IfxCif_JpeInterruptSources_VlcTableError = 0, /**< \brief VLC table error */
+ IfxCif_JpeInterruptSources_R2BImageSizeError = 1, /**< \brief R2B image size error */
+ IfxCif_JpeInterruptSources_DcTableError = 2, /**< \brief DC Table error */
+ IfxCif_JpeInterruptSources_VlcSymbolError = 3, /**< \brief VLC symbol error */
+ IfxCif_JpeInterruptSources_HeaderGenerationComplete = 4, /**< \brief Header generation complete */
+ IfxCif_JpeInterruptSources_EncodingComplete = 5 /**< \brief Encoding complete */
+} IfxCif_JpeInterruptSources;
+
+/** \brief Enumerator for the Q-Table selector
+ */
+typedef enum
+{
+ IfxCif_JpeQTableSelector_Table0 = 0, /**< \brief Q-Table 0 */
+ IfxCif_JpeQTableSelector_Table1 = 1, /**< \brief Q-Table 1 */
+ IfxCif_JpeQTableSelector_Table2 = 2, /**< \brief Q-Table 2 */
+ IfxCif_JpeQTableSelector_Table3 = 3 /**< \brief Q-Table 3 */
+} IfxCif_JpeQTableSelector;
+
+/** \brief Enumerator for the components to select Q-Tables
+ */
+typedef enum
+{
+ IfxCif_JpeQTableSelectorComponents_Y = 0, /**< \brief Y-component */
+ IfxCif_JpeQTableSelectorComponents_U = 1, /**< \brief U-component */
+ IfxCif_JpeQTableSelectorComponents_V = 2 /**< \brief V-component */
+} IfxCif_JpeQTableSelectorComponents;
+
+/** \brief Enumerator for the input scaling values of the JPEG encoder
+ */
+typedef enum
+{
+ IfxCif_JpeScalingValueSources_Y = 0, /**< \brief scaling Y input from [16..235] to [0..255] */
+ IfxCif_JpeScalingValueSources_CbCr = 1 /**< \brief scaling Cb/Cr input from [16..240] to [0..255] */
+} IfxCif_JpeScalingValueSources;
+
+/** \brief Enumerator for the codec state
+ */
+typedef enum
+{
+ IfxCif_JpeState_Free = 0, /**< \brief Codec is free (not busy) */
+ IfxCif_JpeState_Busy = 1 /**< \brief JPEG codec in process */
+} IfxCif_JpeState;
+
+/** \brief Enumerator for the JPE Tables
+ */
+typedef enum
+{
+ IfxCif_JpeTableId_QTable0 = 0, /**< \brief Q-Table 0 */
+ IfxCif_JpeTableId_QTable1 = 1, /**< \brief Q-Table 1 */
+ IfxCif_JpeTableId_QTable2 = 2, /**< \brief Q-Table 2 */
+ IfxCif_JpeTableId_QTable3 = 3, /**< \brief Q-Table 3 */
+ IfxCif_JpeTableId_VlcDcTable0 = 4, /**< \brief VLC DC Table 0 */
+ IfxCif_JpeTableId_VlcAcTable0 = 5, /**< \brief VLC AC Table 0 */
+ IfxCif_JpeTableId_VlcDcTable1 = 6, /**< \brief VLC DC Table 1 */
+ IfxCif_JpeTableId_VlcAcTable1 = 7 /**< \brief VLC AC Table 1 */
+} IfxCif_JpeTableId;
+
+/** \brief Enumerator for the JFIF stream encoder continuous mode
+ */
+typedef enum
+{
+ IfxCif_JpegJfifStreamEncoderContinuousMode_StopAtFrameEnd = 0, /**< \brief encoder stops at frame end */
+ IfxCif_JpegJfifStreamEncoderContinuousMode_StartAutomatically = 1, /**< \brief encoder starts automatically to encode the next frame */
+ IfxCif_JpegJfifStreamEncoderContinuousMode_GenerateHeaderAndStartAutomatically = 3 /**< \brief encoder first generates next header and then encodes automatically the next frame */
+} IfxCif_JpegJfifStreamEncoderContinuousMode;
+
+/** \brief Enumerator for the picture encoding format
+ */
+typedef enum
+{
+ IfxCif_JpegPictureEncodingFormat_422 = 0, /**< \brief 4:2:2 format */
+ IfxCif_JpegPictureEncodingFormat_400 = 1 /**< \brief 4:0:0 format */
+} IfxCif_JpegPictureEncodingFormat;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_swEnumerations
+ * \{ */
+/** \brief Enumerator for watchdog counters
+ */
+typedef enum
+{
+ IfxCif_SecurityWatchdogCounters_Predivider = 0, /**< \brief Predivider counter */
+ IfxCif_SecurityWatchdogCounters_Vertical = 1, /**< \brief Vertical counter */
+ IfxCif_SecurityWatchdogCounters_Horizontal = 2 /**< \brief Horizontal counter */
+} IfxCif_SecurityWatchdogCounters;
+
+/** \brief Enumerator for interrupt sources of the security watchdog submodule
+ */
+typedef enum
+{
+ IfxCif_SecurityWatchdogInterruptSources_VerticalEndStartTimeout = 0, /**< \brief Vertical End Start Interrupt */
+ IfxCif_SecurityWatchdogInterruptSources_VerticalStartEndTimeout = 1, /**< \brief Vertical Start End Interrupt */
+ IfxCif_SecurityWatchdogInterruptSources_HorizontalEndStartTimeout = 2, /**< \brief Horizontal End Start Interrupt */
+ IfxCif_SecurityWatchdogInterruptSources_HorizontalStartEndTimeout = 3 /**< \brief Horizontal Start End Interrupt */
+} IfxCif_SecurityWatchdogInterruptSources;
+
+/** \brief Enumerator for watchdog timeout counters
+ */
+typedef enum
+{
+ IfxCif_SecurityWatchdogTimeoutCounters_EndStart = 0, /**< \brief Timeout counter for End Start phase */
+ IfxCif_SecurityWatchdogTimeoutCounters_StartEnd = 1 /**< \brief Timeout counter for Start End phase */
+} IfxCif_SecurityWatchdogTimeoutCounters;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_epEnumerations
+ * \{ */
+/** \brief Enumerator for error sources that can be cleared in the extra paths registers
+ */
+typedef enum
+{
+ IfxCif_EpErrorClearSources_ExtraPath5SizeError = 0, /**< \brief Size error in image cropping unit of extra path 5 */
+ IfxCif_EpErrorClearSources_ExtraPath4SizeError = 1, /**< \brief Size error in image cropping unit of extra path 4 */
+ IfxCif_EpErrorClearSources_ExtraPath3SizeError = 2, /**< \brief Size error in image cropping unit of extra path 3 */
+ IfxCif_EpErrorClearSources_ExtraPath2SizeError = 3, /**< \brief Size error in image cropping unit of extra path 2 */
+ IfxCif_EpErrorClearSources_ExtraPath1SizeError = 4 /**< \brief Size error in image cropping unit of extra path 1 */
+} IfxCif_EpErrorClearSources;
+
+/** \brief Enumerator for error sources of extra paths
+ */
+typedef enum
+{
+ IfxCif_EpErrorSources_ExtraPath5FifoFull = 0, /**< \brief FIFO of extra path 5 is full */
+ IfxCif_EpErrorSources_ExtraPath4FifoFull = 1, /**< \brief FIFO of extra path 4 is full */
+ IfxCif_EpErrorSources_ExtraPath3FifoFull = 2, /**< \brief FIFO of extra path 3 is full */
+ IfxCif_EpErrorSources_ExtraPath2FifoFull = 3, /**< \brief FIFO of extra path 2 is full */
+ IfxCif_EpErrorSources_ExtraPath1FifoFull = 4, /**< \brief FIFO of extra path 1 is full */
+ IfxCif_EpErrorSources_ExtraPath5SizeError = 5, /**< \brief Size error in image cropping unit of extra path 5 */
+ IfxCif_EpErrorSources_ExtraPath4SizeError = 6, /**< \brief Size error in image cropping unit of extra path 4 */
+ IfxCif_EpErrorSources_ExtraPath3SizeError = 7, /**< \brief Size error in image cropping unit of extra path 3 */
+ IfxCif_EpErrorSources_ExtraPath2SizeError = 8, /**< \brief Size error in image cropping unit of extra path 2 */
+ IfxCif_EpErrorSources_ExtraPath1SizeError = 9 /**< \brief Size error in image cropping unit of extra path 1 */
+} IfxCif_EpErrorSources;
+
+/** \brief Enumerator for extra path features
+ */
+typedef enum
+{
+ IfxCif_EpFeatures_InitOffsetCounter = 0, /**< \brief Init offest counter */
+ IfxCif_EpFeatures_InitBaseAddress = 1, /**< \brief Init buffer base address */
+ IfxCif_EpFeatures_ByteSwap = 2, /**< \brief Byte swap feature */
+ IfxCif_EpFeatures_PictureDataPath = 3 /**< \brief enables the extra path picture data path */
+} IfxCif_EpFeatures;
+
+/** \brief Enumerator for interrupt sources of the extra paths module
+ */
+typedef enum
+{
+ IfxCif_EpInterrupts_FrameEnd = IFX_CIF_MIEP_MIS_FRAME_END_EP_1_OFF, /**< \brief Picture end of frame interrupt */
+ IfxCif_EpInterrupts_FillLevel = IFX_CIF_MIEP_MIS_FILL_EP_1_OFF, /**< \brief Fill level interrupt */
+ IfxCif_EpInterrupts_WrapAround = IFX_CIF_MIEP_MIS_WRAP_EP_1_OFF, /**< \brief Address wrap interrupt */
+ IfxCif_EpInterrupts_MacroBlockLine = IFX_CIF_MIEP_MIS_MBLK_LINE_EP_1_OFF, /**< \brief Macroblock line interrupt */
+ IfxCif_EpInterrupts_Count = 4 /**< \brief Total number of interrupt sources for one extra path */
+} IfxCif_EpInterrupts;
+
+/** \brief Enumerator for write formats of extra paths
+ */
+typedef enum
+{
+ IfxCif_EpWriteFormat_RawAndData = 0, /**< \brief Raw and data mode (8 bit) */
+ IfxCif_EpWriteFormat_Raw8Bit = 1, /**< \brief Raw 8 bit mode */
+ IfxCif_EpWriteFormat_RawGreater = 2, /**< \brief RAW & data mode (greater 8 up to 16 bit) */
+ IfxCif_EpWriteFormat_YCbCr = 3 /**< \brief YCbCr 16 bit; YCbCr data is handled interleaved as 16 bit data in extra paths */
+} IfxCif_EpWriteFormat;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_dpEnumerations
+ * \{ */
+/** \brief Enumerator for debug path control sources
+ */
+typedef enum
+{
+ IfxCif_DpControlSources_UserDefinedSymbol8 = 0, /**< \brief User defined symbol 8 */
+ IfxCif_DpControlSources_UserDefinedSymbol7 = 1, /**< \brief User defined symbol 7 */
+ IfxCif_DpControlSources_UserDefinedSymbol6 = 2, /**< \brief User defined symbol 6 */
+ IfxCif_DpControlSources_UserDefinedSymbol5 = 3, /**< \brief User defined symbol 5 */
+ IfxCif_DpControlSources_UserDefinedSymbol4 = 4, /**< \brief ser defined symbol 4 */
+ IfxCif_DpControlSources_UserDefinedSymbol3 = 5, /**< \brief User defined symbol 3 */
+ IfxCif_DpControlSources_UserDefinedSymbol2 = 6, /**< \brief User defined symbol 2 */
+ IfxCif_DpControlSources_UserDefinedSymbol1 = 7, /**< \brief User defined symbol 1 */
+ IfxCif_DpControlSources_TimestampCounter = 8, /**< \brief Timestamp counter */
+ IfxCif_DpControlSources_LineNumberCounter = 9, /**< \brief Line number counter */
+ IfxCif_DpControlSources_FrameNumberCounter = 10 /**< \brief Frame number counter */
+} IfxCif_DpControlSources;
+
+/** \brief Enumerator for debug path counters
+ */
+typedef enum
+{
+ IfxCif_DpCounters_PredividerCounter = 0, /**< \brief Predivider counter */
+ IfxCif_DpCounters_TimestampCounter = 1, /**< \brief Timestamp counter */
+ IfxCif_DpCounters_LineNumberCounter = 2, /**< \brief Line number counter */
+ IfxCif_DpCounters_FrameNumberCounter = 3 /**< \brief Frame number counter */
+} IfxCif_DpCounters;
+
+/** \brief Enumerator for debug path source paths
+ */
+typedef enum
+{
+ IfxCif_DpSourcePath_MainPath = 0, /**< \brief Main data path */
+ IfxCif_DpSourcePath_ExtraPath1 = 1, /**< \brief Extra path 1 */
+ IfxCif_DpSourcePath_ExtraPath2 = 2, /**< \brief Extra path 2 */
+ IfxCif_DpSourcePath_ExtraPath4 = 4, /**< \brief Extra path 4 */
+ IfxCif_DpSourcePath_ExtraPath5 = 5 /**< \brief Extra path 5 */
+} IfxCif_DpSourcePath;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_stdFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to clear the kernel reset state
+ * \return None
+ */
+IFX_INLINE void IfxCif_clearKernelResetState(void);
+
+/** \brief Function to query the CIF module ID
+ * \return CIF module ID
+ */
+IFX_INLINE uint16 IfxCif_getCifModuleId(void);
+
+/** \brief Function to query the port input selection
+ * \return Always @ref IfxCif_PortInputSelection_PinMapping0
+ */
+IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection(void);
+
+/** \brief Function to query the CIF module revision
+ * \return CIF module revision
+ */
+IFX_INLINE uint8 IfxCif_getCifModuleRevision(void);
+
+/** \brief Function to query the CIF module ID
+ * \return CIF module type
+ */
+IFX_INLINE uint8 IfxCif_getCifModuleType(void);
+
+/** \brief Function to query the clock distribution enabled state
+ * \return @ref IfxCif_State_Enabled if clock distribution is enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState(void);
+
+/** \brief Function to query the data path for main path
+ * \return Selector for the main data path (one member of @ref IfxCif_DataPathSelectorForMainPath)
+ */
+IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath(void);
+
+/** \brief Function to query the input interface of the CIF interface
+ * \return @ref IfxCif_InputInterface Type of the configured interface
+ */
+IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface(void);
+
+/** \brief Function to query the current level of the ISP input port s_hsync (for testing purposes only)
+ * \return @ref IfxCif_State_Enabled if s_hsync is high, @ref IfxCif_State_Disabled if s_hsync is low
+ */
+IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState(void);
+
+/** \brief Function to query the kernel reset status
+ * \return @ref IfxCif_State_Enabled if kernel reset was executed, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus(void);
+
+/** \brief Function to query the module number
+ * \return Module number of the CIF interface
+ */
+IFX_INLINE uint16 IfxCif_getModuleNumber(void);
+
+/** \brief Function to query the revision number of the CIF interface
+ * \return Revision number of the CIF interface
+ */
+IFX_INLINE uint8 IfxCif_getModuleRevisionNumber(void);
+
+/** \brief Function to query the state of the CIF module
+ * \return @ref IfxCif_State_Enabled if the module is currently enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_INLINE IfxCif_State IfxCif_getModuleState(void);
+
+/** \brief Function to query the module type
+ * \return Module type of the CIF interface
+ */
+IFX_INLINE uint8 IfxCif_getModuleType(void);
+
+/** \brief Function to query the Y/C splitter channel mode
+ * \return Configured mode of the Y/C splitter (one member of @ref IfxCif_YCSplitterChannelMode)
+ */
+IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode(void);
+
+/** \brief Function to enable or disable the clock distribution to all CIF submodules
+ * \param clockControlLogicState @ref IfxCif_State_Enabled to enable clock distribution, @ref IfxCif_State_Disabled to disable clock distribution
+ * \return None
+ */
+IFX_INLINE void IfxCif_setClockControlLogicState(IfxCif_State clockControlLogicState);
+
+/** \brief Function to set the data path for main path
+ * \param pathSelector Selector for the main data path
+ * \return None
+ */
+IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector);
+
+/** \brief Function to set the input interface of the CIF interface
+ * \param interface Type of interface
+ * \return None
+ */
+IFX_INLINE void IfxCif_setInputInterface(IfxCif_InputInterface interface);
+
+/** \brief Function to request a kernel reset or reset the request bit
+ * \param state @ref IfxCif_State_Enabled to request a reset, @ref IfxCif_State_Disabled to reset the request bit before a reset was performed
+ * \return None
+ */
+IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state);
+
+/** \brief Function to set the Y/C splitter channel mode
+ * \param mode Mode of the Y/C splitter to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to query the clock state of a submodule
+ * \param submodule Identifier of the submodule
+ * \return @ref IfxCif_State_Enabled if the clock of the submodule is enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_EXTERN IfxCif_State IfxCif_getInternalClockMode(IfxCif_Submodules submodule);
+
+/** \brief Function to query the state of the kernel reset request bit
+ * \return @ref IfxCif_State_Enabled if the kernel reset requets bit is set, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_EXTERN IfxCif_State IfxCif_getKernelResetRequestState(void);
+
+/** \brief Function to query the reset mode of a submodule
+ * \param submodule Identifier of the submodule
+ * \return @ref IfxCif_State_Enabled if the reset mode of the submodule is enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_EXTERN IfxCif_State IfxCif_getSoftwareResetMode(IfxCif_Submodules submodule);
+
+/** \brief resets CIF kernel
+ * \param cifBbb pointer to CIF_BBB registers
+ * \return None
+ */
+IFX_EXTERN void IfxCif_resetModule(Ifx_CIF_BBB *cifBbb);
+
+/** \brief Function to enable or disable the clock of a submodule
+ * \param submodule Identifier of the submodule to enable or disable
+ * \param clockState @ref IfxCif_State_Enabled to enable the clock, @ref IfxCif_State_Disabled to disable the clock
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setInternalClockMode(IfxCif_Submodules submodule, IfxCif_State clockState);
+
+/** \brief Function to request enabling or disabling of the CIF module
+ * \param state @ref IfxCif_State_Enabled to request the enabling of the module, @ref IfxCif_State_Disabled otherwise
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setModuleStateRequest(IfxCif_State state);
+
+/** \brief Function to enable or disable the reset mode of a submodule
+ * \param submodule Identifier of the submodule
+ * \param resetMode @ref IfxCif_State_Enabled to enable the reset of the submodule, @ref IfxCif_State_Disabled to disable the reset
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setSoftwareResetMode(IfxCif_Submodules submodule, IfxCif_State resetMode);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_ispFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to generate a frame synchronous ISP configuration update signal
+ * \return None
+ */
+IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void);
+
+/** \brief Function to generate an immediate ISP configuration update signal
+ * \return None
+ */
+IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void);
+
+/** \brief Function to query the current ISP frame count
+ * \return Current ISP frame count
+ */
+IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount(void);
+
+/** \brief Function to query the current field information
+ * \return @ref IfxCif_IspInformFieldInformation_Odd for odd fields, @ref IfxCif_IspInformFieldInformation_Even for even fields
+ */
+IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation(void);
+
+/** \brief Function to query the current state of the ISP formatter
+ * \return @ref IfxCif_State_Enabled if the ISP input formatter is currently enabled, @ref IfxCif_State_Disabled if the ISP input formatter is currently disabled
+ */
+IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState(void);
+
+/** \brief Function to query the currently set CCIR sequence
+ * \return Currently set CCIR sequence (one member of @ref IfxCif_IspCcirSequence)
+ */
+IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence(void);
+
+/** \brief Function to query the clipping range of the crominance of the ISP output
+ * \return Currently set clipping range (one member of @ref IfxCif_IspColorSpaceMatrixCrominanceClippingRange)
+ */
+IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange(void);
+
+/** \brief Function to query the clipping range of the luminance of the ISP output
+ * \return Currently set clipping range (one member of @ref IfxCif_IspColorSpaceMatrixLuminanceClippingRange)
+ */
+IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange(void);
+
+/** \brief Function to query the state of field ID inversion
+ * \return @ref IfxCif_State_Enabled if field ID inversion is enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState(void);
+
+/** \brief Function to query the currently set field sample mode
+ * \return Currently set fields sample mode (one member of @ref IfxCif_IspFieldSelection)
+ */
+IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection(void);
+
+/** \brief Function to query the currently set polarity of the HSYNC signal
+ * \return @ref IfxCif_IspSyncPolarity_HighActive if HSYNC is configured as high active, @ref IfxCif_IspSyncPolarity_LowActive if HSYNC is configured as low active
+ */
+IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity(void);
+
+/** \brief Function to query the current state of the ISP input formatter
+ * \return @ref IfxCif_State_Enabled if the ISP input formatter is enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState(void);
+
+/** \brief Function to query the ISP input interface bit width
+ * \return Configured ISP input interface bit width (one member of @ref IfxCif_IspInputInterface)
+ */
+IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface(void);
+
+/** \brief Function to query the current value of the ISP input port s_data (for test purposes only)
+ * \return Current value of s_data
+ */
+IFX_INLINE uint16 IfxCif_getIspInputPortSDataState(void);
+
+/** \brief Function to query the current level of the ISP input port s_vsync (for test purposes only)
+ * \return @ref IfxCif_State_Enabled if s_vsync is high, @ref IfxCif_State_Disabled if s_vsync is low
+ */
+IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState(void);
+
+/** \brief Function to query the currently set ISP mode
+ * \return Current ISP mode (one member of @ref IfxCif_IspMode)
+ */
+IFX_INLINE IfxCif_State IfxCif_getIspMode(void);
+
+/** \brief Function to query the ISP output state
+ * \return @ref IfxCif_State_Enabled if the ISP output is enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_INLINE IfxCif_State IfxCif_getIspOutputState(void);
+
+/** \brief Function to query the currently set ISP sampling edge
+ * \return @ref IfxCif_IspSamplingEdge_NegativeEdge if negative clock edge is configured as sampling edge, @ref IfxCif_IspSamplingEdge_PositiveEdge if positive clock edge is configured as sampling edge
+ */
+IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge(void);
+
+/** \brief Function to query the current state of the ISP
+ * \return @ref IfxCif_State_Enabled if the ISP is currently enabled, @ref IfxCif_State_Disabled if the ISP is currently disabled
+ */
+IFX_INLINE IfxCif_State IfxCif_getIspState(void);
+
+/** \brief Function to query the currently set polarity of the VSYNC signal
+ * \return @ref IfxCif_IspSyncPolarity_HighActive if VSYNC is configured as high active, @ref IfxCif_IspSyncPolarity_LowActive if VSYNC is configured as low active
+ */
+IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity(void);
+
+/** \brief Function to query the number of acquisition frames
+ * \return Currently set number of acquisition frames
+ */
+IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames(void);
+
+/** \brief Function to set the ISP acquisition offsets
+ * \param hOffset Acquisition horizontal offset to set
+ * \param vOffset Acquisition vertical offset to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset);
+
+/** \brief Function to set the ISP acquisition sizes
+ * \param hSize Acquisition horizontal size to set
+ * \param vSize Acquisition vertical size to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize);
+
+/** \brief Function to set the CCIR sequence
+ * \param sequence CCIR sequence to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence);
+
+/** \brief Function to set the clipping range of the crominance of the ISP output
+ * \param clippingRange Clipping range to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange);
+
+/** \brief Function to set the clipping range of the luminance of the ISP output
+ * \param clippingRange Clipping range to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange);
+
+/** \brief Function to enable or disable inversion of the field ID
+ * \param fieldInvertState @ref IfxCif_State_Enabled to enable field ID inversion, @ref IfxCif_State_Disabled to disable field ID inversion
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState);
+
+/** \brief Function to select fields to sample
+ * \param selection Sampled fields selector
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspFieldSelection(IfxCif_IspFieldSelection selection);
+
+/** \brief Function to set the polarity of the HSYNC signal
+ * \param polarity @ref IfxCif_IspSyncPolarity_HighActive for high active HSYNC signal, @ref IfxCif_IspSyncPolarity_LowActive for low active HSYNC signal
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity);
+
+/** \brief Function to enable or disable the ISP input formatter
+ * \param inputFormatterState @ref IfxCif_State_Enabled to enable the ISP input formatter, @ref IfxCif_State_Disabled to disable it
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState);
+
+/** \brief Function to set the ISP input interface bit width
+ * \param input ISP input interface bit width to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input);
+
+/** \brief Function to set the ISP mode
+ * \param mode Mode to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode);
+
+/** \brief Function to enable or disable the ISP output
+ * \param ispOutputState ispOutputState @ref IfxCif_State_Enabled to enable the ISP output, @ref IfxCif_State_Disabled to disable it
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState);
+
+/** \brief Function to set the ISP output window offsets
+ * \param hOffset Offset horizontal to set
+ * \param vOffset Offset vertical to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset);
+
+/** \brief Function to set the ISP picture sizes
+ * \param hSize Picture horizontal size to set
+ * \param vSize Picture vertical size to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize);
+
+/** \brief Function to set the ISP sampling edge
+ * \param edge @ref IfxCif_IspSamplingEdge_NegativeEdge to sample at negative clock edges, @ref IfxCif_IspSamplingEdge_PositiveEdge to sample at positive clock edges
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge);
+
+/** \brief Function to set the polarity of the VSYNC signal
+ * \param polarity @ref IfxCif_IspSyncPolarity_HighActive for high active VSYNC signal, @ref IfxCif_IspSyncPolarity_LowActive for low active VSYNC signal
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity);
+
+/** \brief Function to set the number of acquisition frames
+ * \param numberOfFrames Number of acquisition frames to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to clear the error status bit for an error source
+ * \param errorSource Error source
+ * \return None
+ */
+IFX_EXTERN void IfxCif_clearIspError(IfxCif_IspErrorSources errorSource);
+
+/** \brief Function to clear an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_clearIspInterrupt(IfxCif_IspInterruptSources interruptSource);
+
+/** \brief Function to query the current ISP picture offset for one tier
+ * \param tier Tier for which to query the current ISP picture offset
+ * \return Current ISP picture offset
+ */
+IFX_EXTERN uint16 IfxCif_getCurrentIspPictureOffset(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the current ISP picture size for one tier
+ * \param tier Tier for which to query the current ISP picture size
+ * \return Current ISP picture size
+ */
+IFX_EXTERN uint16 IfxCif_getCurrentIspPictureSize(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the currently set ISP acquisition offset of one tier
+ * \param tier Tier for which to query the ISP acquisition offset
+ * \return Currently set ISP acquisition offset
+ */
+IFX_EXTERN uint16 IfxCif_getIspAcquisitionOffset(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the currently set ISP acquisition size of one tier
+ * \param tier Tier for which to query the ISP acquisition size
+ * \return Currently set acquisition size
+ */
+IFX_EXTERN uint16 IfxCif_getIspAcquisitionSize(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the error state of an error source
+ * \param errorSource errorSource Error source to query
+ * \return @ref IfxCif_ErrorState_Error if the error occured, @ref IfxCif_ErrorState_NoError if the error did not occur
+ */
+IFX_EXTERN IfxCif_ErrorState IfxCif_getIspErrorState(IfxCif_IspErrorSources errorSource);
+
+/** \brief Function to query the append state
+ * \return @ref IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise
+ */
+IFX_EXTERN IfxCif_State IfxCif_getIspInputSelectionAppendState(void);
+
+/** \brief Function to query the enabled state of an interrupt
+ * \param interruptSource interruptSource Source of the interrupt
+ * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource);
+
+/** \brief Function to query the currently set ISP output window offset for one tier
+ * \param tier Tier for which to query the ISP output window offset
+ * \return Currently set ISP output window offset
+ */
+IFX_EXTERN uint16 IfxCif_getIspOutputWindowOffset(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the currently set ISP picture size of one tier
+ * \param tier Tier for which to query the ISP picture size
+ * \return Currently set ISP picture size
+ */
+IFX_EXTERN uint16 IfxCif_getIspPictureSize(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the masked state of an interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource);
+
+/** \brief Function to query the raw state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawIspInterruptTriggeredState(IfxCif_IspInterruptSources interruptSource);
+
+/** \brief Function to set the ISP acquisition offset of one tier
+ * \param tier Tier for which to set the ISP acquisition offset
+ * \param offset Acquisition offset to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspAcquisitionOffset(IfxCif_ImageTiers tier, uint16 offset);
+
+/** \brief Function to set the ISP acquisition size of one tier
+ * \param tier Tier for which to set the ISP acquisition size
+ * \param size Acquisition size to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspAcquisitionSize(IfxCif_ImageTiers tier, uint16 size);
+
+/** \brief Function to enable or disable appending of bits to the input signal
+ * \param appendState @ref IfxCif_State_Enabled if appending is enabled, IfxCif_State_Disabled otherwise
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspInputSelectionAppendState(IfxCif_State appendState);
+
+/** \brief Function to enable or disable an interrupt
+ * \param interruptSource interruptSource Source of the interrupt to enable or disable
+ * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspInterruptEnableState(IfxCif_IspInterruptSources interruptSource, IfxCif_State interruptEnableState);
+
+/** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspInterruptRequestBit(IfxCif_IspInterruptSources interruptSource);
+
+/** \brief Function to set the ISP output window offset for one tier
+ * \param tier Tier for which to query the ISP output window offset
+ * \param offset Offset to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset);
+
+/** \brief Function to set the ISP picture size of one tier
+ * \param tier Tier for which to set the ISP picture size
+ * \param pictureSize Picture size to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspPictureSize(IfxCif_ImageTiers tier, uint16 pictureSize);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_ldsFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to query the current state of the linear downscaler for one tier
+ * \param tier Tier for which to query the state of the linear downscaler
+ * \return @ref IfxCif_State_Enabled if the linear downscaler is enabled, @ref IfxCif_State_Disabled if the linear downscaler is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getLinearDownscalerEnableState(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the currently set scaling factor of the linear downscaler of one tier
+ * \param tier Tier for which to query the scaling factor
+ * \return Current set scaling factor
+ */
+IFX_EXTERN uint8 IfxCif_getLinearDownscalerScalingFactor(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the currently set scaling mode of one tier
+ * \param tier Tier for which to query the scaling mode
+ * \return Currently set scaling mode (one member of @ref IfxCif_LinearDownscalerScalingMode)
+ */
+IFX_EXTERN IfxCif_LinearDownscalerScalingMode IfxCif_getLinearDownscalerScalingMode(IfxCif_ImageTiers tier);
+
+/** \brief Function to enable or disable the linear downscaler for one tier
+ * \param tier Tier for which to enable or disable the linear downscaler
+ * \param enableState @ref IfxCif_State_Enabled to enable the linear downscaler, @ref IfxCif_State_Disabled to disable the linear downscaler
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setLinearDownscalerEnableState(IfxCif_ImageTiers tier, IfxCif_State enableState);
+
+/** \brief Function to set the scaling factor of the linear downscaler of one tier
+ * \param tier Tier for which to set the scaling factor
+ * \param factor Factor to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactor(IfxCif_ImageTiers tier, uint8 factor);
+
+/** \brief Function to set the scaling factors of the linear downscaler
+ * \param horizFactor Factor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
+ * \param vertFactor actor horizontal to set (depending on the configured scaling mode every factor + 1 pixel or double pixel will be skipped or passed to the next module)
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setLinearDownscalerScalingFactors(uint8 horizFactor, uint8 vertFactor);
+
+/** \brief Function to set the scaling mode of one tier
+ * \param tier Tier for which to set the scaling mode
+ * \param mode Scaling mode to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setLinearDownscalerScalingMode(IfxCif_ImageTiers tier, IfxCif_LinearDownscalerScalingMode mode);
+
+/** \brief Function to set the scaling mode of one tier
+ * \param horizMode Scaling mode to set for horizontal
+ * If the horizMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the horizontal scaling will be enabled.
+ * \param vertMode Scaling mode to set for vertical
+ * If the vertMode is not IfxCif_LinearDownscalerScalingMode_Disabled, the vertical scaling will be enabled.
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setLinearDownscalerScalingModes(IfxCif_LinearDownscalerScalingMode horizMode, IfxCif_LinearDownscalerScalingMode vertMode);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_miFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to generate an immediate configuration update signal for the memory interface submodule
+ * \return None
+ */
+IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void);
+
+/** \brief Function to query the enabled state of the update signal of the base address and buffer size shadow registers to the programmed register init values
+ * \return @ref IfxCif_State_Enabled if update of the base address and buffer size shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), @ref IfxCif_State_Disabled if update of the base address and buffer size shadow registers is disabled
+ */
+IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState(void);
+
+/** \brief Function to query the number of JPEG or RAW data bytes of the last transmitted frame
+ * \return Number of JPEG or RAW data bytes of the last transmitted frame (updated at frame end)
+ */
+IFX_INLINE uint32 IfxCif_getMiByteCount(void);
+
+/** \brief Function to query the current state of the change of byte order of the 32 bit output word
+ * \return @ref IfxCif_State_Enabled if byte swapping is enabled, @ref IfxCif_State_Disabled if byte swapping is disabled
+ */
+IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState(void);
+
+/** \brief Function to query the currently set burst length for Cb and Cr data
+ * \return @ref IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, @ref IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred
+ */
+IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength(void);
+
+/** \brief Function to query the currently set burst length for Y, JPEG, or RAW data
+ * \return @ref IfxCif_MiBurstLength_4BeatBursts if 4 bytes are transferred, @ref IfxCif_MiBurstLength_8BeatBursts if 8 bytes are transferred
+ */
+IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength(void);
+
+/** \brief Function to query the currently set write format of the main picture path of the memory interface
+ * \return Currently set write format (one member of @ref IfxCif_MiMainPictureWriteFormat)
+ */
+IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat(void);
+
+/** \brief Function to query the filling level that triggers an interrupt of main picture path Y component
+ * \return Filling level that triggers an interrupt
+ */
+IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset(void);
+
+/** \brief Function to query the filling level of the main picture Y component that triggers an interrupt
+ * \return Filling level of the main picture Y component that triggers an interrupt
+ */
+IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset(void);
+
+/** \brief Function to query the enabled state of the update signal of the offset counter shadow registers
+ * \return @ref IfxCif_State_Enabled if update of the offset counter shadow registers is enabled (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port), @ref IfxCif_State_Disabled if update of the offset counter shadow registers is disabled
+ */
+IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState(void);
+
+/** \brief Function to skip the current or next starting main data path picture
+ * \return None
+ */
+IFX_INLINE void IfxCif_miSkipPicture(void);
+
+/** \brief Function to enable or disable the update of the base address and buffer size shadow registers to the programmed register init values (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)
+ * \param state @ref IfxCif_State_Enabled to enable the generation of the update signal, @ref IfxCif_State_Disabled to disable the generation of the update signal
+ * \return None
+ */
+IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state);
+
+/** \brief Function to enable or disable the change of byte order of the 32 bit output word
+ * \param enableState @ref IfxCif_State_Enabled to enable byte swapping, @ref IfxCif_State_Disabled to disable byte swapping
+ * \return None
+ */
+IFX_INLINE void IfxCif_setMiByteSwapEnableState(IfxCif_State enableState);
+
+/** \brief Function to set the burst length for Cb and Cr data
+ * \param burstLength Burst length to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setMiChrominanceBurstLength(IfxCif_MiBurstLength burstLength);
+
+/** \brief Function to set the write format of the main picture path of the memory interface
+ * \param format Format to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format);
+
+/** \brief Function to set the filling level to trigger an interrupt for main picture path Y component
+ * \param interruptOffset Filling level to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset(uint32 interruptOffset);
+
+/** \brief Function to enable or disable the update of the offset counter shadow registers (update will be executed either when a forced software update occurs or when an automatic config update signal arrives at the MI input port)
+ * \param state @ref IfxCif_State_Enabled to enable the generation of the update signal, @ref IfxCif_State_Disabled to disable the generation of the update signal
+ * \return None
+ */
+IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to clear an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_clearMiInterrupt(IfxCif_MiInterruptSources interruptSource);
+
+/** \brief Function to clear the status information of one status clear source of the memory interface submodule
+ * \param source Status information source for which to clear the status
+ * \return None
+ */
+IFX_EXTERN void IfxCif_clearMiStatus(IfxCif_MiStatusClearSources source);
+
+/** \brief Function to query the initial base address of the ring buffer of one main picture path component
+ * \param component Main picture path component for which to query the initial base address
+ * \return Initial base address of the main picture path component
+ */
+IFX_EXTERN uint32 IfxCif_getMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component);
+
+/** \brief Function to query the masked state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource);
+
+/** \brief Function to query the enabled state of one main data path component at the memory interface input
+ * \param dataPath Main data path component for which to query the enabled state
+ * \return @ref IfxCif_State_Enabled if the main data path component is enabled, @ref IfxCif_State_Disabled if the main data path component is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getMiDataPathInputEnableState(IfxCif_MiDataPaths dataPath);
+
+/** \brief Function to query the enabled state of one main data path component at the memory interface output
+ * \param dataPath Main data path component for which to query the enabled state
+ * \return @ref IfxCif_State_Enabled if the main data path component is enabled, @ref IfxCif_State_Disabled if the main data path component is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getMiDataPathOutputEnableState(IfxCif_MiDataPaths dataPath);
+
+/** \brief Function to query the enabled state of a memory interface data path
+ * \param dataPath Data path to query
+ * \return @ref IfxCif_State_Enabled if the memory interface data path is enabled, @ref IfxCif_State_Disabled if the data path is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getMiFeatureEnableState(IfxCif_MiDataPaths dataPath);
+
+/** \brief Function to query the enabled state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource);
+
+/** \brief Function to query the current base address of the ring buffer of one main picture path component
+ * \param component Main Picture path component for which to query the base address
+ * \return Current base address of the ring buffer of the main picture path component
+ */
+IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentBaseAddress(IfxCif_MiMainPicturePathComponents component);
+
+/** \brief Function to query the initial size of the ring buffer of one main picture path component
+ * \param component Main picture path component for which to query the intial size
+ * \return Initial size of the main picture path component
+ */
+IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component);
+
+/** \brief Function to query the initial offset counter inside the ring buffer of one main picture path compoent
+ * \param component Main picture path component for which to query the initial offset counter
+ * \return Initial offset counter value of the main picture path component
+ */
+IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component);
+
+/** \brief Function to query the current offset counter within the ring buffer of one main picture path component
+ * \param component Main picture path component for which to query the offest counter value
+ * \return Current offset counter within the ring buffer of the main picture path component
+ */
+IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounter(IfxCif_MiMainPicturePathComponents component);
+
+/** \brief Function to query the offset counter which points to the start address of the previously processed picture for one main picture path component
+ * \param component Main picture path component for which to query the offset counter value
+ * \return Offset counter value pointing to the start address of the previously processed picture
+ */
+IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentOffsetCounterStart(IfxCif_MiMainPicturePathComponents component);
+
+/** \brief Function to query the current size of the ring buffer of one main picture path component
+ * \param component Main Picture path component for which to query the size
+ * \return Current size of the ring buffer of the main picture path component
+ */
+IFX_EXTERN uint32 IfxCif_getMiMainPictureComponentSize(IfxCif_MiMainPicturePathComponents component);
+
+/** \brief Function to query the status information of one status information source of the memory interface module
+ * \param source Status information source for which to query the status information
+ * \return @ref IfxCif_ErrorState_NoError if the error has occured since the last clear, @ref IfxCif_ErrorState_Error if the error has occured since the last clear
+ */
+IFX_EXTERN IfxCif_ErrorState IfxCif_getMiStatusInformation(IfxCif_MiStatusInformationSources source);
+
+/** \brief Function to query the raw state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawMiInterruptTriggeredState(IfxCif_MiInterruptSources interruptSource);
+
+/** \brief Function to enable or disable one memory interface data path
+ * \param dataPath Data path to enable or disable
+ * \param enableState @ref IfxCif_State_Enabled to enable the data path, @ref IfxCif_State_Disabled to disable the data path
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setMiFeatureEnableState(IfxCif_MiDataPaths dataPath, IfxCif_State enableState);
+
+/** \brief Function to enable or disable an interrupt
+ * \param interruptSource Source of the interrupt to enable or disable
+ * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setMiInterruptEnableState(IfxCif_MiInterruptSources interruptSource, IfxCif_State interruptEnableState);
+
+/** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setMiInterruptRequestBit(IfxCif_MiInterruptSources interruptSource);
+
+/** \brief Function to set the burst length for Y, JPEG, or RAW data
+ * \param burstLength Burst length to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setMiLuminanceBurstLength(IfxCif_MiBurstLength burstLength);
+
+/** \brief Function to set the initial base address of the ring buffer for one main picture path component
+ * \param component Main picture path component for which to set the initial base address
+ * \param address Base address to set (must be word aligned)
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setMiMainPictureComponentBaseInitAddress(IfxCif_MiMainPicturePathComponents component, Ifx_AddressValue address);
+
+/** \brief Function to set the initial size of the ring buffer for one main picture path component
+ * \param component Main picture path component for which to set the initial size
+ * \param size Size to set (must be word aligned)
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setMiMainPictureComponentInitSize(IfxCif_MiMainPicturePathComponents component, uint32 size);
+
+/** \brief Function to set the initial offset counter inside the ring buffer for one main picture path component
+ * \param component Main picture path component for which to set the initial offest counter
+ * \param offsetCounter Offset counter value to set (must be word aligned)
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setMiMainPictureComponentInitialOffsetCounter(IfxCif_MiMainPicturePathComponents component, uint32 offsetCounter);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_jpeFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to query the current header generation debug control mode
+ * \return Currently set header generation debug control mode (one member of @ref IfxCif_JpeHeaderGenerationMode)
+ */
+IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode(void);
+
+/** \brief Function to query the currently set JPE header mode
+ * \return Currently set JPE header mode (one member of @ref IfxCif_JpeHeaderMode)
+ */
+IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode(void);
+
+/** \brief Function to query the JPE encode mode
+ * \return Always 1, because this is the encoder only edition
+ */
+IFX_INLINE IfxCif_State IfxCif_getJpeMode(void);
+
+/** \brief Function to query the current restart interval
+ * \return Current restart interval
+ */
+IFX_INLINE uint16 IfxCif_getJpeRestartInterval(void);
+
+/** \brief Function to get the current JPEG codec state
+ * \return @ref IfxCif_JpeState_Busy if the JPEG codec is currently processing, @ref IfxCif_JpeState_Free if the JPEG codec is currently free
+ */
+IFX_INLINE IfxCif_JpeState IfxCif_getJpeState(void);
+
+/** \brief Function to query the current JPE Table ID
+ * \return Current JPE Table ID
+ */
+IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId(void);
+
+/** \brief Function to query the current encoder continuous mode
+ * \return Current encoder continuous mode (one member of @ref IfxCif_JpegJfifStreamEncoderContinuousMode)
+ */
+IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode(void);
+
+/** \brief Function to query the current picture encoding format
+ * \return Current picture encoding format
+ */
+IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat(void);
+
+/** \brief Function to immediately start the JPEG encoder.
+ * This function has to be called after @ref IfxCif_startJpegJfifStreamEncoder to start the JPEG encoder
+ * \return None
+ */
+IFX_INLINE void IfxCif_initJpegEncoder(void);
+
+/** \brief Function to start to generate JPEG stream header. Auto reset after one clock cycle
+ * \return None
+ */
+IFX_INLINE void IfxCif_jpeGenerateHeader(void);
+
+/** \brief Function to set the header generation debug control mode
+ * \param headerGenerationMode Header generation debug control mode to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpeHeaderGenerationMode(IfxCif_JpeHeaderGenerationMode headerGenerationMode);
+
+/** \brief Function to set the JPE header mode
+ * \param headerMode Header mode to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode);
+
+/** \brief Function to set the restart interval
+ * \param interval Restart interval to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpeRestartInterval(uint16 interval);
+
+/** \brief Function to set the JPE Table LSB
+ * \param data Value to set for the JPE Table LSB
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpeTableDataLsb(uint8 data);
+
+/** \brief Function to set the JPE Table MSB
+ * \param data Value to set for the JPE Table MSB
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpeTableDataMsb(uint8 data);
+
+/** \brief Function to set the JPE Table ID
+ * \param tableId tableId Table ID to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpeTableId(IfxCif_JpeTableId tableId);
+
+/** \brief Function to set the JPEG codec image sizes
+ * \param hSize Image horizontal size
+ * \param vSize Image vertical size
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize);
+
+/** \brief Function to set the stream encoder continuous mode
+ * \param mode Encoder continuous mode to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode);
+
+/** \brief Function to set the picture encoding format
+ * \param format Encoding format to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setJpegPictureEncodingFormat(IfxCif_JpegPictureEncodingFormat format);
+
+/** \brief Function to start JFIF stream encoding. Auto reset after one clock cycle
+ * \return None
+ */
+IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to clear an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_clearJpeInterrupt(IfxCif_JpeInterruptSources interruptSource);
+
+/** \brief Function to query the currently set Huffman Table length for AC values
+ * \param table Huffman Table for which to query the current length
+ * \return Current length of Huffman Table
+ */
+IFX_EXTERN uint8 IfxCif_getHuffmanAcTableLength(IfxCif_HuffmanTables table);
+
+/** \brief Function to check if a Huffman Table and a Huffman Table component is enabled for AC values
+ * \param table Huffman Table to check
+ * \param component Huffman Table component to check
+ * \return @ref IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_EXTERN IfxCif_State IfxCif_getHuffmanAcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
+
+/** \brief Function to query the current Huffman Table length for DC values
+ * \param table Huffman Table for which to query the current length
+ * \return Current length of Huffman Table
+ */
+IFX_EXTERN uint8 IfxCif_getHuffmanDcTableLength(IfxCif_HuffmanTables table);
+
+/** \brief Function to check if a Huffman Table and a Huffman Table component is enabled for DC values
+ * \param table Huffman Table to check
+ * \param component Huffman Table component to check
+ * \return @ref IfxCif_State_Enabled if the queried Huffman Table and the Huffman Table component is selected, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_EXTERN IfxCif_State IfxCif_getHuffmanDcTableSelectorState(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
+
+/** \brief Function to query the state of one JPE debug signal source
+ * \param source Signal source for which to query the debug signal state
+ * \return @ref IfxCif_JpeDebugSignalState_Inactive if the debug signal is currently inactive, @ref IfxCif_JpeDebugSignalState_Active if the debug signal is currently active
+ */
+IFX_EXTERN IfxCif_JpeDebugSignalState IfxCif_getJpeDebugSignalState(IfxCif_JpeDebugSignalSources source);
+
+/** \brief Function to query the enabled state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource);
+
+/** \brief Function to query the currently selected Q-Table for one component
+ * \param component Component for which to query the currently selected Q-Table
+ * \return Currently selected Q-Table
+ */
+IFX_EXTERN IfxCif_JpeQTableSelector IfxCif_getJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component);
+
+/** \brief Function to query the current enabled state of the scaling of an input value source
+ * \param source Input value source for which to query the enabled state
+ * \return @ref IfxCif_State_Enabled if scaling is enabled, @ref IfxCif_State_Disabled if scaling is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getJpeScalingEnableState(IfxCif_JpeScalingValueSources source);
+
+/** \brief Function to query the currently set JPEG codec image size of one tier
+ * \param tier Tier for which to query the JPEG codec image size
+ * \return Currently set image size for R2B and SGEN blocks
+ */
+IFX_EXTERN uint16 IfxCif_getJpegCodecImageSize(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the masked state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource);
+
+/** \brief Function to query the raw state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawJpeInterruptTriggeredState(IfxCif_JpeInterruptSources interruptSource);
+
+/**
+ * \return None
+ */
+IFX_EXTERN void IfxCif_programJpeTable(IfxCif_JpeTableId tableId, const uint8 *tableEntry, uint8 length);
+
+/** \brief Function to set the Huffman Table length for AC values
+ * \param table Huffman Table for which to set the length
+ * \param length Length to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setHuffmanAcTableLength(IfxCif_HuffmanTables table, uint8 length);
+
+/** \brief Function to set the Huffman Table selector for AC Values
+ * \param table Huffman Table to select
+ * \param component Huffman Table component to select
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setHuffmanAcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
+
+/** \brief Function to set the Huffman Table length for DC values
+ * \param table Huffman Table for which to set the length
+ * \param length Length to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setHuffmanDcTableLength(IfxCif_HuffmanTables table, uint8 length);
+
+/** \brief Function to set the Huffman Table selector for DC values
+ * \param table Huffman Table to select
+ * \param component Huffman Table component to select
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setHuffmanDcTableSelector(IfxCif_HuffmanTables table, IfxCif_HuffmanTableComponents component);
+
+/** \brief Function to enable or disable an interrupt
+ * \param interruptSource Source of the interrupt to enable or disable
+ * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setJpeInterruptEnableState(IfxCif_JpeInterruptSources interruptSource, IfxCif_State interruptEnableState);
+
+/** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setJpeInterruptRequestBit(IfxCif_JpeInterruptSources interruptSource);
+
+/** \brief Function to set the Q-Table selector for one component
+ * \param component Component for which to select the Q-Table
+ * \param selector Q-Table to select
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setJpeQTableSelector(IfxCif_JpeQTableSelectorComponents component, IfxCif_JpeQTableSelector selector);
+
+/** \brief Function to enable or disable scaling of one input value source
+ * \param source Input value source for which to query the enabled state
+ * \param scalingEnable @ref IfxCif_State_Enabled to enable scaling, @ref IfxCif_State_Disabled to disable scaling
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setJpeScalingEnableState(IfxCif_JpeScalingValueSources source, IfxCif_State scalingEnable);
+
+/** \brief Function to set the JPEG codec image size of one tier
+ * \param tier Tier for which to set the JPEG codec image size
+ * \param size Image size for R2B and SGEN blocks
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setJpegCodecImageSize(IfxCif_ImageTiers tier, uint16 size);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_swFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to query the currently set watchdog predivider
+ * \return Currently set predivider
+ */
+IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider(void);
+
+/** \brief Function to query the enabled state of the watchdog unit
+ * \return @ref IfxCif_State_Enabled if the watchdog unit is enabled, @ref IfxCif_State_Disabled if the watchdog unit is disabled
+ */
+IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState(void);
+
+/** \brief Function to set the watchdog predivider counter (A value of 0 means that the Watchdog Counters are increased with every CIF clock cycle. Every other value N leads to an increment at every N+1th cycle)
+ * \param predivider Predivider to set
+ * \return None
+ */
+IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider(uint16 predivider);
+
+/** \brief Function to enable or disable the watchdog unit
+ * \param enableState @ref IfxCif_State_Enabled to enable the watchdog unit, @ref IfxCif_State_Disabled to disable the watchdog unit
+ * \return None
+ */
+IFX_INLINE void IfxCif_setSecurityWatchdogEnableState(IfxCif_State enableState);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to clear an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_clearSecurityWatchdogInterrupt(IfxCif_SecurityWatchdogInterruptSources interruptSource);
+
+/** \brief Function to get the masked state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
+
+/** \brief Function to get the raw state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawSecurityWatchdogInterruptTriggeredState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
+
+/** \brief Function to query the enabled state of an interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource);
+
+/** \brief Function to query the current value of a timeout counter of one tier
+ * \param tier Tier for which to query the timeout counter
+ * \param timeoutCounter Timeout counter to query
+ * \return Current timeout
+ */
+IFX_EXTERN uint16 IfxCif_getSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter);
+
+/** \brief Function to reset one watchdog counter
+ * \param counter Counter to reset
+ * \return None
+ */
+IFX_EXTERN void IfxCif_resetSecurityWatchdogCounter(IfxCif_SecurityWatchdogCounters counter);
+
+/** \brief Function to enable or disable an interrupt
+ * \param interruptSource Source of the interrupt to enable or disable
+ * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptEnableState(IfxCif_SecurityWatchdogInterruptSources interruptSource, IfxCif_State interruptEnableState);
+
+/** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setSecurityWatchdogInterruptRequestBit(IfxCif_SecurityWatchdogInterruptSources interruptSource);
+
+/** \brief Function to set the timeout for a watchdog timeout counter of one tier. A value of 0 disables the timeout
+ * \param tier Tier for which to set the timeout
+ * \param timeoutCounter Timeout counter for which to set the timeout
+ * \param timeout Timeout to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setSecurityWatchdogTimeout(IfxCif_ImageTiers tier, IfxCif_SecurityWatchdogTimeoutCounters timeoutCounter, uint16 timeout);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_ispisFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to query the enabled state of image stabilization
+ * \return @ref IfxCif_State_Enabled if image stabilization is enabled, @ref IfxCif_State_Disabled if image stabilization is disabled
+ */
+IFX_INLINE IfxCif_State IfxCif_getIspisEnableState(void);
+
+/** \brief Function to query the current image stabilization recenter value
+ * \return Current image stabilization recenter value
+ */
+IFX_INLINE uint8 IfxCif_getIspisRecenterValue(void);
+
+/** \brief Function to enable or disable image stabilization
+ * \param enableState @ref IfxCif_State_Enabled to enable image stabilization, @ref IfxCif_State_Disabled to disable image stabilization
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState);
+
+/** \brief Function to set the image stabilization offsets of the output window
+ * \param hOffset Horizontal Offset
+ * \param vOffset Vertical Offset
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset);
+
+/** \brief Function to set the picture size
+ * \param hSize Horizontal Picture Size
+ * \param vSize Vertical Picture Size
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize);
+
+/** \brief Function to set the image stabilization recenter value
+ * \param value Recenter value to set (0 to disabled recenter value, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2 power(recenter))
+ * \return None
+ */
+IFX_INLINE void IfxCif_setIspisRecenterValue(uint8 value);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to query the current camera displacement for one tier
+ * \param tier Tier for which to query the camera displacement
+ * \return Current camera displacement
+ */
+IFX_EXTERN uint16 IfxCif_getIspisCameraDisplacement(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the offset of the current picture for one tier
+ * \param tier Tier for which to query the offset
+ * \return Offset of the current picture
+ */
+IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureOffset(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the picture size of the current picture for one tier
+ * \param tier Tier for which to query the picture size
+ * \return Picture size of the current picture
+ */
+IFX_EXTERN uint16 IfxCif_getIspisCurrentPictureSize(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the current maximum displacement for one tier
+ * \param tier Tier for which to query the maximum displacement
+ * \return Current maximum displacement
+ */
+IFX_EXTERN uint16 IfxCif_getIspisMaximumDisplacement(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the current image stabilization offset of the output window of one tier
+ * \param tier Tier for which to query the offset
+ * \return Current offset
+ */
+IFX_EXTERN uint16 IfxCif_getIspisOffsetOutputWindow(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the current picture size for one tier
+ * \param tier Tier for which to query the picture size
+ * \return Current picture size
+ */
+IFX_EXTERN uint16 IfxCif_getIspisPictureSize(IfxCif_ImageTiers tier);
+
+/** \brief Function to query the enabled state of image stabilization recenter feature
+ * \return @ref IfxCif_State_Enabled if the image stabilization recenter feature is enabled, @ref IfxCif_State_Disabled if the image stabilization recenter feature is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getIspisRecenterEnableState(void);
+
+/** \brief Function to set the camera displacement for one tier
+ * \param tier Tier for which to set the camera displacement
+ * \param displacement Camera displacement to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspisCameraDisplacement(uint16 tier, uint16 displacement);
+
+/** \brief Function to set the maximum displacement for one tier
+ * \param tier Tier for which to set the maximum displacement
+ * \param displacement Displacement to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspisMaximumDisplacement(IfxCif_ImageTiers tier, uint16 displacement);
+
+/** \brief Function to set the image stabilization offset of the output window of one tier
+ * \param tier Tier for which to set the offset
+ * \param offset Offset to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspisOutputWindowOffset(IfxCif_ImageTiers tier, uint16 offset);
+
+/** \brief Function to set the picture size for one tier
+ * \param tier Tier for which to set the picture size
+ * \param size Size to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setIspisPictureSize(IfxCif_ImageTiers tier, uint16 size);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_epFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to clear one extra path error
+ * \param source Extra path error to clear
+ * \return None
+ */
+IFX_EXTERN void IfxCif_clearEpError(IfxCif_EpErrorClearSources source);
+
+/** \brief Function to clear an interrupt
+ * \param z Extra path for which to clear the interrupt
+ * \param interruptSource Source of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_clearEpInterrupt(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
+
+/** \brief Function to trigger an immediate configuration update for one extra path
+ * \param z Function to trigger an immediate configuration update for one extra path
+ * \return None
+ */
+IFX_EXTERN void IfxCif_epForceConfigurationUpdate(IfxCif_ExtraPath z);
+
+/** \brief Function to skip one picture of one extra path
+ * \param z Extra path for which to skip one picture
+ * \return None
+ */
+IFX_EXTERN void IfxCif_epSkipPicture(IfxCif_ExtraPath z);
+
+/** \brief Function to query the current base address of the ring buffer of one extra path
+ * \param z Extra path for which to query the current base address of the ring buffer
+ * \return Current base address of the ring buffer
+ */
+IFX_EXTERN uint32 IfxCif_getEpBaseAddress(IfxCif_ExtraPath z);
+
+/** \brief Function to query the initial base address of the ring buffer of one extra path
+ * \param z Extra path for which to query the initial base address
+ * \return Initial base address of the ring buffer of the extra path
+ */
+IFX_EXTERN uint32 IfxCif_getEpBaseInitAddress(IfxCif_ExtraPath z);
+
+/** \brief Function to query the image cropping camera displacement of one tier of one extra path
+ * \param z Extra path for which to query the image cropping camera displacement
+ * \param tier Tier for which to query the image cropping camera displacement
+ * \return Current image cropping camera displacement
+ */
+IFX_EXTERN uint16 IfxCif_getEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
+
+/** \brief Function to query the current image cropping picture offset of one tier of one extra path
+ * \param z Extra path for which to query the current image cropping picture offset
+ * \param tier Tier for which to query the current image cropping picture offset
+ * \return Current image cropping picture offset
+ */
+IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureOffset(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
+
+/** \brief Function to query the current image cropping picture size of one tier of one extra path
+ * \param z Extra path for which to query the current image cropping picture size
+ * \param tier Tier for which to query the current image cropping picture size
+ * \return Current image cropping picture size
+ */
+IFX_EXTERN uint16 IfxCif_getEpCroppingCurrentPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
+
+/** \brief Function to query the image cropping enabled state of one extra path
+ * \param z Extra path for which to query the image cropping enabled state
+ * \return @ref IfxCif_State_Enabled if image cropping is enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_EXTERN IfxCif_State IfxCif_getEpCroppingEnableState(IfxCif_ExtraPath z);
+
+/** \brief Function to query the maximum displacement of one tier of one extra path
+ * \param z Extra path for which to query the maximum displacement
+ * \param tier Tier for which to query the maximum displacement
+ * \return Current maximum displacement
+ */
+IFX_EXTERN uint16 IfxCif_getEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
+
+/** \brief Function to query the image cropping offset of the output window of one tier of one extra path
+ * \param z Extra path for which to query the image cropping offset of the output window
+ * \param tier Tier for which to query the image cropping offset of the output window
+ * \return Current image cropping offset of the output window
+ */
+IFX_EXTERN uint16 IfxCif_getEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
+
+/** \brief Function to query the image cropping picture size of one tier of one extra path
+ * \param z Extra path for which to query the image cropping picture size
+ * \param tier Tier for which to query the image cropping picture size of one tier of one extra path
+ */
+IFX_EXTERN uint16 IfxCif_getEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier);
+
+/** \brief Function to query the enabled state of the recenter feature of one extra path
+ * \param z Extra path for which to query the enabled state of the recenter feature
+ * \return @ref IfxCif_State_Enabled if the recenter feature is enabled, @ref IfxCif_State_Disabled otherwise
+ */
+IFX_EXTERN IfxCif_State IfxCif_getEpCroppingRecenterState(IfxCif_ExtraPath z);
+
+/** \brief Function to query the state of an extra path error source
+ * \param source Error source for which to query the state
+ * \return @ref IfxCif_ErrorState_NoError if the error did not occur, @ref IfxCif_ErrorState_Error if the error occured
+ */
+IFX_EXTERN IfxCif_ErrorState IfxCif_getEpErrorState(IfxCif_EpErrorSources source);
+
+/** \brief Function to query the enabled state of one feature of one extra path
+ * \param z Extra path for which to query the enabled state of the feature
+ * \param feature Feature which to query
+ * \return @ref IfxCif_State_Enabled if the feature of the extra path is enabled, @ref IfxCif_State_Disabled if the feature of the extra path is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature);
+
+/** \brief Function to query the initial size of the ring buffer of one extra path
+ * \param z Extra path for which to query the initial size
+ * \return Initial size of the ring buffer of the extra path
+ */
+IFX_EXTERN uint32 IfxCif_getEpInitSize(IfxCif_ExtraPath z);
+
+/** \brief Function to query the initial filling level interrupt offset of one extra path
+ * \param z Extra path for which to query the initial filling level interrupt offset
+ * \return Initial filling level interrupt offset of the extra path
+ */
+IFX_EXTERN uint32 IfxCif_getEpInitialFillLevelInterruptOffset(IfxCif_ExtraPath z);
+
+/** \brief Function to query the initial offset counter of one extra path
+ * \param z Extra path for which to query the initial offset counter
+ * \return Initial offset counter of the extra path
+ */
+IFX_EXTERN uint32 IfxCif_getEpInitialOffsetCounter(IfxCif_ExtraPath z);
+
+/** \brief Function to query the current input enable state of one extra path
+ * \param z Extra path for which to query the current input enable state
+ * \return @ref IfxCif_State_Enabled if the extra path is used in module MI_IN, @ref IfxCif_State_Disabled if the extra path is not used in module MI_IN
+ */
+IFX_EXTERN IfxCif_State IfxCif_getEpInputEnableState(IfxCif_ExtraPath z);
+
+/** \brief Function to query the enabled state of an interrupt
+ * \param z Extra path for which to query the enabled state of the interrupt
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_State_Enabled if the interrupt is enabled, @ref IfxCif_State_Disabled if the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
+
+/** \brief Function to query the current interrupt offset of one extra path
+ * \param z Extra path for which to query the current interrupt offset
+ * \return Current interrupt offset
+ */
+IFX_EXTERN uint32 IfxCif_getEpInterruptOffset(IfxCif_ExtraPath z);
+
+/** \brief Function to query the current offset counter of one extra path
+ * \param z Extra path for which to query the current offset counter
+ * \return Current offset counter
+ */
+IFX_EXTERN uint32 IfxCif_getEpOffsetCounter(IfxCif_ExtraPath z);
+
+/** \brief Function to query the initial offset counter start value of one extra path
+ * \param z Extra path for which to query the initial offset counter start value
+ * \return Initial offset counter start value of the extra path
+ */
+IFX_EXTERN uint32 IfxCif_getEpOffsetCounterStart(IfxCif_ExtraPath z);
+
+/** \brief Function to query the current output enable state of one extra path
+ * \param z Extra path for which to query the current output enable state
+ * \return @ref IfxCif_State_Enabled if the extra path is used in module MI_OUT, @ref IfxCif_State_Disabled if the extra path is not used in module MI_OUT
+ */
+IFX_EXTERN IfxCif_State IfxCif_getEpOutputEnableState(IfxCif_ExtraPath z);
+
+/** \brief Function to query the current recenter value of one extra path
+ * \param z Extra path for which to query the current recenter value
+ * \return Current recenter value
+ */
+IFX_EXTERN uint8 IfxCif_getEpRecenterValue(IfxCif_ExtraPath z);
+
+/** \brief Function to query the current ring buffer size of one extra path
+ * \param z Extra path for which to query the ring buffer size
+ * \return Current ring buffer size
+ */
+IFX_EXTERN uint32 IfxCif_getEpSize(IfxCif_ExtraPath z);
+
+/** \brief Function to query the write format of one extra path
+ * \param z Extra path for which to query the write format
+ * \return Set write format of the extra path (one member of @ref IfxCif_EpWriteFormat)
+ */
+IFX_EXTERN IfxCif_EpWriteFormat IfxCif_getEpWriteFormat(IfxCif_ExtraPath z);
+
+/** \brief Function to get the masked state of an interrupt
+ * \param z Extra path for which to query the interrupt state
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set and the interrupt is enabled, @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is not set or the interrupt is disabled
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getMaskedEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
+
+/** \brief Function to query the raw state of an interrupt
+ * \param z Extra path for which to query the interrupt state
+ * \param interruptSource Source of the interrupt
+ * \return @ref IfxCif_InterruptTriggeredState_Triggered if the interrupt request bit is set, @ref IfxCif_InterruptTriggeredState_NotTriggered if the interrupt request bit is not set
+ */
+IFX_EXTERN IfxCif_InterruptTriggeredState IfxCif_getRawEpInterruptTriggeredState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
+
+/** \brief Function to set the initial base address of the ring buffer of one extra path
+ * \param z Extra path for which to set the initial base address
+ * \param baseAddress Initial base address of the ring buffer to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpBaseInitAddress(IfxCif_ExtraPath z, Ifx_AddressValue baseAddress);
+
+/** \brief Function to set the image cropping camera displacement of one tier of one extra path
+ * \param z Extra path for which to set the image cropping camera displacement
+ * \param tier Tier for which to set the image cropping camera displacement
+ * \param displacement Image cropping camera displacement to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpCroppingCameraDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement);
+
+/** \brief Function to enable or disable image cropping of one extra path
+ * \param z Extra path for which to enable or disable image cropping
+ * \param enableState @ref IfxCif_State_Enabled to enable image cropping, @ref IfxCif_State_Disabled to disable image cropping
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpCroppingEnableState(IfxCif_ExtraPath z, uint32 enableState);
+
+/** \brief Function to set the maximum displacement of one tier of one extra path
+ * \param z Extra path for which to set the maximum displacement
+ * \param tier Tier for which to set the maximum displacement
+ * \param displacement Maximum displacement to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpCroppingMaximumDisplacement(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 displacement);
+
+/** \brief Function to set the image cropping offset of the output window of one tier of one extra path
+ * \param z Extra path for which to set the image cropping offset of the output window
+ * \param tier Tier for which to set the image cropping offset of the output window
+ * \param offset Offset to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpCroppingOffsetOutputWindow(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 offset);
+
+/** \brief Function to set the image cropping offsets of the output window of one extra path
+ * \param z Extra path for which to set the image cropping offset of the output window
+ * \param hOffset Offset horizontal to set
+ * \param vOffset Offset vertical to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpCroppingOffsetsOutputWindow(IfxCif_ExtraPath z, uint16 hOffset, uint16 vOffset);
+
+/** \brief Function to set the image cropping picture size of one tier of one extra path
+ * \param z Extra path for which to set the image cropping picture size
+ * \param tier Tier for which to set the image cropping picture size
+ * \param size Image cropping picture size to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpCroppingPictureSize(IfxCif_ExtraPath z, IfxCif_ImageTiers tier, uint16 size);
+
+/** \brief Function to set the image cropping picture sizes one extra path
+ * \param z Extra path for which to set the image cropping picture size
+ * \param hSize Image cropping picture horizontal size to set
+ * \param vSize Image cropping picture vertical size to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpCroppingPictureSizes(IfxCif_ExtraPath z, uint16 hSize, uint16 vSize);
+
+/** \brief Function to enable or disable one feature of one extra path
+ * \param z Extra path for which to enable or disable one feature
+ * \param feature Feature to enable or disable
+ * \param enableState @ref IfxCif_State_Enabled to enable the feature, @ref IfxCif_State_Disabled to disable the feature
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpFeatureEnableState(IfxCif_ExtraPath z, IfxCif_EpFeatures feature, IfxCif_State enableState);
+
+/** \brief Function to set the initial size of the ring buffer of one extra path
+ * \param z Extra path for which to set the initial size of the ring buffer
+ * \param size Initial size of the ring buffer to se
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpInitSize(IfxCif_ExtraPath z, uint32 size);
+
+/** \brief Function to set the initial filling level interrupt offset of one extra path
+ * \param z Extra path for which to set the initial filling level interrupt offset
+ * \param interruptOffset Initial filling level interrupt offset to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpInitialFillLevelInterruptOffset(uint32 z, uint32 interruptOffset);
+
+/** \brief Function to set the initial offset counter of one extra path
+ * \param z Extra path for which to set the initial offset counter
+ * \param offsetCounter Initial offset counter to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpInitialOffsetCounter(IfxCif_ExtraPath z, uint32 offsetCounter);
+
+/** \brief Function to enable or disable an interrupt
+ * \param z Extra path for which to enable or disable the interrupt
+ * \param interruptSource Source of the interrupt to enable or disable
+ * \param interruptEnableState @ref IfxCif_State_Enabled to enable the interrupt, @ref IfxCif_State_Disabled to disable the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpInterruptEnableState(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource, IfxCif_State interruptEnableState);
+
+/** \brief Function to set an interrupt request bit (does not necessarily trigger an interrupt)
+ * \param z Function to set an interrupt request bit (does not necessarily trigger an interrupt)
+ * \param interruptSource Extra path for which to set the interrupt request bit
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpInterruptRequestBit(IfxCif_ExtraPath z, IfxCif_EpInterrupts interruptSource);
+
+/** \brief Function to set the initial offset counter start value of one extra path
+ * \param z Extra path for which to set the initial offset counter start value
+ * \param offsetCounter Initial offset counter start value to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpOffsetCounterStart(uint32 z, uint32 offsetCounter);
+
+/** \brief Function to set the recenter value of one extra path (0 to switch the recenter feature off, for all other values recentering is active (cur_h/v_offs-H/V_OFFS)/2power(recenter))
+ * \param z Extra path for which to set the recenter value
+ * \param value Recenter value to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpRecenterValue(IfxCif_ExtraPath z, uint8 value);
+
+/** \brief Function to set the write format for one extra path
+ * \param z Extra path for which to set the write format
+ * \param writeFormat Write format to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setEpWriteFormat(IfxCif_ExtraPath z, IfxCif_EpWriteFormat writeFormat);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cif_Std_dpFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to query the debug path enabled state
+ * \return @ref IfxCif_State_Enabled if the debug path is enabled, @ref IfxCif_State_Disabled if the debug path is disabled
+ */
+IFX_INLINE IfxCif_State IfxCif_getDpEnableState(void);
+
+/** \brief Function to query the selected debug path source path
+ * \return Currently selected debug path source path (one member of @ref IfxCif_DpSourcePath)
+ */
+IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath(void);
+
+/** \brief Function to enable or disable the debug path
+ * \param enableState @ref IfxCif_State_Enabled to enable the debug path, @ref IfxCif_State_Disabled to disable the debug path
+ * \return None
+ */
+IFX_INLINE void IfxCif_setDpEnableState(IfxCif_State enableState);
+
+/** \brief Function to select one debug path source path
+ * \param sourcePath Source path to select
+ * \return None
+ */
+IFX_INLINE void IfxCif_setDpSourcePath(IfxCif_DpSourcePath sourcePath);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to reset one debug path counter
+ * \param counter Debug path counter to reset
+ * \return None
+ */
+IFX_EXTERN void IfxCif_dpResetCounter(IfxCif_DpCounters counter);
+
+/** \brief Function to query the transmission enabled state of one debug path control source
+ * \param source Source for which to query the transmission enabled state
+ * \return @ref IfxCif_State_Enabled if transmission is enabled, @ref IfxCif_State_Disabled if transmission is disabled
+ */
+IFX_EXTERN IfxCif_State IfxCif_getDpControlEnableState(IfxCif_DpControlSources source);
+
+/** \brief Function to query the current counter value of one debug path counter
+ * \param counter Counter for which to query the value
+ * \return Current counter value
+ */
+IFX_EXTERN uint32 IfxCif_getDpCounter(IfxCif_DpCounters counter);
+
+/** \brief Function to query the value of one user defined debug symbol
+ * \param x User defined symbol to query
+ * \return Value of the user defined debug symbol
+ */
+IFX_EXTERN uint16 IfxCif_getDpUserDefinedSymbol(uint8 x);
+
+/** \brief Function to enable or disable transmission of one debug path control source
+ * \param source Source for which to enable or disable transmission
+ * \param enableState @ref IfxCif_State_Enabled to enable transmission, @ref IfxCif_State_Disabled to disable transmission
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setDpControlEnableState(IfxCif_DpControlSources source, IfxCif_State enableState);
+
+/** \brief Function to set one debug path counter to a counter value
+ * \param counter Counter to set
+ * \param counterValue Counter value to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setDpCounter(IfxCif_DpCounters counter, uint32 counterValue);
+
+/** \brief Function to set one user defined debug symbol
+ * \param x User defined symbol to set
+ * \param value Value to set
+ * \return None
+ */
+IFX_EXTERN void IfxCif_setDpUserDefinedSymbol(uint8 x, uint16 value);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxCif_clearKernelResetState(void)
+{
+ MODULE_CIF.BBB.KRSTCLR.B.CLR = 1;
+}
+
+
+IFX_INLINE void IfxCif_generateIspFrameSynchronousConfigUpdateSignal(void)
+{
+ MODULE_CIF.ISP.CTRL.B.ISP_GEN_CFG_UPD = 1;
+}
+
+
+IFX_INLINE void IfxCif_generateIspImmediateConfigUpdateSignal(void)
+{
+ MODULE_CIF.ISP.CTRL.B.ISP_CFG_UPD = 1;
+}
+
+
+IFX_INLINE void IfxCif_generateMiImmediateConfigUpdateSignal(void)
+{
+ MODULE_CIF.MI.INIT.B.MI_CFG_UPD = 1;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getBaseAddressInitializationEnableState(void)
+{
+ return (IfxCif_State)MODULE_CIF.MI.CTRL.B.INIT_BASE_EN;
+}
+
+
+IFX_INLINE uint16 IfxCif_getCifModuleId(void)
+{
+ return MODULE_CIF.BBB.MODID.B.MODNUMBER;
+}
+
+
+IFX_INLINE IfxCif_PortInputSelection IfxCif_getCifModulePortInputSelection(void)
+{
+ return IfxCif_PortInputSelection_PinMapping0;
+}
+
+
+IFX_INLINE uint8 IfxCif_getCifModuleRevision(void)
+{
+ return MODULE_CIF.BBB.MODID.B.MODREV;
+}
+
+
+IFX_INLINE uint8 IfxCif_getCifModuleType(void)
+{
+ return MODULE_CIF.BBB.MODID.B.MODTYPE;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getClockControlLogicState(void)
+{
+ /* bit is inverted */
+ return (1 != MODULE_CIF.CCL.B.CIF_CCLDISS) ? IfxCif_State_Enabled : IfxCif_State_Disabled;
+}
+
+
+IFX_INLINE uint16 IfxCif_getCurrentIspFrameCount(void)
+{
+ return MODULE_CIF.ISP.FRAME_COUNT.B.FRAME_COUNTER;
+}
+
+
+IFX_INLINE IfxCif_IspInformFieldInformation IfxCif_getCurrentIspInformFieldInformation(void)
+{
+ return (IfxCif_IspInformFieldInformation)MODULE_CIF.ISP.FLAGS_SHD.B.INFORM_FIELD;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getCurrentIspInputFormatterState(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.ISP_INFORM_ENABLE_SHD;
+}
+
+
+IFX_INLINE IfxCif_DataPathSelectorForMainPath IfxCif_getDataPathSelectorForMainPath(void)
+{
+ return (IfxCif_DataPathSelectorForMainPath)MODULE_CIF.DPCL.B.CIF_MP_MUX;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getDpEnableState(void)
+{
+ return (IfxCif_State)MODULE_CIF.DP.CTRL.B.DP_EN;
+}
+
+
+IFX_INLINE IfxCif_DpSourcePath IfxCif_getDpSourcePath(void)
+{
+ return (IfxCif_DpSourcePath)MODULE_CIF.DP.CTRL.B.DP_SEL;
+}
+
+
+IFX_INLINE IfxCif_InputInterface IfxCif_getInputInterface(void)
+{
+ return (IfxCif_InputInterface)MODULE_CIF.DPCL.B.IF_SELECT;
+}
+
+
+IFX_INLINE IfxCif_IspCcirSequence IfxCif_getIspCcirSequence(void)
+{
+ return (IfxCif_IspCcirSequence)MODULE_CIF.ISP.ACQ_PROP.B.CCIR_SEQ;
+}
+
+
+IFX_INLINE IfxCif_IspColorSpaceMatrixCrominanceClippingRange IfxCif_getIspColorSpaceMatrixCrominanceClippingRange(void)
+{
+ return (IfxCif_IspColorSpaceMatrixCrominanceClippingRange)MODULE_CIF.ISP.CTRL.B.ISP_CSM_C_RANGE;
+}
+
+
+IFX_INLINE IfxCif_IspColorSpaceMatrixLuminanceClippingRange IfxCif_getIspColorSpaceMatrixLuminanceClippingRange(void)
+{
+ return (IfxCif_IspColorSpaceMatrixLuminanceClippingRange)MODULE_CIF.ISP.CTRL.B.ISP_CSM_Y_RANGE;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getIspFieldInvertState(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISP.ACQ_PROP.B.FIELD_INVERT;
+}
+
+
+IFX_INLINE IfxCif_IspFieldSelection IfxCif_getIspFieldSelection(void)
+{
+ return (IfxCif_IspFieldSelection)MODULE_CIF.ISP.ACQ_PROP.B.FIELD_SELECTION;
+}
+
+
+IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspHSyncPolarity(void)
+{
+ return (IfxCif_IspSyncPolarity)MODULE_CIF.ISP.ACQ_PROP.B.HSYNC_POL;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getIspInputFormatterState(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_INFORM_ENABLE;
+}
+
+
+IFX_INLINE IfxCif_IspInputInterface IfxCif_getIspInputInterface(void)
+{
+ return (IfxCif_IspInputInterface)MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION;
+}
+
+
+IFX_INLINE uint16 IfxCif_getIspInputPortSDataState(void)
+{
+ return MODULE_CIF.ISP.FLAGS_SHD.B.S_DATA;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getIspInputPortSHSyncState(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.S_HSYNC;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getIspInputPortSVSyncState(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.S_VSYNC;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getIspMode(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_MODE;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getIspOutputState(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISP.CTRL.B.ISP_ENABLE;
+}
+
+
+IFX_INLINE IfxCif_IspSamplingEdge IfxCif_getIspSamplingEdge(void)
+{
+ return (IfxCif_IspSamplingEdge)MODULE_CIF.ISP.ACQ_PROP.B.SAMPLE_EDGE;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getIspState(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISP.FLAGS_SHD.B.ISP_ENABLE_SHD;
+}
+
+
+IFX_INLINE IfxCif_IspSyncPolarity IfxCif_getIspVSyncPolarity(void)
+{
+ return (IfxCif_IspSyncPolarity)MODULE_CIF.ISP.ACQ_PROP.B.VSYNC_POL;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getIspisEnableState(void)
+{
+ return (IfxCif_State)MODULE_CIF.ISPIS.CTRL.B.IS_EN;
+}
+
+
+IFX_INLINE uint8 IfxCif_getIspisRecenterValue(void)
+{
+ return MODULE_CIF.ISPIS.RECENTER.B.RECENTER;
+}
+
+
+IFX_INLINE IfxCif_JpeHeaderGenerationMode IfxCif_getJpeHeaderGenerationMode(void)
+{
+ return (IfxCif_JpeHeaderGenerationMode)MODULE_CIF.JPE.TABLE_FLUSH.B.TABLE_FLUSH;
+}
+
+
+IFX_INLINE IfxCif_JpeHeaderMode IfxCif_getJpeHeaderMode(void)
+{
+ return (IfxCif_JpeHeaderMode)MODULE_CIF.JPE.HEADER_MODE.B.HEADER_MODE;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getJpeMode(void)
+{
+ return (IfxCif_State)MODULE_CIF.JPE.ENCODE_MODE.B.ENCODE_MODE;
+}
+
+
+IFX_INLINE uint16 IfxCif_getJpeRestartInterval(void)
+{
+ return MODULE_CIF.JPE.RESTART_INTERVAL.B.RESTART_INTERVAL;
+}
+
+
+IFX_INLINE IfxCif_JpeState IfxCif_getJpeState(void)
+{
+ return (IfxCif_JpeState)MODULE_CIF.JPE.ENCODER_BUSY.B.CODEC_BUSY;
+}
+
+
+IFX_INLINE IfxCif_JpeTableId IfxCif_getJpeTableId(void)
+{
+ return (IfxCif_JpeTableId)MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID;
+}
+
+
+IFX_INLINE IfxCif_JpegJfifStreamEncoderContinuousMode IfxCif_getJpegJfifStreamEncoderContinuousMode(void)
+{
+ return (IfxCif_JpegJfifStreamEncoderContinuousMode)MODULE_CIF.JPE.ENCODE.B.CONT_MODE;
+}
+
+
+IFX_INLINE IfxCif_JpegPictureEncodingFormat IfxCif_getJpegPictureEncodingFormat(void)
+{
+ return (IfxCif_JpegPictureEncodingFormat)MODULE_CIF.JPE.PIC_FORMAT.B.ENC_PIC_FORMAT;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getKernelResetStatus(void)
+{
+ return (IfxCif_State)MODULE_CIF.BBB.KRST0.B.RSTSTAT;
+}
+
+
+IFX_INLINE uint32 IfxCif_getMiByteCount(void)
+{
+ return MODULE_CIF.MI.BYTE_CNT.B.BYTE_CNT;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getMiByteSwapEnableState(void)
+{
+ return (IfxCif_State)MODULE_CIF.MI.CTRL.B.BYTE_SWAP;
+}
+
+
+IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiChrominanceBurstLength(void)
+{
+ return (IfxCif_MiBurstLength)MODULE_CIF.MI.CTRL.B.BURST_LEN_CHROM;
+}
+
+
+IFX_INLINE IfxCif_MiBurstLength IfxCif_getMiLuminanceBurstLength(void)
+{
+ return (IfxCif_MiBurstLength)MODULE_CIF.MI.CTRL.B.BURST_LEN_LUM;
+}
+
+
+IFX_INLINE IfxCif_MiMainPictureWriteFormat IfxCif_getMiMainPictureWriteFormat(void)
+{
+ return (IfxCif_MiMainPictureWriteFormat)MODULE_CIF.MI.CTRL.B.MP_WRITE_FORMAT;
+}
+
+
+IFX_INLINE uint32 IfxCif_getMiMainPictureYInitialFillLevelInterruptOffset(void)
+{
+ /* read value from unsigned component of the register structure because lower bits are tied to 0
+ * as interrupt offset needs to be a word aligned value */
+ return MODULE_CIF.MI.MP_Y_IRQ_OFFS_INIT.U;
+}
+
+
+IFX_INLINE uint32 IfxCif_getMiMainPictureYInterruptOffset(void)
+{
+ return MODULE_CIF.MI.MP_Y_IRQ_OFFS_SHD.B.MP_Y_IRQ_OFFS;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getMiOffsetCounterInitializationEnableState(void)
+{
+ return (IfxCif_State)MODULE_CIF.MI.CTRL.B.INIT_OFFSET_EN;
+}
+
+
+IFX_INLINE uint16 IfxCif_getModuleNumber(void)
+{
+ return MODULE_CIF.ID.B.MODNUMBER;
+}
+
+
+IFX_INLINE uint8 IfxCif_getModuleRevisionNumber(void)
+{
+ return MODULE_CIF.ID.B.MODREV;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getModuleState(void)
+{
+ /* bit is inverted */
+ return (IfxCif_State)(1 != MODULE_CIF.BBB.CLC.B.DISS) ? IfxCif_State_Enabled : IfxCif_State_Disabled;
+}
+
+
+IFX_INLINE uint8 IfxCif_getModuleType(void)
+{
+ return MODULE_CIF.ID.B.MODTYPE;
+}
+
+
+IFX_INLINE uint16 IfxCif_getNumberOfAcquisitionFrames(void)
+{
+ return MODULE_CIF.ISP.ACQ_NR_FRAMES.B.ACQ_NR_FRAMES;
+}
+
+
+IFX_INLINE uint16 IfxCif_getSecurityWatchdogCounterPredivider(void)
+{
+ return MODULE_CIF.WD.CTRL.B.WD_PREDIV;
+}
+
+
+IFX_INLINE IfxCif_State IfxCif_getSecurityWatchdogEnableState(void)
+{
+ return (IfxCif_State)MODULE_CIF.WD.CTRL.B.WD_EN;
+}
+
+
+IFX_INLINE IfxCif_YCSplitterChannelMode IfxCif_getYCSplitterChannelMode(void)
+{
+ return (IfxCif_YCSplitterChannelMode)MODULE_CIF.DPCL.B.CIF_CHAN_MODE;
+}
+
+
+IFX_INLINE void IfxCif_initJpegEncoder(void)
+{
+ MODULE_CIF.JPE.INIT.B.JP_INIT = 1;
+}
+
+
+IFX_INLINE void IfxCif_jpeGenerateHeader(void)
+{
+ MODULE_CIF.JPE.GEN_HEADER.B.GEN_HEADER = 1;
+}
+
+
+IFX_INLINE void IfxCif_miSkipPicture(void)
+{
+ MODULE_CIF.MI.INIT.B.MI_SKIP = 1;
+}
+
+
+IFX_INLINE void IfxCif_setClockControlLogicState(IfxCif_State clockControlLogicState)
+{
+ /* bit is inverted */
+ MODULE_CIF.CCL.B.CIF_CCLFDIS = (clockControlLogicState == IfxCif_State_Disabled) ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxCif_setDataPathSelectorForMainPath(IfxCif_DataPathSelectorForMainPath pathSelector)
+{
+ MODULE_CIF.DPCL.B.CIF_MP_MUX = pathSelector;
+}
+
+
+IFX_INLINE void IfxCif_setDpEnableState(IfxCif_State enableState)
+{
+ MODULE_CIF.DP.CTRL.B.DP_EN = enableState;
+}
+
+
+IFX_INLINE void IfxCif_setDpSourcePath(IfxCif_DpSourcePath sourcePath)
+{
+ MODULE_CIF.DP.CTRL.B.DP_SEL = sourcePath;
+}
+
+
+IFX_INLINE void IfxCif_setInputInterface(IfxCif_InputInterface interface)
+{
+ IFX_UNUSED_PARAMETER(interface);
+ MODULE_CIF.DPCL.B.IF_SELECT = IfxCif_InputInterface_ParallelInterface;
+}
+
+
+IFX_INLINE void IfxCif_setIspAcquisitionOffsets(uint16 hOffset, uint16 vOffset)
+{
+ MODULE_CIF.ISP.ACQ_H_OFFS.B.ACQ_H_OFFS = hOffset;
+ MODULE_CIF.ISP.ACQ_V_OFFS.B.ACQ_V_OFFS = vOffset;
+}
+
+
+IFX_INLINE void IfxCif_setIspAcquisitionSizes(uint16 hSize, uint16 vSize)
+{
+ MODULE_CIF.ISP.ACQ_H_SIZE.U = hSize;
+ MODULE_CIF.ISP.ACQ_V_SIZE.U = vSize;
+}
+
+
+IFX_INLINE void IfxCif_setIspCcirSequence(IfxCif_IspCcirSequence sequence)
+{
+ MODULE_CIF.ISP.ACQ_PROP.B.CCIR_SEQ = sequence;
+}
+
+
+IFX_INLINE void IfxCif_setIspColorSpaceMatrixCrominanceClippingRange(IfxCif_IspColorSpaceMatrixCrominanceClippingRange clippingRange)
+{
+ MODULE_CIF.ISP.CTRL.B.ISP_CSM_C_RANGE = clippingRange;
+}
+
+
+IFX_INLINE void IfxCif_setIspColorSpaceMatrixLuminanceClippingRange(IfxCif_IspColorSpaceMatrixLuminanceClippingRange clippingRange)
+{
+ MODULE_CIF.ISP.CTRL.B.ISP_CSM_Y_RANGE = clippingRange;
+}
+
+
+IFX_INLINE void IfxCif_setIspFieldInvertState(IfxCif_State fieldInvertState)
+{
+ MODULE_CIF.ISP.ACQ_PROP.B.FIELD_INVERT = fieldInvertState;
+}
+
+
+IFX_INLINE void IfxCif_setIspFieldSelection(IfxCif_IspFieldSelection selection)
+{
+ MODULE_CIF.ISP.ACQ_PROP.B.FIELD_SELECTION = selection;
+}
+
+
+IFX_INLINE void IfxCif_setIspHSyncPolarity(IfxCif_IspSyncPolarity polarity)
+{
+ MODULE_CIF.ISP.ACQ_PROP.B.HSYNC_POL = polarity;
+}
+
+
+IFX_INLINE void IfxCif_setIspInputFormatterState(IfxCif_State inputFormatterState)
+{
+ MODULE_CIF.ISP.CTRL.B.ISP_INFORM_ENABLE = inputFormatterState;
+}
+
+
+IFX_INLINE void IfxCif_setIspInputInterface(IfxCif_IspInputInterface input)
+{
+ MODULE_CIF.ISP.ACQ_PROP.B.INPUT_SELECTION = input;
+}
+
+
+IFX_INLINE void IfxCif_setIspMode(IfxCif_IspMode mode)
+{
+ MODULE_CIF.ISP.CTRL.B.ISP_MODE = mode;
+}
+
+
+IFX_INLINE void IfxCif_setIspOutputState(IfxCif_State ispOutputState)
+{
+ MODULE_CIF.ISP.CTRL.B.ISP_ENABLE = ispOutputState;
+}
+
+
+IFX_INLINE void IfxCif_setIspOutputWindowOffsets(uint16 hOffset, uint16 vOffset)
+{
+ MODULE_CIF.ISP.OUT_H_OFFS.B.ISP_OUT_H_OFFS = hOffset;
+ MODULE_CIF.ISP.OUT_V_OFFS.B.ISP_OUT_V_OFFS = vOffset;
+}
+
+
+IFX_INLINE void IfxCif_setIspPictureSizes(uint16 hSize, uint16 vSize)
+{
+ MODULE_CIF.ISP.OUT_H_SIZE.B.ISP_OUT_H_SIZE = hSize;
+ MODULE_CIF.ISP.OUT_V_SIZE.B.ISP_OUT_V_SIZE = vSize;
+}
+
+
+IFX_INLINE void IfxCif_setIspSamplingEdge(IfxCif_IspSamplingEdge edge)
+{
+ MODULE_CIF.ISP.ACQ_PROP.B.SAMPLE_EDGE = edge;
+}
+
+
+IFX_INLINE void IfxCif_setIspVSyncPolarity(IfxCif_IspSyncPolarity polarity)
+{
+ MODULE_CIF.ISP.ACQ_PROP.B.VSYNC_POL = polarity;
+}
+
+
+IFX_INLINE void IfxCif_setIspisEnableState(IfxCif_State enableState)
+{
+ MODULE_CIF.ISPIS.CTRL.B.IS_EN = enableState;
+}
+
+
+IFX_INLINE void IfxCif_setIspisOutputWindowOffsets(IfxCif_ImageTiers hOffset, uint16 vOffset)
+{
+ MODULE_CIF.ISPIS.H_OFFS.U = hOffset;
+ MODULE_CIF.ISPIS.V_OFFS.U = vOffset;
+}
+
+
+IFX_INLINE void IfxCif_setIspisPictureSizes(uint16 hSize, uint16 vSize)
+{
+ MODULE_CIF.ISPIS.H_SIZE.U = hSize;
+ MODULE_CIF.ISPIS.V_SIZE.U = vSize;
+}
+
+
+IFX_INLINE void IfxCif_setIspisRecenterValue(uint8 value)
+{
+ MODULE_CIF.ISPIS.RECENTER.B.RECENTER = value;
+}
+
+
+IFX_INLINE void IfxCif_setJpeHeaderGenerationMode(IfxCif_JpeHeaderGenerationMode headerGenerationMode)
+{
+ MODULE_CIF.JPE.TABLE_FLUSH.B.TABLE_FLUSH = headerGenerationMode;
+}
+
+
+IFX_INLINE void IfxCif_setJpeHeaderMode(IfxCif_JpeHeaderMode headerMode)
+{
+ MODULE_CIF.JPE.HEADER_MODE.B.HEADER_MODE = headerMode;
+}
+
+
+IFX_INLINE void IfxCif_setJpeRestartInterval(uint16 interval)
+{
+ MODULE_CIF.JPE.RESTART_INTERVAL.B.RESTART_INTERVAL = interval;
+}
+
+
+IFX_INLINE void IfxCif_setJpeTableDataLsb(uint8 data)
+{
+ MODULE_CIF.JPE.TABLE_DATA.B.TABLE_WDATA_L = data;
+}
+
+
+IFX_INLINE void IfxCif_setJpeTableDataMsb(uint8 data)
+{
+ MODULE_CIF.JPE.TABLE_DATA.B.TABLE_WDATA_H = data;
+}
+
+
+IFX_INLINE void IfxCif_setJpeTableId(IfxCif_JpeTableId tableId)
+{
+ MODULE_CIF.JPE.TABLE_ID.B.TABLE_ID = tableId;
+}
+
+
+IFX_INLINE void IfxCif_setJpegCodecImageSizes(uint16 hSize, uint16 vSize)
+{
+ MODULE_CIF.JPE.ENC_HSIZE.B.ENC_HSIZE = hSize;
+ MODULE_CIF.JPE.ENC_VSIZE.B.ENC_VSIZE = vSize;
+}
+
+
+IFX_INLINE void IfxCif_setJpegJfifStreamEncoderContinuousMode(IfxCif_JpegJfifStreamEncoderContinuousMode mode)
+{
+ MODULE_CIF.JPE.ENCODE.B.CONT_MODE = mode;
+}
+
+
+IFX_INLINE void IfxCif_setJpegPictureEncodingFormat(IfxCif_JpegPictureEncodingFormat format)
+{
+ MODULE_CIF.JPE.PIC_FORMAT.B.ENC_PIC_FORMAT = format;
+}
+
+
+IFX_INLINE void IfxCif_setKernelResetRequestState(IfxCif_State state)
+{
+ MODULE_CIF.BBB.KRST0.B.RST = state;
+ MODULE_CIF.BBB.KRST1.B.RST = state;
+}
+
+
+IFX_INLINE void IfxCif_setMiBaseAddressInitializationEnableState(IfxCif_State state)
+{
+ MODULE_CIF.MI.CTRL.B.INIT_BASE_EN = state;
+}
+
+
+IFX_INLINE void IfxCif_setMiByteSwapEnableState(IfxCif_State enableState)
+{
+ MODULE_CIF.MI.CTRL.B.BYTE_SWAP = enableState;
+}
+
+
+IFX_INLINE void IfxCif_setMiChrominanceBurstLength(IfxCif_MiBurstLength burstLength)
+{
+ MODULE_CIF.MI.CTRL.B.BURST_LEN_CHROM = burstLength;
+}
+
+
+IFX_INLINE void IfxCif_setMiMainPictureWriteFormat(IfxCif_MiMainPictureWriteFormat format)
+{
+ MODULE_CIF.MI.CTRL.B.MP_WRITE_FORMAT = format;
+}
+
+
+IFX_INLINE void IfxCif_setMiMainPictureYInitialFillLevelInterruptOffset(uint32 interruptOffset)
+{
+ /* write value to unsigned component of the register structure because lower bits are tied to 0
+ * as interrupt offset needs to be a word aligned value */
+ MODULE_CIF.MI.MP_Y_IRQ_OFFS_INIT.U = interruptOffset;
+}
+
+
+IFX_INLINE void IfxCif_setMiOffsetCounterInitializationEnableState(IfxCif_State state)
+{
+ MODULE_CIF.MI.CTRL.B.INIT_OFFSET_EN = state;
+}
+
+
+IFX_INLINE void IfxCif_setNumberOfAcquisitionFrames(uint16 numberOfFrames)
+{
+ MODULE_CIF.ISP.ACQ_NR_FRAMES.B.ACQ_NR_FRAMES = numberOfFrames;
+}
+
+
+IFX_INLINE void IfxCif_setSecurityWatchdogCounterPredivider(uint16 predivider)
+{
+ MODULE_CIF.WD.CTRL.B.WD_PREDIV = predivider;
+}
+
+
+IFX_INLINE void IfxCif_setSecurityWatchdogEnableState(IfxCif_State enableState)
+{
+ MODULE_CIF.WD.CTRL.B.WD_EN = enableState;
+}
+
+
+IFX_INLINE void IfxCif_setYCSplitterChannelMode(IfxCif_YCSplitterChannelMode mode)
+{
+ MODULE_CIF.DPCL.B.CIF_CHAN_MODE = mode;
+}
+
+
+IFX_INLINE void IfxCif_startJpegJfifStreamEncoder(void)
+{
+ MODULE_CIF.JPE.ENCODE.B.ENCODE = 1;
+}
+
+
+#endif /* IFXCIF_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart.h
new file mode 100644
index 0000000..98012a7
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart.h
@@ -0,0 +1,281 @@
+/**
+ * \file IfxCpu_Cstart.h
+ * \brief This file contains the Core startup sequence.
+ *
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cpu_CStart Core Startup Functions
+ * \ingroup IfxLld_Cpu
+ *
+ * \defgroup IfxLld_Cpu_CStart_StartupSequence Startup Sequence
+ * \ingroup IfxLld_Cpu_CStart
+ *
+ * \defgroup IfxLld_Cpu_CStart_ConfigEnableCache How to enable cache during startup?
+ * \ingroup IfxLld_Cpu_CStart
+ *
+ * \defgroup IfxLld_Cpu_CStart_ConfigEnableCores How to enable CPUs during startup?
+ * \ingroup IfxLld_Cpu_CStart
+ */
+#ifndef IFXCPU_CSTART_H_
+#define IFXCPU_CSTART_H_
+
+/******************************************************************************/
+/* Includes */
+/******************************************************************************/
+#include "Ifx_Cfg.h"
+#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
+#include "Cpu/Std/Ifx_Types.h"
+#include "Tricore/Compilers/Compilers.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/* Macros */
+/******************************************************************************/
+
+/** \brief Configuration for pre initialization hook function.
+ *
+ */
+#ifndef IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK
+# define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu) /**< Hook function is empty if not configured*/
+#endif
+/******************************************************************************/
+/* Exported prototypes */
+/******************************************************************************/
+void _Core1_start(void);
+void _Core2_start(void);
+
+/*Documentation */
+
+/** \addtogroup IfxLld_Cpu_CStart_StartupSequence
+ * \{
+ *
+ * The startup driver is responsible for initializing the basic features of microcontroller
+ * to bring it up to the user functions. In framework these functions are called as "CoreX_main".
+ *
+ * In TC27X controllers, CPU0 is master controller which is booted from reset.
+ * IfxCpu_CStart driver provides following functionalities and they are listed in the order of
+ * their execution.
+ *
+ * \section IfxLld_Cpu_CStart_StartupSequence Core Startup Sequence
+ * 1) Execute pre-initialization hook, which is user configurable. \ref IfxLld_Cpu_CStart_ConfigStartupPreInitHook\n
+ * 2) Setup user stack pointer for the CPU core\n
+ * 3) Set program/data cache bypass to configuration defined settings. Refer \ref IfxLld_Cpu_CStart_ConfigEnableCache.\n
+ * 4) Set base address for trap vector and interrupt vector for the CPU core\n
+ * 5) Set interrupt stack pointer\n
+ * 6) Initialize the base pointers for the small data area registers for CPU core\n
+ * 7) Initialize the CSA for CPU core\n
+ * 8) Do the C initialization to initialize the global variables etc.\n
+ * 9) Initialize the clock system to configuration defined settings. \ref Ifx_Scu_Ccu_ConfigClock\n
+ * 10) Start remaining cores if they configuration setting request them to be enabled. \ref IfxLld_Cpu_CStart_ConfigEnableCores\n
+ * 11) Call user function "CoreX_main"\n
+ *
+ * \note All the above functionalities are executed by "master core" in this case CPU0. Remaining cores will execute
+ * only subset of the above functions, i.e. steps 8) 9) and 10) are not executed by remaining CPU core startups.
+ *
+ * \section IfxLld_Cpu_CStart_ConfigStartupPreInitHook Using Startup pre-initialization hook
+ *
+ * If the application/ demo example need some activity other than above defined functionalities, user can configure
+ * the function which is called before any other initialization is executed. Example of such activity is testing the CSA and STACK.
+ *
+ * Following are the steps to be done to configure user defined activity which is needed before startup sequence.
+ *
+ * \subsection IfxLld_Cpu_CStart_ConfigStartupPreInitHookStep1 Step1: Define a hook function
+ *
+ * This definition shall be as user defined code (Generally in DemoApps folder).\n
+ * Considerations:\n
+ * 1. Format: IFX_INLINE void \(cpu)
+ * \note Define such a routine with the consideration, that there shall be no function call within this.
+ *
+ * 2. Use the information available as parameter cpu
+ *
+ * Example code in a user defined file eg. Ifx_preInitHook.h, placed under folder/subfolder: 0_AppSw/Tricore/DemoApp:
+ * \code
+ * // file: Ifx_preInitHook.h
+ * //Example function for pre initialization Hook for startup functions.
+ *
+ * IFX_INLINE mySysPreInitHook(uint32 cpu)
+ * {
+ * switch (cpu)
+ * {
+ * case 0:
+ * {
+ * //user code for cpu0: Function calls NOT allowed.
+ * break;
+ * }
+ * case 1:
+ * {
+ * //user code for cpu1: Function calls NOT allowed.
+ * break;
+ * }
+ * case 2:
+ * {
+ * //user code for cpu2: Function calls NOT allowed.
+ * break;
+ * }
+ * case default:
+ * {
+ * break;
+ * }
+ * }
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Cpu_CStart_ConfigStartupPreInitHookStep2 Step2: Configure the pre initialization function for startup sequence call
+ * Create a file for configuring the hook. For example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder)
+ * \note This configuration, overload the macro IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu), which is already defined in IfxCpu_CStart.h.
+ * !!IMPORTANT!! Don't modify this at IfxCpu_CStart.h, because this is library file.
+ *
+ * \code
+ * //file: Ifx_Cfg_CStart.h
+ *
+ * #include "Ifx_preInitHook.h" //Assuming this is the file name as in above example
+ *
+ * #define IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(cpu) mySysPreInitHook(cpu) //This is INLINE function.
+ *
+ * \endcode
+ */
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_CStart_ConfigEnableCache
+ * \{
+ *
+ * In Tricore Cpu the cache enable/ disable are handled by the feature called cache bypass.
+ * Cache is enabled if the Bypass is disabled.
+ *
+ * Startup sequence of each CPU execute the function to do the cache settings. \ref Ifx_Cpu_StartupSequence
+ * The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_PCACHE and
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICOREx_DCACHE control this function.
+ *
+ * To modify the default configuration, these macros are to be defined in Ifx_Cfg.h (usually located under ../0_Src/0_AppSw/Config/Common/Ifx_Cfg.h)
+ * \note This kind of definitions overload the macros, which are already defined in IfxCpu_CStart*.c.
+ * !!IMPORTANT!! Don't modify these in IfxCpu_CStart*.c, because theseare library files.
+ *
+ * Details of configuration parameters:\n
+ *
+ * \paragraph IfxLld_Cpu_CStart_ConfigEnableCachePgmParamters program cache configuration parameters
+ *
+ * Enable/Disable program cache of Tricore CPU0 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE\n
+ *
+ * Enable/Disable program cache of Tricore CPU1 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE\n
+ *
+ * Enable/Disable program cache of Tricore CPU2 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE\n
+ *
+ * Enable/Disable data cache of Tricore CPU0 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE\n
+ *
+ * Enable/Disable data cache of Tricore CPU1 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE\n
+ *
+ * Enable/Disable data cache of Tricore CPU2 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE\n
+ *
+ * Following example shows, how to enable program cache of all available cores and disable data cache of all
+ * the available cores.
+ * \code
+ * //file: Ifx_Cfg.h
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1) //Program cache for Cpu0 is enabled
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1) //Data cache for Cpu0 is enabled
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1) //Program cache for Cpu1 is enabled
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1) //Data cache for Cpu1 is enabled
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_PCACHE (1) //Program cache for Cpu2 is enabled
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2_DCACHE (1) //Data cache for Cpu2 is enabled
+ *
+ * \endcode
+ *
+ * To control the the caches during runtime, refer for the details of APIs: \ref Ifx_Cpu_Cache
+ *
+ */
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_CStart_ConfigEnableCores
+ * \{
+ *
+ * Startup sequence of CPU0 execute the function to initialize the remaining available CPUs.
+ * \ref IfxLld_Cpu_CStart_StartupSequence.
+ * Startup sequence enables all the available CPUs.
+ *
+ * The configuration parameters IFX_CFG_CPU_CSTART_ENABLE_TRICOREx control this function.
+ * To modify the default configuration, these macros are to be defined. Create a file to define these macros,
+ * for example, Ifx_Cfg_CStart.h at ../0_Src/0_AppSw/Config/Tricore (or in DemoApp folder).
+ * \note This kind of definitions, overload the macros, which are already defined in IfxCpu_CStart.h.
+ * !!IMPORTANT!! Don't modify these at IfxCpu_CStart.h, because this is library file.
+ *
+ * Details of configuration parameters:\n
+ *
+ * \paragraph IfxLld_Cpu_CStart_ConfigEnableCoresParamters CPU enable/disable configuration parameters
+ *
+ * Enable/Disable of Tricore CPU0 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE0\n
+ *
+ * Enable/Disable of Tricore CPU1 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE1\n
+ *
+ * Enable/Disable of Tricore CPU2 with parameter:\n
+ * IFX_CFG_CPU_CSTART_ENABLE_TRICORE2\n
+ *
+ * Following example shows, how to enable all available cores.
+ * \code
+ * //file: Ifx_Cfg_CStart.h
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1) //Cpu0 is enabled
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1) //Cpu1 is enabled
+ *
+ * #define IFX_CFG_CPU_CSTART_ENABLE_TRICORE2 (1) //Cpu2 is enabled
+ *
+ * \endcode
+ *
+ */
+
+/** \} */
+
+#endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
+#endif /* IFXCPU_CSTART_H_ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart0.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart0.c
new file mode 100644
index 0000000..c6d0158
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart0.c
@@ -0,0 +1,309 @@
+/**
+ * \file IfxCpu_Cstart0.c
+ * \brief This file contains the Core startup sequence for Cpu0.
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+/*******************************************************************************
+** Includes **
+*******************************************************************************/
+#include "Ifx_Cfg.h"
+#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
+#include "Scu/Std/IfxScuWdt.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "Cpu/CStart/IfxCpu_CStart.h"
+#include "IfxScu_reg.h"
+#include "IfxCpu_reg.h"
+
+/******************************************************************************/
+/* Macros */
+/******************************************************************************/
+/** \brief Configuration for CpuX enable.
+ *
+ */
+#ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0
+# define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 (1) /**< Cpu0 enabled by default*/
+#endif
+#ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1
+# define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 (1) /**< Cpu1 enabled by default*/
+#endif
+
+/** \brief Configuration for cache enable.
+ *
+ */
+#ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE
+# define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE (1) /**< Program Cache enabled by default*/
+#endif
+#ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE
+# define IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE (1) /**< Data Cache enabled by default*/
+#endif
+
+#ifndef IFXCPU_CSTART_CCU_INIT_HOOK
+#define IFXCPU_CSTART_CCU_INIT_HOOK() (void)IfxScuCcu_init(&IfxScuCcu_defaultClockConfig); /*The status returned by Ccu init is ignored */
+#endif
+
+/*******************************************************************************
+** Imported Function Declarations **
+*******************************************************************************/
+IFXCOMPILER_COMMON_LINKER_SYMBOLS()
+IFXCOMPILER_CORE_LINKER_SYMBOLS(0)
+
+IFX_EXTERN void core0_main(void); // @suppress("Unused function declaration")
+#if defined(__TASKING__)
+__asm("\t .extern core0_main");
+#endif
+
+/*******************************************************************************
+** Private Constant Definitions **
+*******************************************************************************/
+#define IFXCSTART0_PSW_DEFAULT (0x00000980u)
+#define IFXCSTART0_PCX_O_S_DEFAULT (0xfff00000u)
+
+/*********************************************************************************
+* _start() - startup code
+*********************************************************************************/
+#if defined(__HIGHTEC__)
+#pragma GCC optimize ("-O2")
+#endif
+
+void _Core0_start(void)
+{
+ uint32 pcxi;
+ uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[0]);
+
+ IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(0); /*Test Stack, CSA and Cache */
+
+ /* Load user stack pointer */
+ __setareg(sp, __USTACK(0));
+ __dsync();
+
+ /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
+ __mtcr(CPU_PSW, IFXCSTART0_PSW_DEFAULT);
+
+ /* Set the PCXS and PCXO to its reset value in case of a warm start */
+ pcxi = __mfcr(CPU_PCXI);
+ pcxi &= IFXCSTART0_PCX_O_S_DEFAULT; /*0xfff00000; */
+ __mtcr(CPU_PCXI, pcxi);
+
+ /*enable/disable program cache depending on the configuration */
+ IfxCpu_setProgramCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_PCACHE);
+
+ /*enable/disable data cache depending on the configuration */
+ IfxCpu_setDataCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE0_DCACHE);
+
+ /* Clear the ENDINIT bit in the WDT_CON0 register, inline funtion */
+ IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
+
+ /* Load Base Address of Trap Vector Table. */
+ __mtcr(CPU_BTV, (uint32)__TRAPTAB(0));
+
+ /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
+ __mtcr(CPU_BIV, (uint32)__INTTAB(0));
+
+ /* Load interupt stack pointer. */
+ __mtcr(CPU_ISP, (uint32)__ISTACK(0));
+
+ IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[0], cpuWdtPassword);
+
+ /* initialize SDA base pointers */
+ __setareg(a0, __SDATA1(0));
+ __setareg(a1, __SDATA2(0));
+
+ /* These to be un commented if A8 and A9 are required to be initialized */
+ __setareg(a8, __SDATA3(0));
+ __setareg(a9, __SDATA4(0));
+ /* Setup the context save area linked list. */
+
+ IfxCpu_initCSA((uint32 *)__CSA(0), (uint32 *)__CSA_END(0)); /*Initialize the context save area for CPU0 */
+
+ {
+ /*CPU and safety watchdogs are enabled by default, C initialization functions are not servicing the watchdogs */
+ uint16 safetyWdtPassword = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_disableCpuWatchdog(cpuWdtPassword);
+ IfxScuWdt_disableSafetyWatchdog(safetyWdtPassword);
+
+ Ifx_C_Init(); /*Initialization of C runtime variables */
+
+ IfxScuWdt_enableCpuWatchdog(cpuWdtPassword);
+ IfxScuWdt_enableSafetyWatchdog(safetyWdtPassword);
+ }
+
+ /*Initialize the clock system */
+ IFXCPU_CSTART_CCU_INIT_HOOK();
+
+ /*Start remaining cores */
+#if (IFX_CFG_CPU_CSTART_ENABLE_TRICORE1 != 0)
+ (void)IfxCpu_startCore(&MODULE_CPU1, (uint32)&_Core1_start); /*The status returned by function call is ignored */
+#endif
+
+#if (IFX_CFG_CPU_CSTART_ENABLE_TRICORE0 == 0)
+ IfxScuWdt_disableCpuWatchdog(cpuWdtPassword);
+ /*halt the CPU 0 if it is not needed to be enabled */
+ IfxCpu_setCoreMode(&MODULE_CPU0, IfxCpu_CoreMode_idle);
+#endif
+
+ /*Call main function of Cpu0 */
+ __non_return_call(core0_main);
+}
+
+#if defined(__HIGHTEC__)
+#pragma GCC reset_options
+#endif
+/******************************************************************************
+ * reset vector address, user section to inform linker to locate the code at 0x8000 0020
+ *****************************************************************************/
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".start" x
+#endif
+#if defined(__TASKING__)
+#pragma protect on
+#pragma section code "start"
+#endif
+#if defined(__DCC__)
+#pragma section CODE ".start" X
+#endif
+
+void _START(void)
+{
+ __non_return_call(_Core0_start);
+}
+
+
+/* reset the sections defined above, to normal region */
+#if defined(__HIGHTEC__)
+#pragma section
+#endif
+#if defined(__TASKING__)
+#pragma protect restore
+#pragma section code restore
+#endif
+#if defined(__DCC__)
+#pragma section CODE
+#endif
+
+/*******************************************************************************
+** Boot Mode Headers **
+*******************************************************************************/
+/*Boot Mode Header 0 sections to inform linker to locate them at 0x8000 0000 */
+#ifndef IFX_CFG_CPUCSTART_BMHD_NOT_NEEDED
+
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".bmhd_0" a
+#endif
+#if defined(__TASKING__)
+#pragma protect on
+#pragma section farrom "bmhd_0"
+#endif
+#if defined(__DCC__)
+#pragma section CONST ".bmhd_0" R
+#endif
+/** \brief Boot Mode Header 0
+ * Boot mode header at memory location 0c8000 0000.
+ */
+const uint32 BootModeHeader_0[] = {
+ 0x00000000u, /* STADBM first user code at 0x8000 0020h */
+ 0xb3590070u, /* BMI = 0070h BMHDID = B359h */
+ 0x00000000u, /* ChkStart */
+ 0x00000000u, /* ChkEnd */
+ 0x00000000u, /* CRCrange */
+ 0x00000000u, /* !CRCrange */
+ 0x791eb864u, /* CRChead */
+ 0x86e1479bu /* !CRChead */
+};
+
+/*reset the sections defined above */
+#if defined(__HIGHTEC__)
+#pragma section
+#endif
+#if defined(__TASKING__)
+#pragma protect restore
+#pragma section farrom restore
+#endif
+#if defined(__DCC__)
+#pragma section CONST
+#endif
+
+#ifndef IFX_CFG_CPUCSTART_BMI01_NOT_NEEDED
+/*Boot Mode Header 1 sections to inform linker to locate them at 0x8002 0000 */
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".bmhd_1" a
+#endif
+#if defined(__TASKING__)
+#pragma protect on
+#pragma section farrom "bmhd_1"
+#endif
+#if defined(__DCC__)
+#pragma section CONST ".bmhd_1" R
+#endif
+
+/** \brief Boot Mode Header 1
+ * Boot mode header at memory location 0c8002 0000.
+ */
+const uint32 BootModeHeader_1[] = {
+ 0x00000000u, /* STADBM first user code at 0x8000 0020h */
+ 0xB3590070u, /* BMI = 0070h BMHDID = B359h */
+ 0x00000000u, /* ChkStart */
+ 0x00000000u, /* ChkEnd */
+ 0x00000000u, /* CRCrange */
+ 0x00000000u, /* !CRCrange */
+ 0x791eb864u, /* CRChead */
+ 0x86e1479bu /* !CRChead */
+};
+
+/*reset the sections defined above */
+#if defined(__HIGHTEC__)
+#pragma section
+#endif
+#if defined(__TASKING__)
+#pragma protect restore
+#pragma section farrom restore
+#endif
+#if defined(__DCC__)
+#pragma section CONST
+#endif
+#endif /*IFX_CFG_CPUCSTART_BMI01_NOT_NEEDED*/
+
+#endif /*IFX_CFG_CPUCSTART_BMHD_NOT_NEEDED*/
+
+#endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart1.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart1.c
new file mode 100644
index 0000000..1ad270a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/CStart/IfxCpu_CStart1.c
@@ -0,0 +1,148 @@
+/**
+ * \file IfxCpu_Cstart1.c
+ * \brief This file contains the Core startup sequence for Cpu1.
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+/*******************************************************************************
+** Includes **
+*******************************************************************************/
+#include "Ifx_Cfg.h"
+#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER
+#include "Scu/Std/IfxScuWdt.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "Cpu/CStart/IfxCpu_CStart.h"
+#include "IfxScu_reg.h"
+#include "IfxCpu_reg.h"
+
+/******************************************************************************/
+/* Macros */
+/******************************************************************************/
+/** \brief Configuration for cache enable.
+ *
+ */
+#ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE
+# define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE (1) /**< Program Cache enabled by default*/
+#endif
+#ifndef IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE
+# define IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE (1) /**< Data Cache enabled by default*/
+#endif
+/*******************************************************************************
+** Imported Function Declarations **
+*******************************************************************************/
+IFXCOMPILER_COMMON_LINKER_SYMBOLS()
+IFXCOMPILER_CORE_LINKER_SYMBOLS(1)
+
+IFX_EXTERN void core1_main(void); // @suppress("Unused function declaration")
+#if defined(__TASKING__)
+__asm("\t .extern core1_main");
+#endif
+
+/*******************************************************************************
+** Private Constant Definitions **
+*******************************************************************************/
+#define IFXCSTART1_PSW_DEFAULT (0x00000980u)
+#define IFXCSTART1_PCX_O_S_DEFAULT (0xfff00000u)
+
+/*********************************************************************************
+* - startup code
+*********************************************************************************/
+#if defined(__HIGHTEC__)
+#pragma GCC optimize ("-O2")
+#endif
+
+void _Core1_start(void)
+{
+ uint32 pcxi;
+ uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[1]);
+
+ IFX_CFG_CPU_CSTART_PRE_C_INIT_HOOK(1); /*Test Stack, CSA and Cache */
+
+ /* Load user stack pointer */
+ __setareg(sp, __USTACK(1));
+ __dsync();
+
+ /* Set the PSW to its reset value in case of a warm start,clear PSW.IS */
+ __mtcr(CPU_PSW, IFXCSTART1_PSW_DEFAULT); /* 0x00000980 */
+
+ /* Set the PCXS and PCXO to its reset value in case of a warm start */
+ pcxi = __mfcr(CPU_PCXI);
+ pcxi &= IFXCSTART1_PCX_O_S_DEFAULT; /*0xfff00000; */
+ __mtcr(CPU_PCXI, pcxi);
+
+ /*enable program cache */
+ IfxCpu_setProgramCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_PCACHE);
+
+ /*enable data cache */
+ IfxCpu_setDataCache(IFX_CFG_CPU_CSTART_ENABLE_TRICORE1_DCACHE);
+
+ /* Clear the ENDINIT bit in the WDT_CON0 register, inline funtion */
+ IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[1], wdtPassword);
+
+ /* Load Base Address of Trap Vector Table. */
+ __mtcr(CPU_BTV, (uint32)__TRAPTAB(1));
+
+ /* Load Base Address of Interrupt Vector Table. we will do this later in the program */
+ __mtcr(CPU_BIV, (uint32)__INTTAB(1));
+
+ /* Load interupt stack pointer. */
+ __mtcr(CPU_ISP, (uint32)__ISTACK(1));
+
+ IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[1], wdtPassword);
+
+ /* initialize SDA base pointers */
+ __setareg(a0, __SDATA1(1));
+ __setareg(a1, __SDATA2(1));
+
+ /* These to be un commented if A8 and A9 are required to be initialised */
+ __setareg(a8, __SDATA3(1));
+ __setareg(a9, __SDATA4(1));
+
+ IfxCpu_initCSA((uint32 *)__CSA(1), (uint32 *)__CSA_END(1));
+
+ /*Call main function of Cpu0 */
+ __non_return_call(core1_main);
+}
+
+#if defined(__HIGHTEC__)
+#pragma GCC reset_options
+#endif
+#endif /*#ifndef IFX_CFG_USE_COMPILER_DEFAULT_LINKER */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Irq/IfxCpu_Irq.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Irq/IfxCpu_Irq.c
new file mode 100644
index 0000000..22512e6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Irq/IfxCpu_Irq.c
@@ -0,0 +1,102 @@
+/**
+ * \file IfxCpu_Irq.c
+ * \brief This file contains the APIs for Interrupt related functions.
+ *
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ *
+ */
+
+/*******************************************************************************
+** Includes **
+*******************************************************************************/
+#include "Cpu/Irq/IfxCpu_Irq.h"
+#include "Tricore/Compilers/Compilers.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxCpu_reg.h"
+
+/*******************************************************************************
+** Private macros **
+*******************************************************************************/
+
+/*******************************************************************************
+** Global variables/constants **
+*******************************************************************************/
+#if defined(IFX_USE_SW_MANAGED_INT)
+
+typedef void (*Ifx_Isr)(void);
+
+static Ifx_Isr IfxCpu_Irq_swIntVector[256];
+
+#endif /*defined(IFX_USE_SW_MANAGED_INT) */
+
+/*******************************************************************************
+** Global Function definitions **
+*******************************************************************************/
+#if defined(IFX_USE_SW_MANAGED_INT)
+
+/** \brief API to install the interrupt service routine for Software Managed Interrupts.
+ *
+ */
+void IfxCpu_Irq_installInterruptHandler(void *isrFuncPointer, uint32 serviceReqPrioNumber)
+{
+ IfxCpu_Irq_swIntVector[serviceReqPrioNumber] = (Ifx_Isr)isrFuncPointer;
+}
+
+
+/** SW managed Interrupt vector table
+ *
+ * This is vector table with single entry for Software Managed Interrupts.
+ * This function need to be located at boundary 0xXFE0 where (X=1,3,5 and so on). For the software managed
+ * interrupts to work correctly, the BIV must be set to address of this function.
+ *
+ */
+IFX_INTERRUPT_INTERNAL(IfxCpu_Irq_intVecTable, 0, 255)
+{
+ Ifx_CPU_ICR icr;
+
+ icr.U = __mfcr(CPU_ICR); /*Fetch the ICR value */
+
+ /*Call the ISR */
+ IfxCpu_Irq_swIntVector[icr.B.CCPN]();
+}
+
+#endif /*defined(IFX_USE_SW_MANAGED_INT) */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Irq/IfxCpu_Irq.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Irq/IfxCpu_Irq.h
new file mode 100644
index 0000000..23f1b3a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Irq/IfxCpu_Irq.h
@@ -0,0 +1,261 @@
+/**
+ * \file IfxCpu_Irq.h
+ * \brief This file contains the APIs for Interrupt related functions.
+ *
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cpu_Irq Interrupt Functions
+ * \ingroup IfxLld_Cpu
+ *
+ * \defgroup IfxLld_Cpu_Irq_Usage How to define Interrupts?
+ * \ingroup IfxLld_Cpu_Irq
+ *
+ * \defgroup IfxLld_Cpu_Irq_Functions Functions
+ * \ingroup IfxLld_Cpu_Irq
+ *
+ */
+#ifndef IFXCPU_IRQ_H_
+#define IFXCPU_IRQ_H_
+
+/*******************************************************************************
+** Includes **
+*******************************************************************************/
+#include "Ifx_Cfg.h"
+#include "Cpu/Std/Ifx_Types.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "Src/Std/IfxSrc.h"
+/*******************************************************************************
+** Type definitions **
+*******************************************************************************/
+
+/*******************************************************************************
+** Global Exported variables/constants **
+*******************************************************************************/
+
+/*******************************************************************************
+** Global Exported macros/inlines/function ptototypes **
+*******************************************************************************/
+
+#if defined(IFX_USE_SW_MANAGED_INT)
+/** \addtogroup IfxLld_Cpu_Irq_Functions
+ * \{ */
+/** \brief API for Interrupt handler install for SW Managed interrupts.
+ * This API installs the isr to SW interrupt vector.
+ * This must be used only when IFX_USE_SW_MANAGED_INT is defined in Ifx_Cfg.h
+ *
+ * \param isrFuncPointer pointer to ISR function.
+ * \param serviceReqPrioNumber ISR priority.
+ */
+
+IFX_EXTERN void IfxCpu_Irq_installInterruptHandler(void *isrFuncPointer, uint32 serviceReqPrioNumber);
+
+IFX_INLINE void interruptHandlerInstall(uint32 srpn, uint32 addr)
+{
+ IfxCpu_Irq_installInterruptHandler((void *)addr, srpn);
+}
+
+
+/** \} */
+#endif /*defined(IFX_USE_SW_MANAGED_INT) */
+
+/** \addtogroup IfxLld_Cpu_Irq_Functions
+ * \{ */
+/** \brief API to get type of service of the caller CPU.
+ * \param coreId core id of the core
+ * \return type of service for the corresponding CPU.
+ */
+IFX_INLINE IfxSrc_Tos IfxCpu_Irq_getTos(IfxCpu_ResourceCpu coreId)
+{
+ return (IfxSrc_Tos)coreId;
+}
+
+
+/** \} */
+
+/*Documentation */
+/** \addtogroup IfxLld_Cpu_Irq_Usage
+ * \{
+ *
+ * This page describes how to use interrupts with application framework.\n
+ *
+ * \section IfxLld_Cpu_Irq_Terminology Interrupts Terminology:
+ * \subsection IfxLld_Cpu_Irq_HWManaged Hardware Managed Interrupt Mechanism.
+ * Hardware managed interrupts have static interrupt vector which are defined for each priority separately.
+ * These vectors have jump instruction to the interrupt handler.
+ *
+ * Advantages:\n
+ * This mechanism has less interrupt latency time.
+ *
+ * \subsection IfxLld_Cpu_Irq_SWManaged Software Managed Interrupt Mechanism.
+ * Software managed interrupts have single interrupt vector statically defined at vector position 255.
+ * This address is assigned to BIV during startup.\n
+ * For Tricore, this vector position is important, because whenever an interrupt occurs, with whichever priority,
+ * the execution control jumps to this vector position. The code at this vector position will:\n
+ * 1) fetch the priority of the targetted interrupt.\n
+ * 2) fetch the interrupt handler defined for this priority (this is done by Interrupt handler installation. Refer
+ * \ref IfxLld_Cpu_Irq_Step4\n
+ * 3) Then call the handler as notmal function call.
+ *
+ * Advantages:\n
+ * This kind of mechanism is useful when project wants to change the handler for an interrupt during runtime.
+ *
+ * Disadvantages:\n
+ * This mechanism has more interrupt latency time.
+ *
+ * of the interrupt and in tand jumps to the function
+ *
+ * \section IfxLld_Cpu_Irq_Steps Steps to use Interrupt Mechanism.
+ * Dependency: Ifx_Compilers, Ifx_Cpu, Ifx_Src, IfxCpu_Irq\n
+ * Following are the steps to use interrupt mechanism.
+ *
+ * \section IfxLld_Cpu_Irq_Step1 Step1: Define Interrupt priorities.
+ * Define priorities of all interrupts with names corresponding to their functionality. It is recommended to define
+ * such priority definitions in single header file, because it is easy to detect if ISR priorities are conflicting.
+ * In Tricore architecture, two Isrs can't have same priority at same point of time.
+ * \note These defines shall be defined without brackets surrounding priority number. (eg. #define PRIO (10) is not allowed)
+ *
+ * In a user defined file eg. Ifx_IntPrioDef.h, placed in folder: 0_AppSw/Tricore/DemoApp:
+ * \code
+ * //file: Ifx_IntPrioDef.h.
+ * #define IFX_INTPRIO_FUNCT1 1
+ * #define IFX_INTPRIO_FUNCT2 2
+ * #define IFX_INTPRIO_FUNCT3 5
+ * #define IFX_INTPRIO_STM0 8
+ * #define IFX_INTPRIO_ADC_FUNC1 10
+ * //etc.
+ * \endcode
+ *
+ * \note !! IMPORTANT !!\n As explained above, the definition with closing bracket around priority number as,
+ * #define IFX_INTPRIO_FUNCT1 (1) will cause compilation error. Because linker sections which are constructed
+ * using such information will also get these brackets included. Which look like ".intvec_tc0_(1)" instead of the
+ * expected ".intvec_tc0_1"\n
+ * Linker sections' definitions are predefined statically in .lsl file,
+ * for all 255 interrupts, with the format ".intvec_tc_".
+ *
+ * \section IfxLld_Cpu_Irq_Step2 Step2: Define Type of interrupt mechanism.
+ * \subsection IfxLld_Cpu_Irq_HWManaged_Usage To use Hardware Managed Interrupt Mechanism.
+ * Refer \ref IfxLld_Cpu_Irq_HWManaged
+ * If project is designed for hardware managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path:
+ * 0_Src/0_AppSw/Config/Common/, as shown below. IFX_USE_SW_MANAGED_INT definition must be undefined (i.e. the
+ * statement "#define IFX_USE_SW_MANAGED_INT" shall be commented as below).
+ *
+ * \code
+ * //file: Ifx_Cfg.h
+ *
+ * //#define IFX_USE_SW_MANAGED_INT
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Cpu_Irq_SWManaged_Usage To use Software Managed Interrupt Mechanism.
+ * Refer \ref IfxLld_Cpu_Irq_SWManaged
+ * If project is designed for software managed interrupts, this feature is enabled at the file Ifx_Cfg.h, at path:
+ * 0_Src/0_AppSw/Config/Common/, as shown below.
+ * IFX_USE_SW_MANAGED_INT definition must be defined.
+ *
+ * \code
+ * //file: Ifx_Cfg.h
+ *
+ * #define IFX_USE_SW_MANAGED_INT
+ *
+ * \endcode
+ *
+ * Software managed interrupts must also install the "Interrupt Handlers" Refer \ref IfxLld_Cpu_Irq_Step4
+ *
+ * \section IfxLld_Cpu_Irq_Step3 Step3: How to define an Interrupt Service routine?
+ * Interrupt service routines or interrupt handlers are defined in driver specific files or application specific
+ * files.
+ *
+ * \code
+ * //file usercode1.c
+ * #include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
+ * #include "Ifx_IntPrioDef.h" // to get the priority numbers
+ *
+ * //define an ISR with name Isr_Stm0 with priority defined by IFX_INTPRIO_STM0
+ * IFX_INTERRUPT (Isr_Stm0, 0, IFX_INTPRIO_STM0)
+ * {
+ * //Isr code here
+ * }
+ * \endcode
+ *
+ * \code
+ * //file usercode2.c
+ * #include "Compilers.h" // to get the compiler abstracted macros for interrupt definition
+ * #include "Ifx_IntPrioDef.h" // to get the priority numbers
+ *
+ * //define an ISR with name Isr_Adc_fun1 with priority defined by IFX_INTPRIO_ADC_FUNC1
+ * IFX_INTERRUPT (Isr_Adc_fun1, 0, IFX_INTPRIO_ADC_FUNC1)
+ * {
+ * //Isr code here
+ * }
+ * \endcode
+ *
+ * \section IfxLld_Cpu_Irq_Step4 Step4: How to install Interrupt Service routine/handler?
+ * This step is not required for HW managed interrupts.\n
+ * Interrupt service routines or interrupt handlers are installed in driver specific files or application specific
+ * files
+ *
+ * \code
+ * //file usermain.c
+ * #include "IfxCpu_Irq.h"
+ * #include "Ifx_IntPrioDef.h" // to get the priority numbers
+ *
+ * void userfunction_init(void)
+ * {
+ * //code for user function init
+ * // :
+ * // :
+ * IfxCpu_Irq_installInterruptHandler (Isr_Stm0, IFX_INTPRIO_STM0);
+ * IfxCpu_Irq_installInterruptHandler (Isr_Adc_fun1, IFX_INTPRIO_ADC_FUNC1);
+ *
+ * // :
+ * }
+ *
+ * \endcode
+ *
+ * \section IfxLld_Cpu_Irq_Step5 Step5: Managing the Service Request Node.
+ * For the interrupt to get activated, interrupt triggers are needed. These triggers are activated by peripheral modules
+ * and corresponding service request node must be\n
+ * 1) Configured with correct priority number\n
+ * 2) The request node must be enabled\n
+ * Refer to \ref IfxLld_Src_Usage
+ */
+
+/** \} */
+#endif /* IFXCPU_IRQ_H_ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu.c
new file mode 100644
index 0000000..5e56af3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu.c
@@ -0,0 +1,362 @@
+/**
+ * \file IfxCpu.c
+ * \brief CPU basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxCpu.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock)
+{
+ boolean retVal;
+ volatile uint32 spinLockVal;
+
+ retVal = FALSE;
+
+ spinLockVal = 1UL;
+ spinLockVal =
+ (uint32)__cmpAndSwap(((unsigned int *)lock), spinLockVal, 0);
+
+ /* Check if the SpinLock WAS set before the attempt to acquire spinlock */
+ if (spinLockVal == 0)
+ {
+ retVal = TRUE;
+ }
+
+ return retVal;
+}
+
+
+IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu)
+{
+ IfxCpu_CoreMode cpuMode;
+ Ifx_CPU_DBGSR dbgsr;
+ IfxCpu_ResourceCpu index = IfxCpu_getIndex(cpu);
+
+ cpuMode = IfxCpu_CoreMode_unknown;
+
+ /*get the DBGSR.HALT status */
+ /*Check if the request is done for same cpu as the host for this call */
+ if (IfxCpu_getCoreIndex() != index)
+ { /*status request is for other cpu than the host */
+ dbgsr = cpu->DBGSR;
+ }
+ else
+ { /*status request is for same cpu as the host */
+ dbgsr.U = __mfcr(CPU_DBGSR);
+ }
+
+ /*Check if the requested CPU is in DBG HALT mode */
+ if (dbgsr.B.HALT == (uint32)IfxCpu_DBGST_HALT_halt)
+ { /*CPU is in DBG HALT mode */
+ cpuMode = IfxCpu_CoreMode_halt;
+ }
+ else
+ {
+ if (dbgsr.B.HALT == (uint32)IfxCpu_DBGST_HALT_run)
+ { /*CPU is in DBG RUNNING mode now check PMCSR status */
+ volatile Ifx_SCU_PMCSR *pmcsr_val;
+
+ pmcsr_val = &MODULE_SCU.PMCSR[index];
+
+ if (pmcsr_val->B.PMST == (uint32)IfxCpu_PMCSR_PMST_normalMode)
+ { /*Cpu is in normal run mode */
+ cpuMode = IfxCpu_CoreMode_run;
+ }
+ else
+ { /*Cpu is not in run mode */
+ if (pmcsr_val->B.PMST == (uint32)IfxCpu_PMCSR_PMST_idleMode)
+ { /*Cpu is in idle mode */
+ cpuMode = IfxCpu_CoreMode_idle;
+ }
+ }
+ }
+ else
+ {
+ cpuMode = IfxCpu_CoreMode_unknown;
+ }
+ }
+
+ return cpuMode;
+}
+
+
+IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu)
+{
+ IfxCpu_ResourceCpu result;
+ uint32 index;
+ result = IfxCpu_ResourceCpu_none;
+
+ for (index = 0; index < IFXCPU_NUM_MODULES; index++)
+ {
+ if (IfxCpu_cfg_indexMap[index].module == cpu)
+ {
+ result = (IfxCpu_ResourceCpu)IfxCpu_cfg_indexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+uint32 IfxCpu_getRandomValue(uint32 *seed)
+{
+ /*************************************************************************
+ * the choice of a and m is important for a long period of the LCG
+ * with a = 279470273 and
+ * m = 4294967291
+ * a maximum period of 2^32-5 is given
+ * values for a:
+ * 0x5EB0A82F = 1588635695
+ * 0x48E7211F = 1223106847
+ * 0x10a860c1 = 279470273
+ ***************************************************************************/
+ uint32 x = *seed;
+
+ /* a seed of 0 is not allowed, and therefore will be changed to a valid value */
+ if (x == 0)
+ {
+ x = 42;
+ }
+
+ uint32 a = 0x10a860c1; // 279470273
+ uint32 m = 0xfffffffb; // 4294967291
+ uint32 result;
+
+ //__asm(a,m,x,tmp1,tmp2 );
+ //EhEl = a * x;
+ //result = e14 % m;
+ // %0 result
+ // %1 a
+ // %2 x
+ // %3 m
+ result = IfxCpu_getRandomVal(a, x, m);
+
+ *seed = result; // to simplify seed passing
+
+ return result;
+}
+
+
+uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max)
+{
+ uint32 new_value = IfxCpu_getRandomValue(seed);
+
+ /* swap min/max if required */
+ if (min > max)
+ {
+ unsigned swap = max;
+ max = min;
+ min = swap;
+ }
+
+ /* special case */
+ if ((min == 0) && (max == 0xffffffff))
+ {
+ return new_value;
+ }
+
+ /* return value within range */
+ return (new_value % (max - min + 1)) + min;
+}
+
+
+void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock)
+{
+ /*Reset the SpinLock*/
+ *lock = 0;
+}
+
+
+void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock)
+{
+ /*Reset the SpinLock*/
+ *lock = 0;
+}
+
+
+boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode)
+{
+ uint8 reqslp;
+ boolean retValue;
+ IfxCpu_ResourceCpu index = IfxCpu_getIndex(cpu);
+
+ /*Modes such as HALT, SLEEP and STBY are not handled at CPU level */
+ retValue = ((mode == IfxCpu_CoreMode_halt) || (mode == IfxCpu_CoreMode_sleep)
+ || (mode == IfxCpu_CoreMode_stby)) ? FALSE : TRUE;
+
+ reqslp = (mode == IfxCpu_CoreMode_idle) ? IfxScu_PMCSR_REQSLP_Idle : IfxScu_PMCSR_REQSLP_Run;
+
+ if (retValue == TRUE)
+ {
+ /*Check if the same core is requesting to change the core run mode */
+ if (IfxCpu_getCoreIndex() != index)
+ { /*Request is for the other core */
+ /*To access PMCSR of other CPUs handle the safety EndInit protection */
+ uint16 safetyWdtPw = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(safetyWdtPw);
+ MODULE_SCU.PMCSR[(uint32)IfxCpu_getIndex(cpu)].B.REQSLP = reqslp;
+ IfxScuWdt_setSafetyEndinit(safetyWdtPw);
+
+ cpu->DBGSR.B.HALT = 2; /*reset the HALT bit, if it is already done it is no harm in writing again */
+ }
+ else
+ { /*Request is for self, this request normally only for halt, otherwise the core is already running anyway! */
+ /*To access PMCSR of self handle the cpu EndInit protection */
+ uint16 cpuWdtPw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(cpuWdtPw);
+ MODULE_SCU.PMCSR[(uint32)index].B.REQSLP = reqslp;
+ IfxScuWdt_setCpuEndinit(cpuWdtPw);
+ }
+ }
+
+ return retValue;
+}
+
+
+boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter)
+{
+ boolean retVal = TRUE;
+
+ if (cpu == IfxCpu_getAddress(IfxCpu_getCoreIndex()))
+ {
+ retVal = FALSE;
+ }
+ else
+ {
+ cpu->PC.B.PC = programCounter >> 1;
+ }
+
+ return retVal;
+}
+
+
+boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount)
+{
+ boolean retVal;
+ volatile uint32 spinLockVal;
+
+ retVal = FALSE;
+
+ do
+ {
+ spinLockVal = 1UL;
+ spinLockVal =
+ (uint32)__cmpAndSwap(((unsigned int *)lock), spinLockVal, 0);
+
+ /* Check if the SpinLock WAS set before the attempt to acquire spinlock */
+ if (spinLockVal == 0)
+ {
+ retVal = TRUE;
+ }
+ else
+ {
+ timeoutCount--;
+ }
+ } while ((retVal == FALSE) && (timeoutCount > 0));
+
+ return retVal;
+}
+
+
+boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter)
+{
+ boolean retVal = TRUE;
+
+ /* Set the PC for Core 1 */
+ retVal &= IfxCpu_setProgramCounter(cpu, programCounter);
+ /* Get the mode for Core 1 and set it to RUNNING */
+
+ /* Core not running already */
+ if (IfxCpu_getCoreMode(cpu) == IfxCpu_CoreMode_halt)
+ {
+ retVal &= IfxCpu_setCoreMode(cpu, IfxCpu_CoreMode_run);
+ }
+
+ return retVal;
+}
+
+
+boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec)
+{
+ volatile uint32 *sync = (volatile uint32 *)IFXCPU_GLB_ADDR_DSPR(__mfcr(CPU_CORE_ID), event);
+
+ boolean errorcnt = 0U;
+ /* Divide with 1000, gives the count value equivalent to milliseconds */
+ uint32 stmCount = (uint32)((IfxScuCcu_getStmFrequency() / 1000) * timeoutMilliSec);
+ uint32 stmCountBegin = STM0_TIM0.U;
+
+ while ((*sync & IFXCPU_CFG_ALLCORE_DONE) != IFXCPU_CFG_ALLCORE_DONE)
+ {
+ __nop();
+
+ if ((uint32)(STM0_TIM0.U - stmCountBegin) >= stmCount)
+ {
+ errorcnt = 1;
+ break;
+ }
+
+ /* There is no need to check overflow of the STM timer.
+ * When counter after overflow subtracted with counter before overflow,
+ * the subtraction result will be as expected, as long as both are unsigned 32 bits
+ * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
+ * stmCountNow = 0x00000002 (before overflow)
+ * diff= stmCountNow - stmCountBegin = 4 as expected.*/
+ }
+
+ return errorcnt;
+}
+
+
+void IfxCpu_emitEvent(IfxCpu_syncEvent *event)
+{
+ Ifx__imaskldmst(event, 1, __mfcr(CPU_CORE_ID), 1);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu.h
new file mode 100644
index 0000000..fc79cbc
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu.h
@@ -0,0 +1,1089 @@
+/**
+ * \file IfxCpu.h
+ * \brief CPU basic functionality
+ * \ingroup IfxLld_Cpu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Cpu_Std_Core Cpu Core Functions
+ * \ingroup IfxLld_Cpu_Std
+ * \defgroup IfxLld_Cpu_Std_Interrupt Interrupt Utility Functions
+ * \ingroup IfxLld_Cpu_Std
+ * \defgroup IfxLld_Cpu_Std_Cache Cache Management Functions
+ * \ingroup IfxLld_Cpu_Std
+ * \defgroup IfxLld_Cpu_Std_PerformanceCounter Performance Counter Functions
+ * \ingroup IfxLld_Cpu_Std
+ * \defgroup IfxLld_Cpu_Std_Synchronization Synchronization Functions
+ * \ingroup IfxLld_Cpu_Std
+ * \defgroup IfxLld_Cpu_Std_Utility Cpu Utility Functions
+ * \ingroup IfxLld_Cpu_Std
+ * \defgroup IfxLld_Cpu_Std_Enum Enumerations
+ * \ingroup IfxLld_Cpu_Std
+ * \defgroup IfxLld_Cpu_Std_DataStructures Data Structures
+ * \ingroup IfxLld_Cpu_Std
+ */
+
+#ifndef IFXCPU_H
+#define IFXCPU_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxCpu_cfg.h"
+#include "IfxSrc_reg.h"
+#include "IfxScu_reg.h"
+#include "IfxStm_reg.h"
+#include "_Impl/IfxScu_cfg.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Scu/Std/IfxScuCcu.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Convert local DSPR address to global DSPR address which can be accessed from the SRI bus.
+ * Use this macro to convert a local DSPR address (in segment 0xd00.....) to
+ * a global DSPR address (in segment 0x700....., 0x600....., 0x500..... downwards) depending on
+ * the CPU number.
+ * Example usage:
+ * \code
+ * dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &sourceBuffer[i][0]);
+ * dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &destinationBuffer[i][0]);
+ * \endcode
+ */
+#define IFXCPU_GLB_ADDR_DSPR(cpu, address) ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))
+
+/** \brief Convert local PSPR address to global PSPR address which can be accessed from the SRI bus.
+ * Use this macro to convert a local PSPR address (in segment 0xc......) to
+ * a global PSPR address (in segment 0x701....., 0x601....., 0x501..... downwards) depending on
+ * the CPU number.
+ *
+ * Example usage:
+ * \code
+ * dmaChConfig.sourceAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &sourceBufferInPsprMemory);
+ * dmaChConfig.destinationAddress = IFXCPU_GLB_ADDR_PSPR(IfxCpu_getCoreId(), &destinationBufferInPsprMemory);
+ * \endcode
+ */
+#define IFXCPU_GLB_ADDR_PSPR(cpu, address) ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+/** \brief Lock type Spin lock
+ */
+typedef unsigned int IfxCpu_spinLock;
+
+/** \brief Lock type Mutex lock
+ */
+typedef unsigned int IfxCpu_mutexLock;
+
+/** \brief Event used for synchronisation.
+ */
+typedef unsigned int IfxCpu_syncEvent;
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Cpu_Std_Enum
+ * \{ */
+/** \brief Enumeration for the Cpu mode
+ */
+typedef enum
+{
+ IfxCpu_CoreMode_halt,
+ IfxCpu_CoreMode_run,
+ IfxCpu_CoreMode_idle,
+ IfxCpu_CoreMode_sleep,
+ IfxCpu_CoreMode_stby,
+ IfxCpu_CoreMode_unknown
+} IfxCpu_CoreMode;
+
+/** \brief Performance conunter modes
+ */
+typedef enum
+{
+ IfxCpu_CounterMode_normal = 0, /**< \brief Normal counter mode:the counter increments on their respective triggers */
+ IfxCpu_CounterMode_task = 1 /**< \brief Normal counter mode:additional gating control from the debug unit which allows the data gathered in the performance counters to be filtered by some specific criteria */
+} IfxCpu_CounterMode;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Cpu_Std_DataStructures
+ * \{ */
+/** \brief counter
+ */
+typedef struct
+{
+ uint32 counter; /**< \brief Counter value */
+ boolean overlfow; /**< \brief sticky overlfow */
+} IfxCpu_Counter;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_Std_DataStructures
+ * \{ */
+/** \brief Performance counter result
+ */
+typedef struct
+{
+ IfxCpu_Counter instruction; /**< \brief Instruction counter */
+ IfxCpu_Counter clock; /**< \brief CPU clock counter */
+ IfxCpu_Counter counter1; /**< \brief Multi counter 1 */
+ IfxCpu_Counter counter2; /**< \brief Multi counter 2 */
+ IfxCpu_Counter counter3; /**< \brief Multi counter 3 */
+} IfxCpu_Perf;
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_Std_Core
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to get the address for CPU HW module register memory map
+ * \param cpu Resource index of the CPU
+ * \return CPU module register address
+ */
+IFX_INLINE Ifx_CPU *IfxCpu_getAddress(IfxCpu_ResourceCpu cpu);
+
+/** \brief API to get core id of the CPU of the caller.
+ * Caution: Core id of the cpu's may not be continguous and shouldn't be used to index cpu.
+ * Use IfxCpu_getCoreIndex() to get cpu no.
+ * \return Resource index of the CPU.
+ */
+IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void);
+
+/** \brief API to get cpu index of the caller CPU.
+ * Note: This api can be used whereever cpu no/index is needed.
+ * \return Resource index of the CPU.
+ */
+IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void);
+
+/** \brief API to initialize the context save area of the CPU where this is called.
+ *
+ * This API can initialize the CSA of the host CPU where this API is called. This API
+ * shall not be used to initialize the CSA of another CPU
+ * \param csaBegin Pointer to start of context save area
+ * \param csaEnd Pointer to end of context save area
+ * \return None
+ */
+IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd);
+
+/** \brief Set/Clear safety task identifier (PSW.S) on current CPU
+ * \return None
+ */
+IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId);
+
+/** \brief Triggers Software Reset
+ * \return None
+ */
+IFX_INLINE void IfxCpu_triggerSwReset(void);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to get current mode of CPU
+ * \param cpu Pointer to the CPU HW module (register memory map)
+ * \return Current mode of the CPU
+ */
+IFX_EXTERN IfxCpu_CoreMode IfxCpu_getCoreMode(Ifx_CPU *cpu);
+
+/** \brief API to get current mode of CPU
+ * \param cpu Pointer to the CPU HW module (register memory map)
+ * \return Resource index of the CPU
+ */
+IFX_EXTERN IfxCpu_ResourceCpu IfxCpu_getIndex(Ifx_CPU *cpu);
+
+/** \brief API to set mode of the CPU
+ * \param cpu Pointer to the CPU HW module (register memory map)
+ * \param mode CPU mode to be set by this API
+ * \return Success status of the activity (setting the core mode).
+ * \retval TRUE: If the activity successfully be performed.
+ * \retval FALSE: If the activity can't be performed.
+ */
+IFX_EXTERN boolean IfxCpu_setCoreMode(Ifx_CPU *cpu, IfxCpu_CoreMode mode);
+
+/** \brief API to set the program counter for the CPU specified.
+ * \param cpu Pointer to the CPU HW module (register memory map)
+ * \param programCounter Program counter value to be set
+ * \return success status of the activity (setting program counter value).
+ * \retval TRUE: If the activity successfully be performed.
+ * \retval FALSE: If the activity can't be performed
+ */
+IFX_EXTERN boolean IfxCpu_setProgramCounter(Ifx_CPU *cpu, uint32 programCounter);
+
+/** \brief API to set the program counter for the CPU specified and start the CPU
+ * \param cpu Pointer to the CPU HW module (register memory map)
+ * \param programCounter Program counter value to start the CPU
+ * \return success status of the activity (setting program counter value).
+ * \retval TRUE: If the activity successfully be performed.
+ * \retval FALSE: If the activity can't be performed
+ */
+IFX_EXTERN boolean IfxCpu_startCore(Ifx_CPU *cpu, uint32 programCounter);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_Std_Interrupt
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to get the status of global interrupt enable (ICR.IE) for the CPU which calls this API
+ * This API provides the status of CPU where this API is called
+ * \return Status of global interrupt enable bit.
+ * \retval TRUE: Global interrupts enabled.
+ * \retval FALSE: Global interrupts disabled
+ */
+IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void);
+
+/** \brief API to disable global interrupt and return the previous status.
+ *
+ * This API can be used only to disable the global interrupts of caller CPU. It cannot be
+ * used for this activity towards other CPUs
+ * \return Previous status of global interrupt enable bit.
+ * \retval TRUE: Previously, global interrupts enabled.
+ * \retval FALSE: Previously, global interrupts disabled
+ */
+IFX_INLINE boolean IfxCpu_disableInterrupts(void);
+
+/** \brief API to enable global interrupt.
+ * This API simply enables the global interrupt.
+ * \return None
+ */
+IFX_INLINE void IfxCpu_enableInterrupts(void);
+
+/** \brief Disable the Global Interrupt
+ * \return None
+ */
+IFX_INLINE void IfxCpu_forceDisableInterrupts(void);
+
+/** \brief API to restore global interrupt with that of the passed parameter.
+ *
+ * This API can be used only to disable the global interrupts of caller CPU. It cannot be
+ * used for this activity towards other CPUs
+ * \param enabled Previous status of the global interrupt enable bit
+ * \return None
+ */
+IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_Std_Cache
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to enable/ disable the data cacheability for selected segments
+ * With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called.
+ * \Note This API is to be called only if the PCACHE or DCACHE are not enabled before
+ * \param segmentNumberMask Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
+ * \param enable TRUE: to enable the cacheability for selected segment, FALSE: to disable.
+ * \return None
+ */
+IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable);
+
+/** \brief API to enable/ disable the instruction cacheability for selected segments
+ * With this API cacheability for one or more segment can be enabled/disabled for the CPU core where this API is called.
+ * \Note This API is to be called only if the PCACHE or DCACHE are not enabled before
+ * \param segmentNumberMask Mask where bitfield 0 represents segment 0 and bitfield 16 represent segment F.
+ * \param enable TRUE: to enable the cacheability for selected segment, FALSE: to disable.
+ * \return None
+ */
+IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable);
+
+/** \brief API to invalidate the program cache
+ * \return None
+ */
+IFX_INLINE void IfxCpu_invalidateProgramCache(void);
+
+/** \brief API to determine if an address is in a cachable or non-cachable Flash/LMU section
+ * \param address Address
+ * \return Status TRUE/FALSE
+ */
+IFX_INLINE boolean IfxCpu_isAddressCachable(void *address);
+
+/** \brief API to enable or bypass the data cache for the CPU which calls this API.
+ *
+ * This API can be used only to enable or bypass the data cache of caller CPU. It cannot be
+ * used for this activity towards other CPUs
+ * \param enable Command to enable or bypass the data cache
+ * TRUE: Enable the data cache.
+ * FALSE: Bypass the data cache.
+ * \return None
+ */
+IFX_INLINE void IfxCpu_setDataCache(boolean enable);
+
+/** \brief API to enable or bypass the program cache for the CPU which calls this API.
+ *
+ * This API can be used only to enable or bypass the program cache of caller CPU. It cannot be
+ * used for this activity towards other CPUs
+ * \param enable Command to enable or bypass the program cache.
+ * TRUE: Enable the program cache.
+ * FALSE: Bypass the program cache
+ * \return None
+ */
+IFX_INLINE void IfxCpu_setProgramCache(boolean enable);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_Std_PerformanceCounter
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to read the clock counter for the CPU which calls this API.
+ *
+ * This API can be used to read clock counter of only the caller CPU. It cannot be
+ * used for this activity towards other CPUs.
+ * \return Counter value. 0 to 0x7FFFFFFF.
+ */
+IFX_INLINE uint32 IfxCpu_getClockCounter(void);
+
+/** \brief API to get sticky overflow bit of clock counter for the CPU, which calls this API.
+ *
+ * This API can be used to get sticky overflow bit of clock counter of only the caller CPU.
+ * It cannot be used for this activity towards other CPUs.
+ * This API also clears the sticky overflow after the read. While reading the sticky bit this API disables
+ * the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after
+ * reading the counter
+ * \return Status of sticky overflow bit.
+ * \retval TRUE: Sticky overflow bit is set.
+ * \retval FALSE: Sticky overflow bit is reset
+ */
+IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void);
+
+/** \brief API to read the instruction counter for the CPU which calls this API.
+ *
+ * This API can be used to read instruction counter of only the caller CPU. It cannot be
+ * used for this activity towards other CPUs
+ * \return Counter value. 0 to 0x7FFFFFFF.
+ */
+IFX_INLINE uint32 IfxCpu_getInstructionCounter(void);
+
+/** \brief API to get sticky overflow bit of Instruction counter for the CPU, which calls this API.
+ *
+ * This API can be used to get sticky overflow bit of Instruction counter of only the caller CPU.
+ * It cannot be used for this activity towards other CPUs.
+ * This API also clears the sticky overflow after the read. While reading the sticky bit this API disables
+ * the counter for short time. (otherwise sticky bit cannot be cleared). This API shall be used after
+ * reading the counter
+ * \return Status of sticky overflow bit.
+ * \retval TRUE: Sticky overflow bit is set.
+ * \retval FALSE: Sticky overflow bit is reset
+ */
+IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void);
+
+/** \brief API to read the performance counter for the CPU which calls this API.
+ * \param address Address
+ * \return counter value
+ */
+IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address);
+
+/** \brief API to get sticky overflow bit of performance counter for the CPU, which calls this API.
+ * This is generic function to get sticky overflow bit of any performance counters
+ * \param address Address
+ * \return Status
+ */
+IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address);
+
+/** \brief Reset and start instruction, clock and multi counters
+ *
+ * Reset and start CCNT, ICNT, M1CNT, M2CNT, M3CNT. the overflow bits are cleared.
+ * \param mode Counter mode
+ * \return None
+ */
+IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode);
+
+/** \brief API to enable or disable performance counter for the CPU which calls this API.
+ *
+ * This API can be used to enable or disable performance counter of only the caller CPU. It cannot be
+ * used for this activity towards other CPUs.
+ * \param enable enable Command to enable or disable the performance counter.
+ * TRUE: Enable the performance counter.
+ * FALSE: Disable the performance counter
+ * \return None
+ */
+IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable);
+
+#if !((defined(__cplusplus)) && (defined(__TASKING__)))
+/** \brief Stop instruction and clock counters, return their values
+ *
+ * Stop CCNT, ICNT, M1CNT, M2CNT, M3CNT and return their values;
+ * \Note The CCTRL is reset to 0, for more accurate measurements and has to be initialized again before strating the next performance measurement.
+ * \return Performance counter result
+ */
+IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void);
+#endif
+
+/** \brief API to update clock counter for the CPU which calls this API.
+ *
+ * This API can be used to update clock counter of only the caller CPU. It cannot be
+ * used for this activity towards other CPUs.
+ * \param count Counter value to be updated. 0 to 0x7FFFFFFF
+ * \return None
+ */
+IFX_INLINE void IfxCpu_updateClockCounter(uint32 count);
+
+/** \brief API to update Instruction counter for the CPU which calls this API.
+ *
+ * This API can be used to update Instruction counter of only the caller CPU. It cannot be
+ * used for this activity towards other CPUs.
+ * \param count Counter value to be updated. 0 to 0x7FFFFFFF
+ * \return None
+ */
+IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count);
+
+/** \brief API to update performance counter for the CPU which calls this API.
+ * This is generic function to update any of the performance counters
+ * \param address Address
+ * \param count Count
+ * \return None
+ */
+IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_Std_Synchronization
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to acquire the mutex (binary semaphore).
+ *
+ * This API can be used to acquire/get the mutex.
+ * \param lock lock pointer
+ * \return TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
+ *
+ * \code
+ * IfxCpu_mutexLock resourceLock;
+ * boolean flag = IfxCpu_acquireMutex(&resourceLock);
+ * if (flag){
+ * // critical section
+ * IfxCpu_releaseMutex(&resourceLock);
+ * }
+ * \endcode
+ *
+ */
+IFX_EXTERN boolean IfxCpu_acquireMutex(IfxCpu_mutexLock *lock);
+
+/** \brief API to unlock the mutex .
+ *
+ * This API can be used to unlock the previously acquired mutex
+ * \param lock lock pointer
+ * \return None
+ *
+ * \code
+ * IfxCpu_mutexLock resourceLock;
+ * boolean flag = IfxCpu_acquireMutex(&resourceLock);
+ * if (flag){
+ * // critical section
+ * IfxCpu_releaseMutex(&resourceLock);
+ * }
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxCpu_releaseMutex(IfxCpu_mutexLock *lock);
+
+/** \brief API to unlock the resource .
+ *
+ * This API can be used to unlock the previously acquired lock
+ * \param lock lock pointer
+ * \return None
+ */
+IFX_EXTERN void IfxCpu_resetSpinLock(IfxCpu_spinLock *lock);
+
+/** \brief API to lock the resource in spin mode with the given timeout.
+ *
+ * This API can be used to spin lock for the lock for the given timeout period.
+ * \param lock lock pointer
+ * \param timeoutCount loop counter value used for timeout to acquire lock
+ * \return TRUE : lock acquired successfully. FALSE: Failed to acquire the lock
+ *
+ * \code
+ * IfxCpu_spinLock resourceLock;
+ * boolean flag = IfxCpu_setSpinLock(&resourceLock, 0xFFFF);
+ * if (flag){
+ * // critical section
+ * IfxCpu_resetSpinLock(&resourceLock);
+ * }
+ * \endcode
+ *
+ */
+IFX_EXTERN boolean IfxCpu_setSpinLock(IfxCpu_spinLock *lock, uint32 timeoutCount);
+
+/** \} */
+
+/** \addtogroup IfxLld_Cpu_Std_Utility
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to get random value
+ * \param seed Pointer to seed value
+ * \return random value
+ */
+IFX_EXTERN uint32 IfxCpu_getRandomValue(uint32 *seed);
+
+/** \brief API to get random value with in the range
+ * \param seed Pointer to seed value
+ * \param min minimum range value
+ * \param max maximum range value
+ * \return random value
+ */
+IFX_EXTERN uint32 IfxCpu_getRandomValueWithinRange(uint32 *seed, uint32 min, uint32 max);
+
+/** \brief This function waits till all the cores have set their corresponding bits in the event. This function along with
+ * IfxCpu_emitEvent() are used to achieve the synchronisation between the configured cores. By default
+ * "IFXCPU_CFG_ALLCORE_DONE" macro defined for all the cores. In case the user wants to check for
+ * synchronisation among the required cores, the macro can be redefined with the value accroing to the
+ * CORE_ID register.
+ * The IfxCpu_emitEvent() is to be used in the Main functions of the Cores where the user wants to check for synchronisation.
+ *
+ * e.g:
+ * 1. Check for synchronisation between core 0 and core 5
+ * # define 0x41U
+ * 2. Check for synchronisation between core 0 to core 5
+ * # define 0x5FU
+ *
+ * Note:
+ * Core id values read from CORE_ID register will be as shown below. The value indicates the position of the bit needs to be set while building the macro.
+ * Core 0: 0
+ * Core 1: 1
+ * Core 2: 2
+ * Core 3: 3
+ * Core 4: 4
+ * Core 5: 6
+ * \param event Synchronous Event
+ * \param timeoutMilliSec timeout in millisec
+ * \return Error condition
+ *
+ * The functions IfxCpu_waitEvent and IfxCpu_emitEvent are used to achieve synchronisation between all cores (i.e individual cores wait till all cores have reached the synchronisation point). The IfxCpu_waitEvent returns 1 incase a timeout occurs.
+ *
+ * \code
+ * // Global variable. preferably located in shared memory.
+ * IfxCpu_syncEvent event;
+ * boolean errorVal;
+ *
+ * // Below code should be repeated in Each core
+ *
+ * // Upon reaching Synchonisation point
+ * IfxCpu_emitEvent(&event);
+ * errorVal = IfxCpu_waitEvent(&event, timeoutMilliSec); // timeoutMilliSec is timeout value to wait
+ *
+ * \endcode
+ *
+ */
+IFX_EXTERN boolean IfxCpu_waitEvent(IfxCpu_syncEvent *event, uint32 timeoutMilliSec);
+
+/** \brief This function sets a bit corresponding to the core in the event.
+ * \param event Synchronous Event
+ * \return None
+ *
+ * A coding example can be found in \ref IfxCpu_waitEvent
+ *
+ */
+IFX_EXTERN void IfxCpu_emitEvent(IfxCpu_syncEvent *event);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE boolean IfxCpu_areInterruptsEnabled(void)
+{
+ Ifx_CPU_ICR reg;
+ reg.U = __mfcr(CPU_ICR);
+ return reg.B.IE != 0;
+}
+
+
+IFX_INLINE boolean IfxCpu_disableInterrupts(void)
+{
+ boolean enabled;
+ enabled = IfxCpu_areInterruptsEnabled();
+ __disable();
+ __nop();
+ return enabled;
+}
+
+
+IFX_INLINE void IfxCpu_enableInterrupts(void)
+{
+ __enable();
+}
+
+
+IFX_INLINE void IfxCpu_enableSegmentSpecificDataAccessCacheability(uint16 segmentNumberMask, boolean enable)
+{
+ uint32 cpu_pmaVal;
+ uint16 checkRestrictionMask;
+ uint32 coreIndex = IfxCpu_getCoreIndex();
+ uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
+
+ /*resolve the restrictions*/
+ /*In PMA0 Segment-C and Segment[7-CoreID] must have the same value */
+ checkRestrictionMask = ((uint16)1 << (7 - coreIndex)) | ((uint16)1 << 0xC);
+
+ if ((segmentNumberMask & checkRestrictionMask) != 0)
+ {
+ segmentNumberMask |= checkRestrictionMask;
+ }
+
+ cpu_pmaVal = __mfcr(CPU_PMA0); /* Read the CPU_PMA0 */
+
+ cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask); /* enable or disable the corresponding bitfield */
+
+ /*The CPU_PMA registers are ENDINIT protected*/
+ IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
+ /*When changing the value of the CPU_PMAx registers both the instruction and data caches should be invalidated*/
+ /*Write to PMA0 register for selecting the cacheability for data cache*/
+ __dsync(); /* DSYNC instruction should be executed immediately prior to the MTCR*/
+ __mtcr(CPU_PMA0, cpu_pmaVal);
+ __isync(); /* ISYNC instruction executed immediately following MTCR */
+ IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
+}
+
+
+IFX_INLINE void IfxCpu_enableSegmentSpecificInstructionAccessCacheability(uint16 segmentNumberMask, boolean enable)
+{
+ uint32 cpu_pmaVal;
+ uint16 checkRestrictionMask;
+ uint32 coreIndex = IfxCpu_getCoreIndex();
+ uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
+
+ /*resolve the restrictions*/
+ /*In PMA1 Segment-D and Segment[7-CoreID] must have the same value */
+ checkRestrictionMask = ((uint16)1 << (7 - coreIndex)) | ((uint16)1 << 0xD);
+
+ if ((segmentNumberMask & checkRestrictionMask) != 0)
+ {
+ segmentNumberMask |= checkRestrictionMask;
+ }
+
+ cpu_pmaVal = __mfcr(CPU_PMA1); /* Read the CPU_PMA1 */
+
+ cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask); /* enable or disable the corresponding bitfield */
+
+ /*The CPU_PMA registers are ENDINIT protected*/
+ IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
+ /*When changing the value of the CPU_PMAx registers both the instruction and data caches should be invalidated*/
+ /*Write to PMA1 register for selecting the cacheability for data cache*/
+ __dsync(); /* DSYNC instruction should be executed immediately prior to the MTCR */
+ __mtcr(CPU_PMA1, cpu_pmaVal);
+ __isync(); /* ISYNC instruction executed immediately following MTCR */
+ IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
+}
+
+
+IFX_INLINE void IfxCpu_forceDisableInterrupts(void)
+{
+ __disable();
+ __nop();
+}
+
+
+IFX_INLINE Ifx_CPU *IfxCpu_getAddress(IfxCpu_ResourceCpu cpu)
+{
+ Ifx_CPU *module;
+
+ if (cpu < IfxCpu_ResourceCpu_none)
+ {
+ module = (Ifx_CPU *)IfxCpu_cfg_indexMap[cpu].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
+
+
+IFX_INLINE uint32 IfxCpu_getClockCounter(void)
+{
+ return IfxCpu_getPerformanceCounter(CPU_CCNT);
+}
+
+
+IFX_INLINE boolean IfxCpu_getClockCounterStickyOverflow(void)
+{
+ return IfxCpu_getPerformanceCounterStickyOverflow(CPU_CCNT);
+}
+
+
+IFX_INLINE IfxCpu_Id IfxCpu_getCoreId(void)
+{
+ Ifx_CPU_CORE_ID reg;
+ reg.U = __mfcr(CPU_CORE_ID);
+ return (IfxCpu_Id)reg.B.CORE_ID;
+}
+
+
+IFX_INLINE IfxCpu_ResourceCpu IfxCpu_getCoreIndex(void)
+{
+ Ifx_CPU_CORE_ID reg;
+ reg.U = __mfcr(CPU_CORE_ID);
+ return (IfxCpu_ResourceCpu)reg.B.CORE_ID;
+}
+
+
+IFX_INLINE uint32 IfxCpu_getInstructionCounter(void)
+{
+ return IfxCpu_getPerformanceCounter(CPU_ICNT);
+}
+
+
+IFX_INLINE boolean IfxCpu_getInstructionCounterStickyOverflow(void)
+{
+ return IfxCpu_getPerformanceCounterStickyOverflow(CPU_ICNT);
+}
+
+
+IFX_INLINE uint32 IfxCpu_getPerformanceCounter(uint16 address)
+{
+ Ifx_CPU_CCNT ccnt;
+
+ if (address == CPU_CCNT)
+ {
+ ccnt.U = __mfcr(CPU_CCNT);
+ }
+ else if (address == CPU_ICNT)
+ {
+ ccnt.U = __mfcr(CPU_ICNT);
+ }
+ else if (address == CPU_M1CNT)
+ {
+ ccnt.U = __mfcr(CPU_M1CNT);
+ }
+ else if (address == CPU_M2CNT)
+ {
+ ccnt.U = __mfcr(CPU_M2CNT);
+ }
+ else if (address == CPU_M3CNT)
+ {
+ ccnt.U = __mfcr(CPU_M3CNT);
+ }
+
+ return ccnt.B.CountValue;
+}
+
+
+IFX_INLINE boolean IfxCpu_getPerformanceCounterStickyOverflow(uint16 address)
+{
+ Ifx_CPU_CCNT ccnt;
+
+ if (address == CPU_CCNT)
+ {
+ ccnt.U = __mfcr(CPU_CCNT);
+ }
+ else if (address == CPU_ICNT)
+ {
+ ccnt.U = __mfcr(CPU_ICNT);
+ }
+ else if (address == CPU_M1CNT)
+ {
+ ccnt.U = __mfcr(CPU_M1CNT);
+ }
+ else if (address == CPU_M2CNT)
+ {
+ ccnt.U = __mfcr(CPU_M2CNT);
+ }
+ else if (address == CPU_M3CNT)
+ {
+ ccnt.U = __mfcr(CPU_M3CNT);
+ }
+
+ return ccnt.B.SOvf;
+}
+
+
+IFX_INLINE void IfxCpu_initCSA(uint32 *csaBegin, uint32 *csaEnd)
+{
+ uint32 k;
+ uint32 nxt_cxi_val = 0;
+ uint32 *prvCsa = 0U;
+ uint32 *nxtCsa = csaBegin;
+ uint32 numOfCsa = (((uint32)csaEnd - (uint32)csaBegin) / 64U);
+
+ for (k = 0; k < numOfCsa; k++)
+ {
+ nxt_cxi_val = ((uint32)nxtCsa & (0XFU << 28)) >> 12 | ((uint32)nxtCsa & (0XFFFFU << 6)) >> 6;
+
+ if (k == 0)
+ {
+ __mtcr(CPU_FCX, nxt_cxi_val); /* store the new pcxi value to LCX */
+ }
+ else
+ {
+ *prvCsa = nxt_cxi_val; /* Store null pointer in last CSA (= very first time!) */
+ }
+
+ if (k == (numOfCsa - 3U))
+ {
+ __mtcr(CPU_LCX, nxt_cxi_val); /* Last but 2 context save area is pointed in LCX to know if there is CSA depletion */
+ }
+
+ prvCsa = (uint32 *)nxtCsa;
+ nxtCsa += 16; /* next CSA */
+ }
+
+ *prvCsa = 0;
+}
+
+
+IFX_INLINE void IfxCpu_invalidateProgramCache(void)
+{
+ uint16 cpuWdtPassword = IfxScuWdt_getCpuWatchdogPassword();
+ {
+ IfxScuWdt_clearCpuEndinit(cpuWdtPassword);
+ Ifx_CPU_PCON1 pcon1;
+ pcon1.U = __mfcr(CPU_PCON1);
+ pcon1.B.PCINV = 1;
+ __mtcr(CPU_PCON1, pcon1.U);
+ IfxScuWdt_setCpuEndinit(cpuWdtPassword);
+ }
+}
+
+
+IFX_INLINE boolean IfxCpu_isAddressCachable(void *address)
+{
+ uint8 segment = (uint32)address >> 24;
+ return ((segment == IFXCPU_CACHABLE_FLASH_SEGMENT) || (segment == IFXCPU_CACHABLE_LMU_SEGMENT)) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxCpu_resetAndStartCounters(IfxCpu_CounterMode mode)
+{
+ Ifx_CPU_CCTRL cctrl;
+ cctrl.U = __mfcr(CPU_CCTRL);
+ /*Disable the counters */
+ cctrl.B.CE = 0;
+ __mtcr(CPU_CCTRL, cctrl.U);
+
+ /* reset the counters */
+ __mtcr(CPU_CCNT, 0);
+ __mtcr(CPU_ICNT, 0);
+ __mtcr(CPU_M1CNT, 0);
+ __mtcr(CPU_M2CNT, 0);
+ __mtcr(CPU_M3CNT, 0);
+
+ /*Enable the counters, set the counter mode */
+ cctrl.B.CE = 1;
+ cctrl.B.CM = mode;
+ __mtcr(CPU_CCTRL, cctrl.U);
+}
+
+
+IFX_INLINE void IfxCpu_restoreInterrupts(boolean enabled)
+{
+ if (enabled != FALSE)
+ {
+ __enable();
+ }
+}
+
+
+IFX_INLINE void IfxCpu_setDataCache(boolean enable)
+{
+ uint32 coreIndex = IfxCpu_getCoreIndex();
+ uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
+ /*PCACHE enable steps */
+ { /* Step 1: Set PCBYP to 0 if cache is enabled */
+ IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
+ Ifx_CPU_DCON0 dcon0;
+ dcon0.U = 0;
+ dcon0.B.DCBYP = enable ? 0 : 1; /*depending on the enable bypas bit is reset/set */
+ __mtcr(CPU_DCON0, dcon0.U);
+ IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
+ }
+ /* Step 2: Call Isync */
+ __isync();
+}
+
+
+IFX_INLINE void IfxCpu_setPerformanceCountersEnableBit(uint32 enable)
+{
+ Ifx_CPU_CCTRL cctrl;
+ cctrl.U = __mfcr(CPU_CCTRL);
+ cctrl.B.CE = enable;
+ __mtcr(CPU_CCTRL, cctrl.U);
+}
+
+
+IFX_INLINE void IfxCpu_setProgramCache(boolean enable)
+{
+ if (enable)
+ { /* Step 3: Initiate invalidation of current cache contents if any */
+ Ifx_CPU_PCON1 pcon1;
+ pcon1.U = 0;
+ pcon1.B.PCINV = 1;
+ __mtcr(CPU_PCON1, pcon1.U);
+ }
+
+ uint32 coreIndex = IfxCpu_getCoreIndex();
+ uint16 wdtPassword = IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[coreIndex]);
+ /*PCACHE enable steps */
+ { /* Step 1: Set PCBYP to 0 if cache is enabled */
+ IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
+ Ifx_CPU_PCON0 pcon0;
+ pcon0.U = 0;
+ pcon0.B.PCBYP = enable ? 0 : 1; /*depending on the enable bypass bit is reset/set */
+ __mtcr(CPU_PCON0, pcon0.U);
+ IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[coreIndex], wdtPassword);
+ }
+ /* Step 2: Call Isync */
+ __isync();
+}
+
+
+IFX_INLINE void IfxCpu_setSafetyTaskIdentifier(boolean safetyId)
+{
+ Ifx_CPU_PSW psw;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (safetyId == 0 || safetyId == 1));
+ psw.U = __mfcr(CPU_PSW);
+ psw.B.S = safetyId;
+ __mtcr(CPU_PSW, (uint32)psw.U);
+}
+
+
+#if !((defined(__cplusplus)) && (defined(__TASKING__)))
+IFX_INLINE IfxCpu_Perf IfxCpu_stopCounters(void)
+{
+ IfxCpu_Perf result;
+ /*Disable the counters, reset the control reg */
+ /* Use inline assembly to ensure constant implementation, and execution of the measurement routines */
+ __stopPerfCounters();
+
+ Ifx_CPU_CCNT ccnt;
+ ccnt.U = __mfcr(CPU_CCNT);
+ result.clock.counter = ccnt.B.CountValue;
+ result.clock.overlfow = ccnt.B.SOvf;
+
+ Ifx_CPU_ICNT icnt;
+ icnt.U = __mfcr(CPU_ICNT);
+ result.instruction.counter = icnt.B.CountValue;
+ result.instruction.overlfow = icnt.B.SOvf;
+
+ Ifx_CPU_M1CNT m1cnt;
+ m1cnt.U = __mfcr(CPU_M1CNT);
+ result.counter1.counter = m1cnt.B.CountValue;
+ result.counter1.overlfow = m1cnt.B.SOvf;
+
+ Ifx_CPU_M2CNT m2cnt;
+ m2cnt.U = __mfcr(CPU_M2CNT);
+ result.counter2.counter = m2cnt.B.CountValue;
+ result.counter2.overlfow = m2cnt.B.SOvf;
+
+ Ifx_CPU_M3CNT m3cnt;
+ m3cnt.U = __mfcr(CPU_M3CNT);
+ result.counter3.counter = m3cnt.B.CountValue;
+ result.counter3.overlfow = m3cnt.B.SOvf;
+
+ return result;
+}
+#endif
+
+
+IFX_INLINE void IfxCpu_triggerSwReset(void)
+{
+ MODULE_SCU.SWRSTCON.B.SWRSTREQ = 1;
+
+ /* Wait till reset */
+ while (1)
+ {}
+}
+
+
+IFX_INLINE void IfxCpu_updateClockCounter(uint32 count)
+{
+ IfxCpu_updatePerformanceCounter(CPU_CCNT, count);
+}
+
+
+IFX_INLINE void IfxCpu_updateInstructionCounter(uint32 count)
+{
+ IfxCpu_updatePerformanceCounter(CPU_ICNT, count);
+}
+
+
+IFX_INLINE void IfxCpu_updatePerformanceCounter(uint32 address, uint32 count)
+{
+ IFX_UNUSED_PARAMETER(address);
+ Ifx_CPU_CCTRL cctrl;
+ boolean enableBit;
+ /*Disable the counters */
+ cctrl.U = __mfcr(CPU_CCTRL);
+ enableBit = cctrl.B.CE;
+ cctrl.B.CE = 0;
+ __mtcr(CPU_CCTRL, cctrl.U);
+
+ /*Update the counter value */
+ count &= ~(1U << 31); /*clear sticky overflow bit if set */
+ __mtcr(address, count);
+
+ /*restore the enable bit */
+ cctrl.B.CE = enableBit;
+ __mtcr(CPU_CCTRL, cctrl.U);
+}
+
+
+#endif /* IFXCPU_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_Intrinsics.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_Intrinsics.h
new file mode 100644
index 0000000..c85d276
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_Intrinsics.h
@@ -0,0 +1,170 @@
+/**
+ * \file IfxCpu_Intrinsics.h
+ * \ingroup IfxLld_Cpu_Intrinsics Intrinsics
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cpu_Intrinsics Intrinsics
+ * \ingroup IfxLld_Cpu_Std
+ *
+ */
+#ifndef IFXCPU_INTRINSICS_H
+#define IFXCPU_INTRINSICS_H
+/******************************************************************************/
+#include "Ifx_Types.h"
+
+#if defined(__DCC__)
+#include "IfxCpu_IntrinsicsDcc.h"
+
+#elif defined(__HIGHTEC__)
+#include "IfxCpu_IntrinsicsGnuc.h"
+
+#elif defined(__TASKING__)
+#include "IfxCpu_IntrinsicsTasking.h"
+
+#elif defined(__ghs__)
+#include "IfxCpu_IntrinsicsGhs.h"
+
+#else
+#error Compiler unsupported
+#endif
+
+#define IFX_ALIGN_8 (1) // Align on 8 bit Boundary
+#define IFX_ALIGN_16 (2) // Align on 16 bit Boundary
+#define IFX_ALIGN_32 (4) // Align on 32 bit Boundary
+#define IFX_ALIGN_64 (8) // Align on 64 bit Boundary
+#define IFX_ALIGN_128 (16) // Align on 128 bit Boundary
+#define IFX_ALIGN_256 (32) // Align on 256 bit Boundary
+
+#define Ifx_AlignOn256(Size) ((((Size) + (IFX_ALIGN_256 - 1)) & (~(IFX_ALIGN_256 - 1))))
+#define Ifx_AlignOn128(Size) ((((Size) + (IFX_ALIGN_128 - 1)) & (~(IFX_ALIGN_128 - 1))))
+#define Ifx_AlignOn64(Size) ((((Size) + (IFX_ALIGN_64 - 1)) & (~(IFX_ALIGN_64 - 1))))
+#define Ifx_AlignOn32(Size) ((((Size) + (IFX_ALIGN_32 - 1)) & (~(IFX_ALIGN_32 - 1))))
+#define Ifx_AlignOn16(Size) ((((Size) + (IFX_ALIGN_16 - 1)) & (~(IFX_ALIGN_16 - 1))))
+#define Ifx_AlignOn8(Size) ((((Size) + (IFX_ALIGN_8 - 1)) & (~(IFX_ALIGN_8 - 1))))
+
+#define Ifx_COUNTOF(x) (sizeof(x) / sizeof(x[0]))
+
+//______________________________________________________________________________
+
+/** Convert context pointer to address pointer
+ * \param[in] cx context pointer
+ * \return address pointer
+ */
+IFX_INLINE void *__cx_to_addr(uint32 cx)
+{
+ uint32 seg_nr = __extru(cx, 16, 4);
+ return (void *)__insert(seg_nr << 28, cx, 6, 16);
+}
+
+
+/** Convert address pointer to context pointer
+ * \param[in] addr address pointer
+ * \return context pointer
+ */
+IFX_INLINE uint32 __addr_to_cx(void *addr)
+{
+ uint32 seg_nr, seg_idx;
+ seg_nr = __extru((int)addr, 28, 4) << 16;
+ seg_idx = __extru((int)addr, 6, 16);
+ return seg_nr | seg_idx;
+}
+
+
+/******************************************************************************/
+IFX_INLINE void __ldmst_c(volatile void *address, unsigned mask, unsigned value)
+{
+ *(volatile uint32 *)address = (*(volatile uint32 *)address & ~(mask)) | (mask & value);
+}
+
+
+/** 32bit load operation
+ */
+IFX_INLINE uint32 __ld32(void *addr)
+{
+ return *(volatile uint32 *)addr;
+}
+
+
+/** 32bit store operation
+ */
+IFX_INLINE void __st32(void *addr, uint32 value)
+{
+ *(volatile uint32 *)addr = value;
+}
+
+
+/** 64bit load operation
+ */
+IFX_INLINE uint64 __ld64(void *addr)
+{
+ return *(volatile uint64 *)addr;
+}
+
+
+/** 64bit store operation
+ */
+IFX_INLINE void __st64(void *addr, uint64 value)
+{
+ *(volatile uint64 *)addr = value;
+}
+
+
+/** 64bit load operation which returns the lower and upper 32bit word
+ */
+IFX_INLINE void __ld64_lu(void *addr, uint32 *valueLower, uint32 *valueUpper)
+{
+ register uint64 value;
+ value = __ld64(addr);
+ *valueLower = (uint32)value;
+ *valueUpper = (uint32)(value >> 32);
+}
+
+
+/** 64bit store operation which stores a lower and upper 32bit word
+ */
+IFX_INLINE void __st64_lu(void *addr, uint32 valueLower, uint32 valueUpper)
+{
+ register uint64 value = ((uint64)valueUpper << 32) | valueLower;
+ __st64(addr, value);
+}
+
+
+/******************************************************************************/
+#endif /* IFXCPU_INTRINSICS_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsDcc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsDcc.h
new file mode 100644
index 0000000..cbc816c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsDcc.h
@@ -0,0 +1,2123 @@
+/**
+ * \file IfxCpu_IntrinsicsDcc.h
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cpu_Intrinsics_Dcc intrinsics for DCC compiler
+ * \ingroup IfxLld_Cpu_Intrinsics
+ *
+ */
+#ifndef IFXCPU_INTRINSICSDCC_H
+#define IFXCPU_INTRINSICSDCC_H
+/******************************************************************************/
+#include "Ifx_Types.h"
+
+/******************************************************************************/
+/* *INDENT-OFF* */
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_min_smax Minimum and Maximum of (Short) Integers
+ These intrinsic functions return the minimum or maximum of a signed integer, unsigned integer or short integer.
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+
+/** Function call without return
+ */
+asm volatile void Ifx__non_return_call(void (*fun)(void))
+{
+% reg fun
+ ji fun
+}
+
+/** Jump and link
+ */
+asm volatile void Ifx__jump_and_link(void (*fun)(void))
+{
+% reg fun
+ jli fun
+}
+
+/** \} */
+
+asm volatile void Ifx__moveToDataParam0(unsigned int var)
+{
+% reg var
+! "%d4"
+ mov %d4, var
+}
+
+asm volatile void Ifx__moveToDataParamRet(unsigned int var)
+{
+% reg var
+! "%d2"
+ mov %d2, var
+}
+
+asm volatile unsigned int Ifx__getDataParamRet(void)
+{
+! "%d2"
+ mov %d2, %d2
+}
+
+asm volatile void Ifx__moveToAddrParam0(const void *var)
+{
+% reg var
+! "%a4"
+ mov.aa %a4, var
+}
+
+IFX_INLINE void Ifx__jumpToFunction(const void *fun)
+{
+ Ifx__non_return_call((void (*)(void))fun);
+}
+
+IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
+{
+ Ifx__jump_and_link((void (*)(void))fun);
+}
+
+asm volatile void Ifx__jumpBackToLink(void)
+{
+! "%a11"
+ ji %a11
+}
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_any_type Cross type arithmetic operation
+ *
+ * Macro compatible with float, fix point, signed integer and unsigned integer
+ *
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+#define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
+#define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+/** Return minimum of two integers
+ */
+extern sint32 __min( sint32, sint32) __attribute__((intrinsic_pseudo(3, "min") ));
+
+#define Ifx__min __min
+
+/** Return minimum of two short integers
+ */
+extern sint32 __mins( sint32, sint32) __attribute__((intrinsic_function(0x10b, 0, "min.h") ));
+
+#define Ifx__mins __mins
+
+/** Return minimum of two unsigned integers
+ */
+extern uint32 __minu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "min.u") ));
+
+#define Ifx__minu __minu
+
+/** Return maximum of two integers
+ */
+extern sint32 __max( sint32, sint32) __attribute__((intrinsic_pseudo(3, "max") ));
+
+#define Ifx__max __max
+
+/** Return maximum of two short integers
+ */
+extern uint32 __maxs( uint32, uint32) __attribute__((intrinsic_function(0x10b, 0, "max.h") ));
+
+#define Ifx__maxs __maxs
+
+/** Return maximum of two unsigned integers
+ */
+extern uint32 __maxu( uint32, uint32) __attribute__((intrinsic_pseudo(3, "max.u") ));
+
+#define Ifx__maxu __maxu
+
+/** \} */
+
+/** \defgroup intrinsicstasking_float Floating point operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+#define Ifx__saturate(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
+
+#define Ifx__sqrf(X) ((X) * (X))
+#define Ifx__sqrtf(X) sqrtf(X)
+#define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+#define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
+#define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
+#define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturatef(X,Min,Max) ( __minf(__maxf(X, Min), Max) )
+#define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+#define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
+#define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
+
+#define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
+#define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
+#define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_fractional Fractional Arithmetic Support
+ The next table provides an overview of intrinsic functions to convert fractional values. Note that the
+ TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
+ need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
+ compiler does support these functions.
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+
+/** Count the consecutive number of bits that have the same value as bit 15 of an sfract
+ */
+asm short Ifx__clssf(sfract a)
+{
+% reg a
+! "%d2"
+ sh a,a,16
+ cls %d2, a
+}
+
+/** Convert float to fract
+ */
+asm fract Ifx__float_to_fract(float a)
+{
+% reg a
+! "%d2", "%d3"
+ mov %d3, 0
+ ftoq31 %d2, a, %d3
+}
+
+/** \brief Convert fract to float
+ */
+asm float Ifx__fract_to_float(fract a)
+{
+% reg a
+! "%d2", "%d3"
+ mov %d3, 0
+ q31tof %d2, a, %d3
+}
+
+/** Convert __laccum to fract
+ */
+asm fract Ifx__getfract(laccum a)
+{
+% reg a
+! "%d2"
+ dextr %d2, a!H, a!L, 17
+}
+
+/** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
+ */
+#ifdef INTRINSIC_WORKAROUND
+extern sfract __mac_r_sf(sfract a, sfract b, sfract c);
+#else
+asm sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
+{
+% reg a, b, c
+! "%d2"
+ maddrs.q %d2, a, bU, cU, 1
+}
+#endif
+
+/** Multiply-add sfract. Returns ( a + b * c )
+ */
+#ifdef INTRINSIC_WORKAROUND
+extern sfract __mac_sf(sfract a, sfract b, sfract c);
+#else
+asm sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
+{
+% reg a, b, c
+! "%d2"
+ madds.q %d2, a, bU, cU, 1
+}
+#endif
+
+/** Integer part of the multiplication of a fract and a fract
+ */
+asm long Ifx__mulfractfract(fract a, fract b)
+{
+% reg a, b
+! "%d2"
+ mul.q %d2, a, b, 1
+}
+
+/** Integer part of the multiplication of a fract and a long
+ */
+asm long Ifx__mulfractlong(fract a, long b)
+{
+% reg a, b
+! "%d2"
+ mul.q %d2, a, b, 1
+}
+
+/** Convert fract to sfract
+ */
+asm sfract Ifx__round16(fract a)
+{
+% reg a
+! "%d2"
+ mov.u %d2, 0x8000
+ adds %d2, a
+ extr %d2,%d2,0x10,0x10
+}
+
+#define Ifx__fract_to_sfract Ifx__round16
+
+/** Convert float to sfract
+ */
+IFX_INLINE sfract __float_to_sfract(float a)
+{
+ fract tmp = Ifx__float_to_fract(a);
+ return Ifx__fract_to_sfract(tmp);
+}
+
+/** Convert signed short to sfract
+ */
+asm sfract Ifx__s16_to_sfract(short a)
+{
+% reg a
+! "%d2"
+ sh %d2, a, 16
+ sh %d2, %d2, -16
+}
+
+/** Convert sfract to signed short
+ */
+asm short Ifx__sfract_to_s16(sfract a)
+{
+% reg a
+ sh a, a, 16
+ sh %d2, a, -16
+}
+
+/** Convert sfract to uint16
+ */
+asm volatile uint16 Ifx__sfract_to_u16(sfract a)
+{
+% reg a
+! "%d2"
+ sh a, a, 16
+ sh %d2, a, -16
+}
+
+/** Left/right shift of an __laccum
+ */
+asm laccum Ifx__shaaccum(laccum a, sint32 b)
+{
+% lab L0, L1; reg a, b
+! "%d2", "%d3"
+ jge b, 0, L0
+ sha %d3, a!L, b
+ rsub b, b, 0
+ dextr %d2, a!H, a!L, b
+ j L1
+L0:
+ dextr %d2, a!H, a!L, b
+ sha %d2, a!L, b
+L1:
+}
+
+/** Left/right shift of an fract
+ */
+#ifdef INTRINSIC_WORKAROUND
+extern fract __shafracts(fract a, sint32 b);
+#else
+asm fract Ifx__shafracts(fract a, sint32 b)
+{
+% reg a, b
+! "%d2"
+ shas %d2, a, b
+}
+#endif
+
+/** Left/right shift of an sfract
+ */
+#ifdef INTRINSIC_WORKAROUND
+extern sfract __shasfracts(sfract a, sint32 b);
+#else
+asm sfract Ifx__shasfracts(sfract a, sint32 b)
+{
+% reg a, b
+! "%d2"
+ shas %d2, a, b
+}
+#endif
+
+/** Convert uint16 to sfract
+ */
+asm sfract Ifx__u16_to_sfract(uint16 a)
+{
+% reg a
+! "%d2"
+ sh %d2, a, 16
+ sh %d2, %d2, -16
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_insert Insert / Extract Bit-fields and Bits
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+
+/** Extract a bit-field (bit pos to bit pos+width) from value
+ */
+extern sint32 __extr( sint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr") ));
+
+#define Ifx__extr __extr
+
+/** Same as __extr() but return bit-field as unsigned integer
+ */
+extern uint32 __extru( uint32, uint32, const uint32) __attribute__((intrinsic_function(0x108, 0, "extr.u") ));
+
+#define Ifx__extru __extru
+
+/** Load a single bit.
+ */
+#define Ifx__getbit( address, bitoffset ) __extru( *(address), bitoffset, 1 )
+
+/** Return trg but replace trgbit by srcbit in src.
+ */
+extern uint32 __ins( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "ins.t") ));
+
+#define Ifx__ins __ins
+
+/** Extract bit-field (width w bits starting at bit 0) from a and insert it in
+ * b at position p.
+ */
+extern uint32 __insert( uint32, uint32, uint32, const uint32) __attribute__((intrinsic_function(0x109, 0, "insert") ));
+
+#define Ifx__insert __insert
+
+/** Return trg but replace trgbit by inverse of srcbit in src.
+ */
+extern uint32 __insn( uint32, const uint32, uint32, const uint32) __attribute__((intrinsic_function(0x121, 0, "insn.t") ));
+
+#define Ifx__insn __insn
+
+/** Atomic load-modify-store.
+ */
+#ifdef INTRINSIC_WORKAROUND
+extern void __imaskldmst(void* a, sint32 b, sint32 p, const sint32 w);
+#else
+asm volatile void Ifx__imaskldmst(void* a, sint32 b, sint32 p, const sint32 w)
+{
+% reg a, b, p; con w
+! "%d2", "%d3"
+ imask %e2, b, p, w
+ ldmst [a]0, %e2
+}
+#endif
+
+/** Store a single bit.
+ */
+#define Ifx__putbit(value,address,bitoffset) Ifx__imaskldmst(address,value,bitoffset,1)
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_interrupt_handling Interrupt Handling
+ The next table provides an overview of the intrinsic functions to read or set interrupt handling.
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+
+/** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
+ */
+extern void __bisr( const uint32) __attribute__((intrinsic_function(0x100, 0, "bisr") ));
+
+#define Ifx__bisr __bisr
+
+/** Disable interrupts. Only supported for TriCore1
+ */
+extern void __disable( void) __attribute__((intrinsic_function(0x103, 0, "disable") ));
+
+#define Ifx__disable __disable
+
+/** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
+ */
+#if defined INTRINSIC_WORKAROUND
+extern sint32 __disable_and_save(void);
+#endif
+
+/** Enable interrupts immediately at function entry
+ */
+extern void __enable( void) __attribute__((intrinsic_function(0x103, 0, "enable") ));
+
+#define Ifx__enable __enable
+
+/** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
+ */
+extern void __restore( sint32) __attribute__((intrinsic_function(0x104, 0, "restore") ));
+
+#define Ifx__restore __restore
+
+/** Call a system call function number
+ */
+extern void __syscall( const uint32) __attribute__((intrinsic_function(0x100, 0, "syscall") ));
+
+#define Ifx__syscall __syscall
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_miscellaneous Miscellaneous Intrinsic Functions
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+
+/** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
+ */
+extern void __cacheawi( void*) __attribute__((intrinsic_function(0x110, 0, "cachea.wi") ));
+
+#define Ifx__cacheawi __cacheawi
+
+/** Write back and invalidate cache address \"p\" and return post incremented
+ * value of \"p\". Generates CACHEA.WI [Ab+].
+ */
+asm volatile uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
+{
+% reg p
+!
+ cachea.wi [p + ]0
+ mov.aa %a2, p
+}
+
+/** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
+ */
+asm volatile void Ifx__cacheiwi(uint8* p)
+{
+% reg p
+!
+ cachei.wi [p]
+}
+
+/** Initialize a circular pointer with a dynamically allocated buffer at run-time.
+ */
+asm circ_t __initcirc(void* buf, uint16 bufsize, uint16 byteindex)
+{
+% reg buf, bufsize, byteindex
+! "%a2", "%a3"
+ lea %a2, [buf]0
+ extr.u bufsize, bufsize, 0, 16
+ insert bufsize, byteindex, bufsize, 16, 16
+ mov.a %a3, bufsize
+}
+
+/** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
+ * back the result to 32 bits. To scale back the result, 32 bits are extracted
+ * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
+ */
+asm volatile sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
+{
+% reg a, b, offset
+! "%d2", "%d3"
+ mul %e2, a, b
+ dextr %d2, %d3, %d2, offset
+}
+
+/** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
+ */
+asm volatile uint32 Ifx__rol(uint32 operand, uint32 count)
+{
+% reg operand, count
+! "%d2"
+ dextr %d2, operand, operand, count
+}
+
+/** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
+ */
+asm volatile uint32 Ifx__ror(uint32 operand, uint32 count)
+{
+% reg operand, count
+! "%d2"
+ rsub count, count, 0
+ dextr %d2, operand, operand, count
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_packed Packed Data Type Support
+ The next table provides an overview of the intrinsic functions for initialization of packed data type.
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+
+/** Absolute value of __packb
+*/
+asm __packb Ifx__absb(__packb a)
+{
+% reg a
+! "%d2"
+ abs.b %d2, a
+}
+
+/** Absolute value of __packhw
+ */
+asm __packhw Ifx__absh(__packhw a)
+{
+% reg a
+! "%d2"
+ abs.h %d2, a
+}
+
+/** Absolute value of __packhw using saturation
+ */
+asm __packhw Ifx__abssh(__packhw a)
+{
+% reg a
+! "%d2"
+ abss.h %d2, a
+}
+
+/** \brief Extract first byte from a __packb
+ */
+asm sint8 Ifx__extractbyte1(__packb a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 0, 8
+}
+
+/** \brief Extract second byte from a __packb
+ */
+asm sint8 Ifx__extractbyte2(__packb a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 8, 8
+}
+
+/** \brief Extract third byte from a __packb
+ */
+asm sint8 Ifx__extractbyte3(__packb a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 16, 8
+}
+
+/** \brief Extract fourth byte from a __packb
+ */
+asm sint8 Ifx__extractbyte4(__packb a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 24, 8
+}
+
+/** \brief Extract first short from a __packhw
+ */
+asm short Ifx__extracthw1(__packhw a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 0, 16
+}
+
+/** \brief Extract second short from a __packhw
+ */
+asm short Ifx__extracthw2(__packhw a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 16, 16
+}
+
+/** Extract first unsigned byte from a __packb
+ */
+asm volatile uint8 Ifx__extractubyte1(__upackb a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 0, 8
+}
+
+/** Extract second unsigned byte from a __packb
+ */
+asm volatile uint8 Ifx__extractubyte2(__upackb a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 8, 8
+}
+
+/** Extract third unsigned byte from a __packb
+ */
+asm volatile uint8 Ifx__extractubyte3(__upackb a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 16, 8
+}
+
+/** Extract fourth unsigned byte from a __packb
+ */
+asm volatile uint8 Ifx__extractubyte4(__upackb a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 24, 8
+}
+
+/** Extract first uint16 from a __packhw
+ */
+asm volatile uint16 Ifx__extractuhw1(__upackhw a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 0, 16
+}
+
+/** Extract second uint16 from a __packhw
+ */
+asm volatile uint16 Ifx__extractuhw2(__upackhw a)
+{
+% reg a
+! "%d2"
+ extr %d2, a, 16, 16
+}
+
+/** Extract first byte from a __packb
+ */
+asm sint8 Ifx__getbyte1(__packb* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 0, 8
+}
+
+/** Extract second byte from a __packb
+ */
+asm sint8 Ifx__getbyte2(__packb* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 8, 8
+}
+
+/** Extract third byte from a __packb
+ */
+asm sint8 Ifx__getbyte3(__packb* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 16, 8
+}
+
+/** Extract fourth byte from a __packb
+ */
+asm sint8 Ifx__getbyte4(__packb* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 24, 8
+}
+
+/** Extract first short from a __packhw
+ */
+asm short Ifx__gethw1(__packhw* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 0, 16
+}
+
+/** Extract second short from a __packhw
+ */
+asm short Ifx__gethw2(__packhw* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 16, 16
+}
+
+/** Extract first unsigned byte from a __packb
+ */
+asm volatile uint8 Ifx__getubyte1(__upackb* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 0, 8
+}
+
+/** Extract second unsigned byte from a __packb
+ */
+asm volatile uint8 Ifx__getubyte2(__upackb* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 8, 8
+}
+
+/** Extract third unsigned byte from a __packb
+ */
+asm volatile uint8 Ifx__getubyte3(__upackb* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 16, 8
+}
+
+/** Extract fourth unsigned byte from a __packb
+ */
+asm volatile uint8 Ifx__getubyte4(__upackb* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 24, 8
+}
+
+/** Extract first uint16 from a __packhw
+ */
+asm volatile uint16 Ifx__getuhw1(__upackhw* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 0, 16
+}
+
+/** Extract second uint16 from a __packhw
+ */
+asm volatile uint16 Ifx__getuhw2(__upackhw* a)
+{
+% reg a
+! "%d2"
+ ld.w %d2, [a]
+ extr %d2, %d2, 16, 16
+}
+
+/** Initialize __packb with four integers
+ */
+asm __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
+{
+% reg a, b, c, d
+! "%d2"
+ insert c, c, d, 8, 8
+ insert d, a, b, 8, 8
+ insert %d2, d, c, 16, 16
+}
+
+/** Initialize __packb with a long integer
+ */
+asm __packb Ifx__initpackbl(long a)
+{
+% reg a
+! "%d2"
+ mov %d2, a
+}
+
+/** \brief Initialize __packhw with two integers
+ */
+asm __packhw Ifx__initpackhw(short a, short b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 16, 16
+}
+
+/** Initialize __packhw with a long integer
+ */
+asm __packhw Ifx__initpackhwl(long a)
+{
+% reg a
+! "%d2"
+ mov %d2, a
+}
+
+/** Initialize __packb with four unsigned integers
+ */
+asm __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
+{
+% reg a, b, c, d
+! "%d2"
+ insert c, c, d, 8, 8
+ insert a, a, b, 8, 8
+ insert %d2, a, c, 16, 16
+}
+
+/** Initialize __packhw with two unsigned integers
+ */
+asm __upackhw Ifx__initupackhw( uint16 a, uint16 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 16, 16
+}
+
+/** \brief Insert sint8 into first byte of a __packb
+ */
+asm __packb Ifx__insertbyte1(__packb a, sint8 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 0, 8
+}
+
+/** \brief Insert sint8 into second byte of a __packb
+ */
+asm __packb Ifx__insertbyte2(__packb a, sint8 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 8, 8
+}
+
+/** \brief Insert sint8 into third byte of a __packb
+ */
+asm __packb Ifx__insertbyte3(__packb a, sint8 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 16, 8
+}
+
+/** \brief Insert sint8 into fourth byte of a __packb
+ */
+asm __packb Ifx__insertbyte4(__packb a, sint8 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 24, 8
+}
+
+/** Insert short into first halfword of a __packhw
+ */
+asm __packhw Ifx__inserthw1(__packhw a, short b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 0, 16
+}
+
+/** Insert short into second halfword of a __packhw
+ */
+asm __packhw Ifx__inserthw2(__packhw a, short b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 16, 16
+}
+
+/** \brief Insert uint8 into first unsigned byte of a __packb
+ */
+asm __upackb Ifx__insertubyte1( __upackb a, uint8 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 0, 8
+}
+
+/** \brief Insert uint8 into second unsigned byte of a __packb
+ */
+asm __upackb Ifx__insertubyte2( __upackb a, uint8 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 8, 8
+}
+
+/** \brief Insert uint8 into third unsigned byte of a __packb
+ */
+asm __upackb Ifx__insertubyte3( __upackb a, uint8 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 16, 8
+}
+
+/** \brief Insert uint8 into fourth unsigned byte of a __packb
+ */
+asm __upackb Ifx__insertubyte4( __upackb a, uint8 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 24, 8
+}
+
+/** Insert uint16 into first halfword of a __upackhw
+ */
+asm __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 0, 16
+}
+
+/** Insert uint16 into second halfword of a __upackhw
+ */
+asm __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
+{
+% reg a, b
+! "%d2"
+ insert %d2, a, b, 16, 16
+}
+
+/** Minimum of two __packb values
+ */
+#ifdef INTRINSIC_WORKAROUND
+extern __packb __minb(__packb a, __packb b);
+#else
+asm __packb Ifx__minb(__packb a, __packb b)
+{
+% reg a, b
+! "%d2"
+ min.b %d2, a, b
+}
+#endif
+
+/** Minimum of two __upackb values
+ */
+asm __upackb Ifx__minbu( __upackb a, __upackb b)
+{
+% reg a, b
+! "%d2"
+ min.bu %d2, a, b
+}
+
+/** Minimum of two __packhw values
+ */
+asm __packhw Ifx__minh(__packhw a, __packhw b)
+{
+% reg a, b
+! "%d2"
+ min.h %d2, a, b
+}
+
+/** Minimum of two __upackhw values
+ */
+asm __upackhw Ifx__minhu( __upackhw a, __upackhw b)
+{
+% reg a, b
+! "%d2"
+ min.hu %d2, a, b
+}
+
+/** Insert sint8 into first byte of a __packb
+ */
+asm volatile void Ifx__setbyte1(__packb* a, sint8 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 0, 8
+ st.w [a], %d2
+}
+
+/** Insert sint8 into second byte of a __packb
+ */
+asm volatile void Ifx__setbyte2(__packb* a, sint8 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 8, 8
+ st.w [a], %d2
+}
+
+/** Insert sint8 into third byte of a __packb
+ */
+asm volatile void Ifx__setbyte3(__packb* a, sint8 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 16, 8
+ st.w [a], %d2
+}
+
+/** Insert sint8 into fourth byte of a __packb
+ */
+asm volatile void Ifx__setbyte4(__packb* a, sint8 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 24, 8
+ st.w [a], %d2
+}
+
+/** Insert short into first halfword of a __packhw
+ */
+asm volatile void Ifx__sethw1(__packhw* a, short b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 0, 16
+ st.w [a], %d2
+}
+
+/** Insert short into second halfword of a __packhw
+ */
+asm volatile void Ifx__sethw2(__packhw* a, short b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 16, 16
+ st.w [a], %d2
+}
+
+/** Insert uint8 into first byte of a __upackb
+ */
+asm volatile void Ifx__setubyte1(__upackb* a, uint8 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 0, 8
+ st.w [a], %d2
+}
+
+/** Insert uint8 into second byte of a __upackb
+ */
+asm volatile void Ifx__setubyte2(__upackb* a, uint8 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 8, 8
+ st.w [a], %d2
+}
+
+/** Insert uint8 into third byte of a __upackb
+ */
+asm volatile void Ifx__setubyte3(__upackb* a, uint8 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 16, 8
+ st.w [a], %d2
+}
+
+/** Insert uint8 into fourth byte of a __upackb
+ */
+asm volatile void Ifx__setubyte4(__upackb* a, uint8 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 24, 8
+ st.w [a], %d2
+}
+
+/** Insert uint16 into first halfword of a __upackhw
+ */
+asm volatile void Ifx__setuhw1(__upackhw* a, uint16 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 0, 16
+ st.w [a], %d2
+}
+
+/** Insert uint16 into second halfword of a __upackhw
+ */
+asm volatile void Ifx__setuhw2(__upackhw* a, uint16 b)
+{
+% reg a, b
+! "%d2"
+ ld.w %d2, [a]
+ insert %d2, %d2, b, 16, 16
+ st.w [a], %d2
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_register Register Handling
+ The next table provides an overview of the intrinsic functions that you can use to access control registers.
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+
+/** Return absolute value
+ */
+extern sint32 __abs( sint32) __attribute__((intrinsic_pseudo(1, "abs") ));
+
+#define Ifx__abs __abs
+
+/** Return absolue difference of two integers
+ */
+extern sint32 __absdif( sint32, sint32) __attribute__((intrinsic_pseudo(1, "absdif") ));
+
+#define Ifx__absdif __absdif
+
+/** Return absolute value with saturation
+ */
+extern sint32 __abss( sint32) __attribute__((intrinsic_pseudo(1, "abss") ));
+
+#define Ifx__abss __abss
+
+/** Count leading ones in int
+ */
+extern sint32 __clo( sint32) __attribute__((intrinsic_pseudo(1, "clo") ));
+
+#define Ifx__clo __clo
+
+/** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
+ */
+extern sint32 __cls( sint32) __attribute__((intrinsic_pseudo(1, "cls") ));
+
+#define Ifx__cls __cls
+
+/** Count leading zeros in int
+ */
+extern sint32 __clz( sint32) __attribute__((intrinsic_pseudo(1, "clz") ));
+
+#define Ifx__clz __clz
+
+/** Return absolute double precision floating-point value
+ */
+asm double Ifx__fabs(double d)
+{
+% reg d
+! "%d2"
+ insert %d2, d, 0, 31, 1
+}
+
+/** Return absolute floating-point value
+ */
+asm float Ifx__fabsf(float f)
+{
+% reg f
+! "%d2"
+ insert %d2, f, 0, 31, 1
+}
+
+/** Move contents of the addressed core SFR into a data register
+ */
+extern sint32 __mfcr( const uint32) __attribute__((intrinsic_function(0x101, 0, "mfcr") ));
+
+#define Ifx__mfcr __mfcr
+
+/** Move contents of a data register (second sint32) to the addressed core SFR (first sint32)
+ */
+extern void __mtcr( const uint32, sint32) __attribute__((intrinsic_function(0x102, 0, "mtcr") ));
+
+#define Ifx__mtcr __mtcr
+
+/** Return parity
+ */
+asm volatile sint32 Ifx__parity(sint32 a)
+{
+% reg a
+! "%d2"
+ parity %d2, a
+}
+
+/** Return saturated byte
+ */
+asm sint8 Ifx__satb(sint32 a)
+{
+% reg a
+! "%d2"
+ sat.b %d2, a
+}
+
+/** Return saturated unsigned byte
+ */
+asm volatile uint8 Ifx__satbu(sint32 a)
+{
+% reg a
+! "%d2"
+ sat.bu %d2, a
+}
+
+/** Return saturated halfword
+ */
+asm short Ifx__sath(sint32 a)
+{
+% reg a
+! "%d2"
+ sat.h %d2, a
+}
+
+/** Return saturated unsignedhalfword
+ */
+asm volatile uint16 Ifx__sathu(sint32 a)
+{
+% reg a
+! "%d2"
+ sat.hu %d2, a
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_saturation Saturation Arithmetic Support
+ These intrinsics support saturation arithmetic
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+/** add signed with saturation
+ */
+extern sint32 __adds( sint32, sint32) __attribute__((intrinsic_pseudo(1, "adds") ));
+
+#define Ifx__adds __adds
+
+/** add unsigned with saturation
+ */
+asm volatile uint32 Ifx__addsu(uint32 a, uint32 b)
+{
+% reg a, b
+! "%d2"
+ adds.u %d2, a, b
+}
+
+/** substract signed with saturation
+ */
+asm volatile sint32 Ifx__subs(sint32 a, sint32 b)
+{
+% reg a, b
+! "%d2"
+ subs %d2, a, b
+}
+
+/** substract unsigned with saturation
+ */
+asm volatile uint32 Ifx__subsu(uint32 a, uint32 b)
+{
+% reg a, b
+! "%d2"
+ subs.u %d2, a, b
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Dcc_single_assembly Insert Single Assembly Instruction
+ The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
+ instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
+ assembly instructions.
+ * \ingroup IfxLld_Cpu_Intrinsics_Dcc
+ * \{
+ */
+
+/** Insert DEBUG instruction
+ */
+extern void __debug( void) __attribute__((intrinsic_function(0x103, 0, "debug") ));
+
+#define Ifx__debug __debug
+
+/** Insert DSYNC instruction
+ */
+extern void __dsync( void) __attribute__((intrinsic_function(0x103, 0, "dsync") ));
+
+#define Ifx__dsync __dsync
+
+/** Insert ISYNC instruction
+ */
+extern void __isync( void) __attribute__((intrinsic_function(0x103, 0, "isync") ));
+
+#define Ifx__isync __isync
+
+/** Insert LDMST instruction. Note that all operands must be word-aligned.
+ */
+#ifdef INTRINSIC_WORKAROUND
+#define __ldmst __ldmst_c
+#else
+asm volatile void Ifx__ldmst(volatile void *address, uint32 mask, uint32 value)
+{
+%reg address, mask, value;
+!"%d2", "%d3"
+ mov %d3, mask
+ mov %d2, value
+ ldmst [address],%e2
+}
+
+#endif
+
+extern void __scheduling_barrier( void) __attribute__((intrinsic_function(9, 4, "$$sb") ));
+#define Ifx__mem_barrier __scheduling_barrier
+
+/** Insert NOP instruction
+ */
+extern void __nop( void) __attribute__((intrinsic_function(0x103, 0, "nop") ));
+
+#define Ifx__nop __nop
+
+#define Ifx__NOP __nops
+
+/** Insert a loop over n NOP instruction
+ */
+asm volatile void Ifx__nops(uint32 cnt)
+{
+% reg cnt;lab L0;
+! "%a2"
+ mov %a2,cnt
+ add.a %a2, -1
+L0:
+ nop
+ loop %a2, L0
+}
+
+/** Insert a loop over n times 1000 NOP instruction
+ */
+asm volatile void Ifx__nops1000(uint32 x)
+{
+% reg x;
+ lab L0, L1
+! "%a2", "%a3"
+ mov.a %a2, x
+L1:
+ lea %a3, 999
+L0:
+ nop
+ nop
+ loop %a3, L0
+ loop %a2, L1
+}
+
+/** Insert RSLCX instruction
+ */
+extern void __rslcx( void) __attribute__((intrinsic_function(0x103, 0, "rslcx") ));
+
+#define Ifx__rslcx
+
+/** Insert SVLCX instruction
+ */
+extern void __svlcx( void) __attribute__((intrinsic_function(0x103, 0, "svlcx") ));
+
+#define Ifx__svlcx
+
+/** Insert SWAP instruction. Note that all operands must be word-aligned.
+ */
+#ifdef INTRINSIC_WORKAROUND
+extern uint32 __swap(void* place, uint32 value);
+#else
+asm volatile uint32 Ifx__swap(void* place, uint32 value)
+{
+% reg place, value
+! "%d2"
+ mov %d2, value
+ swap.w [place], %d2
+}
+#endif
+
+// FIXME
+asm volatile unsigned int Ifx__cmpAndSwap(unsigned int *address, unsigned long value, unsigned long CmpVal)
+{
+%reg value, address, CmpVal
+! "%d2", "%d3"
+ mov %d2,value
+ mov %d3,CmpVal
+ cmpswap.w [address], %e2
+}
+/** \} */
+
+/** Insert n NOP instruction
+ */
+//#info "NOP: Feature not yet implemented."
+
+#define Ifx__setareg(areg,val) ___setareg(areg,val)
+/* we need to use a15 for the address register and not direct that the compiler this will not remove */
+#define ___setareg(areg,val) \
+ { __asm ("#$$bp"); \
+ __asm (" movh.a\t %a15,"#val"@ha\n"); \
+ __asm (" lea\t %a15,[%a15]"#val"@l\n"); \
+ __asm (" mov.aa %"#areg", %a15\n"); \
+ __asm ("#$$ep"); }
+
+/* FIXME check that the compiler take in account that d0 is used by the inline function */
+asm volatile void Ifx__stopPerfCounters(void)
+{
+! "%d0"
+ mov %d0,0
+ mtcr 0xFC00,%d0
+ isync
+}
+
+/** \brief Convert a fixpoint value to float32
+ *
+ * This function converts a value from a fixpoint format to a float32 format.
+ *
+ *
+ * \param value value to be converted.
+ * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
+ *
+ * \return Returns the converted value in the float32 format.
+ *
+ */
+asm float Ifx__fixpoint_to_float32(fract value, sint32 shift)
+{
+% reg value, shift
+! "%d2"
+ q31tof %d2, value, shift
+}
+
+asm volatile void* Ifx__getA11(void)
+{
+! "%a11", "%a4"
+ mov.aa %a4, %a11
+}
+
+asm void Ifx__setStackPointer(void *stackAddr)
+{
+% reg stackAddr
+! "%a10"
+ mov.aa %a10, stackAddr
+}
+
+asm volatile unsigned int Ifx__crc32(uint32 b,uint32 a)
+{
+% reg b, a
+! "%d2"
+ CRC32 %d2, b, a
+}
+
+IFX_INLINE unsigned int IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
+{
+ uint32 returnvalue = 0; /* set seed value to 0 */
+ for (;length > 0; length--)
+ {
+ /* calculate the CRC over all data */
+ returnvalue = Ifx__crc32(returnvalue,*startaddress);
+ startaddress++;
+ }
+ return returnvalue;
+}
+
+/** \brief Generate the Random value
+ *
+ * This function generates the random value by taking a valid seed and limits.
+ *
+ * \param a lower limit.
+ * \param x valid seed value.
+ * \param m upper limit.
+ *
+ * \return Returns the random value.
+ *
+ */
+asm volatile uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
+{
+% reg a,x,m; lab cmp_m, sub_m, done;
+! "%d4","%d5","%d6","%d0","%d1","%d2"
+ mul.u %e4,a,x /* d5 = Eh; d4 = El */
+ mov %d0,%d4 /* e0 = El */
+ mov %d1, 0
+ madd.u %e4,%e0,%d5,5 /* e4 = El + 5 * d5 */
+cmp_m:
+ jge.u %d4,m,sub_m
+ jz %d5,done
+sub_m:
+ subx %d4,%d4,m /* e4=e4-m */
+ subc %d5,%d5,%d1 /* d5=d5-0 */
+ loopu cmp_m
+done:
+ mov %d2,%d4
+}
+
+/* Macros for backward compatibility of the intrinsics*/
+/******************************************************************************/
+#ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
+#ifndef __non_return_call
+#define __non_return_call Ifx__non_return_call
+#endif
+
+#ifndef __jump_and_link
+#define __jump_and_link Ifx__jump_and_link
+#endif
+
+#ifndef __moveToDataParam0
+#define __moveToDataParam0 Ifx__moveToDataParam0
+#endif
+
+#ifndef __moveToDataParamRet
+#define __moveToDataParamRet Ifx__moveToDataParamRet
+#endif
+
+#ifndef __getDataParamRet
+#define __getDataParamRet Ifx__getDataParamRet
+#endif
+
+#ifndef __moveToAddrParam0
+#define __moveToAddrParam0 Ifx__moveToAddrParam0
+#endif
+
+#ifndef __jumpToFunction
+#define __jumpToFunction Ifx__jumpToFunction
+#endif
+
+#ifndef __jumpToFunctionWithLink
+#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
+#endif
+
+#ifndef __jumpBackToLink
+#define __jumpBackToLink Ifx__jumpBackToLink
+#endif
+
+#ifndef __minX
+#define __minX Ifx__minX
+#endif
+
+#ifndef __maxX
+#define __maxX Ifx__maxX
+#endif
+
+#ifndef __saturateX
+#define __saturateX Ifx__saturateX
+#endif
+
+#ifndef __checkrangeX
+#define __checkrangeX Ifx__checkrangeX
+#endif
+
+#ifndef __saturate
+#define __saturate Ifx__saturate
+#endif
+
+#ifndef __sqrf
+#define __sqrf Ifx__sqrf
+#endif
+
+#ifndef __sqrtf
+#define __sqrtf Ifx__sqrtf
+#endif
+
+#ifndef __checkrange
+#define __checkrange Ifx__checkrange
+#endif
+
+#ifndef __roundf
+#define __roundf Ifx__roundf
+#endif
+
+#ifndef __absf
+#define __absf Ifx__absf
+#endif
+
+#ifndef __minf
+#define __minf Ifx__minf
+#endif
+
+#ifndef __maxf
+#define __maxf Ifx__maxf
+#endif
+
+#ifndef __saturatef
+#define __saturatef Ifx__saturatef
+#endif
+
+#ifndef __checkrangef
+#define __checkrangef Ifx__checkrangef
+#endif
+
+#ifndef __abs_stdreal
+#define __abs_stdreal Ifx__abs_stdreal
+#endif
+
+#ifndef __min_stdreal
+#define __min_stdreal Ifx__min_stdreal
+#endif
+
+#ifndef __max_stdreal
+#define __max_stdreal Ifx__max_stdreal
+#endif
+
+#ifndef __saturate_stdreal
+#define __saturate_stdreal Ifx__saturate_stdreal
+#endif
+
+#ifndef __neqf
+#define __neqf Ifx__neqf
+#endif
+
+#ifndef __leqf
+#define __leqf Ifx__leqf
+#endif
+
+#ifndef __geqf
+#define __geqf Ifx__geqf
+#endif
+
+#ifndef __clssf
+#define __clssf Ifx__clssf
+#endif
+
+#ifndef __float_to_fract
+#define __float_to_fract Ifx__float_to_fract
+#endif
+
+#ifndef __fract_to_float
+#define __fract_to_float Ifx__fract_to_float
+#endif
+
+#ifndef __getfract
+#define __getfract Ifx__getfract
+#endif
+
+#ifndef __mac_r_sf
+#define __mac_r_sf Ifx__mac_r_sf
+#endif
+
+#ifndef __mac_sf
+#define __mac_sf Ifx__mac_sf
+#endif
+
+#ifndef __mulfractfract
+#define __mulfractfract Ifx__mulfractfract
+#endif
+
+#ifndef __mulfractlong
+#define __mulfractlong Ifx__mulfractlong
+#endif
+
+#ifndef __round16
+#define __round16 Ifx__round16
+#endif
+
+#ifndef __fract_to_sfract
+#define __fract_to_sfract Ifx__fract_to_sfract
+#endif
+
+#ifndef __round16
+#define __round16 Ifx__round16
+#endif
+
+#ifndef __s16_to_sfract
+#define __s16_to_sfract Ifx__s16_to_sfract
+#endif
+
+#ifndef __sfract_to_s16
+#define __sfract_to_s16 Ifx__sfract_to_s16
+#endif
+
+#ifndef __sfract_to_u16
+#define __sfract_to_u16 Ifx__sfract_to_u16
+#endif
+
+#ifndef __shaaccum
+#define __shaaccum Ifx__shaaccum
+#endif
+
+#ifndef __shafracts
+#define __shafracts Ifx__shafracts
+#endif
+
+#ifndef __shasfracts
+#define __shasfracts Ifx__shasfracts
+#endif
+
+#ifndef __u16_to_sfract
+#define __u16_to_sfract Ifx__u16_to_sfract
+#endif
+
+#ifndef __getbit
+#define __getbit Ifx__getbit
+#endif
+
+#ifndef __imaskldmst
+#define __imaskldmst Ifx__imaskldmst
+#endif
+
+#ifndef __putbit
+#define __putbit Ifx__putbit
+#endif
+
+#ifndef __cacheawi_bo_post_inc
+#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
+#endif
+
+#ifndef __cacheiwi
+#define __cacheiwi Ifx__cacheiwi
+#endif
+
+#ifndef __mulsc
+#define __mulsc Ifx__mulsc
+#endif
+
+#ifndef __rol
+#define __rol Ifx__rol
+#endif
+
+#ifndef __ror
+#define __ror Ifx__ror
+#endif
+
+#ifndef __absb
+#define __absb Ifx__absb
+#endif
+
+#ifndef __absh
+#define __absh Ifx__absh
+#endif
+
+#ifndef __abssh
+#define __abssh Ifx__abssh
+#endif
+
+#ifndef __extractbyte1
+#define __extractbyte1 Ifx__extractbyte1
+#endif
+
+#ifndef __extractbyte2
+#define __extractbyte2 Ifx__extractbyte2
+#endif
+
+#ifndef __extractbyte3
+#define __extractbyte3 Ifx__extractbyte3
+#endif
+
+#ifndef __extractbyte4
+#define __extractbyte4 Ifx__extractbyte4
+#endif
+
+#ifndef __extracthw1
+#define __extracthw1 Ifx__extracthw1
+#endif
+
+#ifndef __extracthw2
+#define __extracthw2 Ifx__extracthw2
+#endif
+
+#ifndef __extractubyte1
+#define __extractubyte1 Ifx__extractubyte1
+#endif
+
+#ifndef __extractubyte2
+#define __extractubyte2 Ifx__extractubyte2
+#endif
+
+#ifndef __extractubyte3
+#define __extractubyte3 Ifx__extractubyte3
+#endif
+
+#ifndef __extractubyte4
+#define __extractubyte4 Ifx__extractubyte4
+#endif
+
+#ifndef __extractuhw1
+#define __extractuhw1 Ifx__extractuhw1
+#endif
+
+#ifndef __extractuhw2
+#define __extractuhw2 Ifx__extractuhw2
+#endif
+
+#ifndef __getbyte1
+#define __getbyte1 Ifx__getbyte1
+#endif
+
+#ifndef __getbyte2
+#define __getbyte2 Ifx__getbyte2
+#endif
+
+#ifndef __getbyte3
+#define __getbyte3 Ifx__getbyte3
+#endif
+
+#ifndef __getbyte4
+#define __getbyte4 Ifx__getbyte4
+#endif
+
+#ifndef __gethw1
+#define __gethw1 Ifx__gethw1
+#endif
+
+#ifndef __gethw2
+#define __gethw2 Ifx__gethw2
+#endif
+
+#ifndef __getubyte1
+#define __getubyte1 Ifx__getubyte1
+#endif
+
+#ifndef __getubyte2
+#define __getubyte2 Ifx__getubyte2
+#endif
+
+#ifndef __getubyte3
+#define __getubyte3 Ifx__getubyte3
+#endif
+
+#ifndef __getubyte4
+#define __getubyte4 Ifx__getubyte4
+#endif
+
+#ifndef __getuhw1
+#define __getuhw1 Ifx__getuhw1
+#endif
+
+#ifndef __getuhw2
+#define __getuhw2 Ifx__getuhw2
+#endif
+
+#ifndef __initpackb
+#define __initpackb Ifx__initpackb
+#endif
+
+#ifndef __initpackbl
+#define __initpackbl Ifx__initpackbl
+#endif
+
+#ifndef __initpackhw
+#define __initpackhw Ifx__initpackhw
+#endif
+
+#ifndef __initpackhwl
+#define __initpackhwl Ifx__initpackhwl
+#endif
+
+#ifndef __initupackb
+#define __initupackb Ifx__initupackb
+#endif
+
+#ifndef __initupackhw
+#define __initupackhw Ifx__initupackhw
+#endif
+
+#ifndef __insertbyte1
+#define __insertbyte1 Ifx__insertbyte1
+#endif
+
+#ifndef __insertbyte2
+#define __insertbyte2 Ifx__insertbyte2
+#endif
+
+#ifndef __insertbyte3
+#define __insertbyte3 Ifx__insertbyte3
+#endif
+
+#ifndef __insertbyte4
+#define __insertbyte4 Ifx__insertbyte4
+#endif
+
+#ifndef __inserthw1
+#define __inserthw1 Ifx__inserthw1
+#endif
+
+#ifndef __inserthw2
+#define __inserthw2 Ifx__inserthw2
+#endif
+
+#ifndef __insertubyte1
+#define __insertubyte1 Ifx__insertubyte1
+#endif
+
+#ifndef __insertubyte2
+#define __insertubyte2 Ifx__insertubyte2
+#endif
+
+#ifndef __insertubyte3
+#define __insertubyte3 Ifx__insertubyte3
+#endif
+
+#ifndef __insertubyte4
+#define __insertubyte4 Ifx__insertubyte4
+#endif
+
+#ifndef __insertuhw1
+#define __insertuhw1 Ifx__insertuhw1
+#endif
+
+#ifndef __insertuhw2
+#define __insertuhw2 Ifx__insertuhw2
+#endif
+
+#ifndef __minb
+#define __minb Ifx__minb
+#endif
+
+#ifndef __minbu
+#define __minbu Ifx__minbu
+#endif
+
+#ifndef __minh
+#define __minh Ifx__minh
+#endif
+
+#ifndef __minhu
+#define __minhu Ifx__minhu
+#endif
+
+#ifndef __setbyte1
+#define __setbyte1 Ifx__setbyte1
+#endif
+
+#ifndef __setbyte2
+#define __setbyte2 Ifx__setbyte2
+#endif
+
+#ifndef __setbyte3
+#define __setbyte3 Ifx__setbyte3
+#endif
+
+#ifndef __setbyte4
+#define __setbyte4 Ifx__setbyte4
+#endif
+
+#ifndef __sethw1
+#define __sethw1 Ifx__sethw1
+#endif
+
+#ifndef __sethw2
+#define __sethw2 Ifx__sethw2
+#endif
+
+#ifndef __setubyte1
+#define __setubyte1 Ifx__setubyte1
+#endif
+
+#ifndef __setubyte2
+#define __setubyte2 Ifx__setubyte2
+#endif
+
+#ifndef __setubyte3
+#define __setubyte3 Ifx__setubyte3
+#endif
+
+#ifndef __setubyte4
+#define __setubyte4 Ifx__setubyte4
+#endif
+
+#ifndef __setuhw1
+#define __setuhw1 Ifx__setuhw1
+#endif
+
+#ifndef __setuhw2
+#define __setuhw2 Ifx__setuhw2
+#endif
+
+#ifndef __fabs
+#define __fabs Ifx__fabs
+#endif
+
+#ifndef __fabsf
+#define __fabsf Ifx__fabsf
+#endif
+
+#ifndef __parity
+#define __parity Ifx__parity
+#endif
+
+#ifndef __satb
+#define __satb Ifx__satb
+#endif
+
+#ifndef __satbu
+#define __satbu Ifx__satbu
+#endif
+
+#ifndef __sath
+#define __sath Ifx__sath
+#endif
+
+#ifndef __sathu
+#define __sathu Ifx__sathu
+#endif
+
+#ifndef __addsu
+#define __addsu Ifx__addsu
+#endif
+
+#ifndef __subs
+#define __subs Ifx__subs
+#endif
+
+#ifndef __subsu
+#define __subsu Ifx__subsu
+#endif
+
+#ifndef __ldmst
+#define __ldmst Ifx__ldmst
+#endif
+
+#ifndef __mem_barrier
+#define __mem_barrier Ifx__mem_barrier
+#endif
+
+#if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
+#define NOP Ifx__NOP
+#endif
+
+#ifndef __nops
+#define __nops Ifx__nops
+#endif
+
+#ifndef __nops1000
+#define __nops1000 Ifx__nops1000
+#endif
+
+#ifndef __swap
+#define __swap Ifx__swap
+#endif
+
+#ifndef __cmpAndSwap
+#define __cmpAndSwap Ifx__cmpAndSwap
+#endif
+
+#ifndef __setareg
+#define __setareg Ifx__setareg
+#endif
+
+#ifndef __stopPerfCounters
+#define __stopPerfCounters Ifx__stopPerfCounters
+#endif
+
+#ifndef __fixpoint_to_float32
+#define __fixpoint_to_float32 Ifx__fixpoint_to_float32
+#endif
+
+#ifndef __getA11
+#define __getA11 Ifx__getA11
+#endif
+
+#ifndef __setStackPointer
+#define __setStackPointer Ifx__setStackPointer
+#endif
+
+#if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
+#define __crc32 Ifx__crc32
+#endif
+
+#endif
+/******************************************************************************/
+/* *INDENT-ON* */
+/******************************************************************************/
+#endif /* IFXCPU_INTRINSICSDCC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsGhs.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsGhs.h
new file mode 100644
index 0000000..e94ce20
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsGhs.h
@@ -0,0 +1,1708 @@
+/**
+ * \file IfxCpu_IntrinsicsGhs.h
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cpu_Intrinsics_Ghs Intrinsics for GNU compiler
+ * \ingroup IfxLld_Cpu_Intrinsics
+ *
+ */
+
+#ifndef IFXCPU_INTRINSICSGHS_H
+#define IFXCPU_INTRINSICSGHS_H
+
+/******************************************************************************/
+#include "Ifx_Types.h"
+#include
+
+/******************************************************************************/
+/* *INDENT-OFF* */
+#define STRINGIFY(x) #x
+
+typedef void (*voidfunc)();
+
+/** Function call without return
+ */
+#define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
+
+/** Jump and link
+ */
+IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
+{
+ __asm__ volatile ("jli %0"::"a"(fun));
+}
+
+IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
+{
+ __asm__ volatile ("mov\t d4, %0"::"d"(var));
+}
+
+IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
+{
+ __asm__ volatile ("mov\t d2, %0"::"d"(var));
+}
+
+IFX_INLINE unsigned int Ifx__getDataParamRet(void)
+{
+ unsigned int var;
+ __asm__ volatile (" mov\t %0, d2":"=d"(var));
+ return var;
+}
+
+IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
+{
+ __asm__ volatile ("mov.aa\t a4, %0"::"a"(var));
+}
+
+IFX_INLINE void Ifx__jumpToFunction(void (*fun)(void))
+{
+ Ifx__non_return_call(fun);
+}
+
+IFX_INLINE void Ifx__jumpToFunctionWithLink(void (*fun)(void))
+{
+ Ifx__jump_and_link(fun);
+}
+
+IFX_INLINE void Ifx__jumpBackToLink(void)
+{
+ __asm__ volatile ("ji a11");
+}
+
+/** Insert a memory barrier
+ */
+#define Ifx__mem_barrier __asm__ volatile("":::"memory");
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghs_any_type Cross type arithmetic operation
+ *
+ * Macro compatible with float, fix point, signed integer and unsigned integer
+ *
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+#define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
+#define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghs_singed_integer Signed integer operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+#define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghs_unsinged_integer Unsigned integer operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+#define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
+/** \} */
+
+/** \defgroup intrinsicsghs_float Floating point operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+
+#define Ifx__sqrf(X) ((X) * (X))
+#define Ifx__sqrtf(X) sqrtf(X)
+#define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+#define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
+#define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
+#define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
+#define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+#define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
+#define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
+
+#define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
+#define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
+#define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghsfractional Fractional Arithmetic Support
+ The next table provides an overview of intrinsic functions to convert fractional values. Note that the
+ TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
+ need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
+ compiler does support these functions.
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+
+/** Count the consecutive number of bits that have the same value as bit 15 of an sfract
+ */
+IFX_INLINE sint16 Ifx__clssf(sfract a)
+{
+ sint16 res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ cls %0,%1":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Convert fract to float
+ */
+IFX_INLINE float Ifx__fract_to_float(fract a)
+{
+ float res;
+ __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
+ return res;
+}
+
+/** Convert float to fract
+ */
+IFX_INLINE fract Ifx__float_to_fract(float a)
+{
+ fract res;
+ __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
+ return res;
+}
+
+/** Convert laccum to fract
+ */
+IFX_INLINE fract Ifx__getfract(laccum a)
+{
+ fract res;
+ __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
+ return res;
+}
+
+/** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
+ */
+IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
+{
+ sfract res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ maddrs.q %0,%1,%2L,%3L,1 \n\
+ sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
+ return res;
+}
+
+/** Multiply-add sfract. Returns ( a + b * c )
+ */
+IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
+{
+ sfract res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ madds.q %0,%1,%2L,%3L,1 \n\
+ sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
+ return res;
+}
+
+/** Integer part of the multiplication of a fract and a fract
+ */
+IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
+{
+ long res;
+ __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Integer part of the multiplication of a fract and a long
+ */
+IFX_INLINE long Ifx__mulfractlong(fract a, long b)
+{
+ long res;
+ __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Convert fract to sfract
+ */
+IFX_INLINE sfract Ifx__round16(fract a)
+{
+ sfract res;
+ __asm__ volatile ("mov.u %0,0x8000 \n\
+ adds %0,%1 \n\
+ extr %0,%0,0x10,0x10 "
+ :"=&d"(res):"d"(a):"memory");
+ return res;
+}
+
+#define Ifx__fract_to_sfract Ifx__round16
+
+/** Convert float to sfract
+ */
+IFX_INLINE sfract Ifx__float_to_sfract(float a)
+{
+ fract tmp = Ifx__float_to_fract(a);
+ return Ifx__fract_to_sfract(tmp);
+}
+
+/** Convert signed sint16 to sfract
+ */
+IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
+{
+ sfract res;
+ __asm__ volatile ("sh %0,%1,16 \n\
+ sh %0,%0,-16":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Convert sfract to sint16
+ */
+IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
+{
+ sint16 res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ sh %0,%1,-16":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Convert sfract to uint16
+ */
+IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
+{
+ uint16 res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ sh %0,%1,-16":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Left/right shift of an __laccum
+ */
+__asm__ laccum Ifx__shaaccum(laccum a, sint32 b)
+{
+% lab L0, L1; reg a, b
+! "%d2", "%d3"
+ jge b, 0, L0
+ sha %d3, a!L, b
+ rsub b, b, 0
+ dextr %d2, a!H, a!L, b
+ j L1
+L0:
+ dextr %d2, a!H, a!L, b
+ sha %d2, a!L, b
+L1:
+}
+
+/** Left/right shift of an fract
+ */
+IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
+{
+ fract res;
+ __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Left/right shift of an sfract
+ */
+IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
+{
+ sfract res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ shas %0,%1,%2 \n\
+ sh %0,%0,-16":"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Convert uint16 to sfract
+ */
+IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
+{
+ sfract res;
+ __asm__ volatile ("sh %0,%1,16 \n\
+ sh %0,%0,-16":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghsinsert Insert / Extract Bit-fields and Bits
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+
+/** Extract a bit-field (bit pos to bit pos+width) from value
+ */
+IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
+{
+ sint32 res;
+ __asm__ volatile ("mov d14,%2 \n\
+ mov d15,%3 \n\
+ extr %0,%1,e14"
+ : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
+ return res;
+}
+
+/** Same as __extr() but return bit-field as unsigned integer
+ */
+IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
+{
+ uint32 res;
+ __asm__ volatile ("mov d14,%2 \n\
+ mov d15,%3 \n\
+ extr.u %0,%1,e14"\
+ : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
+ return res;
+}
+
+/** Load a single bit.
+ */
+//#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
+#define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
+
+/** Atomic load-modify-store.
+ */
+#define Ifx__imaskldmst(address, value, bitoffset, bits) __imaskldmst((int *)address, value, bitoffset, bits)
+
+/** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
+ */
+IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
+{
+ sint32 res;
+ __asm__ volatile ("mov d14,%3 \n\
+ mov d15,%4 \n\
+ insert %0,%1,%2,e14"
+ :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
+ return res;
+}
+
+/** Store a single bit.
+ */
+#define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghsinterrupt_handling Interrupt Handling
+ The next table provides an overview of the intrinsic functions to read or set interrupt handling.
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghsmiscellaneous Miscellaneous Intrinsic Functions
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+
+/** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
+ */
+IFX_INLINE void Ifx__cacheawi(uint8* p)
+{
+ __asm__ volatile("cachea.wi [%0]0"::"a"(p));
+}
+/** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
+ */
+IFX_INLINE void Ifx__cacheiwi(uint8* p)
+{
+ __asm__ volatile("cachei.wi [%0]0"::"a"(p));
+}
+
+/** Write back and invalidate cache address \"p\" and return post incremented
+ * value of \"p\". Generates CACHEA.WI [Ab+].
+ */
+IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
+{
+ __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
+ return p;
+}
+
+/** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
+ * back the result to 32 bits. To scale back the result, 32 bits are extracted
+ * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
+ */
+IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
+{
+ sint32 res;
+ __asm__ volatile("mul e12,%1,%2 \n\
+ dextr %0,d13,d12,%3"
+ :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
+ return res;
+}
+
+/** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
+ */
+IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
+{
+ uint32 res;
+ __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
+ return res;
+}
+
+/** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
+ */
+IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
+{
+ uint32 res;
+ __asm__ volatile("rsub %2,%2,0 \n\
+ dextr %0,%1,%1,%2"
+ :"=d"(res):"d"(operand), "d"(count):"memory");
+ return res;
+}
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghspacked Packed Data Type Support
+ The next table provides an overview of the intrinsic functions for initialization of packed data type.
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+
+/** Extract first byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
+{
+ sint8 res;
+ __asm__ volatile ("extr %0,%1,0,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract second byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
+{
+ sint8 res;
+ __asm__ volatile ("extr %0,%1,8,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract third byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
+{
+ sint8 res;
+ __asm__ volatile ("extr %0,%1,16,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract fourth byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
+{
+ sint8 res;
+ __asm__ volatile ("extr %0,%1,24,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first sint16 from a __packhw
+ */
+IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
+{
+ sint16 res;
+ __asm__ volatile ("extr %0,%1,0,16"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract second sint16 from a __packhw
+ */
+IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
+{
+ sint16 res;
+ __asm__ volatile ("extr %0,%1,16,16"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
+{
+ uint8 res;
+ __asm__ volatile ("extr %0,%1,0,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract second uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
+{
+ uint8 res;
+ __asm__ volatile ("extr %0,%1,8,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract third uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
+{
+ uint8 res;
+ __asm__ volatile ("extr %0,%1,16,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract fourth uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
+{
+ uint8 res;
+ __asm__ volatile ("extr %0,%1,24,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first uint16 from a __packhw
+ */
+IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
+{
+ uint16 res;
+ __asm__ volatile ("extr %0,%1,0,16"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract second uint16 from a __packhw
+ */
+IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
+{
+ uint16 res;
+ __asm__ volatile ("extr %0,%1,16,16"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
+{
+ sint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,0,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+
+}
+
+/** Extract second byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
+{
+ sint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,8,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+
+}
+
+/** Extract third byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
+{
+ sint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,16,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+
+}
+
+/** Extract fourth byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
+{
+ sint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,24,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+
+}
+
+/** Extract first sint16 from a __packhw
+ */
+IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
+{
+ sint16 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,0,16"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+/** Extract second sint16 from a __packhw
+ */
+IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
+{
+ sint16 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,16,16"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract first uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
+{
+ uint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,0,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract second uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
+{
+ uint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,8,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract third uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
+{
+ uint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,16,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract fourth uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
+{
+ uint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,24,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract first uint16 from a __packhw
+ */
+IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
+{
+ uint16 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,0,16"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract second uint16 from a __packhw
+ */
+IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
+{
+ uint16 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,16,16"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Initialize __packb with four integers
+ */
+IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
+{
+ __packb res;
+ __asm__ volatile ("insert %3,%3,%4,8,8 \n\
+ insert %4,%1,%2,8,8 \n\
+ insert %0,%4,%3,16,16 "
+ :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
+ return res;
+}
+
+/** Initialize __packb with a long integer
+ */
+IFX_INLINE __packb Ifx__initpackbl(long a)
+{
+ return (__packb) a;
+}
+
+/** Initialize __packhw with two integers
+ */
+IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
+{
+ __packhw res;
+ __asm__ volatile ("insert %0,%1,%2,16,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Initialize __packhw with a long integer
+ */
+IFX_INLINE __packhw Ifx__initpackhwl(long a)
+{
+ return a;
+}
+
+/** Initialize __packb with four unsigned integers
+ */
+IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
+{
+ __upackb res;
+ __asm__ volatile ("insert %3,%3,%4,8,8 \n\
+ insert %1,%1,%2,8,8 \n\
+ insert %0,%1,%3,16,16"
+ :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
+ return res;
+}
+
+/** Initialize __packhw with two unsigned integers
+ */
+IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
+{
+ __upackhw res;
+ __asm__ volatile ("insert %0,%1,%2,16,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into first byte of a __packb
+ */
+IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
+{
+ __packb res;
+ __asm__ volatile ("insert %0,%1,%2,0,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into second byte of a __packb
+ */
+IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
+{
+ __packb res;
+ __asm__ volatile ("insert %0,%1,%2,8,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into third byte of a __packb
+ */
+IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
+{
+ __packb res;
+ __asm__ volatile ("insert %0,%1,%2,16,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into fourth byte of a __packb
+ */
+IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
+{
+ __packb res;
+ __asm__ volatile ("insert %0,%1,%2,24,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into first uint8 of a __packb
+ */
+IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
+{
+ __upackb res;
+ __asm__ volatile ("insert %0,%1,%2,0,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into second uint8 of a __packb
+ */
+IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
+{
+ __upackb res;
+ __asm__ volatile ("insert %0,%1,%2,8,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into third uint8 of a __packb
+ */
+IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
+{
+ __upackb res;
+ __asm__ volatile ("insert %0,%1,%2,16,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into fourth uint8 of a __packb
+ */
+IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
+{
+ __upackb res;
+ __asm__ volatile ("insert %0,%1,%2,24,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint16 into first halfword of a __packhw
+ */
+IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
+{
+ __packhw res;
+ __asm__ volatile ("insert %0,%1,%2,0,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint16 into second halfword of a __packhw
+ */
+IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
+{
+ __packhw res;
+ __asm__ volatile ("insert %0,%1,%2,16,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert uint16 into first halfword of a __upackhw
+ */
+IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
+{
+ __upackhw res;
+ __asm__ volatile ("insert %0,%1,%2,0,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert uint16 into second halfword of a __upackhw
+ */
+IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
+{
+ __upackhw res;
+ __asm__ volatile ("insert %0,%1,%2,16,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into first byte of a __packb
+ */
+IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,0,8 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint8 into second byte of a __packb
+ */
+IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,8,8 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint8 into third byte of a __packb
+ */
+IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,16,8 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint8 into fourth byte of a __packb
+ */
+IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,24,8 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint16 into first halfword of a __packhw
+ */
+IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,0,16 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint16 into second halfword of a __packhw
+ */
+IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,16,16 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint8 into first byte of a __upackb
+ */
+IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,0,8 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint8 into second byte of a __upackb
+ */
+IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,8,8 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint8 into third byte of a __upackb
+ */
+IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,16,8 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint8 into fourth byte of a __upackb
+ */
+IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,24,8 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint16 into first halfword of a __upackhw
+ */
+IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,0,16 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint16 into second halfword of a __upackhw
+ */
+IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
+{
+ __asm__ volatile ("ld.w d15,[%0] \n\
+ insert d15,d15,%1,16,16 \n\
+ st.w [%0],d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Ghssingle_assembly Insert Single Assembly Instruction
+ The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
+ instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
+ assembly instructions.
+ * \ingroup IfxLld_Cpu_Intrinsics_Ghs
+ * \{
+ */
+
+/** Insert LDMST instruction. Note that all operands must be word-aligned.
+ */
+IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
+{
+ __asm__ volatile("ldmst [%0]0,%1"
+ ::"a"(address), "e"((long long)mask<<32 | value));
+}
+
+/** Insert a loop over cnt NOP instruction
+ */
+IFX_INLINE void Ifx__nops(void* cnt)
+{
+ __asm__ volatile ("0: nop \n\
+ loop %0,0b"
+ ::"a"(((sint8*)cnt)-1));
+}
+
+/** Insert SWAP instruction. Note that all operands must be word-aligned.
+ */
+IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
+{
+ uint32 res;
+ __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
+ return res;
+}
+
+/** Insert n NOP instruction
+ */
+#define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
+
+/** \} */
+
+/* FIXME use inline instead of #define */
+/*#define __extru(src,start,size) \
+ ({ sint32 res; asm volatile (" extr.u\t %0,%1,%2,%3" : "=d" (res) : \
+ "d" (src),"i" (start),"i" (size) : "memory"); res; })*/
+
+/* FIXME use inline instead of #define */
+#define Ifx__setareg(areg,val) \
+ { uint32 reg_val= (uint32)val; \
+ asm volatile (" mov.a\t %"#areg",%0"::"d"(reg_val)); }
+
+/**__mtcr (CPU_CCTRL, 0);
+*/
+IFX_INLINE void Ifx__stopPerfCounters(void)
+{
+ __asm__ volatile("mov d0,0\n\
+ mtcr 0xFC00,d0\n\
+ isync\n"
+ : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
+}
+
+/** \brief This function is a implementation of a binary semaphore using compare and swap instruction
+ * \param address address of resource.
+ * \param value This variable is updated with status of address
+ * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
+ *
+ */
+IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
+ unsigned int value, unsigned int condition)
+{
+ unsigned long long reg64
+ = value | (unsigned long long) condition << 32;
+
+ __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
+ : [reg] "+d" (reg64)
+ : [addr] "a" (address)
+ : "memory");
+ return reg64;
+}
+
+/** \brief Convert a fixpoint value to float32
+ *
+ * This function converts a value from a fixpoint format to a float32 format.
+ *
+ *
+ * \param value value to be converted.
+ * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
+ *
+ * \return Returns the converted value in the float32 format.
+ *
+ */
+IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
+{
+ float32 result;
+
+ __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
+ return result;
+}
+
+IFX_INLINE void* Ifx__getA11(void)
+{
+ uint32 *res;
+ __asm__ volatile ("mov.aa %0, a11": "=a" (res) : :"a11");
+ return res;
+}
+
+IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
+{
+ __asm__ volatile ("mov.aa a10, %0": : "a" (stackAddr));
+}
+
+IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
+{
+ uint32 returnvalue = 0; /* set seed value to 0 */
+ for (;length > 0; length--)
+ {
+ /* calculate the CRC over all data */
+ __asm__ ("CRC32 %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
+ startaddress++;
+ }
+ return returnvalue;
+}
+
+IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
+{
+ uint32 result;
+ __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
+ " mov %%d12,%%d14 # e12 = El \n"
+ " mov %%d13, 0 # \n"
+ " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
+ " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
+ " jz %%d15,done_%= # \n"
+ " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
+ " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
+ " loopu cmp_m_%= # \n"
+ " done_%=: mov %0,%%d14 # \n"
+ : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
+ return result;
+}
+
+/* compiler don't know this instruction
+IFX_INLINE sint32 Ifx__popcnt(sint32 a)
+{
+ sint32 res;
+ __asm__ volatile ("popcnt %0,%1":"=d"(res):"d"(a));
+ return res;
+}*/
+
+/** Invalidate cache address "p". Generates CACHEA.I [Ab].
+*/
+IFX_INLINE void Ifx__cacheai(uint8* p)
+{
+ __asm__ volatile("cachea.i [%0]0"::"a"(p));
+}
+
+/* Macros for backward compatibility of the intrinsics*/
+/******************************************************************************/
+#ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
+#ifndef __non_return_call
+#define __non_return_call Ifx__non_return_call
+#endif
+
+#ifndef __jump_and_link
+#define __jump_and_link Ifx__jump_and_link
+#endif
+
+#ifndef __moveToDataParam0
+#define __moveToDataParam0 Ifx__moveToDataParam0
+#endif
+
+#ifndef __moveToDataParamRet
+#define __moveToDataParamRet Ifx__moveToDataParamRet
+#endif
+
+#ifndef __getDataParamRet
+#define __getDataParamRet Ifx__getDataParamRet
+#endif
+
+#ifndef __moveToAddrParam0
+#define __moveToAddrParam0 Ifx__moveToAddrParam0
+#endif
+
+#ifndef __jumpToFunction
+#define __jumpToFunction Ifx__jumpToFunction
+#endif
+
+#ifndef __jumpToFunctionWithLink
+#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
+#endif
+
+#ifndef __jumpBackToLink
+#define __jumpBackToLink Ifx__jumpBackToLink
+#endif
+
+#ifndef __mem_barrier
+#define __mem_barrier Ifx__mem_barrier
+#endif
+
+#ifndef __minX
+#define __minX Ifx__minX
+#endif
+
+#ifndef __maxX
+#define __maxX Ifx__maxX
+#endif
+
+#ifndef __saturateX
+#define __saturateX Ifx__saturateX
+#endif
+
+#ifndef __checkrangeX
+#define __checkrangeX Ifx__checkrangeX
+#endif
+
+#ifndef __saturate
+#define __saturate Ifx__saturate
+#endif
+
+#ifndef __saturateu
+#define __saturateu Ifx__saturateu
+#endif
+
+#ifndef __sqrf
+#define __sqrf Ifx__sqrf
+#endif
+
+#ifndef __sqrtf
+#define __sqrtf Ifx__sqrtf
+#endif
+
+#ifndef __checkrange
+#define __checkrange Ifx__checkrange
+#endif
+
+#ifndef __roundf
+#define __roundf Ifx__roundf
+#endif
+
+#ifndef __absf
+#define __absf Ifx__absf
+#endif
+
+#ifndef __minf
+#define __minf Ifx__minf
+#endif
+
+#ifndef __maxf
+#define __maxf Ifx__maxf
+#endif
+
+#ifndef __saturatef
+#define __saturatef Ifx__saturatef
+#endif
+
+#ifndef __checkrangef
+#define __checkrangef Ifx__checkrangef
+#endif
+
+#ifndef __abs_stdreal
+#define __abs_stdreal Ifx__abs_stdreal
+#endif
+
+#ifndef __min_stdreal
+#define __min_stdreal Ifx__min_stdreal
+#endif
+
+#ifndef __max_stdreal
+#define __max_stdreal Ifx__max_stdreal
+#endif
+
+#ifndef __saturate_stdreal
+#define __saturate_stdreal Ifx__saturate_stdreal
+#endif
+
+#ifndef __neqf
+#define __neqf Ifx__neqf
+#endif
+
+#ifndef __leqf
+#define __leqf Ifx__leqf
+#endif
+
+#ifndef __geqf
+#define __geqf Ifx__geqf
+#endif
+
+#ifndef __clssf
+#define __clssf Ifx__clssf
+#endif
+
+#ifndef __fract_to_float
+#define __fract_to_float Ifx__fract_to_float
+#endif
+
+#ifndef __float_to_fract
+#define __float_to_fract Ifx__float_to_fract
+#endif
+
+#ifndef __getfract
+#define __getfract Ifx__getfract
+#endif
+
+#ifndef __mac_r_sf
+#define __mac_r_sf Ifx__mac_r_sf
+#endif
+
+#ifndef __mac_sf
+#define __mac_sf Ifx__mac_sf
+#endif
+
+#ifndef __mulfractfract
+#define __mulfractfract Ifx__mulfractfract
+#endif
+
+#ifndef __mulfractlong
+#define __mulfractlong Ifx__mulfractlong
+#endif
+
+#ifndef __round16
+#define __round16 Ifx__round16
+#endif
+
+#ifndef __fract_to_sfract
+#define __fract_to_sfract Ifx__fract_to_sfract
+#endif
+
+#ifndef __float_to_sfract
+#define __float_to_sfract Ifx__float_to_sfract
+#endif
+
+#ifndef __s16_to_sfract
+#define __s16_to_sfract Ifx__s16_to_sfract
+#endif
+
+#ifndef __sfract_to_s16
+#define __sfract_to_s16 Ifx__sfract_to_s16
+#endif
+
+#ifndef __sfract_to_u16
+#define __sfract_to_u16 Ifx__sfract_to_u16
+#endif
+
+#ifndef __shaaccum
+#define __shaaccum Ifx__shaaccum
+#endif
+
+#ifndef __shafracts
+#define __shafracts Ifx__shafracts
+#endif
+
+#ifndef __shasfracts
+#define __shasfracts Ifx__shasfracts
+#endif
+
+#ifndef __u16_to_sfract
+#define __u16_to_sfract Ifx__u16_to_sfract
+#endif
+
+#ifndef __extr
+#define __extr Ifx__extr
+#endif
+
+#ifndef __extru
+#define __extru Ifx__extru
+#endif
+
+#ifndef __getbit
+#define __getbit Ifx__getbit
+#endif
+
+#ifndef __insert
+#define __insert Ifx__insert
+#endif
+
+#ifndef __putbit
+#define __putbit Ifx__putbit
+#endif
+
+#ifndef __cacheawi
+#define __cacheawi Ifx__cacheawi
+#endif
+
+#ifndef __cacheiwi
+#define __cacheiwi Ifx__cacheiwi
+#endif
+
+#ifndef __cacheawi_bo_post_inc
+#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
+#endif
+
+#ifndef __mulsc
+#define __mulsc Ifx__mulsc
+#endif
+
+#ifndef __rol
+#define __rol Ifx__rol
+#endif
+
+#ifndef __ror
+#define __ror Ifx__ror
+#endif
+
+#ifndef __extractbyte1
+#define __extractbyte1 Ifx__extractbyte1
+#endif
+
+#ifndef __extractbyte2
+#define __extractbyte2 Ifx__extractbyte2
+#endif
+
+#ifndef __extractbyte3
+#define __extractbyte3 Ifx__extractbyte3
+#endif
+
+#ifndef __extractbyte4
+#define __extractbyte4 Ifx__extractbyte4
+#endif
+
+#ifndef __extracthw1
+#define __extracthw1 Ifx__extracthw1
+#endif
+
+#ifndef __extracthw2
+#define __extracthw2 Ifx__extracthw2
+#endif
+
+#ifndef __extractubyte1
+#define __extractubyte1 Ifx__extractubyte1
+#endif
+
+#ifndef __extractubyte2
+#define __extractubyte2 Ifx__extractubyte2
+#endif
+
+#ifndef __extractubyte3
+#define __extractubyte3 Ifx__extractubyte3
+#endif
+
+#ifndef __extractubyte4
+#define __extractubyte4 Ifx__extractubyte4
+#endif
+
+#ifndef __extractuhw1
+#define __extractuhw1 Ifx__extractuhw1
+#endif
+
+#ifndef __extractuhw2
+#define __extractuhw2 Ifx__extractuhw2
+#endif
+
+#ifndef __getbyte1
+#define __getbyte1 Ifx__getbyte1
+#endif
+
+#ifndef __getbyte2
+#define __getbyte2 Ifx__getbyte2
+#endif
+
+#ifndef __getbyte3
+#define __getbyte3 Ifx__getbyte3
+#endif
+
+#ifndef __getbyte4
+#define __getbyte4 Ifx__getbyte4
+#endif
+
+#ifndef __gethw1
+#define __gethw1 Ifx__gethw1
+#endif
+
+#ifndef __gethw2
+#define __gethw2 Ifx__gethw2
+#endif
+
+#ifndef __getubyte1
+#define __getubyte1 Ifx__getubyte1
+#endif
+
+#ifndef __getubyte2
+#define __getubyte2 Ifx__getubyte2
+#endif
+
+#ifndef __getubyte3
+#define __getubyte3 Ifx__getubyte3
+#endif
+
+#ifndef __getubyte4
+#define __getubyte4 Ifx__getubyte4
+#endif
+
+#ifndef __getuhw1
+#define __getuhw1 Ifx__getuhw1
+#endif
+
+#ifndef __getuhw2
+#define __getuhw2 Ifx__getuhw2
+#endif
+
+#ifndef __initpackb
+#define __initpackb Ifx__initpackb
+#endif
+
+#ifndef __initpackbl
+#define __initpackbl Ifx__initpackbl
+#endif
+
+#ifndef __initpackhw
+#define __initpackhw Ifx__initpackhw
+#endif
+
+#ifndef __initpackhwl
+#define __initpackhwl Ifx__initpackhwl
+#endif
+
+#ifndef __initupackb
+#define __initupackb Ifx__initupackb
+#endif
+
+#ifndef __initupackhw
+#define __initupackhw Ifx__initupackhw
+#endif
+
+#ifndef __insertbyte1
+#define __insertbyte1 Ifx__insertbyte1
+#endif
+
+#ifndef __insertbyte2
+#define __insertbyte2 Ifx__insertbyte2
+#endif
+
+#ifndef __insertbyte3
+#define __insertbyte3 Ifx__insertbyte3
+#endif
+
+#ifndef __insertbyte4
+#define __insertbyte4 Ifx__insertbyte4
+#endif
+
+#ifndef __insertubyte1
+#define __insertubyte1 Ifx__insertubyte1
+#endif
+
+#ifndef __insertubyte2
+#define __insertubyte2 Ifx__insertubyte2
+#endif
+
+#ifndef __insertubyte3
+#define __insertubyte3 Ifx__insertubyte3
+#endif
+
+#ifndef __insertubyte4
+#define __insertubyte4 Ifx__insertubyte4
+#endif
+
+#ifndef __inserthw1
+#define __inserthw1 Ifx__inserthw1
+#endif
+
+#ifndef __inserthw2
+#define __inserthw2 Ifx__inserthw2
+#endif
+
+#ifndef __insertuhw1
+#define __insertuhw1 Ifx__insertuhw1
+#endif
+
+#ifndef __insertuhw2
+#define __insertuhw2 Ifx__insertuhw2
+#endif
+
+#ifndef __setbyte1
+#define __setbyte1 Ifx__setbyte1
+#endif
+
+#ifndef __setbyte2
+#define __setbyte2 Ifx__setbyte2
+#endif
+
+#ifndef __setbyte3
+#define __setbyte3 Ifx__setbyte3
+#endif
+
+#ifndef __setbyte4
+#define __setbyte4 Ifx__setbyte4
+#endif
+
+#ifndef __sethw1
+#define __sethw1 Ifx__sethw1
+#endif
+
+#ifndef __sethw2
+#define __sethw2 Ifx__sethw2
+#endif
+
+#ifndef __setubyte1
+#define __setubyte1 Ifx__setubyte1
+#endif
+
+#ifndef __setubyte2
+#define __setubyte2 Ifx__setubyte2
+#endif
+
+#ifndef __setubyte3
+#define __setubyte3 Ifx__setubyte3
+#endif
+
+#ifndef __setubyte4
+#define __setubyte4 Ifx__setubyte4
+#endif
+
+#ifndef __setuhw1
+#define __setuhw1 Ifx__setuhw1
+#endif
+
+#ifndef __setuhw2
+#define __setuhw2 Ifx__setuhw2
+#endif
+
+#ifndef __ldmst
+#define __ldmst Ifx__ldmst
+#endif
+
+#ifndef __nops
+#define __nops Ifx__nops
+#endif
+
+#ifndef __swap
+#define __swap Ifx__swap
+#endif
+
+#if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
+#define NOP Ifx__NOP
+#endif
+
+#ifndef __setareg
+#define __setareg Ifx__setareg
+#endif
+
+#ifndef __stopPerfCounters
+#define __stopPerfCounters Ifx__stopPerfCounters
+#endif
+
+#ifndef __cmpAndSwap
+#define __cmpAndSwap Ifx__cmpAndSwap
+#endif
+
+#ifndef __fixpoint_to_float32
+#define __fixpoint_to_float32 Ifx__fixpoint_to_float32
+#endif
+
+#ifndef __getA11
+#define __getA11 Ifx__getA11
+#endif
+
+#ifndef __setStackPointer
+#define __setStackPointer Ifx__setStackPointer
+#endif
+
+#ifndef __popcnt
+#define __popcnt Ifx__popcnt
+#endif
+
+#ifndef __cacheai
+#define __cacheai Ifx__cacheai
+#endif
+
+#endif
+/******************************************************************************/
+/* *INDENT-ON* */
+/******************************************************************************/
+#endif /* IFXCPU_INTRINSICSGHS_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsGnuc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsGnuc.h
new file mode 100644
index 0000000..a37540a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsGnuc.h
@@ -0,0 +1,2331 @@
+/**
+ * \file IfxCpu_IntrinsicsGnuc.h
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cpu_Intrinsics_Gnuc Intrinsics for GNU compiler
+ * \ingroup IfxLld_Cpu_Intrinsics
+ *
+ */
+
+#ifndef IFXCPU_INTRINSICSGNUC_H
+#define IFXCPU_INTRINSICSGNUC_H
+
+/* old style intrinsics handling for AGENtiX environment */
+#if defined(SCTB_EMBEDDED)
+# define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 0
+#else
+# define IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS 1
+#endif
+
+/******************************************************************************/
+#include "Ifx_Types.h"
+
+#if IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
+#include "machine/intrinsics.h"
+#endif
+
+/******************************************************************************/
+/* *INDENT-OFF* */
+#define STRINGIFY(x) #x
+
+/** Function call without return
+ */
+#define Ifx__non_return_call(fun) __asm__ volatile ("ji %0"::"a"(fun))
+
+/** Jump and link
+ */
+IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
+{
+ __asm__ volatile ("jli %0"::"a"(fun));
+}
+
+IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
+{
+ __asm__ volatile ("mov\t %%d4, %0"::"d"(var));
+}
+
+IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
+{
+ __asm__ volatile ("mov\t %%d2, %0"::"d"(var));
+}
+
+IFX_INLINE unsigned int Ifx__getDataParamRet(void)
+{
+ unsigned int var;
+ __asm__ volatile (" mov\t %0, %%d2":"=d"(var));
+ return var;
+}
+
+IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
+{
+ __asm__ volatile ("mov.aa\t %%a4, %0"::"a"(var));
+}
+
+IFX_INLINE void Ifx__jumpToFunction(const void *fun)
+{
+ Ifx__non_return_call(fun);
+}
+
+IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
+{
+ Ifx__jump_and_link((void (*)(void))fun);
+}
+
+IFX_INLINE void Ifx__jumpBackToLink(void)
+{
+ __asm__ volatile ("ji %a11");
+}
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_any_type Cross type arithmetic operation
+ *
+ * Macro compatible with float, fix point, signed integer and unsigned integer
+ *
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+#define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
+#define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_singed_integer Signed integer operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+#define Ifx__saturate(X,Min,Max) ( Ifx__min(Ifx__max(X, Min), Max) )
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnuc_unsinged_integer Unsigned integer operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+#define Ifx__saturateu(X,Min,Max) ( Ifx__minu(Ifx__maxu(X, Min), Max) )
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucmin_max Minimum and Maximum of (sint16) Integers
+ These intrinsic functions return the minimum or maximum of a sint16, uint16 or sint16
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+/** Return maximum of two integers
+ */
+IFX_INLINE sint32 Ifx__max(sint32 a, sint32 b)
+{
+ sint32 res;
+ __asm__ volatile ("max %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** Return maximum of two sint16
+ */
+IFX_INLINE sint32 Ifx__maxs(sint16 a, sint16 b)
+{
+ sint32 res;
+ __asm__ volatile ("max.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+/** Return maximum of two unsigned integers
+ */
+IFX_INLINE uint32 Ifx__maxu(uint32 a, uint32 b)
+{
+ uint32 res;
+ __asm__ volatile ("max.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** Return minimum of two integers
+ */
+IFX_INLINE sint32 Ifx__min(sint32 a, sint32 b)
+{
+ sint32 res;
+ __asm__ volatile ("min %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** Return minimum of two sint16
+ */
+IFX_INLINE sint16 Ifx__mins(sint16 a, sint16 b)
+{
+ sint16 res;
+ __asm__ volatile ("min.h %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** Return minimum of two unsigned integers
+ */
+IFX_INLINE uint32 Ifx__minu(uint32 a, uint32 b)
+{
+ uint32 res;
+ __asm__ volatile ("min.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** \} */
+
+/** \defgroup intrinsicsgnuc_float Floating point operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+#define Ifx__sqrf(X) ((X) * (X))
+#define Ifx__sqrtf(X) sqrtf(X)
+#define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+#define Ifx__roundf(X) ((((X) - (sint32)(X)) > 0.5) ? (1 + (sint32)(X)) : ((sint32)(X)))
+#define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
+#define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturatef(X,Min,Max) ( Ifx__minf(Ifx__maxf(X, Min), Max) )
+#define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+#define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
+#define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
+
+#define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
+#define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
+#define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucfractional Fractional Arithmetic Support
+ The next table provides an overview of intrinsic functions to convert fractional values. Note that the
+ TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
+ need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
+ compiler does support these functions.
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+/** Count the consecutive number of bits that have the same value as bit 15 of an sfract
+ */
+IFX_INLINE sint16 Ifx__clssf(sfract a)
+{
+ sint16 res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ cls %0,%1":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Convert fract to float
+ */
+IFX_INLINE float Ifx__fract_to_float(fract a)
+{
+ float res;
+ __asm__ volatile ("q31tof %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
+ return res;
+}
+
+/** Convert float to fract
+ */
+IFX_INLINE fract Ifx__float_to_fract(float a)
+{
+ fract res;
+ __asm__ volatile ("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
+ return res;
+}
+
+/** Convert fract to sfract
+ */
+IFX_INLINE sfract Ifx__fract_to_sfract(fract a)
+{
+ sfract res;
+ __asm__ volatile ("mov.u %0,0x8000 \n\
+ adds %0,%1 \n\
+ extr %0,%0,0x10,0x10 "
+ :"=&d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Convert float to sfract
+ */
+IFX_INLINE sfract Ifx__float_to_sfract(float a)
+{
+ fract tmp = Ifx__float_to_fract(a);
+ return Ifx__fract_to_sfract(tmp);
+}
+
+/** Convert laccum to fract
+ */
+IFX_INLINE fract Ifx__getfract(laccum a)
+{
+ fract res;
+ __asm__ volatile ("dextr %0,%H1,%L1,0x11":"=&d" (res):"d" (a):"memory");
+ return res;
+}
+
+/** Multiply-add with rounding. Returns the rounded result of ( a + b * c )
+ */
+IFX_INLINE sfract Ifx__mac_r_sf(sfract a, sfract b, sfract c)
+{
+ sfract res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ maddrs.q %0,%1,%2L,%3L,1 \n\
+ sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
+ return res;
+}
+
+/** Multiply-add sfract. Returns ( a + b * c )
+ */
+IFX_INLINE sfract Ifx__mac_sf(sfract a, sfract b, sfract c)
+{
+ sfract res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ madds.q %0,%1,%2L,%3L,1 \n\
+ sh %0,%0,-16":"=d"(res):"d"(a), "d"(b), "d"(c):"memory");
+ return res;
+}
+
+/** Integer part of the multiplication of a fract and a fract
+ */
+IFX_INLINE long Ifx__mulfractfract(fract a, fract b)
+{
+ long res;
+ __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Integer part of the multiplication of a fract and a long
+ */
+IFX_INLINE long Ifx__mulfractlong(fract a, long b)
+{
+ long res;
+ __asm__ volatile ("mul.q %0,%1,%2,1":"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Convert fract to sfract
+ */
+IFX_INLINE sfract Ifx__round16(fract a)
+{
+ sfract res;
+ __asm__ volatile ("mov.u %0,0x8000 \n\
+ adds %0,%1 \n\
+ insert %0,%0,0,0,0x10 \n\
+ sh %0,%0,-16"
+ :"=&d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Convert signed sint16 to sfract
+ */
+IFX_INLINE sfract Ifx__s16_to_sfract(sint16 a)
+{
+ sfract res;
+ __asm__ volatile ("sh %0,%1,16 \n\
+ sh %0,%1,-16":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Convert sfract to sint16
+ */
+IFX_INLINE sint16 Ifx__sfract_to_s16(sfract a)
+{
+ sint16 res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ sh %0,%1,-16":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Convert sfract to uint16
+ */
+IFX_INLINE uint16 Ifx__sfract_to_u16(sfract a)
+{
+ uint16 res;
+ __asm__ volatile ("sh %1,%1,16 \n\
+ sh %0,%1,-16":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Left/right shift of an laccum
+ */
+IFX_INLINE laccum Ifx__shaaccum(laccum a, sint32 b)
+{
+ laccum res;
+ __asm__ volatile ("jge %2,0,0f \n\
+ sha %H0,%H1,%2 \n\
+ rsub %2,%2,0 \n\
+ dextr %L0,%H1,%L1,%2 \n\
+ j 1f \n\
+ 0:dextr %H0,%H1,%L1,%2 \n\
+ sha %L0,%L1,%2 \n\
+ 1:"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Left/right shift of an fract
+ */
+IFX_INLINE fract Ifx__shafracts(fract a, sint32 b)
+{
+ fract res;
+ __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Left/right shift of an sfract
+ */
+IFX_INLINE sfract Ifx__shasfracts(sfract a, sint32 b)
+{
+ sfract res;
+ __asm__ volatile ("shas %0,%1,%2":"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Convert uint16 to sfract
+ */
+IFX_INLINE sfract Ifx__u16_to_sfract(uint16 a)
+{
+ sfract res;
+ __asm__ volatile ("sh %0,%1,16 \n\
+ sh %0,%1,-16":"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucinsert Insert / Extract Bit-fields and Bits
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+/** Extract a bit-field (bit pos to bit pos+width) from value
+ */
+IFX_INLINE sint32 Ifx__extr(sint32 a, uint32 p, uint32 w)
+{
+ sint32 res;
+ __asm__ volatile ("mov %%d14,%2 \n\
+ mov %%d15,%3 \n\
+ extr %0,%1,%%e14"
+ : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
+ return res;
+}
+
+/** Same as __extr() but return bit-field as unsigned integer
+ */
+IFX_INLINE uint32 Ifx__extru(uint32 a, uint32 p, uint32 w)
+{
+ uint32 res;
+ __asm__ volatile ("mov %%d14,%2 \n\
+ mov %%d15,%3 \n\
+ extr.u %0,%1,%%e14"
+ : "=d" (res) : "d" (a), "d" (p), "d" (w):"d14", "d15");
+ return res;
+}
+
+/** Load a single bit.
+ */
+//#define __getbit(address,bitoffset ) __extru( *(address), bitoffset, 1 )
+#define Ifx__getbit(address, bitoffset) ((*(address) & (1U << (bitoffset))) != 0)
+
+/** Atomic load-modify-store.
+ */
+#define Ifx__imaskldmst(address, value, bitoffset, bits) \
+ {long long tmp;\
+ __asm__("imask %A0,%1,%2,%3"\
+ :"=d"((long long)tmp)\
+ :"d"(value),"d"(bitoffset),"i"(bits): "memory");\
+ __asm__("ldmst [%0]0,%A1"::"a"(address),"d"(tmp): "memory");}
+
+/** Return trg but replace trgbit by srcbit in src.
+ */
+IFX_INLINE sint32 Ifx__ins(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
+{
+ sint32 res;
+ __asm__ volatile ("ins.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
+ return res;
+}
+
+/** Extract bit-field (width bits starting at bit 0) from src and insert it in trg at pos.
+ */
+IFX_INLINE sint32 Ifx__insert(sint32 a, sint32 b, sint32 p, const sint32 w)
+{
+ sint32 res;
+ __asm__ volatile ("mov %%d14,%3 \n\
+ mov %%d15,%4 \n\
+ insert %0,%1,%2,%%e14"
+ :"=d"(res):"d"(a), "d"(b), "d"(p), "d"(w):"d14", "d15");
+ return res;
+}
+
+/** Return trg but replace trgbit by inverse of srcbit in src.
+ */
+IFX_INLINE sint32 Ifx__insn(sint32 trg, const sint32 trgbit, sint32 src, const sint32 srcbit)
+{
+ sint32 res;
+ __asm__ volatile ("insn.t %0,%1,%2,%3,%4":"=d"(res):"d"(trg), "i"(trgbit), "d"(src), "i"(srcbit));
+ return res;
+}
+
+/** Store a single bit.
+ */
+#define Ifx__putbit(value,address,bitoffset ) Ifx__imaskldmst(address, value, bitoffset,1)
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucinterrupt_handling Interrupt Handling
+ The next table provides an overview of the intrinsic functions to read or set interrupt handling.
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+#if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
+/** Set CPU priority number [0..255] (or [0..1023] for TriCore 1.6.x) and enable interrupts immediately at function entry
+ */
+#define Ifx__bisr(intlvl) __asm__ volatile ("bisr "#intlvl : : : "memory")
+#endif
+
+/** Disable interrupts. Only supported for TriCore1
+ */
+#define Ifx__disable() __asm__ volatile ("disable" : : : "memory")
+
+/** Disable interrupts and return previous interrupt state (enabled or disabled). Direct supported for TriCore1.6. Emulated on TC1.3.1
+ */
+IFX_INLINE sint32 Ifx__disable_and_save(void)
+{
+ sint32 res;
+ __asm__ volatile("disable %0":"=d"(res));
+ return res;
+}
+
+/** Enable interrupts immediately at function entry
+ */
+#define Ifx__enable() __asm__ volatile ("enable" : : : "memory")
+
+/** Restore interrupt state. Direct supported for TriCore1.6. Emulated on TC1.3.1
+ */
+IFX_INLINE void Ifx__restore(sint32 ie)
+{
+ __asm__ volatile ("restore %0"::"d"(ie));
+}
+
+#if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
+/** Call a system call function number
+ */
+#define Ifx__syscall(svcno) __tric_syscall(svcno)
+#define Ifx__tric_syscall(svcno) __asm__ volatile ("syscall "STRINGIFY(svcno) : : : "memory")
+#endif
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucmiscellaneous Miscellaneous Intrinsic Functions
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+/** Write back and invalidate cache address "p". Generates CACHEA.WI [Ab].
+ */
+IFX_INLINE void Ifx__cacheawi(uint8* p)
+{
+ __asm__ volatile("cachea.wi [%0]0"::"a"(p));
+}
+/** Write back and invalidate cache index "p". Generates CACHEI.WI [Ab].
+ */
+IFX_INLINE void Ifx__cacheiwi(uint8* p)
+{
+ __asm__ volatile("cachei.wi [%0]0"::"a"(p));
+}
+
+/** Write back and invalidate cache address \"p\" and return post incremented
+ * value of \"p\". Generates CACHEA.WI [Ab+].
+ */
+IFX_INLINE uint8* Ifx__cacheawi_bo_post_inc(uint8* p)
+{
+ __asm__ volatile("cachea.wi [%0+]0"::"a"(p));
+ return p;
+}
+
+/** Multiply two 32-bit numbers to an intermediate 64-bit result, and scale
+ * back the result to 32 bits. To scale back the result, 32 bits are extracted
+ * from the intermediate 64-bit result: bit 63-offset to bit 31-offset.
+ */
+IFX_INLINE sint32 Ifx__mulsc(sint32 a, sint32 b, sint32 offset)
+{
+ sint32 res;
+ __asm__ volatile("mul %%e12,%1,%2 \n\
+ dextr %0,%%d13,%%d12,%3"
+ :"=d"(res):"d"(a), "d"(b), "d"(offset):"d12", "d13");
+ return res;
+}
+
+/** Rotate operand left count times. The bits that are shifted out are inserted at the right side (bit 31 is shifted to bit 0).
+ */
+IFX_INLINE uint32 Ifx__rol(uint32 operand, uint32 count)
+{
+ uint32 res;
+ __asm__ volatile("dextr %0,%1,%1,%2":"=d"(res):"d"(operand), "d"(count):"memory");
+ return res;
+}
+
+/** Rotate operand right count times. The bits that are shifted out are inserted at the left side (bit 0 is shifted to bit 31).
+ */
+IFX_INLINE uint32 Ifx__ror(uint32 operand, uint32 count)
+{
+ uint32 res;
+ __asm__ volatile("rsub %2,%2,0 \n\
+ dextr %0,%1,%1,%2"
+ :"=d"(res):"d"(operand), "d"(count):"memory");
+ return res;
+}
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucpacked Packed Data Type Support
+ The next table provides an overview of the intrinsic functions for initialization of packed data type.
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+/** Absolute value of __packb
+ */
+IFX_INLINE __packb Ifx__absb(__packb a)
+{
+ __packb res;
+ __asm__ volatile ("abs.b %0,%1"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Absolute value of __packhw
+ */
+IFX_INLINE __packhw Ifx__absh(__packhw a)
+{
+ __packhw res;
+ __asm__ volatile ("abs.h %0,%1"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Absolute value of __packhw using saturation
+ */
+IFX_INLINE __packhw Ifx__abssh(__packhw a)
+{
+ __packb res;
+ __asm__ volatile ("abss.h %0,%1"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__extractbyte1(__packb a)
+{
+ sint8 res;
+ __asm__ volatile ("extr %0,%1,0,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract second byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__extractbyte2(__packb a)
+{
+ sint8 res;
+ __asm__ volatile ("extr %0,%1,8,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract third byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__extractbyte3(__packb a)
+{
+ sint8 res;
+ __asm__ volatile ("extr %0,%1,16,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract fourth byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__extractbyte4(__packb a)
+{
+ sint8 res;
+ __asm__ volatile ("extr %0,%1,24,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first sint16 from a __packhw
+ */
+IFX_INLINE sint16 Ifx__extracthw1(__packhw a)
+{
+ sint16 res;
+ __asm__ volatile ("extr %0,%1,0,16"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract second sint16 from a __packhw
+ */
+IFX_INLINE sint16 Ifx__extracthw2(__packhw a)
+{
+ sint16 res;
+ __asm__ volatile ("extr %0,%1,16,16"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__extractubyte1(__upackb a)
+{
+ uint8 res;
+ __asm__ volatile ("extr %0,%1,0,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract second uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__extractubyte2(__upackb a)
+{
+ uint8 res;
+ __asm__ volatile ("extr %0,%1,8,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract third uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__extractubyte3(__upackb a)
+{
+ uint8 res;
+ __asm__ volatile ("extr %0,%1,16,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract fourth uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__extractubyte4(__upackb a)
+{
+ uint8 res;
+ __asm__ volatile ("extr %0,%1,24,8"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first uint16 from a __packhw
+ */
+IFX_INLINE uint16 Ifx__extractuhw1(__upackhw a)
+{
+ uint16 res;
+ __asm__ volatile ("extr %0,%1,0,16"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract second uint16 from a __packhw
+ */
+IFX_INLINE uint16 Ifx__extractuhw2(__upackhw a)
+{
+ uint16 res;
+ __asm__ volatile ("extr %0,%1,16,16"
+ :"=d"(res):"d"(a):"memory");
+ return res;
+}
+
+/** Extract first byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__getbyte1(__packb* a)
+{
+ sint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,0,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+
+}
+
+/** Extract second byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__getbyte2(__packb* a)
+{
+ sint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,8,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+
+}
+
+/** Extract third byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__getbyte3(__packb* a)
+{
+ sint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,16,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+
+}
+
+/** Extract fourth byte from a __packb
+ */
+IFX_INLINE sint8 Ifx__getbyte4(__packb* a)
+{
+ sint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,24,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+
+}
+
+/** Extract first sint16 from a __packhw
+ */
+IFX_INLINE sint16 Ifx__gethw1(__packhw* a)
+{
+ sint16 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,0,16"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+/** Extract second sint16 from a __packhw
+ */
+IFX_INLINE sint16 Ifx__gethw2(__packhw* a)
+{
+ sint16 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,16,16"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract first uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__getubyte1(__upackb* a)
+{
+ uint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,0,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract second uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__getubyte2(__upackb* a)
+{
+ uint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,8,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract third uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__getubyte3(__upackb* a)
+{
+ uint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,16,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract fourth uint8 from a __packb
+ */
+IFX_INLINE uint8 Ifx__getubyte4(__upackb* a)
+{
+ uint8 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,24,8"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract first uint16 from a __packhw
+ */
+IFX_INLINE uint16 Ifx__getuhw1(__upackhw* a)
+{
+ uint16 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,0,16"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Extract second uint16 from a __packhw
+ */
+IFX_INLINE uint16 Ifx__getuhw2(__upackhw* a)
+{
+ uint16 res;
+ __asm__ volatile ("ld.w %0,[%1]0 \n\
+ extr %0,%0,16,16"
+ :"=d"(res):"a"(a):"memory");
+ return res;
+}
+
+/** Initialize __packb with four integers
+ */
+IFX_INLINE __packb Ifx__initpackb(sint32 a, sint32 b, sint32 c, sint32 d)
+{
+ __packb res;
+ __asm__ volatile ("insert %3,%3,%4,8,8 \n\
+ insert %4,%1,%2,8,8 \n\
+ insert %0,%4,%3,16,16 "
+ :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
+ return res;
+}
+
+/** Initialize __packb with a long integer
+ */
+IFX_INLINE __packb Ifx__initpackbl(long a)
+{
+ return (__packb) a;
+}
+
+/** Initialize __packhw with two integers
+ */
+IFX_INLINE __packhw Ifx__initpackhw(sint16 a, sint16 b)
+{
+ __packhw res;
+ __asm__ volatile ("insert %0,%1,%2,16,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Initialize __packhw with a long integer
+ */
+IFX_INLINE __packhw Ifx__initpackhwl(long a)
+{
+ return a;
+}
+
+/** Initialize __packb with four unsigned integers
+ */
+IFX_INLINE __upackb Ifx__initupackb( uint32 a, uint32 b, uint32 c, uint32 d)
+{
+ __upackb res;
+ __asm__ volatile ("insert %3,%3,%4,8,8 \n\
+ insert %1,%1,%2,8,8 \n\
+ insert %0,%1,%3,16,16"
+ :"=d"(res):"d"(a), "d"(b), "d"(c), "d"(d):"memory");
+ return res;
+}
+
+/** Initialize __packhw with two unsigned integers
+ */
+IFX_INLINE __upackhw Ifx__initupackhw( uint16 a, uint16 b)
+{
+ __upackhw res;
+ __asm__ volatile ("insert %0,%1,%2,16,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into first byte of a __packb
+ */
+IFX_INLINE __packb Ifx__insertbyte1(__packb a, sint8 b)
+{
+ __packb res;
+ __asm__ volatile ("insert %0,%1,%2,0,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into second byte of a __packb
+ */
+IFX_INLINE __packb Ifx__insertbyte2(__packb a, sint8 b)
+{
+ __packb res;
+ __asm__ volatile ("insert %0,%1,%2,8,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into third byte of a __packb
+ */
+IFX_INLINE __packb Ifx__insertbyte3(__packb a, sint8 b)
+{
+ __packb res;
+ __asm__ volatile ("insert %0,%1,%2,16,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into fourth byte of a __packb
+ */
+IFX_INLINE __packb Ifx__insertbyte4(__packb a, sint8 b)
+{
+ __packb res;
+ __asm__ volatile ("insert %0,%1,%2,24,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into first uint8 of a __packb
+ */
+IFX_INLINE __upackb Ifx__insertubyte1( __upackb a, uint8 b)
+{
+ __upackb res;
+ __asm__ volatile ("insert %0,%1,%2,0,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into second uint8 of a __packb
+ */
+IFX_INLINE __upackb Ifx__insertubyte2( __upackb a, uint8 b)
+{
+ __upackb res;
+ __asm__ volatile ("insert %0,%1,%2,8,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into third uint8 of a __packb
+ */
+IFX_INLINE __upackb Ifx__insertubyte3( __upackb a, uint8 b)
+{
+ __upackb res;
+ __asm__ volatile ("insert %0,%1,%2,16,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into fourth uint8 of a __packb
+ */
+IFX_INLINE __upackb Ifx__insertubyte4( __upackb a, uint8 b)
+{
+ __upackb res;
+ __asm__ volatile ("insert %0,%1,%2,24,8"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint16 into first halfword of a __packhw
+ */
+IFX_INLINE __packhw Ifx__inserthw1(__packhw a, sint16 b)
+{
+ __packhw res;
+ __asm__ volatile ("insert %0,%1,%2,0,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint16 into second halfword of a __packhw
+ */
+IFX_INLINE __packhw Ifx__inserthw2(__packhw a, sint16 b)
+{
+ __packhw res;
+ __asm__ volatile ("insert %0,%1,%2,16,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert uint16 into first halfword of a __upackhw
+ */
+IFX_INLINE __upackhw Ifx__insertuhw1( __upackhw a, uint16 b)
+{
+ __upackhw res;
+ __asm__ volatile ("insert %0,%1,%2,0,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert uint16 into second halfword of a __upackhw
+ */
+IFX_INLINE __upackhw Ifx__insertuhw2( __upackhw a, uint16 b)
+{
+ __upackhw res;
+ __asm__ volatile ("insert %0,%1,%2,16,16"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Minimum of two __packb values
+ */
+IFX_INLINE __packb Ifx__minb(__packb a, __packb b)
+{
+ __packb res;
+ __asm__ volatile ("min.b %0,%1,%2"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Minimum of two __upackb values
+ */
+IFX_INLINE __upackb Ifx__minbu( __upackb a, __upackb b)
+{
+ __upackb res;
+ __asm__ volatile ("min.bu %0,%1,%2"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Minimum of two __packhw values
+ */
+IFX_INLINE __packhw Ifx__minh(__packhw a, __packhw b)
+{
+ __packhw res;
+ __asm__ volatile ("min.h %0,%1,%2"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Minimum of two __upackhw values
+ */
+IFX_INLINE __upackhw Ifx__minhu( __upackhw a, __upackhw b)
+{
+ __upackhw res;
+ __asm__ volatile ("min.hu %0,%1,%2"
+ :"=d"(res):"d"(a), "d"(b):"memory");
+ return res;
+}
+
+/** Insert sint8 into first byte of a __packb
+ */
+IFX_INLINE void Ifx__setbyte1(__packb* a, sint8 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,0,8 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint8 into second byte of a __packb
+ */
+IFX_INLINE void Ifx__setbyte2(__packb* a, sint8 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,8,8 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint8 into third byte of a __packb
+ */
+IFX_INLINE void Ifx__setbyte3(__packb* a, sint8 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,16,8 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint8 into fourth byte of a __packb
+ */
+IFX_INLINE void Ifx__setbyte4(__packb* a, sint8 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,24,8 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint16 into first halfword of a __packhw
+ */
+IFX_INLINE void Ifx__sethw1(__packhw* a, sint16 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,0,16 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert sint16 into second halfword of a __packhw
+ */
+IFX_INLINE void Ifx__sethw2(__packhw* a, sint16 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,16,16 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint8 into first byte of a __upackb
+ */
+IFX_INLINE void Ifx__setubyte1(__upackb* a, uint8 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,0,8 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint8 into second byte of a __upackb
+ */
+IFX_INLINE void Ifx__setubyte2(__upackb* a, uint8 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,8,8 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint8 into third byte of a __upackb
+ */
+IFX_INLINE void Ifx__setubyte3(__upackb* a, uint8 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,16,8 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint8 into fourth byte of a __upackb
+ */
+IFX_INLINE void Ifx__setubyte4(__upackb* a, uint8 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,24,8 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint16 into first halfword of a __upackhw
+ */
+IFX_INLINE void Ifx__setuhw1(__upackhw* a, uint16 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,0,16 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** Insert uint16 into second halfword of a __upackhw
+ */
+IFX_INLINE void Ifx__setuhw2(__upackhw* a, uint16 b)
+{
+ __asm__ volatile ("ld.w %%d15,[%0] \n\
+ insert %%d15,%%d15,%1,16,16 \n\
+ st.w [%0],%%d15"
+ ::"a"(a), "d"(b):"d15", "memory");
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucregister Register Handling
+ The next table provides an overview of the intrinsic functions that you can use to access control registers.
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+/** Return absolute value
+ */
+#define Ifx__abs(a) __builtin_abs(a)
+
+/** Return absolue difference of two integers
+ */
+IFX_INLINE sint32 Ifx__absdif(sint32 a, sint32 b)
+{
+ sint32 res;
+ __asm__ volatile ("absdif %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** Return absolute value with saturation
+ */
+IFX_INLINE sint32 Ifx__abss(sint32 a)
+{
+ sint32 res;
+ __asm__ volatile ("abss %0, %1": "=d" (res) : "d" (a));
+ return res;
+}
+
+/** Count leading ones in int
+ */
+IFX_INLINE sint32 Ifx__clo(sint32 a)
+{
+ sint32 res;
+ __asm__ volatile ("clo %0,%1":"=d"(res):"d"(a));
+ return res;
+}
+
+/** Count number of redundant sign bits (all consecutive bits with the same value as bit 31
+ */
+IFX_INLINE sint32 Ifx__cls(sint32 a)
+{
+ sint32 res;
+ __asm__ volatile ("cls %0,%1":"=d"(res):"d"(a));
+ return res;
+}
+
+/** Count leading zeros in int
+ */
+#define Ifx__clz(a) __builtin_clz(a)
+
+/** Return absolute double precision floating-point value
+ */
+IFX_INLINE double Ifx__fabs(double d)
+{
+ double res;
+ __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (d):"memory");
+ return res;
+}
+
+/** Return absolute floating-point value
+ */
+IFX_INLINE float Ifx__fabsf(float f)
+{
+ float res;
+ __asm__ volatile ("insert %0,%1,0,31,1": "=d" (res) : "d" (f):"memory");
+ return res;
+}
+
+#if !IFXCPU_INTRINSICSGNUC_USE_MACHINE_INTRINSICS
+/** Move contents of the addressed core SFR into a data register
+ */
+#define Ifx__mfcr(regaddr) \
+ ({ sint32 res; __asm__ volatile ("mfcr %0,%1": "=d" (res) :"i"(regaddr): "memory"); res; })
+
+//({ sint32 res; __asm__ volatile ("mfcr %0,"#regaddr : "=d" (res) : : "memory"); res; })
+
+/** Move contents of a data register (second int) to the addressed core SFR (first int)
+ */
+#define Ifx__mtcr(regaddr,val) __asm__ volatile ("mtcr %0,%1\n\tisync"::"i"(regaddr),"d"(val):"memory")
+#endif
+
+/** Return parity
+ */
+IFX_INLINE sint32 Ifx__parity(sint32 a)
+{
+ sint32 res;
+ __asm__ volatile ("parity %0,%1": "=d" (res) : "d" (a):"memory");
+ return res;
+}
+
+/** Return saturated byte
+ */
+IFX_INLINE sint8 Ifx__satb(sint32 a)
+{
+ sint8 res;
+ __asm__ volatile ("sat.b %0,%1":"=d"(res):"d"(a));
+ return res;
+}
+
+/** Return saturated uint8
+ */
+IFX_INLINE uint8 Ifx__satbu(sint32 a)
+{
+ uint8 res;
+ __asm__ volatile ("sat.bu %0,%1":"=d"(res):"d"(a));
+ return res;
+}
+
+/** Return saturated halfword
+ */
+IFX_INLINE sint16 Ifx__sath(sint32 a)
+{
+ sint8 res;
+ __asm__ volatile ("sat.h %0,%1":"=d"(res):"d"(a));
+ return res;
+}
+
+/** Return saturated unsigned halfword
+ */
+IFX_INLINE uint16 Ifx__sathu(sint32 a)
+{
+ sint8 res;
+ __asm__ volatile ("sat.hu %0,%1":"=d"(res):"d"(a));
+ return res;
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucsaturation Saturation Arithmetic Support
+ These intrinsics support saturation arithmetic
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+/** add signed with saturation
+ */
+IFX_INLINE sint32 Ifx__adds(sint32 a, sint32 b)
+{
+ sint32 res;
+ __asm__ volatile ("adds %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** add unsigned with saturation
+ */
+IFX_INLINE uint32 Ifx__addsu(uint32 a, uint32 b)
+{
+ uint32 res;
+ __asm__ volatile ("adds.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** substract signed with saturation
+ */
+IFX_INLINE sint32 Ifx__subs(sint32 a, sint32 b)
+{
+ sint32 res;
+ __asm__ volatile ("subs %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** substract unsigned with saturation
+ */
+IFX_INLINE uint32 Ifx__subsu(uint32 a, uint32 b)
+{
+ uint32 res;
+ __asm__ volatile ("subs.u %0, %1, %2": "=d" (res) : "d" (a), "d" (b));
+ return res;
+}
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Gnucsingle_assembly Insert Single Assembly Instruction
+ The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
+ instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
+ assembly instructions.
+ * \ingroup IfxLld_Cpu_Intrinsics_Gnuc
+ * \{
+ */
+
+/** Insert DEBUG instruction
+ */
+IFX_INLINE void Ifx__debug(void)
+{
+ __asm__ volatile ("debug" : : : "memory");
+}
+
+/** Insert a memory barrier
+ */
+#define Ifx__mem_barrier __asm__ volatile("":::"memory");
+
+/** Insert DSYNC instruction
+ */
+IFX_INLINE void Ifx__dsync(void)
+{
+ __asm__ volatile ("dsync" : : : "memory");
+}
+
+/** Insert ISYNC instruction
+ */
+IFX_INLINE void Ifx__isync(void)
+{
+ __asm__ volatile ("isync" : : : "memory");
+}
+
+/** Insert LDMST instruction. Note that all operands must be word-aligned.
+ */
+IFX_INLINE void Ifx__ldmst(volatile void* address, uint32 mask, uint32 value)
+{
+ __asm__ volatile("mov %H2,%1 \n\
+ ldmst [%0]0,%A2"
+ ::"a"(address), "d"(mask), "d"((long long)value));
+}
+
+/** Insert NOP instruction
+ */
+IFX_INLINE void Ifx__nop(void)
+{
+ __asm__ volatile ("nop" : : : "memory");
+}
+
+/** Insert a loop over cnt NOP instruction
+ */
+IFX_INLINE void Ifx__nops(void* cnt)
+{
+ __asm__ volatile ("0: nop \n\
+ loop %0,0b"
+ ::"a"(((sint8*)cnt)-1));
+}
+
+/** Insert RSLCX instruction
+ */
+IFX_INLINE void Ifx__rslcx(void)
+{
+ __asm__ volatile ("rslcx" : : : "memory");
+}
+
+/** Insert SVLCX instruction
+ */
+IFX_INLINE void Ifx__svlcx(void)
+{
+ __asm__ volatile ("svlcx" : : : "memory");
+}
+
+/** Insert SWAP instruction. Note that all operands must be word-aligned.
+ */
+IFX_INLINE uint32 Ifx__swap(void* place, uint32 value)
+{
+ uint32 res;
+ __asm__ volatile("swap.w [%1]0,%2":"=d"(res):"a"(place), "0"(value));
+ return res;
+}
+
+/** Insert n NOP instruction
+ */
+#define Ifx__NOP(n) __asm(".rept " #n "\n\tnop\n\t.endr\n")
+
+/** \} */
+
+/* FIXME use inline instead of #define */
+#define Ifx__setareg(areg,val) \
+ { uint32 reg_val= (uint32)val; \
+ __asm__ volatile (" mov.a\t %%"#areg",%0"::"d"(reg_val)); }
+
+/**__mtcr (CPU_CCTRL, 0);
+*/
+IFX_INLINE void Ifx__stopPerfCounters(void)
+{
+ __asm__ volatile("mov %%d0,0\n\
+ mtcr 0xFC00,%%d0\n\
+ isync\n"
+ : : :"d0"); /* FIXME check that the parameter d0 is understood by the compiler as a register used by the inline */
+}
+
+/** \brief This function is a implementation of a binary semaphore using compare and swap instruction
+ * \param address address of resource.
+ * \param value This variable is updated with status of address
+ * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
+ *
+ */
+IFX_INLINE unsigned int Ifx__cmpAndSwap (unsigned int volatile *address,
+ unsigned int value, unsigned int condition)
+{
+ /* Gnu C compiler with Tricore 1.6 support is required to use cmpswap instruction */
+ __extension__ unsigned long long reg64
+ = value | (unsigned long long) condition << 32;
+
+ __asm__ __volatile__ ("cmpswap.w [%[addr]]0, %A[reg]"
+ : [reg] "+d" (reg64)
+ : [addr] "a" (address)
+ : "memory");
+ return reg64;
+}
+
+/** \brief Convert a fixpoint value to float32
+ *
+ * This function converts a value from a fixpoint format to a float32 format.
+ *
+ *
+ * \param value value to be converted.
+ * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
+ *
+ * \return Returns the converted value in the float32 format.
+ *
+ */
+IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
+{
+ float32 result;
+
+ __asm__ volatile("q31tof %0, %1, %2": "=d" (result) : "d" (value), "d" (shift));
+ return result;
+}
+
+IFX_INLINE void* Ifx__getA11(void)
+{
+ uint32 *res;
+ __asm__ volatile ("mov.aa %0, %%a11": "=a" (res) : :"a11");
+ return res;
+}
+
+IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
+{
+ __asm__ volatile ("mov.aa %%a10, %0": : "a" (stackAddr) :"a10");
+}
+
+IFX_INLINE uint32 Ifx__crc32(uint32 b, uint32 a)
+{
+ uint32 returnvalue = 0; /* set value to 0 */
+
+ __asm__ volatile ("CRC32 %0,%1,%2" : "=d" (returnvalue) : "d"(b), "d"(a));
+
+ return returnvalue;
+}
+
+IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
+{
+ uint32 returnvalue = 0; /* set seed value to 0 */
+ for (;length > 0; length--)
+ {
+ /* calculate the CRC over all data */
+ __asm__ ("CRC32 %0,%0,%1" : "+d" (returnvalue) : "d" (*startaddress));
+ startaddress++;
+ }
+ return returnvalue;
+}
+
+IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
+{
+ uint32 result;
+ __asm(" mul.u %%e14,%1,%2 # d15 = Eh; d14 = El \n"
+ " mov %%d12,%%d14 # e12 = El \n"
+ " mov %%d13, 0 # \n"
+ " madd.u %%e14,%%e12,%%d15, 5 # e14 = El + 5 * d15 \n"
+ " cmp_m_%=: jge.u %%d14,%3,sub_m_%= # \n"
+ " jz %%d15,done_%= # \n"
+ " sub_m_%=: subx %%d14,%%d14,%3 # e12=e12-m \n"
+ " subc %%d15,%%d15,%%d13 # d13=d13-0 \n"
+ " loopu cmp_m_%= # \n"
+ " done_%=: mov %0,%%d14 # \n"
+ : "=d"(result) : "d"(a), "d"(x), "d"(m) : "d12","d13","d14","d15");
+ return result;
+}
+
+IFX_INLINE sint32 Ifx__popcnt(sint32 a)
+{
+ sint32 res;
+ __asm__ volatile ("popcnt %0,%1":"=d"(res):"d"(a));
+ return res;
+}
+
+/** Invalidate cache address "p". Generates CACHEA.I [Ab].
+*/
+IFX_INLINE void Ifx__cacheai(uint8* p)
+{
+ __asm__ volatile("cachea.i [%0]0"::"a"(p));
+}
+
+/* Macros for backward compatibility of the intrinsics*/
+/******************************************************************************/
+#ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
+#ifndef __non_return_call
+#define __non_return_call Ifx__non_return_call
+#endif
+
+#ifndef __jump_and_link
+#define __jump_and_link Ifx__jump_and_link
+#endif
+
+#ifndef __moveToDataParam0
+#define __moveToDataParam0 Ifx__moveToDataParam0
+#endif
+
+#ifndef __moveToDataParamRet
+#define __moveToDataParamRet Ifx__moveToDataParamRet
+#endif
+
+#ifndef __getDataParamRet
+#define __getDataParamRet Ifx__getDataParamRet
+#endif
+
+#ifndef __moveToAddrParam0
+#define __moveToAddrParam0 Ifx__moveToAddrParam0
+#endif
+
+#ifndef __jumpToFunction
+#define __jumpToFunction Ifx__jumpToFunction
+#endif
+
+#ifndef __jumpToFunctionWithLink
+#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
+#endif
+
+#ifndef __jumpBackToLink
+#define __jumpBackToLink Ifx__jumpBackToLink
+#endif
+
+#ifndef __minX
+#define __minX Ifx__minX
+#endif
+
+#ifndef __maxX
+#define __maxX Ifx__maxX
+#endif
+
+#ifndef __saturateX
+#define __saturateX Ifx__saturateX
+#endif
+
+#ifndef __checkrangeX
+#define __checkrangeX Ifx__checkrangeX
+#endif
+
+#ifndef __saturate
+#define __saturate Ifx__saturate
+#endif
+
+#ifndef __saturateu
+#define __saturateu Ifx__saturateu
+#endif
+
+#ifndef __max
+#define __max Ifx__max
+#endif
+
+#ifndef __maxs
+#define __maxs Ifx__maxs
+#endif
+
+#ifndef __maxu
+#define __maxu Ifx__maxu
+#endif
+
+#ifndef __min
+#define __min Ifx__min
+#endif
+
+#ifndef __mins
+#define __mins Ifx__mins
+#endif
+
+#ifndef __minu
+#define __minu Ifx__minu
+#endif
+
+#ifndef __sqrtf
+#define __sqrtf Ifx__sqrtf
+#endif
+
+#ifndef __sqrf
+#define __sqrf Ifx__sqrf
+#endif
+
+#ifndef __checkrange
+#define __checkrange Ifx__checkrange
+#endif
+
+#ifndef __roundf
+#define __roundf Ifx__roundf
+#endif
+
+#ifndef __absf
+#define __absf Ifx__absf
+#endif
+
+#ifndef __saturatef
+#define __saturatef Ifx__saturatef
+#endif
+
+#ifndef __minf
+#define __minf Ifx__minf
+#endif
+
+#ifndef __maxf
+#define __maxf Ifx__maxf
+#endif
+
+#ifndef __checkrangef
+#define __checkrangef Ifx__checkrangef
+#endif
+
+#ifndef __abs_stdreal
+#define __abs_stdreal Ifx__abs_stdreal
+#endif
+
+#ifndef __saturate_stdreal
+#define __saturate_stdreal Ifx__saturate_stdreal
+#endif
+
+#ifndef __min_stdreal
+#define __min_stdreal Ifx__min_stdreal
+#endif
+
+#ifndef __max_stdreal
+#define __max_stdreal Ifx__max_stdreal
+#endif
+
+#ifndef __neqf
+#define __neqf Ifx__neqf
+#endif
+
+#ifndef __leqf
+#define __leqf Ifx__leqf
+#endif
+
+#ifndef __geqf
+#define __geqf Ifx__geqf
+#endif
+
+#ifndef __clssf
+#define __clssf Ifx__clssf
+#endif
+
+#ifndef __fract_to_float
+#define __fract_to_float Ifx__fract_to_float
+#endif
+
+#ifndef __fract_to_sfract
+#define __fract_to_sfract Ifx__fract_to_sfract
+#endif
+
+#ifndef __float_to_sfract
+#define __float_to_sfract Ifx__float_to_sfract
+#endif
+
+#ifndef __float_to_fract
+#define __float_to_fract Ifx__float_to_fract
+#endif
+
+#ifndef __getfract
+#define __getfract Ifx__getfract
+#endif
+
+#ifndef __mac_r_sf
+#define __mac_r_sf Ifx__mac_r_sf
+#endif
+
+#ifndef __mac_sf
+#define __mac_sf Ifx__mac_sf
+#endif
+
+#ifndef __mulfractfract
+#define __mulfractfract Ifx__mulfractfract
+#endif
+
+#ifndef __mulfractlong
+#define __mulfractlong Ifx__mulfractlong
+#endif
+
+#ifndef __round16
+#define __round16 Ifx__round16
+#endif
+
+#ifndef __s16_to_sfract
+#define __s16_to_sfract Ifx__s16_to_sfract
+#endif
+
+#ifndef __sfract_to_s16
+#define __sfract_to_s16 Ifx__sfract_to_s16
+#endif
+
+#ifndef __sfract_to_u16
+#define __sfract_to_u16 Ifx__sfract_to_u16
+#endif
+
+#ifndef __shaaccum
+#define __shaaccum Ifx__shaaccum
+#endif
+
+#ifndef __shafracts
+#define __shafracts Ifx__shafracts
+#endif
+
+#ifndef __shasfracts
+#define __shasfracts Ifx__shasfracts
+#endif
+
+#ifndef __u16_to_sfract
+#define __u16_to_sfract Ifx__u16_to_sfract
+#endif
+
+#ifndef __extr
+#define __extr Ifx__extr
+#endif
+
+#ifndef __extru
+#define __extru Ifx__extru
+#endif
+
+#ifndef __getbit
+#define __getbit Ifx__getbit
+#endif
+
+#ifndef __ins
+#define __ins Ifx__ins
+#endif
+
+#ifndef __insert
+#define __insert Ifx__insert
+#endif
+
+#ifndef __insn
+#define __insn Ifx__insn
+#endif
+
+#ifndef __putbit
+#define __putbit Ifx__putbit
+#endif
+
+#ifndef __imaskldmst
+#define __imaskldmst Ifx__imaskldmst
+#endif
+
+#ifndef __bisr
+#define __bisr Ifx__bisr
+#endif
+
+#ifndef __disable
+#define __disable Ifx__disable
+#endif
+
+#ifndef __disable_and_save
+#define __disable_and_save Ifx__disable_and_save
+#endif
+
+#ifndef __enable
+#define __enable Ifx__enable
+#endif
+
+#ifndef __restore
+#define __restore Ifx__restore
+#endif
+
+#ifndef __syscall
+#define __syscall Ifx__syscall
+#endif
+
+#ifndef __tric_syscall
+#define __tric_syscall Ifx__tric_syscall
+#endif
+
+#ifndef __cacheawi
+#define __cacheawi Ifx__cacheawi
+#endif
+
+#ifndef __cacheiwi
+#define __cacheiwi Ifx__cacheiwi
+#endif
+
+#ifndef __cacheawi_bo_post_inc
+#define __cacheawi_bo_post_inc Ifx__cacheawi_bo_post_inc
+#endif
+
+#ifndef __mulsc
+#define __mulsc Ifx__mulsc
+#endif
+
+#ifndef __rol
+#define __rol Ifx__rol
+#endif
+
+#ifndef __ror
+#define __ror Ifx__ror
+#endif
+
+#ifndef __extractbyte1
+#define __extractbyte1 Ifx__extractbyte1
+#endif
+
+#ifndef __extractbyte2
+#define __extractbyte2 Ifx__extractbyte2
+#endif
+
+#ifndef __extractbyte3
+#define __extractbyte3 Ifx__extractbyte3
+#endif
+
+#ifndef __extractbyte4
+#define __extractbyte4 Ifx__extractbyte4
+#endif
+
+#ifndef __extracthw1
+#define __extracthw1 Ifx__extracthw1
+#endif
+
+#ifndef __extracthw2
+#define __extracthw2 Ifx__extracthw2
+#endif
+
+#ifndef __extractubyte1
+#define __extractubyte1 Ifx__extractubyte1
+#endif
+
+#ifndef __extractubyte2
+#define __extractubyte2 Ifx__extractubyte2
+#endif
+
+#ifndef __extractubyte3
+#define __extractubyte3 Ifx__extractubyte3
+#endif
+
+#ifndef __extractubyte4
+#define __extractubyte4 Ifx__extractubyte4
+#endif
+
+#ifndef __extractuhw1
+#define __extractuhw1 Ifx__extractuhw1
+#endif
+
+#ifndef __extractuhw2
+#define __extractuhw2 Ifx__extractuhw2
+#endif
+
+#ifndef __getbyte1
+#define __getbyte1 Ifx__getbyte1
+#endif
+
+#ifndef __getbyte2
+#define __getbyte2 Ifx__getbyte2
+#endif
+
+#ifndef __getbyte3
+#define __getbyte3 Ifx__getbyte3
+#endif
+
+#ifndef __getbyte4
+#define __getbyte4 Ifx__getbyte4
+#endif
+
+#ifndef __gethw1
+#define __gethw1 Ifx__gethw1
+#endif
+
+#ifndef __gethw2
+#define __gethw2 Ifx__gethw2
+#endif
+
+#ifndef __getubyte1
+#define __getubyte1 Ifx__getubyte1
+#endif
+
+#ifndef __getubyte2
+#define __getubyte2 Ifx__getubyte2
+#endif
+
+#ifndef __getubyte3
+#define __getubyte3 Ifx__getubyte3
+#endif
+
+#ifndef __getubyte4
+#define __getubyte4 Ifx__getubyte4
+#endif
+
+#ifndef __getuhw1
+#define __getuhw1 Ifx__getuhw1
+#endif
+
+#ifndef __getuhw2
+#define __getuhw2 Ifx__getuhw2
+#endif
+
+#ifndef __setbyte1
+#define __setbyte1 Ifx__setbyte1
+#endif
+
+#ifndef __setbyte2
+#define __setbyte2 Ifx__setbyte2
+#endif
+
+#ifndef __setbyte3
+#define __setbyte3 Ifx__setbyte3
+#endif
+
+#ifndef __setbyte4
+#define __setbyte4 Ifx__setbyte4
+#endif
+
+#ifndef __sethw1
+#define __sethw1 Ifx__sethw1
+#endif
+
+#ifndef __sethw2
+#define __sethw2 Ifx__sethw2
+#endif
+
+#ifndef __setubyte1
+#define __setubyte1 Ifx__setubyte1
+#endif
+
+#ifndef __setubyte2
+#define __setubyte2 Ifx__setubyte2
+#endif
+
+#ifndef __setubyte3
+#define __setubyte3 Ifx__setubyte3
+#endif
+
+#ifndef __setubyte4
+#define __setubyte4 Ifx__setubyte4
+#endif
+
+#ifndef __setuhw1
+#define __setuhw1 Ifx__setuhw1
+#endif
+
+#ifndef __setuhw2
+#define __setuhw2 Ifx__setuhw2
+#endif
+
+#ifndef __minhu
+#define __minhu Ifx__minhu
+#endif
+
+#ifndef __minh
+#define __minh Ifx__minh
+#endif
+
+#ifndef __minbu
+#define __minbu Ifx__minbu
+#endif
+
+#ifndef __minb
+#define __minb Ifx__minb
+#endif
+
+#ifndef __insertuhw2
+#define __insertuhw2 Ifx__insertuhw2
+#endif
+
+#ifndef __insertuhw1
+#define __insertuhw1 Ifx__insertuhw1
+#endif
+
+#ifndef __inserthw2
+#define __inserthw2 Ifx__inserthw2
+#endif
+
+#ifndef __inserthw1
+#define __inserthw1 Ifx__inserthw1
+#endif
+
+#ifndef __insertubyte4
+#define __insertubyte4 Ifx__insertubyte4
+#endif
+
+#ifndef __insertubyte3
+#define __insertubyte3 Ifx__insertubyte3
+#endif
+
+#ifndef __insertubyte2
+#define __insertubyte2 Ifx__insertubyte2
+#endif
+
+#ifndef __insertubyte1
+#define __insertubyte1 Ifx__insertubyte1
+#endif
+
+#ifndef __insertbyte4
+#define __insertbyte4 Ifx__insertbyte4
+#endif
+
+#ifndef __insertbyte3
+#define __insertbyte3 Ifx__insertbyte3
+#endif
+
+#ifndef __insertbyte2
+#define __insertbyte2 Ifx__insertbyte2
+#endif
+
+#ifndef __insertbyte1
+#define __insertbyte1 Ifx__insertbyte1
+#endif
+
+#ifndef __initupackhw
+#define __initupackhw Ifx__initupackhw
+#endif
+
+#ifndef __initupackb
+#define __initupackb Ifx__initupackb
+#endif
+
+#ifndef __initpackhwl
+#define __initpackhwl Ifx__initpackhwl
+#endif
+
+#ifndef __initpackhw
+#define __initpackhw Ifx__initpackhw
+#endif
+
+#ifndef __initpackbl
+#define __initpackbl Ifx__initpackbl
+#endif
+
+#ifndef __initpackb
+#define __initpackb Ifx__initpackb
+#endif
+
+#ifndef __absb
+#define __absb Ifx__absb
+#endif
+
+#ifndef __absh
+#define __absh Ifx__absh
+#endif
+
+#ifndef __abssh
+#define __abssh Ifx__abssh
+#endif
+
+
+#ifndef __abs
+#define __abs Ifx__abs
+#endif
+
+#ifndef __absdif
+#define __absdif Ifx__absdif
+#endif
+
+#ifndef __abss
+#define __abss Ifx__abss
+#endif
+
+#ifndef __clo
+#define __clo Ifx__clo
+#endif
+
+#ifndef __cls
+#define __cls Ifx__cls
+#endif
+
+#ifndef __clz
+#define __clz Ifx__clz
+#endif
+
+#ifndef __fabs
+#define __fabs Ifx__fabs
+#endif
+
+#ifndef __fabsf
+#define __fabsf Ifx__fabsf
+#endif
+
+#ifndef __mfcr
+#define __mfcr Ifx__mfcr
+#endif
+
+#ifndef __mtcr
+#define __mtcr Ifx__mtcr
+#endif
+
+#ifndef __parity
+#define __parity Ifx__parity
+#endif
+
+#ifndef __satb
+#define __satb Ifx__satb
+#endif
+
+#ifndef __satbu
+#define __satbu Ifx__satbu
+#endif
+
+#ifndef __sath
+#define __sath Ifx__sath
+#endif
+
+#ifndef __sathu
+#define __sathu Ifx__sathu
+#endif
+
+#ifndef __adds
+#define __adds Ifx__adds
+#endif
+
+#ifndef __addsu
+#define __addsu Ifx__addsu
+#endif
+
+#ifndef __subs
+#define __subs Ifx__subs
+#endif
+
+#ifndef __subsu
+#define __subsu Ifx__subsu
+#endif
+
+#ifndef __debug
+#define __debug Ifx__debug
+#endif
+
+#ifndef __mem_barrier
+#define __mem_barrier Ifx__mem_barrier
+#endif
+
+#ifndef __dsync
+#define __dsync Ifx__dsync
+#endif
+
+#ifndef __isync
+#define __isync Ifx__isync
+#endif
+
+#ifndef __ldmst
+#define __ldmst Ifx__ldmst
+#endif
+
+#ifndef __nop
+#define __nop Ifx__nop
+#endif
+
+#ifndef __nops
+#define __nops Ifx__nops
+#endif
+
+#ifndef __rslcx
+#define __rslcx Ifx__rslcx
+#endif
+
+#ifndef __svlcx
+#define __svlcx Ifx__svlcx
+#endif
+
+#ifndef __swap
+#define __swap Ifx__swap
+#endif
+
+#if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
+#define NOP Ifx__NOP
+#endif
+
+#ifndef __setareg
+#define __setareg Ifx__setareg
+#endif
+
+#ifndef __stopPerfCounters
+#define __stopPerfCounters Ifx__stopPerfCounters
+#endif
+
+#ifndef __cmpAndSwap
+#define __cmpAndSwap Ifx__cmpAndSwap
+#endif
+
+#ifndef __fixpoint_to_float32
+#define __fixpoint_to_float32 Ifx__fixpoint_to_float32
+#endif
+
+#ifndef __getA11
+#define __getA11 Ifx__getA11
+#endif
+
+#ifndef __setStackPointer
+#define __setStackPointer Ifx__setStackPointer
+#endif
+
+#if ((!defined(__crc32)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
+#define __crc32 Ifx__crc32
+#endif
+
+#ifndef __popcnt
+#define __popcnt Ifx__popcnt
+#endif
+
+#ifndef __cacheai
+#define __cacheai Ifx__cacheai
+#endif
+
+#endif
+/******************************************************************************/
+/* *INDENT-ON* */
+/******************************************************************************/
+#endif /* IFXCPU_INTRINSICSGNUC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsTasking.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsTasking.h
new file mode 100644
index 0000000..d3c3f8c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/IfxCpu_IntrinsicsTasking.h
@@ -0,0 +1,639 @@
+/**
+ * \file IfxCpu_IntrinsicsTasking.h
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cpu_Intrinsics_Tasking Intrinsics for TASKING compiler
+ * \ingroup IfxLld_Cpu_Intrinsics
+ *
+ */
+#ifndef IFXCPU_INTRINSICSTASKING_H
+#define IFXCPU_INTRINSICSTASKING_H
+/******************************************************************************/
+#include "Ifx_Types.h"
+/******************************************************************************/
+/* *INDENT-OFF* */
+
+#ifndef __cplusplus
+/** Function call without return
+ */
+#define Ifx__non_return_call(fun) __asm("\tji %0"::"a"(fun))
+
+/** Jump and link
+ */
+IFX_INLINE void Ifx__jump_and_link(void (*fun)(void))
+{
+ __asm("jli %0"::"a"(fun));
+}
+
+IFX_INLINE void Ifx__moveToDataParam0(unsigned int var)
+{
+ __asm("mov d4, %0"::"d"(var));
+}
+
+IFX_INLINE void Ifx__moveToAddrParam0(const void *var)
+{
+ __asm("mov.aa a4, %0"::"a"(var));
+}
+
+IFX_INLINE unsigned int Ifx__getDataParamRet(void)
+{
+ unsigned int var;
+ __asm(" mov\t %0, d2":"=d"(var));
+ return var;
+}
+
+IFX_INLINE void Ifx__moveToDataParamRet(unsigned int var)
+{
+ __asm("mov d2, %0"::"d"(var));
+}
+
+IFX_INLINE void Ifx__jumpToFunction(const void *fun)
+{
+ Ifx__non_return_call(fun);
+}
+
+IFX_INLINE void Ifx__jumpToFunctionWithLink(const void *fun)
+{
+ Ifx__jump_and_link((void (*)(void))fun);
+}
+
+IFX_INLINE void Ifx__jumpBackToLink(void)
+{
+ __asm("ji a11");
+}
+#endif
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_any_type Cross type arithmetic operation
+ *
+ * Macro compatible with float, fix point, signed integer and unsigned integer
+ *
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+#define Ifx__minX(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__maxX(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturateX(X,Min,Max) ( Ifx__minX(Ifx__maxX(X, Min), Max) )
+#define Ifx__checkrangeX(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_singed_integer Signed integer operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+#define Ifx__saturate(X,Min,Max) ( __min(__max(X, Min), Max) )
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_unsinged_integer Unsigned integer operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+#define Ifx__saturateu(X,Min,Max) ( __minu(__maxu(X, Min), Max) )
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_float Floating point operation
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+#define Ifx__checkrange(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+#define Ifx__sqrf(X) ((X) * (X))
+#define Ifx__sqrtf(X) sqrtf(X)
+
+#define Ifx__roundf(X) ((((X) - (int)(X)) > 0.5) ? (1 + (int)(X)) : ((int)(X)))
+#define Ifx__absf(X) ( ((X) < 0.0) ? -(X) : (X) )
+#define Ifx__minf(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__maxf(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturatef(X,Min,Max) ( Ifx__minf(_Ifx_maxf(X, Min), Max) )
+#define Ifx__checkrangef(X,Min,Max) (((X) >= (Min)) && ((X) <= (Max)))
+
+#define Ifx__abs_stdreal(X) ( ((X) > 0.0) ? (X) : -(X) )
+#define Ifx__min_stdreal(X,Y) ( ((X) < (Y)) ? (X) : (Y) )
+#define Ifx__max_stdreal(X,Y) ( ((X) > (Y)) ? (X) : (Y) )
+#define Ifx__saturate_stdreal(X,Min,Max) ( Ifx__min_stdreal(Ifx__max_stdreal(X, Min), Max) )
+
+#define Ifx__neqf(X,Y) ( ((X) > (Y)) || ((X) < (Y)) ) /**< X != Y */
+#define Ifx__leqf(X,Y) ( !((X) > (Y)) ) /**< X <= Y */
+#define Ifx__geqf(X,Y) ( !((X) < (Y)) ) /**< X >= Y */
+/** \} */
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_fractional Fractional Arithmetic Support
+ The next table provides an overview of intrinsic functions to convert fractional values. Note that the
+ TASKING VX-toolset C compiler for TriCore fully supports the fractional type so normally you should not
+ need these intrinsic functions (except for __mulfractlong). For compatibility reasons the TASKING C
+ compiler does support these functions.
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+#define Ifx__fract_to_float(value) ((float)(value))
+
+#define Ifx__mulfractlong __mulfractlong
+
+#define Ifx__mulfractfract(fractvalue1,fractvalue2) ((fractvalue1)*(fractvalue2))
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_insert Insert / Extract Bit-fields and Bits
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+
+#define Ifx__extru(a, p, w) __extru(a,p,w)
+
+#define Ifx__extr(a, p, w) __extr(a,p,w)
+
+#define Ifx__imaskldmst(a, v, b, p) __imaskldmst((int*)a, v, b, p)
+
+#define Ifx__insert(a,b,p,w) __insert(a,b,p,w)
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_interrupt_handling Interrupt Handling
+ The next table provides an overview of the intrinsic functions to read or set interrupt handling.
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+#define Ifx__disable_and_save __disable_and_save
+
+#define Ifx__restore __restore
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_miscellaneous Miscellaneous Intrinsic Functions
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_packed Packed Data Type Support
+ The next table provides an overview of the intrinsic functions for initialization of packed data type.
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+
+/** \} */
+
+#ifndef __cplusplus
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_register Register Handling
+ The next table provides an overview of the intrinsic functions that you can use to access control registers.
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+#define Ifx__mtcr_no_isync(reg, val) \
+ __asm("mtcr %0,%1"::"i"(reg),"d"(val));
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_saturation Saturation Arithmetic Support
+ These intrinsics support saturation arithmetic
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+
+#define Ifx__adds(a,b) ((__sat int)(a)+(__sat int)(b))
+
+#define Ifx__addsu(a,b) ((__sat unsigned int)(a)+(__sat unsigned int)(b))
+
+#define Ifx__subs(a,b) ((__sat int)(a)-(__sat int)(b))
+
+#define Ifx__subsu(a,b) ((__sat unsigned int )(a)-(__sat unsigned int )(b))
+
+/** \} */
+
+/** \defgroup IfxLld_Cpu_Intrinsics_Tasking_single_assembly Insert Single Assembly Instruction
+ The next table provides an overview of the intrinsic functions that you can use to insert a single assembly
+ instruction.You can also use inline assembly but these intrinsics provide a shorthand for frequently used
+ assembly instructions.
+ * \ingroup IfxLld_Cpu_Intrinsics_Tasking
+ * \{
+ */
+
+IFX_INLINE void Ifx__nops(void* cnt)
+{
+ __asm("nop16 \n\t"
+ "loop %0,*-2"
+ ::"a"(((char*)cnt) - 1));
+}
+
+#define Ifx__NOP(n) __asm(".DUP " #n "\n\tnop16\n\t.ENDM\n")
+
+/** Insert a memory barrier
+ */
+#define Ifx__mem_barrier __asm("":::"memory");
+
+#if CPU_NO_LDMST
+IFX_INLINE void Ifx__ldmstC(volatile void *addr, uint32 mask, uint32 data)
+{
+ *(volatile uint32 *)addr = (*(volatile uint32 *)addr & ~mask) | (mask & data);
+}
+
+#define Ifx__ldmst(a,b,c) Ifx__ldmstC(a,b,c)
+#else
+
+IFX_INLINE void Ifx__ldmstAsm(volatile void *addr, uint32 mask, uint32 data)
+{
+ __asm("\tmov d3, %1 \n"
+ "\tmov d2, %2 \n"
+ "\tldmst [%0],e2"
+ ::"a"(addr), "d"(mask), "d"(data):"d2", "d3");
+
+}
+
+/** Convert float to fract
+ */
+IFX_INLINE fract Ifx__float_to_fract(float a)
+{
+ fract res;
+ __asm("ftoq31 %0,%1,%2":"=d"(res):"d"(a), "d"(0):"memory");
+ return res;
+}
+
+#define Ifx__fract_to_sfract __round16
+
+/** Convert float to sfract
+ */
+IFX_INLINE sfract Ifx__float_to_sfract(float a)
+{
+ fract tmp = Ifx__float_to_fract(a);
+ return Ifx__fract_to_sfract(tmp);
+}
+
+#define Ifx__ldmst(addr, mask, data) Ifx__ldmstAsm(addr, mask, data)
+#endif
+
+IFX_INLINE void Ifx__stopPerfCounters(void)
+{ //__mtcr (CPU_CCTRL, 0);
+ __asm(
+ " mov d0,#0\n"
+ " mtcr #0xFC00,d0\n"
+ " isync\n"
+ :::"d0");
+}
+
+/** \} */
+
+/* FIXME use inline instead of #define */
+/* FIXME is it really required to have #define __setareg(areg,val) ___setareg(areg,val) or can __setareg() implemented directly */
+#define Ifx___setareg(areg,val) \
+ { __asm (" movh.a\t "#areg",#@his("#val")\n lea\t "#areg",["#areg"]@los("#val")"); }
+#define Ifx__setareg(areg,val) Ifx___setareg(areg,val)
+
+/** \brief This function is a implementation of a binary semaphore using compare and swap instruction
+ * \param address address of resource.
+ * \param value This variable is updated with status of address
+ * \param condition if the value of address matches with the value of condition, then swap of value & address occurs.
+ *
+ */
+#define Ifx__cmpAndSwap(address,value,condition) \
+ __cmpswapw((address), ((unsigned long)value), (condition) )
+
+/** \brief Convert a fixpoint value to float32
+ *
+ * This function converts a value from a fixpoint format to a float32 format.
+ *
+ *
+ * \param value value to be converted.
+ * \param shift position of the fix point. Range = [-256, 255] => (Qx.y format where x = shift+1).
+ *
+ * \return Returns the converted value in the float32 format.
+ *
+ */
+IFX_INLINE float32 Ifx__fixpoint_to_float32(fract value, sint32 shift)
+{
+ float32 result;
+
+ __asm(
+ " q31tof\t%0, %1, %2 \n"
+ : "=d" (result)
+ : "d" (value), "d" (shift));
+ return result;
+}
+
+IFX_INLINE void* Ifx__getA11(void)
+{
+ unsigned int *res;
+ __asm("mov.aa %0, a11": "=a" (res) : :"a11");
+ return res;
+}
+
+IFX_INLINE void Ifx__setStackPointer(void *stackAddr)
+{
+ __asm("mov.aa a10, %0": : "a" (stackAddr) :"a10");
+}
+
+IFX_INLINE uint32 IfxCpu_calculateCrc32(uint32 *startaddress, uint8 length)
+{
+ uint32 returnvalue;
+ __asm("MOV d0, #0x0"); /* set seed value to 0 */
+ for (;length > 0; length--)
+ {
+ /*calculate the CRC over all data */
+ __asm("MOV d1,%0" : : "d" (*startaddress));
+ __asm("CRC32 d0,d0,d1");
+ startaddress++;
+ }
+ __asm("MOV %0,d0" : "=d" (returnvalue)); /* return result of CRC*/
+ return returnvalue;
+}
+
+IFX_INLINE uint32 IfxCpu_getRandomVal(uint32 a, uint32 x, uint32 m)
+{
+ uint32 result;
+ __asm(" mul.u e14,%1,%2 ; d15 = Eh; d14 = El \n"
+ " mov d12,d14 ; e12 = El \n"
+ " mov d13,#0 ; \n"
+ " madd.u e14,e12,d15,#5 ; e14 = El + 5 * d15 \n"
+ " 1: jge.u d14,%3,2n ; \n"
+ " jz d15,3n ; \n"
+ " 2: subx d14,d14,%3 ; e12=e12-m \n"
+ " subc d15,d15,d13 ; d13=d13-0 \n"
+ " loopu 1p ; \n"
+ " 3: mov %0,d14 ; \n"
+ : "=d"(result) : "d"(a), "d"(x), "d"(m) : "e14","e12");
+ return result;
+}
+
+IFX_INLINE sint32 Ifx__popcnt(sint32 a)
+{
+ sint32 res;
+ __asm("popcnt %0,%1":"=d"(res):"d"(a));
+ return res;
+}
+#endif
+
+/* Macros for backward compatibility of the intrinsics*/
+/******************************************************************************/
+#ifndef IFX_CFG_DISABLE_DEFAULT_INTRINSICS
+#ifndef __non_return_call
+#define __non_return_call Ifx__non_return_call
+#endif
+
+#ifndef __jump_and_link
+#define __jump_and_link Ifx__jump_and_link
+#endif
+
+#ifndef __moveToDataParam0
+#define __moveToDataParam0 Ifx__moveToDataParam0
+#endif
+
+#ifndef __moveToAddrParam0
+#define __moveToAddrParam0 Ifx__moveToAddrParam0
+#endif
+
+#ifndef __getDataParamRet
+#define __getDataParamRet Ifx__getDataParamRet
+#endif
+
+#ifndef __moveToDataParamRet
+#define __moveToDataParamRet Ifx__moveToDataParamRet
+#endif
+
+#ifndef __jumpToFunction
+#define __jumpToFunction Ifx__jumpToFunction
+#endif
+
+#ifndef __jumpToFunctionWithLink
+#define __jumpToFunctionWithLink Ifx__jumpToFunctionWithLink
+#endif
+
+#ifndef __jumpBackToLink
+#define __jumpBackToLink Ifx__jumpBackToLink
+#endif
+
+#ifndef __minX
+#define __minX Ifx__minX
+#endif
+
+#ifndef __maxX
+#define __maxX Ifx__maxX
+#endif
+
+#ifndef __saturateX
+#define __saturateX Ifx__saturateX
+#endif
+
+#ifndef __checkrangeX
+#define __checkrangeX Ifx__checkrangeX
+#endif
+
+#ifndef __saturate
+#define __saturate Ifx__saturate
+#endif
+
+#ifndef __saturateu
+#define __saturateu Ifx__saturateu
+#endif
+
+#ifndef __checkrange
+#define __checkrange Ifx__checkrange
+#endif
+
+#ifndef __sqrtf
+#define __sqrtf Ifx__sqrtf
+#endif
+
+#ifndef __sqrf
+#define __sqrf Ifx__sqrf
+#endif
+
+#ifndef __roundf
+#define __roundf Ifx__roundf
+#endif
+
+#ifndef __absf
+#define __absf Ifx__absf
+#endif
+
+#ifndef __maxf
+#define __maxf Ifx__maxf
+#endif
+
+#ifndef __saturatef
+#define __saturatef Ifx__saturatef
+#endif
+
+#ifndef __minf
+#define __minf Ifx__minf
+#endif
+
+#ifndef __checkrangef
+#define __checkrangef Ifx__checkrangef
+#endif
+
+#ifndef __abs_stdreal
+#define __abs_stdreal Ifx__abs_stdreal
+#endif
+
+#ifndef __saturate_stdreal
+#define __saturate_stdreal Ifx__saturate_stdreal
+#endif
+
+#ifndef __min_stdreal
+#define __min_stdreal Ifx__min_stdreal
+#endif
+
+#ifndef __max_stdreal
+#define __max_stdreal Ifx__max_stdreal
+#endif
+
+#ifndef __neqf
+#define __neqf Ifx__neqf
+#endif
+
+#ifndef __leqf
+#define __leqf Ifx__leqf
+#endif
+
+#ifndef __geqf
+#define __geqf Ifx__geqf
+#endif
+
+#ifndef __fract_to_float
+#define __fract_to_float Ifx__fract_to_float
+#endif
+
+#ifndef __mulfractlong
+#define __mulfractlong Ifx__mulfractlong
+#endif
+
+#ifndef __mulfractfract
+#define __mulfractfract Ifx__mulfractfract
+#endif
+
+#ifndef __disable_and_save
+#define __disable_and_save Ifx__disable_and_save
+#endif
+
+#ifndef __restore
+#define __restore Ifx__restore
+#endif
+
+#ifndef __mtcr_no_isync
+#define __mtcr_no_isync Ifx__mtcr_no_isync
+#endif
+
+#ifndef __adds
+#define __adds Ifx__adds
+#endif
+
+#ifndef __addsu
+#define __addsu Ifx__addsu
+#endif
+
+#ifndef __subs
+#define __subs Ifx__subs
+#endif
+
+#ifndef __subsu
+#define __subsu Ifx__subsu
+#endif
+
+#ifndef __nops
+#define __nops Ifx__nops
+#endif
+
+#if ((!defined(NOP)) && (!defined(IFX_CFG_DISABLE_DEFAULT_INTRINSICS)))
+#define NOP Ifx__NOP
+#endif
+
+#ifndef __mem_barrier
+#define __mem_barrier Ifx__mem_barrier
+#endif
+
+#ifndef __ldmst
+#define __ldmst Ifx__ldmst
+#endif
+
+#ifndef __ldmstC
+#define __ldmstC Ifx__ldmstC
+#endif
+
+#ifndef __float_to_sfract
+#define __float_to_sfract Ifx__float_to_sfract
+#endif
+
+#ifndef __float_to_fract
+#define __float_to_fract Ifx__float_to_fract
+#endif
+
+#ifndef __fract_to_sfract
+#define __fract_to_sfract Ifx__fract_to_sfract
+#endif
+
+#ifndef __ldmstAsm
+#define __ldmstAsm Ifx__ldmstAsm
+#endif
+
+#ifndef __stopPerfCounters
+#define __stopPerfCounters Ifx__stopPerfCounters
+#endif
+
+#ifndef __setareg
+#define __setareg Ifx__setareg
+#endif
+
+#ifndef ___setareg
+#define ___setareg Ifx___setareg
+#endif
+
+#ifndef __cmpAndSwap
+#define __cmpAndSwap Ifx__cmpAndSwap
+#endif
+
+#ifndef __fixpoint_to_float32
+#define __fixpoint_to_float32 Ifx__fixpoint_to_float32
+#endif
+
+#ifndef __getA11
+#define __getA11 Ifx__getA11
+#endif
+
+#ifndef __setStackPointer
+#define __setStackPointer Ifx__setStackPointer
+#endif
+
+#ifndef __popcnt
+#define __popcnt Ifx__popcnt
+#endif
+
+#endif
+/******************************************************************************/
+/* *INDENT-ON* */
+/******************************************************************************/
+#endif /* IFXCPU_INTRINSICSTASKING_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_Types.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_Types.h
new file mode 100644
index 0000000..5f93573
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_Types.h
@@ -0,0 +1,227 @@
+/**
+ * \file Ifx_Types.h
+ * \brief This files defines all types used by the IFX HAL and libraries
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#ifndef IFX_TYPES_H
+#define IFX_TYPES_H 1
+
+/******************************************************************************/
+#include "Tricore/Compilers/Compilers.h" /* mapping compiler specific keywords */
+#include "Platform_Types.h"
+
+/*******************************************************************************
+** Global Data Types **
+** (Types not defined by AUTOSAR) **
+*******************************************************************************/
+typedef const char *pchar; /**< \brief const char pointer */
+typedef void *pvoid; /**< \brief void pointer */
+typedef volatile void *vvoid; /**< \brief volatile void pointer */
+typedef void (*voidfuncvoid) (void); /**< \brief void pointer which takes void argument */
+
+typedef struct
+{
+ float32 real; /**< \brief Real part */
+ float32 imag; /**< \brief Imaginary part */
+} cfloat32;
+
+typedef struct
+{
+ sint32 real; /**< \brief Real part */
+ sint32 imag; /**< \brief Imaginary part */
+} csint32;
+
+typedef struct
+{
+ sint16 real; /**< \brief Real part */
+ sint16 imag; /**< \brief Imaginary part */
+} csint16;
+
+typedef sint64 Ifx_TickTime; /**< \brief Time in ticks */
+#define TIME_INFINITE ((Ifx_TickTime)0x7FFFFFFFFFFFFFFFLL)
+#define TIME_NULL ((Ifx_TickTime)0x0000000000000000LL)
+
+#define IFX_ONES (0xFFFFFFFFFFFFFFFFU)
+#define IFX_ZEROS (0x0000000000000000U)
+
+
+#if CFG_LONG_SIZE_T
+#define IFX_SIZET_MAX (0x7FFFFFFFL)
+typedef sint32 Ifx_SizeT; /**< \brief Type used for data stream size */
+#else
+#define IFX_SIZET_MAX (0x7FFF)
+typedef sint16 Ifx_SizeT; /**< \brief Type used for data stream size */
+#endif
+
+/** \brief Circular buffer definition. */
+typedef struct
+{
+ void *base; /**< \brief buffer base address */
+ uint16 index; /**< \brief buffer current index */
+ uint16 length; /**< \brief buffer length*/
+} Ifx_CircularBuffer;
+
+typedef uint16 Ifx_Priority; /**< \brief Used in interrupt service priorities */
+typedef uint32 Ifx_TimerValue; /**< \brief Used in timer values */
+typedef sint32 Ifx_SignedTimerVal; /**< \brief Used in signed timer values */
+
+typedef pvoid Ifx_AddressValue; /**< \brief Used in address values */
+
+typedef struct
+{
+ uint16 priority;
+ uint16 provider;
+} Ifx_IsrSetting;
+
+/** \brief Signal active state definition. */
+typedef enum
+{
+ Ifx_ActiveState_low = 0, /**< \brief The signal is low active */
+ Ifx_ActiveState_high = 1 /**< \brief The signal is high active */
+} Ifx_ActiveState;
+
+typedef enum
+{
+ Ifx_ParityMode_even = 0,
+ Ifx_ParityMode_odd = 1
+} Ifx_ParityMode;
+
+/** \brief input multiplexer definition used in PinMaps
+ */
+typedef enum
+{
+ Ifx_RxSel_a,
+ Ifx_RxSel_b,
+ Ifx_RxSel_c,
+ Ifx_RxSel_d,
+ Ifx_RxSel_e,
+ Ifx_RxSel_f,
+ Ifx_RxSel_g,
+ Ifx_RxSel_h
+} Ifx_RxSel;
+
+/** \brief Module address and index map */
+typedef struct
+{
+ volatile void *module; /**< \brief Module address */
+ sint32 index; /**< \brief Module index */
+} IfxModule_IndexMap;
+
+typedef struct
+{
+ Ifx_TickTime timestamp;
+ uint8 data;
+}Ifx_DataBufferMode_TimeStampSingle;
+
+/*
+ * typedef struct
+ * {
+ * Ifx_TickTime timestamp;
+ * uint8 count[1]; // Number of valid data
+ * uint8 data[7];
+ * }Ifx_DataBufferMode_TimeStampBurst;
+ */
+
+typedef enum
+{
+ Ifx_DataBufferMode_normal = 0, /**< \brief normal mode, each received byte is moved to the rx fifo */
+ Ifx_DataBufferMode_timeStampSingle, /**< \brief Single byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampSingle items. */
+// Ifx_DataBufferMode_timeStameBurst /**< \brief Burst byte type stamp mode. The rx fifo is filled in with Ifx_DataBufferMode_TimeStampBurst items. */
+}Ifx_DataBufferMode;
+
+/**
+ * Defines the PWM modes
+ *
+ * The 1st member shall start with value 0, and the next members value shall be the previous member +1
+ * pwmMode_off shall be the member with the higher index
+ * \note enum order and values should not be modified, except Ifx_Pwm_Mode_init and Ifx_Pwm_Mode_count
+ */
+typedef enum
+{
+ Ifx_Pwm_Mode_centerAligned = 0, /**< \brief Center aligned mode */
+ Ifx_Pwm_Mode_centerAlignedInverted = 1, /**< \brief Center aligned inverted aligned mode */
+ Ifx_Pwm_Mode_leftAligned = 2, /**< \brief Left aligned mode. The PWM period starts with a rising edge */
+ Ifx_Pwm_Mode_rightAligned = 3, /**< \brief Right aligned mode. The PWM period starts with a falling edge*/
+ Ifx_Pwm_Mode_off = 4, /**< \brief All switch open */
+ Ifx_Pwm_Mode_init = 5, /**< \brief Initialisation mode, do not use at run time */
+ Ifx_Pwm_Mode_count /**< \brief Number of defined modes */
+} Ifx_Pwm_Mode;
+
+#ifdef __DCC__
+#include "Ifx_TypesDcc.h"
+
+#elif defined(__TASKING__)
+#include "Ifx_TypesTasking.h"
+
+#elif defined(__HIGHTEC__)
+#include "Ifx_TypesGnuc.h"
+
+#elif defined(__ghs__)
+#include "Ifx_TypesGhs.h"
+
+#elif defined(__MSVC__)
+#include "Ifx_TypesMsvc.h"
+#else
+#error Unsupported compiler.
+#endif
+
+
+typedef struct
+{
+ fract real; /**< \brief Real part */
+ fract imag; /**< \brief Imaginary part */
+} cfract;
+
+typedef struct
+{
+ sfract real; /**< \brief Real part */
+ sfract imag; /**< \brief Imaginary part */
+} csfract;
+
+#define IFX_PI (3.1415926535897932384626433832795f)
+#define IFX_TWO_OVER_PI (2.0 / IFX_PI)
+#define IFX_ONE_OVER_SQRT_THREE (0.57735026918962576450914878050196f)
+#define IFX_SQRT_TWO (1.4142135623730950488016887242097f)
+#define IFX_SQRT_THREE (1.7320508075688772935274463415059f)
+#define IFX_UNUSED_PARAMETER(x) if(x){} /**< \brief Added to handle warning resulting from cases where one/multiple function argument(s) is/are not used(but function signature maintained for legacy purposes). Another use case being usage of intrinsics wherein the compiler ignores it and copy pastes the statements using intrinsics directly to the object file and hence usage of arguments isn't visible to it.(eg: __mfcr() etc) */
+
+#endif /* IFX_TYPES_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesDcc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesDcc.h
new file mode 100644
index 0000000..0149705
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesDcc.h
@@ -0,0 +1,58 @@
+/**
+ * \file Ifx_TypesDcc.h
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+#ifndef IFX_TYPESDDC_H_
+#define IFX_TYPESDDC_H_
+/******************************************************************************/
+#define FRACT_MAX 0x7fffffff
+
+typedef long fract;
+typedef short sfract;
+typedef long long laccum;
+typedef long __packb; //MSMRK should be struct of four chars
+typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
+typedef long __packhw; //MSMRK should be struct of two shorts
+typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
+
+typedef unsigned long long circ_t;
+
+/******************************************************************************/
+#endif /* IFX_TYPESDDC_H_ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesGhs.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesGhs.h
new file mode 100644
index 0000000..7191cfe
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesGhs.h
@@ -0,0 +1,58 @@
+/**
+ * \file Ifx_TypesGhs.h
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+#ifndef IFX_TYPESGHS_H_
+#define IFX_TYPESGHS_H_
+/******************************************************************************/
+#define FRACT_MAX 0x7fffffff
+
+#define __interrupt(intno)
+
+typedef long fract;
+typedef short sfract;
+typedef long long laccum;
+typedef long __packb; //MSMRK should be struct of four chars
+typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
+typedef long __packhw; //MSMRK should be struct of two shorts
+typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
+/******************************************************************************/
+
+#endif /* IFX_TYPESGHS_H_ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesGnuc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesGnuc.h
new file mode 100644
index 0000000..e1b8683
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesGnuc.h
@@ -0,0 +1,59 @@
+/**
+ * \file Ifx_TypesGnuc.h
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+#ifndef IFX_TYPESGNUC_H_
+#define IFX_TYPESGNUC_H_
+/******************************************************************************/
+#define FRACT_MAX 0x7fffffff
+
+#include
+#define __interrupt(intno)
+
+typedef long fract;
+typedef short sfract;
+typedef long long laccum;
+typedef long __packb; //MSMRK should be struct of four chars
+typedef unsigned long __upackb; //MSMRK should be struct of four unsigned chars
+typedef long __packhw; //MSMRK should be struct of two shorts
+typedef unsigned long __upackhw; //MSMRK should be struct of two unsigned shorts
+/******************************************************************************/
+
+#endif /* IFX_TYPESGNUC_H_ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesTasking.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesTasking.h
new file mode 100644
index 0000000..2fc9611
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Ifx_TypesTasking.h
@@ -0,0 +1,53 @@
+/**
+ * \file Ifx_TypesTasking.h
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+#ifndef IFX_TYPESTASKING_H_
+#define IFX_TYPESTASKING_H_
+/******************************************************************************/
+#define fract __fract // see http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf
+#define sfract __sfract // see http://www.open-std.org/jtc1/sc22/wg14/www/docs/n1169.pdf
+#define laccum __laccum
+#define __asm__ __asm
+/******************************************************************************/
+
+/******************************************************************************/
+
+#endif /* IFX_TYPESTASKING_H_ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Platform_Types.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Platform_Types.h
new file mode 100644
index 0000000..7490dae
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Std/Platform_Types.h
@@ -0,0 +1,187 @@
+/*******************************************************************************
+** **
+** Copyright (C) Infineon Technologies (2018) **
+** **
+** All rights reserved. **
+** **
+** This document contains proprietary information belonging to Infineon **
+** Technologies. Passing on and copying of this document, and communication **
+** of its contents is not permitted without prior written authorization. **
+** **
+********************************************************************************
+** **
+** FILENAME : Platform_Types.h **
+** **
+** VERSION : 2.0.0 **
+** **
+** DATE : 2017-03-26 **
+** **
+** VARIANT : NA **
+** **
+** PLATFORM : Infineon AURIX2G **
+** **
+** AUTHOR : DL-AUTOSAR-Engineering **
+** **
+** VENDOR : Infineon Technologies **
+** **
+** TRACEABILITY : [cover parentID={523013F2-B3A6-4ac7-8ADD-5A4284CE656E}] **
+** **
+** DESCRIPTION : Autosar Standard type definitions for the platform **
+** **
+** [/cover] **
+** **
+** SPECIFICATION(S) : AUTOSAR_SWS_PlatformTypes.pdf, AUTOSAR Release 4.2.2 **
+** **
+** MAY BE CHANGED BY USER : no **
+** **
+*******************************************************************************/
+#ifndef PLATFORM_TYPES_H
+#define PLATFORM_TYPES_H
+
+/******************************************************************************
+** Includes **
+******************************************************************************/
+
+/******************************************************************************
+** Global Macro Definitions **
+******************************************************************************/
+#define PLATFORM_VENDOR_ID (17u)
+#define PLATFORM_AR_RELEASE_MAJOR_VERSION (4u)
+#define PLATFORM_AR_RELEASE_MINOR_VERSION (2u)
+#define PLATFORM_AR_RELEASE_REVISION_VERSION (2u)
+#define PLATFORM_SW_MAJOR_VERSION (1u)
+#define PLATFORM_SW_MINOR_VERSION (0u)
+#define PLATFORM_SW_PATCH_VERSION (0u)
+
+/* [cover parentID={5294D975-045A-4d91-9A1A-B1765FAB4653}] */
+/* CPU register width type definition */
+#define CPU_TYPE_8 (8u)
+#define CPU_TYPE_16 (16u)
+#define CPU_TYPE_32 (32u)
+/* Register width of CPU*/
+#define CPU_TYPE CPU_TYPE_32 /* 32 bit */
+/* [/cover] */
+
+
+/* [cover parentID={FBA2FA55-430B-4dfb-82B1-C791F0878F9B}] */
+/* Bit order type definition*/
+#define MSB_FIRST (0u) /* Big Endian bit ordering */
+#define LSB_FIRST (1u) /* Little Endian bit ordering */
+/* Bit order of Register level*/
+#define CPU_BIT_ORDER LSB_FIRST /* Little Endian */
+/* [/cover] */
+
+
+/* [cover parentID={0E2E6A28-264A-4d32-96EE-5F5C93286311}] */
+/* Byte order type definition*/
+#define HIGH_BYTE_FIRST (0u) /* Big Endian byte ordering */
+#define LOW_BYTE_FIRST (1u) /* Little Endian byte ordering */
+/* Byte order on Memory level*/
+#define CPU_BYTE_ORDER LOW_BYTE_FIRST /* Little Endian */
+/* [/cover] */
+
+
+/* TRUE, FALSE symbol for Boolean types*/
+/* [cover parentID={FF7F9840-8904-4b7d-83A7-988524B795DE}] */
+#ifndef TRUE
+#define TRUE (1u)
+#endif
+#ifndef FALSE
+#define FALSE (0u)
+#endif
+/* [/cover] */
+/******************************************************************************
+** Global Type Definitions **
+******************************************************************************/
+/* AUTOSAR integer data types*/
+
+/* unsigned char with a bit length that is the shortest one natively supported
+ by the platform.*/
+/* [cover parentID={F7B51F71-6687-4e05-8408-7F5AAC55C638}] boolean [/cover]*/
+typedef unsigned char boolean; /* for use with TRUE/FALSE */
+
+/* 8bit unsigned : 0 .. 255 [0X00 .. 0XFF]*/
+/* [cover parentID={4269E5AB-7F28-4803-8D60-7B4EC91CB087}] uint8 [/cover] */
+typedef unsigned char uint8;
+
+/* 16bit unsigned: 0..65535 [0x0000..0xFFFF]*/
+/* [cover parentID={66E964CA-35D5-4013-BB61-1E824636D713}] uint16 [/cover] */
+typedef unsigned short uint16;
+
+/* 32bit unsigned: 0..4294967295 [0x00000000..0xFFFFFFFF]*/
+/* [cover parentID={DA33B7A0-7CD3-45e7-9C9A-6D63FB8BA3DC}] uint32 [/cover] */
+typedef unsigned long uint32;
+
+/* 64bit unsigned
+* 0..18446744073709551615 [0x0000000000000000..0xFFFFFFFFFFFFFFFF]*/
+/* [cover parentID={3409E2A3-BF2D-44a5-9B00-A72300848166}] uint64 */
+typedef unsigned long long uint64;
+
+/* 8bit signed, 7 bit + 1 bit sign -128..+127 [0x80..0x7F]*/
+/* [cover parentID={94E0756B-993D-4cae-9499-416CDFD6FEAF}] sint8[/cover]*/
+typedef signed char sint8;
+
+/* 16bit signed, 15 bit + 1 bit sign -32768..+32767 [0x8000..0x7FFF]*/
+/* [cover parentID={B3482DFF-8DFF-41bd-95E0-0406E2451CB0}] sint16 [/cover]*/
+typedef short sint16;
+
+/* 32bit signed, 31 bit + 1 bit sign
+ -2147483648..+2147483647 [0x80000000..0x7FFFFFFF]*/
+/* [cover parentID={B027B471-A1A2-456c-A015-35F4A34A88EF}] sint32 [/cover]*/
+typedef long sint32;
+/*
+* 64bit signed, 63 bit + 1 bit sign
+* -9223372036854775808..9223372036854775807
+* [0x8000000000000000..0x7FFFFFFFFFFFFFFF]
+*/
+/* [cover parentID={3CF3471C-EB1A-450c-B78F-4B96D226A1F5}] sint64 [/cover]*/
+typedef long long sint64;
+
+/* At least 8 bit*/
+/* [cover parentID={F8719785-0A16-486e-AB85-0A2859402037}] uint8_least[/cover]*/
+typedef unsigned long uint8_least;
+
+/* At least 16 bit*/
+/* [cover parentID={BEAD868D-0EC1-44f0-AFEE-B57401CC9E65}]uint16_least[/cover]*/
+typedef unsigned long uint16_least;
+
+/* least 32 bit*/
+/* [cover parentID={9B9CC46A-0F61-4d25-8001-679CF210C135}]uint32_least[/cover]*/
+typedef unsigned long uint32_least;
+
+/* At least 7 bit + 1 bit sign*/
+/* [cover parentID={5C0DE046-8407-4708-8D26-41B96731D89D}]sint8_least[/cover]*/
+typedef signed long sint8_least;
+
+/* At least 15 bit + 1 bit sign*/
+/* [cover parentID={0A83DB6E-ECD8-42f0-B97C-057F9FBFEB6E}]sint16_least[/cover]*/
+typedef signed long sint16_least;
+
+/* At least 31 bit + 1 bit sign*/
+/* [cover parentID={A65F0248-A0A7-4ab7-BAFA-A5428F4E8A96}]sint32_least[/cover]*/
+typedef signed long sint32_least;
+
+/* IEEE754-2008 single precision
+* -3.4028235e+38..+3.4028235e+38*/
+/* [cover parentID={BBC4F70E-DA81-4d37-BCA4-628A89B29517}] float32 [/cover]*/
+typedef float float32; /* IEEE754-2008 single precision */
+
+/* IEEE754-2008 double precision
+* -1.7976931348623157e+308..+1.7976931348623157e+308*/
+/* [cover parentID={0D62172C-9309-493a-8028-06A7299D7906}] float64 [/cover]*/
+typedef double float64; /* IEEE754-2008 double precision */
+
+
+/******************************************************************************
+** Global Constant Declarations **
+******************************************************************************/
+
+/******************************************************************************
+** Global Variable Declarations **
+******************************************************************************/
+
+/******************************************************************************
+** Global Function Declarations **
+******************************************************************************/
+
+#endif /* PLATFORM_TYPES_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Trap/IfxCpu_Trap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Trap/IfxCpu_Trap.c
new file mode 100644
index 0000000..02c7cb5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Trap/IfxCpu_Trap.c
@@ -0,0 +1,483 @@
+/**
+ * \file IfxCpu_Trap.c
+ * \brief This file contains the APIs for Trap related functions.
+ *
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/*******************************************************************************
+** Includes **
+*******************************************************************************/
+#include "IfxCpu_Trap.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxCpu_reg.h"
+#include "Ifx_Cfg.h"
+#include "zf_common_debug.h"
+#ifdef IFX_CFG_EXTEND_TRAP_HOOKS
+#include "Ifx_Cfg_Trap.h"
+#endif
+
+/******************************************************************************/
+/* Macros */
+/******************************************************************************/
+/** \brief Configuration for CpuX enable.
+ *
+ */
+#ifndef IFX_CFG_CPU_TRAP_TSR_HOOK
+# define IFX_CFG_CPU_TRAP_TSR_HOOK(trapWatch) /**< By default macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK
+# define IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK
+# define IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK
+# define IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK
+# define IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK
+# define IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK
+# define IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch) ((void)trapWatch) /**< By default macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_NMI_HOOK
+# define IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch) ((void)trapWatch) /**< By default NMI macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_MME_HOOK
+# define IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch) ((void)trapWatch) /**< By default memory Management Error macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_IPE_HOOK
+# define IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch) ((void)trapWatch) /**< By default internal Protection Error macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_IE_HOOK
+# define IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch) ((void)trapWatch) /**< By default instruction Error macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_CME_HOOK
+# define IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch) ((void)trapWatch) /**< By default context Management Error macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_BE_HOOK
+# define IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch) ((void)trapWatch) /**< By default bus Error macro is empty*/
+#endif
+#ifndef IFX_CFG_CPU_TRAP_ASSERT_HOOK
+# define IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch) ((void)trapWatch) /**< By default assertion is empty*/
+#endif
+
+#ifndef IFX_CFG_CPU_TRAP_DEBUG
+ #define IFX_CFG_CPU_TRAP_DEBUG __debug()
+#endif
+/*******************************************************************************
+** variables **
+*******************************************************************************/
+
+/*******************************************************************************
+** Function definitions **
+*******************************************************************************/
+IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo(uint8 trapClass, uint32 tin)
+{
+ IfxCpu_Trap trapInfo;
+ trapInfo.tAddr = (unsigned int)__getA11();
+ trapInfo.tClass = trapClass;
+ trapInfo.tId = tin;
+ trapInfo.tCpu = IfxCpu_getCoreId();
+ return trapInfo;
+}
+
+
+void IfxCpu_Trap_memoryManagementError(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_memoryManagement, tin);
+ IFX_CFG_CPU_TRAP_MME_HOOK(trapWatch);
+
+ IFX_CFG_CPU_TRAP_DEBUG;
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+
+
+void IfxCpu_Trap_internalProtectionError(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_internalProtection, tin);
+ IFX_CFG_CPU_TRAP_IPE_HOOK(trapWatch);
+
+ // 如果单片机卡死在这里，则说明单片机访问到了空的内存位置，也就是常说的访问越界
+
+ IFX_CFG_CPU_TRAP_DEBUG;
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+
+
+void IfxCpu_Trap_instructionError(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_instructionErrors, tin);
+ IFX_CFG_CPU_TRAP_IE_HOOK(trapWatch);
+ IFX_CFG_CPU_TRAP_DEBUG;
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+
+
+void IfxCpu_Trap_contextManagementError(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_contextManagement, tin);
+ IFX_CFG_CPU_TRAP_CME_HOOK(trapWatch);
+ IFX_CFG_CPU_TRAP_DEBUG;
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+
+
+void IfxCpu_Trap_busError(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_bus, tin);
+ IFX_CFG_CPU_TRAP_BE_HOOK(trapWatch);
+
+ // 如果单片机卡死在了这里 可能是使用了未初始化的外设资源
+ // 举个例子，没调用pwm_init初始化函数，然后直接调用pwm_set_duty来赋值输出
+ // 也可能是访问内存失败导致 如果访问失败请仔细检查使用指针访问数据的地方
+
+ IFX_CFG_CPU_TRAP_DEBUG;
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+
+
+void IfxCpu_Trap_assertion(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_assertion, tin);
+ IFX_CFG_CPU_TRAP_ASSERT_HOOK(trapWatch);
+ IFX_CFG_CPU_TRAP_DEBUG;
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+
+
+void IfxCpu_Trap_systemCall_Cpu0(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
+ IFX_CFG_CPU_TRAP_SYSCALL_CPU0_HOOK(trapWatch);
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+
+#if IFXCPU_NUM_MODULES >= 2
+void IfxCpu_Trap_systemCall_Cpu1(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
+ IFX_CFG_CPU_TRAP_SYSCALL_CPU1_HOOK(trapWatch);
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+#endif
+
+#if IFXCPU_NUM_MODULES >= 3
+void IfxCpu_Trap_systemCall_Cpu2(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
+ IFX_CFG_CPU_TRAP_SYSCALL_CPU2_HOOK(trapWatch);
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+#endif
+
+#if IFXCPU_NUM_MODULES >= 4
+void IfxCpu_Trap_systemCall_Cpu3(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
+ IFX_CFG_CPU_TRAP_SYSCALL_CPU3_HOOK(trapWatch);
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+#endif
+
+#if IFXCPU_NUM_MODULES >= 5
+void IfxCpu_Trap_systemCall_Cpu4(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
+ IFX_CFG_CPU_TRAP_SYSCALL_CPU4_HOOK(trapWatch);
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+#endif
+
+#if IFXCPU_NUM_MODULES >= 6
+void IfxCpu_Trap_systemCall_Cpu5(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_systemCall, tin);
+ IFX_CFG_CPU_TRAP_SYSCALL_CPU5_HOOK(trapWatch);
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+#endif
+
+void IfxCpu_Trap_nonMaskableInterrupt(uint32 tin)
+{
+ volatile IfxCpu_Trap trapWatch;
+ trapWatch = IfxCpu_Trap_extractTrapInfo(IfxCpu_Trap_Class_nonMaskableInterrupt, tin);
+ IFX_CFG_CPU_TRAP_NMI_HOOK(trapWatch);
+ __asm("rslcx"); /* Restore lower context before returning. lower context was stored in the trap vector */
+ __asm("rfe");
+}
+
+
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".traptab_cpu0" awx
+#pragma GCC optimize ("O2")
+#endif
+#if defined(__DCC__)
+#pragma section
+#pragma section CODE ".traptab_cpu0" X
+#endif
+#if defined(__TASKING__)
+#pragma protect on
+#pragma section code "traptab_cpu0"
+#endif
+#if defined(__ghs__)
+#pragma ghs section
+#pragma ghs section text=".traptab_cpu0"
+#endif
+void IfxCpu_Trap_vectorTable0(void)
+{
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu0);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
+}
+
+
+#if IFXCPU_NUM_MODULES >= 2
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".traptab_cpu1" awx
+#endif
+#if defined(__DCC__)
+#pragma section
+#pragma section CODE ".traptab_cpu1" X
+#endif
+#if defined(__TASKING__)
+#pragma section code "traptab_cpu1"
+#endif
+#if defined(__ghs__)
+#pragma ghs section
+#pragma ghs section text=".traptab_cpu1"
+#endif
+void IfxCpu_Trap_vectorTable1(void)
+{
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu1);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
+}
+
+
+#endif
+
+#if IFXCPU_NUM_MODULES >= 3
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".traptab_cpu2" awx
+#endif
+#if defined(__DCC__)
+#pragma section
+#pragma section CODE ".traptab_cpu2" X
+#endif
+#if defined(__TASKING__)
+#pragma section code "traptab_cpu2"
+#endif
+#if defined(__ghs__)
+#pragma ghs section
+#pragma ghs section text=".traptab_cpu2"
+#endif
+
+void IfxCpu_Trap_vectorTable2(void)
+{
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu2);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
+}
+
+
+#endif
+
+#if IFXCPU_NUM_MODULES >= 4
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".traptab_cpu3" awx
+#endif
+#if defined(__DCC__)
+#pragma section
+#pragma section CODE ".traptab_cpu3" X
+#endif
+#if defined(__TASKING__)
+#pragma section code "traptab_cpu3"
+#endif
+#if defined(__ghs__)
+#pragma ghs section
+#pragma ghs section text=".traptab_cpu3"
+#endif
+
+
+void IfxCpu_Trap_vectorTable3(void)
+{
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu3);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
+}
+
+
+#endif
+
+#if IFXCPU_NUM_MODULES >= 5
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".traptab_cpu4" awx
+#endif
+#if defined(__DCC__)
+#pragma section
+#pragma section CODE ".traptab_cpu4" X
+#endif
+#if defined(__TASKING__)
+#pragma section code "traptab_cpu4"
+#endif
+#if defined(__ghs__)
+#pragma ghs section
+#pragma ghs section text=".traptab_cpu4"
+#endif
+
+void IfxCpu_Trap_vectorTable4(void)
+{
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu4);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
+}
+
+
+#endif
+
+#if IFXCPU_NUM_MODULES >= 6
+#if defined(__HIGHTEC__)
+#pragma section
+#pragma section ".traptab_cpu5" awx
+#endif
+#if defined(__DCC__)
+#pragma section
+#pragma section CODE ".traptab_cpu5" X
+#endif
+#if defined(__TASKING__)
+#pragma section code "traptab_cpu5"
+#endif
+#if defined(__ghs__)
+#pragma ghs section
+#pragma ghs section text=".traptab_cpu5"
+#endif
+
+void IfxCpu_Trap_vectorTable5(void)
+{
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_memoryManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_internalProtectionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_instructionError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_contextManagementError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_busError);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_assertion);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_systemCall_Cpu5);
+ IfxCpu_Tsr_CallTSR(IfxCpu_Trap_nonMaskableInterrupt);
+}
+
+
+#endif
+
+#if defined(__HIGHTEC__)
+#pragma section
+#endif
+#if defined(__DCC__)
+#pragma section
+#endif
+#if defined(__DCC__)
+#pragma interrupt IfxInterruptEx
+#endif
+#if defined(__TASKING__)
+#pragma endprotect
+#endif
+#if defined(__ghs__)
+#pragma ghs section
+#endif
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Trap/IfxCpu_Trap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Trap/IfxCpu_Trap.h
new file mode 100644
index 0000000..dc08682
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Trap/IfxCpu_Trap.h
@@ -0,0 +1,436 @@
+/**
+ * \file IfxCpu_Trap.c
+ * \brief This file contains the APIs for Trap related functions.
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Cpu_Trap Trap Functions
+ * \ingroup IfxLld_Cpu
+ *
+ * \defgroup IfxLld_Cpu_Trap_Hooks Trap Function Hooks
+ * \ingroup IfxLld_Cpu_Trap
+ *
+ * \defgroup IfxLld_Cpu_Trap_Usage How to use the Trap Function Hooks?
+ * \ingroup IfxLld_Cpu_Trap
+ *
+ */
+
+#ifndef IFXCPU_TRAPS_H_
+#define IFXCPU_TRAPS_H_
+
+/*******************************************************************************
+** Includes **
+*******************************************************************************/
+#include "Cpu/Std/Ifx_Types.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "Ifx_Cfg.h"
+
+/*******************************************************************************
+** Type definitions **
+*******************************************************************************/
+/** \addtogroup IfxLld_Cpu_Trap_Hooks
+ * \{ */
+
+/** \brief Enum for available Trap classes.
+ *
+ */
+typedef enum
+{
+ IfxCpu_Trap_Class_memoryManagement = 0U,
+ IfxCpu_Trap_Class_internalProtection = 1U,
+ IfxCpu_Trap_Class_instructionErrors = 2U,
+ IfxCpu_Trap_Class_contextManagement = 3U,
+ IfxCpu_Trap_Class_bus = 4U,
+ IfxCpu_Trap_Class_assertion = 5U,
+ IfxCpu_Trap_Class_systemCall = 6U,
+ IfxCpu_Trap_Class_nonMaskableInterrupt = 7U
+} IfxCpu_Trap_Class;
+
+/** \brief Enum for available Identification numbers under Memory Management Trap.
+ *
+ */
+typedef enum
+{
+ IfxCpu_Trap_MemoryManagement_Id_virtualAddressFill = 0U,
+ IfxCpu_Trap_MemoryManagement_Id_virtualAddressProtection = 1U,
+} IfxCpu_Trap_MemoryManagement_Id;
+
+/** \brief Enum for available Identification numbers under Internal Protection Trap.
+ *
+ */
+typedef enum
+{
+ IfxCpu_Trap_InternalProtection_Id_privilegeViolation = 1U,
+ IfxCpu_Trap_InternalProtection_Id_memoryProtectionRead = 2U,
+ IfxCpu_Trap_InternalProtection_Id_memoryProtectionWrite = 3U,
+ IfxCpu_Trap_InternalProtection_Id_memoryProtectionExecute = 4U,
+ IfxCpu_Trap_InternalProtection_Id_memoryProtectionPeripheralAccess = 5U,
+ IfxCpu_Trap_InternalProtection_Id_memoryProtectionNullAddress = 6U,
+ IfxCpu_Trap_InternalProtection_Id_globalRegisterWriteProtection = 7U,
+} IfxCpu_Trap_InternalProtection_Id;
+
+/** \brief Enum for available Identification numbers under Instruction Errors Trap.
+ *
+ */
+typedef enum
+{
+ IfxCpu_Trap_InstructionErrors_Id_illegalOpcode = 1U,
+ IfxCpu_Trap_InstructionErrors_Id_unimplementedOpcode = 2U,
+ IfxCpu_Trap_InstructionErrors_Id_invalidOperand = 3U,
+ IfxCpu_Trap_InstructionErrors_Id_dataAddressAlignment = 4U,
+ IfxCpu_Trap_InstructionErrors_Id_invalidMemoryAddress = 5U,
+} IfxCpu_Trap_InstructionErrors_Id;
+
+/** \brief Enum for available Identification numbers under Context Management Trap.
+ *
+ */
+typedef enum
+{
+ IfxCpu_Trap_ContextManagement_Id_freeContextListDepletion = 1U,
+ IfxCpu_Trap_ContextManagement_Id_callDepthOverflow = 2U,
+ IfxCpu_Trap_ContextManagement_Id_callDepthUnderflow = 3U,
+ IfxCpu_Trap_ContextManagement_Id_freeContextListUnderflow = 4U,
+ IfxCpu_Trap_ContextManagement_Id_callStackUnderflow = 5U,
+ IfxCpu_Trap_ContextManagement_Id_contextType = 6U,
+ IfxCpu_Trap_ContextManagement_Id_nestingError = 7U,
+} IfxCpu_Trap_ContextManagement_Id;
+
+/** \brief Enum for available Identification numbers under Bus Trap.
+ *
+ */
+typedef enum
+{
+ IfxCpu_Trap_Bus_Id_programFetchSynchronousError = 1U,
+ IfxCpu_Trap_Bus_Id_dataAccessSynchronousError = 2U,
+ IfxCpu_Trap_Bus_Id_dataAccessAsynchronousError = 3U,
+ IfxCpu_Trap_Bus_Id_CoprocessorTrapAsynchronousError = 4U,
+ IfxCpu_Trap_Bus_Id_programMemoryIntegrityError = 5U,
+ IfxCpu_Trap_Bus_Id_dataMemoryIntegrityError = 6U,
+ IfxCpu_Trap_Bus_Id_temporalAsynchronousError = 7U,
+} IfxCpu_Trap_Bus_Id;
+
+/** \brief Enum for available Identification numbers under Assertion Trap.
+ *
+ */
+typedef enum
+{
+ IfxCpu_Trap_Assertion_Id_arithmeticOverflow = 1U,
+ IfxCpu_Trap_Assertion_Id_stickyArithmeticOverflow = 2U,
+} IfxCpu_Trap_Assertion_Id;
+
+/** \brief Type for Identification numbers under SystemCall Trap.
+ *
+ */
+typedef sint32 IfxCpu_Trap_SystemCall_Id;
+
+/** \brief Type for Identification number for Non Maskable Interrupt Trap.
+ *
+ */
+typedef sint32 IfxCpu_Trap_NonMaskableInterrupt_Id;
+
+/** \brief Union to abstract Identification numbers under Traps.
+ *
+ */
+typedef union
+{
+ IfxCpu_Trap_MemoryManagement_Id memoryManagement;
+ IfxCpu_Trap_InternalProtection_Id internalProtection;
+ IfxCpu_Trap_InstructionErrors_Id instructionErrors;
+ IfxCpu_Trap_ContextManagement_Id contextManagement;
+ IfxCpu_Trap_Bus_Id bus;
+ IfxCpu_Trap_Assertion_Id assertion;
+ IfxCpu_Trap_SystemCall_Id systemCall;
+ IfxCpu_Trap_NonMaskableInterrupt_Id nonMaskableInterrupt;
+} IfxCpu_Trap_Id;
+
+/** \brief Structure to contain the trap information.
+ *
+ */
+typedef struct
+{
+ unsigned int tAddr;
+ unsigned int tId : 8;
+ unsigned int tClass : 8;
+ unsigned int tCpu : 3;
+} IfxCpu_Trap;
+
+/*******************************************************************************
+** Global Exported variables/constants **
+*******************************************************************************/
+
+/*******************************************************************************
+** Global Exported macros/inlines/function ptototypes **
+*******************************************************************************/
+/** \brief Macro to define the trap vector table.
+ * This macro is provided to define the trap vector table in the frameowrk. User shall not use
+ * this macro.
+ * Refer to the documentation to extend the trap with hook functions. \ref IfxLld_Cpu_Trap_Usage
+ */
+#if defined(__HIGHTEC__)
+#define __ALIGN_TRAP_TAB__ __asm(" .align 5");
+#define IfxCpu_Tsr_CallTSR(serviceRoutine) \
+ { \
+ __ALIGN_TRAP_TAB__; \
+ __asm("svlcx\n"); \
+ __asm("mov\t %d4, %d15"); \
+ __asm("ji\t %0" : : "a" (serviceRoutine)); \
+ __asm("rfe"); \
+ }
+#elif defined(__ghs__)
+#define __ALIGN_TRAP_TAB__ __asm(" .align 32");
+#define IfxCpu_Tsr_CallTSR(serviceRoutine) \
+ { \
+ __ALIGN_TRAP_TAB__; \
+ __asm("svlcx\n"); \
+ __asm("mov\t d4, d15"); \
+ __asm("ji\t %0" : : "a" (serviceRoutine)); \
+ __asm("rfe"); \
+ }
+#elif defined(__DCC__)
+#define IfxCpu_Tsr_CallTSR(serviceRoutine) \
+ { \
+ __ALIGN_TRAP_TAB__; \
+ __asm("\n#$$bp\n"); \
+ __asm("svlcx\n"); \
+ __asm(" movh.a\t %a15,"#serviceRoutine "@ha\n"); \
+ __asm(" lea\t %a15,[%a15]"#serviceRoutine "@l\n"); \
+ __asm(" mov\t %d4,%d15\n"); \
+ __asm(" ji\t %a15\n"); \
+ __asm(" rfe"); \
+ __asm("#$$ep"); \
+ }
+#define __ALIGN_TRAP_TAB__ __asm(" .align 5");
+#elif defined(__TASKING__)
+#define IfxCpu_Tsr_CallTSR(serviceRoutine) \
+ { \
+ __ALIGN_TRAP_TAB__; \
+ __asm("svlcx\n\tmov\td4,d15\n\tji\t%0\n" : : "a" (serviceRoutine) : "d4", "d15"); \
+ }
+#define __ALIGN_TRAP_TAB__ __asm(" .align 32");
+#endif
+
+/** \} */
+
+/*Documentation */
+/** \addtogroup IfxLld_Cpu_Trap_Usage
+ * \{
+ *
+ * This page describes how to use the trap function hooks with application framework.\n
+ * Framework has built in Trap Service Routines, which has minimal set of debug information.
+ * The execution of trap service is as below,\n
+ * 1) When a trap occurs, a variable "trapInfo" is updated with the information:\n
+ * a. Which CPU caused this trap,\n
+ * b. What is the trap address, trap class and\n
+ * c. What is the trap identification number\n
+ * 2) Call to a configurable hook function, passing structure trapInfo as parameter.\n
+ * 3) Then debug instruction executed.\n
+ * 4) Returning from the trap. (This instruction is not reached if debugger is connected because of
+ * "debug" instruction before)\n
+ * For normal cases during development, where user works with debugger, user can watch the structure variable
+ * "trapInfo" in the debugger.
+ *
+ * In case, user wants to make use of the information of trap for further processing,\n
+ * extend the traps, using the hook functions provided.
+ *
+ * \section IfxLld_Cpu_Trap_Hooks Extending the traps with hook functions.
+ *
+ * If the trap extensions are to be extended, it is very important to enable this feature. By default this
+ * feature is disabled.
+ *
+ * \subsection IfxLld_Cpu_Trap_Hooks_EnableExtn How to enable the trap extension feature?
+ * To extend the trap hook functions user must enable this feature by defining the macro
+ * "IFX_CFG_EXTEND_TRAP_HOOKS" in Ifx_Cfg.h, as shown below.
+ * \code
+ * //file: Ifx_Cfg.h
+ *
+ * #define IFX_CFG_EXTEND_TRAP_HOOKS
+ *
+ * \endcode
+ * Now the compiler will accept the further configurations to extend the hooks.\n
+ * Ifx_Cfg_Trap.h file shall be used to extend the traps. This provides two kind of hook functions.
+ * ie. Hook for error traps and hooks (per CPU available) for system calls.
+ *
+ * \subsection IfxLld_Cpu_Trap_ErrorHooks Extending the "Error traps" with hook function.
+ * Error trap occurs as a result of an error event such as an instruction error, memory-management error
+ * or an illegal access.\n
+ * To extend the error traps, following steps are to be followed:\n
+ * \subsubsection IfxLld_Cpu_Trap_ErrorHooksStep1 Step1: Define a routine to substitute the hook for error traps.
+ * This definition shall be as user defined code (Generally in DemoApps folder).\n
+ * Considerations:\n
+ * 1. Format: IFX_INLINE void \(IfxCpu_Trap trapInfo)
+ * \note Define such a routine with the consideration that the trap extension hook is not a function. In case
+ * of context management error, this extension itself will not call any other function.
+ *
+ * 2. Use the information trapInfo, which is available as parameter passed to this hook and process further.
+ * Example code in a user defined file eg. Ifx_TrapExtension.h,
+ * \code
+ * //Example "inlined" function for trap Extension Hook.
+ * IFX_INLINE myTrapExtensionHook(IfxCpu_Trap trapInfo)
+ * {
+ * switch (trapInfo.tClass)
+ * {
+ * case IfxCpu_Trap_Class_memoryManagement:
+ * {
+ * //user code: Function calls allowed.
+ * break;
+ * }
+ * case IfxCpu_Trap_Class_internalProtection:
+ * {
+ * //user code: Function calls allowed.
+ * break;
+ * }
+ * case IfxCpu_Trap_Class_instructionErrors:
+ * {
+ * //user code: Function calls allowed.
+ * break;
+ * }
+ * case IfxCpu_Trap_Class_contextManagement:
+ * {
+ * //user code: Function calls NOT allowed.
+ * break;
+ * }
+ * case IfxCpu_Trap_Class_bus:
+ * {
+ * //user code: Function calls allowed.
+ * break;
+ * }
+ * case IfxCpu_Trap_Class_assertion:
+ * {
+ * //user code: Function calls allowed.
+ * break;
+ * }
+ * case IfxCpu_Trap_Class_nonMaskableInterrupt:
+ * {
+ * //user code: Function calls allowed.
+ * break;
+ * }
+ * case default:
+ * {
+ * break;
+ * }
+ * }
+ * }
+ * \endcode
+ * \note The error trap functions execute the debug instruction immediately after returning from extension hooks.
+ *
+ * \subsubsection IfxLld_Cpu_Trap_ErrorHooksStep2 Step2: Configure error trap hook extension function.
+ * Configure error trap hook extension function as defined above to the macro as below:
+ * \note Configuration of hook extension is available in Ifx_Cfg_Trap.h
+ *
+ * \code
+ * //file: Ifx_Cfg_Trap.h
+ *
+ * #include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
+ *
+ * #define IFX_CFG_CPU_TRAP_TSR_HOOK(trapInfo) myTrapExtensionHook(trapInfo) //This is INLINE function.
+ *
+ * \endcode
+ * \note The exten hooks are effective only if the feature is enabled.
+ *
+ * \subsection IfxLld_Cpu_Trap_SysCallHooks Extending the cpu specific "system call" hook functions.
+ * Tricore architecture provides the system call trap which is executed by software trigger. The instruction "syscall"
+ * triggers this trap. Please refer Tricore architecture manual for more details.\n
+ * IfxCpu_trap driver provide hook function for each CPU separately. To extend System Call trap following steps
+ * are to be followed:\n
+ * \subsubsection IfxLld_Cpu_Trap_SysCallHooksStep1 Step1: Define routine/s to substitute the hook/s for System Call trap.
+ * This definition shall be as user defined code (Generally in DemoApps folder).\n
+ * Considerations:\n
+ * 1. Format: void \(IfxCpu_Trap trapInfo)
+ * It is allowed to define this trap extension as function definition, because this trap is not triggered due to any error.
+ * Depending on the application requirement, define single or per CPU instance of the extension.
+ *
+ * 2. Use the information trapInfo which is available as parameter passed to this hook and process further. The parameter
+ * passed, with syscall instruction, will be trap identification number (refer to Tricore architecture manual for more details).
+ * \note To hook extension, information about trap identification number is available through parameter "trapInfo".
+ *
+ * Example code in a user defined file eg. Ifx_TrapExtension.h,
+ * \code
+ * //Example function for System Call Extension Hook.
+ * IFX_INLINE mySysCallExtensionHook(IfxCpu_Trap trapInfo)
+ * {
+ * switch (trapInfo.tId)
+ * {
+ * case 0:
+ * {
+ * //user code: Function calls allowed.
+ * break;
+ * }
+ * case 1:
+ * {
+ * //user code: Function calls allowed.
+ * break;
+ * }
+ * // and so on..
+ * case default:
+ * {
+ * break;
+ * }
+ * }
+ * }
+ * \endcode
+ *
+ * \subsubsection IfxLld_Cpu_Trap_SysCallHooksStep2 Step2: Configure the extension function.\n
+ * Configure the hook extension function defined above, to the macro as below:
+ * \note Configuration of hook extension is available in Ifx_Cfg_Trap.h
+ * \code
+ * //file: Ifx_Cfg_Trap.h
+ *
+ * #include "Ifx_TrapExtension.h" //Assuming this is the file name as in above example
+ *
+ * #define IFXCPU_TRAP_CFG_SYSCALL_CPU0_HOOK(trapInfo) mySysCallExtensionHook(trapInfo)
+ *
+ * #define IFXCPU_TRAP_CFG_SYSCALL_CPU1_HOOK(trapInfo) // Not used in this example
+ *
+ * #define IFXCPU_TRAP_CFG_SYSCALL_CPU2_HOOK(trapInfo) // Not used in this example
+ *
+ * #define IFXCPU_TRAP_CFG_SYSCALL_CPU3_HOOK(trapInfo) // Not used in this example
+ *
+ * #define IFXCPU_TRAP_CFG_SYSCALL_CPU4_HOOK(trapInfo) // Not used in this example
+ *
+ * #define IFXCPU_TRAP_CFG_SYSCALL_CPU5_HOOK(trapInfo) // Not used in this example
+ *
+ * \endcode
+ *
+ * \note The exten hooks are effective only if this feature is enabled.
+ *
+ */
+/** \} */
+
+#endif /* IFXCPU_TRAPS_H_ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Dma/IfxDma_Dma.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Dma/IfxDma_Dma.c
new file mode 100644
index 0000000..77fcb76
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Dma/IfxDma_Dma.c
@@ -0,0 +1,241 @@
+/**
+ * \file IfxDma_Dma.c
+ * \brief DMA DMA details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxDma_Dma.h"
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief local function to copy a transaction set into DMA channel SFRs or memory location (for linked lists)
+ * \param channel Specifies the pointer to DMA channel registers
+ * \param config pointer to the DMA default channel configuration structure
+ * \return None
+ */
+IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config);
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+IFX_STATIC void IfxDma_Dma_configureTransactionSet(Ifx_DMA_CH *channel, const IfxDma_Dma_ChannelConfig *config)
+{
+ /* shadow address shall be 32-Byte Aligned */
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, ((config->shadowAddress & 0x1F) == 0U));
+ }
+
+ {
+ Ifx_DMA_CH_CHCFGR chcfgr;
+ chcfgr.U = 0;
+ chcfgr.B.TREL = config->transferCount;
+ chcfgr.B.BLKM = config->blockMode;
+ chcfgr.B.RROAT = config->requestMode;
+ chcfgr.B.CHMODE = config->operationMode;
+ chcfgr.B.CHDW = config->moveSize;
+ chcfgr.B.PRSEL = config->requestSource;
+ chcfgr.B.PATSEL = config->pattern;
+
+ channel->CHCFGR.U = chcfgr.U;
+ }
+
+ {
+ Ifx_DMA_CH_ADICR adicr;
+ adicr.U = 0;
+ adicr.B.SMF = config->sourceAddressIncrementStep;
+ adicr.B.INCS = config->sourceAddressIncrementDirection;
+ adicr.B.CBLS = config->sourceAddressCircularRange;
+ adicr.B.SCBE = config->sourceCircularBufferEnabled;
+ adicr.B.DMF = config->destinationAddressIncrementStep;
+ adicr.B.INCD = config->destinationAddressIncrementDirection;
+ adicr.B.CBLD = config->destinationAddressCircularRange;
+ adicr.B.DCBE = config->destinationCircularBufferEnabled;
+ adicr.B.SHCT = config->shadowControl;
+ adicr.B.STAMP = config->timestampEnabled;
+ adicr.B.WRPSE = config->wrapSourceInterruptEnabled;
+ adicr.B.WRPDE = config->wrapDestinationInterruptEnabled;
+ adicr.B.INTCT = (config->channelInterruptEnabled ? 2 : 0) | (config->channelInterruptControl ? 1 : 0);
+ adicr.B.IRDV = config->interruptRaiseThreshold;
+ adicr.B.ETRL = config->transactionRequestLostInterruptEnabled;
+ //enter also the circular buffer enable bits
+
+ channel->ADICR.U = adicr.U;
+ }
+ channel->SADR.U = config->sourceAddress;
+ channel->DADR.U = config->destinationAddress;
+ channel->SDCRCR.U = config->sourceDestinationAddressCrc;
+ channel->RDCRCR.U = config->readDataCrc;
+
+ // write not allowed if SHCT=1 or SHCT=2
+ if ((config->shadowControl != IfxDma_ChannelShadow_none) &&
+ (config->shadowControl != IfxDma_ChannelShadow_src) &&
+ (config->shadowControl != IfxDma_ChannelShadow_dst))
+ {
+ channel->SHADR.U = config->shadowAddress;
+ }
+}
+
+
+void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma)
+{
+ dmaHandle->dma = dma;
+}
+
+
+void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel)
+{
+ if (IfxDma_isChannelTransactionEnabled(dma->dma, channel))
+ {
+ IfxDma_disableChannelTransaction(dma->dma, channel);
+ }
+
+ IfxDma_resetChannel(dma->dma, channel);
+
+ while (!(IfxDma_isChannelReset(dma->dma, channel)))
+ {}
+}
+
+
+void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config)
+{
+ Ifx_DMA *dma = config->module->dma;
+
+ channel->dma = dma;
+ channel->channelId = config->channelId;
+ channel->channel = &dma->CH[config->channelId];
+
+ IfxDma_Dma_configureTransactionSet(channel->channel, config);
+
+ {
+ Ifx_DMA_TSR tsr;
+ tsr.U = 0;
+
+ if (config->hardwareRequestEnabled)
+ {
+ tsr.B.ECH = 1;
+ }
+ else
+ {
+ tsr.B.DCH = 1;
+ }
+
+ dma->TSR[channel->channelId].U = tsr.U;
+ }
+
+ if (config->channelInterruptPriority > 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxDma_getSrcPointer(channel->dma, channel->channelId);
+ IfxSrc_init(src, config->channelInterruptTypeOfService, config->channelInterruptPriority);
+ IfxSrc_enable(src);
+ }
+}
+
+
+void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma)
+{
+ const IfxDma_Dma_ChannelConfig defaultConfig = {
+ .module = NULL_PTR,
+ .channelId = IfxDma_ChannelId_0,
+ .sourceAddress = 0,
+ .destinationAddress = 0,
+ .shadowAddress = 0,
+ .readDataCrc = 0,
+ .sourceDestinationAddressCrc = 0,
+ .transferCount = 0,
+ .blockMode = IfxDma_ChannelMove_1,
+ .requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest,
+ .operationMode = IfxDma_ChannelOperationMode_single,
+ .moveSize = IfxDma_ChannelMoveSize_8bit,
+ .pattern = IfxDma_ChannelPattern_0_disable,
+ .requestSource = IfxDma_ChannelRequestSource_peripheral,
+ .busPriority = IfxDma_ChannelBusPriority_medium,
+ .hardwareRequestEnabled = FALSE,
+ .sourceAddressIncrementStep = IfxDma_ChannelIncrementStep_1,
+ .sourceAddressIncrementDirection = IfxDma_ChannelIncrementDirection_positive,
+ .sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_32768,
+ .destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1,
+ .destinationAddressIncrementDirection = IfxDma_ChannelIncrementDirection_positive,
+ .destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_32768,
+ .shadowControl = IfxDma_ChannelShadow_none,
+ .sourceCircularBufferEnabled = FALSE,
+ .destinationCircularBufferEnabled = FALSE,
+ .timestampEnabled = FALSE,
+ .wrapSourceInterruptEnabled = FALSE,
+ .wrapDestinationInterruptEnabled = FALSE,
+ .channelInterruptEnabled = FALSE,
+ .channelInterruptControl = IfxDma_ChannelInterruptControl_thresholdLimitMatch,
+ .interruptRaiseThreshold = 0,
+ .transactionRequestLostInterruptEnabled = FALSE,
+ .channelInterruptPriority = 0,
+ .channelInterruptTypeOfService = IfxSrc_Tos_cpu0
+ };
+
+ /* Default Configuration */
+ *config = defaultConfig;
+
+ /* take over module pointer */
+ config->module = dma;
+}
+
+
+void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config)
+{
+ IfxDma_Dma_configureTransactionSet((Ifx_DMA_CH *)ptrToAddress, config);
+}
+
+
+void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config)
+{
+ dma->dma = config->dma;
+}
+
+
+void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma)
+{
+ config->dma = dma;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Dma/IfxDma_Dma.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Dma/IfxDma_Dma.h
new file mode 100644
index 0000000..47a050e
--- /dev/null
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@@ -0,0 +1,774 @@
+/**
+ * \file IfxDma_Dma.h
+ * \brief DMA DMA details
+ * \ingroup IfxLld_Dma
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dma_Dma_Usage How to use the DMA Interface driver?
+ * \ingroup IfxLld_Dma
+ *
+ * The DMA interface driver provides a default configuration for data moves without intervention of the CPU or other on chip devices.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework for different use cases.
+ *
+ * \section IfxLld_Dma_Dma_Preparation Preparation
+ * \subsection IfxLld_Dma_Dma_Include Include Files
+ *
+ * Include following header file into your C code:
+ *
+ * \code
+ * #include
+ * #include
+ *
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Dma_Dma_Module Module initialisation
+ *
+ * Declare the dma handle as a global variable:
+ *
+ * \code
+ * // DMA handle
+ * IfxDma_Dma dma;
+ * \endcode
+ *
+ * Initialize the DMA with following code:
+ * \code
+ * // create module config
+ * IfxDma_Dma_Config dmaConfig;
+ * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
+ *
+ * // initialize module
+ * // IfxDma_Dma dma; // declared globally
+ * IfxDma_Dma_initModule(&dma, &dmaConfig);
+ * \endcode
+ *
+ * This only has to be done once in the application.
+ *
+ * The "IfxDma_Dma dma" handle should either be declared as a global variable (as shown in this example),
+ * or it can be created locally if desired:
+ *
+ * \code
+ * IfxDma_Dma dma;
+ * IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);
+ * \endcode
+ *
+ * \subsection IfxLld_Dma_Dma_Simple Memory-to-Memory Transfers
+ *
+ * A large amount of data should be copied between SRI based memories, e.g. from Flash into the DSPR
+ * of the current CPU. It's recommended to use 256 bit moves for this purpose for best performance.
+ *
+ * This requires, that source and target locations are 256 bit (32 byte) aligned. With the GCC compiler
+ * this can be achieved by adding __attribute__ ((aligned(64))) to the arrays:
+ *
+ * \code
+ * #define MEMORY_TRANSFER_NUM_WORDS 1024
+ * uint32 __attribute__ ((aligned(64))) memoryDestination[MEMORY_TRANSFER_NUM_WORDS];
+ * \endcode
+ *
+ * Channel configuration and handling for the data move:
+ * \code
+ * // construct the channel configuration
+ * IfxDma_Dma_ChannelConfig chnCfg;
+ * IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
+ *
+ * // select DMA channel which should be used
+ * chnCfg.channelId = IfxDma_ChannelId_0;
+ *
+ * // source and destination address
+ * chnCfg.sourceAddress = (uint32)0x80000000; // somewhere in flash section, here: start of PFlash (only for demo)
+ * chnCfg.destinationAddress = (uint32)memoryDestination;
+ *
+ * // move size, transfer count and request/operation mode
+ * chnCfg.moveSize = IfxDma_ChannelMoveSize_256bit;
+ * chnCfg.transferCount = (4 * MEMORY_TRANSFER_NUM_WORDS) / 32; // e.g. 1024 words require 128 * 256 bit moves
+ * chnCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
+ * chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
+ *
+ * // transfer configuration into DMA channel registers
+ * IfxDma_Dma_Channel chn;
+ * IfxDma_Dma_initChannel(&chn, &chnCfg);
+ *
+ * // start transfer and wait until it's finished
+ * IfxDma_Dma_startChannelTransaction(&chn);
+ * while( IfxDma_Dma_isChannelTransactionPending(&chn) == TRUE );
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Dma_Dma_Peripheral Peripheral-to-Memory Transfers
+ *
+ * The content of 8 ADC result registers should be transfered to a memory location in DSPR whenever
+ * an VADC autoscan has been finished. After the DMA transaction, an interrupt should be triggered
+ * so that the CPU can process the conversion results.
+ *
+ * We use following global variables:
+ * \code
+ * // buffer for autoscanned conversion result values
+ * #define NUM_SCANNED_CHANNELS 8
+ * static uint16 vadcResultBuffer[NUM_SCANNED_CHANNELS];
+ *
+ * // VADC handle
+ * IfxVadc_Adc vadc;
+ *
+ * // VADC group handle
+ * static IfxVadc_Adc_Group adcGroup;
+ *
+ * // DMA channel handle
+ * static IfxDma_Dma_Channel dmaChn;
+ * \endcode
+ *
+ *
+ * Create an interrupt handler for the DMA channel request:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define IFX_INTPRIO_DMA_CH0 1
+ *
+ * IFX_INTERRUPT(dmaCh0ISR, 0, IFX_INTPRIO_DMA_CH0)
+ * {
+ * // ...
+ * // do something with the conversion results in vadcResultBuffer[]
+ * // ...
+ *
+ * // re-init DMA channel destination address
+ * IfxDma_Dma_setChannelDestinationAddress(&dmaChn, ADDR_CPU_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]));
+ *
+ * // start new transaction
+ * IfxDma_Dma_setChannelTransferCount(&dmaChn, NUM_SCANNED_CHANNELS);
+ *
+ * {
+ * uint32 channels = 0xff; // all 8 channels
+ * uint32 mask = 0xff; // modify the selection of all channels
+ *
+ * // configure autoscan (single shot, not continuous scan)
+ * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
+ * }
+ * }
+ * \endcode
+ *
+ * ADC configuration:
+ * \code
+ * // create configuration
+ * IfxVadc_Adc_Config adcConfig;
+ * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
+ *
+ * adcConfig.startupCalibration = TRUE;
+ *
+ * // initialize module
+ * // IfxVadc_Adc vadc; // declared globally
+ * IfxVadc_Adc_initModule(&vadc, &adcConfig);
+ *
+ * // create group config
+ * IfxVadc_Adc_GroupConfig adcGroupConfig;
+ * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
+ *
+ * // initialize the group
+ * //IfxVadc_Adc_Group adcGroup; // defined globally
+ * adcGroupConfig.groupId = IfxVadc_GroupId_0;
+ * adcGroupConfig.master = adcGroupConfig.groupId;
+ *
+ * // enable all arbiter request sources
+ * adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
+ * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
+ * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
+ *
+ * // enable all gates in "always" mode (no edge detection)
+ * adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ *
+ * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
+ *
+ * {
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig;
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
+ *
+ * // initialize the channels
+ * for(int i=0; iRCR[0].B.SRGEN = 1; // interrupt when new result is available
+ *
+ * // send service request to DMA Channel 0
+ * IfxSrc_init((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0], IfxSrc_Tos_dma, 0);
+ * IfxSrc_enable((Ifx_SRC_SRCR*)&MODULE_SRC.VADC.G[0]);
+ * \endcode
+ *
+ * And finally the DMA channel configuration
+ * \code
+ * // create module config
+ * IfxDma_Dma_Config dmaConfig;
+ * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
+ *
+ * // initialize module
+ * IfxDma_Dma dma;
+ * IfxDma_Dma_initModule(&dma, &dmaConfig);
+ *
+ * {
+ * // construct the channel configuration
+ * IfxDma_Dma_ChannelConfig chnCfg;
+ * IfxDma_Dma_initChannelConfig(&chnCfg, &dma);
+ *
+ * // select DMA channel which should be used
+ * chnCfg.channelId = IfxDma_ChannelId_0;
+ * chnCfg.hardwareRequestEnabled = TRUE; // will be triggered from VADC service request
+ *
+ * // interrupt configuration
+ * chnCfg.channelInterruptEnabled = TRUE; // service request from DMA after all words have been transfered
+ * chnCfg.channelInterruptPriority = IFX_INTPRIO_DMA_CH0;
+ * chnCfg.channelInterruptTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
+ *
+ * // source and destination address
+ * chnCfg.sourceAddress = (uint32)&adcGroup.group->RES[0]; // first result register
+ * chnCfg.sourceCircularBufferEnabled = TRUE;
+ * chnCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_1; // keep this address
+ *
+ * chnCfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &vadcResultBuffer[0]); // move into result buffer
+ * chnCfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1; // increment once (=2 bytes) with each write
+ *
+ * // move size, transfer count and request/operation mode
+ * chnCfg.moveSize = IfxDma_ChannelMoveSize_16bit;
+ * chnCfg.transferCount = NUM_SCANNED_CHANNELS; // for the scanned channels
+ * chnCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
+ * chnCfg.operationMode = IfxDma_ChannelOperationMode_continuous; // hw request enable remains set after transaction
+ *
+ *
+ * // transfer configuration into DMA channel registers
+ * // IfxDma_Dma_Channel dmaChn; // declared globally
+ * IfxDma_Dma_initChannel(&dmaChn, &chnCfg);
+ *
+ * // configure IRQ handler which will be called after all result registers have been transfered
+ * IfxCpu_Irq_installInterruptHandler(&dmaCh0ISR, IFX_INTPRIO_DMA_CH0);
+ *
+ * // enable CPU interrupts
+ * IfxCpu_enableInterrupts();
+ * }
+ * \endcode
+ *
+ * In order to start the initial channel conversions, use:
+ * \code
+ * {
+ * uint32 channels = 0xff; // all 8 channels
+ * uint32 mask = 0xff; // modify the selection of all channels
+ *
+ * // configure and start autoscan (single shot, not continuous mode)
+ * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
+ * }
+ * \endcode
+ *
+ * DMA will transfer the results to DSPR during the autoscan (whenever a new result is availale), and
+ * invoke the dmaCh0ISR function once all channels have been converted.
+ *
+ * The ISR will re-configure the DMA channel and re-start the autoscan.
+ *
+ *
+ * \subsection IfxLld_Dma_Dma_LinkedList Linked Lists
+ *
+ * Linked lists allow to initiate multiple DMA transactions from independent transaction sets which are
+ * typically stored in a DSPR memory location, and fetched and executed from the DMA channel without
+ * further CPU interaction.
+ *
+ * Following example demonstrates, how 5 different transactions can be initiated from a single request.
+ * We copy the data of 5 CAN message objects to a DSPR location.
+ *
+ * Includes and global variables:
+ * \code
+ * #include
+ * #include
+ * #include
+ *
+ * // DMA channel handle
+ * IfxDma_Dma_Channel chn;
+ *
+ * // Linked List storage
+ * // IMPORTANT: it has to be aligned to an 256bit address, otherwise DMA can't read it
+ * #define NUM_LINKED_LIST_ITEMS 5
+ * IFX_ALIGN(256) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
+ *
+ * // transfer these values to various CAN_MODATA[LH] registers via linked lists
+ * #define NUM_TRANSFERED_WORDS 2
+ * uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS];
+ *
+ * const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
+ * (uint32)&CAN_MODATAL0,
+ * (uint32)&CAN_MODATAL1,
+ * (uint32)&CAN_MODATAL2,
+ * (uint32)&CAN_MODATAL3,
+ * (uint32)&CAN_MODATAL4,
+ * };
+ * \endcode
+ *
+ * Following code to prepare CAN for this demo:
+ * \code
+ * // enable CAN (no Ifx LLD available yet)
+ * {
+ * uint32 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ * IfxScuWdt_clearCpuEndinit(passwd);
+ *
+ * CAN_CLC.U = 0x0100;
+ * if( CAN_CLC.U ); // synch access
+ *
+ * // select f_clc as kernel clock
+ * CAN_MCR.B.CLKSEL = 1;
+ *
+ * // configure fractional divider
+ * CAN_FDR.U = 0x43ff;
+ *
+ * // wait until RAM has been initialized
+ * while( CAN_PANCTR.B.BUSY );
+ *
+ * IfxScuWdt_setCpuEndinit(passwd);
+ * }
+ * \endcode
+ *
+ *
+ * Build a linked list
+ * \code
+ * // create module config
+ * IfxDma_Dma_Config dmaConfig;
+ * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
+ *
+ * // initialize module
+ * IfxDma_Dma dma;
+ * IfxDma_Dma_initModule(&dma, &dmaConfig);
+ *
+ * // initial channel configuration
+ * IfxDma_Dma_ChannelConfig cfg;
+ * IfxDma_Dma_initChannelConfig(&cfg, &dma);
+ *
+ * // following settings are used by all transactions
+ * cfg.transferCount = NUM_TRANSFERED_WORDS;
+ * cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
+ * cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
+ * cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
+ *
+ * // generate linked list items
+ * for(int i=0; iB.CLRR = 1;
+ *
+ * // start linked list transaction
+ * IfxDma_Dma_startChannelTransaction(&chn);
+ *
+ * // wait for service request which is triggered at the end of linked list transfers
+ * while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );
+ * \endcode
+ *
+ * In order to synchronize with the end of linked list operations, it's recommended to poll the service request flag (triggered via linkedList[NUM_LINKED_LIST_ITEMS-1].CHCSR.B.SIT after the last word has been transfered), and not the transaction count as shown before, because a linked list will initiate multiple transactions.
+ *
+ * \defgroup IfxLld_Dma_Dma DMA
+ * \ingroup IfxLld_Dma
+ * \defgroup IfxLld_Dma_Dma_Data_Structures Data Structures
+ * \ingroup IfxLld_Dma_Dma
+ * \defgroup IfxLld_Dma_Dma_Module_Initialize Module Initialization
+ * \ingroup IfxLld_Dma_Dma
+ * \defgroup IfxLld_Dma_Dma_Channel_Initialize Channel Initialization
+ * \ingroup IfxLld_Dma_Dma
+ * \defgroup IfxLld_Dma_Dma_Linked_List Linked Lists
+ * \ingroup IfxLld_Dma_Dma
+ * \defgroup IfxLld_Dma_Dma_Channel_Transaction_Initiate Channel Transactions
+ * \ingroup IfxLld_Dma_Dma
+ */
+
+#ifndef IFXDMA_DMA_H
+#define IFXDMA_DMA_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxDma_cfg.h"
+#include "Dma/Std/IfxDma.h"
+#include "Cpu/Std/IfxCpu.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Dma_Dma_Data_Structures
+ * \{ */
+/** \brief DMA base address data structure (Module handle)
+ */
+typedef struct
+{
+ Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
+} IfxDma_Dma;
+
+/** \} */
+
+/** \addtogroup IfxLld_Dma_Dma_Data_Structures
+ * \{ */
+/** \brief Channel handle
+ */
+typedef struct
+{
+ Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
+ IfxDma_ChannelId channelId; /**< \brief Specifies the DMA channel */
+ Ifx_DMA_CH *channel; /**< \brief Specifies the pointer to DMA channel registers */
+} IfxDma_Dma_Channel;
+
+/** \brief Configuration data structure of the channel
+ */
+typedef struct
+{
+ IfxDma_Dma *module; /**< \brief Specifies pointer to the IfxDma_Dma module handle */
+ IfxDma_ChannelId channelId; /**< \brief Specifies the channel being used */
+ uint32 sourceAddress; /**< \brief Source address for the DMA channel */
+ uint32 destinationAddress; /**< \brief Destination address for the DMA channel */
+ uint32 shadowAddress; /**< \brief Initial content of shadow address for the DMA channel */
+ uint32 readDataCrc; /**< \brief Checksum for read data of the channel */
+ uint32 sourceDestinationAddressCrc; /**< \brief Checksum for source and destination address of channel */
+ uint16 transferCount; /**< \brief Number of transfers in a transaction */
+ IfxDma_ChannelMove blockMode; /**< \brief Number of moves in a transfer */
+ IfxDma_ChannelRequestMode requestMode; /**< \brief A service request initiates a single transfer, or the complete transaction */
+ IfxDma_ChannelOperationMode operationMode; /**< \brief keep enable/disable the hardware channel request after a transaction */
+ IfxDma_ChannelMoveSize moveSize; /**< \brief Read/write data size */
+ IfxDma_ChannelPattern pattern; /**< \brief Pattern selection operation modes */
+ IfxDma_ChannelRequestSource requestSource; /**< \brief Request of channel transfer through hardware or daisy chain. channel transfer complete interrupt of previous channel will trigger the next channel request */
+ IfxDma_ChannelBusPriority busPriority; /**< \brief Bus priority selection */
+ boolean hardwareRequestEnabled; /**< \brief Enabling channel transaction via hardware request */
+ IfxDma_ChannelIncrementStep sourceAddressIncrementStep; /**< \brief Describes the address offset with which the source address should be modified after each move */
+ IfxDma_ChannelIncrementDirection sourceAddressIncrementDirection; /**< \brief Decides whether the source address offset after each move should be added or decremented from the exisiting address */
+ IfxDma_ChannelIncrementCircular sourceAddressCircularRange; /**< \brief Determines which part of the source address remains unchanged and therby not updated after each move */
+ IfxDma_ChannelIncrementStep destinationAddressIncrementStep; /**< \brief Describes the address offset with which the destination address should be modified after each move */
+ IfxDma_ChannelIncrementDirection destinationAddressIncrementDirection; /**< \brief Decides whether the destination address offset after each move should be added or decremented from the exisiting address */
+ IfxDma_ChannelIncrementCircular destinationAddressCircularRange; /**< \brief Determines which part of the destination address remains unchanged and therby not updated after each move */
+ IfxDma_ChannelShadow shadowControl; /**< \brief selects the shadow transfer mode */
+ boolean sourceCircularBufferEnabled; /**< \brief Enables/Disables the source circular buffering */
+ boolean destinationCircularBufferEnabled; /**< \brief Enables/Disables the destination circular buffering */
+ boolean timestampEnabled; /**< \brief Enables/Disables the appendage of the time stamp after end of the last DMA move in a transaction */
+ boolean wrapSourceInterruptEnabled; /**< \brief An interrupt should be triggered whenever source address is wrapped */
+ boolean wrapDestinationInterruptEnabled; /**< \brief An interrupt should be triggered whenever destination address is wrapped */
+ boolean channelInterruptEnabled; /**< \brief The channel transfer interrupt should be triggered. See also channelInterruptControl */
+ IfxDma_ChannelInterruptControl channelInterruptControl; /**< \brief The channel transfer interrupt can either be triggered depending on the interruptRaiseThreshold, or each time the transaction count is decremented */
+ uint8 interruptRaiseThreshold; /**< \brief The value of the transferCount at which the interrupt should be raised */
+ boolean transactionRequestLostInterruptEnabled; /**< \brief Enables/Disables the channel transaction request lost interrupt */
+ Ifx_Priority channelInterruptPriority; /**< \brief Priority of the channel interrupt trigger */
+ IfxSrc_Tos channelInterruptTypeOfService; /**< \brief Interrupt service provider */
+} IfxDma_Dma_ChannelConfig;
+
+/** \brief Configuration data structure of the Module
+ */
+typedef struct
+{
+ Ifx_DMA *dma; /**< \brief Specifies the pointer to the DMA registers */
+} IfxDma_Dma_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Dma_Dma_Module_Initialize
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief initializes a DMA module handle based on the current configuration.
+ * Can be used in code where it's ensure that the DMA module is already initialized, and a DMA handle isn't globally available.
+ * \param dmaHandle pointer to the DMA module handle
+ * \param dma pointer to the DMA registers
+ * \return None
+ *
+ * \code
+ * IfxDma_Dma dma;
+ * IfxDma_Dma_createModuleHandle(&dma, &MODULE_DMA);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxDma_Dma_createModuleHandle(IfxDma_Dma *dmaHandle, Ifx_DMA *dma);
+
+/** \brief de-initialize the DMA channel
+ * \param dma pointer to the DMA module handle
+ * \param channel the DMA channel ID
+ * \return None
+ */
+IFX_EXTERN void IfxDma_Dma_deInitChannel(IfxDma_Dma *dma, IfxDma_ChannelId channel);
+
+/** \brief Initialize the DMA module
+ * \param dma pointer to the DMA module handle
+ * \param config Pointer to configuration structure of the DMA module
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_EXTERN void IfxDma_Dma_initModule(IfxDma_Dma *dma, const IfxDma_Dma_Config *config);
+
+/** \brief initialize the DMA module configuration
+ * \param config Pointer to configuration structure of the DMA module
+ * \param dma pointer to the DMA registers
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_EXTERN void IfxDma_Dma_initModuleConfig(IfxDma_Dma_Config *config, Ifx_DMA *dma);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dma_Dma_Channel_Initialize
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief initialize the DMA channel
+ * \param channel pointer to the DMA base address and channel ID
+ * \param config pointer to the DMA default channel configuration structure
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_EXTERN void IfxDma_Dma_initChannel(IfxDma_Dma_Channel *channel, const IfxDma_Dma_ChannelConfig *config);
+
+/** \brief initialize the DMA module channel configuration
+ * \param config pointer to the DMA default channel configuration structure
+ * \param dma pointer to the DMA module handle
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_EXTERN void IfxDma_Dma_initChannelConfig(IfxDma_Dma_ChannelConfig *config, IfxDma_Dma *dma);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dma_Dma_Linked_List
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the SRC pointer for given DMA channel
+ * \param channel pointer to the DMA base address and channel ID
+ * \return SRC pointer for given DMA channel
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief linked list functionality within the DMA module
+ * \param ptrToAddress pointer to the memory location where the linked list entry should be stored
+ * \param config pointer to the DMA default channel configuration structure
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_LinkedList
+ *
+ */
+IFX_EXTERN void IfxDma_Dma_initLinkedListEntry(void *ptrToAddress, const IfxDma_Dma_ChannelConfig *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dma_Dma_Channel_Transaction_Initiate
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear a channel transfer interrupt flag
+ * \param channel pointer to the DMA base address and channel ID
+ * \return None
+ */
+IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel);
+
+/** \brief Return and clear a channel transfer interrupt flag
+ * The flag is automatically cleared with the call to this function
+ * \param channel pointer to the DMA base address and channel ID
+ * \return TRUE if the interrupt flag is set
+ * FALSE if the interrupt flag is not set
+ */
+IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel);
+
+/** \brief Return a channel transfer interrupt flag
+ * \param channel pointer to the DMA base address and channel ID
+ * \return TRUE if the interrupt flag is set
+ * FALSE if the interrupt flag is not set
+ */
+IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel);
+
+/** \brief Poll for an ongoing transaction
+ * \param channel pointer to the DMA base address and channel ID
+ * \return TRUE if a transaction request for the given channel is pending
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel);
+
+/** \brief Re-initialize the destination address after a transaction
+ * \param channel pointer to the DMA base address and channel ID
+ * \param address is the Initial address of the destination pointer
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address);
+
+/** \brief Re-initialize the source address after a transaction
+ * \param channel pointer to the DMA base address and channel ID
+ * \param address is the Initial address of the source pointer
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address);
+
+/** \brief Re-initialize the transfer count after a transaction
+ * \param channel pointer to the DMA base address and channel ID
+ * \param transferCount value holds the DMA transfers within a transaction (1..16383; 0 handled like 1 transaction)
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount);
+
+/** \brief initiate the DMA move transaction
+ * \param channel pointer to the DMA base address and channel ID
+ * \return None
+ *
+ * See \ref IfxLld_Dma_Dma_Simple
+ *
+ */
+IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxDma_Dma_clearChannelInterrupt(IfxDma_Dma_Channel *channel)
+{
+ IfxDma_clearChannelInterrupt(channel->dma, channel->channelId);
+}
+
+
+IFX_INLINE boolean IfxDma_Dma_getAndClearChannelInterrupt(IfxDma_Dma_Channel *channel)
+{
+ return IfxDma_getAndClearChannelInterrupt(channel->dma, channel->channelId);
+}
+
+
+IFX_INLINE boolean IfxDma_Dma_getChannelInterrupt(IfxDma_Dma_Channel *channel)
+{
+ return IfxDma_getChannelInterrupt(channel->dma, channel->channelId);
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_Dma_getSrcPointer(IfxDma_Dma_Channel *channel)
+{
+ return IfxDma_getSrcPointer(channel->dma, channel->channelId);
+}
+
+
+IFX_INLINE boolean IfxDma_Dma_isChannelTransactionPending(IfxDma_Dma_Channel *channel)
+{
+ return IfxDma_isChannelTransactionPending(channel->dma, channel->channelId);
+}
+
+
+IFX_INLINE void IfxDma_Dma_setChannelDestinationAddress(IfxDma_Dma_Channel *channel, uint32 address)
+{
+ IfxDma_setChannelDestinationAddress(channel->dma, channel->channelId, (void *)address);
+}
+
+
+IFX_INLINE void IfxDma_Dma_setChannelSourceAddress(IfxDma_Dma_Channel *channel, uint32 address)
+{
+ IfxDma_setChannelSourceAddress(channel->dma, channel->channelId, (void *)address);
+}
+
+
+IFX_INLINE void IfxDma_Dma_setChannelTransferCount(IfxDma_Dma_Channel *channel, uint32 transferCount)
+{
+ IfxDma_setChannelTransferCount(channel->dma, channel->channelId, transferCount);
+}
+
+
+IFX_INLINE void IfxDma_Dma_startChannelTransaction(IfxDma_Dma_Channel *channel)
+{
+ IfxDma_startChannelTransaction(channel->dma, channel->channelId);
+}
+
+
+#endif /* IFXDMA_DMA_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Std/IfxDma.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Std/IfxDma.c
new file mode 100644
index 0000000..d6d5843
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Std/IfxDma.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxDma.c
+ * \brief DMA basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxDma.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Std/IfxDma.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Std/IfxDma.h
new file mode 100644
index 0000000..123227a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dma/Std/IfxDma.h
@@ -0,0 +1,1766 @@
+/**
+ * \file IfxDma.h
+ * \brief DMA basic functionality
+ * \ingroup IfxLld_Dma
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dma_Std_Enum Enumerations
+ * \ingroup IfxLld_Dma_Std
+ * \defgroup IfxLld_Dma_Std_Reset Reset Functions
+ * \ingroup IfxLld_Dma_Std
+ * \defgroup IfxLld_Dma_Std_Channel_Transaction Channel Transaction Functions
+ * \ingroup IfxLld_Dma_Std
+ * \defgroup IfxLld_Dma_Std_Move_Engine Move Engine functions
+ * \ingroup IfxLld_Dma_Std
+ * \defgroup IfxLld_Dma_Std_Channel_Configure Channel configuration Functions
+ * \ingroup IfxLld_Dma_Std
+ * \defgroup IfxLld_Dma_Std_Channel_Halt Channel Halt Functions
+ * \ingroup IfxLld_Dma_Std
+ * \defgroup IfxLld_Dma_Std_Double_Buffer Double Buffer functions
+ * \ingroup IfxLld_Dma_Std
+ * \defgroup IfxLld_Dma_Std_Interrupts Interrupt functions
+ * \ingroup IfxLld_Dma_Std
+ */
+
+#ifndef IFXDMA_H
+#define IFXDMA_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxDma_cfg.h"
+#include "IfxDma_bf.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxDma_reg.h"
+#include "Src/Std/IfxSrc.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Scu/Std/IfxScuCcu.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Dma_Std_Enum
+ * \{ */
+/** \brief Bus Master Mode definition
+ * Definition in Ifx_DMA.MODE[4].B.MODE
+ */
+typedef enum
+{
+ IfxDma_BusMasterMode_user = 0, /**< \brief Selected hardware resource performs Bus access in user mode */
+ IfxDma_BusMasterMode_supervisor = 1 /**< \brief Selected hardware resource performs Bus access in supervisor mode */
+} IfxDma_BusMasterMode;
+
+/** \brief Channel Bus Priority definition
+ */
+typedef enum
+{
+ IfxDma_ChannelBusPriority_low = 0, /**< \brief low priority */
+ IfxDma_ChannelBusPriority_medium = 1, /**< \brief medium priority */
+ IfxDma_ChannelBusPriority_high = 2 /**< \brief high priority */
+} IfxDma_ChannelBusPriority;
+
+/** \brief DMA circular buffer (wrap around) definition
+ * Definition in Ifx_DMA.CH[64].ADICR.B.CBLS and Ifx_DMA.CH[64].ADICR.B.CBLD
+ */
+typedef enum
+{
+ IfxDma_ChannelIncrementCircular_none = 0, /**< \brief no circular buffer operation */
+ IfxDma_ChannelIncrementCircular_2 = 1, /**< \brief circular buffer size is 2 byte */
+ IfxDma_ChannelIncrementCircular_4 = 2, /**< \brief circular buffer size is 4 byte */
+ IfxDma_ChannelIncrementCircular_8 = 3, /**< \brief circular buffer size is 8 byte */
+ IfxDma_ChannelIncrementCircular_16 = 4, /**< \brief circular buffer size is 16 byte */
+ IfxDma_ChannelIncrementCircular_32 = 5, /**< \brief circular buffer size is 32 byte */
+ IfxDma_ChannelIncrementCircular_64 = 6, /**< \brief circular buffer size is 64 byte */
+ IfxDma_ChannelIncrementCircular_128 = 7, /**< \brief circular buffer size is 128 byte */
+ IfxDma_ChannelIncrementCircular_256 = 8, /**< \brief circular buffer size is 256 byte */
+ IfxDma_ChannelIncrementCircular_512 = 9, /**< \brief circular buffer size is 512 byte */
+ IfxDma_ChannelIncrementCircular_1024 = 10, /**< \brief circular buffer size is 1024 byte */
+ IfxDma_ChannelIncrementCircular_2048 = 11, /**< \brief circular buffer size is 2048 byte */
+ IfxDma_ChannelIncrementCircular_4096 = 12, /**< \brief circular buffer size is 4096 byte */
+ IfxDma_ChannelIncrementCircular_8192 = 13, /**< \brief circular buffer size is 8192 byte */
+ IfxDma_ChannelIncrementCircular_16384 = 14, /**< \brief circular buffer size is 16384 byte */
+ IfxDma_ChannelIncrementCircular_32768 = 15 /**< \brief circular buffer size is 32768 byte */
+} IfxDma_ChannelIncrementCircular;
+
+/** \brief DMA incrementation direction definition
+ * Definition in Ifx_DMA.CH[64].ADICR.B.INCS
+ */
+typedef enum
+{
+ IfxDma_ChannelIncrementDirection_negative = 0, /**< \brief pointer is decremented */
+ IfxDma_ChannelIncrementDirection_positive = 1 /**< \brief pointer is incremented */
+} IfxDma_ChannelIncrementDirection;
+
+/** \brief DMA incrementation definition
+ * Definition in Ifx_DMA.CH[64].ADICR.B.SMF
+ */
+typedef enum
+{
+ IfxDma_ChannelIncrementStep_1 = 0, /**< \brief increment by 1 width */
+ IfxDma_ChannelIncrementStep_2 = 1, /**< \brief increment by 2 width */
+ IfxDma_ChannelIncrementStep_4 = 2, /**< \brief increment by 4 width */
+ IfxDma_ChannelIncrementStep_8 = 3, /**< \brief increment by 8 width */
+ IfxDma_ChannelIncrementStep_16 = 4, /**< \brief increment by 16 width */
+ IfxDma_ChannelIncrementStep_32 = 5, /**< \brief increment by 32 width */
+ IfxDma_ChannelIncrementStep_64 = 6, /**< \brief increment by 64 width */
+ IfxDma_ChannelIncrementStep_128 = 7 /**< \brief increment by 128 width */
+} IfxDma_ChannelIncrementStep;
+
+/** \brief Channel Transfer Interrupt generation mechanism.
+ * Definition in Ifx_DMA.CH[64].ADICR.B.INTCT (bit 0)
+ */
+typedef enum
+{
+ IfxDma_ChannelInterruptControl_thresholdLimitMatch = 0, /**< \brief interrupt when transfer count (TCOUNT) equals the threshold limit (IRDV) */
+ IfxDma_ChannelInterruptControl_transferCountDecremented = 1 /**< \brief interrupt when transfer count (TCOUNT) is decremented */
+} IfxDma_ChannelInterruptControl;
+
+/** \brief DMA transfer definition
+ * Definition in Ifx_DMA.BLK0.ME.CHCR.B.BLKM and Ifx_DMA.BLK1.ME.CHCR.B.BLKM
+ */
+typedef enum
+{
+ IfxDma_ChannelMove_1 = 0, /**< \brief 1 DMA move per DMA transfer */
+ IfxDma_ChannelMove_2 = 1, /**< \brief 2 DMA move per DMA transfer */
+ IfxDma_ChannelMove_4 = 2, /**< \brief 4 DMA move per DMA transfer */
+ IfxDma_ChannelMove_8 = 3, /**< \brief 8 DMA move per DMA transfer */
+ IfxDma_ChannelMove_16 = 4, /**< \brief 16 DMA move per DMA transfer */
+ IfxDma_ChannelMove_3 = 5, /**< \brief 3 DMA move per DMA transfer */
+ IfxDma_ChannelMove_5 = 6, /**< \brief 5 DMA move per DMA transfer */
+ IfxDma_ChannelMove_9 = 7 /**< \brief 9 DMA move per DMA transfer */
+} IfxDma_ChannelMove;
+
+/** \brief DMA move size definition
+ * Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHDW and Ifx_DMA.BLK1.ME.CHCR.B.CHDW
+ */
+typedef enum
+{
+ IfxDma_ChannelMoveSize_8bit = 0, /**< \brief 1 DMA move is 8 bit wide */
+ IfxDma_ChannelMoveSize_16bit = 1, /**< \brief 1 DMA move is 16 bit wide */
+ IfxDma_ChannelMoveSize_32bit = 2, /**< \brief 1 DMA move is 32 bit wide */
+ IfxDma_ChannelMoveSize_64bit = 3, /**< \brief 1 DMA move is 64 bit wide */
+ IfxDma_ChannelMoveSize_128bit = 4, /**< \brief 1 DMA move is 128 bit wide */
+ IfxDma_ChannelMoveSize_256bit = 5 /**< \brief 1 DMA move is 256 bit wide */
+} IfxDma_ChannelMoveSize;
+
+/** \brief DMA operation mode
+ * Definition in Ifx_DMA.BLK0.ME.CHCR.B.CHMODE and Ifx_DMA.BLK1.ME.CHCR.B.CHMODE
+ */
+typedef enum
+{
+ IfxDma_ChannelOperationMode_single = 0, /**< \brief channel disabled after transaction */
+ IfxDma_ChannelOperationMode_continuous = 1 /**< \brief channel stays enabled after transaction */
+} IfxDma_ChannelOperationMode;
+
+/** \brief Pattern detection selection
+ * Definition in Ifx_DMA.BLK0.ME.CHCR.B.PATSEL and Ifx_DMA.BLK1.ME.CHCR.B.PATSEL
+ */
+typedef enum
+{
+ IfxDma_ChannelPattern_0_disable = 0, /**< \brief Pattern detect 0 disabled */
+ IfxDma_ChannelPattern_0_mode1 = 1, /**< \brief Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] */
+ IfxDma_ChannelPattern_0_mode2 = 2, /**< \brief Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] */
+ IfxDma_ChannelPattern_0_mode3 = 3, /**< \brief Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT0[0] masked by PAT0[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT0[1] masked by PAT0[3] of previous DMA read move */
+ IfxDma_ChannelPattern_1_disable = 4, /**< \brief Pattern detect 1 disabled */
+ IfxDma_ChannelPattern_1_mode1 = 5, /**< \brief Compare match configuration 1 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] */
+ IfxDma_ChannelPattern_1_mode2 = 6, /**< \brief Compare match configuration 2 : pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] */
+ IfxDma_ChannelPattern_1_mode3 = 7 /**< \brief Compare match configuration 3 : pattern compare of MExR.RD[0] to PAT1[0] masked by PAT1[2] of actual DMA read move and pattern compare of MExR.RD[0] to PAT1[1] masked by PAT1[3] of previous DMA read move */
+} IfxDma_ChannelPattern;
+
+/** \brief Channel Priority definition
+ */
+typedef enum
+{
+ IfxDma_ChannelPriority_low = 0, /**< \brief low priority */
+ IfxDma_ChannelPriority_medium = 1, /**< \brief medium priority */
+ IfxDma_ChannelPriority_high = 2 /**< \brief high priority */
+} IfxDma_ChannelPriority;
+
+/** \brief DMA request mode
+ * Definition in Ifx_DMA.BLK0.ME.CHCR.B.RROAT and Ifx_DMA.BLK1.ME.CHCR.B.RROAT
+ */
+typedef enum
+{
+ IfxDma_ChannelRequestMode_oneTransferPerRequest = 0, /**< \brief a request initiates a single transfer */
+ IfxDma_ChannelRequestMode_completeTransactionPerRequest = 1 /**< \brief a request initiates a complete transaction */
+} IfxDma_ChannelRequestMode;
+
+/** \brief DMA request selection
+ * Definition in Ifx_DMA.BLK0.ME.CHCR.B.PRSEL and Ifx_DMA.BLK1.ME.CHCR.B.PRSEL
+ */
+typedef enum
+{
+ IfxDma_ChannelRequestSource_peripheral = 0, /**< \brief Transfer Request via Hardware Trigger */
+ IfxDma_ChannelRequestSource_daisyChain = 1 /**< \brief Transfer Request via next (higher priority) channel */
+} IfxDma_ChannelRequestSource;
+
+/** \brief shadow definition definition
+ * Definition in Ifx_DMA.CH[64].ADICR.B.SHCT
+ */
+typedef enum
+{
+ IfxDma_ChannelShadow_none = 0, /**< \brief shadow address register not used. Source and destination address register are written directly */
+ IfxDma_ChannelShadow_src = 1, /**< \brief Shadow address register used for source address buffering. When writing to SADRmx, the address is buffered in SHADRmx and transferred to SADRmx with the start of the next DMA transaction */
+ IfxDma_ChannelShadow_dst = 2, /**< \brief Shadow address register used for destination address buffering. When writing to DADRmx, the address is buffered in SHADRmx and transferred to DADRmx with the start of the next DMA transaction */
+ IfxDma_ChannelShadow_srcDirectWrite = 5, /**< \brief Shadow address used for source buffering. When writing to SADRz, the address is buffered in SHADRz and transferred to SADRz with the start of the next DMA transaction */
+ IfxDma_ChannelShadow_dstDirectWrite = 6, /**< \brief Shadow address used for destination buffering. When writing to DADRz, the address is buffered in SHADRz and transferred to DADRz with the start of the next DMA transaction */
+ IfxDma_ChannelShadow_doubleSourceBufferingSwSwitch = 8, /**< \brief Software switch only. Shadow address used for double buffering */
+ IfxDma_ChannelShadow_doubleSourceBufferingHwSwSwitch = 9, /**< \brief Automatic Hardware and Software switch. Shadow address used for double buffering */
+ IfxDma_ChannelShadow_doubleDestinationBufferingSwSwitch = 10, /**< \brief Software switch only. Shadow address used for double buffering */
+ IfxDma_ChannelShadow_doubleDestinationBufferingHwSwSwitch = 11, /**< \brief Automatic Hardware and Software switch. Shadow address used for double buffering */
+ IfxDma_ChannelShadow_linkedList = 12, /**< \brief The DMA controller reads a DMA channel transaction control set and overwrites 8 X words in the corresponding DMARAM channel z */
+ IfxDma_ChannelShadow_accumulatedLinkedList = 13, /**< \brief The DMA controller reads a DMA channel transaction control set and overwrites 6 X words in the corresponding DMARAM channel z */
+ IfxDma_ChannelShadow_safeLinkedList = 14, /**< \brief The DMA controller reads a DMA channel transaction control set. The Linked List only proceeds with the next DMA transaction if the existing SDCRC checksum matches the expected SDCRC checksum in the loaded from the new DMA transaction control set */
+ IfxDma_ChannelShadow_conditionalLinkedList = 15 /**< \brief Shadow address register (MExSHADR) and source and destination address CRC register (MExSDCRC) are used as address pointers to a Linked List. The selection of the address pointer is determined by DMA channel pattern detection conditions */
+} IfxDma_ChannelShadow;
+
+typedef enum
+{
+ IfxDma_HardwareResourcePartition_0 = 0, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
+ IfxDma_HardwareResourcePartition_1, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
+ IfxDma_HardwareResourcePartition_2, /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
+ IfxDma_HardwareResourcePartition_3 /**< \brief "Set of DMA channels are associated with hardware resource partition " + str(x) */
+} IfxDma_HardwareResourcePartition;
+
+/** \brief DMA move engine definition
+ */
+typedef enum
+{
+ IfxDma_MoveEngine_0 = 0, /**< \brief first move engine */
+ IfxDma_MoveEngine_1 = 1 /**< \brief second move engine */
+} IfxDma_MoveEngine;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_DMA.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxDma_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxDma_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxDma_SleepMode;
+
+/** \} */
+
+/** \addtogroup IfxLld_Dma_Std_Reset
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Return the status of a DMA channel (reset / not reset)
+ * This API needs to be used after the IfxDma_resetChannel()
+ * \param dma pointer to DMA module
+ * \param channelId DMA channel number
+ * \return TRUE if the channel is reset
+ * FALSE if the channel is not reset
+ *
+ * \code
+ * // check whether the channel is reset or not and also the hardware trigger disabled
+ *
+ * if (IfxDma_isChannelReset(chn[0].dma, chn[0].channelId) &&
+ * (!IfxDma_isChannelTransactionEnabled(chn[0].dma, chn[0].channelId))) {
+ * // Dma is out of RESET and there is no hardware request enabled
+ * IfxDma_Dma_startChannelTransaction(&chn[0]);
+ * }
+ * \endcode
+ *
+ */
+IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId);
+
+/** \brief Reset the channel
+ * \param dma pointer to DMA module
+ * \param channelId DMA channel number
+ * \return None
+ *
+ * \code
+ * // Apply reset to the channel
+ * IfxDma_resetChannel(chn[0].dma, chn[0].channelId);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dma_Std_Channel_Transaction
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear the channel transaction request lost flag status
+ * \param dma pointer to DMA module
+ * \param channelId DMA channel number
+ * \return None
+ *
+ * \code
+ * // Clear the channel transaction request lost flag status
+ * IfxDma_clearChannelTransactionRequestLost(chn[0].dma, chn[0].channelId);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId);
+
+/** \brief Disable a DMA channel hardware transaction request
+ * \param dma pointer to DMA module
+ * \param channelId DMA channel number
+ * \return None
+ *
+ * A coding example can be found in \ref IfxDma_enableChannelTransaction
+ *
+ */
+IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId);
+
+/** \brief Disable the generation of a channel transaction lost error interrupt
+ * \param dma pointer to DMA module
+ * \param channelId DMA channel number
+ * \return None
+ *
+ * \code
+ * // Disable the transaction request lost interrupt for given channel
+ * IfxDma_disableChannelTransactionLostError(chn[0].dma, chn[0].channelId);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId);
+
+/** \brief Enable a DMA channel hardware transaction request
+ * \param dma pointer to DMA module
+ * \param channelId DMA channel number
+ * \return None
+ *
+ * \code
+ * unsigned *src = (unsigned *)((unsigned)&SRC_DMACH0.U + 4*NUM_CHANNELS);
+ * for(int chn=0; chnTSR[channelId].B.HLTCLR = 1;
+}
+
+
+IFX_INLINE void IfxDma_clearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCSR.B.CICH = 1;
+}
+
+
+IFX_INLINE void IfxDma_clearChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->TSR[channelId].B.CTL = 1;
+}
+
+
+IFX_INLINE void IfxDma_clearErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine, uint32 mask)
+{
+ if (moveEngine == IfxDma_MoveEngine_1)
+ {
+ dma->BLK1.CLRE.U = mask;
+ }
+ else
+ {
+ dma->BLK0.CLRE.U = mask;
+ }
+}
+
+
+IFX_INLINE void IfxDma_disableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].ADICR.B.INTCT &= ~(1 << 1); // TODO: should we define a special bitmask for this bit manipulation?
+}
+
+
+IFX_INLINE void IfxDma_disableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->TSR[channelId].B.DCH = 1;
+}
+
+
+IFX_INLINE void IfxDma_disableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].ADICR.B.ETRL = 0;
+}
+
+
+IFX_INLINE void IfxDma_disableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
+{
+ if (moveEngine == IfxDma_MoveEngine_1)
+ {
+ dma->BLK1.EER.B.EDER = 0;
+ }
+ else
+ {
+ dma->BLK0.EER.B.EDER = 0;
+ }
+}
+
+
+IFX_INLINE void IfxDma_disableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
+{
+ if (moveEngine == IfxDma_MoveEngine_1)
+ {
+ dma->BLK1.EER.B.ESER = 0;
+ }
+ else
+ {
+ dma->BLK0.EER.B.ESER = 0;
+ }
+}
+
+
+IFX_INLINE void IfxDma_enableChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].ADICR.B.INTCT |= (1 << 1); // TODO: should we define a special bitmask for this bit manipulation?
+}
+
+
+IFX_INLINE void IfxDma_enableChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->TSR[channelId].B.ECH = 1;
+}
+
+
+IFX_INLINE void IfxDma_enableChannelTransactionLostError(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].ADICR.B.ETRL = 1;
+}
+
+
+IFX_INLINE void IfxDma_enableMoveEngineDestinationError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
+{
+ if (moveEngine == IfxDma_MoveEngine_1)
+ {
+ dma->BLK1.EER.B.EDER = 1;
+ }
+ else
+ {
+ dma->BLK0.EER.B.EDER = 1;
+ }
+}
+
+
+IFX_INLINE void IfxDma_enableMoveEngineSourceError(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
+{
+ if (moveEngine == IfxDma_MoveEngine_1)
+ {
+ dma->BLK1.EER.B.ESER = 1;
+ }
+ else
+ {
+ dma->BLK0.EER.B.ESER = 1;
+ }
+}
+
+
+IFX_INLINE boolean IfxDma_getAndClearChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ boolean result;
+
+ result = dma->CH[channelId].CHCSR.B.ICH != 0;
+
+ if (result == 1)
+ {
+ dma->CH[channelId].CHCSR.B.CICH = TRUE;
+ }
+
+ return result;
+}
+
+
+IFX_INLINE boolean IfxDma_getAndClearChannelPatternDetectionInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ boolean result;
+
+ result = dma->CH[channelId].CHCSR.B.IPM != 0;
+
+ if (result == 1)
+ {
+ dma->CH[channelId].CHCSR.B.CICH = TRUE;
+ }
+
+ return result;
+}
+
+
+IFX_INLINE boolean IfxDma_getAndClearChannelWrapDestinationBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ boolean result;
+
+ result = dma->CH[channelId].CHCSR.B.WRPD != 0;
+
+ if (result == 1)
+ {
+ dma->CH[channelId].CHCSR.B.CWRP = TRUE;
+ }
+
+ return result;
+}
+
+
+IFX_INLINE boolean IfxDma_getAndClearChannelWrapSourceBufferInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ boolean result;
+
+ result = dma->CH[channelId].CHCSR.B.WRPS != 0;
+
+ if (result == 1)
+ {
+ dma->CH[channelId].CHCSR.B.CWRP = TRUE;
+ }
+
+ return result;
+}
+
+
+IFX_INLINE uint32 IfxDma_getChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->CH[channelId].DADR.U;
+}
+
+
+IFX_INLINE boolean IfxDma_getChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->TSR[channelId].B.HLTACK != 0;
+}
+
+
+IFX_INLINE boolean IfxDma_getChannelInterrupt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ boolean result;
+
+ result = dma->CH[channelId].CHCSR.B.ICH;
+
+ return result;
+}
+
+
+IFX_INLINE boolean IfxDma_getChannelPatternDetectionOldValue(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->CH[channelId].CHCSR.B.LXO != 0;
+}
+
+
+IFX_INLINE uint32 IfxDma_getChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->CH[channelId].SADR.U;
+}
+
+
+IFX_INLINE boolean IfxDma_getChannelSuspendModeStatus(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->SUSACR[channelId].B.SUSAC;
+}
+
+
+IFX_INLINE boolean IfxDma_getChannelTransactionRequestLost(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->TSR[channelId].B.TRL != 0;
+}
+
+
+IFX_INLINE uint32 IfxDma_getChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->CH[channelId].CHCSR.B.TCOUNT;
+}
+
+
+IFX_INLINE IfxDma_ChannelIncrementCircular IfxDma_getCircularRangeCode(uint16 range)
+{
+ return (IfxDma_ChannelIncrementCircular)(31 - __clz((uint32)range));
+}
+
+
+IFX_INLINE boolean IfxDma_getDoubleBufferRead(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ boolean result;
+
+ result = dma->CH[channelId].CHCSR.B.FROZEN != 0;
+
+ if (result == 1)
+ {
+ dma->CH[channelId].CHCSR.B.FROZEN = FALSE;
+ }
+
+ return result;
+}
+
+
+IFX_INLINE boolean IfxDma_getDoubleBufferSelection(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->CH[channelId].CHCSR.B.BUFFER != 0;
+}
+
+
+IFX_INLINE uint32 IfxDma_getErrorFlags(Ifx_DMA *dma, IfxDma_MoveEngine moveEngine)
+{
+ if (moveEngine == IfxDma_MoveEngine_1)
+ {
+ return dma->BLK1.ERRSR.U;
+ }
+ else
+ {
+ return dma->BLK0.ERRSR.U;
+ }
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getSrcPointer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ IFX_UNUSED_PARAMETER(dma);
+ // only a single DMA available, therefore no check for the dma pointer required
+ return &MODULE_SRC.DMA.DMA[0].CH[channelId];
+}
+
+
+IFX_INLINE uint32 IfxDma_getTimestamp(Ifx_DMA *dma)
+{
+ return dma->TIME.U;
+}
+
+
+IFX_INLINE boolean IfxDma_isChannelReset(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->TSR[channelId].B.RST == 0;
+}
+
+
+IFX_INLINE boolean IfxDma_isChannelTransactionEnabled(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->TSR[channelId].B.HTRE != 0;
+}
+
+
+IFX_INLINE boolean IfxDma_isChannelTransactionPending(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->TSR[channelId].B.CH != 0;
+}
+
+
+IFX_INLINE void IfxDma_keepDoubleBufferActive(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCSR.U = 0U << IFX_DMA_CH_CHCSR_FROZEN_OFF;
+}
+
+
+IFX_INLINE void IfxDma_resetChannel(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->TSR[channelId].B.RST = 1;
+}
+
+
+IFX_INLINE void IfxDma_setChannelBlockMode(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMove blockMode)
+{
+ dma->CH[channelId].CHCFGR.B.BLKM = blockMode;
+}
+
+
+IFX_INLINE void IfxDma_setChannelContinuousMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCFGR.B.CHMODE = 1;
+}
+
+
+IFX_INLINE void IfxDma_setChannelDestinationAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, void *address)
+{
+ dma->CH[channelId].DADR.U = (uint32)address;
+}
+
+
+IFX_INLINE void IfxDma_setChannelDestinationIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
+{
+ Ifx_DMA_CH_ADICR adicr;
+ adicr.U = dma->CH[channelId].ADICR.U;
+ adicr.B.DMF = incStep;
+ adicr.B.INCD = direction;
+ adicr.B.CBLD = size;
+ dma->CH[channelId].ADICR.U = adicr.U;
+}
+
+
+IFX_INLINE void IfxDma_setChannelHalt(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->TSR[channelId].B.HLTREQ = 1;
+}
+
+
+IFX_INLINE void IfxDma_setChannelInterruptServiceRequest(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCSR.B.SIT = 1;
+}
+
+
+IFX_INLINE void IfxDma_setChannelMoveSize(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelMoveSize moveSize)
+{
+ dma->CH[channelId].CHCFGR.B.CHDW = moveSize;
+}
+
+
+IFX_INLINE void IfxDma_setChannelShadow(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelShadow shadow)
+{
+ dma->CH[channelId].ADICR.B.SHCT = shadow;
+}
+
+
+IFX_INLINE void IfxDma_setChannelSingleMode(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCFGR.B.CHMODE = 0;
+}
+
+
+IFX_INLINE void IfxDma_setChannelSingleTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCFGR.B.RROAT = 1;
+}
+
+
+IFX_INLINE void IfxDma_setChannelSingleTransfer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCFGR.B.RROAT = 0;
+}
+
+
+IFX_INLINE void IfxDma_setChannelSourceAddress(Ifx_DMA *dma, IfxDma_ChannelId channelId, const void *address)
+{
+ dma->CH[channelId].SADR.U = (uint32)address;
+}
+
+
+IFX_INLINE void IfxDma_setChannelSourceIncrementStep(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_ChannelIncrementStep incStep, IfxDma_ChannelIncrementDirection direction, IfxDma_ChannelIncrementCircular size)
+{
+ Ifx_DMA_CH_ADICR adicr;
+ adicr.U = dma->CH[channelId].ADICR.U;
+ adicr.B.SMF = incStep;
+ adicr.B.INCS = direction;
+ adicr.B.CBLS = size;
+ dma->CH[channelId].ADICR.U = adicr.U;
+}
+
+
+IFX_INLINE void IfxDma_setChannelSuspendEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId, boolean enable)
+{
+ dma->SUSENR[channelId].B.SUSEN = enable;
+}
+
+
+IFX_INLINE void IfxDma_setChannelTransferCount(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint32 transferCount)
+{
+ dma->CH[channelId].CHCFGR.B.TREL = transferCount;
+}
+
+
+IFX_INLINE void IfxDma_setSleepMode(Ifx_DMA *dma, IfxDma_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ dma->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxDma_startChannelTransaction(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCSR.B.SCH = 1;
+}
+
+
+IFX_INLINE void IfxDma_switchDoubleBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].CHCSR.B.SWB = 1;
+}
+
+
+IFX_INLINE void IfxDma_writeChannelShadowDisable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].ADICR.B.SHCT &= ~(3 << 2);
+}
+
+
+IFX_INLINE void IfxDma_writeChannelShadowEnable(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].ADICR.B.SHCT |= (1 << 2);
+ dma->CH[channelId].ADICR.B.SHCT &= ~(1 << 3);
+}
+
+
+IFX_INLINE void IfxDma_setChannelHardwareResourcePartition(Ifx_DMA *dma, IfxDma_ChannelId channelId, IfxDma_HardwareResourcePartition resourcePartition)
+{
+ uint16 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPasswordInline();
+ IfxScuWdt_clearSafetyEndinitInline(endinitSfty_pw);
+ dma->HRR[channelId].B.HRP = resourcePartition;
+ IfxScuWdt_setSafetyEndinitInline(endinitSfty_pw);
+}
+
+
+IFX_INLINE void IfxDma_setInterruptControlValue(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint8 value)
+{
+ dma->CH[channelId].ADICR.B.INTCT = value;
+}
+
+
+IFX_INLINE void IfxDma_setCircularBufferDestinationLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
+{
+ dma->CH[channelId].ADICR.B.CBLD = length;
+}
+
+
+IFX_INLINE void IfxDma_setCircularBufferSourceLength(Ifx_DMA *dma, IfxDma_ChannelId channelId, uint16 length)
+{
+ dma->CH[channelId].ADICR.B.CBLS = length;
+}
+
+
+IFX_INLINE void IfxDma_enableSourceCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].ADICR.B.SCBE = 0x1U;
+}
+
+
+IFX_INLINE void IfxDma_enableDestinationCircularBuffer(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ dma->CH[channelId].ADICR.B.DCBE = 0x1U;
+}
+
+
+IFX_INLINE uint32 IfxDma_getDataCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->CH[channelId].RDCRCR.U;
+}
+
+
+IFX_INLINE uint32 IfxDma_getSourceAndDestinationCRC(Ifx_DMA *dma, IfxDma_ChannelId channelId)
+{
+ return dma->CH[channelId].SDCRCR.U;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxDma_getErrPointer(Ifx_DMA *dma)
+{
+ IFX_UNUSED_PARAMETER(dma);
+ return &MODULE_SRC.DMA.DMA[0].ERR;
+}
+
+
+#endif /* IFXDMA_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Dsadc/IfxDsadc_Dsadc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Dsadc/IfxDsadc_Dsadc.c
new file mode 100644
index 0000000..4e1d837
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Dsadc/IfxDsadc_Dsadc.c
@@ -0,0 +1,493 @@
+/**
+ * \file IfxDsadc_Dsadc.c
+ * \brief DSADC DSADC details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxDsadc_Dsadc.h"
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief calculate division factor
+ * \param sourceFreq Source frequency
+ * \param targetFreq Target frequency
+ * \return division factor
+ */
+IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx(float32 sourceFreq, float32 *targetFreq);
+
+/** \brief Initialises the auxilary filter
+ * \param channel Pointer to the DSADC channel handle
+ * \param config pointer to the DSADC fir auxilary filter configuration
+ * \return None
+ */
+IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config);
+
+/** \brief Initialises the comb filter
+ * \param channel Pointer to the DSADC channel handle
+ * \param config pointer to the DSADC comb filter configuration
+ * \return None
+ */
+IFX_STATIC void IfxDsadc_Dsadc_initCombFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config);
+
+/** \brief Initialises the demodulator
+ * \param channel Pointer to the DSADC channel handle
+ * \param config pointer to the DSADC demodulator configuration
+ * \return None
+ */
+IFX_STATIC void IfxDsadc_Dsadc_initDemodulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config);
+
+/** \brief Initialises the fir filter
+ * \param channel Pointer to the DSADC channel handle
+ * \param config pointer to the DSADC fir filter configuration
+ * \return None
+ */
+IFX_STATIC void IfxDsadc_Dsadc_initFirFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config);
+
+/** \brief Initialises the integrator
+ * \param channel Pointer to the DSADC channel handle
+ * \param config pointer to the DSADC fir integrator configuration
+ * \return None
+ */
+IFX_STATIC void IfxDsadc_Dsadc_initIntegrator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config);
+
+/** \brief Initialises the modulator
+ * \param channel Pointer to the DSADC channel handle
+ * \param config pointer to the DSADC modulator configuration
+ * \return None
+ */
+IFX_STATIC void IfxDsadc_Dsadc_initModulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config);
+
+/** \brief Initialises the rectifier
+ * \param channel Pointer to the DSADC channel handle
+ * \param config pointer to the DSADC fir rectifier configuration
+ * \return None
+ */
+IFX_STATIC void IfxDsadc_Dsadc_initRectifier(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config);
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+IFX_STATIC sint32 IfxDsadc_Dsadc_calcDIVx(float32 sourceFreq, float32 *targetFreq)
+{
+ float32 bestError = 10e6;
+ sint32 bestDiv = 2, i;
+
+ for (i = 2; i <= 32; i += 2)
+ {
+ float32 freq = sourceFreq / i;
+ float32 error = __absf(freq - *targetFreq);
+
+ if (__leqf(error, bestError))
+ {
+ bestError = error;
+ bestDiv = i;
+
+ if (!__neqf(error, 0))
+ {
+ break;
+ }
+ }
+ }
+
+ *targetFreq = sourceFreq / bestDiv;
+
+ return (bestDiv / 2) - 1;
+}
+
+
+sint16 IfxDsadc_Dsadc_getAuxResult(IfxDsadc_Dsadc_Channel *channel)
+{
+ return IfxDsadc_getAuxResult(channel->module, channel->channelId);
+}
+
+
+IFX_STATIC void IfxDsadc_Dsadc_initAuxFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_AuxFilterConfig *config)
+{
+ Ifx_DSADC_CH_FCFGA fcfga;
+
+ fcfga.U = 0;
+
+ fcfga.B.CFADF = config->decimationFactor - 1;
+ fcfga.B.CFAC = config->combFilterType;
+
+ fcfga.B.SRGA = config->serviceRequest;
+ fcfga.B.ESEL = config->eventSelect;
+ fcfga.B.EGT = config->eventGate;
+
+ fcfga.B.AFSC = config->combFilterShift;
+
+ (channel->channel)->FCFGA = fcfga;
+}
+
+
+void IfxDsadc_Dsadc_initCarrierGen(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_CarrierGenConfig *config)
+{
+ Ifx_DSADC_CGCFG cgcfg;
+
+ cgcfg.U = 0;
+
+ float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(dsadc->dsadc);
+ float32 targetFreq = config->frequency;
+ cgcfg.B.DIVCG = IfxDsadc_Dsadc_calcDIVx(sourceFreq / (32 * 32), &targetFreq);
+ cgcfg.B.SIGPOL = (config->inverted == FALSE) ? 0 : 1;
+ cgcfg.B.BREV = (config->bitReversed == FALSE) ? 0 : 1;
+ cgcfg.B.CGMOD = config->carrierWaveformMode;
+
+ dsadc->dsadc->CGCFG = cgcfg;
+
+ const IfxDsadc_Cgpwm_Out *pinPos = config->pinPos;
+
+ if (pinPos != NULL_PTR)
+ { /* Initialise positive carrier pin */
+ IfxDsadc_initCgPwmPin(pinPos, config->pinMode, config->pinDriver);
+ }
+
+ const IfxDsadc_Cgpwm_Out *pinNeg = config->pinNeg;
+
+ if (pinNeg != NULL_PTR)
+ { /* Initialise negative carrier pin */
+ IfxDsadc_initCgPwmPin(pinNeg, config->pinMode, config->pinDriver);
+ }
+}
+
+
+void IfxDsadc_Dsadc_initChannel(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ChannelConfig *config)
+{
+ Ifx_DSADC *dsadc = config->module;
+
+ channel->channelId = config->channelId;
+ channel->module = dsadc;
+ channel->channel = (Ifx_DSADC_CH *)&dsadc->CH[config->channelId];
+
+ IfxDsadc_Dsadc_initModulator(channel, &config->modulator);
+ IfxDsadc_Dsadc_initDemodulator(channel, &config->demodulator);
+ IfxDsadc_Dsadc_initCombFilter(channel, &config->combFilter);
+ IfxDsadc_Dsadc_initFirFilter(channel, &config->firFilter);
+ IfxDsadc_Dsadc_initIntegrator(channel, &config->integrator);
+ IfxDsadc_Dsadc_initAuxFilter(channel, &config->auxFilter);
+ IfxDsadc_Dsadc_initRectifier(channel, &config->rectifier);
+
+ const IfxDsadc_Dsadc_ChannelPins *pins = config->channelPins;
+
+ if (pins != NULL_PTR)
+ {
+ const IfxDsadc_Dsn_In *dsn = pins->dsn;
+
+ if (dsn != NULL_PTR)
+ {
+ IfxDsadc_initDsnPin(dsn, pins->dsnMode, pins->pinDriver);
+ }
+
+ const IfxDsadc_Dsp_In *dsp = pins->dsp;
+
+ if (dsp != NULL_PTR)
+ {
+ IfxDsadc_initDspPin(dsp, pins->dspMode, pins->pinDriver);
+ }
+
+ const IfxDsadc_Cin_In *cin = pins->cin;
+
+ if (cin != NULL_PTR)
+ {
+ IfxDsadc_initCinPin(cin, pins->cinMode, pins->pinDriver);
+ }
+
+ const IfxDsadc_Din_In *din = pins->din;
+
+ if (din != NULL_PTR)
+ {
+ IfxDsadc_initDinPin(din, pins->dinMode, pins->pinDriver);
+ }
+
+ const IfxDsadc_Itr_In *itr = pins->itr;
+
+ if (itr != NULL_PTR)
+ {
+ IfxDsadc_initItrPin(itr, pins->itrMode, pins->pinDriver);
+ }
+ }
+}
+
+
+void IfxDsadc_Dsadc_initChannelConfig(IfxDsadc_Dsadc_ChannelConfig *config, IfxDsadc_Dsadc *dsadc)
+{
+ const IfxDsadc_Dsadc_ChannelConfig IfxDsadc_Dsadc_defaultChannelConfig = {
+ .modulator = {
+ .positiveInput = IfxDsadc_InputConfig_inputPin,
+ .negativeInput = IfxDsadc_InputConfig_referenceGround,
+ .inputGain = IfxDsadc_InputGain_factor1,
+ .inputPin = IfxDsadc_InputPin_a,
+ .modulatorClockFreq = 10.0e6,
+ .commonModeVoltage = IfxDsadc_CommonModeVoltage_c,
+ },
+ .demodulator = {
+ .inputDataSource = IfxDsadc_InputDataSource_onChipStandAlone,
+ .triggerInput = IfxDsadc_TriggerInput_a,
+ .integrationTrigger = IfxDsadc_IntegratorTrigger_bypassed,
+ .timestampTrigger = IfxDsadc_TimestampTrigger_noTrigger,
+ .sampleClockSource = IfxDsadc_SampleClockSource_internal,
+ .sampleStrobe = IfxDsadc_SampleStrobe_sampleOnRisingEdge,
+ },
+ .combFilter = {
+ .bypassed = FALSE,
+ .combFilterType = IfxDsadc_MainCombFilterType_comb3,
+ .combFilterShift = IfxDsadc_MainCombFilterShift_noShift,
+ .serviceRequest = IfxDsadc_MainServiceRequest_everyNewResult,
+ .decimationFactor = 50,
+ .startValue = 0,
+ },
+ .firFilter = {
+ .fir0Enabled = FALSE,
+ .fir1Enabled = FALSE,
+ .offsetCompensation = FALSE,
+ .dataShift = IfxDsadc_FirDataShift_noShift,
+ .internalShift = IfxDsadc_FirInternalShift_noShift,
+ },
+ .integrator = {
+ .windowSize = IfxDsadc_IntegrationWindowSize_internalControl,
+ .discardCount = 0,
+ .integrationCount = 20,
+ .integrationCycles = 1,
+ },
+ .auxFilter = {
+ .bypassed = TRUE,
+ .combFilterType = IfxDsadc_AuxCombFilterType_comb1,
+ .combFilterShift = IfxDsadc_AuxCombFilterShift_noShift,
+ .serviceRequest = IfxDsadc_AuxServiceRequest_never,
+ .eventSelect = IfxDsadc_AuxEvent_everyNewResult,
+ .eventGate = IfxDsadc_AuxGate_definedByESEL,
+ .decimationFactor = 4,
+ },
+ .rectifier = {
+ .enabled = FALSE,
+ .signSource = IfxDsadc_RectifierSignSource_onChipGenerator,
+ .signDelay = 0,
+ .signPeriod = 0,
+ },
+
+ .channelPins = NULL_PTR
+ };
+
+ *config = IfxDsadc_Dsadc_defaultChannelConfig;
+ config->channelId = IfxDsadc_ChannelId_0;
+
+ if (dsadc != NULL_PTR)
+ {
+ config->module = dsadc->dsadc;
+ }
+ else
+ {
+ config->module = NULL_PTR;
+ }
+}
+
+
+IFX_STATIC void IfxDsadc_Dsadc_initCombFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_CombFilterConfig *config)
+{
+ Ifx_DSADC_CH_FCFGC fcfgc;
+
+ fcfgc.U = 0;
+
+ fcfgc.B.CFMDF = config->decimationFactor - 1;
+ fcfgc.B.CFMC = config->combFilterType;
+ fcfgc.B.CFEN = (config->bypassed == FALSE) ? 1 : 0;
+
+ fcfgc.B.MFSC = config->combFilterShift;
+
+ fcfgc.B.SRGM = config->serviceRequest;
+ fcfgc.B.CFMSV = config->startValue - 1;
+
+ (channel->channel)->FCFGC = fcfgc;
+}
+
+
+IFX_STATIC void IfxDsadc_Dsadc_initDemodulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_DemodulatorConfig *config)
+{
+ Ifx_DSADC_CH_DICFG dicfg;
+
+ dicfg.U = 0;
+
+ dicfg.B.DSRC = config->inputDataSource;
+ dicfg.B.DSWC = 1; // enable write access for this bitfield
+
+ dicfg.B.ITRMODE = config->integrationTrigger;
+ dicfg.B.TSTRMODE = config->timestampTrigger;
+ dicfg.B.TRSEL = config->triggerInput;
+ dicfg.B.TRWC = 1; // enable write access for these bitfields
+
+ dicfg.B.CSRC = config->sampleClockSource;
+ dicfg.B.STROBE = config->sampleStrobe;
+ dicfg.B.SCWC = 1; // enable write access for these bitfields
+
+ (channel->channel)->DICFG = dicfg;
+}
+
+
+IFX_STATIC void IfxDsadc_Dsadc_initFirFilter(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_FirFilterConfig *config)
+{
+ Ifx_DSADC_CH_FCFGM fcfgm;
+
+ fcfgm.U = 0;
+
+ fcfgm.B.FIR0EN = (config->fir0Enabled != FALSE) ? 1 : 0;
+ fcfgm.B.FIR1EN = (config->fir1Enabled != FALSE) ? 1 : 0;
+ fcfgm.B.OCEN = (config->offsetCompensation != FALSE) ? 1 : 0;
+ fcfgm.B.DSH = config->dataShift;
+ fcfgm.B.FSH = config->internalShift;
+
+ (channel->channel)->FCFGM = fcfgm;
+}
+
+
+IFX_STATIC void IfxDsadc_Dsadc_initIntegrator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_IntegratorConfig *config)
+{
+ Ifx_DSADC_CH_IWCTR iwctr;
+
+ iwctr.U = 0;
+
+ iwctr.B.REPVAL = config->integrationCycles - 1;
+ iwctr.B.NVALDIS = config->discardCount;
+ iwctr.B.IWS = config->windowSize;
+ iwctr.B.NVALINT = config->integrationCount - 1;
+
+ (channel->channel)->IWCTR = iwctr;
+}
+
+
+IFX_STATIC void IfxDsadc_Dsadc_initModulator(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_ModulatorConfig *config)
+{
+ Ifx_DSADC_CH_MODCFG modcfg;
+
+ modcfg.U = 0;
+
+ modcfg.B.INCFGP = config->positiveInput;
+ modcfg.B.INCFGN = config->negativeInput;
+ modcfg.B.GAINSEL = config->inputGain;
+ modcfg.B.INSEL = config->inputPin;
+ modcfg.B.INCWC = 1; // enable write access for these bitfields
+
+ float32 targetFreq = config->modulatorClockFreq;
+ float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(channel->module);
+ modcfg.B.DIVM = IfxDsadc_Dsadc_calcDIVx(sourceFreq, &targetFreq);
+ modcfg.B.DWC = 1; // enable write access for this bitfield
+
+ modcfg.B.CMVS = config->commonModeVoltage;
+ modcfg.B.GCEN = 0; // normal operation (calibration mode disabled)
+ modcfg.B.MWC = 1; // enable write access for these bitfields
+
+ (channel->channel)->MODCFG = modcfg;
+}
+
+
+void IfxDsadc_Dsadc_initModule(IfxDsadc_Dsadc *dsadc, const IfxDsadc_Dsadc_Config *config)
+{
+ Ifx_DSADC *dsadcSFR = config->dsadc;
+
+ dsadc->dsadc = dsadcSFR;
+
+ {
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ dsadcSFR->CLC.U = 0x00000000;
+
+ if (dsadcSFR->CLC.U)
+ {} // sync access
+
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ {
+ Ifx_DSADC_GLOBCFG globcfg;
+ globcfg.U = dsadcSFR->GLOBCFG.U;
+
+ globcfg.B.MCSEL = config->modulatorClockSelect;
+ globcfg.B.LOSUP = config->lowPowerSupply;
+ globcfg.B.PSWC = 1;
+
+ dsadcSFR->GLOBCFG.U = globcfg.U;
+ }
+ }
+}
+
+
+void IfxDsadc_Dsadc_initModuleConfig(IfxDsadc_Dsadc_Config *config, Ifx_DSADC *dsadc)
+{
+ const IfxDsadc_Dsadc_Config IfxDsadc_Dsadc_defaultConfig = {
+ .modulatorClockSelect = IfxDsadc_ModulatorClock_fDSD,
+ .lowPowerSupply = IfxDsadc_LowPowerSupply_5V
+ };
+
+ *config = IfxDsadc_Dsadc_defaultConfig;
+ config->dsadc = dsadc;
+}
+
+
+IFX_STATIC void IfxDsadc_Dsadc_initRectifier(IfxDsadc_Dsadc_Channel *channel, const IfxDsadc_Dsadc_RectifierConfig *config)
+{
+ Ifx_DSADC_CH_RECTCFG rect;
+
+ rect.U = 0;
+ rect.B.RFEN = config->enabled;
+ rect.B.SSRC = config->signSource;
+ (channel->channel)->RECTCFG = rect;
+ (channel->channel)->CGSYNC.B.SDPOS = config->signDelay;
+ (channel->channel)->CGSYNC.B.SDNEG = config->signDelay + (config->signPeriod / 2);
+ (channel->channel)->IWCTR.B.NVALDIS = config->signDelay + 1;
+}
+
+
+void IfxDsadc_Dsadc_initCarrierGenConfig(IfxDsadc_Dsadc_CarrierGenConfig *config)
+{
+ config->bitReversed = FALSE;
+ config->carrierWaveformMode = IfxDsadc_CarrierWaveformMode_sine;
+ config->frequency = 10000;
+ config->inverted = FALSE;
+ config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+ config->pinMode = IfxPort_OutputMode_pushPull;
+ config->pinNeg = NULL_PTR;
+ config->pinPos = NULL_PTR;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Dsadc/IfxDsadc_Dsadc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Dsadc/IfxDsadc_Dsadc.h
new file mode 100644
index 0000000..836121a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Dsadc/IfxDsadc_Dsadc.h
@@ -0,0 +1,539 @@
+/**
+ * \file IfxDsadc_Dsadc.h
+ * \brief DSADC DSADC details
+ * \ingroup IfxLld_Dsadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dsadc_Dsadc_Usage How to use the DSADC Interface driver?
+ * \ingroup IfxLld_Dsadc
+ *
+ * The DSADC interface driver provides a default DSADC configuration for converting analog data streams inputs from external modulators via digital input channels, into digital values by using the on-chip demodulator channels.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Dsadc_Dsadc_Preparation Preparation
+ * \subsection IfxLld_Dsadc_Dsadc_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Dsadc_Dsadc_Variables Variables
+ *
+ * Declare the DSADC channel handle and available channels as global variables in your C code:
+ *
+ * \code
+ * static IfxDsadc_Dsadc dsadc;
+ * IfxDsadc_Dsadc_Channel dsadcChannel[IFXDSADC_NUM_CHANNELS];
+ *
+ * #if defined(DERIVATIVE_TC22x) || defined(DERIVATIVE_TC23x) || defined(DERIVATIVE_TC24x)
+ * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 0, 1 };
+ *
+ * #elif defined(DERIVATIVE_TC27x) || defined(DERIVATIVE_TC27xB) || defined(DERIVATIVE_TC27xC) || defined(DERIVATIVE_TC27xD)
+ * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1 };
+ *
+ * #elif defined(DERIVATIVE_TC26x) || defined(DERIVATIVE_TC26xB)
+ * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 0, 1, 1 };
+ *
+ * #elif defined(DERIVATIVE_TC29x) || defined(DERIVATIVE_TC29xB)
+ * uint8 dsadcChannelAvailable[IFXDSADC_NUM_CHANNELS] = { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
+ *
+ * #else
+ * # error "Testcase not prepared for this derivative!"
+ * #endif
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Dsadc_Dsadc_Init Module Initialisation
+ *
+ * The module initialisation can be done in the same function. Here an example:
+ * \code
+ *
+ * // create module config
+ * IfxDsadc_Dsadc_Config dsadcConfig;
+ * IfxDsadc_Dsadc_initModuleConfig(&dsadcConfig, &MODULE_DSADC);
+ *
+ * // initialize module
+ *
+ * IfxDsadc_Dsadc_initModule(&dsadc, &dsadcConfig);
+ *
+ * // create channel config
+ * IfxDsadc_Dsadc_ChannelConfig dsadcChannelConfig;
+ * IfxDsadc_Dsadc_initChannelConfig(&dsadcChannelConfig, &dsadc);
+ *
+ * // modify default configuration
+ * dsadcChannelConfig.modulator.positiveInput = IfxDsadc_InputConfig_inputPin;
+ * dsadcChannelConfig.modulator.negativeInput = IfxDsadc_InputConfig_inputPin;
+ * dsadcChannelConfig.modulator.inputGain = IfxDsadc_InputGain_factor1;
+ * dsadcChannelConfig.modulator.inputPin = IfxDsadc_InputPin_a;
+ * dsadcChannelConfig.modulator.modulatorClockFreq = 10.0e6;
+ * dsadcChannelConfig.modulator.commonModeVoltage = IfxDsadc_CommonModeVoltage_c;
+ *
+ * dsadcChannelConfig.combFilter.bypassed = FALSE;
+ * dsadcChannelConfig.combFilter.combFilterType = IfxDsadc_MainCombFilterType_comb3;
+ * dsadcChannelConfig.combFilter.combFilterShift = IfxDsadc_MainCombFilterShift_noShift;
+ * dsadcChannelConfig.combFilter.serviceRequest = IfxDsadc_MainServiceRequest_everyNewResult;
+ * dsadcChannelConfig.combFilter.decimationFactor = 32;
+ * dsadcChannelConfig.combFilter.startValue = 32;
+ *
+ * dsadcChannelConfig.firFilter.fir0Enabled = TRUE;
+ * dsadcChannelConfig.firFilter.fir1Enabled = TRUE;
+ * dsadcChannelConfig.firFilter.offsetCompensation = FALSE;
+ * dsadcChannelConfig.firFilter.dataShift = IfxDsadc_FirDataShift_shiftBy2;
+ * dsadcChannelConfig.firFilter.internalShift = IfxDsadc_FirInternalShift_shiftBy1;
+ *
+ *
+ * // initialize channels
+ * for(int chn=0; chnmodule, channel->channelId);
+}
+
+
+IFX_INLINE sint16 IfxDsadc_Dsadc_getMainResult(IfxDsadc_Dsadc_Channel *channel)
+{
+ return IfxDsadc_getMainResult(channel->module, channel->channelId);
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxDsadc_Dsadc_getMainSrc(IfxDsadc_Dsadc_Channel *channel)
+{
+ return IfxDsadc_getMainSrc(channel->module, channel->channelId);
+}
+
+
+IFX_INLINE void IfxDsadc_Dsadc_startScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask, uint32 channelMask)
+{
+ IfxDsadc_startScan(dsadc->dsadc, modulatorMask, channelMask);
+}
+
+
+IFX_INLINE void IfxDsadc_Dsadc_stopScan(IfxDsadc_Dsadc *dsadc, uint32 modulatorMask)
+{
+ IfxDsadc_stopScan(dsadc->dsadc, modulatorMask);
+}
+
+
+#endif /* IFXDSADC_DSADC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Rdc/IfxDsadc_Rdc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Rdc/IfxDsadc_Rdc.c
new file mode 100644
index 0000000..a102cc6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Rdc/IfxDsadc_Rdc.c
@@ -0,0 +1,572 @@
+/**
+ * \file IfxDsadc_Rdc.c
+ * \brief DSADC RDC details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxDsadc_Rdc.h"
+#include "string.h"
+#include "Gtm/Trig/IfxGtm_Trig.h"
+
+/** \addtogroup IfxLld_Dsadc_Rdc_func_config
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/**
+ * \param gtm Pointer to GTM module registers
+ * \param tim TIM Number
+ * \param timCh TIM Channel Number
+ * \param risingEdge Signal level control
+ */
+IFX_STATIC Ifx_GTM_TIM_CH *IfxDsadc_Rdc_initGtmTim(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge);
+
+/** \brief Initialise the DSADC hardware channels
+ * \param driver Driver handle
+ * \param config DSADC RDC configuration structure
+ */
+IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
+
+/** \brief Initialise the GTM timestamp hardware resources
+ * \param driver Driver handle
+ * \param config DSADC RDC configuration structure
+ * \return None
+ */
+IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Rdc_func_utility
+ * \{ */
+/******************************************************************************/
+/*------------------------Inline Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Updating RDC timestamps
+ * \param driver Driver handle
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_Rdc_updateTimestamp(IfxDsadc_Rdc *driver);
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Group Dalay calculation
+ * \param driver Driver handle
+ */
+IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay(IfxDsadc_Rdc *driver);
+
+/**
+ * \param config DSADC RDC configuration structure
+ */
+IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod(const IfxDsadc_Rdc_Config *config);
+
+/** \brief Return the update period.
+ * \param driver Driver handle
+ * \return Return the update period in [seconds], i.e. the period of new result (and interrupt)
+ */
+IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod(IfxDsadc_Rdc *driver);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Rdc_variable
+ * \{ */
+
+/******************************************************************************/
+/*------------------------Private Variables/Constants-------------------------*/
+/******************************************************************************/
+
+/** \brief GTM TIM Configuration settings
+ */
+IFX_STATIC IFX_CONST Ifx_GTM_TIM_CH_CTRL_Bits IfxDsadc_Rdc_GtmTimCfg = {
+ .TIM_EN = 1,
+ .TIM_MODE = IfxGtm_Tim_Mode_inputEvent,
+ .GPR0_SEL = IfxGtm_Tim_GprSel_tbuTs0,
+ .GPR1_SEL = IfxGtm_Tim_GprSel_tbuTs0,
+ .CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg,
+ /*.EGPR0_SEL= 0, //not available in A-step */
+ .DSL = 0, /* 0 = falling or low */
+ .ISL = 0, /* 1 = both edges, ignore DSL */
+};
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxDsadc_Rdc_updateTimestamp(IfxDsadc_Rdc *driver)
+{
+ IfxDsadc_Rdc_Ts *timestamp = &driver->timestamp;
+ IfxDsadc_Rdc_Hw *hwHandle = &driver->hardware;
+
+ uint32 tsPwm = hwHandle->pwmTimCh->GPR0.B.GPR0;
+ uint32 clockTicks = (tsPwm - timestamp->rdc) % timestamp->maxTicks;
+# if IFXDSADC_RDC_CFG_DEBUG
+ timestamp->inTicks = clockTicks;
+ timestamp->pwm = tsPwm;
+# endif
+ timestamp->inSeconds = timestamp->clockPeriod * (float32)clockTicks;
+}
+
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+IFX_STATIC float32 IfxDsadc_Rdc_calculateGroupDelay(IfxDsadc_Rdc *driver)
+{
+ Ifx_DSADC *dsadc = driver->hardware.inputSin.module;
+ return IfxDsadc_getMainGroupDelay(dsadc, driver->hardware.inputSin.channelId);
+}
+
+
+IFX_STATIC float32 IfxDsadc_Rdc_calculateTimestampPeriod(const IfxDsadc_Rdc_Config *config)
+{
+ Ifx_GTM *gtm = config->hardware.gtmTimestamp.gtm;
+ return 1.0F / IfxGtm_Tbu_getClockFrequency(gtm, IfxGtm_Tbu_Ts_0);
+}
+
+
+float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getAbsolutePosition(&driver->angleTrk);
+}
+
+
+IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getDirection(&driver->angleTrk);
+}
+
+
+sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getOffset(&driver->angleTrk);
+}
+
+
+float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getPosition(&driver->angleTrk);
+}
+
+
+float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getRefreshPeriod(&driver->angleTrk);
+}
+
+
+sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getResolution(&driver->angleTrk);
+}
+
+
+IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver)
+{
+ return IfxStdIf_Pos_SensorType_resolver;
+}
+
+
+sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getTurn(&driver->angleTrk);
+}
+
+
+IFX_STATIC float32 IfxDsadc_Rdc_getUpdatePeriod(IfxDsadc_Rdc *driver)
+{
+ IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
+ return 1.0F / IfxDsadc_getIntegratorOutFreq(hwHandle->inputSin.module, hwHandle->inputSin.channelId);
+}
+
+
+boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
+{
+ boolean result = TRUE;
+ /* Initialise the DSADC hardware channels */
+ result &= IfxDsadc_Rdc_initHwChannels(driver, config);
+
+ /* Initialise the GTM timestamp hardware resources */
+ IfxDsadc_Rdc_initHwTimestamp(driver, config);
+
+ /* Initialise the software resources */
+ {
+ driver->updatePeriod = IfxDsadc_Rdc_getUpdatePeriod(driver);
+ driver->groupDelay = IfxDsadc_Rdc_calculateGroupDelay(driver);
+ driver->timestamp.enabled = TRUE;
+ driver->timestamp.clockPeriod = IfxDsadc_Rdc_calculateTimestampPeriod(config);
+ driver->timestamp.maxTicks = (uint32)(driver->updatePeriod / driver->timestamp.clockPeriod);
+ }
+
+ /* Initialise angle-tracking observer */
+ {
+ Ifx_AngleTrkF32_Config atoConfig;
+ Ifx_AngleTrkF32_initConfig(&atoConfig, &(driver->sinIn), &(driver->cosIn));
+
+ atoConfig.offset = config->offset;
+ atoConfig.speedLpfFc = config->speedLpfFc;
+ atoConfig.reversed = config->reversed;
+ atoConfig.errorThreshold = config->errorThreshold;
+ atoConfig.sqrAmplMax = config->sqrAmplMax;
+ atoConfig.sqrAmplMin = config->sqrAmplMin;
+ atoConfig.periodPerRotation = config->periodPerRotation;
+
+ atoConfig.kp = config->kp;
+ atoConfig.ki = config->ki;
+ atoConfig.kd = config->kd;
+ atoConfig.resolution = config->resolution;
+
+#if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION
+ Ifx_AngleTrkF32_init(&(driver->angleTrk), &atoConfig, config->userTs);
+#else
+ Ifx_AngleTrkF32_init(&(driver->angleTrk), &atoConfig, driver->updatePeriod);
+#endif
+ }
+
+ /* Optional calibration init */
+ {}
+ return result;
+}
+
+
+void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config)
+{
+ config->kp = 0; /* Force to used default from Ifx_AngleTrkF32 */
+ config->ki = 0;
+ config->kd = 0;
+ config->speedLpfFc = 100;
+ config->errorThreshold = 5.0f / 180 * IFX_PI;
+ config->userTs = 0;
+ config->sqrAmplMax = (sint32)((1.01f * 1.01f) * 2048);
+ config->sqrAmplMin = (sint32)((0.99f * 0.99f) * 2048);
+ config->periodPerRotation = 1;
+ config->reversed = FALSE;
+ config->resolution = (1UL << 12); /** \brief 12-bit default resolution */
+ config->offset = 0;
+ IfxDsadc_Dsadc_initCarrierGenConfig(&config->hardware.carrierGen);
+ config->hardware.gtmTimestamp.gtm = &MODULE_GTM;
+ config->hardware.gtmTimestamp.pwmTim = NULL_PTR;
+ config->hardware.gtmTimestamp.rdcTim = IfxGtm_Tim_0;
+ config->hardware.gtmTimestamp.rdcTimChannel = IfxGtm_Tim_Ch_0;
+ config->hardware.gtmTimestamp.rdcTimMuxValue = 0;
+ IfxDsadc_Dsadc_initChannelConfig(&config->hardware.inputConfig, NULL_PTR);
+ config->hardware.inputCos = IfxDsadc_ChannelId_0;
+
+ config->hardware.inputSin = IfxDsadc_ChannelId_2;
+
+ config->hardware.outputClock = NULL_PTR;
+ config->hardware.servReqPriority = 0;
+ config->hardware.servReqProvider = IfxSrc_Tos_cpu0;
+ config->hardware.startScan = FALSE;
+}
+
+
+IFX_STATIC Ifx_GTM_TIM_CH *IfxDsadc_Rdc_initGtmTim(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch timCh, boolean risingEdge)
+{
+ Ifx_GTM_TIM_CH *pTimCh = IfxGtm_Tim_getChannel(>m->TIM[tim], timCh);
+ Ifx_GTM_TIM_CH_CTRL ctrl;
+ ctrl.B = IfxDsadc_Rdc_GtmTimCfg;
+ ctrl.B.DSL = (risingEdge != FALSE) ? 1 : 0;
+ pTimCh->CTRL.U = ctrl.U;
+ return pTimCh;
+}
+
+
+IFX_STATIC boolean IfxDsadc_Rdc_initHwChannels(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
+{
+ // #if IFXDSADC_HW_INIT
+ IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
+ const IfxDsadc_Rdc_ConfigHw *configHw = &config->hardware;
+ Ifx_DSADC *module = configHw->inputConfig.module;
+ boolean result = (module != NULL_PTR) ? TRUE : FALSE;
+
+ if (result != FALSE)
+ {
+ /* Initialise input channels */
+ {
+ IfxDsadc_Dsadc_ChannelConfig channelConfig = configHw->inputConfig;
+ channelConfig.channelId = configHw->inputCos;
+ IfxDsadc_Dsadc_initChannel(&hwHandle->inputCos, &channelConfig);
+
+ channelConfig.channelId = configHw->inputSin;
+ IfxDsadc_Dsadc_initChannel(&hwHandle->inputSin, &channelConfig);
+
+ if (configHw->servReqPriority != 0)
+ {
+ IfxDsadc_ChannelId ch = channelConfig.channelId;
+
+ volatile Ifx_SRC_SRCR *srcr;
+
+ if (ch == 0)
+ {
+ srcr = &MODULE_SRC.DSADC.DSADC0.SRM;
+ }
+
+ else if (ch == 2)
+ {
+ srcr = &MODULE_SRC.DSADC.DSADC2.SRM;
+ }
+
+ else if (ch == 3)
+ {
+ srcr = &MODULE_SRC.DSADC.DSADC3.SRM;
+ }
+
+ IfxSrc_init(srcr, configHw->servReqProvider, configHw->servReqPriority);
+ IfxSrc_enable(srcr);
+ }
+ }
+
+ /* Initialise carrier generator, if necessary */
+ if ((configHw->carrierGen.pinNeg != NULL_PTR) || (configHw->carrierGen.pinPos != NULL_PTR))
+ {
+ IfxDsadc_Dsadc_initCarrierGen(config->dsadc, &configHw->carrierGen);
+ }
+
+ /* Start conversion, if necessary */
+ if (configHw->startScan != FALSE)
+ {
+ IfxDsadc_Rdc_startConversion(driver);
+ }
+
+ /* Initialise modulator clock output, if necessary */
+ if (configHw->outputClock != NULL_PTR)
+ {
+ const IfxPort_Pin *clkPin = &(configHw->outputClock->pin);
+ IfxPort_setPinModeOutput(clkPin->port, clkPin->pinIndex, configHw->carrierGen.pinMode, configHw->outputClock->select);
+ IfxPort_setPinPadDriver(clkPin->port, clkPin->pinIndex, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+ }
+ }
+
+ return result;
+}
+
+
+IFX_STATIC void IfxDsadc_Rdc_initHwTimestamp(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config)
+{
+ IfxDsadc_Rdc_Hw *hwHandle = &(driver->hardware);
+ const IfxDsadc_Rdc_ConfigHw *configHw = &config->hardware;
+ const IfxDsadc_Rdc_GtmTimestamp *tsConfig = &(configHw->gtmTimestamp);
+ Ifx_GTM *gtm = tsConfig->gtm;
+
+ /** - Initialize TIM channel which is triggered by application's PWM */
+ {
+ boolean risingEdge = (configHw->inputConfig.demodulator.timestampTrigger == IfxDsadc_TimestampTrigger_risingEdge);
+ hwHandle->pwmTimCh = IfxDsadc_Rdc_initGtmTim(gtm, tsConfig->pwmTim->tim, tsConfig->pwmTim->channel, risingEdge);
+
+ /* connect into TIM timer input: */
+ IfxGtm_PinMap_setTimTin(tsConfig->pwmTim, IfxPort_InputMode_undefined);
+ }
+ /** - Initialize TIM channel which is triggered by DSADC sample event */
+ {
+ hwHandle->rdcTimCh = IfxDsadc_Rdc_initGtmTim(gtm, tsConfig->rdcTim, tsConfig->rdcTimChannel, TRUE);
+
+ /** - Connect DSADC trigger to TIM mux */
+ IfxGtm_Trig_fromDsadc(gtm, configHw->inputSin, tsConfig->rdcTim, tsConfig->rdcTimChannel);
+
+ /** - Connect into TIM input */
+ uint32 shift = tsConfig->rdcTimChannel * 4;
+ __ldmst_c(&(gtm->INOUTSEL.TIM[tsConfig->rdcTim].INSEL.U), (0xFU << shift), (tsConfig->rdcTimMuxValue << shift));
+ }
+ IfxGtm_Tbu_enableChannel(gtm, IfxGtm_Tbu_Ts_0);
+}
+
+
+void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver)
+{
+ driver->timestamp.rdc = driver->hardware.rdcTimCh->GPR0.B.GPR0;
+
+ Ifx_DSADC *dsadc = driver->hardware.inputSin.module;
+ driver->sinIn = IfxDsadc_getMainResult(dsadc, driver->hardware.inputSin.channelId);
+ driver->cosIn = IfxDsadc_getMainResult(dsadc, driver->hardware.inputCos.channelId);
+ /*
+ */
+
+#if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION == 0
+ {
+ sint16 sinIn = driver->sinIn;
+ sint16 cosIn = driver->cosIn;
+
+ /* tracking observer (note: atan2 lookup function is available inside) */
+ Ifx_AngleTrkF32_step(&(driver->angleTrk), sinIn, cosIn, 0);
+ Ifx_AngleTrkF32_updateStatus(&(driver->angleTrk), sinIn, cosIn);
+ }
+#endif
+}
+
+
+void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver)
+{
+ Ifx_AngleTrkF32_reset(&driver->angleTrk);
+}
+
+
+void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver)
+{
+ Ifx_AngleTrkF32_resetFaults(&driver->angleTrk);
+}
+
+
+void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset)
+{
+ Ifx_AngleTrkF32_setOffset(&driver->angleTrk, offset);
+}
+
+
+void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod)
+{
+ Ifx_AngleTrkF32_setRefreshPeriod(&driver->angleTrk, updatePeriod);
+}
+
+
+void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver)
+{
+ Ifx_DSADC *module = driver->hardware.inputSin.module;
+ uint32 mask =
+ (1U << driver->hardware.inputCos.channelId) |
+ (1U << driver->hardware.inputSin.channelId);
+ IfxDsadc_startScan(module, mask, mask);
+}
+
+
+boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver)
+{
+ /* Ensure the stdif is reset to zeros */
+ memset(stdif, 0, sizeof(IfxStdIf_Pos));
+
+ /* Set the driver */
+ stdif->driver = driver;
+
+ /* *INDENT-OFF* Note: this file was indented manually by the author. */
+ /* Set the API link */
+ stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )NULL_PTR;
+ stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&IfxDsadc_Rdc_getAbsolutePosition;
+ stdif->getDirection =(IfxStdIf_Pos_GetDirection )&IfxDsadc_Rdc_getDirection;
+ stdif->getFault =(IfxStdIf_Pos_GetFault )&IfxDsadc_Rdc_getFault;
+ stdif->getOffset =(IfxStdIf_Pos_GetOffset )&IfxDsadc_Rdc_getOffset;
+ stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&IfxDsadc_Rdc_getPeriodPerRotation;
+ stdif->getPosition =(IfxStdIf_Pos_GetPosition )&IfxDsadc_Rdc_getPosition;
+ stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&IfxDsadc_Rdc_getRawPosition;
+ stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&IfxDsadc_Rdc_getRefreshPeriod;
+ stdif->getResolution =(IfxStdIf_Pos_GetResolution )&IfxDsadc_Rdc_getResolution;
+ stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&IfxDsadc_Rdc_getSensorType;
+ stdif->reset =(IfxStdIf_Pos_Reset )&IfxDsadc_Rdc_reset;
+ stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&IfxDsadc_Rdc_resetFaults;
+ stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&IfxDsadc_Rdc_getSpeed;
+ stdif->update =(IfxStdIf_Pos_Update )&IfxDsadc_Rdc_update;
+ stdif->setPosition =(IfxStdIf_Pos_SetPosition )NULL_PTR;
+ stdif->setRawPosition =(IfxStdIf_Pos_SetRawPosition )NULL_PTR;
+ stdif->setSpeed =(IfxStdIf_Pos_SetSpeed )NULL_PTR;
+ stdif->setOffset =(IfxStdIf_Pos_SetOffset )&IfxDsadc_Rdc_setOffset;
+ stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&IfxDsadc_Rdc_setRefreshPeriod;
+ stdif->getTurn =(IfxStdIf_Pos_GetTurn )&IfxDsadc_Rdc_getTurn;
+ stdif->onEventA =(IfxStdIf_Pos_OnEventA )&IfxDsadc_Rdc_onEventA;
+ /* *INDENT-ON* */
+
+ return TRUE;
+}
+
+
+void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver)
+{
+ float32 groupDelayAngle;
+ float32 timeStampAngle;
+ float32 angleOut;
+ float32 speedEst;
+ float32 angleCorrection;
+
+ /* previous estimated speed */
+ speedEst = Ifx_AngleTrkF32_getLoopSpeed(&(driver->angleTrk));
+
+ /* angular component due to group delay */
+ groupDelayAngle = driver->groupDelay * speedEst;
+
+ /* angular component due to time-stamp, if time-stamping is enabled */
+ if (driver->timestamp.enabled != FALSE)
+ {
+ IfxDsadc_Rdc_updateTimestamp(driver);
+ timeStampAngle = IfxDsadc_Rdc_getTimestamp(driver) * speedEst;
+ }
+ else
+ {
+ timeStampAngle = 0;
+ }
+
+ /* angle correction value */
+ angleCorrection = groupDelayAngle + timeStampAngle;
+
+#if IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION != 0
+ /*
+ * driver->sinIn = (sint16)driver->hardware.inputSin.channel->TSTMP.B.RESULT;
+ * driver->cosIn = (sint16)driver->hardware.inputCos.channel->TSTMP.B.RESULT;
+ */
+
+ {
+ sint16 sinIn = driver->sinIn;
+ sint16 cosIn = driver->cosIn;
+
+ /* tracking observer (note: atan2 lookup function is available inside) */
+ Ifx_AngleTrkF32_step(&(driver->angleTrk), sinIn, cosIn, angleCorrection);
+ Ifx_AngleTrkF32_updateStatus(&(driver->angleTrk), sinIn, cosIn);
+ }
+ angleOut = driver->angleTrk.angleEst;
+#else
+ angleOut = driver->angleTrk.angleEst + angleCorrection;
+#endif
+
+ /* final output estimation */
+ {
+ Ifx_AngleTrkF32_PosIf *base = &(driver->angleTrk).base;
+ IfxStdIf_Pos_RawAngle newPosition = (IfxStdIf_Pos_RawAngle)(angleOut * (base->resolution / 2) / IFX_PI);
+ newPosition = (newPosition + base->offset) & (base->resolution - 1);
+ base->rawPosition = newPosition;
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Rdc/IfxDsadc_Rdc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Rdc/IfxDsadc_Rdc.h
new file mode 100644
index 0000000..776621a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Rdc/IfxDsadc_Rdc.h
@@ -0,0 +1,634 @@
+/**
+ * \file IfxDsadc_Rdc.h
+ * \brief DSADC RDC details
+ * \ingroup IfxLld_Dsadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * Please refer to page \ref page_dsadc_rdc for more details.
+ * This module uses the following modules:
+ * - \ref IfxLld_Dsadc
+ * - \ref library_srvsw_sysse_math_f32_angletrk
+ *
+ *
+ *
+ * Example usage:
+ * Initialisation shall be done by using IfxDsadc_Rdc_init().
+ * \code
+ * IfxDsadc_Rdc rdcHandle;
+ * IfxDsadc_Rdc_Config rdcConfig;
+ *
+ * IfxDsadc_Rdc_initConfig(&rdcConfig);
+ * rdcConfig.hardware.inputConfig.module = &MODULE_DSADC;
+ * IfxDsadc_Rdc_init(&rdcHandle, &rdcConfig);
+ * IfxDsadc_Rdc_startConversion(&rdcHandle);
+ *
+ * \endcode
+ *
+ * After successful initialisation, one DSADC channel may generate interrupt request to CPU.
+ * Function IfxDsadc_Rdc_onEventA() shall be called in the interrupt service routine.
+ *
+ * The function IfxDsadc_Rdc_update() shall be called in the user application's task
+ * or interrupt context for updating the final outputs (position and speed),
+ * (e.g. running inside motor PWM interrupt context)
+ * \name Getting result functions
+ *
+ * \code
+ * { // within context of user's application interrupt or task
+ * extern IfxDsadc_Rdc rdcHandle;
+ *
+ * IfxDsadc_Rdc_update(&rdcHandle); // final update
+ *
+ * IfxStdIf_Pos_RawAngle position = IfxDsadc_Rdc_getRawPosition(&rdcHandle);
+ * StdReal speedRad_s = IfxDsadc_Rdc_getSpeed(&rdcHandle);
+ * }
+ * \endcode
+ *
+ * Alternatively, the application may use \ref library_srvsw_stdif_posif for accessing the actual results.
+ *
+ * \code
+ * { // within context of user's application interrupt or task
+ * extern IfxDsadc_Rdc rdcHandle;
+ * Ifx_AngleTrkF32_PosIf* posIf = (Ifx_AngleTrkF32_PosIf*)&rdcHandle; // cast is safe because it's located in the same address
+ *
+ * PosIf_update(posIf); // final update, alias of IfxDsadc_Rdc_update()
+ *
+ * elAngle = PosIf_getElAngle(posIf);
+ * elSpeed = PosIf_getElSpeed(posIf);
+ * faultOccurred = PosIf_isFault(posIf);
+ * }
+ * \endcode
+ *
+ * \note the IfxDsadc_Rdc_update() is implementing the PosIf_update(). Therefore,
+ * only one of them shall be used.
+ *
+ *
+ *
+ *
+ *
+ *
+ *
+ * \page page_dsadc_rdc Resolver-to-digital Converter with DSADC
+ *
+ * \tableofcontents
+ *
+ * One of the popular rotor positioning sensor used by electric motor drive is resolver.
+ * A resolver device modulates carrier signal R1-R2 by the SINE and COSINE function of actual
+ * angle and feeds it back into the controller unit (S1-S3, S2-S6).
+ *
+ * AURIX family provides support for resolver-to-digital converter (RDC) by providing the
+ * following functionalities:
+ * - Carrier generation (DSADC hardware)
+ * - Signal acquisition and carrier cancellation (DSADC hardware)
+ * - Timestamp acquisition (GTM TIM hardware)
+ *
+ * Additionally, the following functionalities are provided by software:
+ * - Angle tracking observer function
+ * - Fault detection
+ *
+ * This page contains concept documentation of the driver software (\ref IfxLld_Dsadc_rdc "DSADC RDC"),
+ * especially implemented in files: IfxDsadc_Rdc.h and IfxDsadc_Rdc.c
+ *
+ * \section sec_dsadc_rdc_cgen Carrier generation
+ *
+ * DSADC hardware supports the generation of resolver excitation carrier by providing PWM
+ * pin outputs which can be simply filtered by low-pass filter circuit to obtain a pair of
+ * differential signal.
+ *
+ * Common configuration of the positive and negative signals are:
+ * - carrier signal frequency
+ * - bit-reversed PWM (optional, but recommended)
+ * - waveform mode: square, triangle, or sinusoidal
+ *
+ * Those configuration are set by IfxDsadc_initCarrierGen() function which is called in the
+ * context of IfxDsadc_Rdc_init() function. Therefore, user only needs to call
+ * IfxDsadc_Rdc_init().
+ *
+ * For each pin output (positive and negative), a low-pass filter and amplifier circuitry
+ * is required to drive a resolver device. Example of such circuitry can be seen in the
+ * figure below.
+ *
+ * TODO: add picture
+ *
+ * \section sec_dsadc_rdc_acq Signal acquisition and carrier cancellation
+ *
+ * Two differential signals are generated from a resolver device (Sin+, Sin-, Cos+, Cos- or
+ * some write also as S1-S3, S2-S6). These signals basically can be connected directly into
+ * the two channels of DSADC, where each DSADC channel has P and N inputs.
+ *
+ * Single DSADC channel and carrier cancelation configuration is done by function
+ * IfxDsadc_initChannel() which is called in the context of IfxDsadc_Rdc_init() function.
+ * Therefore, user only needs to call IfxDsadc_Rdc_init().
+ *
+ * Common configuration items for each DSADC channel are:
+ * - modulator frequency (default: 10MHz)
+ * - CIC filter type (default: COMB3)
+ * - CIC decimation factor (default: 32)
+ * - FIR0 and FIR1 blocks (default: disabled)
+ *
+ * Common configuration items of the carrier cancelation in each DSADC channel are:
+ * - offset compensation block (default: enabled)
+ * - integration count (default: 32)
+ *
+ * With above default values (modulator frequency 10MHz, CIC decimation factor = 32, both FIRs
+ * disabled and integration count = 32), the output sample rate is:
+ * 10MHz / (32 * 32) = ~9.7kHz
+ *
+ * In each acquired sample, interrupt service is requested by the first DSADC channel
+ * initialised by IfxDsadc_Rdc_init(). User's application shall provide an interrupt service
+ * routine (ISR) to handle this request. In the ISR, or an OS task which is synchronised to
+ * the event, user shall call IfxDsadc_Rdc_onEventA() function in order to update all
+ * necessary driver data related to this event.
+ *
+ * \section sec_dsadc_rdc_tstmp Timestamp acquisition
+ *
+ * Typically, user's application run at different sampling rate than DSADC output sampling
+ * rate. For example, motor control PWM interrupt occurs with 10 kHz sampling whereas the
+ * DSADC interrupt runs with ~9.7 kHz. This condition creates situation where the sampled
+ * resolver position is already aged with a few timer ticks, but can be significant to the
+ * motor control algorithm.
+ *
+ * Therefore, timestamp which indicates the elapsed time since last DSADC channel sampling
+ * is required for compensating or computing the missing rotor position. In addition, this
+ * timestamp is also used for compensating the group delay which is inherent property of
+ * DSADC.
+ *
+ * The implementation of timestamp acquisition uses following hardware resources:
+ * - one timebase unit or global timer (free-running), i.e. GTM TBU
+ * - first timer capture unit, to capture the time at the DSADC sample output event, i.e.
+ * using GTM TIM channel
+ * - second timer capture unit, to capture the time at the application sample point (e.g.
+ * PWM event), i.e. using GTM TIM channel.
+ *
+ * Those resources are initialised by IfxDsadc_Rdc_initHwTimestamp() function which is called
+ * in the context of IfxDsadc_Rdc_init() function. Therefore, user **doesn't need** to call
+ * IfxDsadc_Rdc_initHwTimestamp() separately.
+ *
+ * The user shall call IfxDsadc_Rdc_update() function in order to execute:
+ * - timestamp and group delay compensation
+ * - angle tracking observer
+ * - fault-detection
+ *
+ * \section sec_dsadc_rdc_ato Angle tracking observer
+ *
+ * Output samples acquired by DSADC channel and carrier cancelation are the envelope of SINE
+ * and COSINE resolver signals. In principle, ATAN2 function can be used to calculate the
+ * rotor position (angle), but in this driver a \ref library_srvsw_sysse_math_f32_angletrk "Ifx_AngleTrkF32" module is used.
+ *
+ * When user's application calls function IfxDsadc_Rdc_update(), function Ifx_AngleTrkF32_step()
+ * is also called which contains implementation of:
+ * - ATAN2,
+ * - 3rd order angle tracking observer
+ *
+ * The following figure shows the idea:
+ *
+ * TODO: add picture
+ *
+ * ATAN2 function computes the initial angle for the observer. Additional phase is computed
+ * from the timestamp and group delay to compensate 'missing' rotor position (angle).
+ * The combined initial angle and phase are used as reference for the first integrator for
+ * estimating acceleration. The second integrator estimates speed. The final integrator
+ * estimates the output angle.
+ *
+ * The output angle is normally more 'smooth' in steady-state than the angle from ATAN2
+ * function, albeit some settling time and overshoot which occur during transient. The dynamic
+ * performance depends on the gain constants set in the integrators. By default, the constants
+ * are calculated using formula from proceeding's paper
+ * [Design of advanced resolver-to-digital converters](http://www.univ-nantes.fr/servlet/com.univ.collaboratif.utils.LectureFichiergw?CODE_FICHIER=1307605985775&ID_FICHE=1329),
+ * by Auger, et.al, in Electrimacs 2011, CergyPontoise (France), 6-8 june 2011.
+ *
+ * \subsection sec_dsadc_rdc_groupDelay Group delay estimation
+ *
+ * It is shown in previous figure that group delay is required to estimate the actual position
+ * based on the angular speed and measured position.
+ *
+ * The group delay of itself is estimated to be the sum of group delay of components of the
+ * DSADC channel used for acquisition such as CIC filter, FIR0, FIR1, and Integrator blocks.
+ *
+ * The following formulas are used to estimate the group delays:
+ *
+ *
+ * | CIC group delay: \f$ \tau_{CIC} = \frac{N.k}{2.F_{mod}} \f$ |
+ * | FIR0 group delay: \f$ \tau_{FIR0} = \frac{7}{2.F_{FIR0_{in}}} \f$ |
+ * | FIR1 group delay: \f$ \tau_{FIR1} = \frac{27}{2.F_{FIR1_{in}}} \f$ |
+ * | Integrator group delay: \f$ \tau_{INT} = \frac{N_{INT}-1}{2.F_{INT_{in}}} \f$ |
+ *
+ *
+ * The function IfxDsadc_getMainGroupDelay() implements those formulas, invoked by
+ * IfxDsadc_Rdc_update().
+ *
+ * \section sec_dsadc_rdc_fault Fault detection
+ *
+ * When application calls function IfxDsadc_Rdc_update(), fault detection
+ * implemented in \ref library_srvsw_sysse_math_f32_angletrk "Ifx_AngleTrkF32" module is also executed.
+ * The fault-detection is based on simple trigonometry equation:
+ *
+ * \f$ \sin^2(\phi) + \cos^2(\phi) = 1 \f$
+ *
+ * With some tolerance, whenever the amplitude of one of SINE or COSINE signal is outside
+ * the allowed band, then fault flag is set. "SignalLoss" flag is set when the amplitude is
+ * below lower boundary. "SignalDegradation" flag is set when the amplitude is higher than
+ * upper boundary.
+ *
+ * In addition, the flag "TrackingLoss" is set when the internal error value of the angle
+ * tracking observer is above a threshold.
+ *
+ * Functions IfxDsadc_Rdc_getFault() can be used to
+ * check the error flags.
+ *
+ * Configuration of the fault-detection (tolerance) boundary values and threshold are done
+ * by user's call to IfxDsadc_Rdc_init().
+ *
+ * \defgroup IfxLld_Dsadc_Rdc RDC
+ * \ingroup IfxLld_Dsadc
+ * \defgroup IfxLld_Dsadc_Rdc_variable Variables
+ * \ingroup IfxLld_Dsadc_Rdc
+ * \defgroup IfxLld_Dsadc_Rdc_func_config Configuration Functions
+ * \ingroup IfxLld_Dsadc_Rdc
+ * \defgroup IfxLld_Dsadc_Rdc_library_srvsw_sysse_virtualDevice_positionSensor_StdIf_Functions StdIf Functions
+ * \ingroup IfxLld_Dsadc_Rdc
+ * \defgroup IfxLld_Dsadc_Rdc_structures Structures
+ * \ingroup IfxLld_Dsadc_Rdc
+ * \defgroup IfxLld_Dsadc_Rdc_func_utility Utility Functions
+ * \ingroup IfxLld_Dsadc_Rdc
+ */
+
+#ifndef IFXDSADC_RDC_H
+#define IFXDSADC_RDC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "SysSe/Math/Ifx_AngleTrkF32.h"
+#include "Dsadc/Dsadc/IfxDsadc_Dsadc.h"
+#include "Gtm/Std/IfxGtm_Tim.h"
+#include "_PinMap/IfxGtm_PinMap.h"
+#include "Ifx_Cfg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#ifndef IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION
+#define IFXDSADC_RDC_CFG_PRE_OBSERVER_CORRECTION (1)
+#endif
+
+#ifndef IFXDSADC_RDC_CFG_DEBUG
+#define IFXDSADC_RDC_CFG_DEBUG (0)
+#endif
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Dsadc_Rdc_structures
+ * \{ */
+/** \brief DSADC timestamp helper using GTM
+ */
+typedef struct
+{
+ Ifx_GTM *gtm; /**< \brief Pointer to GTM SFRs */
+ IfxGtm_Tim rdcTim;
+ IfxGtm_Tim_Ch rdcTimChannel; /**< \brief TIM channel triggered by DSADC channel */
+ uint32 rdcTimMuxValue; /**< \brief Mux value used */
+ IfxGtm_Tim_TinMap *pwmTim; /**< \brief TIM channel triggered by PWM trigger */
+} IfxDsadc_Rdc_GtmTimestamp;
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Rdc_structures
+ * \{ */
+/** \brief RDC hardware configuration
+ */
+typedef struct
+{
+ IfxDsadc_Dsadc_ChannelConfig inputConfig; /**< \brief Default channel configuration for both SIN and COS input. */
+ IfxDsadc_ChannelId inputSin; /**< \brief Channel ID of DSADC used for SIN input. This will override value given in the inputConfig */
+ IfxDsadc_ChannelId inputCos; /**< \brief Channel ID of DSADC used for COS input. This will override value given in the inputConfig */
+ Ifx_Priority servReqPriority; /**< \brief Interrupt priority. NOTE: Only used by inputSin and will override value given in the inputConfig */
+ IfxSrc_Tos servReqProvider; /**< \brief Service provider. NOTE: Only used by inputSin and will override value given in the inputConfig */
+ boolean startScan; /**< \brief Specifies whether the conversion will be started as soon as the IfxDsadc_Rdc_initHw() is called */
+ IfxDsadc_Dsadc_CarrierGenConfig carrierGen; /**< \brief Pointer to the carrier signal generation configuration.
+ * \note If NULL_PTR, it is assumed that the carrier generation has been pre-configured */
+ IfxDsadc_Cout_Out *outputClock; /**< \brief if not NULL_PTR, modulator clock output pin from inputSin channel will be configured */
+ IfxDsadc_Rdc_GtmTimestamp gtmTimestamp; /**< \brief Timestamp helper using GTM */
+} IfxDsadc_Rdc_ConfigHw;
+
+/** \brief DSADC RDC hardware object structure
+ */
+typedef struct
+{
+ IfxDsadc_Dsadc_Channel inputSin; /**< \brief Handle to SIN input channel */
+ IfxDsadc_Dsadc_Channel inputCos; /**< \brief Handle to COS input channel */
+ Ifx_GTM_TIM_CH *pwmTimCh; /**< \brief TIM channel for PWM timestamp */
+ Ifx_GTM_TIM_CH *rdcTimCh; /**< \brief TIM channel for DSADC timestamp */
+} IfxDsadc_Rdc_Hw;
+
+/** \brief
+ */
+typedef struct
+{
+ boolean enabled;
+ float32 inSeconds;
+ uint32 rdc; /**< \brief Absolute time of DSADC result */
+ uint32 pwm; /**< \brief Absolute time of user's PWM trigger. Used only if IFXDSADC_RDC_CFG_DEBUG is set */
+ sint32 inTicks; /**< \brief Time-stamp of last result (in ticks). Used only if IFXDSADC_RDC_CFG_DEBUG is set */
+ uint32 maxTicks; /**< \brief Maximum time-stamp value (in ticks of absolute time clock) */
+ float32 clockPeriod; /**< \brief Period of absolute time clock (in second) */
+} IfxDsadc_Rdc_Ts;
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Rdc_structures
+ * \{ */
+/** \brief DSADC RDC data structure
+ */
+typedef struct
+{
+ Ifx_AngleTrkF32 angleTrk;
+ sint16 sinIn;
+ sint16 cosIn;
+ float32 updatePeriod;
+ float32 groupDelay;
+ IfxDsadc_Rdc_Hw hardware;
+ IfxDsadc_Rdc_Ts timestamp;
+} IfxDsadc_Rdc;
+
+/** \brief DSADC RDC configuration structure
+ * Note: if ALL kp, ki, kd are zero, then the init function will use default value.
+ */
+typedef struct
+{
+ float32 kp; /**< \brief Observer proportional gain */
+ float32 ki; /**< \brief Observer integral gain */
+ float32 kd; /**< \brief Observer differential gain */
+ float32 speedLpfFc; /**< \brief Cut-off frequency of speed low-pass filter (in Hertz). */
+ float32 errorThreshold; /**< \brief Threshold of error value in the tracking loop (in radian) */
+ float32 userTs; /**< \brief Sampling period of the application */
+ sint32 sqrAmplMax; /**< \brief Maximum value for square of signal amplitudes */
+ sint32 sqrAmplMin; /**< \brief Minimum value for square of signal amplitudes */
+ uint16 periodPerRotation; /**< \brief Number of electrical periods per mechanical rotation */
+ boolean reversed; /**< \brief TRUE: reversed direction, FALSE: straight direction */
+ sint32 resolution; /**< \brief Sensor resolution */
+ IfxStdIf_Pos_RawAngle offset; /**< \brief Offset in ticks. [0 .. (\ref IfxDsadc_Rdc_Config.resolution - 1)] */
+ IfxDsadc_Rdc_ConfigHw hardware; /**< \brief Pointer to hardware config. */
+ IfxDsadc_Dsadc *dsadc; /**< \brief Pointer to the DSADC driver */
+} IfxDsadc_Rdc_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Rdc_func_config
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialise the DSADC RDC driver by initialising:
+ * - Two DSADC hardware channel resources
+ * - Carrier generation hardware resources
+ * - Time-stamp hardware resources
+ * - Driver's run-time data (RAM): tracking observer, fault-detection, interface layer etc.
+ * \param driver Driver's handle, i.e. pointer to \ref IfxDsadc_Rdc RAM location
+ * \param config Config Pointer to the driver's configuration
+ * \return TRUE in case of success else FALSE
+ */
+IFX_EXTERN boolean IfxDsadc_Rdc_init(IfxDsadc_Rdc *driver, const IfxDsadc_Rdc_Config *config);
+
+/** \brief
+ * \param config DSADC RDC configuration structure
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_Rdc_initConfig(IfxDsadc_Rdc_Config *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Rdc_library_srvsw_sysse_virtualDevice_positionSensor_StdIf_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief \see IfxStdIf_Pos_GetFault
+ * \param driver Driver handle
+ * \return Fault
+ */
+IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
+ * \param driver Driver handle
+ * \return Period per rotation
+ */
+IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetRawPosition
+ * \param driver Driver handle
+ * \return Position in ticks
+ */
+IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetSpeed
+ * \param driver Driver handle
+ * \return speed
+ */
+IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief see IfxStdIf_Pos_GetAbsolutePosition
+ * \param driver Driver handle
+ * \return Absolute position
+ */
+IFX_EXTERN float32 IfxDsadc_Rdc_getAbsolutePosition(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetDirection
+ * \param driver Driver handle
+ * \return Direction
+ */
+IFX_EXTERN IfxStdIf_Pos_Dir IfxDsadc_Rdc_getDirection(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetOffset
+ * \param driver Driver handle
+ * \return Offset address
+ */
+IFX_EXTERN sint32 IfxDsadc_Rdc_getOffset(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetPosition
+ * \param driver Driver handle
+ * \return Position
+ */
+IFX_EXTERN float32 IfxDsadc_Rdc_getPosition(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetRefreshPeriod
+ * \param driver driver handle
+ * \return Update period
+ */
+IFX_EXTERN float32 IfxDsadc_Rdc_getRefreshPeriod(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetResolution
+ * \param driver Driver handle
+ * \return Resolution
+ */
+IFX_EXTERN sint32 IfxDsadc_Rdc_getResolution(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetSensorType
+ * \param driver driver handle
+ * \return Sensor type
+ */
+IFX_EXTERN IfxStdIf_Pos_SensorType IfxDsadc_Rdc_getSensorType(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetTurn
+ * \param driver Driver handle
+ * \return Returns the number of turns
+ */
+IFX_EXTERN sint32 IfxDsadc_Rdc_getTurn(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_OnEventA
+ * The API handles the event A which corresponds to the DSADC interrupt event.
+ * \param driver Driver's handle
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_Rdc_onEventA(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_Reset
+ * \param driver Driver handle
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_Rdc_reset(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_ResetFaults
+ * \param driver Driver handle
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_Rdc_resetFaults(IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_SetOffset
+ * \param driver Driver handle
+ * \param offset Offset
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_Rdc_setOffset(IfxDsadc_Rdc *driver, sint32 offset);
+
+/** \brief \see IfxStdIf_Pos_SetRefreshPeriod
+ * \param driver Driver handle
+ * \param updatePeriod Update period
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_Rdc_setRefreshPeriod(IfxDsadc_Rdc *driver, float32 updatePeriod);
+
+/** \brief Initializes the standard interface "Pos"
+ * \param stdif Standard interface position object
+ * \param driver Virtual position sensor
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxDsadc_Rdc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxDsadc_Rdc *driver);
+
+/** \brief \see IfxStdIf_Pos_Update
+ * This function is to be executed at user's application interrupt or task, e.g. motor control
+ * \param driver Driver's handle
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_Rdc_update(IfxDsadc_Rdc *driver);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Rdc_func_utility
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Return timestamp in seconds
+ * \param driver Driver handle
+ * \return timestamp in seconds.
+ */
+IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Synchronously start of both DSADC H/W channels
+ * \param driver Driver's handle, i.e. pointer to \ref IfxDsadc_Rdc RAM location
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_Rdc_startConversion(IfxDsadc_Rdc *driver);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE IfxStdIf_Pos_Status IfxDsadc_Rdc_getFault(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getFault(&driver->angleTrk);
+}
+
+
+IFX_INLINE uint16 IfxDsadc_Rdc_getPeriodPerRotation(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getPeriodPerRotation(&driver->angleTrk);
+}
+
+
+IFX_INLINE IfxStdIf_Pos_RawAngle IfxDsadc_Rdc_getRawPosition(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getRawPosition(&driver->angleTrk);
+}
+
+
+IFX_INLINE float32 IfxDsadc_Rdc_getSpeed(IfxDsadc_Rdc *driver)
+{
+ return Ifx_AngleTrkF32_getSpeed(&driver->angleTrk);
+}
+
+
+IFX_INLINE float32 IfxDsadc_Rdc_getTimestamp(IfxDsadc_Rdc *driver)
+{
+ return driver->timestamp.inSeconds;
+}
+
+
+#endif /* IFXDSADC_RDC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Std/IfxDsadc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Std/IfxDsadc.c
new file mode 100644
index 0000000..5c03d1d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Std/IfxDsadc.c
@@ -0,0 +1,177 @@
+/**
+ * \file IfxDsadc.c
+ * \brief DSADC basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxDsadc.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+volatile Ifx_SRC_SRCR *IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ return (volatile Ifx_SRC_SRCR *)((uint32)&(MODULE_SRC.DSADC.DSADC0.SRA) + 8 * channel);
+}
+
+
+float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ float32 frequency = IfxDsadc_getMainCombOutFreq(dsadc, channel);
+
+ frequency = frequency / ((float32)1.0 + dsadc->CH[channel].IWCTR.B.NVALINT);
+ Ifx_DSADC_CH_FCFGM fcfgm = dsadc->CH[channel].FCFGM;
+
+ if (fcfgm.B.FIR0EN != 0)
+ {
+ frequency = frequency / 2;
+ }
+
+ if (fcfgm.B.FIR1EN != 0)
+ {
+ frequency = frequency / 2;
+ }
+
+ return frequency;
+}
+
+
+float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ float32 frequency = IfxDsadc_getModulatorClockFreq(dsadc, channel);
+
+ return frequency / ((float32)1.0 + dsadc->CH[channel].FCFGC.B.CFMDF);
+}
+
+
+float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ Ifx_DSADC_CH_FCFGC fcfgc = dsadc->CH[channel].FCFGC;
+ Ifx_DSADC_CH_FCFGM fcfgm = dsadc->CH[channel].FCFGM;
+ Ifx_DSADC_CH_DICFG dicfg = dsadc->CH[channel].DICFG;
+ Ifx_DSADC_CH_IWCTR iwctr = dsadc->CH[channel].IWCTR;
+ float32 tsMod = 1.0 / IfxDsadc_getModulatorClockFreq(dsadc, channel);
+ float32 tsCic = tsMod * (1 + fcfgc.B.CFMDF);
+ float32 tsFir0 = tsCic * (1 + fcfgm.B.FIR0EN);
+ float32 tsFir1 = tsFir0 * (1 + fcfgm.B.FIR1EN);
+
+ float32 gdDsA = (7 + 1) * tsMod;
+ float32 cicN = (1 + fcfgc.B.CFMDF);
+ float32 cick = (1 + fcfgc.B.CFMC);
+ float32 gdCic = tsMod * ((cick < 4) ? (0.5 * cick * (cicN - 1.0)) : ((2.0 * cicN) - 1.0));
+ float32 gdFir0 = (fcfgm.B.FIR0EN != 0) ? ((3.5 + (3.0 / cicN)) * tsCic) : 0.0;
+ float32 gdFir1;
+
+ if (fcfgm.B.FIR0EN)
+ {
+ gdFir1 = (fcfgm.B.FIR1EN != 0) ? (0.5 * (28.0 + (5.0 / cicN)) * tsFir0) : 0.0;
+ }
+ else
+ {
+ gdFir1 = (fcfgm.B.FIR1EN != 0) ? ((28.0 + (5.0 / cicN)) * tsFir0) : 0.0;
+ }
+
+ float32 gdInt = (dicfg.B.ITRMODE == IfxDsadc_IntegratorTrigger_bypassed) ? 0 : ((iwctr.B.NVALINT) * tsFir1);
+
+ return gdDsA + gdCic + gdFir0 + gdFir1 + gdInt;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ return (volatile Ifx_SRC_SRCR *)((uint32)&(MODULE_SRC.DSADC.DSADC0.SRM) + 8 * channel);
+}
+
+
+float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ float32 sourceFreq = IfxDsadc_getModulatorInputClockFreq(dsadc);
+
+ return sourceFreq / ((dsadc->CH[channel].MODCFG.B.DIVM + 1) * 2);
+}
+
+
+float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc)
+{
+ float32 result;
+
+ switch (dsadc->GLOBCFG.B.MCSEL)
+ {
+ case IfxDsadc_ModulatorClock_fOSC0:
+ result = IfxScuCcu_getOsc0Frequency();
+ break;
+ case IfxDsadc_ModulatorClock_fERAY:
+ result = IfxScuCcu_getPllErayFrequency();
+ break;
+ case IfxDsadc_ModulatorClock_fDSD:
+ result = IfxScuCcu_getSpbFrequency();
+ break;
+ default:
+ result = 0;
+ break;
+ }
+
+ return result;
+}
+
+
+void IfxDsadc_resetModule(Ifx_DSADC *dsadc)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ dsadc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ dsadc->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == dsadc->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ dsadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Std/IfxDsadc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Std/IfxDsadc.h
new file mode 100644
index 0000000..ff0c2ff
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Std/IfxDsadc.h
@@ -0,0 +1,760 @@
+/**
+ * \file IfxDsadc.h
+ * \brief DSADC basic functionality
+ * \ingroup IfxLld_Dsadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dsadc_Std_Enum Enumerations
+ * \ingroup IfxLld_Dsadc_Std
+ * \defgroup IfxLld_Dsadc_Std_Operative Operative Functions
+ * \ingroup IfxLld_Dsadc_Std
+ * \defgroup IfxLld_Dsadc_Std_Support Support Functions
+ * \ingroup IfxLld_Dsadc_Std
+ * \defgroup IfxLld_Dsadc_Std_Interrupt Interrupt Functions
+ * \ingroup IfxLld_Dsadc_Std
+ * \defgroup IfxLld_Dsadc_Std_IO IO Pin Configuration Functions
+ * \ingroup IfxLld_Dsadc_Std
+ */
+
+#ifndef IFXDSADC_H
+#define IFXDSADC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxDsadc_cfg.h"
+#include "Src/Std/IfxSrc.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "_PinMap/IfxDsadc_PinMap.h"
+#include "IfxDsadc_reg.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Dsadc_Std_Enum
+ * \{ */
+/** \brief Comb Filter (auxiliary) shift control\n
+ * Definition in Ifx_DSADC.FCFGA.B.AFSC
+ */
+typedef enum
+{
+ IfxDsadc_AuxCombFilterShift_noShift = 0, /**< \brief no shift, use full range */
+ IfxDsadc_AuxCombFilterShift_shiftBy1 = 1, /**< \brief Shift by 1 */
+ IfxDsadc_AuxCombFilterShift_shiftBy2 = 2, /**< \brief Shift by 2 */
+ IfxDsadc_AuxCombFilterShift_shiftBy3 = 3 /**< \brief Shift by 3 */
+} IfxDsadc_AuxCombFilterShift;
+
+/** \brief Comb Filter (auxiliary) configuration/type\n
+ * Definition in Ifx_DSADC.FCFGA.B.CFAC
+ */
+typedef enum
+{
+ IfxDsadc_AuxCombFilterType_comb1 = 0, /**< \brief CIC1 */
+ IfxDsadc_AuxCombFilterType_comb2 = 1, /**< \brief CIC2 */
+ IfxDsadc_AuxCombFilterType_comb3 = 2, /**< \brief CIC3 */
+ IfxDsadc_AuxCombFilterType_combF = 3 /**< \brief CICF */
+} IfxDsadc_AuxCombFilterType;
+
+/** \brief Service request generation (auxiliary)\n
+ * Definition in Ifx_DSADC.FCFGA.B.ESEL
+ */
+typedef enum
+{
+ IfxDsadc_AuxEvent_everyNewResult = 0, /**< \brief Always, for each new result value */
+ IfxDsadc_AuxEvent_insideBoundary = 1, /**< \brief If result is inside the boundary band */
+ IfxDsadc_AuxEvent_outsideBoundary = 2 /**< \brief If result is outside the boundary band */
+} IfxDsadc_AuxEvent;
+
+/** \brief Service request generation (auxiliary)\n
+ * Definition in Ifx_DSADC.FCFGA.B.EGT
+ */
+typedef enum
+{
+ IfxDsadc_AuxGate_definedByESEL = 0, /**< \brief Separate: generate events according to ESEL */
+ IfxDsadc_AuxGate_coupledToIntegrator = 1 /**< \brief Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDIS */
+} IfxDsadc_AuxGate;
+
+/** \brief Service request generation (auxiliary)\n
+ * Definition in Ifx_DSADC.FCFGA.B.SRGA
+ */
+typedef enum
+{
+ IfxDsadc_AuxServiceRequest_never = 0, /**< \brief Never, service requests disabled */
+ IfxDsadc_AuxServiceRequest_auxFilter = 1, /**< \brief Auxiliary filter: As selected by bitfield ESEL (\ref IfxDsadc_AuxEvent) */
+ IfxDsadc_AuxServiceRequest_altSource = 2 /**< \brief Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5) */
+} IfxDsadc_AuxServiceRequest;
+
+/** \brief Carrier generation mode\n
+ * Definition in Ifx_DSADC.CGCFG.B.CGMOD
+ */
+typedef enum
+{
+ IfxDsadc_CarrierWaveformMode_stopped = 0, /**< \brief Carrier Generator stopped */
+ IfxDsadc_CarrierWaveformMode_square = 1, /**< \brief Carrier Generator generates square wave */
+ IfxDsadc_CarrierWaveformMode_triangle = 2, /**< \brief Carrier Generator generates triangle wave */
+ IfxDsadc_CarrierWaveformMode_sine = 3 /**< \brief Carrier Generator generates sine wave */
+} IfxDsadc_CarrierWaveformMode;
+
+/** \brief Specifies the channel Index
+ */
+typedef enum
+{
+ IfxDsadc_ChannelId_0 = 0, /**< \brief Specifies the channel Index 0 */
+ IfxDsadc_ChannelId_2 = 2, /**< \brief Specifies the channel Index 2 */
+ IfxDsadc_ChannelId_3 = 3 /**< \brief Specifies the channel Index 3 */
+} IfxDsadc_ChannelId;
+
+/** \brief Modulator common mode voltage selection\n
+ * Definition in Ifx_DSADC.MODCFGx.B.CMVS
+ */
+typedef enum
+{
+ IfxDsadc_CommonModeVoltage_a = 0, /**< \brief VCM = VAREF / 3.03 (1.65 V for VAREF = 5.0 V), recommended for VDDM = 3.3 V1.65V */
+ IfxDsadc_CommonModeVoltage_b = 1, /**< \brief VCM = VAREF / 2.27 (2.2 V for VAREF = 5.0 V), recommended for low distortion of AC-coupled signals */
+ IfxDsadc_CommonModeVoltage_c = 2 /**< \brief VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals */
+} IfxDsadc_CommonModeVoltage;
+
+/** \brief FIR data shift control\n
+ * Selects the displacement caused by the data shifter at the FIR filter output\n
+ * Definition in Ifx_DSADC.FCFGM.B.DSH
+ */
+typedef enum
+{
+ IfxDsadc_FirDataShift_noShift = 0, /**< \brief no shift, use full range */
+ IfxDsadc_FirDataShift_shiftBy1 = 1, /**< \brief Shift by 1 */
+ IfxDsadc_FirDataShift_shiftBy2 = 2, /**< \brief Shift by 2 */
+ IfxDsadc_FirDataShift_shiftBy3 = 3 /**< \brief Shift by 3 */
+} IfxDsadc_FirDataShift;
+
+/** \brief FIR shift control\n
+ * Selects the displacement caused by the data shifter inbetween the FIR filter blocks.\n
+ * Definition in Ifx_DSADC.FCFGM.B.FSH
+ */
+typedef enum
+{
+ IfxDsadc_FirInternalShift_noShift = 0, /**< \brief no shift, use full range */
+ IfxDsadc_FirInternalShift_shiftBy1 = 1 /**< \brief Shift by 1 */
+} IfxDsadc_FirInternalShift;
+
+/** \brief Modulator configuration of positive/negative input line\n
+ * Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN
+ */
+typedef enum
+{
+ IfxDsadc_InputConfig_inputPin = 0, /**< \brief Modulator input connected to external pin */
+ IfxDsadc_InputConfig_supplyVoltage = 1, /**< \brief Modulator input connected to supply voltage V_ddm */
+ IfxDsadc_InputConfig_commonModeVoltage = 2, /**< \brief Modulator input connected to common mode voltage V_cm */
+ IfxDsadc_InputConfig_referenceGround = 3 /**< \brief Modulator input connected to reference ground V_ref */
+} IfxDsadc_InputConfig;
+
+/** \brief Demodulator input data source selection\n
+ * Definition in Ifx_DSADC.DICFG.B.DSRC
+ */
+typedef enum
+{
+ IfxDsadc_InputDataSource_onChipStandAlone = 0, /**< \brief On-chip modulator, standalone (3rd order) */
+ IfxDsadc_InputDataSource_onChipCombined = 1, /**< \brief On-chip modulator, yield (2nd order) */
+ IfxDsadc_InputDataSource_directInputA = 2, /**< \brief External, from input A, direct */
+ IfxDsadc_InputDataSource_invertedInputA = 3, /**< \brief External, from input A, inverted */
+ IfxDsadc_InputDataSource_directInputB = 4, /**< \brief External, from input B, direct */
+ IfxDsadc_InputDataSource_invertedInputB = 5 /**< \brief External, from input B, inverted */
+} IfxDsadc_InputDataSource;
+
+/** \brief Modulator gain select of analog input path\n
+ * Definition in Ifx_DSADC.MODCFGx.B.GAINSEL
+ */
+typedef enum
+{
+ IfxDsadc_InputGain_factor1 = 0, /**< \brief Input gain factor: 1 */
+ IfxDsadc_InputGain_factor2 = 1, /**< \brief Input gain factor: 2 */
+ IfxDsadc_InputGain_factor4 = 2, /**< \brief Input gain factor: 4 */
+ IfxDsadc_InputGain_factor8 = 3, /**< \brief Input gain factor: 8 */
+ IfxDsadc_InputGain_factor16 = 4 /**< \brief Input gain factor: 16 */
+} IfxDsadc_InputGain;
+
+/** \brief Modulator input pin selection\n
+ * Definition in Ifx_DSADC.MODCFGx.B.INMUX
+ */
+typedef enum
+{
+ IfxDsadc_InputPin_a = 0, /**< \brief Pin A connected to modulator input */
+ IfxDsadc_InputPin_b = 1, /**< \brief Pin B connected to modulator input */
+ IfxDsadc_InputPin_c = 2, /**< \brief Pin C connected to modulator input */
+ IfxDsadc_InputPin_d = 3 /**< \brief Pin D connected to modulator input */
+} IfxDsadc_InputPin;
+
+/** \brief Integrator window size\n
+ * Definition in Ifx_DSADC.IWCTR.B.IWS
+ */
+typedef enum
+{
+ IfxDsadc_IntegrationWindowSize_internalControl = 0, /**< \brief Internal control: stop integrator after REPVAL+1 integration cycles */
+ IfxDsadc_IntegrationWindowSize_externalControl = 1 /**< \brief External control: stop integrator when bit INTEN becomes 0 */
+} IfxDsadc_IntegrationWindowSize;
+
+/** \brief Integrator trigger mode\n
+ * NOTE: switch-first to bypassed before using other mode\n
+ * Definition in Ifx_DSADC.DICFG.B.ITRMODE
+ */
+typedef enum
+{
+ IfxDsadc_IntegratorTrigger_bypassed = 0, /**< \brief No integration trigger, integrator bypassed */
+ IfxDsadc_IntegratorTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
+ IfxDsadc_IntegratorTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
+ IfxDsadc_IntegratorTrigger_alwaysActive = 3 /**< \brief No trigger, integrator active all the time */
+} IfxDsadc_IntegratorTrigger;
+
+/** \brief Low power supply voltage select\n
+ * Definition in Ifx_DSADC.GLOBCFG.B.LOSUP
+ */
+typedef enum
+{
+ IfxDsadc_LowPowerSupply_5V = 0, /**< \brief Supply Voltage for Analog Circuitry set to 5V */
+ IfxDsadc_LowPowerSupply_3_3V = 1 /**< \brief Supply Voltage for Analog Circuitry set to 3.3V */
+} IfxDsadc_LowPowerSupply;
+
+/** \brief Comb Filter (Main Chain) shift control\n
+ * Definition in Ifx_DSADC.FCFGC.B.MFSC
+ */
+typedef enum
+{
+ IfxDsadc_MainCombFilterShift_noShift = 0, /**< \brief no shift, use full range */
+ IfxDsadc_MainCombFilterShift_shiftBy1 = 1, /**< \brief Shift by 1 */
+ IfxDsadc_MainCombFilterShift_shiftBy2 = 2, /**< \brief Shift by 2 */
+ IfxDsadc_MainCombFilterShift_shiftBy3 = 3 /**< \brief Shift by 3 */
+} IfxDsadc_MainCombFilterShift;
+
+/** \brief Comb Filter (Main Chain) configuration/type\n
+ * Definition in Ifx_DSADC.FCFGC.B.CFMC
+ */
+typedef enum
+{
+ IfxDsadc_MainCombFilterType_comb1 = 0, /**< \brief CIC1 */
+ IfxDsadc_MainCombFilterType_comb2 = 1, /**< \brief CIC2 */
+ IfxDsadc_MainCombFilterType_comb3 = 2, /**< \brief CIC3 */
+ IfxDsadc_MainCombFilterType_combF = 3 /**< \brief CICF */
+} IfxDsadc_MainCombFilterType;
+
+/** \brief Service request generation (main chain)\n
+ * Definition in Ifx_DSADC.FCFGC.B.SRGM
+ */
+typedef enum
+{
+ IfxDsadc_MainServiceRequest_never = 0, /**< \brief Never, service requests disabled */
+ IfxDsadc_MainServiceRequest_highGateSignal = 1, /**< \brief While gate (selected trigger signal) is high */
+ IfxDsadc_MainServiceRequest_lowGateSignal = 2, /**< \brief While gate (selected trigger signal) is low */
+ IfxDsadc_MainServiceRequest_everyNewResult = 3 /**< \brief Always, for each new result value */
+} IfxDsadc_MainServiceRequest;
+
+/** \brief Modulator clock select\n
+ * Definition in Ifx_DSADC.GLOBCFG.B.MCSEL
+ */
+typedef enum
+{
+ IfxDsadc_ModulatorClock_off = 0, /**< \brief Internal clock off, no source selected */
+ IfxDsadc_ModulatorClock_fDSD = 1, /**< \brief f_dsd clock selected */
+ IfxDsadc_ModulatorClock_fERAY = 2, /**< \brief f_eray clock selected */
+ IfxDsadc_ModulatorClock_fOSC0 = 3 /**< \brief f_osc0 clock selected */
+} IfxDsadc_ModulatorClock;
+
+/** \brief Modulator divider factor for modulator clock\n
+ * Definition in Ifx_DSADC.MODCFGx.B.DIVM
+ */
+typedef enum
+{
+ IfxDsadc_ModulatorClockDivider_div2 = 0, /**< \brief f_mod = f_clk / 2 */
+ IfxDsadc_ModulatorClockDivider_div4, /**< \brief f_mod = f_clk / 4 */
+ IfxDsadc_ModulatorClockDivider_div6, /**< \brief f_mod = f_clk / 6 */
+ IfxDsadc_ModulatorClockDivider_div8, /**< \brief f_mod = f_clk / 8 */
+ IfxDsadc_ModulatorClockDivider_div10, /**< \brief f_mod = f_clk / 10 */
+ IfxDsadc_ModulatorClockDivider_div12, /**< \brief f_mod = f_clk / 12 */
+ IfxDsadc_ModulatorClockDivider_div14, /**< \brief f_mod = f_clk / 14 */
+ IfxDsadc_ModulatorClockDivider_div16, /**< \brief f_mod = f_clk / 16 */
+ IfxDsadc_ModulatorClockDivider_div18, /**< \brief f_mod = f_clk / 18 */
+ IfxDsadc_ModulatorClockDivider_div20, /**< \brief f_mod = f_clk / 20 */
+ IfxDsadc_ModulatorClockDivider_div22, /**< \brief f_mod = f_clk / 22 */
+ IfxDsadc_ModulatorClockDivider_div24, /**< \brief f_mod = f_clk / 24 */
+ IfxDsadc_ModulatorClockDivider_div26, /**< \brief f_mod = f_clk / 26 */
+ IfxDsadc_ModulatorClockDivider_div28, /**< \brief f_mod = f_clk / 28 */
+ IfxDsadc_ModulatorClockDivider_div30, /**< \brief f_mod = f_clk / 30 */
+ IfxDsadc_ModulatorClockDivider_div32 /**< \brief f_mod = f_clk / 32 */
+} IfxDsadc_ModulatorClockDivider;
+
+/** \brief Rectifier sign source\n
+ * Selects the sign signal that is to be delayed.\n
+ * Definition in Ifx_DSADC.RECT.B.SSRC
+ */
+typedef enum
+{
+ IfxDsadc_RectifierSignSource_onChipGenerator = 0, /**< \brief On-chip carrier generator */
+ IfxDsadc_RectifierSignSource_nextChannel = 1, /**< \brief Sign of result of next channel */
+ IfxDsadc_RectifierSignSource_externalA = 2, /**< \brief External sign signal A */
+ IfxDsadc_RectifierSignSource_externalB = 3 /**< \brief External sign signal B */
+} IfxDsadc_RectifierSignSource;
+
+/** \brief Demodulator sample clock source select\n
+ * Definition in Ifx_DSADC.DICFG.B.CSRC
+ */
+typedef enum
+{
+ IfxDsadc_SampleClockSource_internal = 0, /**< \brief Internal clock */
+ IfxDsadc_SampleClockSource_inputA = 1, /**< \brief External clock, from Input A */
+ IfxDsadc_SampleClockSource_inputB = 2, /**< \brief External clock, from Input B */
+ IfxDsadc_SampleClockSource_inputC = 3 /**< \brief External clock, from Input C */
+} IfxDsadc_SampleClockSource;
+
+/** \brief Demodulator data strobe generation mode\n
+ * Definition in Ifx_DSADC.DICFG.B.STROBE
+ */
+typedef enum
+{
+ IfxDsadc_SampleStrobe_noDataStrobe = 0, /**< \brief No data strobe */
+ IfxDsadc_SampleStrobe_sampleOnRisingEdge = 1, /**< \brief Direct clock, a sample trigger is generated at each rising clock edge */
+ IfxDsadc_SampleStrobe_sampleOnFallingEdge = 2, /**< \brief Direct clock, a sample trigger is generated at each falling clock edge */
+ IfxDsadc_SampleStrobe_sampleOnBothEdges = 3, /**< \brief Double data, a sample trigger is generated at each rising and falling clock edge */
+ IfxDsadc_SampleStrobe_reserved = 4, /**< \brief don't use */
+ IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges = 5, /**< \brief Double clock, a sample trigger is generated at every 2nd rising clock edge */
+ IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges = 6 /**< \brief Double clock, a sample trigger is generated at every 2nd falling clock edge */
+} IfxDsadc_SampleStrobe;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_DSADC.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxDsadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxDsadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxDsadc_SleepMode;
+
+/** \brief Timestamp trigger mode\n
+ * Definition in Ifx_DSADC.DICFG.B.TSTRMODE
+ */
+typedef enum
+{
+ IfxDsadc_TimestampTrigger_noTrigger = 0, /**< \brief No timestamp trigger */
+ IfxDsadc_TimestampTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
+ IfxDsadc_TimestampTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
+ IfxDsadc_TimestampTrigger_eachEdge = 3 /**< \brief Trigger event upon each edge */
+} IfxDsadc_TimestampTrigger;
+
+/** \brief Trigger select\n
+ * Definition in Ifx_DSADC.DICFG.B.TRSEL
+ */
+typedef enum
+{
+ IfxDsadc_TriggerInput_a = 0, /**< \brief dsadc trig 0 */
+ IfxDsadc_TriggerInput_b = 1, /**< \brief dsadc trig 1 */
+ IfxDsadc_TriggerInput_c = 2, /**< \brief vadc trig 0 */
+ IfxDsadc_TriggerInput_d = 3, /**< \brief vadc trig 1 */
+ IfxDsadc_TriggerInput_e = 4, /**< \brief external pin e */
+ IfxDsadc_TriggerInput_f = 5, /**< \brief external pin f */
+ IfxDsadc_TriggerInput_g = 6,
+ IfxDsadc_TriggerInput_h = 7
+} IfxDsadc_TriggerInput;
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Std_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param dsadc pointer to DSADC registers
+ * \param mode mode selection (enable/disable)
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_setSleepMode(Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode);
+
+/** \brief Enables the conversion of multiple channels
+ * \param dsadc Pointer to the DSADC register space
+ * \param modulatorMask the modulator which should be running (bitwise selection)
+ * \param channelMask the channels which should be scanned (bitwise selection)
+ * \return None
+ *
+ * \code
+ * // enable the conversion of all 6 DSADC channels
+ * IfxDsadc_startScan(&MODULE_DSADC, 0x3FU, 0x3FU);
+ * // results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask);
+
+/** \brief Disables the conversion of multiple channels
+ * \param dsadc Pointer to the DSADC register space
+ * \param modulatorMask the modulator which should be disabled (bitwise selection)
+ * \return None
+ *
+ * \code
+ * // disable the modulators of all 6 DSADC channels
+ * IfxDsadc_stopScan(&MODULE_DSADC, 0x3FU);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief resets the DSADC kernel
+ * \param dsadc pointer to DSADC registers
+ * \return None
+ */
+IFX_EXTERN void IfxDsadc_resetModule(Ifx_DSADC *dsadc);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Std_Support
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get result from the auxiliary chain
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return result from the auxiliary chain
+ */
+IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \brief Get the main comb decimation factor
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return the main comb decimation factor
+ */
+IFX_INLINE uint16 IfxDsadc_getMainCombDecimation(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \brief Get result from the main chain
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return result from the main chain
+ */
+IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \brief Return TRUE if DSADC module is enabled
+ * \param dsadc Pointer to the DSADC register space
+ * \return TRUE if DSADC module is enabled
+ */
+IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc);
+
+/** \brief Set the carrier waveform mode
+ * \param dsadc Pointer to the DSADC register space
+ * \param waveformMode the waveform mode
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the sample frequency of the integrator output in Hz
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return frequency in Hz
+ */
+IFX_EXTERN float32 IfxDsadc_getIntegratorOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \brief Get the sample frequency of the main COMB filter output in Hz
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return frequency in Hz
+ */
+IFX_EXTERN float32 IfxDsadc_getMainCombOutFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \brief Estimate the group delay of main-chain filters in seconds
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return delay in seconds
+ */
+IFX_EXTERN float32 IfxDsadc_getMainGroupDelay(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \brief Get the modulator clock frequency in Hz
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return frequency in Hz
+ */
+IFX_EXTERN float32 IfxDsadc_getModulatorClockFreq(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \brief Get the input frequency of DSADC in Hz
+ * \param dsadc Pointer to the DSADC register space
+ * \return frequency in Hz
+ */
+IFX_EXTERN float32 IfxDsadc_getModulatorInputClockFreq(Ifx_DSADC *dsadc);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Std_Interrupt
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Address/pointer to the interrupt source register
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return Address/pointer to the interrupt source register
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \brief Get the interrupt source register for a Main event
+ * \param dsadc Pointer to the DSADC register space
+ * \param channel Channel Id
+ * \return Address/pointer to the interrupt source register
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dsadc_Std_IO
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes a CGPWM output
+ * \param cgPwm the CGPWM Pin which should be configured
+ * \param pinMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a CIN input
+ * \param cIn the CIN Pin which should be configured
+ * \param cInMode the pin input mode which should be configured
+ * \param padDriver Pad Driver Configuration
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a COUT output
+ * \param cout the COUT Pin which should be configured
+ * \param pinMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_initCoutPin(const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a DIN input
+ * \param dIn the DIN Pin which should be configured
+ * \param dInMode the pin input mode which should be configured
+ * \param padDriver Pad Driver Configuration
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a DS input
+ * \param dsn the DSN Pin which should be configured
+ * \param pinMode the pin input mode which should be configured
+ * \param padDriver Pad Driver Configuration
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a DS input
+ * \param dsp the DSP Pin which should be configured
+ * \param pinMode the pin input mode which should be configured
+ * \param padDriver Pad Driver Configuration
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a ITR input
+ * \param itr the ITR Pin which should be configured
+ * \param itrMode the pin input mode which should be configured
+ * \param padDriver Pad Driver Configuration
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a SG input
+ * \param sg the SG Pin which should be configured
+ * \param pinMode the pin input mode which should be configured
+ * \param padDriver Pad Driver Configuration
+ * \return None
+ */
+IFX_INLINE void IfxDsadc_initSgPin(const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ return (sint16)(dsadc->CH[channel].RESA.B.RESULT);
+}
+
+
+IFX_INLINE uint16 IfxDsadc_getMainCombDecimation(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ return (uint16)(1U + dsadc->CH[channel].FCFGC.B.CFMDF);
+}
+
+
+IFX_INLINE sint16 IfxDsadc_getMainResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel)
+{
+ return (sint16)(dsadc->CH[channel].RESM.B.RESULT);
+}
+
+
+IFX_INLINE void IfxDsadc_initCgPwmPin(const IfxDsadc_Cgpwm_Out *cgPwm, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(cgPwm->pin.port, cgPwm->pin.pinIndex, pinMode, cgPwm->select);
+ IfxPort_setPinPadDriver(cgPwm->pin.port, cgPwm->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE void IfxDsadc_initCinPin(const IfxDsadc_Cin_In *cIn, IfxPort_InputMode cInMode, IfxPort_PadDriver padDriver)
+{
+ if (cIn->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(cIn->pin.port, cIn->pin.pinIndex, cInMode);
+ IfxPort_setPinPadDriver(cIn->pin.port, cIn->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxDsadc_initCoutPin(const IfxDsadc_Cout_Out *cout, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (cout->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(cout->pin.port, cout->pin.pinIndex, pinMode, cout->select);
+ IfxPort_setPinPadDriver(cout->pin.port, cout->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxDsadc_initDinPin(const IfxDsadc_Din_In *dIn, IfxPort_InputMode dInMode, IfxPort_PadDriver padDriver)
+{
+ if (dIn->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(dIn->pin.port, dIn->pin.pinIndex, dInMode);
+ IfxPort_setPinPadDriver(dIn->pin.port, dIn->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxDsadc_initDsnPin(const IfxDsadc_Dsn_In *dsn, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (dsn->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(dsn->pin.port, dsn->pin.pinIndex, pinMode);
+ IfxPort_setPinPadDriver(dsn->pin.port, dsn->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxDsadc_initDspPin(const IfxDsadc_Dsp_In *dsp, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (dsp->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(dsp->pin.port, dsp->pin.pinIndex, pinMode);
+ IfxPort_setPinPadDriver(dsp->pin.port, dsp->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxDsadc_initItrPin(const IfxDsadc_Itr_In *itr, IfxPort_InputMode itrMode, IfxPort_PadDriver padDriver)
+{
+ if (itr->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(itr->pin.port, itr->pin.pinIndex, itrMode);
+ IfxPort_setPinPadDriver(itr->pin.port, itr->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxDsadc_initSgPin(const IfxDsadc_Sg_In *sg, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (sg->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(sg->pin.port, sg->pin.pinIndex, pinMode);
+ IfxPort_setPinPadDriver(sg->pin.port, sg->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc)
+{
+ return dsadc->CLC.B.DISS == 0;
+}
+
+
+IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode)
+{
+ dsadc->CGCFG.B.CGMOD = waveformMode;
+}
+
+
+IFX_INLINE void IfxDsadc_setSleepMode(Ifx_DSADC *dsadc, IfxDsadc_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ dsadc->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
+{
+ dsadc->GLOBRC.U = dsadc->GLOBRC.U | ((modulatorMask << 16) | (channelMask));
+}
+
+
+IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask)
+{
+ dsadc->GLOBRC.U &= ~(modulatorMask << 16);
+}
+
+
+#endif /* IFXDSADC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Dts/IfxDts_Dts.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Dts/IfxDts_Dts.c
new file mode 100644
index 0000000..21494ab
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Dts/IfxDts_Dts.c
@@ -0,0 +1,138 @@
+/**
+ * \file IfxDts_Dts.c
+ * \brief DTS DTS details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxDts_Dts.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue)
+{
+ sint32 dtsValue = (sint32)(temperatureValue + 285.5) / 0.467;
+
+ if (dtsValue < 0)
+ {
+ dtsValue = 0;
+ }
+ else if (dtsValue > 1023)
+ {
+ dtsValue = 1023;
+ }
+
+ return (uint16)dtsValue;
+}
+
+
+float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue)
+{
+ return ((float32)dtsValue * 0.467) - 285.5;
+}
+
+
+void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config)
+{
+ IfxDts_enableSensor();
+
+ /* wait for two measurements before enabling the limits */
+ {
+ int i;
+
+ /* disable limits */
+ MODULE_SCU.DTSLIM.B.LOWER = 0;
+ MODULE_SCU.DTSLIM.B.UPPER = 1023;
+
+ /* wait until DTS is ready */
+ while (!IfxDts_isReady())
+ {}
+
+ /* two dummy measurements */
+ for (i = 0; i < 2; ++i)
+ {
+ IfxDts_Dts_startSensor();
+
+ while (IfxDts_Dts_isBusy())
+ {}
+ }
+ }
+
+ /* change to the requested limits */
+ MODULE_SCU.DTSLIM.B.LOWER = IfxDts_Dts_convertFromCelsius(config->lowerTemperatureLimit);
+ MODULE_SCU.DTSLIM.B.UPPER = IfxDts_Dts_convertFromCelsius(config->upperTemperatureLimit);
+
+ /* lock configuration? */
+ if (config->enableSecureLock == TRUE)
+ {
+ IfxDts_disableSensorControl();
+ }
+ else
+ {
+ /* do Nothing */
+ }
+
+ /* enable DTS IRQ */
+ if (config->isrPriority > 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxDts_getSrcPointer();
+ IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
+ IfxSrc_enable(src);
+ }
+}
+
+
+void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config)
+{
+ config->sensorControlDisabled = FALSE;
+ config->lowerTemperatureLimit = -40.0; // Celsius
+ config->upperTemperatureLimit = 170.0; // Celsius
+
+ config->isrTypeOfService = IfxSrc_Tos_cpu0;
+ config->isrPriority = 0;
+
+ config->enableSecureLock = FALSE;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Dts/IfxDts_Dts.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Dts/IfxDts_Dts.h
new file mode 100644
index 0000000..56ce17a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Dts/IfxDts_Dts.h
@@ -0,0 +1,323 @@
+/**
+ * \file IfxDts_Dts.h
+ * \brief DTS DTS details
+ * \ingroup IfxLld_Dts
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dts_Dts_Usage How to use the DTS Interface driver?
+ * \ingroup IfxLld_Dts
+ *
+ * DTS gives the die-temperature result which will decoded to standard temperature value. Minimum first two temperature results are to be ignored to get reliable temperature.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Dts_Dts_Preparation Preparation
+ * \subsection IfxLld_Dts_Dts_Include Include Files
+ *
+ * Include following header file into your C code:
+ *
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Dts_Dts_Interrupt Interrupt Handler Installation
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define IFX_INTPRIO_DTS 1
+ * \endcode
+ *
+ * Add the interrupt service routine to your C code which should do the error flag handling:
+ * \code
+ * IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
+ * {
+ * // DTS finished temperature measurement
+ *
+ * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
+ * // here we could do something with the value...
+ * // and the DTS can be restarted
+ * IfxDts_Dts_startSensor();
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handler in your initialisation function:
+ * \code
+ * // install interrupt handler
+ * IfxCpu_Irq_installInterruptHandler(&dtsISR, IFX_INTPRIO_DTS);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Dts_Dts_Module DTS Module Initialisation
+ *
+ * The module initialisation can be done in the same function:
+ * \code
+ * // Get the default configuration
+ * IfxDts_Dts_Config dtsConfig;
+ * IfxDts_Dts_initModuleConfig(&dtsConfig);
+ *
+ * // Adapt the default configuration if required
+ * dtsConfig.isrPriority = IFX_INTPRIO_DTS;
+ * dtsConfig.isrTypeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
+ * dtsConfig.lowerTemperatureLimit = -35; // SMU alarm if temperature value is below this Celsius value
+ * dtsConfig.upperTemperatureLimit = 150; // SMU alarm if temperature value is above this Celsius value
+ *
+ * // Module initialisation
+ * IfxDts_Dts_initModule(&dtsConfig);
+ * \endcode
+ * Now, DTS is initialised for starting temperature measurements:
+ * \code
+ * IfxDts_Dts_startSensor();
+ * \endcode
+ *
+ * \subsection IfxLld_Dts_Dts_IrqBased IRQ based measurements
+ *
+ * Whenever the interrupt handler is called, a new measurment result is available and could be processed further (e.g. for statistical analysis).
+ *
+ * \code
+ * IFX_INTERRUPT(dtsISR, 0, IFX_INTPRIO_DTS)
+ * {
+ * // DTS finished temperature measurement
+ *
+ * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
+ * // here we could do something with the value...
+ * // and the DTS can be restarted
+ * IfxDts_Dts_startSensor();
+ * }
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Dts_Dts_NonIrqBased Measurements without IRQs
+ *
+ * If no interrupt routine should be used, a new measurement result can be requested the following way:
+ *
+ * \code
+ * // start Sensor
+ * IfxDts_Dts_startSensor();
+ *
+ * // wait until a new result is available
+ * while( IfxDts_Dts_isBusy() );
+ * uint16 temperatureValue = IfxDts_Dts_getTemperatureValue();
+ * \endcode
+ *
+ *
+ * Alternatively (and this is the normal usage), the DTS could be periodically started from a timer routine, e.g. each mS. The conversion itself takes 100 uS maximum.
+ *
+ *
+ * \subsection IfxLld_Dts_Dts_Converted Temperature conversion
+ *
+ * Following function returns the actual temperature in Celsius:
+ *
+ * \code
+ * float32 temperature = IfxDts_Dts_getTemperatureCelsius();
+ * \endcode
+ *
+ * \defgroup IfxLld_Dts_Dts DTS
+ * \ingroup IfxLld_Dts
+ * \defgroup IfxLld_Dts_Dts_Structures Data Structures
+ * \ingroup IfxLld_Dts_Dts
+ * \defgroup IfxLld_Dts_Dts_Module Module Initialisation functions
+ * \ingroup IfxLld_Dts_Dts
+ * \defgroup IfxLld_Dts_Dts_Sensor Sensor Functions
+ * \ingroup IfxLld_Dts_Dts
+ * \defgroup IfxLld_Dts_Dts_Conversion Conversion Functions
+ * \ingroup IfxLld_Dts_Dts
+ */
+
+#ifndef IFXDTS_DTS_H
+#define IFXDTS_DTS_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Dts/Std/IfxDts.h"
+#include "Cpu/Std/IfxCpu.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Dts_Dts_Structures
+ * \{ */
+/** \brief DTS module configuration structure
+ */
+typedef struct
+{
+ boolean sensorControlDisabled; /**< \brief MODULE_SCU.DTSCON.SCLK, specifies the control register lock except MODULE_SCU.DTSCON.START. */
+ float32 lowerTemperatureLimit; /**< \brief Specifies the lower temperature limit compared against die temperature in Celsius
+ *
+ * A SMU will be triggered if the measurement result is below this limit */
+ float32 upperTemperatureLimit; /**< \brief Specifies the upper temperature limit compared against die temperature in Celsius.
+ *
+ * A SMU will be triggered if the measurement result is above this limit */
+ uint16 isrPriority; /**< \brief interrupt priority */
+ IfxSrc_Tos isrTypeOfService; /**< \brief type of interrupt service */
+ boolean enableSecureLock; /**< \brief MODULE_SCU.DTSCON.SLCK,MODULE_SCU.DTSLIM.SLCK, Specifies the Security Lock for Configuration and Limitation register. */
+} IfxDts_Dts_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Dts_Dts_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialise the DTS with supplied configuration.
+ * \param config pointer to module configuration structure
+ * \return None
+ *
+ * Usage Example : \ref IfxLld_Dts_Dts_Usage
+ *
+ */
+IFX_EXTERN void IfxDts_Dts_initModule(const IfxDts_Dts_Config *config);
+
+/** \brief Intialises the module configuration buffer with default configuration.
+ * \param config pointer to module configuration structure
+ * \return None
+ *
+ * Usage Example : \ref IfxLld_Dts_Dts_Usage
+ *
+ */
+IFX_EXTERN void IfxDts_Dts_initModuleConfig(IfxDts_Dts_Config *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dts_Dts_Sensor
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the converted temperature in Celsius
+ * \return The temperature based on the DTS temperature value
+ *
+ * Usage Example : \ref IfxLld_Dts_Dts_Usage
+ *
+ */
+IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void);
+
+/** \brief Returns the unconverted temperature measurement result
+ * \return current sensor measured result.
+ *
+ * Usage Example : \ref IfxLld_Dts_Dts_Usage
+ *
+ */
+IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void);
+
+/** \brief Returns the current BUSY status of the Sensor
+ * \return TRUE if Sensor is busy in measuring temperature otherwise FALSE
+ *
+ * Usage Example : \ref IfxLld_Dts_Dts_Usage
+ *
+ */
+IFX_INLINE boolean IfxDts_Dts_isBusy(void);
+
+/** \brief Starts the next temperature measurement.
+ * \return None
+ *
+ * Usage Example : \ref IfxLld_Dts_Dts_Usage
+ *
+ */
+IFX_INLINE void IfxDts_Dts_startSensor(void);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dts_Dts_Conversion
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Converts a temperature value in Celsius to DTS value
+ * \param temperatureValue the temperature in Celsius
+ * \return the appr. DTS value
+ */
+IFX_EXTERN uint16 IfxDts_Dts_convertFromCelsius(float32 temperatureValue);
+
+/** \brief Converts the measurement value returned from DTS to Celsius
+ * \param dtsValue measurement value returned from DTS
+ * \return temperature in Celsius
+ */
+IFX_EXTERN float32 IfxDts_Dts_convertToCelsius(uint16 dtsValue);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE float32 IfxDts_Dts_getTemperatureCelsius(void)
+{
+ return IfxDts_Dts_convertToCelsius(IfxDts_getTemperatureValue());
+}
+
+
+IFX_INLINE uint16 IfxDts_Dts_getTemperatureValue(void)
+{
+ return (uint16)IfxDts_getTemperatureValue();
+}
+
+
+IFX_INLINE boolean IfxDts_Dts_isBusy(void)
+{
+ return IfxDts_isBusy();
+}
+
+
+IFX_INLINE void IfxDts_Dts_startSensor(void)
+{
+ /* start sensor */
+ IfxDts_startSensor();
+
+ /* one dummy read to a SCU register which ensures that the BUSY flag is synchronized
+ * into the status register before IfxDts_Dts_isBusy() is called */
+ if (IfxDts_isBusy())
+ {}
+}
+
+
+#endif /* IFXDTS_DTS_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Std/IfxDts.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Std/IfxDts.c
new file mode 100644
index 0000000..13b5812
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Std/IfxDts.c
@@ -0,0 +1,58 @@
+/**
+ * \file IfxDts.c
+ * \brief DTS basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxDts.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxDts_isReady(void)
+{
+ return MODULE_SCU.DTSSTAT.B.RDY == 1 ? TRUE : FALSE;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Std/IfxDts.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Std/IfxDts.h
new file mode 100644
index 0000000..3cc898e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Std/IfxDts.h
@@ -0,0 +1,160 @@
+/**
+ * \file IfxDts.h
+ * \brief DTS basic functionality
+ * \ingroup IfxLld_Dts
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dts_Std_Control Control functions
+ * \ingroup IfxLld_Dts_Std
+ * \defgroup IfxLld_Dts_Std_Status Status functions
+ * \ingroup IfxLld_Dts_Std
+ */
+
+#ifndef IFXDTS_H
+#define IFXDTS_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxDts_cfg.h"
+#include "IfxScu_reg.h"
+#include "IfxScu_bf.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "Src/Std/IfxSrc.h"
+/** \addtogroup IfxLld_Dts_Std_Control
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable the writing of register bits except START bit.
+ * \return None
+ */
+IFX_INLINE void IfxDts_disableSensorControl(void);
+
+/** \brief Enables the DTS sensor
+ * \return None
+ */
+IFX_INLINE void IfxDts_enableSensor(void);
+
+/** \brief Starts the next temperature measurement.
+ * \return None
+ */
+IFX_INLINE void IfxDts_startSensor(void);
+
+/** \} */
+
+/** \addtogroup IfxLld_Dts_Std_Status
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the Interrupt request source.
+ * \return Address of interrupt request source
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxDts_getSrcPointer(void);
+
+/** \brief Read the temperature measurement result
+ * \return Temperature measurement result
+ */
+IFX_INLINE uint16 IfxDts_getTemperatureValue(void);
+
+/** \brief Returns the current BUSY status of the Sensor
+ * \return TRUE if Sensor is busy in measuring temperature otherwise FALSE
+ */
+IFX_INLINE boolean IfxDts_isBusy(void);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the current READY status of the Sensor.
+ * \return TRUE if Sensor is ready for measuring temperature otherwise FALSE
+ */
+IFX_EXTERN boolean IfxDts_isReady(void);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxDts_disableSensorControl(void)
+{
+ MODULE_SCU.DTSCON.B.SLCK = 1;
+ MODULE_SCU.DTSLIM.B.SLCK = 1;
+}
+
+
+IFX_INLINE void IfxDts_enableSensor(void)
+{
+ MODULE_SCU.DTSCON.B.PWD = 0;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxDts_getSrcPointer(void)
+{
+ return &SRC_SCUDTS;
+}
+
+
+IFX_INLINE uint16 IfxDts_getTemperatureValue(void)
+{
+ return (uint16)MODULE_SCU.DTSSTAT.B.RESULT;
+}
+
+
+IFX_INLINE boolean IfxDts_isBusy(void)
+{
+ return MODULE_SCU.DTSSTAT.B.BUSY == 1 ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxDts_startSensor(void)
+{
+ MODULE_SCU.DTSCON.B.START = 1;
+}
+
+
+#endif /* IFXDTS_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem/Std/IfxEmem.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem/Std/IfxEmem.c
new file mode 100644
index 0000000..603e949
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem/Std/IfxEmem.c
@@ -0,0 +1,76 @@
+/**
+ * \file IfxEmem.c
+ * \brief EMEM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxEmem.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+IfxEmem_LockedState IfxEmem_getLockedState(void)
+{
+ return (IfxEmem_LockedState)MODULE_EMEM.SBRCTR.B.STBLOCK;
+}
+
+
+void IfxEmem_setClockEnableState(const IfxEmem_State state)
+{
+ /* bit is inverted */
+ if (IfxEmem_State_enabled == state)
+ {
+ MODULE_EMEM.CLC.B.DISR = 0;
+ }
+ else
+ {
+ MODULE_EMEM.CLC.B.DISR = 1;
+ }
+
+ /* wait one cycle for module to be enabled */
+ __nop();
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem/Std/IfxEmem.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem/Std/IfxEmem.h
new file mode 100644
index 0000000..31e2890
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem/Std/IfxEmem.h
@@ -0,0 +1,187 @@
+/**
+ * \file IfxEmem.h
+ * \brief EMEM basic functionality
+ * \ingroup IfxLld_Emem
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Emem_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Emem_Std
+ * \defgroup IfxLld_Emem_Std_Module Module Functions
+ * \ingroup IfxLld_Emem_Std
+ */
+
+#ifndef IFXEMEM_H
+#define IFXEMEM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxEmem_cfg.h"
+#include "Scu/Std/IfxScuWdt.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Emem_Std_Enumerations
+ * \{ */
+/** \brief EMEM lock state defined in MODULE_EMEM.SBRCTR.B.STBLOCK.
+ */
+typedef enum
+{
+ IfxEmem_LockedState_locked = 0, /**< \brief EMEM locked state. */
+ IfxEmem_LockedState_unlocked = 1 /**< \brief EMEM unlocked state. */
+} IfxEmem_LockedState;
+
+/** \brief EMEM module clock enabled or disabled state defined in MODULE_EMEM.CLC.B.DISR.
+ */
+typedef enum
+{
+ IfxEmem_State_disabled = 0, /**< \brief EMEM module clock disabled state. */
+ IfxEmem_State_enabled = 1 /**< \brief EMEM module clock enabled state. */
+} IfxEmem_State;
+
+/** \brief EMEM tile configuration mode defined in MODULE_EMEM.TILECONFIG.B.Tx( x = 0,1,..).
+ */
+typedef enum
+{
+ IfxEmem_TileConfigMode_calibMode = 0 /**< \brief EMEM tile mode to calibration memory. */
+} IfxEmem_TileConfigMode;
+
+/** \brief Tile Number
+ */
+typedef enum
+{
+ IfxEmem_TileNumber_0 = 0, /**< \brief Tile Number0 */
+ IfxEmem_TileNumber_1, /**< \brief Tile Number1 */
+ IfxEmem_TileNumber_2, /**< \brief Tile Number2 */
+ IfxEmem_TileNumber_3, /**< \brief Tile Number3 */
+ IfxEmem_TileNumber_4, /**< \brief Tile Number4 */
+ IfxEmem_TileNumber_5, /**< \brief Tile Number5 */
+ IfxEmem_TileNumber_6, /**< \brief Tile Number6 */
+ IfxEmem_TileNumber_7, /**< \brief Tile Number7 */
+ IfxEmem_TileNumber_8, /**< \brief Tile Number8 */
+ IfxEmem_TileNumber_9, /**< \brief Tile Number9 */
+ IfxEmem_TileNumber_10, /**< \brief Tile Number10 */
+ IfxEmem_TileNumber_11, /**< \brief Tile Number11 */
+ IfxEmem_TileNumber_12, /**< \brief Tile Number12 */
+ IfxEmem_TileNumber_13, /**< \brief Tile Number13 */
+ IfxEmem_TileNumber_14, /**< \brief Tile Number14 */
+ IfxEmem_TileNumber_15 /**< \brief Tile Number15 */
+} IfxEmem_TileNumber;
+
+/** \} */
+
+/** \addtogroup IfxLld_Emem_Std_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the status of module enabled or disabled
+ * \return Status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxEmem_isModuleEnabled(void);
+
+/** \brief Sets all EMEM tiles to calibration memory mode.
+ * \param mode EMEM tile configuration mode.
+ * \param tile tile number
+ * \return None
+ */
+IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile);
+
+/** \brief Sets Unlock standby lock flag.
+ * \param flag Unlock standby lock flag value.
+ * \return None
+ */
+IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the EMEM stand RAM lock state.
+ * \return EMEM stand RAM lock state.
+ */
+IFX_EXTERN IfxEmem_LockedState IfxEmem_getLockedState(void);
+
+/** \brief Sets state of the EMEM module clock.
+ * Note: Do not use this API for enabling and disabling EMEM without handling Endinit protection in application.
+ * for complete enable and disable of EMEM with endint protection handling, please use the following APIs
+ * /ref IfxEmem_enableModule
+ * /ref IfxEmem_disableModule
+ * \param state EMEM module clock enabled or disabled state.
+ * \return None
+ */
+IFX_EXTERN void IfxEmem_setClockEnableState(const IfxEmem_State state);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE boolean IfxEmem_isModuleEnabled(void)
+{
+ return (MODULE_EMEM.CLC.B.DISS == 0) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxEmem_setTileConfigMode(const IfxEmem_TileConfigMode mode, IfxEmem_TileNumber tile)
+{
+ uint32 shift = tile * 2;
+ uint32 mask = ~(0x3 << shift);
+ uint32 value = (uint32)mode << shift;
+ MODULE_EMEM.TILECONFIG.U = (MODULE_EMEM.TILESTATE.U & mask) | value;
+}
+
+
+IFX_INLINE void IfxEmem_setUnlockStandbyLockFlag(const uint8 flag)
+{
+ if (8 > flag)
+ {
+ MODULE_EMEM.SBRCTR.B.STBULK = flag;
+ }
+}
+
+
+#endif /* IFXEMEM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Eray/IfxEray_Eray.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Eray/IfxEray_Eray.c
new file mode 100644
index 0000000..40ce8d0
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Eray/IfxEray_Eray.c
@@ -0,0 +1,609 @@
+/**
+ * \file IfxEray_Eray.c
+ * \brief ERAY ERAY details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxEray_Eray.h"
+#include "Mtu/Std/IfxMtu.h"
+
+/** \addtogroup IfxLld_Eray_Eray_Node
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Inialises the communication controller.
+ * \param eray pointer to ERAY Module handle.
+ * \param config pointer to communication controller config structure.
+ * \return None
+ */
+IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config);
+
+/** \brief Initialises the Global Timing Unit.
+ * \param eray pointer to ERAY Module handle.
+ * \param config global timing unit Configuration structure.
+ * \return None
+ */
+IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config);
+
+/** \brief Inialises the message RAM.
+ * \param eray pointer to ERAY Module handle.
+ * \param config pointer to message RAM config structure.
+ * \return None
+ */
+IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config)
+{
+ Ifx_ERAY *eraySFR = eray->eray;
+ // clear all the flags
+ IfxEray_clearAllFlags(eraySFR);
+
+ // set Communication Controller to config state
+ if (IfxEray_getPocState(eraySFR) != IfxEray_PocState_config)
+ {
+ IfxEray_changePocState(eraySFR, IfxEray_PocCommand_freeze);
+ IfxEray_waitForPocState(eraySFR, IfxEray_PocState_halt);
+ IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
+ IfxEray_waitForPocState(eraySFR, IfxEray_PocState_defaultConfig);
+ IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
+ IfxEray_waitForPocState(eraySFR, IfxEray_PocState_config);
+ }
+
+ // enable interrupt lines
+ IfxEray_enableInterruptLines(eraySFR);
+ IfxEray_setAutoDelayBuffers(eraySFR);
+ //configure message RAM ( slots and slot buffers )
+ IfxEray_Eray_Node_initMessageRAM(eray, &config->messageRAMConfig);
+ //configure communication controller for clock corrections
+ IfxEray_Eray_Node_initCommunicationController(eray, &config->controllerConfig);
+ // initialise the Node pins.
+ const IfxEray_Eray_Pins *pins = config->pins;
+
+ if (pins != NULL_PTR)
+ {
+ const IfxEray_Eray_NodeA *nodeAPins = pins->nodeAPins;
+
+ if (nodeAPins != NULL_PTR)
+ {
+ const IfxEray_Rxd_In *rx = nodeAPins->rxIn;
+
+ if (rx != NULL_PTR)
+ {
+ IfxEray_initRxPinWithPadLevel(rx, nodeAPins->rxInMode, nodeAPins->pinDriver);
+ }
+
+ const IfxEray_Txd_Out *tx = nodeAPins->txOut;
+
+ if (tx != NULL_PTR)
+ {
+ IfxEray_initTxPin(tx, nodeAPins->txOutMode, nodeAPins->pinDriver);
+ }
+
+ const IfxEray_Txen_Out *txEn = nodeAPins->txEnOut;
+
+ if (txEn != NULL_PTR)
+ {
+ IfxEray_initTxEnPin(txEn, nodeAPins->txEnOutMode, nodeAPins->pinDriver);
+ }
+ }
+
+ const IfxEray_Eray_NodeB *nodeBPins = pins->nodeBPins;
+
+ if (nodeBPins != NULL_PTR)
+ {
+ const IfxEray_Rxd_In *rx = nodeBPins->rxIn;
+
+ if (rx != NULL_PTR)
+ {
+ IfxEray_initRxPinWithPadLevel(rx, nodeBPins->rxInMode, nodeBPins->pinDriver);
+ }
+
+ const IfxEray_Txd_Out *tx = nodeBPins->txOut;
+
+ if (tx != NULL_PTR)
+ {
+ IfxEray_initTxPin(tx, nodeBPins->txOutMode, nodeBPins->pinDriver);
+ }
+
+ const IfxEray_Txen_Out *txEn = nodeBPins->txEnOut;
+
+ if (txEn != NULL_PTR)
+ {
+ IfxEray_initTxEnPin(txEn, nodeBPins->txEnOutMode, nodeBPins->pinDriver);
+ }
+ }
+ }
+
+ // set the Communication Controller to ready state
+ IfxEray_setPocReady(eraySFR);
+}
+
+
+IFX_STATIC void IfxEray_Eray_Node_initCommunicationController(IfxEray_Eray *eray, const IfxEray_Eray_ControllerConfig *config)
+{
+ Ifx_ERAY *eraySFR = eray->eray;
+ //SUCC1
+ IfxEray_setTransmittedFrames(eraySFR, config->succ1Config.startupFrameTransmitted, config->succ1Config.syncFrameTransmitted);
+ IfxEray_setMaxColdStartAttempts(eraySFR, config->succ1Config.maxColdStartAttempts);
+ IfxEray_setActiveCyclePairs(eraySFR, config->succ1Config.numberOfCyclePairsForActive);
+ IfxEray_setWakeupPatternChannel(eraySFR, config->succ1Config.wakeupPatternChannel);
+ IfxEray_setTransmissionSlotMode(eraySFR, config->succ1Config.transmissionSlotMode);
+ IfxEray_setClockSynchErrorHalt(eraySFR, config->succ1Config.clockSyncErrorHalt);
+ IfxEray_setSymbolChannels(eraySFR, config->succ1Config.channelASymbolTransmitted, config->succ1Config.channelBSymbolTransmitted);
+ IfxEray_setNodeChannels(eraySFR, config->succ1Config.channelAConnectedNode, config->succ1Config.channelBConnectedNode);
+ //SUCC2
+ IfxEray_setListenTimeOuts(eraySFR, config->succ2Config.listenTimeOut, config->succ2Config.listenTimeOutNoise);
+ //SUCC3
+ IfxEray_setClockCorrectionCycles(eraySFR, config->succ3Config.clockCorrectionCyclesPassive, config->succ3Config.clockCorrectionCyclesHalt);
+ //NEMC
+ IfxEray_setNetworkVectorLength(eraySFR, config->networkVectorLength);
+ //PRTC1, PRTC2
+ IfxEray_setTransmissionStartTime(eraySFR, (uint8)config->prtc1Control.transmissionStartTime);
+ IfxEray_setCollisionAvoidanceDuration(eraySFR, config->prtc1Control.collisionAvoidanceDuration);
+ IfxEray_setStrobePosition(eraySFR, config->prtc1Control.strobePosition);
+ IfxEray_setBaudrate(eraySFR, config->prtc1Control.baudrate);
+ IfxEray_setReceiveWakeupTimes(eraySFR, config->prtc1Control.receiveWakeupTestDuration, config->prtc2Control.receiveWakeupIdleTime, config->prtc2Control.receiveWakeupLowTime
+ );
+ IfxEray_setTransmitWakeupTimes(eraySFR, config->prtc1Control.transmitWakeupRepetitions, config->prtc2Control.transmitWakeupIdleTime, config->prtc2Control.transmitWakeupLowTime);
+ //MHDC
+ IfxEray_setMessageHandlerConfigurations(eraySFR, config->staticFramepayload, config->latestTransmissionStart);
+ // GTU
+ IfxEray_Eray_Node_initGTU(eray, &config->gtuConfig);
+}
+
+
+void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config)
+{
+ // Default node configurations buffer
+ const IfxEray_Eray_NodeConfig nodeConfig = {
+ .messageRAMConfig = {
+ .firstDynamicBuffer = 0,
+ .numberOfMessageBuffers = 0,
+ .fifoBufferStartIndex = 0x80,
+ .fifoDepth = 30,
+ .frameIdFilter = 0x7FD,
+ .receiveChannel = IfxEray_ReceiveChannel_a,
+ .rejectedFrameId = 2,
+ .filteredCycleNumber = 0,
+ .staticFifoDisabled = FALSE,
+ .fifoNullFramesRejected = FALSE,
+ .bufferReconfigEnabled = TRUE,
+ .fifoConfigured = FALSE
+ },
+
+ .controllerConfig = {
+ .networkVectorLength = 0x2,
+ .staticFramepayload = 0x4,
+ .latestTransmissionStart = 0x3F,
+
+ .prtc1Control = {
+ .transmissionStartTime = 0xA,
+ .collisionAvoidanceDuration = 0x61,
+ .strobePosition = IfxEray_StrobePosition_5,
+ .baudrate = IfxEray_Baudrate_10,
+ .receiveWakeupTestDuration = 0x8C,
+ .transmitWakeupRepetitions = 0x2
+ },
+
+ .prtc2Control = {
+ .receiveWakeupIdleTime = 0x2D,
+ .receiveWakeupLowTime = 0x12,
+ .transmitWakeupIdleTime = 0x2D,
+ .transmitWakeupLowTime = 0x12
+ },
+
+ .succ1Config = {
+ .channelAConnectedNode = TRUE,
+ .channelBConnectedNode = TRUE,
+ .channelASymbolTransmitted = FALSE,
+ .channelBSymbolTransmitted = FALSE,
+ .clockSyncErrorHalt = TRUE,
+ .transmissionSlotMode = IfxEray_TransmissionSlotMode_single,
+ .wakeupPatternChannel = IfxEray_WakeupChannel_a,
+ .numberOfCyclePairsForActive = 0x7,
+ .maxColdStartAttempts = 0x1F,
+ .syncFrameTransmitted = TRUE,
+ .startupFrameTransmitted = TRUE
+ },
+
+ .succ2Config = {
+ .listenTimeOut = 0x13972,
+ .listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16
+ },
+
+ .succ3Config = {
+ .clockCorrectionCyclesPassive = 0x1,
+ .clockCorrectionCyclesHalt = 0x1
+ },
+
+ .gtuConfig = {
+ .gtu01Config.microticksPerCycle = 0x9C40,
+
+ .gtu02Config = {
+ .macroticksPerCycle = 0x3E8,
+ .maxSyncFrames = 0x4
+ },
+
+ .gtu03Config = {
+ .channelAMicrotickInitialOffset = 0x19,
+ .channelBMicrotickInitialOffset = 0x19,
+ .channelAMacrotickInitialOffset = 0xA,
+ .channelBMacrotickInitialOffset = 0x2
+ },
+
+ .gtu04Config = {
+ .networkStartIdleTime = 0x38E,
+ .correctionOffset = 0x394
+ },
+
+ .gtu05Config = {
+ .channelAReceptionDelay = 0x4,
+ .channelBReceptionDelay = 0x4,
+ .clusterDrift = 1,
+ .decodingCorrection = 0x34
+ },
+
+ .gtu06Config = {
+ .acceptedStartupDeviation = 0x81,
+ .maxDriftOffset = 0xD2
+ },
+
+ .gtu07Config = {
+ .staticSlotLength = 0x32,
+ .staticSlotsCount = 0xC
+ },
+
+ .gtu08Config = {
+ .dynamicSlotLength = 4,
+ .dynamicSlotCount = 0x4B,
+ },
+
+ .gtu09Config = {
+ .idleDynamicSlots = IfxEray_IdleDynamicSlots_1,
+ .staticActionPoint = 8,
+ .dynamicActionPoint = 3
+ },
+
+ .gtu10Config = {
+ .maxOffsetCorrection = 0x32,
+ .maxRateCorrection = 0xD2
+ },
+
+ .gtu11Config = {
+ .externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0,
+ .externalRateCorrection = IfxEray_ExternalRateCorrection_0,
+ .externalOffset = IfxEray_ExternalOffset_noCorrection,
+ .externalRate = IfxEray_ExternalRate_noCorrection
+ },
+ },
+ },
+ .pins = NULL_PTR
+ };
+
+ *config = nodeConfig;
+}
+
+
+IFX_STATIC void IfxEray_Eray_Node_initGTU(IfxEray_Eray *eray, const IfxEray_Eray_GTUConfig *config)
+{
+ Ifx_ERAY *eraySFR = eray->eray;
+
+ IfxEray_setCycleDurationMicroticks(eraySFR, config->gtu01Config.microticksPerCycle);
+ IfxEray_setCycleDurationMacroticks(eraySFR, config->gtu02Config.macroticksPerCycle);
+ IfxEray_setMaxSynchFrames(eraySFR, (IfxEray_MaxSynchFrames)config->gtu02Config.maxSyncFrames);
+ IfxEray_setChannelAInitialOffsets(eraySFR, config->gtu03Config.channelAMicrotickInitialOffset, config->gtu03Config.channelAMacrotickInitialOffset);
+ IfxEray_setChannelBInitialOffsets(eraySFR, config->gtu03Config.channelBMicrotickInitialOffset, config->gtu03Config.channelBMacrotickInitialOffset);
+ IfxEray_setNetworkStartIdleTime(eraySFR, config->gtu04Config.networkStartIdleTime);
+ IfxEray_setOffsetCorrection(eraySFR, config->gtu04Config.correctionOffset);
+ IfxEray_setChannelsReceiveDelay(eraySFR, config->gtu05Config.channelAReceptionDelay, config->gtu05Config.channelBReceptionDelay);
+ IfxEray_setDecodingCorrectionValue(eraySFR, config->gtu05Config.decodingCorrection);
+ IfxEray_setClusterDriftValues(eraySFR, config->gtu05Config.clusterDrift, config->gtu06Config.maxDriftOffset);
+ IfxEray_setClusterStartupDeviation(eraySFR, config->gtu06Config.acceptedStartupDeviation);
+ IfxEray_setStaticSlots(eraySFR, config->gtu07Config.staticSlotLength, config->gtu07Config.staticSlotsCount);
+ IfxEray_setDynamicSlots(eraySFR, config->gtu08Config.dynamicSlotLength, config->gtu08Config.dynamicSlotCount, config->gtu09Config.idleDynamicSlots);
+ IfxEray_setSlotActionPoints(eraySFR, config->gtu09Config.staticActionPoint, config->gtu09Config.dynamicActionPoint);
+ IfxEray_setMaxCorrectionValues(eraySFR, config->gtu10Config.maxOffsetCorrection, config->gtu10Config.maxRateCorrection);
+ IfxEray_setExternalCorrectionControl(eraySFR, config->gtu11Config.externalOffset, config->gtu11Config.externalRate);
+ IfxEray_setExternalCorrectionValues(eraySFR, config->gtu11Config.externalOffsetCorrection, config->gtu11Config.externalRateCorrection);
+}
+
+
+IFX_STATIC void IfxEray_Eray_Node_initMessageRAM(IfxEray_Eray *eray, const IfxEray_Eray_MessageRAMConfig *config)
+{
+ Ifx_ERAY *eraySFR = eray->eray;
+ uint32 bufferCount;
+ //group of Message Buffers exclusively for the static segment configured
+ IfxEray_setFirstDynamicBuffer(eraySFR, config->firstDynamicBuffer);
+ /* Last Configured Buffer
+ * 01H..7FH: Number of Message Buffers is LCB + 1
+ * 80H..FFH: No Message Buffer configured
+ */
+ IfxEray_setMessageBufferCount(eraySFR, config->numberOfMessageBuffers);
+
+ // receive FIFO buffers configuration
+ if (config->fifoConfigured == TRUE)
+ {
+ IfxEray_setFifoBufferStartIndex(eraySFR, (uint8)config->fifoBufferStartIndex);
+ IfxEray_setFifoMessageBufferConfigurations(eraySFR, config->receiveChannel, config->staticFifoDisabled, config->fifoDepth);
+ IfxEray_setFifoFilterConfigurations(eraySFR, config->rejectedFrameId, config->filteredCycleNumber, config->fifoNullFramesRejected, config->frameIdFilter);
+ }
+ else
+ {
+ // FIFO is not supported. No message buffers assigned to the FIFO, if FFB >= 128
+ IfxEray_setFifoBufferStartIndex(eraySFR, (uint8)config->fifoBufferStartIndex);
+ }
+
+ if (config->bufferReconfigEnabled == TRUE)
+ {
+ //buffers reconfigured
+ IfxEray_setBufferReconfigSecure(eraySFR, 0);
+ }
+ else
+ {
+ //buffer reconfiguration locked
+ IfxEray_setBufferReconfigSecure(eraySFR, 2);
+ }
+
+ for (bufferCount = 0; bufferCount < config->numberOfMessageBuffers; bufferCount++)
+ {
+ IfxEray_setSlot(eraySFR, config->header[bufferCount], config->data[bufferCount], config->slotControl[bufferCount]);
+ }
+}
+
+
+void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config)
+{
+ eray->eray = config->module;
+ Ifx_ERAY *eraySFR = config->module;
+ // Enable MTU clock
+ {
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(password);
+ IfxMtu_enableModule();
+ IfxScuWdt_setCpuEndinit(password);
+ }
+ // clear RAMS
+ {
+ uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(password);
+ IfxMtu_clearSram(IfxMtu_MbistSel_erayObf);
+ IfxMtu_clearSram(IfxMtu_MbistSel_erayIbfTbf);
+ IfxMtu_clearSram(IfxMtu_MbistSel_erayMbf);
+
+ IfxScuWdt_setSafetyEndinit(password);
+ }
+
+ {
+ IfxEray_enableModule(eraySFR);
+ }
+
+ /** NOTE: If not DMA, the interrupt service provider is assigned to the CPU ID where
+ * this function is called from */
+ {
+ if ((config->interrupt.int0Priority != 0) || (config->interrupt.int0IsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getInterruptLine0SrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.int0IsrProvider, config->interrupt.int0Priority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.int1Priority != 0) || (config->interrupt.int1IsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getInterruptLine1SrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.int1IsrProvider, config->interrupt.int1Priority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.tint0Priority != 0) || (config->interrupt.tint0IsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getTimerInterrupt0SrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.tint0IsrProvider, config->interrupt.tint0Priority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.tint1Priority != 0) || (config->interrupt.tint1IsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getTimerInterrupt1SrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.tint1IsrProvider, config->interrupt.tint1Priority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.mbsc0Priority != 0) || (config->interrupt.mbsc0IsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getMessageBufferStatus0SrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.mbsc0IsrProvider, config->interrupt.mbsc0Priority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.mbsc1Priority != 0) || (config->interrupt.mbsc1IsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getMessageBufferStatus1SrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.mbsc1IsrProvider, config->interrupt.mbsc1Priority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.ibusyPriority != 0) || (config->interrupt.ibusyIsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getInputBufferBusySrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.ibusyIsrProvider, config->interrupt.ibusyPriority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.obusyPriority != 0) || (config->interrupt.obusyIsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getOutputBufferBusySrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.obusyIsrProvider, config->interrupt.obusyPriority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.ndat0Priority != 0) || (config->interrupt.ndat0IsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getNewDataInterrupt0SrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.ndat0IsrProvider, config->interrupt.ndat0Priority);
+ IfxSrc_enable(src);
+ }
+
+ if ((config->interrupt.ndat1Priority != 0) || (config->interrupt.ndat1IsrProvider == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxEray_getNewDataInterrupt1SrcPtr(eraySFR);
+ IfxSrc_init(src, config->interrupt.ndat1IsrProvider, config->interrupt.ndat1Priority);
+ IfxSrc_enable(src);
+ }
+ }
+}
+
+
+void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray)
+{
+ config->module = eray;
+ config->interrupt.int0IsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.int1IsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.tint0IsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.tint1IsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.ndat0IsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.ndat1IsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.mbsc0IsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.mbsc1IsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.ibusyIsrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.obusyIsrProvider = IfxSrc_Tos_cpu0;
+
+ config->interrupt.int0Priority = 0;
+ config->interrupt.int1Priority = 0;
+ config->interrupt.tint0Priority = 0;
+ config->interrupt.tint1Priority = 0;
+ config->interrupt.ndat0Priority = 0;
+ config->interrupt.ndat1Priority = 0;
+ config->interrupt.mbsc0Priority = 0;
+ config->interrupt.mbsc1Priority = 0;
+ config->interrupt.ibusyPriority = 0;
+ config->interrupt.obusyPriority = 0;
+}
+
+
+void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
+{
+ Ifx_ERAY *eraySFR = eray->eray;
+
+ Ifx_ERAY_FSR fifoStatus = IfxEray_getFifoStatus(eraySFR);
+
+ // Check if FIFO is not empty
+ if (fifoStatus.B.RFNE == 1)
+ {
+ if (fifoStatus.B.RFO == 1)
+ {
+ //FIX ME: FIFO overrun error
+ }
+ else
+ {
+ while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
+ {}
+
+ IfxEray_receiveHeader(eraySFR, config->headerReceived);
+ IfxEray_receiveData(eraySFR, config->dataReceived);
+ //Transfer the first message buffer ID of FIFO
+ IfxEray_setRxBufferNumber(eraySFR, IfxEray_getFifoIndex(eraySFR));
+ IfxEray_setReceiveRequest(eraySFR, config->receiveRequested);
+
+ while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR))
+ {}
+
+ if (config->swapRequested && (IfxEray_getOutputBuffer(eraySFR) != config->bufferIndex))
+ {
+ IfxEray_setViewData(eraySFR, config->swapRequested);
+ }
+ }
+ }
+}
+
+
+void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config)
+{
+ Ifx_ERAY *eraySFR = eray->eray;
+
+ while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
+ {}
+
+ IfxEray_receiveHeader(eraySFR, config->headerReceived);
+ IfxEray_receiveData(eraySFR, config->dataReceived);
+ IfxEray_setRxBufferNumber(eraySFR, config->bufferIndex);
+ IfxEray_setReceiveRequest(eraySFR, config->receiveRequested);
+
+ while (IfxEray_getOutputBufferBusyShadowStatus(eraySFR) == TRUE)
+ {}
+
+ if (config->swapRequested && (IfxEray_getOutputBuffer(eraySFR) != config->bufferIndex))
+ {
+ IfxEray_setViewData(eraySFR, config->swapRequested);
+ }
+}
+
+
+void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl)
+{
+ Ifx_ERAY *eraySFR = eray->eray;
+
+ while (IfxEray_getInputBufferBusyHostStatus(eraySFR) == TRUE)
+ {}
+
+ IfxEray_sendHeader(eraySFR, transmitControl->headerTransfered);
+ IfxEray_sendData(eraySFR, transmitControl->dataTransfered);
+ IfxEray_setTransmitRequest(eraySFR, transmitControl->transferRequested);
+ IfxEray_setTxBufferNumber(eraySFR, transmitControl->bufferIndex);
+
+ while (IfxEray_getInputBufferBusyShadowStatus(eraySFR) == TRUE)
+ {}
+
+ while (IfxEray_getInputBufferBusyHostStatus(eraySFR) == TRUE)
+ {}
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Eray/IfxEray_Eray.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Eray/IfxEray_Eray.h
new file mode 100644
index 0000000..58946ef
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Eray/IfxEray_Eray.h
@@ -0,0 +1,1324 @@
+/**
+ * \file IfxEray_Eray.h
+ * \brief ERAY ERAY details
+ * \ingroup IfxLld_Eray
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Eray_Eray_Usage How to use the ERAY Interface driver?
+ * \ingroup IfxLld_Eray
+ *
+ * \section IfxLld_Eray_Eray_Preparation Preparation
+ * \subsection IfxLld_Eray_Eray_Include Include Files
+ *
+ * Include following header file into your C code:
+ *
+ * \code
+ * #include
+ * #include
+ * #include
+ * \endcode
+ *
+ *
+ *
+ * \subsection IfxLld_Eray_Eray_Defines Defines
+ * \code
+ *
+ * // Number of tested communication cycles
+ * #define NUMBER_ERAY_COMM_CYCLES 8
+ * #define NO_OF_SLOTS 2
+ * \endcode
+ *
+ * \subsection IfxLld_Eray_Eray_Variables Variables
+ *
+ * \code
+ * // global variables
+ * static IfxEray_Eray eray;
+ * volatile unsigned receivedDataCounter;
+ * uint32 receivedData[NUMBER_ERAY_COMM_CYCLES][NO_OF_SLOTS];
+ * \endcode
+ *
+ * \subsection IfxLld_Eray_Eray_Interrupt Interrupt Handler Installation
+ * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * #define IFX_ERAY_INT0_PRIO 1
+ * #define IFX_ERAY_INT1_PRIO 2
+ * #define IFX_ERAY_NDAT0_PRIO 3
+ * #define IFX_ERAY_NDAT1_PRIO 4
+ * #define IFX_ERAY_MBSC0_PRIO 5
+ * #define IFX_ERAY_MBSC1_PRIO 6
+ * \endcode
+ *
+ * Add the interrupt service routine to your C code. It has to call the ERAY interrupt handler:
+ * \code
+ * // ISR routines for interrupt handling
+ * void ERAY_irqInt0Handler();
+ * void ERAY_irqInt1Handler();
+ * void ERAY_irqNdat0Handler();
+ * void ERAY_irqNdat1Handler();
+ * void ERAY_irqMbsc0Handler();
+ * void ERAY_irqMbsc1Handler();
+ *
+ * IFX_INTERRUPT(eray0Int0ISR, 0, IFX_ERAY_INT0_PRIO)
+ * {
+ * ERAY_irqInt0Handler();
+ * }
+ * IFX_INTERRUPT(eray0Int1ISR, 0, IFX_ERAY_INT1_PRIO)
+ * {
+ * ERAY_irqInt1Handler();
+ * }
+ * IFX_INTERRUPT(eray0Ndat0ISR, 0, IFX_ERAY_NDAT0_PRIO)
+ * {
+ * ERAY_irqNdat0Handler();
+ * }
+ * IFX_INTERRUPT(eray0Ndat1ISR, 0, IFX_ERAY_NDAT1_PRIO)
+ * {
+ * ERAY_irqNdat1Handler();
+ * }
+ * IFX_INTERRUPT(eray0Mbsc0ISR, 0, IFX_ERAY_MBSC0_PRIO)
+ * {
+ * ERAY_irqMbsc0Handler();
+ * }
+ * IFX_INTERRUPT(eray0Mbsc1ISR, 0, IFX_ERAY_MBSC1_PRIO)
+ * {
+ * ERAY_irqMbsc1Handler();
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ * \code
+ * // install interrupt handler
+ * IfxCpu_Irq_installInterruptHandler(&eray0Int0ISR, IFX_ERAY_INT0_PRIO);
+ * IfxCpu_Irq_installInterruptHandler(&eray0Int1ISR, IFX_ERAY_INT1_PRIO);
+ * IfxCpu_Irq_installInterruptHandler(&eray0Ndat0ISR, IFX_ERAY_NDAT0_PRIO);
+ * IfxCpu_Irq_installInterruptHandler(&eray0Ndat1ISR, IFX_ERAY_NDAT1_PRIO);
+ * IfxCpu_Irq_installInterruptHandler(&eray0Mbsc0ISR, IFX_ERAY_MBSC0_PRIO);
+ * IfxCpu_Irq_installInterruptHandler(&eray0Mbsc1ISR, IFX_ERAY_MBSC1_PRIO);
+ *
+ * // enable all cpu0 interrupts
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Eray_Eray_Init Module Initialisation
+ *
+ * First ensure that the ERAY PLL is configured to output a 80 MHz clock for the ERAY module:
+ * \code
+ * // initialize Eray PLL
+ * //clib_ver_printf("Initialize ERAY PLL\n");
+ * {
+ * IfxScuCcu_ErayPllConfig ErayPllConfig;
+ * IfxScuCcu_initErayPllConfig(&ErayPllConfig);
+ * result |= IfxScuCcu_initErayPll(&ErayPllConfig);
+ * }
+ * \endcode
+ *
+ * Thereafter initialize the module:
+ * \code
+ * // create module config
+ * IfxEray_Eray_Config erayModuleConfig;
+ * #if TEST_ERAY1
+ * //clib_ver_printf("Initialize ERAY1\n");
+ * IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY1);
+ * #else
+ * //clib_ver_printf("Initialize ERAY0\n");
+ * IfxEray_Eray_initModuleConfig(&erayModuleConfig, &MODULE_ERAY0);
+ * #endif
+ *
+ * // ISR priorities
+ * erayModuleConfig.interrupt.int0Priority = IFX_ERAY_INT0_PRIO;
+ * erayModuleConfig.interrupt.int1Priority = IFX_ERAY_INT1_PRIO;
+ * erayModuleConfig.interrupt.ndat0Priority = IFX_ERAY_NDAT0_PRIO;
+ * erayModuleConfig.interrupt.ndat1Priority = IFX_ERAY_NDAT1_PRIO;
+ * erayModuleConfig.interrupt.mbsc0Priority = IFX_ERAY_MBSC0_PRIO;
+ * erayModuleConfig.interrupt.mbsc1Priority = IFX_ERAY_MBSC1_PRIO;
+ *
+ * // init module
+ * IfxEray_Eray_initModule( &eray, &erayModuleConfig );
+ * \endcode
+ *
+ * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
+ *
+ * \subsection IfxLld_Eray_Eray_Node_Init Node Initialisation
+ *
+ * The node initialisation can be done in the same function.
+ * \code
+ * // get ERAY node default configuration
+ * IfxEray_Eray_NodeConfig nodeConfig;
+ * IfxEray_Eray_Node_initConfig(&nodeConfig);
+ *
+ * // configuration changes for interaction with external testbench element
+ * {
+ * // only for simulation: start external ERAY node
+ * {
+ * TbeMessage reply;
+ *
+ * // start ERay Testbench Element
+ * sendMessage(MSG_ID_TESTBENCH_ERAY, CMD_ERAY_TBE_START, 0 );
+ * receiveMessageBlockingFrom(MSG_ID_TESTBENCH_ERAY, reply);
+ * }
+ *
+ * {
+ * // SUCC1
+ * IfxEray_Eray_Succ1Config *succ1 = &nodeConfig.controllerConfig.succ1Config;
+ *
+ * succ1->clockSyncErrorHalt = FALSE;
+ * }
+ *
+ * {
+ * // PRTC1
+ * IfxEray_Eray_Prtc1Control *prtc1 = &nodeConfig.controllerConfig.prtc1Control;
+ *
+ * prtc1->transmissionStartTime = 10;
+ * prtc1->collisionAvoidanceDuration = 0;
+ * prtc1->strobePosition = IfxEray_StrobePosition_5;
+ * prtc1->baudrate = IfxEray_Baudrate_10;
+ * prtc1->receiveWakeupTestDuration = 76;
+ * prtc1->transmitWakeupRepetitions = 2;
+ * }
+ *
+ * {
+ * // PRTC2
+ * IfxEray_Eray_Prtc2Control *prtc2 = &nodeConfig.controllerConfig.prtc2Control;
+ *
+ * prtc2->receiveWakeupIdleTime = 18;
+ * prtc2->receiveWakeupLowTime = 18;
+ * prtc2->transmitWakeupIdleTime = 180;
+ * prtc2->transmitWakeupLowTime = 60;
+ * }
+ *
+ * {
+ * // SUCC2
+ * IfxEray_Eray_Succ2Config *succ2 = &nodeConfig.controllerConfig.succ2Config;
+ * succ2->listenTimeOut = 2500;
+ * succ2->listenTimeOutNoise = IfxEray_ListenTimeOutNoise_16;
+ * }
+ *
+ * {
+ * // GTU
+ * IfxEray_Eray_GTUConfig *gtu = &nodeConfig.controllerConfig.gtuConfig;
+ *
+ * gtu->gtu01Config.microticksPerCycle = 3000;
+ * gtu->gtu02Config.macroticksPerCycle = 50;
+ * gtu->gtu02Config.maxSyncFrames = 15;
+ * gtu->gtu03Config.channelAMicrotickInitialOffset = 0;
+ * gtu->gtu03Config.channelBMicrotickInitialOffset = 0;
+ * gtu->gtu03Config.channelAMacrotickInitialOffset = 2;
+ * gtu->gtu03Config.channelBMacrotickInitialOffset = 2;
+ * gtu->gtu04Config.networkStartIdleTime = 0x2f;
+ * gtu->gtu04Config.correctionOffset = 0x30;
+ * gtu->gtu05Config.channelAReceptionDelay = 0x4;
+ * gtu->gtu05Config.channelBReceptionDelay = 0x4;
+ * gtu->gtu05Config.clusterDrift = 1;
+ * gtu->gtu05Config.decodingCorrection = 0x34;
+ * gtu->gtu06Config.acceptedStartupDeviation = 0x81;
+ * gtu->gtu06Config.maxDriftOffset = 0x31;
+ * gtu->gtu07Config.staticSlotLength = 0x10;
+ * gtu->gtu07Config.staticSlotsCount = 0x2;
+ * gtu->gtu08Config.dynamicSlotLength = 2;
+ * gtu->gtu08Config.dynamicSlotCount = 2;
+ * gtu->gtu09Config.idleDynamicSlots = IfxEray_IdleDynamicSlots_1; // bug: not set by IfxEray_setDynamicSlots
+ * gtu->gtu09Config.staticActionPoint = 1;
+ * gtu->gtu09Config.dynamicActionPoint = 1;
+ * gtu->gtu10Config.maxOffsetCorrection = 0xcd;
+ * gtu->gtu10Config.maxRateCorrection = 0x31;
+ * gtu->gtu11Config.externalOffsetCorrection = IfxEray_ExternalOffsetCorrection_0;
+ * gtu->gtu11Config.externalRateCorrection = IfxEray_ExternalRateCorrection_0;
+ * gtu->gtu11Config.externalOffset = IfxEray_ExternalOffset_noCorrection;
+ * gtu->gtu11Config.externalRate = IfxEray_ExternalRate_noCorrection;
+ * }
+ * }
+ *
+ * // Messages
+ * nodeConfig.messageRAMConfig.numberOfMessageBuffers = 2;
+ * nodeConfig.messageRAMConfig.firstDynamicBuffer = 0x40;
+ * nodeConfig.messageRAMConfig.fifoBufferStartIndex = 0x40;
+ *
+ * // Frame header
+ * IfxEray_Header header[2] = {
+ * // fid cyc cha chb buffer direction ppit transmission mode mbi pl dp startupfr syncfr
+ * { 1, 1, TRUE, TRUE, IfxEray_BufferDirection_transmit, TRUE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x30, TRUE, TRUE },
+ * { 2, 1, TRUE, TRUE, IfxEray_BufferDirection_receive, FALSE, IfxEray_TransmissionMode_continuous, TRUE, 4, 0x40, FALSE, FALSE },
+ * };
+ *
+ * // slot buffer
+ * IfxEray_SlotConfig slot[2] = {
+ * // header data stxrh buffNum
+ * { TRUE, TRUE, TRUE, 0 },
+ * { TRUE, FALSE, FALSE, 1 },
+ * };
+ *
+ * for(int i=0; i < 2; ++i) {
+ * nodeConfig.messageRAMConfig.header[i] = &header[i];
+ * nodeConfig.messageRAMConfig.slotControl[i] = &slot[i];
+ * nodeConfig.messageRAMConfig.data[i] = NULL_PTR;
+ * }
+ *
+ * #if TEST_ERAY1
+ * // channel A pins
+ * const IfxEray_Eray_NodeA nodeAPins = {
+ * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
+ * &IfxEray1_RXDA0_P14_8_IN, &IfxEray1_TXDA_P14_10_OUT,
+ * &IfxEray1_TXENA_P14_9_OUT
+ * };
+ *
+ * // channel B pins
+ * const IfxEray_Eray_NodeB nodeBPins = {
+ * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
+ * &IfxEray1_RXDB0_P14_7_IN, &IfxEray1_TXDB_P14_5_OUT,
+ * &IfxEray1_TXENB_P14_6_OUT
+ * };
+ * #else
+ * // channel A pins
+ * const IfxEray_Eray_NodeA nodeAPins = {
+ * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
+ * &IfxEray0_RXDA0_P14_8_IN, &IfxEray0_TXDA_P14_10_OUT,
+ * &IfxEray0_TXENA_P14_9_OUT
+ * };
+ *
+ * // channel B pins
+ * const IfxEray_Eray_NodeB nodeBPins = {
+ * IfxPort_InputMode_pullDown, IfxPort_OutputMode_pushPull,
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3, IfxPort_OutputMode_pushPull,
+ * &IfxEray0_RXDB0_P14_7_IN, &IfxEray0_TXDB_P14_5_OUT,
+ * &IfxEray0_TXENB_P14_6_OUT
+ * };
+ * #endif
+ *
+ * const IfxEray_Eray_Pins pins = { (IfxEray_Eray_NodeA *)&nodeAPins, (IfxEray_Eray_NodeB *)&nodeBPins };
+ * nodeConfig.pins = (IfxEray_Eray_Pins *)&pins;
+ *
+ * // ERAY node initialisation with supplied configuration
+ * IfxEray_Eray_Node_init(&eray, &nodeConfig);
+ *
+ * // set interrupt outputs for data and message buffers
+ * IfxEray_Eray_setNewDataInterruptDestination(&eray, 0, 0); // New Data #0 -> NDAT0
+ * IfxEray_Eray_setNewDataInterruptDestination(&eray, 1, 1); // New Data #1 -> NDAT1
+ * IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 0, 0); // Message Buffer #0 -> MBSC0
+ * IfxEray_Eray_setMessageBufferInterruptDestination(&eray, 1, 1); // Message Buffer #1 -> MBSC1
+ *
+ * //clib_ver_printf("Send wakeup pattern\n");
+ *
+ * // send wakeup pattern on default configured channel ( IfxEray_Channel_a )
+ * IfxEray_PocState pocState;
+ * do {
+ * pocState = IfxEray_Eray_getPocState( &eray );
+ * if ( pocState != IfxEray_PocState_wakeupListen ) {
+ * while ( !IfxEray_Eray_changePocState( &eray, IfxEray_PocCommand_wakeup ));
+ * }
+ * } while ( pocState != IfxEray_PocState_wakeupListen );
+ *
+ * // allow node to cold-start and wait until cold-start is successful
+ * while( !IfxEray_Eray_allowColdStart(&eray) );
+ *
+ * // start the communication in cluster and wait until communication is successfull
+ * while( !IfxEray_Eray_startCommunication(&eray) );
+ *
+ * // wait until communication Controller enters NORMAL_ACTIVE or NORMAL_PASSIVE state, exit if communication Controller enters HALT state.
+ * do {
+ * pocState = IfxEray_Eray_getPocState( &eray );
+ * // if communication Controller enters HALT state, break the loop.
+ * if( pocState == IfxEray_PocState_halt) {
+ * break;
+ * }
+ * } while( !((pocState == IfxEray_PocState_normalActive) || (pocState == IfxEray_PocState_normalPassive)) );
+ *
+ * // enter ALL_SLOTS mode when Communication Controller is in NORMAL_ACTIVE or NORMAL_PASSIVE state only.
+ * if ( pocState == IfxEray_PocState_normalActive || pocState == IfxEray_PocState_normalPassive ) {
+ * while ( !IfxEray_Eray_setPocAllSlots(&eray) );
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Eray_Eray_TxRx Transactions
+ *
+ * \code
+ * unsigned prevReceivedDataCounter = 0;
+ * while( 1 ) {
+ * if( receivedDataCounter != prevReceivedDataCounter ) {
+ * prevReceivedDataCounter = receivedDataCounter;
+ * //clib_ver_printf("Received %d packets", receivedDataCounter);
+ *
+ * if( receivedDataCounter >= NUMBER_ERAY_COMM_CYCLES )
+ * break;
+ * }
+ * };
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Eray_Eray_ISR Interrupt Service Handlers
+ *
+ * The ISR has to be implemented in the application. Following templates can be used to react on the events:
+ *
+ * \code
+ * void ERAY_irqInt0Handler()
+ * {
+ * //clib_ver_note(1); // for debugging in simulation: notify Int0
+ *
+ * Ifx_ERAY_EIR ErrIntStat = IfxEray_Eray_getErrorInterrupts( &eray );
+ * Ifx_ERAY_SIR StatusIntStat = IfxEray_Eray_getStatusInterrupts( &eray );
+ *
+ * if(StatusIntStat.B.SDS)
+ * {
+ * // SDS must be cleared for getting the next interrupt
+ * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sds );
+ * }
+ * if(StatusIntStat.B.CYCS)
+ * {
+ * // CYCS must be cleared for getting the next interrupt
+ * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_cycs );
+ * }
+ * if(StatusIntStat.B.SUCS)
+ * {
+ * // SUCS must be cleared for getting the next interrupt
+ * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_sucs );
+ * }
+ * if(StatusIntStat.B.TIBC)
+ * {
+ * // TIBC must be cleared for getting the next interrupt
+ * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tibc );
+ * }
+ * if(ErrIntStat.B.MHF)
+ * {
+ * // clear flag MHF
+ * IfxEray_Eray_clearErrorFlag( &eray, IfxEray_ClearErrorFlag_mhf );
+ * }
+ * }
+ *
+ * void ERAY_irqInt1Handler()
+ * {
+ * //clib_ver_note(2); // for debugging in simulation: notify Int1
+ *
+ * // TOBC must be cleared for getting the next interrupt
+ * IfxEray_Eray_clearStatusFlag( &eray, IfxEray_ClearStatusFlag_tobc );
+ * }
+ *
+ * void ERAY_irqNdat0Handler()
+ * {
+ * //clib_ver_note(3); // for debugging in simulation: notify Ndat0
+ * }
+ *
+ * void ERAY_irqNdat1Handler()
+ * {
+ * //clib_ver_note(4); // for debugging in simulation: notify Ndat1
+ *
+ * // message received in slot1 buffer?
+ * if( IfxEray_Eray_getNewDataInterruptStatus(&eray, 1) == 1 )
+ * {
+ * // read data
+ * uint32 data[2];
+ *
+ * {
+ * IfxEray_Eray_ReceiveControl config;
+ * config.headerReceived = TRUE;
+ * config.dataReceived = TRUE;
+ * config.receiveRequested = TRUE;
+ * config.swapRequested = TRUE;
+ * config.bufferIndex = 1;
+ *
+ * IfxEray_Eray_receiveFrame(&eray, &config);
+ * IfxEray_Eray_readData(&eray, data, 2*2);
+ * }
+ *
+ * // display received data (Here received data has to be displayed)
+ * //clib_ver_data(data[0]);
+ * //clib_ver_data(data[1]);
+ *
+ * // store received data
+ * if( receivedDataCounter < NUMBER_ERAY_COMM_CYCLES ) {
+ * receivedData[receivedDataCounter][0] = data[0];
+ * receivedData[receivedDataCounter][1] = data[1];
+ * }
+ * ++receivedDataCounter;
+ *
+ * // put some new data into slot0
+ * ++data[0];
+ * ++data[1];
+ *
+ * {
+ * IfxEray_Eray_TransmitControl config;
+ * config.headerTransfered = FALSE;
+ * config.dataTransfered = TRUE;
+ * config.transferRequested = TRUE;
+ * config.bufferIndex = 0;
+ *
+ * IfxEray_Eray_writeData(&eray, data, 2*2);
+ * IfxEray_Eray_transmitFrame(&eray, &config);
+ * }
+ * }
+ * }
+ *
+ * void ERAY_irqMbsc0Handler()
+ * {
+ * //clib_ver_note(5); // for debugging in simulation: notify Mbsc0
+ * }
+ *
+ * void ERAY_irqMbsc1Handler()
+ * {
+ * //clib_ver_note(6); // for debugging in simulation: notify Mbsc1
+ * }
+ * \endcode
+ *
+ * \defgroup IfxLld_Eray_Eray ERAY
+ * \ingroup IfxLld_Eray
+ * \defgroup IfxLld_Eray_Eray_Structures Data Structures
+ * \ingroup IfxLld_Eray_Eray
+ * \defgroup IfxLld_Eray_Eray_Module Module Initialisation Functions
+ * \ingroup IfxLld_Eray_Eray
+ * \defgroup IfxLld_Eray_Eray_Node Node Initialisation Functions
+ * \ingroup IfxLld_Eray_Eray
+ * \defgroup IfxLld_Eray_Eray_Operative Operative Functions
+ * \ingroup IfxLld_Eray_Eray
+ * \defgroup IfxLld_Eray_Eray_Status Status Functions
+ * \ingroup IfxLld_Eray_Eray
+ * \defgroup IfxLld_Eray_Eray_Interrupt Interrupt Functions
+ * \ingroup IfxLld_Eray_Eray
+ */
+
+#ifndef IFXERAY_ERAY_H
+#define IFXERAY_ERAY_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Eray/Std/IfxEray.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Scu/Std/IfxScuCcu.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Eray_Eray_Structures
+ * \{ */
+/** \brief GTU01 configuration.
+ */
+typedef struct
+{
+ uint32 microticksPerCycle; /**< \brief Duration of the communication cycle in Microticks. */
+} IfxEray_Eray_Gtu01Config;
+
+/** \brief GTU02 configuration.
+ */
+typedef struct
+{
+ uint16 macroticksPerCycle; /**< \brief Duration of the communication cycle in Macroticks. */
+ uint8 maxSyncFrames; /**< \brief Maximum number of sync frames in a cluster. */
+} IfxEray_Eray_Gtu02Config;
+
+/** \brief GTU03 configuration.
+ */
+typedef struct
+{
+ uint8 channelAMicrotickInitialOffset; /**< \brief difference between adjacent time reference points on channel A in microticks. */
+ uint8 channelBMicrotickInitialOffset; /**< \brief difference between adjacent time reference points on channel B in microticks. */
+ uint8 channelAMacrotickInitialOffset; /**< \brief difference between two adjacent static slots on channel A in macroticks. */
+ uint8 channelBMacrotickInitialOffset; /**< \brief difference between two adjacent static slots on channel B in macroticks. */
+} IfxEray_Eray_Gtu03Config;
+
+/** \brief GTU04 configuration.
+ */
+typedef struct
+{
+ uint16 networkStartIdleTime; /**< \brief starting point of Network Idle Time Phase. */
+ uint16 correctionOffset; /**< \brief offset correction start point. */
+} IfxEray_Eray_Gtu04Config;
+
+/** \brief GTU05 configuration.
+ */
+typedef struct
+{
+ uint8 channelAReceptionDelay; /**< \brief reception delay on channel A. */
+ uint8 channelBReceptionDelay; /**< \brief reception delay on channel B. */
+ uint8 clusterDrift; /**< \brief cluster drift damping value used in clock synchronization. */
+ uint8 decodingCorrection; /**< \brief decoding correction to determine the primary time reference point. */
+} IfxEray_Eray_Gtu05Config;
+
+/** \brief GTU06 configuration.
+ */
+typedef struct
+{
+ uint16 acceptedStartupDeviation; /**< \brief expanded range of measured deviation for startup Frames during integration. */
+ uint16 maxDriftOffset; /**< \brief maximum drift offset between two nodes. */
+} IfxEray_Eray_Gtu06Config;
+
+/** \brief GTU07 configuration.
+ */
+typedef struct
+{
+ uint16 staticSlotLength; /**< \brief duration of static slot in macroticks. */
+ uint16 staticSlotsCount; /**< \brief number of static slots in a communication cycle. */
+} IfxEray_Eray_Gtu07Config;
+
+/** \brief GTU08 configuration.
+ */
+typedef struct
+{
+ uint8 dynamicSlotLength; /**< \brief duration of dynamic slot in macroticks. */
+ uint16 dynamicSlotCount; /**< \brief number of dynamic slots in a communication cycle. */
+} IfxEray_Eray_Gtu08Config;
+
+/** \brief GTU09 configuration.
+ */
+typedef struct
+{
+ uint8 staticActionPoint; /**< \brief static slots and symbol window action point. */
+ uint8 dynamicActionPoint; /**< \brief dynamic slots action point. */
+ IfxEray_IdleDynamicSlots idleDynamicSlots; /**< \brief duration of dynamic slot idle phase. */
+} IfxEray_Eray_Gtu09Config;
+
+/** \brief GTU10 configuration.
+ */
+typedef struct
+{
+ uint16 maxOffsetCorrection; /**< \brief maximum offset correction to be applied by the internal clock synchronization algorithm. */
+ uint16 maxRateCorrection; /**< \brief maximum rate correction to be applied by the internal clock synchronization algorithm. */
+} IfxEray_Eray_Gtu10Config;
+
+/** \brief GTU11 configuration.
+ */
+typedef struct
+{
+ IfxEray_ExternalOffsetCorrection externalOffsetCorrection; /**< \brief External clock offset correction value. */
+ IfxEray_ExternalRateCorrection externalRateCorrection; /**< \brief External clock rate correction value. */
+ IfxEray_ExternalOffset externalOffset; /**< \brief External offset correction control. */
+ IfxEray_ExternalRate externalRate; /**< \brief External rate correction control. */
+} IfxEray_Eray_Gtu11Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Structures
+ * \{ */
+/** \brief Gloabl Timing Unit configuration structure.
+ */
+typedef struct
+{
+ IfxEray_Eray_Gtu01Config gtu01Config; /**< \brief GTU01 configuration. */
+ IfxEray_Eray_Gtu02Config gtu02Config; /**< \brief GTU02 configuration. */
+ IfxEray_Eray_Gtu03Config gtu03Config; /**< \brief GTU03 configuration. */
+ IfxEray_Eray_Gtu04Config gtu04Config; /**< \brief GTU04 configuration. */
+ IfxEray_Eray_Gtu05Config gtu05Config; /**< \brief GTU05 configuration. */
+ IfxEray_Eray_Gtu06Config gtu06Config; /**< \brief GTU06 configuration. */
+ IfxEray_Eray_Gtu07Config gtu07Config; /**< \brief GTU07 configuration. */
+ IfxEray_Eray_Gtu08Config gtu08Config; /**< \brief GTU08 configuration. */
+ IfxEray_Eray_Gtu09Config gtu09Config; /**< \brief GTU09 configuration. */
+ IfxEray_Eray_Gtu10Config gtu10Config; /**< \brief GTU10 configuration. */
+ IfxEray_Eray_Gtu11Config gtu11Config; /**< \brief GTU11 configuration. */
+} IfxEray_Eray_GTUConfig;
+
+/** \brief Pins configuration structure for Node A.
+ */
+typedef struct
+{
+ IfxPort_InputMode rxInMode; /**< \brief the RX pin input mode which should be configured */
+ IfxPort_OutputMode txOutMode; /**< \brief the TX pin output mode which should be configured. */
+ IfxPort_PadDriver pinDriver; /**< \brief the pad driver mode which should be configured. */
+ IfxPort_OutputMode txEnOutMode; /**< \brief the TXEN pin output mode which should be configured. */
+ IFX_CONST IfxEray_Rxd_In *rxIn; /**< \brief the RX Pin which should be configured. */
+ IFX_CONST IfxEray_Txd_Out *txOut; /**< \brief the TX Pin which should be configured. */
+ IFX_CONST IfxEray_Txen_Out *txEnOut; /**< \brief the TXEN Pin which should be configured. */
+} IfxEray_Eray_NodeA;
+
+/** \brief Pins configuration structure for Node B.
+ */
+typedef struct
+{
+ IfxPort_InputMode rxInMode; /**< \brief the RX pin input mode which should be configured */
+ IfxPort_OutputMode txOutMode; /**< \brief the TX pin output mode which should be configured. */
+ IfxPort_PadDriver pinDriver; /**< \brief the pad driver mode which should be configured. */
+ IfxPort_OutputMode txEnOutMode; /**< \brief the TXEN pin output mode which should be configured. */
+ IFX_CONST IfxEray_Rxd_In *rxIn; /**< \brief the RX Pin which should be configured. */
+ IFX_CONST IfxEray_Txd_Out *txOut; /**< \brief the TX Pin which should be configured. */
+ IFX_CONST IfxEray_Txen_Out *txEnOut; /**< \brief the TXEN Pin which should be configured. */
+} IfxEray_Eray_NodeB;
+
+/** \brief Protocol operation control properties.
+ */
+typedef struct
+{
+ uint8 collisionAvoidanceDuration; /**< \brief accepted duration of collision avoidance symbol. */
+ IfxEray_StrobePosition strobePosition; /**< \brief sample count value for strobing. */
+ IfxEray_Baudrate baudrate; /**< \brief baud rate on the flexray bus. */
+ uint8 receiveWakeupTestDuration; /**< \brief duration of received wakeup pattern in bit times. */
+ uint8 transmitWakeupRepetitions; /**< \brief duration of transmitted wakeup pattern in bit times. */
+ uint16 transmissionStartTime; /**< \brief duration of transmission start time. */
+} IfxEray_Eray_Prtc1Control;
+
+/** \brief Wakeup symbol control properties.
+ */
+typedef struct
+{
+ uint8 receiveWakeupIdleTime; /**< \brief duration of received wakeup symbol idle phase. */
+ uint8 receiveWakeupLowTime; /**< \brief duration of received wakeup symbol low phase. */
+ uint8 transmitWakeupIdleTime; /**< \brief duration of transmit wakeup symbol idle phase. */
+ uint8 transmitWakeupLowTime; /**< \brief duration of transmit wakeup symbol low phase. */
+} IfxEray_Eray_Prtc2Control;
+
+/** \brief communication controller control properties.
+ */
+typedef struct
+{
+ boolean startupFrameTransmitted; /**< \brief whether the key slot is used to transmit startup Frames. */
+ boolean syncFrameTransmitted; /**< \brief whether the key slot is used to transmit SYNC Frames. */
+ uint8 maxColdStartAttempts; /**< \brief maximum number of attempts that a cold starting node is permitted. */
+ uint8 numberOfCyclePairsForActive; /**< \brief number of even / odd cycle pairs that must have valid clock correction terms. */
+ IfxEray_WakeupChannel wakeupPatternChannel; /**< \brief Wakeup pattern carry channel */
+ IfxEray_TransmissionSlotMode transmissionSlotMode; /**< \brief Initial transmission mode. */
+ boolean clockSyncErrorHalt; /**< \brief transition to HALT state due to a clock synchronization error. */
+ boolean channelASymbolTransmitted; /**< \brief selects channel A for MTS symbol transmission. */
+ boolean channelBSymbolTransmitted; /**< \brief selects channel B for MTS symbol transmission */
+ boolean channelAConnectedNode; /**< \brief whether the node is connected to channel A. */
+ boolean channelBConnectedNode; /**< \brief whether the node is connected to channel B. */
+} IfxEray_Eray_Succ1Config;
+
+/** \brief Communication listen timeout properties.
+ */
+typedef struct
+{
+ uint32 listenTimeOut; /**< \brief wakeup or startup listen timeout in microticks. */
+ IfxEray_ListenTimeOutNoise listenTimeOutNoise; /**< \brief upper limit for startup and wakeup listen timeout in the presence of noise. */
+} IfxEray_Eray_Succ2Config;
+
+/** \brief Clock correction fail properties.
+ */
+typedef struct
+{
+ uint8 clockCorrectionCyclesPassive; /**< \brief maximum number of cycles missing clock correction lead active to passive state. */
+ uint8 clockCorrectionCyclesHalt; /**< \brief maximum number of cycles missing clock correctionlead to active or passive to halt. */
+} IfxEray_Eray_Succ3Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Structures
+ * \{ */
+/** \brief Communication Controller configuration structure.
+ */
+typedef struct
+{
+ uint32 networkVectorLength; /**< \brief length of network management vector. */
+ uint8 staticFramepayload; /**< \brief payload length of static frame in double bytes. */
+ uint8 latestTransmissionStart; /**< \brief number of dynamic slots before inhibit frame transmission in dynamic segment. */
+ IfxEray_Eray_GTUConfig gtuConfig; /**< \brief gloabl timing unit configuration structure. */
+ IfxEray_Eray_Succ1Config succ1Config; /**< \brief communication controller control properties. */
+ IfxEray_Eray_Succ2Config succ2Config; /**< \brief communication listen timeout properties. */
+ IfxEray_Eray_Succ3Config succ3Config; /**< \brief clock correction fail properties. */
+ IfxEray_Eray_Prtc1Control prtc1Control; /**< \brief protocol operation control properties. */
+ IfxEray_Eray_Prtc2Control prtc2Control; /**< \brief wakeup symbol control properties. */
+} IfxEray_Eray_ControllerConfig;
+
+/** \brief Interrupt control properties.
+ */
+typedef struct
+{
+ uint16 int0Priority; /**< \brief the interrupt line 0 priority. Always 1 since all interrupts are handled at a time. */
+ uint16 int1Priority; /**< \brief the interrupt line 1 priority. Always 1 since all interrupts are handled at a time. */
+ uint16 tint0Priority; /**< \brief the timer interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
+ uint16 tint1Priority; /**< \brief the timer interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
+ uint16 ndat0Priority; /**< \brief the new data interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
+ uint16 ndat1Priority; /**< \brief the new data interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
+ uint16 mbsc0Priority; /**< \brief the message buffer status changed interrupt 0 priority. Always 1 since all interrupts are handled at a time. */
+ uint16 mbsc1Priority; /**< \brief the message buffer status changed interrupt 1 priority. Always 1 since all interrupts are handled at a time. */
+ uint16 ibusyPriority; /**< \brief the inputput buffer interrupt priority. Always 1 since all interrupts are handled at a time. */
+ uint16 obusyPriority; /**< \brief the output buffer interrupt priority. Always 1 since all interrupts are handled at a time. */
+ IfxSrc_Tos int0IsrProvider; /**< \brief the interrupt line 0 service provider. CPU or DMA. */
+ IfxSrc_Tos int1IsrProvider; /**< \brief the interrupt line 1 service provider. CPU or DMA. */
+ IfxSrc_Tos tint0IsrProvider; /**< \brief the timer interrupt line 0 service provider. CPU or DMA. */
+ IfxSrc_Tos tint1IsrProvider; /**< \brief the timer interrupt line 1 service provider. CPU or DMA. */
+ IfxSrc_Tos ndat0IsrProvider; /**< \brief the new data interrupt 0 service provider. CPU or DMA. */
+ IfxSrc_Tos ndat1IsrProvider; /**< \brief the new data interrupt 1 service provider. CPU or DMA. */
+ IfxSrc_Tos mbsc0IsrProvider; /**< \brief the message buffer status changed interrupt 0 service provider. CPU or DMA. */
+ IfxSrc_Tos mbsc1IsrProvider; /**< \brief the message buffer status changed interrupt 1 service provider. CPU or DMA. */
+ IfxSrc_Tos ibusyIsrProvider; /**< \brief the input buffer interrupt service provider. CPU or DMA. */
+ IfxSrc_Tos obusyIsrProvider; /**< \brief the output buffer interrupt service provider. CPU or DMA. */
+} IfxEray_Eray_Interrupt;
+
+/** \brief Message RAM configuration structure.
+ */
+typedef struct
+{
+ uint8 firstDynamicBuffer; /**< \brief first dynamic buffer index. */
+ uint8 numberOfMessageBuffers; /**< \brief last configured buffer. */
+ uint32 fifoBufferStartIndex; /**< \brief message buffers assigned FIFO. */
+ uint8 fifoDepth; /**< \brief fifo critical level. */
+ uint16 frameIdFilter; /**< \brief Frame ID used for rejection filtering. */
+ IfxEray_ReceiveChannel receiveChannel; /**< \brief FIFO receive channel. */
+ uint16 rejectedFrameId; /**< \brief frame ID to be rejected by the FIFO. */
+ uint8 filteredCycleNumber; /**< \brief the cycle set to which Frame ID and channel rejection filter are applied. */
+ boolean staticFifoDisabled; /**< \brief fifo is not used in static segment. */
+ boolean fifoNullFramesRejected; /**< \brief whether null frames stored in fifo or not. */
+ boolean bufferReconfigEnabled; /**< \brief whether reconfiguration of message buffers is enabled or not. */
+ boolean fifoConfigured; /**< \brief Whether receive FIFO configured or not. */
+ IfxEray_Header *header[128]; /**< \brief Header section of message buffer. */
+ IfxEray_SlotConfig *slotControl[128]; /**< \brief Transmit control properties. */
+ uint32 *data[128]; /**< \brief data section of message buffer. */
+} IfxEray_Eray_MessageRAMConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Node
+ * \{ */
+/** \brief Pins configuration structure.
+ */
+typedef struct
+{
+ IFX_CONST IfxEray_Eray_NodeA *nodeAPins; /**< \brief Pins configuration structure for Node A. */
+ IFX_CONST IfxEray_Eray_NodeB *nodeBPins; /**< \brief Pins configuration structure for Node B. */
+} IfxEray_Eray_Pins;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Structures
+ * \{ */
+/** \brief ERAY Module handle.
+ */
+typedef struct
+{
+ Ifx_ERAY *eray; /**< \brief pointer to ERAY module registers. */
+} IfxEray_Eray;
+
+/** \brief Reconfigurable buffer structure.
+ */
+typedef struct
+{
+ IfxEray_Header *header; /**< \brief header of a reconfigurable buffer. */
+ uint32 data[64]; /**< \brief data section of a reconfigurable buffer. */
+ IfxEray_SlotConfig *slotControl; /**< \brief message buffer configuration in message RAM. */
+} IfxEray_Eray_BufferReconfig;
+
+/** \brief Module configuration structure
+ */
+typedef struct
+{
+ Ifx_ERAY *module; /**< \brief pointer to ERAY module registers. */
+ IfxEray_Eray_Interrupt interrupt; /**< \brief Interrupt control properties. */
+} IfxEray_Eray_Config;
+
+/** \brief Node configuration structure.
+ */
+typedef struct
+{
+ IfxEray_Eray_MessageRAMConfig messageRAMConfig; /**< \brief Message RAM configuration structure. */
+ IfxEray_Eray_ControllerConfig controllerConfig; /**< \brief Communication Controller configuration structure. */
+ IFX_CONST IfxEray_Eray_Pins *pins; /**< \brief Pins configuration structure. */
+} IfxEray_Eray_NodeConfig;
+
+/** \brief Receive control properties structure.
+ */
+typedef struct
+{
+ boolean headerReceived; /**< \brief whether header selected for transfer from Message RAM to Output Buffer or not. */
+ boolean dataReceived; /**< \brief whether data selected for transfer from Message RAM to Output Buffer or not. */
+ boolean swapRequested; /**< \brief whether output buffer shadow and output buffer host are swapped or not. */
+ boolean receiveRequested; /**< \brief */
+ uint8 bufferIndex; /**< \brief buffer index in the Message RAM. */
+} IfxEray_Eray_ReceiveControl;
+
+/** \brief Received Frame.
+ */
+typedef struct
+{
+ IfxEray_ReceivedHeader header; /**< \brief received header in a frame. */
+ uint32 data[64]; /**< \brief received data in a frame. */
+} IfxEray_Eray_ReceivedFrame;
+
+/** \brief Transfer control in a slot.
+ */
+typedef struct
+{
+ boolean headerTransfered; /**< \brief whether header section of frame is transfered or not. */
+ boolean dataTransfered; /**< \brief whether data section of message buffer is transfered or not. */
+ boolean transferRequested; /**< \brief whether frame in a slot is transfered or not. */
+ uint8 bufferIndex; /**< \brief buffer index which gives slot for transfers. */
+} IfxEray_Eray_TransmitControl;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief De-initialises the ERAY module.
+ * \param eray pointer to module handle.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the ERAY module with supplied configuration.
+ * \param eray pointer to ERAY Module handle.
+ * \param config pointer to module configuration structure.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_EXTERN void IfxEray_Eray_initModule(IfxEray_Eray *eray, const IfxEray_Eray_Config *config);
+
+/** \brief Inialises the default module configuration buffer.
+ * \param config pointer to module configuration structure.
+ * \param eray pointer ERAY module registers.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_EXTERN void IfxEray_Eray_initModuleConfig(IfxEray_Eray_Config *config, Ifx_ERAY *eray);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Node
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the Node with supplied configuration.
+ * \param eray pointer to ERAY Module handle.
+ * \param config pointer to node configuration structure.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_EXTERN void IfxEray_Eray_Node_init(IfxEray_Eray *eray, const IfxEray_Eray_NodeConfig *config);
+
+/** \brief Initialises the default node configuration buffer.
+ * \param config pointer to node configuration structure.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_EXTERN void IfxEray_Eray_Node_initConfig(IfxEray_Eray_NodeConfig *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Allows node to enter the cold startup state.
+ * \param eray pointer to ERAY Module handle.
+ * \return TRUE if cold start successful otherwise FALSE.
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray);
+
+/** \brief Reconfiguring the buffer or changing the slot.
+ * \param eray pointer to module handle.
+ * \param reconfigBuffer pointer reconfigurable buffer structure.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer);
+
+/** \brief Changes the POC state and return status.
+ * \param eray pointer to module handle.
+ * \param PocCommand POC command to change state.
+ * \return TRUE if command accepted.
+ */
+IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand);
+
+/** \brief Reads the received data from output registers.
+ * \param eray pointer to module handle.
+ * \param data pointer to received data buffer.
+ * \param payloadLength payload length received in a frame.
+ * \return None
+ */
+IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength);
+
+/** \brief reads the frame received in a buffer.
+ * \param eray pointer to module handle.
+ * \param frame received frame in a buffer.
+ * \param maxPayloadLength maximum payload length received in a frame.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength);
+
+/** \brief Sets the Controller state to ALL Slots mode.
+ * \param eray pointer to module handle.
+ * \return TRUE if All slots mode is successful otherwise FALSE.
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray);
+
+/** \brief Runs the communication controller.
+ * \param eray pointer to ERAY Module handle.
+ * \return TRUE if communication started otherwise FALSE.
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray);
+
+/** \brief Wakeups the channel in a cluster.
+ * \param eray pointer to ERAY Module handle.
+ * \param channel wakeup channel Id.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel);
+
+/** \brief Wakeups the node in a cluster.
+ * \param eray pointer to ERAY Module handle.
+ * \return TRUE if cluster is wakeup otherwise FALSE.
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray);
+
+/** \brief Writes data section of a frame to input data registers.
+ * \param eray pointer to module handle.
+ * \param data data section in frame.
+ * \param payloadLength payload length configured for slot buffer.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Transfers frame from fifo in message RAM to Output buffer.
+ * \param eray pointer to ERAY Module handle.
+ * \param config pointer to receive control structure.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_EXTERN void IfxEray_Eray_receiveFifoFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config);
+
+/** \brief Transfers header and data from message buffer to output buffer.
+ * \param eray pointer to ERAY Module handle.
+ * \param config pointer to receive control structure.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_EXTERN void IfxEray_Eray_receiveFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceiveControl *config);
+
+/** \brief Transfers the frame in given slot.
+ * \param eray pointer to module handle.
+ * \param transmitControl transmits frame in a given slot.
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_EXTERN void IfxEray_Eray_transmitFrame(IfxEray_Eray *eray, IfxEray_Eray_TransmitControl *transmitControl);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Status
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the current node controller POC state.
+ * \param eray pointer to module handle.
+ * \return current POC state.
+ */
+IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray);
+
+/** \brief Gets the received wakeup pattern channel.
+ * \param eray pointer to module handle.
+ * \return received wakeup pattern channel.
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Eray_Interrupt
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief clears the error interrupt flag requested.
+ * \param eray pointer to module handle.
+ * \param errorFlag error flag to be cleared.
+ * \return None
+ */
+IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag);
+
+/** \brief Clears the status interrupt flag requested.
+ * \param eray pointer to module handle.
+ * \param statusFlag status flag to be cleared.
+ * \return None
+ */
+IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag);
+
+/** \brief Gets the error interrupt status.
+ * \param eray pointer to module handle.
+ * \return error interrupt status.
+ */
+IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray);
+
+/** \brief Gets the message buffer interrupt status.
+ * \param eray pointer to module handle.
+ * \param messageBuffer message buffer to which interrupt status be checked.
+ * \return message buffer interrupt status.
+ */
+IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer);
+
+/** \brief Gets the new data interrupt buffers status.
+ * \param eray pointer to module handle.
+ * \param ndat ndat buffer to which interrupt status be checked.
+ * \return ndat buffer interrupt status.
+ */
+IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat);
+
+/** \brief Gets the node status interrupts.
+ * \param eray pointer to module handle.
+ * \return node status interrupts.
+ */
+IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray);
+
+/** \brief Enables the message buffer interrupt line.
+ * \param eray pointer to module handle.
+ * \param messageBuffer message buffer interrupt which should be configured
+ * \param messageBufferDestination selects MBSC0 or MBSC1 interrupt output
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination);
+
+/** \brief Enables the NDAT buffer interrupt line.
+ * \param eray pointer to module handle.
+ * \param ndat message buffer number configured to which ndat interrupt line to be set.
+ * \param ndatDestination selects NDAT0 or NDAT1 interrupt output
+ * \return None
+ *
+ * For usage exapmle see : \ref IfxLld_Eray_Eray_Usage
+ *
+ */
+IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE boolean IfxEray_Eray_allowColdStart(IfxEray_Eray *eray)
+{
+ return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_coldStart);
+}
+
+
+IFX_INLINE void IfxEray_Eray_bufferReconfig(IfxEray_Eray *eray, IfxEray_Eray_BufferReconfig *reconfigBuffer)
+{
+ IfxEray_setSlot(eray->eray, reconfigBuffer->header, reconfigBuffer->data, reconfigBuffer->slotControl);
+}
+
+
+IFX_INLINE boolean IfxEray_Eray_changePocState(IfxEray_Eray *eray, IfxEray_PocCommand PocCommand)
+{
+ boolean status = IfxEray_changePocState(eray->eray, PocCommand);
+ return status;
+}
+
+
+IFX_INLINE void IfxEray_Eray_clearErrorFlag(IfxEray_Eray *eray, IfxEray_ClearErrorFlag errorFlag)
+{
+ IfxEray_clearErrorFlag(eray->eray, errorFlag);
+}
+
+
+IFX_INLINE void IfxEray_Eray_clearStatusFlag(IfxEray_Eray *eray, IfxEray_ClearStatusFlag statusFlag)
+{
+ IfxEray_clearStatusFlag(eray->eray, statusFlag);
+}
+
+
+IFX_INLINE void IfxEray_Eray_deInitModule(IfxEray_Eray *eray)
+{
+ //resets the kernel
+ IfxEray_resetModule(eray->eray);
+}
+
+
+IFX_INLINE Ifx_ERAY_EIR IfxEray_Eray_getErrorInterrupts(IfxEray_Eray *eray)
+{
+ Ifx_ERAY_EIR interruptFlags;
+ interruptFlags = IfxEray_getErrorInterrupts(eray->eray);
+ return interruptFlags;
+}
+
+
+IFX_INLINE uint8 IfxEray_Eray_getMessageBufferInterruptStatus(IfxEray_Eray *eray, uint8 messageBuffer)
+{
+ uint8 messageBufferInterrupt = IfxEray_getMessageBufferInterruptStatus(eray->eray, messageBuffer);
+ return messageBufferInterrupt;
+}
+
+
+IFX_INLINE uint8 IfxEray_Eray_getNewDataInterruptStatus(IfxEray_Eray *eray, uint8 ndat)
+{
+ uint8 ndatInterrupt = IfxEray_getNewDataInterruptStatus(eray->eray, ndat);
+ return ndatInterrupt;
+}
+
+
+IFX_INLINE IfxEray_PocState IfxEray_Eray_getPocState(IfxEray_Eray *eray)
+{
+ return IfxEray_getPocState(eray->eray);
+}
+
+
+IFX_INLINE Ifx_ERAY_SIR IfxEray_Eray_getStatusInterrupts(IfxEray_Eray *eray)
+{
+ Ifx_ERAY_SIR statusInterrupts = IfxEray_getStatusInterrupts(eray->eray);
+ return statusInterrupts;
+}
+
+
+IFX_INLINE IfxEray_WakeupChannel IfxEray_Eray_getWakeupPatternReceivedChannel(IfxEray_Eray *eray)
+{
+ IfxEray_WakeupChannel rxWakeupChannel;
+ rxWakeupChannel = IfxEray_getWakeupPatternReceivedChannel(eray->eray);
+
+ return rxWakeupChannel;
+}
+
+
+IFX_INLINE void IfxEray_Eray_readData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
+{
+ IfxEray_readData(eray->eray, data, payloadLength);
+}
+
+
+IFX_INLINE void IfxEray_Eray_readFrame(IfxEray_Eray *eray, IfxEray_Eray_ReceivedFrame *frame, Ifx_SizeT maxPayloadLength)
+{
+ IfxEray_readFrame(eray->eray, &(frame->header), frame->data, maxPayloadLength);
+}
+
+
+IFX_INLINE void IfxEray_Eray_setMessageBufferInterruptDestination(IfxEray_Eray *eray, uint8 messageBuffer, uint8 messageBufferDestination)
+{
+ IfxEray_setMessageBufferInterruptDestination(eray->eray, messageBuffer, messageBufferDestination);
+}
+
+
+IFX_INLINE void IfxEray_Eray_setNewDataInterruptDestination(IfxEray_Eray *eray, uint8 ndat, uint8 ndatDestination)
+{
+ IfxEray_setNewDataInterruptDestination(eray->eray, ndat, ndatDestination);
+}
+
+
+IFX_INLINE boolean IfxEray_Eray_setPocAllSlots(IfxEray_Eray *eray)
+{
+ return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_allSlots);
+}
+
+
+IFX_INLINE boolean IfxEray_Eray_startCommunication(IfxEray_Eray *eray)
+{
+ return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_run);
+}
+
+
+IFX_INLINE void IfxEray_Eray_wakeUpChannel(IfxEray_Eray *eray, IfxEray_Channel channel)
+{
+ Ifx_ERAY *eraySFR = eray->eray;
+ boolean result = IfxEray_changePocState(eraySFR, IfxEray_PocCommand_config);
+
+ if (result == TRUE)
+ {
+ eraySFR->SUCC1.B.WUCS = channel;
+ IfxEray_setPocReady(eray->eray);
+ }
+}
+
+
+IFX_INLINE boolean IfxEray_Eray_wakeUpCluster(IfxEray_Eray *eray)
+{
+ return IfxEray_changePocState(eray->eray, IfxEray_PocCommand_wakeup);
+}
+
+
+IFX_INLINE void IfxEray_Eray_writeData(IfxEray_Eray *eray, uint32 *data, uint8 payloadLength)
+{
+ IfxEray_writeData(eray->eray, data, payloadLength);
+}
+
+
+#endif /* IFXERAY_ERAY_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Std/IfxEray.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Std/IfxEray.c
new file mode 100644
index 0000000..71081ff
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Std/IfxEray.c
@@ -0,0 +1,363 @@
+/**
+ * \file IfxEray.c
+ * \brief ERAY basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxEray.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator)
+{
+ uint32 headerValue = ((syncFrameIndicator & 0x1) << 19) | ((startupFrameIndicator & 0x1) << 18) | ((frameId & 0x7FF) << 7) | (payloadLength &
+ 0x7F);
+
+ uint32 crcInit = 0x1A;
+ uint32 length = 20;
+ uint32 crcNext;
+ uint32 crcPoly = 0x385;
+ uint32 crcRegX = crcInit;
+ uint32 headerTemp, regTemp;
+
+ headerValue <<= 11;
+ crcRegX <<= 21;
+ crcPoly <<= 21;
+
+ while (length)
+ {
+ headerValue <<= 1;
+ headerTemp = headerValue & 0x80000000;
+ regTemp = crcRegX & 0x80000000;
+
+ if (headerTemp ^ regTemp) // Step 1
+ {
+ crcNext = 1;
+ }
+ else
+ {
+ crcNext = 0;
+ }
+
+ crcRegX <<= 1; // Step 2
+
+ if (crcNext)
+ {
+ crcRegX ^= crcPoly; // Step 3
+ }
+
+ length--;
+ }
+
+ crcRegX >>= 21;
+
+ return (uint16)crcRegX;
+}
+
+
+boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand)
+{
+ boolean result;
+
+ // wait if Communication controller is busy
+ while (eray->SUCC1.B.PBSY == 1)
+ {}
+
+ eray->SUCC1.B.CMD = pocCommand;
+
+ // if command not accepted, return FALSE
+ if (eray->SUCC1.B.CMD == 0)
+ {
+ result = FALSE;
+ }
+ else
+ {
+ result = TRUE;
+ }
+
+ return result;
+}
+
+
+void IfxEray_clearAllFlags(Ifx_ERAY *eray)
+{
+ eray->EIR.U = 0xFFFFFFFFU; /* Clear Error Int. */
+ eray->SIR.U = 0xFFFFFFFFU; /* Clear Status Int. */
+ eray->EIER.U = 0xFFFFFFFFU; /* Disable all Error Int. */
+ eray->SIER.U = 0xFFFFFFFFU; /* Disable all Status Int. */
+ eray->MHDS.U = 0x7F7F7FFFU; /* Clear Error Int. */
+}
+
+
+void IfxEray_enableInterruptLines(Ifx_ERAY *eray)
+{
+ eray->ILE.U = 0x00000003U; //enable both the interrupt lines
+ eray->EILS.U = 0x00000000U; // all interrupt lines to INT0SRC
+ eray->SILS.U = 0x00000800U; // TOBC interrupt line to INT1SRC
+ eray->SIES.U = 0x0303FFFFU; // all status interrupts are enabled
+ eray->EIES.U = 0x07070FFFU; // all error interrupts are enabled
+ eray->NDIC1.U = 0x00000000U; // all interrupt lines to NADT0SRC
+ eray->NDIC2.U = 0x00000000U; // all interrupt lines to NADT0SRC
+ eray->NDIC3.U = 0x00000000U; // all interrupt lines to NADT0SRC
+ eray->NDIC4.U = 0x00000000U; // all interrupt lines to NADT0SRC
+ eray->MSIC1.U = 0x00000000U; // all interrupt lines to MBSC0SRC
+ eray->MSIC2.U = 0x00000000U; // all interrupt lines to MBSC0SRC
+ eray->MSIC3.U = 0x00000000U; // all interrupt lines to MBSC0SRC
+ eray->MSIC4.U = 0x00000000U; // all interrupt lines to MBSC0SRC
+}
+
+
+Ifx_ERAY *IfxEray_getAddress(IfxEray_Index eray)
+{
+ Ifx_ERAY *module;
+
+ if (eray < IFXERAY_NUM_MODULES)
+ {
+ module = (Ifx_ERAY *)IfxEray_cfg_indexMap[eray].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
+
+
+IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray)
+{
+ uint32 index;
+ IfxEray_Index result;
+
+ result = IfxEray_Index_none;
+
+ for (index = 0; index < IFXERAY_NUM_MODULES; index++)
+ {
+ if (IfxEray_cfg_indexMap[index].module == eray)
+ {
+ result = (IfxEray_Index)IfxEray_cfg_indexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength)
+{
+ if (data != NULL_PTR)
+ {
+ uint16 length = (payloadLength + 1) / 2;
+ uint8 index;
+
+ for (index = 0; index < length; index++)
+ {
+ *data++ = eray->RDDS_1S[index].U;
+ }
+ }
+}
+
+
+void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength)
+{
+ {
+ Ifx_ERAY_RDHS1 rdhs1;
+ rdhs1.U = eray->RDHS1.U;
+ Ifx_ERAY_RDHS2 rdhs2;
+ rdhs2.U = eray->RDHS2.U;
+ Ifx_ERAY_RDHS3 rdhs3;
+ rdhs3.U = eray->RDHS3.U;
+
+ header->frameId = rdhs1.B.FID;
+ header->payloadLength = rdhs2.B.PLR;
+ header->headerCrc = rdhs2.B.CRC;
+ header->payloadPreambleIndicator = rdhs3.B.PPI;
+ header->nullFrameIndicator = rdhs3.B.NFI;
+ header->syncFrame = rdhs3.B.SYN;
+ header->startupFrame = rdhs3.B.SFI;
+ header->cycleNumber = rdhs3.B.RCC;
+ }
+
+ IfxEray_readData(eray, data, (header->payloadLength > maxPayloadLength) ? maxPayloadLength : header->payloadLength);
+}
+
+
+void IfxEray_resetModule(Ifx_ERAY *eray)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ eray->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ eray->KRST0.B.RST = 1;
+
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (eray->KRST0.B.RSTSTAT == 0)
+ {
+ /* Wait until reset is executed */
+ }
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ eray->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination)
+{
+ uint8 ix = messageBuffer / 32;
+ uint32 mask = 1 << (messageBuffer % 32);
+ Ifx_ERAY_MSIC1 *msicSFR = (Ifx_ERAY_MSIC1 *)((uint32)&eray->MSIC1 + 4 * ix);
+
+ if (messageBufferDestination == FALSE)
+ {
+ msicSFR->U &= ~mask;
+ }
+ else
+ {
+ msicSFR->U |= mask;
+ }
+}
+
+
+void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination)
+{
+ IFX_UNUSED_PARAMETER(ndat);
+ uint8 ix = ndatDestination / 32;
+ uint32 mask = 1 << (ndatDestination % 32);
+ Ifx_ERAY_NDIC1 *ndicSFR = (Ifx_ERAY_NDIC1 *)((uint32)&eray->NDIC1 + 4 * ix);
+
+ if (ndatDestination == FALSE)
+ {
+ ndicSFR->U &= ~mask;
+ }
+ else
+ {
+ ndicSFR->U |= mask;
+ }
+}
+
+
+void IfxEray_setPocReady(Ifx_ERAY *eray)
+{
+ // wait CC is busy
+ while (eray->SUCC1.B.PBSY == 1)
+ {}
+
+ // Ready unlock sequence
+ eray->LCK.B.CLK = 0xCE;
+ eray->LCK.B.CLK = 0x31;
+ eray->SUCC1.B.CMD = IfxEray_PocCommand_ready;
+}
+
+
+void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig)
+{
+ // wait if Host is busy with another transfer
+ while (IfxEray_getInputBufferBusyHostStatus(eray) == TRUE)
+ {}
+
+ if (header != NULL_PTR)
+ {
+ {
+ Ifx_ERAY_WRHS1 wrhs1;
+ wrhs1.U = 0;
+ wrhs1.B.FID = header->frameId;
+ wrhs1.B.CYC = header->cycleCode;
+ wrhs1.B.CHA = header->channelAFiltered;
+ wrhs1.B.CHB = header->channelBFiltered;
+ wrhs1.B.CFG = header->bufferDirection;
+ wrhs1.B.PPIT = header->transmitPayloadIndicatior;
+ wrhs1.B.TXM = header->transmissionMode;
+ wrhs1.B.MBI = header->bufferServiceEnabled;
+ eray->WRHS1.U = wrhs1.U;
+ }
+ {
+ Ifx_ERAY_WRHS2 wrhs2;
+ wrhs2.U = 0;
+
+ if (header->bufferDirection == IfxEray_BufferDirection_transmit)
+ {
+ wrhs2.B.CRC = IfxEray_calcHeaderCrc(header->payloadLength, header->frameId, header->startupFrameIndicator, header->syncFrameIndicator);
+ }
+
+ wrhs2.B.PLC = header->payloadLength;
+ eray->WRHS2.U = wrhs2.U;
+ }
+
+ eray->WRHS3.U = header->dataPointer;
+ }
+
+ IfxEray_writeData(eray, data, header->payloadLength);
+
+ eray->IBCM.B.LHSH = slotConfig->headerTransfered;
+ eray->IBCM.B.LDSH = slotConfig->dataTransfered;
+ eray->IBCM.B.STXRH = slotConfig->transferRequested;
+ eray->IBCR.B.IBRH = slotConfig->bufferIndex;
+
+ // wait if Shadow is busy with another transfer
+ while (IfxEray_getInputBufferBusyShadowStatus(eray) == TRUE)
+ {}
+
+ while (IfxEray_getInputBufferBusyHostStatus(eray) == TRUE)
+ {}
+}
+
+
+void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength)
+{
+ if (data != NULL_PTR)
+ {
+ uint16 length = (payloadLength + 1) / 2;
+ uint8 index;
+
+ for (index = 0; index < length; index++)
+ {
+ eray->WRDS_1S[index].U = *data++;
+ }
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Std/IfxEray.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Std/IfxEray.h
new file mode 100644
index 0000000..98daf21
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Std/IfxEray.h
@@ -0,0 +1,1845 @@
+/**
+ * \file IfxEray.h
+ * \brief ERAY basic functionality
+ * \ingroup IfxLld_Eray
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Eray_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Eray_Std
+ * \defgroup IfxLld_Eray_Std_Interrupt Interrupt Functions
+ * \ingroup IfxLld_Eray_Std
+ * \defgroup IfxLld_Eray_Std_IO IO Pin Configuration Functions
+ * \ingroup IfxLld_Eray_Std
+ * \defgroup IfxLld_Eray_Std_Module Module Functions
+ * \ingroup IfxLld_Eray_Std
+ * \defgroup IfxLld_Eray_Std_Status Status Functions
+ * \ingroup IfxLld_Eray_Std
+ * \defgroup IfxLld_Eray_Std_Configuration Configuration Functions
+ * \ingroup IfxLld_Eray_Std
+ * \defgroup IfxLld_Eray_Std_Structures Data Structures
+ * \ingroup IfxLld_Eray_Std
+ * \defgroup IfxLld_Eray_Std_Operative Operative Functions
+ * \ingroup IfxLld_Eray_Std
+ */
+
+#ifndef IFXERAY_H
+#define IFXERAY_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxEray_cfg.h"
+#include "_PinMap/IfxEray_PinMap.h"
+#include "Src/Std/IfxSrc.h"
+#include "IfxEray_reg.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Eray_Std_Enumerations
+ * \{ */
+/** \brief Baudrate on the flexray bus, defined in MODULE_ERAY0.PRTC1.B.BRP.
+ */
+typedef enum
+{
+ IfxEray_Baudrate_10 = 0, /**< \brief baudrate is 10MBits/Sec */
+ IfxEray_Baudrate_5 = 1, /**< \brief baudrate is 5MBits/Sec */
+ IfxEray_Baudrate_2_5 = 2 /**< \brief baudrate is 2.5MBits/Sec */
+} IfxEray_Baudrate;
+
+/** \brief wheather transmit buffer or receive buffer, defined in MODULE_ERAY0.WRHS1.B.CFG.
+ */
+typedef enum
+{
+ IfxEray_BufferDirection_receive = 0, /**< \brief buffer is configured as receive buffer */
+ IfxEray_BufferDirection_transmit = 1 /**< \brief buffer is configured as transmit buffer */
+} IfxEray_BufferDirection;
+
+/** \brief Channel Id
+ */
+typedef enum
+{
+ IfxEray_Channel_a = 0, /**< \brief channel A */
+ IfxEray_Channel_b = 1 /**< \brief channel B */
+} IfxEray_Channel;
+
+/** \brief Selection of error flag to clear defined in MODULE_ERAY.EIR.U
+ */
+typedef enum
+{
+ IfxEray_ClearErrorFlag_pemc = 1, /**< \brief POC error mode change bit. */
+ IfxEray_ClearErrorFlag_cna = 2, /**< \brief command not accepted event bit. */
+ IfxEray_ClearErrorFlag_sfbm = 4, /**< \brief sync frame below minimum bit. */
+ IfxEray_ClearErrorFlag_sfo = 8, /**< \brief sync frame overflow event bit */
+ IfxEray_ClearErrorFlag_ccf = 16, /**< \brief clock correction failure event. */
+ IfxEray_ClearErrorFlag_ccl = 32, /**< \brief CHI command locked event. */
+ IfxEray_ClearErrorFlag_eerr = 64, /**< \brief ECC error event bit. */
+ IfxEray_ClearErrorFlag_rfo = 128, /**< \brief RxFIFO overrun event bit. */
+ IfxEray_ClearErrorFlag_efa = 256, /**< \brief empty FIFO access event bit. */
+ IfxEray_ClearErrorFlag_iiba = 512, /**< \brief illegal input buffer access event. */
+ IfxEray_ClearErrorFlag_ioba = 1024, /**< \brief illegal output buffer access event. */
+ IfxEray_ClearErrorFlag_mhf = 2048, /**< \brief message handler constraint flag. */
+ IfxEray_ClearErrorFlag_eda = 65536, /**< \brief error event on channel A. */
+ IfxEray_ClearErrorFlag_ltva = 131072, /**< \brief latest transmit violation flag on channel A . */
+ IfxEray_ClearErrorFlag_taba = 262144, /**< \brief transmission across channel A boundary flag. */
+ IfxEray_ClearErrorFlag_edb = 16777216, /**< \brief error event on channel B. */
+ IfxEray_ClearErrorFlag_ltvb = 33554432, /**< \brief latest transmit violation flag on channel B . */
+ IfxEray_ClearErrorFlag_tabb = 67108864 /**< \brief transmission across channel B boundary flag. */
+} IfxEray_ClearErrorFlag;
+
+/** \brief Selection of status flag to clear defined in MODULE_ERAY.SIR.U
+ */
+typedef enum
+{
+ IfxEray_ClearStatusFlag_wst = 1, /**< \brief wakeup status bit. */
+ IfxEray_ClearStatusFlag_cas = 2, /**< \brief collision avoidance bit. */
+ IfxEray_ClearStatusFlag_cycs = 4, /**< \brief cycle start service bit. */
+ IfxEray_ClearStatusFlag_txi = 8, /**< \brief transmit service request bit. */
+ IfxEray_ClearStatusFlag_rxi = 16, /**< \brief receive service request bit. */
+ IfxEray_ClearStatusFlag_rfne = 32, /**< \brief receive fifo not empty bit. */
+ IfxEray_ClearStatusFlag_rfcl = 64, /**< \brief RxFIFO critical level reached bit. */
+ IfxEray_ClearStatusFlag_nmvc = 128, /**< \brief network management vector bit. */
+ IfxEray_ClearStatusFlag_ti0 = 256, /**< \brief timer0 service request bit. */
+ IfxEray_ClearStatusFlag_ti1 = 512, /**< \brief timer1 service request bit. */
+ IfxEray_ClearStatusFlag_tibc = 1024, /**< \brief transfer input buffer completion request bit. */
+ IfxEray_ClearStatusFlag_tobc = 2048, /**< \brief transfer output buffer completion request bit. */
+ IfxEray_ClearStatusFlag_swe = 4096, /**< \brief stop watch event bit. */
+ IfxEray_ClearStatusFlag_sucs = 8192, /**< \brief startup success event bit. */
+ IfxEray_ClearStatusFlag_mbsi = 16384, /**< \brief message buffer service status bit. */
+ IfxEray_ClearStatusFlag_sds = 32768, /**< \brief dynamic segment start bit. */
+ IfxEray_ClearStatusFlag_wupa = 65536, /**< \brief wakeup pattern channel A bit. */
+ IfxEray_ClearStatusFlag_mtsa = 131072, /**< \brief MTS receive channel A bit. */
+ IfxEray_ClearStatusFlag_wupb = 16777216, /**< \brief wakeup pattern channel B bit. */
+ IfxEray_ClearStatusFlag_mtsb = 33554432 /**< \brief MTS receive channel B bit. */
+} IfxEray_ClearStatusFlag;
+
+/** \brief Clock divider in RUN mode, defined in MODULE_ERAY0.B.RMC.
+ */
+typedef enum
+{
+ IfxEray_ClockDivider_none = 0, /**< \brief no clock signal */
+ IfxEray_ClockDivider_1 = 1, /**< \brief run mode clock divider 1 */
+ IfxEray_ClockDivider_2, /**< \brief run mode clock divider 2 */
+ IfxEray_ClockDivider_3, /**< \brief run mode clock divider 3 */
+ IfxEray_ClockDivider_4, /**< \brief run mode clock divider 4 */
+ IfxEray_ClockDivider_5, /**< \brief run mode clock divider 5 */
+ IfxEray_ClockDivider_6, /**< \brief run mode clock divider 6 */
+ IfxEray_ClockDivider_7 /**< \brief run mode clock divider 7 */
+} IfxEray_ClockDivider;
+
+/** \brief External offset correction control defined in MODULE_ERAY0.GTU11.B.EOCC.
+ */
+typedef enum
+{
+ IfxEray_ExternalOffset_noCorrection = 1, /**< \brief No external correction control. */
+ IfxEray_ExternalOffset_correctionSubtracted = 2, /**< \brief External offset correction subtracted from calculated correction. */
+ IfxEray_ExternalOffset_correctionAdded = 3 /**< \brief External offset correction added to calculated correction. */
+} IfxEray_ExternalOffset;
+
+/** \brief External clock offset correction value defined in MODULE_ERAY0.GTU11.B.EOC.
+ */
+typedef enum
+{
+ IfxEray_ExternalOffsetCorrection_0 = 0, /**< \brief external clock offset correction value 0 */
+ IfxEray_ExternalOffsetCorrection_1, /**< \brief external clock offset correction value 1 */
+ IfxEray_ExternalOffsetCorrection_2, /**< \brief external clock offset correction value 2 */
+ IfxEray_ExternalOffsetCorrection_3, /**< \brief external clock offset correction value 3 */
+ IfxEray_ExternalOffsetCorrection_4, /**< \brief external clock offset correction value 4 */
+ IfxEray_ExternalOffsetCorrection_5, /**< \brief external clock offset correction value 5 */
+ IfxEray_ExternalOffsetCorrection_6, /**< \brief external clock offset correction value 6 */
+ IfxEray_ExternalOffsetCorrection_7 /**< \brief external clock offset correction value 7 */
+} IfxEray_ExternalOffsetCorrection;
+
+/** \brief External rate correction control MODULE_ERAY0.GTU11.B.ERCC.
+ */
+typedef enum
+{
+ IfxEray_ExternalRate_noCorrection = 1, /**< \brief No external correction control. */
+ IfxEray_ExternalRate_correctionSubtracted = 2, /**< \brief External rate correction subtracted from calculated correction. */
+ IfxEray_ExternalRate_correctionAdded = 3 /**< \brief External rate correction added to calculated correction. */
+} IfxEray_ExternalRate;
+
+/** \brief External clock rate correction value defined in MODULE_ERAY0.GTU11.B.ERC.
+ */
+typedef enum
+{
+ IfxEray_ExternalRateCorrection_0 = 0, /**< \brief external clock rate correction value 0 */
+ IfxEray_ExternalRateCorrection_1, /**< \brief external clock rate correction value 1 */
+ IfxEray_ExternalRateCorrection_2, /**< \brief external clock rate correction value 2 */
+ IfxEray_ExternalRateCorrection_3, /**< \brief external clock rate correction value 3 */
+ IfxEray_ExternalRateCorrection_4, /**< \brief external clock rate correction value 4 */
+ IfxEray_ExternalRateCorrection_5, /**< \brief external clock rate correction value 5 */
+ IfxEray_ExternalRateCorrection_6, /**< \brief external clock rate correction value 6 */
+ IfxEray_ExternalRateCorrection_7 /**< \brief external clock rate correction value 7 */
+} IfxEray_ExternalRateCorrection;
+
+/** \brief Duration of dynamic slot idle phase, defined in MODULE_ERAY0.B.DSI.
+ */
+typedef enum
+{
+ IfxEray_IdleDynamicSlots_0 = 0, /**< \brief duration of dynamic slot idle phase is 0 */
+ IfxEray_IdleDynamicSlots_1, /**< \brief duration of dynamic slot idle phase is 1 */
+ IfxEray_IdleDynamicSlots_2 /**< \brief duration of dynamic slot idle phase is 2 */
+} IfxEray_IdleDynamicSlots;
+
+/** \brief Wakeup or Startup listen timeout in presence of noise, defined in MODULE_ERAY0.SUCC2.B.LTN.
+ */
+typedef enum
+{
+ IfxEray_ListenTimeOutNoise_2 = 1, /**< \brief listen Time-out noise 2 */
+ IfxEray_ListenTimeOutNoise_3, /**< \brief listen Time-out noise 3 */
+ IfxEray_ListenTimeOutNoise_4, /**< \brief listen Time-out noise 4 */
+ IfxEray_ListenTimeOutNoise_5, /**< \brief listen Time-out noise 5 */
+ IfxEray_ListenTimeOutNoise_6, /**< \brief listen Time-out noise 6 */
+ IfxEray_ListenTimeOutNoise_7, /**< \brief listen Time-out noise 7 */
+ IfxEray_ListenTimeOutNoise_8, /**< \brief listen Time-out noise 8 */
+ IfxEray_ListenTimeOutNoise_9, /**< \brief listen Time-out noise 9 */
+ IfxEray_ListenTimeOutNoise_10, /**< \brief listen Time-out noise 10 */
+ IfxEray_ListenTimeOutNoise_11, /**< \brief listen Time-out noise 11 */
+ IfxEray_ListenTimeOutNoise_12, /**< \brief listen Time-out noise 12 */
+ IfxEray_ListenTimeOutNoise_13, /**< \brief listen Time-out noise 13 */
+ IfxEray_ListenTimeOutNoise_14, /**< \brief listen Time-out noise 14 */
+ IfxEray_ListenTimeOutNoise_15, /**< \brief listen Time-out noise 15 */
+ IfxEray_ListenTimeOutNoise_16 /**< \brief listen Time-out noise 16 */
+} IfxEray_ListenTimeOutNoise;
+
+/** \brief Maximum number of sync frames in a cluster defined in MODULE_ERAY0.GTU02.B.SNM.
+ */
+typedef enum
+{
+ IfxEray_MaxSynchFrames_2 = 2, /**< \brief Maximum number of sync frames in a cluster are 2 */
+ IfxEray_MaxSynchFrames_3, /**< \brief Maximum number of sync frames in a cluster are 3 */
+ IfxEray_MaxSynchFrames_4, /**< \brief Maximum number of sync frames in a cluster are 4 */
+ IfxEray_MaxSynchFrames_5, /**< \brief Maximum number of sync frames in a cluster are 5 */
+ IfxEray_MaxSynchFrames_6, /**< \brief Maximum number of sync frames in a cluster are 6 */
+ IfxEray_MaxSynchFrames_7, /**< \brief Maximum number of sync frames in a cluster are 7 */
+ IfxEray_MaxSynchFrames_8, /**< \brief Maximum number of sync frames in a cluster are 8 */
+ IfxEray_MaxSynchFrames_9, /**< \brief Maximum number of sync frames in a cluster are 9 */
+ IfxEray_MaxSynchFrames_10, /**< \brief Maximum number of sync frames in a cluster are 10 */
+ IfxEray_MaxSynchFrames_11, /**< \brief Maximum number of sync frames in a cluster are 11 */
+ IfxEray_MaxSynchFrames_12, /**< \brief Maximum number of sync frames in a cluster are 12 */
+ IfxEray_MaxSynchFrames_13, /**< \brief Maximum number of sync frames in a cluster are 13 */
+ IfxEray_MaxSynchFrames_14, /**< \brief Maximum number of sync frames in a cluster are 14 */
+ IfxEray_MaxSynchFrames_15 /**< \brief Maximum number of sync frames in a cluster are 15 */
+} IfxEray_MaxSynchFrames;
+
+/** \brief Commmand to control the Communication, defined in MODULE_ERAY0.SUCC1.B.CMD.
+ */
+typedef enum
+{
+ IfxEray_PocCommand_notAccepted = 0, /**< \brief command not accepted. */
+ IfxEray_PocCommand_config = 1, /**< \brief command to controller to enter CONFIG */
+ IfxEray_PocCommand_ready = 2, /**< \brief command to controller to enter READY. */
+ IfxEray_PocCommand_wakeup = 3, /**< \brief command to controller to enter WAKEUP */
+ IfxEray_PocCommand_run = 4, /**< \brief command to controller to enter RUN */
+ IfxEray_PocCommand_allSlots = 5, /**< \brief command to controller to enter ALL_SLOTS */
+ IfxEray_PocCommand_halt = 6, /**< \brief command to controller to enter HALT */
+ IfxEray_PocCommand_freeze = 7, /**< \brief command to controller to enter FREEZE */
+ IfxEray_PocCommand_sendMts = 8, /**< \brief command to controller to enter SEND_MTS */
+ IfxEray_PocCommand_coldStart = 9, /**< \brief command to controller to enter COLD_START */
+ IfxEray_PocCommand_reset = 10, /**< \brief command to controller to enter RESET */
+ IfxEray_PocCommand_monitor = 11, /**< \brief command to controller to enter MONITOR */
+ IfxEray_PocCommand_clearRam = 12 /**< \brief command to controller to enter CLEAR_RAM */
+} IfxEray_PocCommand;
+
+/** \brief State of Communication Controller Protocol operation control, defined in MODULE_ERAY0.CCSV.B.POCS.
+ */
+typedef enum
+{
+ IfxEray_PocState_defaultConfig = 0, /**< \brief controller entered default config state */
+ IfxEray_PocState_ready = 1, /**< \brief controller entered ready state */
+ IfxEray_PocState_normalActive = 2, /**< \brief controller entered normal-active state */
+ IfxEray_PocState_normalPassive = 3, /**< \brief controller entered normal-passive state */
+ IfxEray_PocState_halt = 4, /**< \brief controller entered halt state */
+ IfxEray_PocState_monitor = 5, /**< \brief controller entered monitor state */
+ IfxEray_PocState_config = 15, /**< \brief controller entered config state */
+ IfxEray_PocState_wakeupStandby = 16, /**< \brief controller entered wakeup standby state */
+ IfxEray_PocState_wakeupListen = 17, /**< \brief controller entered wakeup-listen state */
+ IfxEray_PocState_wakeupSend = 18, /**< \brief controller entered wakeup-send state */
+ IfxEray_PocState_wakeupDetect = 19, /**< \brief controller entered wakeup-detection state */
+ IfxEray_PocState_startup = 32, /**< \brief controller entered startup state */
+ IfxEray_PocState_coldStartListen = 33, /**< \brief controller entered clod-start listen state */
+ IfxEray_PocState_collisionResolution = 34, /**< \brief controller entered collission-resolution state. */
+ IfxEray_PocState_consistencyCheck = 35, /**< \brief controller entered consistency-check. */
+ IfxEray_PocState_gap = 36, /**< \brief controller entered gap state. */
+ IfxEray_PocState_join = 37, /**< \brief controller entered join state. */
+ IfxEray_PocState_integrationCheck = 38, /**< \brief controller entered integration-check. */
+ IfxEray_PocState_integrationListen = 39, /**< \brief controller entered integration-listen state. */
+ IfxEray_PocState_integrationConsistencyCheck = 40, /**< \brief controller entered integration consistency check state */
+ IfxEray_PocState_initializeSchedule = 41, /**< \brief controller entered initialise schedule state */
+ IfxEray_PocState_staruAborted = 42, /**< \brief controller entered startup-abort state */
+ IfxEray_PocState_startupSucced = 43 /**< \brief controller entered startup succeed state. */
+} IfxEray_PocState;
+
+/** \brief Receiving channel, defined in MODULE_ERAY0.FRF.B.CH.
+ */
+typedef enum
+{
+ IfxEray_ReceiveChannel_both = 0, /**< \brief both channels for reception */
+ IfxEray_ReceiveChannel_b = 1, /**< \brief channel A for reception */
+ IfxEray_ReceiveChannel_a = 2, /**< \brief channel B for reception */
+ IfxEray_ReceiveChannel_none = 3 /**< \brief none channels for reception */
+} IfxEray_ReceiveChannel;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_ERAY.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxEray_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxEray_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxEray_SleepMode;
+
+/** \brief Sample count value for strobing, defined in MODULE_ERAY0.PRTC1.B.SPP.
+ */
+typedef enum
+{
+ IfxEray_StrobePosition_5 = 0, /**< \brief Sample count 5 for strobing */
+ IfxEray_StrobePosition_4 = 1, /**< \brief Sample count 4 for strobing */
+ IfxEray_StrobePosition_6 = 2 /**< \brief Sample count 6 for strobing */
+} IfxEray_StrobePosition;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxEray_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxEray_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxEray_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxEray_SuspendMode;
+
+/** \brief Transmission mode of Header, defined in MODULE_ERAY0.WRHS1.B.TXM.
+ */
+typedef enum
+{
+ IfxEray_TransmissionMode_continuous = 0, /**< \brief continuos transmission mode */
+ IfxEray_TransmissionMode_singleShot = 1 /**< \brief single transmission mode */
+} IfxEray_TransmissionMode;
+
+/** \brief Initial transmission mode, defined in MODULE_ERAY0.SUCC1.B.TSM.
+ */
+typedef enum
+{
+ IfxEray_TransmissionSlotMode_all = 0, /**< \brief transmission in all slots. */
+ IfxEray_TransmissionSlotMode_single = 1 /**< \brief transmission in key slot. */
+} IfxEray_TransmissionSlotMode;
+
+/** \brief Wakeup pattern carry channel, defined in MODULE_ERAY0.SUCC1.B.WUCS.
+ */
+typedef enum
+{
+ IfxEray_WakeupChannel_a = 0, /**< \brief send wakeup channel pattern on channel A */
+ IfxEray_WakeupChannel_b = 1 /**< \brief send wakeup channel pattern on channel B */
+} IfxEray_WakeupChannel;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Eray_Std_Structures
+ * \{ */
+/** \brief Header section in a frame.
+ */
+typedef struct
+{
+ uint16 frameId; /**< \brief slot ID of the selected Message Buffer. */
+ uint8 cycleCode; /**< \brief the cycle set used for cycle counter filtering. */
+ boolean channelAFiltered; /**< \brief channel A serves as a control for transmit and filter for receive buffers. */
+ boolean channelBFiltered; /**< \brief channel B serves as a control for transmit and filter for receive buffers. */
+ IfxEray_BufferDirection bufferDirection; /**< \brief selects buffer as a transmit buffer or as a receive buffer. */
+ boolean transmitPayloadIndicatior; /**< \brief weather payload indicator is set or not. */
+ IfxEray_TransmissionMode transmissionMode; /**< \brief transmission mode of Header. */
+ boolean bufferServiceEnabled; /**< \brief wether buffer service request is enabled or not. */
+ uint8 payloadLength; /**< \brief length of data section. */
+ uint16 dataPointer; /**< \brief pointer to the data section of message buffer in RAM. */
+ boolean startupFrameIndicator; /**< \brief whether startup frame is indicated or not. */
+ boolean syncFrameIndicator; /**< \brief whether sync frame is indicated or not. */
+} IfxEray_Header;
+
+/** \brief Received header in a frame.
+ */
+typedef struct
+{
+ uint16 frameId : 11; /**< \brief received frame id. */
+ uint8 payloadLength : 7; /**< \brief received payload length. */
+ uint16 headerCrc : 11; /**< \brief received header crc. */
+ uint8 nullFrameIndicator : 1; /**< \brief 0 : no data frame received; 1: atleast one data frame received. */
+ uint8 syncFrame : 1; /**< \brief 0 : received frame is not a synch frame ; 1 : receive frame is a synch frame. */
+ uint8 startupFrame : 1; /**< \brief 0 : received frame is not a startup frame ; 1 : receive frame is a startup frame. */
+ uint8 cycleNumber : 7; /**< \brief cycle number in which frame is received. */
+ uint8 payloadPreambleIndicator : 1; /**< \brief 1 : received payload segment has network management and message id or not; 0 : It hasn't. */
+} IfxEray_ReceivedHeader;
+
+/** \brief Transmit control structure.
+ */
+typedef struct
+{
+ boolean headerTransfered; /**< \brief whether header is transfered from input buffers to Message RAM or not. */
+ boolean dataTransfered; /**< \brief whether data is transfered from input buffers to Message RAM or not. */
+ boolean transferRequested; /**< \brief transmit buffer released for transmission or not. */
+ uint8 bufferIndex; /**< \brief buffer index in the Message RAM. */
+} IfxEray_SlotConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Std_Interrupt
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the error flag requested.
+ * \param eray pointer to ERAY module registers.
+ * \param errorFlag error flag to be cleared.
+ * \return None
+ */
+IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag);
+
+/** \brief Clears the status flag requested.
+ * \param eray pointer to ERAY module registers.
+ * \param statusFlag status flag to be cleared.
+ * \return None
+ */
+IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag);
+
+/** \brief Gets the error interrupt flags.
+ * \param eray pointer to ERAY module registers.
+ * \return error interrupt flags.
+ */
+IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray);
+
+/** \brief Gets the IBUSY service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of IBUSY service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the INT0 service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of INT0 service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the INT1 service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of INT1 service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the message buffers interrupt status.
+ * \param eray pointer to ERAY module registers.
+ * \param messageBuffer message buffer to which interrupt status be checked.
+ * \return message buffer interrupt status.
+ */
+IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer);
+
+/** \brief Gets the MBSC0 service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of MBSC0 service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the MBSC1 service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of MBSC1 service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the NDAT0 service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of NDAT0 service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the NDAT1 service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of NDAT1 service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the new data interrupt buffers status.
+ * \param eray pointer to ERAY module registers.
+ * \param ndat message buffer number configured to which ndat occurs.
+ * \return ndat interrupt buffer.
+ */
+IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat);
+
+/** \brief Gets the OBUSY service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of OBUSY service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the status interrupt flags.
+ * \param eray pointer to ERAY module registers.
+ * \return status interrupt flags.
+ */
+IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray);
+
+/** \brief Gets the TINT0 service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of TINT0 service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray);
+
+/** \brief Gets the TINT1 service request.
+ * \param eray pointer to ERAY module registers.
+ * \return address of TINT1 service request value.
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears all the error flags.
+ * \param eray pointer to ERAY module registers.
+ * \return None
+ */
+IFX_EXTERN void IfxEray_clearAllFlags(Ifx_ERAY *eray);
+
+/** \brief Enables all the Interrupt lines.
+ * \param eray pointer to ERAY module registers.
+ * \return None
+ */
+IFX_EXTERN void IfxEray_enableInterruptLines(Ifx_ERAY *eray);
+
+/** \brief Selects between MBSC0 and MBSC1 interrupt destination
+ * \param eray pointer to ERAY module registers.
+ * \param messageBuffer message buffer interrupt which should be configured
+ * \param messageBufferDestination selects MBSC0 or MBSC1 interrupt output
+ * \return None
+ */
+IFX_EXTERN void IfxEray_setMessageBufferInterruptDestination(Ifx_ERAY *eray, uint8 messageBuffer, uint8 messageBufferDestination);
+
+/** \brief Selects between NDAT0 and NDAT1 interrupt destination
+ * \param eray pointer to ERAY module registers.
+ * \param ndat NDAT interrupt which should be configured
+ * \param ndatDestination selects NDAT0 or NDAT1 interrupt output
+ * \return None
+ */
+IFX_EXTERN void IfxEray_setNewDataInterruptDestination(Ifx_ERAY *eray, uint8 ndat, uint8 ndatDestination);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Std_IO
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises a RX pin.
+ * \param rx the RX Pin which should be configured.
+ * \param rxMode the pin input mode which should be configured.
+ * \return None
+ */
+IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode);
+
+/** \brief Initializes a TX Enable output.
+ * \param txEn the TX Enable Pin which should be configured.
+ * \param txEnMode the pin output mode which should be configured.
+ * \param padDriver the pad driver mode which should be configured.
+ * \return None
+ */
+IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a TX output.
+ * \param tx the TX Pin which should be configured.
+ * \param txMode the pin output mode which should be configured.
+ * \param padDriver the pad driver mode which should be configured.
+ * \return None
+ */
+IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Std_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disables the ERAY module.
+ * \param eray pointer to ERAY module registers.
+ * \return None
+ */
+IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray);
+
+/** \brief Enables the ERAY module.
+ * \param eray pointer to ERAY module registers.
+ * \return None
+ */
+IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param eray Pointer to ERAY module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param eray pointer to ERAY registers
+ * \param mode mode selection (enable/disable)
+ * \return None
+ */
+IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \param eray Resource index of the ERAY
+ * \return ERAY module register address
+ */
+IFX_EXTERN Ifx_ERAY *IfxEray_getAddress(IfxEray_Index eray);
+
+/** \brief API to get the resource index of the ERAY specified.
+ * \param eray Pointer to the ERAY HW module (register memory map)
+ * \return Resource index of the ERAY
+ */
+IFX_EXTERN IfxEray_Index IfxEray_getIndex(Ifx_ERAY *eray);
+
+/** \brief Resets the ERAY kernel.
+ * \param eray pointer to ERAY module registers.
+ * \return None
+ */
+IFX_EXTERN void IfxEray_resetModule(Ifx_ERAY *eray);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Std_Status
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the FIFO status.
+ * \param eray pointer to ERAY module registers.
+ * \return FIFO status.
+ */
+IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray);
+
+/** \brief Gets the Input Buffer Host Busy status.
+ * \param eray pointer to ERAY module registers.
+ * \return TRUE if Host is Busy otherwise FALSE.
+ */
+IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray);
+
+/** \brief Gets the Input Buffer Shadow status.
+ * \param eray pointer to ERAY module registers.
+ * \return TRUE if busy otherwise FALSE
+ */
+IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray);
+
+/** \brief Gets the output buffer index.
+ * \param eray pointer to ERAY module registers.
+ * \return output buffer index.
+ */
+IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray);
+
+/** \brief Gets the Output Buffer Shadow status.
+ * \param eray pointer to ERAY module registers.
+ * \return TRUE if busy otherwise FALSE
+ */
+IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray);
+
+/** \brief Gets the current POC state.
+ * \param eray pointer to ERAY module registers.
+ * \return current POC state.
+ */
+IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray);
+
+/** \brief Gets the received wakeup pattern channel.
+ * \param eray pointer to ERAY module registers.
+ * \return received wakeup pattern channel.
+ */
+IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray);
+
+/** \brief Waits until the controller enters required POC state.
+ * \param eray pointer to ERAY module registers.
+ * \param pocState POC state upto which controller waits.
+ * \return None
+ */
+IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Changes the Commmunication Controller state.
+ * \param eray pointer to ERAY module registers.
+ * \param pocCommand POC command which triggers the Controller state.
+ * \return TRUE if command accepted otherwise FALSE.
+ */
+IFX_EXTERN boolean IfxEray_changePocState(Ifx_ERAY *eray, IfxEray_PocCommand pocCommand);
+
+/** \brief Sets the POC state to Ready state.
+ * \param eray pointer to ERAY module registers.
+ * \return None
+ */
+IFX_EXTERN void IfxEray_setPocReady(Ifx_ERAY *eray);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Std_Configuration
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief request to receive header section from message buffer.
+ * \param eray pointer to ERAY module registers.
+ * \param headerReceived whether header is received or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived);
+
+/** \brief sets the bit to send header in frame.
+ * \param eray pointer to ERAY module registers.
+ * \param headerTransfered whether header transfered or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered);
+
+/** \brief Sets number of cycle pairs for Active state.
+ * \param eray pointer to ERAY module registers.
+ * \param numberOfCyclePairsForActive number of cycle pairs for Active state.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive);
+
+/** \brief Sets auto delays between input, output buffers and message RAM
+ * \param eray pointer to ERAY module registers.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray);
+
+/** \brief Sets baudrate on Flexray bus.
+ * \param eray pointer to ERAY module registers.
+ * \param baudrate baudrate on flexray bus.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate);
+
+/** \brief Sets secured buffers in message RAM.
+ * \param eray pointer to ERAY module registers.
+ * \param secureValue secure value.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue);
+
+/** \brief Sets channel A initial offstes.
+ * \param eray pointer to ERAY module registers.
+ * \param channelAMicrotickInitialOffset difference between reference points on channel A in microticks.
+ * \param channelAMacrotickInitialOffset difference between reference points on channel A in macroticks.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset);
+
+/** \brief Sets channel B initial offstes.
+ * \param eray pointer to ERAY module registers.
+ * \param channelBMicrotickInitialOffset difference between reference points on channel B in microticks.
+ * \param channelBMacrotickInitialOffset difference between reference points on channel B in macroticks.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset);
+
+/** \brief Sets receive delays on channels.
+ * \param eray pointer to ERAY module registers.
+ * \param channelAReceptionDelay reception delay on channel A.
+ * \param channelBReceptionDelay reception delay on channel B.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay);
+
+/** \brief Sets clock correction cycles for Passive and Halt.
+ * \param eray pointer to ERAY module registers.
+ * \param clockCorrectionCyclesPassive maximum number of cycles missing clock correction leading for passive state.
+ * \param clockCorrectionCyclesHalt maximum number of cycles missing clock correction leading for halt state.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt);
+
+/** \brief lead to halt state in clock synch error.
+ * \param eray pointer to ERAY module registers.
+ * \param clockSyncErrorHalt whether to enter halt in clock synch error or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt);
+
+/** \brief Sets cluster drift values.
+ * \param eray pointer to ERAY module registers.
+ * \param clusterDrift cluster drift damping value used in clock synchronization.
+ * \param maxDriftOffset maximum drift offset between two nodes.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset);
+
+/** \brief Sets cluster startup deviation.
+ * \param eray pointer to ERAY module registers.
+ * \param acceptedStartupDeviation deviation for startup Frames during integration.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation);
+
+/** \brief Sets CAS symbol window duration.
+ * \param eray pointer to ERAY module registers.
+ * \param collisionAvoidanceDuration accepted duration of CAS symbol.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration);
+
+/** \brief sets duration of the communication cycle in Macroticks.
+ * \param eray pointer to ERAY module registers.
+ * \param macroticks duration of the communication cycle in Macroticks.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks);
+
+/** \brief sets duration of the communication cycle in Microticks.
+ * \param eray pointer to ERAY module registers.
+ * \param microticks duration of the communication cycle in Microticks.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks);
+
+/** \brief Sets decoding correction value.
+ * \param eray pointer to ERAY module registers.
+ * \param decodingCorrection decoding correction value.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection);
+
+/** \brief Sets dynamic slots count and length.
+ * \param eray pointer to ERAY module registers.
+ * \param dynamicSlotLength duration of dynamic slot in macroticks.
+ * \param dynamicSlotCount number of dynamic slots in a communication cycle.
+ * \param idleDynamicSlots duration of dynamic slot idle phase.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots);
+
+/** \brief Sets external correction controls.
+ * \param eray pointer to ERAY module registers.
+ * \param externalOffset External offset correction control.
+ * \param externalRate External rate correction control.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate);
+
+/** \brief Sets external correction values.
+ * \param eray pointer to ERAY module registers.
+ * \param externalOffsetCorrection external clock offset correction value.
+ * \param externalRateCorrection external clock rate correction value.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection);
+
+/** \brief Sets FIFO buffer start idex.
+ * \param eray pointer to ERAY module registers.
+ * \param fifoBufferStartIndex FIFO buffer start idex.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex);
+
+/** \brief Sets FIFO filter configurations.
+ * \param eray pointer to ERAY module registers.
+ * \param rejectedFrameId rejected frameId by FIFO.
+ * \param filteredCycleNumber filtered cycle number.
+ * \param fifoNullFramesRejected null frames rejection selection.
+ * \param frameIdFilter filtered frameid by FIFO.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter);
+
+/** \brief Sets FIFO configurations.
+ * \param eray pointer to ERAY module registers.
+ * \param receiveChannel FIFO receive channel.
+ * \param staticFifoDisabled static FIFO selection.
+ * \param fifoDepth FIFO depth.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth);
+
+/** \brief Sets first dynamic buffer.
+ * \param eray pointer to ERAY module registers.
+ * \param firstDynamicBuffer first dynamic buffer.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer);
+
+/** \brief Sets startup or wakeup listen timeouts.
+ * \param eray pointer to ERAY module registers.
+ * \param listenTimeOut wakeup or startup listen timeout in microticks.
+ * \param listenTimeOutNoise upper limit for startup or wakeup listen timeout in presence of noise.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise);
+
+/** \brief Sets the maximum cold start attempts for active state.
+ * \param eray pointer to ERAY module registers.
+ * \param maxColdStartAttempts maximum number of attempts that a cold start node allows.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts);
+
+/** \brief Sets max limit correction values.
+ * \param eray pointer to ERAY module registers.
+ * \param maxOffsetCorrection maximum offset correction.
+ * \param maxRateCorrection maximum rate correction.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection);
+
+/** \brief Sets maximum synch frames in a cluster.
+ * \param eray pointer to ERAY module registers.
+ * \param maxSyncFrames maximum synch frames in a cluster.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames);
+
+/** \brief Sets number of message buffers.
+ * \param eray pointer to ERAY module registers.
+ * \param numberOfMessageBuffers number of message buffers.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers);
+
+/** \brief Sets Message Handler configurations.
+ * \param eray pointer to ERAY module registers.
+ * \param staticFramepayload payload length of static frames in double bytes.
+ * \param latestTransmissionStart dynamic slots befor transmission of inhibit frame in dynamic segment.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart);
+
+/** \brief Sets network start Idle time.
+ * \param eray pointer to ERAY module registers.
+ * \param networkStartIdleTime starting point of Network Idle Time Phase.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime);
+
+/** \brief Sets network management vector length.
+ * \param eray pointer to ERAY module registers.
+ * \param networkVectorLength length of network management vector.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength);
+
+/** \brief Sets channels connected to node.
+ * \param eray pointer to ERAY module registers.
+ * \param channelAConnectedNode whether node connected to channel A or not.
+ * \param channelBConnectedNode whether node connected to channel B or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode);
+
+/** \brief Sets offset correction starting point.
+ * \param eray pointer to ERAY module registers.
+ * \param correctionOffset offset correction start point.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset);
+
+/** \brief requests to receive the frame.
+ * \param eray pointer to ERAY module registers.
+ * \param receiveRequested whether frame to be received or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested);
+
+/** \brief Sets receive wakeup times.
+ * \param eray pointer to ERAY module registers.
+ * \param receiveWakeupTestDuration duration of receive wakeup pattern.
+ * \param receiveWakeupIdleTime duration of receive wakeup idle time.
+ * \param receiveWakeupLowTime duration of receive wakeup low time.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime);
+
+/** \brief sets buffer number in which frame is received.
+ * \param eray pointer to ERAY module registers.
+ * \param bufferIndex buffer number in which frame is received.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex);
+
+/** \brief Sets slots action points.
+ * \param eray pointer to ERAY module registers.
+ * \param staticActionPoint static slots and symbol window action point.
+ * \param dynamicActionPoint dynamic slots action point.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint);
+
+/** \brief Sets static slots count and length.
+ * \param eray pointer to ERAY module registers.
+ * \param staticSlotLength duration of static slot in macroticks.
+ * \param staticSlotsCount number of static slots in a communication cycle.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount);
+
+/** \brief Sets sample point for strobing.
+ * \param eray pointer to ERAY module registers.
+ * \param strobePosition strobing sample count.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition);
+
+/** \brief Sets channels which transmits symbols.
+ * \param eray pointer to ERAY module registers.
+ * \param channelASymbolTransmitted whether symbol is transmitted in Channel A or not.
+ * \param channelBSymbolTransmitted whether symbol is transmitted in Channel B or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted);
+
+/** \brief Sets the transmit slot mode.
+ * \param eray pointer to ERAY module registers.
+ * \param transmissionSlotMode transmission slot mode.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode);
+
+/** \brief Sets transmission start time duration.
+ * \param eray pointer to ERAY module registers.
+ * \param transmissionStartTime transmission start time.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime);
+
+/** \brief Sets transfer request to send frame.
+ * \param eray pointer to ERAY module registers.
+ * \param transferRequested whether transfer requested or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested);
+
+/** \brief Sets transmit wakeup times.
+ * \param eray pointer to ERAY module registers.
+ * \param transmitWakeupRepetitions transmission wakeup repetitions.
+ * \param transmitWakeupIdleTime duration of transmit wakeup idle time.
+ * \param transmitWakeupLowTime duration of transmit wakeup low time.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime);
+
+/** \brief Configures transmitted frames for startup and synchronization.
+ * \param eray pointer to ERAY module registers.
+ * \param startupFrameTransmitted whether startup Frame transmitted or not.
+ * \param synchFrameTransmitted whether synch Frame transmitted or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted);
+
+/** \brief Sets the transmit buffer number.
+ * \param eray pointer to ERAY module registers.
+ * \param bufferIndex buffer number in which frame is sent.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex);
+
+/** \brief Swaps the shadow and Host output registers.
+ * \param eray pointer to ERAY module registers.
+ * \param swapRequested whether swap is requested or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested);
+
+/** \brief Sets the cluster wakeup channel.
+ * \param eray pointer to ERAY module registers.
+ * \param wakeupPatternChannel cluster wakeup pattern channel.
+ * \return None
+ */
+IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Std_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief requests to receive data from message buffer.
+ * \param eray pointer to ERAY module registers.
+ * \param dataReceived whether data to be received or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived);
+
+/** \brief sets the bit to send data in frame.
+ * \param eray pointer to ERAY module registers.
+ * \param dataTransfered whether data transfered or not.
+ * \return None
+ */
+IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Calculate and returns the CRC for frame.
+ * \param payloadLength payload length configured for frame.
+ * \param frameId slot id
+ * \param startupFrameIndicator whether startup frame is indicated or not.
+ * \param syncFrameIndicator whether sync frame is indicated or not.
+ * \return calculated CRC value.
+ */
+IFX_EXTERN uint16 IfxEray_calcHeaderCrc(uint8 payloadLength, uint16 frameId, boolean startupFrameIndicator, boolean syncFrameIndicator);
+
+/** \brief Reads the received data from output registers.
+ * \param eray pointer to ERAY module registers.
+ * \param data pointer to received data buffer.
+ * \param payloadLength payload length received in a frame.
+ * \return None
+ */
+IFX_EXTERN void IfxEray_readData(Ifx_ERAY *eray, uint32 *data, uint8 payloadLength);
+
+/** \brief Reads header and data from output buffers.
+ * \param eray pointer to ERAY module registers.
+ * \param header header received in a frame.
+ * \param data data received in a frame.
+ * \param maxPayloadLength maximum payload length received in a frame.
+ * \return None
+ */
+IFX_EXTERN void IfxEray_readFrame(Ifx_ERAY *eray, IfxEray_ReceivedHeader *header, uint32 *data, Ifx_SizeT maxPayloadLength);
+
+/** \brief Writes header and data to Input buffers and set the slots.
+ * \param eray pointer to ERAY module registers.
+ * \param header Header section of message buffer.
+ * \param data data section of message buffer.
+ * \param slotConfig pointer slot allocation configuration structure.
+ * \return None
+ */
+IFX_EXTERN void IfxEray_setSlot(Ifx_ERAY *eray, const IfxEray_Header *header, const uint32 *data, const IfxEray_SlotConfig *slotConfig);
+
+/** \brief Writes data section of a frame to input data registers.
+ * \param eray pointer to ERAY module registers.
+ * \param data data segment in a frame.
+ * \param payloadLength payload length configured for slot buffer.
+ * \return None
+ */
+IFX_EXTERN void IfxEray_writeData(Ifx_ERAY *eray, const uint32 *data, uint8 payloadLength);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the FIFO index.
+ * \param eray pointer to ERAY module registers.
+ * \return FIFO buffer index.
+ */
+IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param eray Pointer to ERAY module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode);
+
+/** \brief Provides functionality for both setting of pin direction as input and configuring pad driver.
+ * \param rx the RX Pin which should be configured.
+ * \param rxMode the pin input mode which should be configured.
+ * \param padDriver Pad Driver Configuration
+ * \return None
+ */
+IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxEray_clearErrorFlag(Ifx_ERAY *eray, IfxEray_ClearErrorFlag errorFlag)
+{
+ eray->EIR.U = errorFlag;
+}
+
+
+IFX_INLINE void IfxEray_clearStatusFlag(Ifx_ERAY *eray, IfxEray_ClearStatusFlag statusFlag)
+{
+ eray->SIR.U = statusFlag;
+}
+
+
+IFX_INLINE void IfxEray_disableModule(Ifx_ERAY *eray)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ //disable the module
+ eray->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxEray_enableModule(Ifx_ERAY *eray)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ // Run Mode Clock divider to 1
+ //enable the module
+ eray->CLC.U = 0x00000100;
+
+ // ensure that write access finished before leaving this function
+ if (eray->CLC.U)
+ {}
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE Ifx_ERAY_EIR IfxEray_getErrorInterrupts(Ifx_ERAY *eray)
+{
+ Ifx_ERAY_EIR interruptFlags;
+ interruptFlags.U = eray->EIR.U;
+ return interruptFlags;
+}
+
+
+IFX_INLINE uint8 IfxEray_getFifoIndex(Ifx_ERAY *eray)
+{
+ return eray->MRC.B.FFB;
+}
+
+
+IFX_INLINE Ifx_ERAY_FSR IfxEray_getFifoStatus(Ifx_ERAY *eray)
+{
+ Ifx_ERAY_FSR fifoStatus;
+ fifoStatus.U = eray->FSR.U;
+ return fifoStatus;
+}
+
+
+IFX_INLINE boolean IfxEray_getInputBufferBusyHostStatus(Ifx_ERAY *eray)
+{
+ return (eray->IBCR.B.IBSYH == 1) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE uint8 IfxEray_getInputBufferBusyShadowStatus(Ifx_ERAY *eray)
+{
+ return (eray->IBCR.B.IBSYS == 1) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInputBufferBusySrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].IBUSY;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine0SrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].INT[0];
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getInterruptLine1SrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].INT[1];
+}
+
+
+IFX_INLINE boolean IfxEray_getMessageBufferInterruptStatus(Ifx_ERAY *eray, uint8 messageBuffer)
+{
+ uint8 ix = messageBuffer / 32;
+ uint32 mask = 1 << (messageBuffer % 32);
+ Ifx_ERAY_MBSC1 *mbscSFR = (Ifx_ERAY_MBSC1 *)((uint32)&eray->MBSC1 + 4 * ix);
+ boolean messageBufferInterrupt = (mbscSFR->U & mask) ? TRUE : FALSE;
+
+ return messageBufferInterrupt;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus0SrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].MBSC[0];
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getMessageBufferStatus1SrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].MBSC[1];
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt0SrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].NDAT[0];
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getNewDataInterrupt1SrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].NDAT[1];
+}
+
+
+IFX_INLINE boolean IfxEray_getNewDataInterruptStatus(Ifx_ERAY *eray, uint8 ndat)
+{
+ uint8 ix = ndat / 32;
+ uint32 mask = 1 << (ndat % 32);
+ Ifx_ERAY_NDAT1 *ndatSFR = (Ifx_ERAY_NDAT1 *)((uint32)&eray->NDAT1 + 4 * ix);
+ boolean ndatInterrupt = (ndatSFR->U & mask) ? TRUE : FALSE;
+
+ return ndatInterrupt;
+}
+
+
+IFX_INLINE uint8 IfxEray_getOutputBuffer(Ifx_ERAY *eray)
+{
+ return eray->OBCR.B.OBRH;
+}
+
+
+IFX_INLINE boolean IfxEray_getOutputBufferBusyShadowStatus(Ifx_ERAY *eray)
+{
+ return (eray->OBCR.B.OBSYS == 1) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getOutputBufferBusySrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].OBUSY;
+}
+
+
+IFX_INLINE IfxEray_PocState IfxEray_getPocState(Ifx_ERAY *eray)
+{
+ return (IfxEray_PocState)eray->CCSV.B.POCS;
+}
+
+
+IFX_INLINE Ifx_ERAY_SIR IfxEray_getStatusInterrupts(Ifx_ERAY *eray)
+{
+ Ifx_ERAY_SIR interruptFlags;
+ interruptFlags.U = eray->SIR.U;
+ return interruptFlags;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt0SrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].TINT[0];
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEray_getTimerInterrupt1SrcPtr(Ifx_ERAY *eray)
+{
+ IFX_UNUSED_PARAMETER(eray);
+ return &MODULE_SRC.ERAY.ERAY[0].TINT[1];
+}
+
+
+IFX_INLINE IfxEray_WakeupChannel IfxEray_getWakeupPatternReceivedChannel(Ifx_ERAY *eray)
+{
+ IfxEray_WakeupChannel wakeupChannel = IfxEray_WakeupChannel_a;
+
+ if (eray->SIR.B.WUPA == 1)
+ {
+ wakeupChannel = IfxEray_WakeupChannel_a;
+ }
+ else if (eray->SIR.B.WUPB == 1)
+ {
+ wakeupChannel = IfxEray_WakeupChannel_b;
+ }
+
+ return wakeupChannel;
+}
+
+
+IFX_INLINE void IfxEray_initRxPin(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode)
+{
+ IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, rxMode);
+
+ if (rx->nodeId == IfxEray_NodeId_a)
+ {
+ rx->module->CUST1.B.RISA = rx->select;
+ }
+ else
+ {
+ rx->module->CUST1.B.RISB = rx->select;
+ }
+}
+
+
+IFX_INLINE void IfxEray_initTxEnPin(const IfxEray_Txen_Out *txEn, IfxPort_OutputMode txEnMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(txEn->pin.port, txEn->pin.pinIndex, txEnMode, txEn->select);
+ IfxPort_setPinPadDriver(txEn->pin.port, txEn->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE void IfxEray_initTxPin(const IfxEray_Txd_Out *tx, IfxPort_OutputMode txMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, txMode, tx->select);
+ IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE boolean IfxEray_isModuleSuspended(Ifx_ERAY *eray)
+{
+ Ifx_ERAY_OCS ocs;
+
+ // read the status
+ ocs.U = eray->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxEray_receiveData(Ifx_ERAY *eray, boolean dataReceived)
+{
+ eray->OBCM.B.RDSS = dataReceived;
+}
+
+
+IFX_INLINE void IfxEray_receiveHeader(Ifx_ERAY *eray, boolean headerReceived)
+{
+ eray->OBCM.B.RHSS = headerReceived;
+}
+
+
+IFX_INLINE void IfxEray_sendData(Ifx_ERAY *eray, boolean dataTransfered)
+{
+ eray->IBCM.B.LDSH = dataTransfered;
+}
+
+
+IFX_INLINE void IfxEray_sendHeader(Ifx_ERAY *eray, boolean headerTransfered)
+{
+ eray->IBCM.B.LHSH = headerTransfered;
+}
+
+
+IFX_INLINE void IfxEray_setActiveCyclePairs(Ifx_ERAY *eray, uint8 numberOfCyclePairsForActive)
+{
+ eray->SUCC1.B.PTA = numberOfCyclePairsForActive;
+}
+
+
+IFX_INLINE void IfxEray_setAutoDelayBuffers(Ifx_ERAY *eray)
+{
+ eray->CUST1.B.IEN = 1;
+ eray->CUST1.B.OEN = 1;
+ eray->CUST3.U = 0xFFFFFFFF;
+}
+
+
+IFX_INLINE void IfxEray_setBaudrate(Ifx_ERAY *eray, IfxEray_Baudrate baudrate)
+{
+ eray->PRTC1.B.BRP = baudrate;
+}
+
+
+IFX_INLINE void IfxEray_setBufferReconfigSecure(Ifx_ERAY *eray, uint8 secureValue)
+{
+ eray->MRC.B.SEC = secureValue;
+}
+
+
+IFX_INLINE void IfxEray_setChannelAInitialOffsets(Ifx_ERAY *eray, uint8 channelAMicrotickInitialOffset, uint8 channelAMacrotickInitialOffset)
+{
+ eray->GTUC03.B.UIOA = channelAMicrotickInitialOffset;
+ eray->GTUC03.B.MIOA = channelAMacrotickInitialOffset;
+}
+
+
+IFX_INLINE void IfxEray_setChannelBInitialOffsets(Ifx_ERAY *eray, uint8 channelBMicrotickInitialOffset, uint8 channelBMacrotickInitialOffset)
+{
+ eray->GTUC03.B.UIOB = channelBMicrotickInitialOffset;
+ eray->GTUC03.B.MIOB = channelBMacrotickInitialOffset;
+}
+
+
+IFX_INLINE void IfxEray_setChannelsReceiveDelay(Ifx_ERAY *eray, uint8 channelAReceptionDelay, uint8 channelBReceptionDelay)
+{
+ eray->GTUC05.B.DCA = channelAReceptionDelay;
+ eray->GTUC05.B.DCB = channelBReceptionDelay;
+}
+
+
+IFX_INLINE void IfxEray_setClockCorrectionCycles(Ifx_ERAY *eray, uint8 clockCorrectionCyclesPassive, uint8 clockCorrectionCyclesHalt)
+{
+ Ifx_ERAY_SUCC3 succ3;
+ succ3.U = 0;
+ succ3.B.WCP = clockCorrectionCyclesPassive;
+ succ3.B.WCF = clockCorrectionCyclesHalt;
+ eray->SUCC3.U = succ3.U;
+}
+
+
+IFX_INLINE void IfxEray_setClockSynchErrorHalt(Ifx_ERAY *eray, boolean clockSyncErrorHalt)
+{
+ eray->SUCC1.B.HCSE = clockSyncErrorHalt;
+}
+
+
+IFX_INLINE void IfxEray_setClusterDriftValues(Ifx_ERAY *eray, uint8 clusterDrift, uint16 maxDriftOffset)
+{
+ eray->GTUC05.B.CDD = clusterDrift;
+ eray->GTUC06.B.MOD = maxDriftOffset;
+}
+
+
+IFX_INLINE void IfxEray_setClusterStartupDeviation(Ifx_ERAY *eray, uint16 acceptedStartupDeviation)
+{
+ eray->GTUC06.B.ASR = acceptedStartupDeviation;
+}
+
+
+IFX_INLINE void IfxEray_setCollisionAvoidanceDuration(Ifx_ERAY *eray, uint8 collisionAvoidanceDuration)
+{
+ eray->PRTC1.B.CASM = collisionAvoidanceDuration;
+}
+
+
+IFX_INLINE void IfxEray_setCycleDurationMacroticks(Ifx_ERAY *eray, uint16 macroticks)
+{
+ eray->GTUC02.B.MPC = macroticks;
+}
+
+
+IFX_INLINE void IfxEray_setCycleDurationMicroticks(Ifx_ERAY *eray, uint32 microticks)
+{
+ eray->GTUC01.U = microticks;
+}
+
+
+IFX_INLINE void IfxEray_setDecodingCorrectionValue(Ifx_ERAY *eray, uint8 decodingCorrection)
+{
+ eray->GTUC05.B.DEC = decodingCorrection;
+}
+
+
+IFX_INLINE void IfxEray_setDynamicSlots(Ifx_ERAY *eray, uint8 dynamicSlotLength, uint16 dynamicSlotCount, IfxEray_IdleDynamicSlots idleDynamicSlots)
+{
+ eray->GTUC08.B.MSL = dynamicSlotLength;
+ eray->GTUC08.B.NMS = dynamicSlotCount;
+ eray->GTUC09.B.DSI = idleDynamicSlots;
+}
+
+
+IFX_INLINE void IfxEray_setExternalCorrectionControl(Ifx_ERAY *eray, IfxEray_ExternalOffset externalOffset, IfxEray_ExternalRate externalRate)
+{
+ eray->GTUC11.B.EOCC = externalOffset;
+ eray->GTUC11.B.ERCC = externalRate;
+}
+
+
+IFX_INLINE void IfxEray_setExternalCorrectionValues(Ifx_ERAY *eray, IfxEray_ExternalOffsetCorrection externalOffsetCorrection, IfxEray_ExternalRateCorrection externalRateCorrection)
+{
+ eray->GTUC11.B.EOC = externalOffsetCorrection;
+ eray->GTUC11.B.ERC = externalRateCorrection;
+}
+
+
+IFX_INLINE void IfxEray_setFifoBufferStartIndex(Ifx_ERAY *eray, uint8 fifoBufferStartIndex)
+{
+ // Buffers from MRC.B.FFB to MRC.B.LCB are assigned FIFO
+ eray->MRC.B.FFB = fifoBufferStartIndex;
+}
+
+
+IFX_INLINE void IfxEray_setFifoFilterConfigurations(Ifx_ERAY *eray, uint16 rejectedFrameId, uint8 filteredCycleNumber, boolean fifoNullFramesRejected, uint16 frameIdFilter)
+{
+ eray->FRF.B.FID = rejectedFrameId;
+ eray->FRF.B.CYF = filteredCycleNumber;
+ eray->FRF.B.RNF = fifoNullFramesRejected;
+ eray->FRFM.B.MFID = frameIdFilter;
+}
+
+
+IFX_INLINE void IfxEray_setFifoMessageBufferConfigurations(Ifx_ERAY *eray, IfxEray_ReceiveChannel receiveChannel, boolean staticFifoDisabled, uint8 fifoDepth)
+{
+ eray->FRF.B.CH = receiveChannel;
+ eray->FRF.B.RSS = staticFifoDisabled;
+ eray->FCL.U = fifoDepth;
+}
+
+
+IFX_INLINE void IfxEray_setFirstDynamicBuffer(Ifx_ERAY *eray, uint8 firstDynamicBuffer)
+{
+ // 0: No static bufers, 0x01...0x7F: 0 to (MRC.B.FDB - 1) are static buffers, 0x80...0xFF:No dynamic buffers
+ eray->MRC.B.FDB = firstDynamicBuffer;
+}
+
+
+IFX_INLINE void IfxEray_setListenTimeOuts(Ifx_ERAY *eray, uint32 listenTimeOut, IfxEray_ListenTimeOutNoise listenTimeOutNoise)
+{
+ Ifx_ERAY_SUCC2 succ2;
+ succ2.U = 0;
+ succ2.B.LT = listenTimeOut;
+ succ2.B.LTN = listenTimeOutNoise;
+ eray->SUCC2.U = succ2.U;
+}
+
+
+IFX_INLINE void IfxEray_setMaxColdStartAttempts(Ifx_ERAY *eray, uint8 maxColdStartAttempts)
+{
+ eray->SUCC1.B.CSA = maxColdStartAttempts;
+}
+
+
+IFX_INLINE void IfxEray_setMaxCorrectionValues(Ifx_ERAY *eray, uint16 maxOffsetCorrection, uint16 maxRateCorrection)
+{
+ eray->GTUC10.B.MOC = maxOffsetCorrection;
+ eray->GTUC10.B.MRC = maxRateCorrection;
+}
+
+
+IFX_INLINE void IfxEray_setMaxSynchFrames(Ifx_ERAY *eray, IfxEray_MaxSynchFrames maxSyncFrames)
+{
+ eray->GTUC02.B.SNM = maxSyncFrames;
+}
+
+
+IFX_INLINE void IfxEray_setMessageBufferCount(Ifx_ERAY *eray, uint8 numberOfMessageBuffers)
+{
+ eray->MRC.B.LCB = numberOfMessageBuffers - 1;
+}
+
+
+IFX_INLINE void IfxEray_setMessageHandlerConfigurations(Ifx_ERAY *eray, uint8 staticFramepayload, uint8 latestTransmissionStart)
+{
+ Ifx_ERAY_MHDC mhdc;
+ mhdc.U = 0;
+ mhdc.B.SFDL = staticFramepayload;
+ mhdc.B.SLT = latestTransmissionStart;
+ eray->MHDC.U = mhdc.U;
+}
+
+
+IFX_INLINE void IfxEray_setNetworkStartIdleTime(Ifx_ERAY *eray, uint16 networkStartIdleTime)
+{
+ eray->GTUC04.B.NIT = networkStartIdleTime;
+}
+
+
+IFX_INLINE void IfxEray_setNetworkVectorLength(Ifx_ERAY *eray, uint32 networkVectorLength)
+{
+ eray->NEMC.U = networkVectorLength;
+}
+
+
+IFX_INLINE void IfxEray_setNodeChannels(Ifx_ERAY *eray, boolean channelAConnectedNode, boolean channelBConnectedNode)
+{
+ eray->SUCC1.B.CCHA = channelAConnectedNode;
+ eray->SUCC1.B.CCHB = channelBConnectedNode;
+}
+
+
+IFX_INLINE void IfxEray_setOffsetCorrection(Ifx_ERAY *eray, uint16 correctionOffset)
+{
+ eray->GTUC04.B.OCS = correctionOffset;
+}
+
+
+IFX_INLINE void IfxEray_setReceiveRequest(Ifx_ERAY *eray, boolean receiveRequested)
+{
+ eray->OBCR.B.REQ = receiveRequested;
+}
+
+
+IFX_INLINE void IfxEray_setReceiveWakeupTimes(Ifx_ERAY *eray, uint16 receiveWakeupTestDuration, uint8 receiveWakeupIdleTime, uint8 receiveWakeupLowTime)
+{
+ eray->PRTC1.B.RXW = receiveWakeupTestDuration;
+ eray->PRTC2.B.RXI = receiveWakeupIdleTime;
+ eray->PRTC2.B.RXL = receiveWakeupLowTime;
+}
+
+
+IFX_INLINE void IfxEray_setRxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
+{
+ eray->OBCR.B.OBRS = bufferIndex;
+}
+
+
+IFX_INLINE void IfxEray_setSleepMode(Ifx_ERAY *eray, IfxEray_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ eray->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxEray_setSlotActionPoints(Ifx_ERAY *eray, uint8 staticActionPoint, uint8 dynamicActionPoint)
+{
+ eray->GTUC09.B.MAPO = dynamicActionPoint;
+ eray->GTUC09.B.APO = staticActionPoint;
+}
+
+
+IFX_INLINE void IfxEray_setStaticSlots(Ifx_ERAY *eray, uint16 staticSlotLength, uint16 staticSlotsCount)
+{
+ eray->GTUC07.B.SSL = staticSlotLength;
+ eray->GTUC07.B.NSS = staticSlotsCount;
+}
+
+
+IFX_INLINE void IfxEray_setStrobePosition(Ifx_ERAY *eray, IfxEray_StrobePosition strobePosition)
+{
+ eray->PRTC1.B.SPP = strobePosition;
+}
+
+
+IFX_INLINE void IfxEray_setSuspendMode(Ifx_ERAY *eray, IfxEray_SuspendMode mode)
+{
+ Ifx_ERAY_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ eray->OCS.U = ocs.U;
+}
+
+
+IFX_INLINE void IfxEray_setSymbolChannels(Ifx_ERAY *eray, boolean channelASymbolTransmitted, boolean channelBSymbolTransmitted)
+{
+ eray->SUCC1.B.MTSA = channelASymbolTransmitted;
+ eray->SUCC1.B.MTSB = channelBSymbolTransmitted;
+}
+
+
+IFX_INLINE void IfxEray_setTransmissionSlotMode(Ifx_ERAY *eray, IfxEray_TransmissionSlotMode transmissionSlotMode)
+{
+ eray->SUCC1.B.TSM = transmissionSlotMode;
+}
+
+
+IFX_INLINE void IfxEray_setTransmissionStartTime(Ifx_ERAY *eray, uint8 transmissionStartTime)
+{
+ eray->PRTC1.B.TSST = transmissionStartTime;
+}
+
+
+IFX_INLINE void IfxEray_setTransmitRequest(Ifx_ERAY *eray, boolean transferRequested)
+{
+ eray->IBCM.B.STXRH = transferRequested;
+}
+
+
+IFX_INLINE void IfxEray_setTransmitWakeupTimes(Ifx_ERAY *eray, uint8 transmitWakeupRepetitions, uint8 transmitWakeupIdleTime, uint8 transmitWakeupLowTime)
+{
+ eray->PRTC1.B.RWP = transmitWakeupRepetitions;
+ eray->PRTC2.B.TXI = transmitWakeupIdleTime;
+ eray->PRTC2.B.TXL = transmitWakeupLowTime;
+}
+
+
+IFX_INLINE void IfxEray_setTransmittedFrames(Ifx_ERAY *eray, boolean startupFrameTransmitted, boolean synchFrameTransmitted)
+{
+ eray->SUCC1.B.TXST = startupFrameTransmitted;
+ eray->SUCC1.B.TXSY = synchFrameTransmitted;
+}
+
+
+IFX_INLINE void IfxEray_setTxBufferNumber(Ifx_ERAY *eray, uint8 bufferIndex)
+{
+ eray->IBCR.B.IBRH = bufferIndex;
+}
+
+
+IFX_INLINE void IfxEray_setViewData(Ifx_ERAY *eray, boolean swapRequested)
+{
+ eray->OBCR.B.VIEW = swapRequested;
+}
+
+
+IFX_INLINE void IfxEray_setWakeupPatternChannel(Ifx_ERAY *eray, IfxEray_WakeupChannel wakeupPatternChannel)
+{
+ eray->SUCC1.B.WUCS = wakeupPatternChannel;
+}
+
+
+IFX_INLINE void IfxEray_waitForPocState(Ifx_ERAY *eray, IfxEray_PocState pocState)
+{
+ while (eray->CCSV.B.POCS != (uint8)pocState)
+ {}
+}
+
+
+IFX_INLINE void IfxEray_initRxPinWithPadLevel(const IfxEray_Rxd_In *rx, IfxPort_InputMode rxMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, rxMode);
+ IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
+
+ if (rx->nodeId == IfxEray_NodeId_a)
+ {
+ rx->module->CUST1.B.RISA = rx->select;
+ }
+ else
+ {
+ rx->module->CUST1.B.RISB = rx->select;
+ }
+}
+
+
+#endif /* IFXERAY_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Phy_Pef7071/IfxEth_Phy_Pef7071.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Phy_Pef7071/IfxEth_Phy_Pef7071.c
new file mode 100644
index 0000000..f0fdf15
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Phy_Pef7071/IfxEth_Phy_Pef7071.c
@@ -0,0 +1,243 @@
+/**
+ * \file IfxEth_Phy_Pef7071.c
+ * \brief ETH PHY_PEF7071 details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxEth_Phy_Pef7071.h"
+
+/******************************************************************************/
+/*----------------------------------Macros------------------------------------*/
+/******************************************************************************/
+
+#define IFXETH_PHY_PEF7071_MDIO_CTRL 0x00
+
+#define IFXETH_PHY_PEF7071_MDIO_STAT 0x01
+
+#define IFXETH_PHY_PEF7071_MDIO_PHYID1 0x02
+
+#define IFXETH_PHY_PEF7071_MDIO_PHYID2 0x03
+
+#define IFXETH_PHY_PEF7071_MDIO_AN_ADV 0x04
+
+#define IFXETH_PHY_PEF7071_MDIO_AN_LPA 0x05
+
+#define IFXETH_PHY_PEF7071_MDIO_AN_EXP 0x06
+
+#define IFXETH_PHY_PEF7071_MDIO_AN_NPTX 0x07
+
+#define IFXETH_PHY_PEF7071_MDIO_AN_NPRX 0x08
+
+#define IFXETH_PHY_PEF7071_MDIO_GCTRL 0x09
+
+#define IFXETH_PHY_PEF7071_MDIO_GSTAT 0x0A
+
+#define IFXETH_PHY_PEF7071_MDIO_RES11 0x0B
+
+#define IFXETH_PHY_PEF7071_MDIO_RES12 0x0C
+
+#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL 0x0D
+
+#define IFXETH_PHY_PEF7071_MDIO_MMDDATA 0x0E
+
+#define IFXETH_PHY_PEF7071_MDIO_XSTAT 0x0F
+
+#define IFXETH_PHY_PEF7071_MDIO_PHYPERF 0x10
+
+#define IFXETH_PHY_PEF7071_MDIO_PHYSTAT1 0x11
+
+#define IFXETH_PHY_PEF7071_MDIO_PHYSTAT2 0x12
+
+#define IFXETH_PHY_PEF7071_MDIO_PHYCTL1 0x13
+
+#define IFXETH_PHY_PEF7071_MDIO_PHYCTL2 0x14
+
+#define IFXETH_PHY_PEF7071_MDIO_ERRCNT 0x15
+
+#define IFXETH_PHY_PEF7071_MDIO_EECTRL 0x16
+
+#define IFXETH_PHY_PEF7071_MDIO_MIICTRL 0x17
+
+#define IFXETH_PHY_PEF7071_MDIO_MIISTAT 0x18
+
+#define IFXETH_PHY_PEF7071_MDIO_IMASK 0x19
+
+#define IFXETH_PHY_PEF7071_MDIO_ISTAT 0x1A
+
+#define IFXETH_PHY_PEF7071_MDIO_LED 0x1B
+
+#define IFXETH_PHY_PEF7071_MDIO_TPGCTRL 0x1C
+
+#define IFXETH_PHY_PEF7071_MDIO_TPGDATA 0x1D
+
+#define IFXETH_PHY_PEF7071_MDIO_FWV 0x1E
+
+#define IFXETH_PHY_PEF7071_MDIO_RES1F 0x1F
+
+#define IFXETH_PHY_PEF7071_WAIT_GMII_READY() while (ETH_GMII_ADDRESS.B.GB) {}
+
+/** \brief Access type for indirectly accessing Address Type of MMD register in PHY
+ */
+#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR 0x00
+
+/** \brief Access type for indirectly accessing Data Type of MMD register in PHY
+ */
+#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA 0x4000
+
+/** \brief Access type for indirectly accessing Data Type with post increment of MMD register in PHY
+ */
+#define IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA_PI 0x8000
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+uint32 IfxEth_Phy_Pef7071_iPhyInitDone = 0;
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+uint32 IfxEth_Phy_Pef7071_init(void)
+{
+ IFXETH_PHY_PEF7071_WAIT_GMII_READY();
+
+ /* // read once all PHY registers
+ * int i;
+ * for(i = 0; i < 31; i++)
+ * {
+ * uint32 value;
+ * read_mdio_reg(0, i, &value);
+ * } */
+
+ // reset PHY
+ IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, 0x8000); // reset
+ uint32 value;
+
+ do
+ {
+ IfxEth_Phy_Pef7071_read_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, &value);
+ } while (value & 0x8000); // wait for reset to finish
+
+ // setup PHY
+ IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_MIICTRL, 0xF702); // skew adaptation is needed, RMII mode (10/100MBit)
+ IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_GCTRL, 0x0000); // advertise no 1000BASE-T (full/half duplex)
+ IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_AN_ADV, 0x0101); // advertise 100BASE-TX full duplex only
+ IfxEth_Phy_Pef7071_write_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_CTRL, 0x1200); // enable auto-negotiation, restart auto-negotiation
+
+ // we set our loop mode (RJ45) in side the PHY (PHYCTL1 register) if we will have a loop
+ // if (CONFIG_ETH._loop)
+ // write_mdio_reg (0, 0x13, (0x4 << 13) | 0x1);
+
+ // done
+ IfxEth_Phy_Pef7071_iPhyInitDone = 1;
+
+ return 1;
+}
+
+
+boolean IfxEth_Phy_Pef7071_link(void)
+{
+ boolean linkEstablished = FALSE;
+
+ if (IfxEth_Phy_Pef7071_iPhyInitDone)
+ {
+ uint32 value;
+ IfxEth_Phy_Pef7071_read_mdio_reg(0, IFXETH_PHY_PEF7071_MDIO_STAT, &value);
+ linkEstablished = ((value & (1 << 2)) != 0) ? TRUE : FALSE;
+ }
+
+ return linkEstablished;
+}
+
+
+void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata)
+{
+ // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Read, Busy
+ ETH_GMII_ADDRESS.U = (layeraddr << 11) | (regaddr << 6) | (0 << 2) | (0 << 1) | (1 << 0);
+
+ IFXETH_PHY_PEF7071_WAIT_GMII_READY();
+
+ // get data
+ *pdata = ETH_GMII_DATA.U;
+}
+
+
+void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data)
+{
+ // put data
+ ETH_GMII_DATA.U = data;
+
+ // 5bit Physical Layer Adddress, 5bit GMII Regnr, 4bit csrclock divider, Write, Busy
+ ETH_GMII_ADDRESS.U = (layeraddr << 11) | (regaddr << 6) | (0 << 2) | (1 << 1) | (1 << 0);
+
+ IFXETH_PHY_PEF7071_WAIT_GMII_READY();
+}
+
+
+void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
+{
+ /* Select access type as ADDR for MMD access and select the Device address */
+ IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR | devaddr);
+/* Select PHY register for write operation */
+ IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, regaddr);
+/* select the DATA operation and device address */
+ IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA | devaddr);
+/* Write the data */
+ IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, data);
+}
+
+
+void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data)
+{
+ /* Select access type as ADDR for MMD access and select the Device address */
+ IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_ADDR | devaddr);
+ /* Select PHY register for read operation */
+ IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, regaddr);
+/* select the DATA operation and device address */
+ IfxEth_Phy_Pef7071_write_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDCTRL, IFXETH_PHY_PEF7071_MDIO_MMDCTRL_ACCESSTYPE_DATA | devaddr);
+/* Read the data */
+ IfxEth_Phy_Pef7071_read_mdio_reg(layeraddr, IFXETH_PHY_PEF7071_MDIO_MMDDATA, &data);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Phy_Pef7071/IfxEth_Phy_Pef7071.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Phy_Pef7071/IfxEth_Phy_Pef7071.h
new file mode 100644
index 0000000..edcea73
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Phy_Pef7071/IfxEth_Phy_Pef7071.h
@@ -0,0 +1,111 @@
+/**
+ * \file IfxEth_Phy_Pef7071.h
+ * \brief ETH PHY_PEF7071 details
+ * \ingroup IfxLld_Eth
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Eth_Phy_Pef7071 PHY_PEF7071
+ * \ingroup IfxLld_Eth
+ * \defgroup IfxLld_Eth_Phy_Pef7071_Functions Functions
+ * \ingroup IfxLld_Eth_Phy_Pef7071
+ */
+
+#ifndef IFXETH_PHY_PEF7071_H
+#define IFXETH_PHY_PEF7071_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Eth/Std/IfxEth.h"
+/** \addtogroup IfxLld_Eth_Phy_Pef7071_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \return Status
+ */
+IFX_EXTERN uint32 IfxEth_Phy_Pef7071_init(void);
+
+/**
+ * \return Link status
+ */
+IFX_EXTERN boolean IfxEth_Phy_Pef7071_link(void);
+
+/**
+ * \return None
+ */
+IFX_EXTERN void IfxEth_Phy_Pef7071_read_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 *pdata);
+
+/**
+ * \return None
+ */
+IFX_EXTERN void IfxEth_Phy_Pef7071_write_mdio_reg(uint32 layeraddr, uint32 regaddr, uint32 data);
+
+/** \brief Write the data into the MMD register of PHY
+ * \param layeraddr physical layer address
+ * \param devaddr Device address in PHY
+ * \param regaddr Register address in PHY
+ * \param data Data to be written
+ * \return None
+ */
+IFX_EXTERN void IfxEth_Phy_Pef7071_write_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data);
+
+/** \brief Read data from MMD register of PHY
+ * \param layeraddr physical layer address
+ * \param devaddr Device address in PHY
+ * \param regaddr Register address in PHY
+ * \param data Data from PHY register
+ * \return None
+ */
+IFX_EXTERN void IfxEth_Phy_Pef7071_read_mmd_indirect(uint32 layeraddr, uint32 devaddr, uint32 regaddr, uint32 data);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN uint32 IfxEth_Phy_Pef7071_iPhyInitDone;
+
+#endif /* IFXETH_PHY_PEF7071_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Std/IfxEth.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Std/IfxEth.c
new file mode 100644
index 0000000..209527e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Std/IfxEth.c
@@ -0,0 +1,953 @@
+/**
+ * \file IfxEth.c
+ * \brief ETH basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxEth.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
+
+IfxEth_RxDescrList IfxEth_rxDescr;
+
+uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
+
+IfxEth_TxDescrList IfxEth_txDescr;
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxEth_disableModule(void)
+{
+ uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(l_TempVar);
+ ETH_CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(l_TempVar);
+}
+
+
+void IfxEth_enableModule(void)
+{
+ {
+ uint16 l_TempVar = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(l_TempVar);
+ ETH_CLC.U = 0;
+ IfxScuWdt_setCpuEndinit(l_TempVar);
+ }
+}
+
+
+void IfxEth_freeReceiveBuffer(IfxEth *eth)
+{
+ IfxEth_RxDescr *descr = IfxEth_getActualRxDescriptor(eth);
+ IfxEth_RxDescr_release(descr);
+ IfxEth_shuffleRxDescriptor(eth);
+}
+
+
+void *IfxEth_getReceiveBuffer(IfxEth *eth)
+{
+ void *result = 0;
+ IfxEth_RxDescr *descr;
+
+ if (IfxEth_isRxDataAvailable(eth))
+ {
+ eth->rxCount++;
+ descr = IfxEth_getActualRxDescriptor(eth);
+ result = (void *)(descr->RDES2.U);
+ }
+
+ IfxEth_wakeupReceiver(eth);
+
+ return result;
+}
+
+
+void *IfxEth_getTransmitBuffer(IfxEth *eth)
+{
+ void *buffer = NULL_PTR;
+ IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
+
+ // check descriptor / buffer is free.
+ if (descr->TDES0.A.OWN == 0)
+ {
+ buffer = ((void *)descr->TDES2.U);
+ }
+
+ return buffer;
+}
+
+
+void IfxEth_init(IfxEth *eth, const IfxEth_Config *config)
+{
+ eth->ethSfr = config->ethSfr;
+
+#ifndef _WIN32
+ IfxEth_enableModule();
+
+ if (config->phyInterfaceMode == IfxEth_PhyInterfaceMode_rmii)
+ {
+ if (config->rmiiPins != NULL_PTR)
+ {
+ IfxEth_setupRmiiOutputPins(eth, config->rmiiPins);
+ IfxEth_setupRmiiInputPins(eth, config->rmiiPins);
+ }
+ }
+ else
+ {
+ if (config->miiPins != NULL_PTR)
+ {
+ IfxEth_setupMiiOutputPins(eth, config->miiPins);
+ IfxEth_setupMiiInputPins(eth, config->miiPins);
+ }
+ }
+
+#endif
+
+ IfxEth_resetModule();
+
+ /* select the Phy Interface Mode */
+ IfxEth_setPhyInterfaceMode(eth, config->phyInterfaceMode);
+ IfxEth_applySoftwareReset(eth);
+
+ /* wait until reset is finished or timeout. */
+ {
+ uint32 timeout = 0;
+
+ while ((IfxEth_isSoftwareResetDone(eth) == 0) && (timeout < IFXETH_MAX_TIMEOUT_VALUE))
+ {
+ timeout++;
+ }
+ }
+
+ /* configure bus mode */
+ {
+ Ifx_ETH_BUS_MODE busMode;
+ busMode.U = ETH_BUS_MODE.U;
+ busMode.B.DSL = 0; /* descriptor skip length in ring mode */
+ busMode.B.ATDS = 0; /* alternate descriptor size: 0 => 4 DWORDS, 1 => 8 DWORDS */
+ busMode.B.DA = 0; /* 0 = weighted round-robin, 1 = fixed priority */
+
+ ETH_BUS_MODE.U = busMode.U;
+ }
+
+ /* configure ETH MAC */
+ {
+ Ifx_ETH_MAC_CONFIGURATION ethMacCfg;
+ ethMacCfg.U = ETH_MAC_CONFIGURATION.U;
+
+ ethMacCfg.B.PRELEN = 0; /* 7 bytes preamble */
+ // ethMacCfg.B.RE = 0; /* disable receiver */
+ // ethMacCfg.B.TE = 0; /* disable transmitter */
+ ethMacCfg.B.DC = 0; /* Deferral Check */
+ // ethMacCfg.B.BL = 0; /* Backoff Limit */
+ ethMacCfg.B.ACS = 1; /* Automatic Pad/CRC stripping--less than 1536 bytes */
+ // ethMacCfg.B.DR = 0; /* Disable Retry */
+ ethMacCfg.B.IPC = 0; /* checksum offload */
+ ethMacCfg.B.DM = 1; /* Duplex Mode: 0=Half Duplex, 1=Full duplex */
+ ethMacCfg.B.LM = 0; /* Loopback Mode */
+ // ethMacCfg.B.DO = 0; /* Disable Receive Own */
+ ethMacCfg.B.FES = 1; /* Speed 0->10mbps 1->100mbps */
+ ethMacCfg.B.PS = 1; /* port select 10/100mbps */
+ ethMacCfg.B.IFG = 0; /* Inter Frame Gap - gap between frames = 96 bit times */
+ ethMacCfg.B.JE = 0; /* Jumbo Frame Enable - no jumbo frames */
+ ethMacCfg.B.JD = 0; /* Jabber Disable - cut of transmission after 2,048 data bytes. */
+ ethMacCfg.B.WD = 0; /* Watchdog Disable - cut off frame after 2,048 bytes. */
+ ethMacCfg.B.CST = 1; /* CRC stripping - last four bytes are stripped and dropped to application. */
+ ethMacCfg.B.TWOKPE = 0; /* 2K Packets Enable - with JE=0 - all received frames of size > 1,518bytes are Giant frames.*/
+
+ ETH_MAC_CONFIGURATION.U = ethMacCfg.U;
+ }
+
+ IfxEth_setMacAddress(eth, config->macAddress);
+
+ /* setup MMC */
+ ETH_MMC_CONTROL.B.CNTFREEZ = 1; /* disable MMC counters - counters reset */
+
+ /* setup GMAC */
+ ETH_STATUS.U = 0x0001e7ff; /* reset all interrupt flag(s) */
+ ETH_MAC_FRAME_FILTER.U = 0x00000010; /* Hash Unicast */
+
+ ETH_INTERRUPT_ENABLE.U = 0x00010041; /* enable tx & rx interrupts */
+
+#ifndef _WIN32
+
+ if (config->isrPriority)
+ {
+ IfxSrc_init(&SRC_ETH, config->isrProvider, config->isrPriority);
+ IfxSrc_enable(&SRC_ETH);
+ }
+
+ if (config->phyInit != NULL_PTR)
+ {
+ config->phyInit(); /* init PHY (100Mbit, full duplex with RMII) */
+ }
+
+#endif
+
+ eth->config = *config;
+ eth->error = 0;
+ eth->status.U = 0;
+ eth->rxCount = 0;
+ eth->txCount = 0;
+
+ IfxEth_stopTransmitter(eth);
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, sizeof(IfxEth_TxDescr) == (IFXETH_DESCR_SIZE * sizeof(uint32)));
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, sizeof(IfxEth_RxDescr) == (IFXETH_DESCR_SIZE * sizeof(uint32)));
+
+ eth->rxDescr = config->rxDescr;
+ eth->txDescr = config->txDescr;
+
+ eth->descriptorMode = config->descriptorMode;
+
+ if (config->descriptorMode == IfxEth_DescriptorMode_chain)
+ {
+ IfxEth_initReceiveDescriptors(eth);
+ IfxEth_initTransmitDescriptors(eth);
+ }
+ else if (config->descriptorMode == IfxEth_DescriptorMode_ring)
+ {
+ IfxEth_initReceiveDescriptorsRingMode(eth, &config->ringModeBuffersConfig.rxConfig);
+ IfxEth_initTransmitDescriptorsRingMode(eth, &config->ringModeBuffersConfig.txConfig);
+ }
+ else
+ {}
+}
+
+
+void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr)
+{
+ const IfxEth_Config defaultConfig = {
+ {0x00, 0x11, 0x22, 0x33, 0x44, 0x55}, /* MAC address */
+ NULL_PTR,
+ NULL_PTR,
+ IfxEth_PhyInterfaceMode_rmii, /* PHY Interfac mode RMII */
+ NULL_PTR, /* Pointer to the RMII pin config */
+ NULL_PTR, /* Pointer to the MII pin config */
+ (Ifx_Priority)0, /* Interrupt serivce priority */
+ IfxSrc_Tos_cpu0, /* Interrupt serivce provider */
+ NULL_PTR, /* Pointer to register base */
+ &IfxEth_rxDescr, /* pointer to RX descriptor RAM */
+ &IfxEth_txDescr, /* pointer to TX descriptor RAM */
+ IfxEth_DescriptorMode_chain, /* chain mode descreptors */
+ {
+ {
+ IfxEth_RingModeBufferUsed_buffer1,
+ 0x0,
+ 0x0,
+ IFXETH_RTX_BUFFER_SIZE,
+ 0,
+ },
+ {
+ IfxEth_RingModeBufferUsed_buffer1,
+ 0x0,
+ 0x0,
+ IFXETH_RTX_BUFFER_SIZE,
+ 0,
+ },
+ },
+ };
+
+ *config = defaultConfig;
+ config->ethSfr = ethSfr;
+}
+
+
+void IfxEth_initReceiveDescriptors(IfxEth *eth)
+{
+ /* Use enhanced descriptors, because ETH is generally configured to precision time protocol. */
+ int i;
+ IfxEth_RxDescr *descr = IfxEth_getBaseRxDescriptor(eth);
+
+ eth->pRxDescr = descr;
+
+ /* init descriptor chained mode */
+ for (i = 0; i < IFXETH_MAX_RX_BUFFERS; i++)
+ {
+ descr->RDES0.U = 0;
+ descr->RDES0.A.OWN = 1U;
+
+ descr->RDES1.U = 0;
+ descr->RDES1.A.RCH = 1U;
+ descr->RDES1.A.RBS1 = (IFXETH_RTX_BUFFER_SIZE);
+
+#ifndef IFXETH_RX_BUFFER_BY_USER
+ IfxEth_RxDescr_setBuffer(descr, &(IfxEth_rxBuffer[i][0]));
+#endif
+
+ /* with RCH set, link to next descriptor address */
+ descr->RDES3.U = (uint32)&(descr[1]);
+ descr = &descr[1];
+ }
+
+ /* correction for last descriptor */
+ {
+ descr = &descr[-1];
+
+ /* indicate end of ring */
+ descr->RDES1.A.RER = 1U;
+
+ /* with RCH set, link to first descriptor address */
+ eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
+ descr->RDES3.U = (uint32)eth->pRxDescr;
+ }
+
+ eth->rxCount = 0;
+
+ /* write descriptor list base address */
+ IfxEth_setReceiveDescriptorAddress(&MODULE_ETH, IfxEth_getBaseRxDescriptor(eth));
+}
+
+
+void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config)
+{
+ /* Use enhanced descriptors, because ETH is generally configured to precision time protocol. */
+ int i;
+ uint32 buffer1StartAddress = 0;
+ uint32 buffer2StartAddress = 0;
+
+ IfxEth_RxDescr *descr = IfxEth_getBaseRxDescriptor(eth);
+
+ eth->pRxDescr = descr;
+
+ /* init descriptors in ring mode */
+
+ for (i = 0; i < IFXETH_MAX_RX_BUFFERS; i++)
+ {
+ descr->RDES0.U = 0;
+ descr->RDES0.A.OWN = 1U;
+
+ descr->RDES1.U = 0;
+
+ if ((config->rxBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (config->rxBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->rxBuffer1Size) % 4 == 0);
+ buffer1StartAddress = (uint32)(config->rxBuffer1StartAddress + (config->rxBuffer1Size * i));
+ IfxEth_setReceiveBuffer1RingMode(eth, descr, buffer1StartAddress, config->rxBuffer1Size);
+ }
+ else
+ {
+ IfxEth_setReceiveBuffer1RingMode(eth, descr, 0x0, 0);
+ }
+
+ if ((config->rxBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (config->rxBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->rxBuffer2Size) % 4 == 0);
+ buffer2StartAddress = (uint32)(config->rxBuffer2StartAddress + (config->rxBuffer2Size * i));
+ IfxEth_setReceiveBuffer2RingMode(eth, descr, buffer2StartAddress, config->rxBuffer2Size);
+ }
+ else
+ {
+ IfxEth_setReceiveBuffer2RingMode(eth, descr, 0x0, 0);
+ }
+
+ descr = &descr[1];
+ }
+
+ /* correction for last descriptor */
+ {
+ descr = &descr[-1];
+
+ /* indicate end of ring */
+ descr->RDES1.A.RER = 1U;
+
+ eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
+ }
+
+ eth->rxCount = 0;
+
+ /* write descriptor list base address */
+ IfxEth_setReceiveDescriptorAddress(&MODULE_ETH, IfxEth_getBaseRxDescriptor(eth));
+
+ eth->rxBufferUsed = config->rxBufferUsed;
+}
+
+
+void IfxEth_initTransmitDescriptors(IfxEth *eth)
+{
+ int i;
+ IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
+
+ eth->pTxDescr = descr;
+
+ /* Initialize chained descriptor mode */
+ for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
+ {
+ descr->TDES0.U = 0;
+ descr->TDES0.A.IC = 1U;
+ descr->TDES0.A.FS = 1U;
+ descr->TDES0.A.LS = 1U;
+ descr->TDES0.A.TCH = 1U;
+
+#ifndef IFXETH_TX_BUFFER_BY_USER
+ IfxEth_TxDescr_setBuffer(descr, &(IfxEth_txBuffer[i][0]));
+#endif
+
+ /* with TCH set, TDES3 points to next descriptor */
+ descr->TDES3.U = (uint32)&descr[1];
+ descr = &descr[1];
+ }
+
+ /* correction for last descriptor */
+ {
+ descr = &descr[-1];
+
+ /* indicate end of ring */
+ descr->TDES0.A.TER = 1U;
+
+ /* with TCH set, TDES3 points to the first descriptor */
+ eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
+ descr->TDES3.U = (uint32)eth->pTxDescr;
+ }
+
+ eth->txCount = 0;
+
+ /* write descriptor list base address */
+ IfxEth_setTransmitDescriptorAddress(&MODULE_ETH, IfxEth_getBaseTxDescriptor(eth));
+}
+
+
+void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config)
+{
+ int i;
+ uint32 buffer1StartAddress = 0;
+ uint32 buffer2StartAddress = 0;
+
+ IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
+
+ eth->pTxDescr = descr;
+
+ /* Initialize descriptors in ring mode */
+ for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
+ {
+ descr->TDES0.U = 0;
+ descr->TDES0.A.IC = 1U;
+ descr->TDES0.A.FS = 1U;
+ descr->TDES0.A.LS = 1U;
+
+ if ((config->txBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (config->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->txBuffer1Size) % 4 == 0);
+
+ buffer1StartAddress = (uint32)(config->txBuffer1StartAddress + (config->txBuffer1Size * i));
+ IfxEth_setTransmitBuffer1RingMode(eth, descr, buffer1StartAddress, config->txBuffer1Size);
+ }
+ else
+ {
+ IfxEth_setTransmitBuffer1RingMode(eth, descr, 0x0, 0);
+ }
+
+ if ((config->txBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (config->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->txBuffer2Size) % 4 == 0);
+
+ buffer2StartAddress = (uint32)(config->txBuffer2StartAddress + (config->txBuffer2Size * i));
+ IfxEth_setTransmitBuffer2RingMode(eth, descr, buffer2StartAddress, config->txBuffer2Size);
+ }
+ else
+ {
+ IfxEth_setTransmitBuffer2RingMode(eth, descr, 0x0, 0);
+ }
+
+ descr = &descr[1];
+ }
+
+ /* correction for last descriptor */
+ {
+ descr = &descr[-1];
+
+ /* indicate end of ring */
+ descr->TDES0.A.TER = 1U;
+
+ eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
+ }
+
+ eth->txCount = 0;
+
+ /* write descriptor list base address */
+ IfxEth_setTransmitDescriptorAddress(&MODULE_ETH, IfxEth_getBaseTxDescriptor(eth));
+
+ eth->txBufferUsed = config->txBufferUsed;
+}
+
+
+void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress)
+{
+ (void)eth;
+ *((uint32 *)macAddress) = ETH_MAC_ADDRESS_G00_LOW.U;
+ *((uint16 *)(&macAddress[4])) = (uint16)(ETH_MAC_ADDRESS_G00_HIGH.U & 0xFFFFU);
+}
+
+
+void IfxEth_resetModule(void)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ ETH_KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ ETH_KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == ETH_KRST0.B.RSTSTAT) /* Wait until reset is executed */
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ ETH_KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len)
+{
+ IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
+
+ descr->TDES1.U = len; /* with TCH set, TBS1 is used for buffer size */
+ descr->TDES0.A.OWN = 1U; /* release to DMA */
+
+ IfxEth_wakeupTransmitter(eth);
+ IfxEth_shuffleTxDescriptor(eth);
+
+ eth->txCount++;
+}
+
+
+void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length)
+{
+ IfxEth_TxDescr *descr = IfxEth_getActualTxDescriptor(eth);
+
+ if ((eth->txBufferUsed == IfxEth_RingModeBufferUsed_buffer1) || (eth->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
+ {
+ descr->TDES1.A.TBS1 = buffer1Length;
+ }
+
+ if ((eth->txBufferUsed == IfxEth_RingModeBufferUsed_buffer2) || (eth->txBufferUsed == IfxEth_RingModeBufferUsed_bothBuffers))
+ {
+ descr->TDES1.A.TBS2 = buffer2Length;
+ }
+
+ descr->TDES0.A.OWN = 1U; /* release to DMA */
+
+ IfxEth_wakeupTransmitter(eth);
+ IfxEth_shuffleTxDescriptor(eth);
+
+ eth->txCount++;
+}
+
+
+void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len)
+{
+ IfxEth_TxDescr_setBuffer(IfxEth_getActualTxDescriptor(eth), buffer);
+ IfxEth_sendTransmitBuffer(eth, len);
+}
+
+
+void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress)
+{
+ (void)eth;
+ ETH_MAC_ADDRESS_G00_HIGH.U = 0
+ | ((uint32)macAddress[4] << 0U)
+ | ((uint32)macAddress[5] << 8U)
+ | 0x80000000U;
+
+ ETH_MAC_ADDRESS_G00_LOW.U = 0
+ | ((uint32)macAddress[0] << 0U)
+ | ((uint32)macAddress[1] << 8U)
+ | ((uint32)macAddress[2] << 16U)
+ | ((uint32)macAddress[3] << 24U)
+ ;
+}
+
+
+void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode)
+{
+ int i;
+
+ if (mode != IfxEth_ChecksumMode_bypass)
+ {
+ ETH_OPERATION_MODE.B.TSF = 1U;
+ ETH_OPERATION_MODE.B.DT = 0U; /* 0 = drop TCP/IP frame with checksum error */
+ ETH_MAC_CONFIGURATION.B.IPC = 1U; /* 1 = enable received IP frame checksum engine */
+
+ IfxEth_TxDescr *descr = IfxEth_getBaseTxDescriptor(eth);
+
+ for (i = 0; i < IFXETH_MAX_TX_BUFFERS; i++)
+ {
+ descr->TDES0.A.CIC = mode;
+ descr = IfxEth_TxDescr_getNext(descr);
+ }
+ }
+}
+
+
+void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
+{
+ (void)eth;
+
+ IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
+ IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+
+ if (miiPins->crs != NULL_PTR)
+ {
+ IfxEth_Crs_In *crs = miiPins->crs;
+ ETH_GPCTL.B.ALTI2 = crs->select;
+ IfxPort_setPinModeInput(crs->pin.port, crs->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(crs->pin.port, crs->pin.pinIndex, speedGrade);
+ }
+ else
+ {
+ /* MII lite mode */
+ ETH_GPCTL.B.ALTI2 = Ifx_RxSel_d;
+ }
+
+ if (miiPins->col != NULL_PTR)
+ {
+ IfxEth_Col_In *col = miiPins->col;
+ ETH_GPCTL.B.ALTI3 = col->select;
+ IfxPort_setPinModeInput(col->pin.port, col->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(col->pin.port, col->pin.pinIndex, speedGrade);
+ }
+ else
+ {
+ /* MII lite mode */
+ ETH_GPCTL.B.ALTI3 = Ifx_RxSel_d;
+ }
+
+ IfxEth_Txclk_In *txClk = miiPins->txClk;
+ ETH_GPCTL.B.ALTI10 = txClk->select;
+ IfxPort_setPinModeInput(txClk->pin.port, txClk->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(txClk->pin.port, txClk->pin.pinIndex, speedGrade);
+
+ IfxEth_Rxclk_In *rxClk = miiPins->rxClk;
+ ETH_GPCTL.B.ALTI1 = rxClk->select;
+ IfxPort_setPinModeInput(rxClk->pin.port, rxClk->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(rxClk->pin.port, rxClk->pin.pinIndex, speedGrade);
+
+ IfxEth_Rxdv_In *rxDv = miiPins->rxDv;
+ ETH_GPCTL.B.ALTI4 = rxDv->select;
+ IfxPort_setPinModeInput(rxDv->pin.port, rxDv->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(rxDv->pin.port, rxDv->pin.pinIndex, speedGrade);
+
+ if (miiPins->rxEr != NULL_PTR)
+ {
+ IfxEth_Rxer_In *rxEr = miiPins->rxEr;
+ ETH_GPCTL.B.ALTI5 = rxEr->select;
+ IfxPort_setPinModeInput(rxEr->pin.port, rxEr->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(rxEr->pin.port, rxEr->pin.pinIndex, speedGrade);
+ }
+ else
+ {
+ /* MII lite mode */
+ ETH_GPCTL.B.ALTI5 = Ifx_RxSel_d;
+ }
+
+ IfxEth_Rxd_In *rxd0 = miiPins->rxd0;
+ ETH_GPCTL.B.ALTI6 = rxd0->select;
+ IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
+
+ IfxEth_Rxd_In *rxd1 = miiPins->rxd1;
+ ETH_GPCTL.B.ALTI7 = rxd1->select;
+ IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
+
+ IfxEth_Rxd_In *rxd2 = miiPins->rxd2;
+ ETH_GPCTL.B.ALTI8 = rxd2->select;
+ IfxPort_setPinModeInput(rxd2->pin.port, rxd2->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(rxd2->pin.port, rxd2->pin.pinIndex, speedGrade);
+
+ IfxEth_Rxd_In *rxd3 = miiPins->rxd3;
+ ETH_GPCTL.B.ALTI9 = rxd3->select;
+ IfxPort_setPinModeInput(rxd3->pin.port, rxd3->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(rxd3->pin.port, rxd3->pin.pinIndex, speedGrade);
+
+ IfxEth_Mdio_InOut *mdio = miiPins->mdio;
+ ETH_GPCTL.B.ALTI0 = mdio->inSelect;
+}
+
+
+void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins)
+{
+ (void)eth;
+ IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
+ IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+
+ IfxEth_Txen_Out *txEn = miiPins->txEn;
+ IfxPort_setPinPadDriver(txEn->pin.port, txEn->pin.pinIndex, speedGrade);
+ IfxPort_setPinModeOutput(txEn->pin.port, txEn->pin.pinIndex, mode, txEn->select);
+
+ if (miiPins->txEr != NULL_PTR)
+ {
+ IfxEth_Txer_Out *txEr = miiPins->txEr;
+ IfxPort_setPinPadDriver(txEr->pin.port, txEr->pin.pinIndex, speedGrade);
+ IfxPort_setPinModeOutput(txEr->pin.port, txEr->pin.pinIndex, mode, txEr->select);
+ }
+
+ IfxEth_Txd_Out *txd0 = miiPins->txd0;
+ IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
+ IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
+
+ IfxEth_Txd_Out *txd1 = miiPins->txd1;
+ IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
+ IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
+
+ IfxEth_Txd_Out *txd2 = miiPins->txd2;
+ IfxPort_setPinPadDriver(txd2->pin.port, txd2->pin.pinIndex, speedGrade);
+ IfxPort_setPinModeOutput(txd2->pin.port, txd2->pin.pinIndex, mode, txd2->select);
+
+ IfxEth_Txd_Out *txd3 = miiPins->txd3;
+ IfxPort_setPinPadDriver(txd3->pin.port, txd3->pin.pinIndex, speedGrade);
+ IfxPort_setPinModeOutput(txd3->pin.port, txd3->pin.pinIndex, mode, txd3->select);
+
+ IfxEth_Mdc_Out *mdc = miiPins->mdc;
+ IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
+ IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
+}
+
+
+void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
+{
+ (void)eth;
+
+ ETH_GPCTL.B.ALTI0 = rmiiPins->mdio->inSelect;
+ ETH_GPCTL.B.ALTI1 = rmiiPins->refClk->select;
+ ETH_GPCTL.B.ALTI4 = rmiiPins->crsDiv->select;
+ ETH_GPCTL.B.ALTI6 = rmiiPins->rxd0->select;
+ ETH_GPCTL.B.ALTI7 = rmiiPins->rxd1->select;
+
+ {
+ IfxPort_InputMode mode = IfxPort_InputMode_noPullDevice;
+ IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+
+ IfxEth_Crsdv_In *crsDiv = rmiiPins->crsDiv;
+ IfxEth_Refclk_In *refClk = rmiiPins->refClk;
+ IfxEth_Rxd_In *rxd0 = rmiiPins->rxd0;
+ IfxEth_Rxd_In *rxd1 = rmiiPins->rxd1;
+
+ IfxPort_setPinModeInput(crsDiv->pin.port, crsDiv->pin.pinIndex, mode);
+ IfxPort_setPinModeInput(refClk->pin.port, refClk->pin.pinIndex, mode);
+ IfxPort_setPinModeInput(rxd0->pin.port, rxd0->pin.pinIndex, mode);
+ IfxPort_setPinModeInput(rxd1->pin.port, rxd1->pin.pinIndex, mode);
+
+ IfxPort_setPinPadDriver(crsDiv->pin.port, crsDiv->pin.pinIndex, speedGrade);
+ IfxPort_setPinPadDriver(refClk->pin.port, refClk->pin.pinIndex, speedGrade);
+ IfxPort_setPinPadDriver(rxd0->pin.port, rxd0->pin.pinIndex, speedGrade);
+ IfxPort_setPinPadDriver(rxd1->pin.port, rxd1->pin.pinIndex, speedGrade);
+ }
+}
+
+
+void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins)
+{
+ IfxPort_OutputMode mode = IfxPort_OutputMode_pushPull;
+ IfxPort_PadDriver speedGrade = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+
+ IfxEth_Mdc_Out *mdc = rmiiPins->mdc;
+ IfxEth_Mdio_InOut *mdio = rmiiPins->mdio;
+ IfxEth_Txen_Out *txen = rmiiPins->txEn;
+ IfxEth_Txd_Out *txd0 = rmiiPins->txd0;
+ IfxEth_Txd_Out *txd1 = rmiiPins->txd1;
+
+ (void)eth;
+
+#if 0
+ IfxPort_setPinPadDriver(mdc->pin.port, mdc->pin.pinIndex, speedGrade);
+ IfxPort_setPinPadDriver(mdio->pin.port, mdio->pin.pinIndex, speedGrade);
+#endif
+ IfxPort_setPinPadDriver(txen->pin.port, txen->pin.pinIndex, speedGrade);
+ IfxPort_setPinPadDriver(txd0->pin.port, txd0->pin.pinIndex, speedGrade);
+ IfxPort_setPinPadDriver(txd1->pin.port, txd1->pin.pinIndex, speedGrade);
+
+ IfxPort_setPinModeOutput(mdc->pin.port, mdc->pin.pinIndex, mode, mdc->select);
+ IfxPort_setPinModeOutput(txen->pin.port, txen->pin.pinIndex, mode, txen->select);
+ IfxPort_setPinModeOutput(txd0->pin.port, txd0->pin.pinIndex, mode, txd0->select);
+ IfxPort_setPinModeOutput(txd1->pin.port, txd1->pin.pinIndex, mode, txd1->select);
+
+ // For MDIO, when P21.1 is used it should be configured as output
+ if ((mdio->pin.port == (&MODULE_P21)) && (mdio->pin.pinIndex == 1))
+ {
+ IfxPort_setPinModeOutput(mdio->pin.port, mdio->pin.pinIndex, mode, mdio->outSelect);
+ }
+}
+
+
+void IfxEth_shuffleRxDescriptor(IfxEth *eth)
+{
+ if (eth->descriptorMode == IfxEth_DescriptorMode_chain)
+ {
+ eth->pRxDescr = IfxEth_RxDescr_getNext(eth->pRxDescr);
+ }
+ else if ((eth->descriptorMode == IfxEth_DescriptorMode_ring) && (eth->pRxDescr->RDES1.A.RER != 1))
+ {
+ eth->pRxDescr = ð->pRxDescr[1];
+ }
+ else
+ {
+ eth->pRxDescr = IfxEth_getBaseRxDescriptor(eth);
+ }
+}
+
+
+void IfxEth_shuffleTxDescriptor(IfxEth *eth)
+{
+ if (eth->descriptorMode == IfxEth_DescriptorMode_chain)
+ {
+ eth->pTxDescr = IfxEth_TxDescr_getNext(eth->pTxDescr);
+ }
+ else if ((eth->descriptorMode == IfxEth_DescriptorMode_ring) && (eth->pTxDescr->TDES0.A.TER != 1))
+ {
+ eth->pTxDescr = ð->pTxDescr[1];
+ }
+ else
+ {
+ eth->pTxDescr = IfxEth_getBaseTxDescriptor(eth);
+ }
+}
+
+
+void IfxEth_startReceiver(IfxEth *eth)
+{
+ (void)eth;
+
+ // enable receiver and RX DMA
+ ETH_OPERATION_MODE.B.SR = 1;
+ ETH_MAC_CONFIGURATION.B.RE = 1;
+ ETH_RECEIVE_POLL_DEMAND.U = 1;
+}
+
+
+void IfxEth_startTransmitter(IfxEth *eth)
+{
+ (void)eth;
+
+ ETH_MAC_CONFIGURATION.B.TE = 1;
+ ETH_OPERATION_MODE.B.ST = 1;
+ ETH_TRANSMIT_POLL_DEMAND.U = 1;
+}
+
+
+void IfxEth_stopReceiver(IfxEth *eth)
+{
+ (void)eth;
+
+ ETH_OPERATION_MODE.B.SR = 0;
+ ETH_MAC_CONFIGURATION.B.RE = 0;
+ ETH_RECEIVE_POLL_DEMAND.U = 0;
+}
+
+
+void IfxEth_stopTransmitter(IfxEth *eth)
+{
+ (void)eth;
+
+ ETH_TRANSMIT_POLL_DEMAND.U = 0;
+ ETH_OPERATION_MODE.B.ST = 0;
+ ETH_MAC_CONFIGURATION.B.TE = 0;
+}
+
+
+void IfxEth_wakeupReceiver(IfxEth *eth)
+{
+ eth->status.U = ETH_STATUS.U;
+
+ // check if receiver suspended
+ if (eth->status.U & (4U << IFX_ETH_STATUS_RS_OFF))
+ {
+ if (eth->status.B.RU)
+ {
+ ETH_STATUS.U = (IFX_ETH_STATUS_RU_MSK << IFX_ETH_STATUS_RU_OFF);
+ }
+
+ IfxEth_startReceiver(eth);
+ }
+}
+
+
+void IfxEth_wakeupTransmitter(IfxEth *eth)
+{
+ eth->status.U = ETH_STATUS.U;
+
+ // check if suspended
+ if (eth->status.U & 0x00600000)
+ {
+ if (eth->status.B.TU)
+ {
+ // clear transmit unavailable and underflow flags
+ ETH_STATUS.U = (IFX_ETH_STATUS_TU_MSK << IFX_ETH_STATUS_TU_OFF) |
+ (IFX_ETH_STATUS_UNF_MSK << IFX_ETH_STATUS_UNF_OFF);
+ }
+
+ IfxEth_startTransmitter(eth);
+ }
+}
+
+
+void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize)
+{
+ (void)eth;
+ uint32 i;
+
+ /* Destination Address */
+ for (i = 0; i < 6; i++)
+ {
+ *txBuffer++ = *destinationAddress++;
+ }
+
+ /* Source Address */
+ for (i = 0; i < 6; i++)
+ {
+ *txBuffer++ = *sourceAddress++;
+ }
+
+ /* packet size */
+ *txBuffer++ = (uint8)(packetSize / 256);
+ *txBuffer = (uint8)(packetSize % 256);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Std/IfxEth.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Std/IfxEth.h
new file mode 100644
index 0000000..d319be7
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Std/IfxEth.h
@@ -0,0 +1,1684 @@
+/**
+ * \file IfxEth.h
+ * \brief ETH basic functionality
+ * \ingroup IfxLld_Eth
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Eth_Std_DataStructures Data Structures
+ * \ingroup IfxLld_Eth_Std
+ * \defgroup IfxLld_Eth_Std_Unions Unions
+ * \ingroup IfxLld_Eth_Std
+ * \defgroup IfxLld_Eth_Std_Configuration Configuration Functions
+ * \ingroup IfxLld_Eth_Std
+ * \defgroup IfxLld_Eth_Std_Utility Utility Functions
+ * \ingroup IfxLld_Eth_Std
+ * \defgroup IfxLld_Eth_Std_Initialisation Initialisation Functions
+ * \ingroup IfxLld_Eth_Std
+ * \defgroup IfxLld_Eth_Std_Enum Enumerations
+ * \ingroup IfxLld_Eth_Std
+ */
+
+#ifndef IFXET_H
+#define IFXET_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxEth_cfg.h"
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxEth_reg.h"
+#include "IfxEth_bf.h"
+#include "_PinMap/IfxEth_PinMap.h"
+#include "Src/Std/IfxSrc.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "Cpu/Std/IfxCpu.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Size of one ethernet frame buffer
+ */
+#ifndef IFXETH_RTX_BUFFER_SIZE
+#define IFXETH_RTX_BUFFER_SIZE 1536
+#endif
+
+/** \brief Rx buffers (ring mode)
+ */
+#ifndef IFXETH_MAX_RX_BUFFERS
+#define IFXETH_MAX_RX_BUFFERS 8
+#endif
+
+/** \brief Tx buffers (ring mode)
+ */
+#ifndef IFXETH_MAX_TX_BUFFERS
+#define IFXETH_MAX_TX_BUFFERS 16
+#endif
+
+/** \brief 4 DWORDS (16 bytes)
+ */
+#define IFXETH_DESCR_SIZE 4
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Eth_Std_Enum
+ * \{ */
+typedef enum
+{
+ IfxEth_ChecksumMode_bypass = 0,
+ IfxEth_ChecksumMode_ipv4 = 1,
+ IfxEth_ChecksumMode_tcpUdpIcmpSegment = 2,
+ IfxEth_ChecksumMode_tcpUdpIcmpFull = 3
+} IfxEth_ChecksumMode;
+
+typedef enum
+{
+ IfxEth_DescriptorMode_chain, /**< \brief chain mode descriptors */
+ IfxEth_DescriptorMode_ring /**< \brief ring mode descriptors */
+} IfxEth_DescriptorMode;
+
+/** \brief External Phy Interface RMII Mode
+ */
+typedef enum
+{
+ IfxEth_PhyInterfaceMode_mii, /**< \brief MII mode */
+ IfxEth_PhyInterfaceMode_rmii /**< \brief RMII mode */
+} IfxEth_PhyInterfaceMode;
+
+/** \brief indicates the Receive DMA FSM state
+ */
+typedef enum
+{
+ IfxEth_ReceiveProcessState_reset, /**< \brief Stopped: Reset or Stop Receive Command issued */
+ IfxEth_ReceiveProcessState_fetching, /**< \brief Running: Fetching Receive Transfer Descriptor */
+ IfxEth_ReceiveProcessState_none, /**< \brief Reserved for future use */
+ IfxEth_ReceiveProcessState_waiting, /**< \brief Running: Waiting for receive packet */
+ IfxEth_ReceiveProcessState_suspended, /**< \brief Suspended: Receive Descriptor Unavailable */
+ IfxEth_ReceiveProcessState_closing, /**< \brief Running: Closing Receive Descriptor */
+ IfxEth_ReceiveProcessState_timestampWrite, /**< \brief TIME_STAMP write state */
+ IfxEth_ReceiveProcessState_transfering /**< \brief Running: Transferring the receive packet data from receive buffer to host memory */
+} IfxEth_ReceiveProcessState;
+
+/** \brief Buffer(s) used in ring mode
+ */
+typedef enum
+{
+ IfxEth_RingModeBufferUsed_buffer1, /**< \brief Buffer 1 used */
+ IfxEth_RingModeBufferUsed_buffer2, /**< \brief Buffer 2 used */
+ IfxEth_RingModeBufferUsed_bothBuffers /**< \brief BOth Buffers used */
+} IfxEth_RingModeBufferUsed;
+
+/** \brief indicates the Transmit DMA FSM state
+ */
+typedef enum
+{
+ IfxEth_TransmitProcessState_reset, /**< \brief Stopped; Reset or Stop Transmit Command issued */
+ IfxEth_TransmitProcessState_fetching, /**< \brief Running; Fetching Transmit Transfer Descriptor */
+ IfxEth_TransmitProcessState_waiting, /**< \brief Running; Waiting for status */
+ IfxEth_TransmitProcessState_reading, /**< \brief Running; Reading Data from host memory buffer and queuing it to transmit buffer (Tx FIFO) */
+ IfxEth_TransmitProcessState_timestampWrite, /**< \brief TIME_STAMP write state */
+ IfxEth_TransmitProcessState_none, /**< \brief Reserved for future use */
+ IfxEth_TransmitProcessState_suspended, /**< \brief Suspended; Transmit Descriptor Unavailable or Transmit Buffer Underflow */
+ IfxEth_TransmitProcessState_closing /**< \brief Running; Closing Transmit Descriptor */
+} IfxEth_TransmitProcessState;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Eth_Std_DataStructures
+ * \{ */
+/** \brief Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access
+ */
+typedef struct
+{
+ uint32 ext : 1; /**< \brief Extended Status Available/Rx MAC Address */
+ uint32 CE : 1; /**< \brief CRC Error */
+ uint32 DBE : 1; /**< \brief Dribble Bit Error */
+ uint32 RE : 1; /**< \brief Receive Error */
+ uint32 RWT : 1; /**< \brief Receive Watchdog Timeout */
+ uint32 FT : 1; /**< \brief Frame Type */
+ uint32 LC : 1; /**< \brief Late Collision */
+ uint32 IPC : 1; /**< \brief IPC Checksum Error/Giant Frame */
+ uint32 LS : 1; /**< \brief Last Descriptor */
+ uint32 FS : 1; /**< \brief First Descriptor */
+ uint32 VLAN : 1; /**< \brief VLAN Tag */
+ uint32 OE : 1; /**< \brief Overflow Error */
+ uint32 LE : 1; /**< \brief Length Error */
+ uint32 SAF : 1; /**< \brief Source Address Filter Fail */
+ uint32 DE : 1; /**< \brief Descriptor Error */
+ uint32 ES : 1; /**< \brief Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE */
+ uint32 FL : 14; /**< \brief Frame Length */
+ uint32 AFM : 1; /**< \brief Destination Address Filter Fail */
+ uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
+} IfxEth_AltRxDescr0_Bits;
+
+/** \brief Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access
+ */
+typedef struct
+{
+ uint32 RBS1 : 13; /**< \brief Receive Buffer 1 Size */
+ uint32 resv1 : 1; /**< \brief reserved */
+ uint32 RCH : 1; /**< \brief Second Address Chained */
+ uint32 RER : 1; /**< \brief Receive End of Ring */
+ uint32 RBS2 : 13; /**< \brief Receive Buffer 2 Size */
+ uint32 resv : 2; /**< \brief reserved) */
+ uint32 DIC : 1; /**< \brief Disable Interrupt on Completion */
+} IfxEth_AltRxDescr1_Bits;
+
+/** \brief Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access
+ */
+typedef struct
+{
+ uint32 DB : 1; /**< \brief Deferred bit */
+ uint32 UF : 1; /**< \brief Underflow error */
+ uint32 ED : 1; /**< \brief Excessive deferral */
+ uint32 CC : 4; /**< \brief Collision count */
+ uint32 VLAN : 1; /**< \brief VLAN TAG */
+ uint32 EC : 1; /**< \brief Excessive Collision */
+ uint32 LC : 1; /**< \brief Late Collision */
+ uint32 NC : 1; /**< \brief No Carrier */
+ uint32 LOC : 1; /**< \brief Loss of Carrier */
+ uint32 PCE : 1; /**< \brief Payload Checksum Error */
+ uint32 FF : 1; /**< \brief Frame Flushed */
+ uint32 JT : 1; /**< \brief Jabber Timeout */
+ uint32 ES : 1; /**< \brief Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF */
+ uint32 IHE : 1; /**< \brief IP Header Error */
+ uint32 TTSS : 1; /**< \brief Transmit Time Stamp Status */
+ uint32 resv : 2; /**< \brief (reserved) */
+ uint32 TCH : 1; /**< \brief Second Address Chained */
+ uint32 TER : 1; /**< \brief Transmit End of Ring */
+ uint32 CIC : 2; /**< \brief Checksum Insertion Control */
+ uint32 resv1 : 1; /**< \brief (Reserved) */
+ uint32 TTSE : 1; /**< \brief Transmit Time Stamp Enable */
+ uint32 DP : 1; /**< \brief Disable Padding */
+ uint32 DC : 1; /**< \brief Disable CRC */
+ uint32 FS : 1; /**< \brief First Segment */
+ uint32 LS : 1; /**< \brief Last Segment */
+ uint32 IC : 1; /**< \brief Interrupt on Completion */
+ uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
+} IfxEth_AltTxDescr0_Bits;
+
+/** \brief Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access
+ */
+typedef struct
+{
+ uint32 TBS1 : 13; /**< \brief Transmit Buffer 1 Size */
+ uint32 resv1 : 3; /**< \brief (reserved) */
+ uint32 TBS2 : 13; /**< \brief Transmit Buffer 2 Size */
+ uint32 resv2 : 3; /**< \brief (reserved) */
+} IfxEth_AltTxDescr1_Bits;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_Unions
+ * \{ */
+/** \brief Union for RX descriptor DWORD 0
+ */
+typedef union
+{
+ IfxEth_AltRxDescr0_Bits A; /**< \brief Structure for RX descriptor DWORD 0 Bit field access */
+ uint32 U; /**< \brief Unsigned long access */
+} IfxEth_RxDescr0;
+
+/** \brief Union for RX descriptor DWORD 1
+ */
+typedef union
+{
+ IfxEth_AltRxDescr1_Bits A; /**< \brief Structure for RX descriptor DWORD 1 Bit field access */
+ uint32 U; /**< \brief unsigned long access */
+} IfxEth_RxDescr1;
+
+/** \brief Union for RX descriptor DWORD 2
+ */
+typedef union
+{
+ uint32 U; /**< \brief unsigned long access */
+} IfxEth_RxDescr2;
+
+/** \brief Union for RX descriptor DWORD 3
+ */
+typedef union
+{
+ uint32 U; /**< \brief unsigned long access */
+} IfxEth_RxDescr3;
+
+/** \brief Union for TX descriptor DWORD 0
+ */
+typedef union
+{
+ IfxEth_AltTxDescr0_Bits A; /**< \brief Structure for TX descriptor DWORD 0 Bit field access */
+ uint32 U; /**< \brief Unsigned long access */
+} IfxEth_TxDescr0;
+
+/** \brief Union for TX descriptor DWORD 1
+ */
+typedef union
+{
+ IfxEth_AltTxDescr1_Bits A; /**< \brief Structure for RX descriptor DWORD 1 Bit field access */
+ uint32 U; /**< \brief unsigned long access */
+} IfxEth_TxDescr1;
+
+/** \brief Union for TX descriptor DWORD 2
+ */
+typedef union
+{
+ uint32 U; /**< \brief unsigned long access */
+} IfxEth_TxDescr2;
+
+/** \brief Union for TX descriptor DWORD 3
+ */
+typedef union
+{
+ uint32 U; /**< \brief unsigned long access */
+} IfxEth_TxDescr3;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_DataStructures
+ * \{ */
+/** \brief Configuration structure for Ring Mode Receive Buffers
+ */
+typedef struct
+{
+ IfxEth_RingModeBufferUsed rxBufferUsed; /**< \brief Receive Buffer(s) used in ringmode */
+ uint32 rxBuffer1StartAddress; /**< \brief Start address of Rx Buffer 1 */
+ uint32 rxBuffer2StartAddress; /**< \brief Start address of Rx Buffer 2 */
+ uint16 rxBuffer1Size; /**< \brief Size of Rx Buffer 1 */
+ uint16 rxBuffer2Size; /**< \brief Size of Rx Buffer 2 */
+} IfxEth_RingModeRxBuffersConfig;
+
+/** \brief Configuration structure for Ring Mode Transmit buffers
+ */
+typedef struct
+{
+ IfxEth_RingModeBufferUsed txBufferUsed; /**< \brief Transmit Buffer(s) used in ringmode */
+ uint32 txBuffer1StartAddress; /**< \brief Start address of Tx Buffer 1 */
+ uint32 txBuffer2StartAddress; /**< \brief Start address of Tx Buffer 2 */
+ uint16 txBuffer1Size; /**< \brief Size of Tx Buffer 1 */
+ uint16 txBuffer2Size; /**< \brief Size of Tx Buffer 2 */
+} IfxEth_RingModeTxBuffersConfig;
+
+/** \brief Normal RX descriptor
+ */
+typedef struct
+{
+ IfxEth_RxDescr0 RDES0; /**< \brief RX descriptor DWORD 0 */
+ IfxEth_RxDescr1 RDES1; /**< \brief RX descriptor DWORD 1 */
+ IfxEth_RxDescr2 RDES2; /**< \brief RX descriptor DWORD 2 */
+ IfxEth_RxDescr3 RDES3; /**< \brief RX descriptor DWORD 3 */
+} IfxEth_RxDescr;
+
+/** \brief Normal TX descriptor
+ */
+typedef struct
+{
+ IfxEth_TxDescr0 TDES0; /**< \brief TX descriptor DWORD 0 */
+ IfxEth_TxDescr1 TDES1; /**< \brief TX descriptor DWORD 1 */
+ IfxEth_TxDescr2 TDES2; /**< \brief TX descriptor DWORD 2 */
+ IfxEth_TxDescr3 TDES3; /**< \brief TX descriptor DWORD 3 */
+} IfxEth_TxDescr;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_DataStructures
+ * \{ */
+/** \brief Port pins for MII mode configuration
+ */
+typedef struct
+{
+ IfxEth_Crs_In *crs; /**< \brief pointer to CRS input pin config */
+ IfxEth_Col_In *col; /**< \brief pointer to COL input pin config */
+ IfxEth_Txclk_In *txClk; /**< \brief Pointer to TXCLK input pin config */
+ IfxEth_Rxclk_In *rxClk; /**< \brief Pointer to RXCLK input pin config */
+ IfxEth_Rxdv_In *rxDv; /**< \brief Pointer to RXDV input pin config */
+ IfxEth_Rxer_In *rxEr; /**< \brief Pointer to RXER input pin config */
+ IfxEth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
+ IfxEth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
+ IfxEth_Rxd_In *rxd2; /**< \brief Pointer to RXD2 input pin config */
+ IfxEth_Rxd_In *rxd3; /**< \brief Pointer to RXD3 input pin config */
+ IfxEth_Txen_Out *txEn; /**< \brief Pointer to TXEN output pin config */
+ IfxEth_Txer_Out *txEr; /**< \brief Pointer to TXER output pin config */
+ IfxEth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
+ IfxEth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
+ IfxEth_Txd_Out *txd2; /**< \brief Pointer to TXD2 output pin config */
+ IfxEth_Txd_Out *txd3; /**< \brief Pointer to TXD3 output pin config */
+ IfxEth_Mdc_Out *mdc; /**< \brief Pointer to MDC pin config */
+ IfxEth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
+} IfxEth_MiiPins;
+
+/** \brief Configuration structure for Ring Mode descriptors
+ */
+typedef struct
+{
+ IfxEth_RingModeTxBuffersConfig txConfig; /**< \brief Transmit buffers ring mode config */
+ IfxEth_RingModeRxBuffersConfig rxConfig; /**< \brief Receive buffers ring mode config */
+} IfxEth_RingModeBuffersConfig;
+
+/** \brief Port pins for RMII mode configuration
+ */
+typedef struct
+{
+ IfxEth_Crsdv_In *crsDiv; /**< \brief pointer to CRSDIV input pin config */
+ IfxEth_Refclk_In *refClk; /**< \brief Pointer to REFCLK input pin config */
+ IfxEth_Rxd_In *rxd0; /**< \brief Pointer to RXD0 input pin config */
+ IfxEth_Rxd_In *rxd1; /**< \brief Pointer to RXD1 input pin config */
+ IfxEth_Mdc_Out *mdc; /**< \brief Pointer to MDC output pin config */
+ IfxEth_Mdio_InOut *mdio; /**< \brief Pointer to MDIO pin config */
+ IfxEth_Txd_Out *txd0; /**< \brief Pointer to TXD0 output pin config */
+ IfxEth_Txd_Out *txd1; /**< \brief Pointer to TXD1 output pin config */
+ IfxEth_Txen_Out *txEn; /**< \brief Pointer to TXEN output pin config */
+} IfxEth_RmiiPins;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_Unions
+ * \{ */
+typedef union
+{
+ IfxEth_RxDescr items[IFXETH_MAX_RX_BUFFERS];
+ uint32 U[IFXETH_MAX_RX_BUFFERS][IFXETH_DESCR_SIZE];
+} IfxEth_RxDescrList;
+
+typedef union
+{
+ IfxEth_TxDescr items[IFXETH_MAX_TX_BUFFERS];
+ uint32 U[IFXETH_MAX_TX_BUFFERS][IFXETH_DESCR_SIZE];
+} IfxEth_TxDescrList;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_DataStructures
+ * \{ */
+/** \brief ETH configuration structure
+ */
+typedef struct
+{
+ uint8 macAddress[6]; /**< \brief MAC address for the ethernet, should be unique in the network */
+ uint32 (*phyInit)(void); /**< \brief Pointer to the transceiver init function */
+ boolean (*phyLink)(void); /**< \brief Pointer to the transceiver link function */
+ IfxEth_PhyInterfaceMode phyInterfaceMode; /**< \brief Phy Interface mode */
+ IFX_CONST IfxEth_RmiiPins *rmiiPins; /**< \brief Pointer to port pins configuration of RMII mode */
+ IFX_CONST IfxEth_MiiPins *miiPins; /**< \brief Pointer to port pins configuration of MII mode */
+ Ifx_Priority isrPriority; /**< \brief Interrupt service priority */
+ IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider */
+ Ifx_ETH *ethSfr; /**< \brief Pointer to register base */
+ IfxEth_RxDescrList *rxDescr; /**< \brief pointer to RX descriptor RAM */
+ IfxEth_TxDescrList *txDescr; /**< \brief pointer to TX descriptor RAM */
+ IfxEth_DescriptorMode descriptorMode; /**< \brief Descriptor mode (chain or ring) */
+ IfxEth_RingModeBuffersConfig ringModeBuffersConfig; /**< \brief Ring mode buffers condiguration */
+} IfxEth_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_DataStructures
+ * \{ */
+/** \brief ETH driver structure
+ */
+typedef struct
+{
+ Ifx_ETH_STATUS status; /**< \brief Intermediate variable to use register content in control structure */
+ uint32 rxCount; /**< \brief Number of frames received */
+ uint32 txCount; /**< \brief Number of frames transmitted */
+ uint32 error; /**< \brief Indicate an error has occurred during execution */
+ sint32 isrRxCount; /**< \brief Count of RX ISR */
+ sint32 isrTxCount; /**< \brief Count of TX ISR */
+ sint32 txDiff; /**< \brief Difference between isrTxCount and txCount */
+ sint32 rxDiff; /**< \brief Difference between isrRxCount and rxCount */
+ sint32 isrCount; /**< \brief count of all ISR */
+ IfxEth_Config config; /**< \brief Copy of the configuration passed through IfxEth_init() */
+ IfxEth_RxDescrList *rxDescr; /**< \brief pointer to RX descriptor RAM */
+ IfxEth_TxDescrList *txDescr; /**< \brief pointer to TX descriptor RAM */
+ IfxEth_RxDescr *pRxDescr;
+ IfxEth_TxDescr *pTxDescr;
+ Ifx_ETH *ethSfr; /**< \brief Pointer to register base */
+ IfxEth_DescriptorMode descriptorMode; /**< \brief Descriptor mode (chain or ring) */
+ IfxEth_RingModeBufferUsed txBufferUsed; /**< \brief Transmit Buffer(s) used in ringmode */
+ IfxEth_RingModeBufferUsed rxBufferUsed; /**< \brief Receive Buffer(s) used in ringmode */
+} IfxEth;
+
+/** \brief Structure for RX descriptor DWORD 0 Bit field access
+ */
+typedef struct
+{
+ uint32 PCE : 1; /**< \brief Rx MAC Address/Payload Checksum Error */
+ uint32 CE : 1; /**< \brief CRC Error */
+ uint32 DBE : 1; /**< \brief Dribble Bit Error */
+ uint32 RE : 1; /**< \brief Receive Error */
+ uint32 RWT : 1; /**< \brief Receive Watchdog Timeout */
+ uint32 FT : 1; /**< \brief Frame Type */
+ uint32 LC : 1; /**< \brief Late Collision */
+ uint32 IPC : 1; /**< \brief IPC Checksum Error/Giant Frame */
+ uint32 LS : 1; /**< \brief Last Descriptor */
+ uint32 FS : 1; /**< \brief First Descriptor */
+ uint32 VLAN : 1; /**< \brief VLAN Tag */
+ uint32 OE : 1; /**< \brief Overflow Error */
+ uint32 LE : 1; /**< \brief Length Error */
+ uint32 SAF : 1; /**< \brief Source Address Filter Fail */
+ uint32 DE : 1; /**< \brief Descriptor Error */
+ uint32 ES : 1; /**< \brief Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE */
+ uint32 FL : 14; /**< \brief Frame Length */
+ uint32 AFM : 1; /**< \brief Destination Address Filter Fail */
+ uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
+} IfxEth_RxDescr0_Bits;
+
+/** \brief Structure for RX descriptor DWORD 1 Bit field access
+ */
+typedef struct
+{
+ uint32 RBS1 : 11; /**< \brief Receive Buffer 1 Size */
+ uint32 RBS2 : 11; /**< \brief Receive Buffer 2 Size */
+ uint32 resv : 2; /**< \brief (reserved) */
+ uint32 RCH : 1; /**< \brief Second Address Chained */
+ uint32 RER : 1; /**< \brief Receive End of Ring */
+ uint32 resv2 : 5; /**< \brief (reserved) */
+ uint32 DIC : 1; /**< \brief Disable Interrupt on Completion */
+} IfxEth_RxDescr1_Bits;
+
+/** \brief Structure for TX descriptor DWORD 0 Bit field access
+ */
+typedef struct
+{
+ uint32 DB : 1; /**< \brief Deferred Bit */
+ uint32 UF : 1; /**< \brief Underflow Error */
+ uint32 ED : 1; /**< \brief Excessive Deferral */
+ uint32 CC : 4; /**< \brief Collision Count */
+ uint32 VLAN : 1; /**< \brief VLAN Tag */
+ uint32 EC : 1; /**< \brief Excessive Collision */
+ uint32 LC : 1; /**< \brief Late Collision */
+ uint32 NC : 1; /**< \brief No Carrier */
+ uint32 LOC : 1; /**< \brief Loss of Carrier */
+ uint32 PCE : 1; /**< \brief Payload Checksum Error */
+ uint32 FF : 1; /**< \brief Frame Flushed */
+ uint32 JT : 1; /**< \brief Jabber Timeout */
+ uint32 ES : 1; /**< \brief Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF */
+ uint32 IHE : 1; /**< \brief IP Header Error */
+ uint32 TTSS : 1; /**< \brief Tx Time Stamp Status */
+ uint32 resv : 13; /**< \brief (reserved) */
+ uint32 OWN : 1; /**< \brief Own Bit, 1 = own by DMA */
+} IfxEth_TxDescr0_Bits;
+
+/** \brief Structure for TX descriptor DWORD 1 Bit field access
+ */
+typedef struct
+{
+ uint32 TBS1 : 11; /**< \brief Transmit Buffer 1 Size */
+ uint32 TBS2 : 11; /**< \brief Transmit Buffer 2 Size */
+ uint32 TTSE : 1; /**< \brief Transmit Time Stamp Enable */
+ uint32 DP : 1; /**< \brief Disable Padding */
+ uint32 TCH : 1; /**< \brief Second Address Chained */
+ uint32 TER : 1; /**< \brief Transmit End of Ring */
+ uint32 DC : 1; /**< \brief Disable CRC */
+ uint32 CIC : 2; /**< \brief Checksum Insertion Control */
+ uint32 FS : 1; /**< \brief First Segment */
+ uint32 LS : 1; /**< \brief Last Segment */
+ uint32 IC : 1; /**< \brief Interrupt on Completion */
+} IfxEth_TxDescr1_Bits;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_Configuration
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Set buffer of an RX descriptor
+ * \param descr descr Pointer to an RX descriptor
+ * \param buffer pointer to buffer
+ * \return None
+ */
+IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer);
+
+/** \brief Get pointer to next TX descriptor
+ * \param descr descr Pointer to a TX descriptor
+ * \return next Tx descriptor
+ */
+IFX_INLINE IfxEth_TxDescr *IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr);
+
+/** \brief Return TRUE if a TX descriptor is available for setup
+ * \param descr pointer to descriptor
+ */
+IFX_INLINE boolean IfxEth_TxDescr_isAvailable(IfxEth_TxDescr *descr);
+
+/** \brief Set buffer of a TX descriptor
+ * \param descr Entdescr Pointer to a TX descriptorer_String_here
+ * \param buffer pointer to Buffer
+ * \return None
+ */
+IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer);
+
+/** \brief Applies the Software Reset
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth);
+
+/** \brief Clear Early Receive Interrupt request
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_clearEriInterrupt(IfxEth *eth);
+
+/** \brief Clear receive interrupt request
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_clearRxInterrupt(IfxEth *eth);
+
+/** \brief Clear Transmit Buffer Unavailable request
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_clearTuInterrupt(IfxEth *eth);
+
+/** \brief Clear transmit interrupt request
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_clearTxInterrupt(IfxEth *eth);
+
+/** \brief Disables Timestamp Fine or Coarse Update
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate(IfxEth *eth);
+
+/** \brief Disables Processing of PTP frames sent over IPV4 UDP
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames(IfxEth *eth);
+
+/** \brief Enables theMMC counter
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_enableMmcCounter(IfxEth *eth);
+
+/** \brief Enables the TimeStamp
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_enableTimeStamp(IfxEth *eth);
+
+/** \brief Enables Timestamp Fine or Coarse Update
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate(IfxEth *eth);
+
+/** \brief Enables the TimeStamp for All frames
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_enableTimeStampForAllFrames(IfxEth *eth);
+
+/** \brief Enables Processing of PTP over Ethernet Frames
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_enableTimeStampForEthFrames(IfxEth *eth);
+
+/** \brief Enables Processing of PTP frames sent over IPV4 UDP
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames(IfxEth *eth);
+
+/** \brief Enables PTP packet Processing for Version 2 Format
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_enableTimeStampForVer2Format(IfxEth *eth);
+
+/** \brief returns the status of the TimeStamp Initialisation
+ * \param eth ETH driver structure
+ * \return Status, TRUE: initialising, FLASE: initialised
+ */
+IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus(IfxEth *eth);
+
+/** \brief returns the status of the System Time updation
+ * \param eth ETH driver structure
+ * \return Status, TRUE: initialising, FLASE: initialised
+ */
+IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus(IfxEth *eth);
+
+/** \brief Initialises the TimeStamp
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_initialiseTimeStamp(IfxEth *eth);
+
+/** \brief Returns the status of Software Reset
+ * \param eth ETH driver structure
+ * \return Status
+ */
+IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth);
+
+/** \brief Sets addition, the time value is added with the contents of the update register
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_setAddToTimeUpdate(IfxEth *eth);
+
+/** \brief Enable/Disables Timestamp Digital or Binary Rollover Control
+ * \param eth ETH driver structure
+ * \param enabled Enable = 1 / Disable = 0
+ * \return None
+ */
+IFX_INLINE void IfxEth_setBinaryRolloverControl(IfxEth *eth, boolean enabled);
+
+/** \brief Sets the loopback mode
+ * \param eth ETH driver structure
+ * \param loopbackMode loopback mode enable/disbale
+ * \return None
+ */
+IFX_INLINE void IfxEth_setLoopbackMode(IfxEth *eth, boolean loopbackMode);
+
+/** \brief Sets the time in sub seconds representation, to be initialized or added to the system time
+ * \param eth ETH driver structure
+ * \param value Sub Second Increment Value
+ * \return None
+ */
+IFX_INLINE void IfxEth_setNanoSecondsUpdateValue(IfxEth *eth, uint8 value);
+
+/** \brief Sets the Phy Interface mode
+ * \param eth ETH driver structure
+ * \param mode Phy interface mode
+ * \return None
+ */
+IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode);
+
+/** \brief Sets receive descriptor address
+ * \param eth pointer to the ethernet module
+ * \param address Address
+ * \return None
+ */
+IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address);
+
+/** \brief Sets the time in seconds to be initialized or added to the system time
+ * \param eth ETH driver structure
+ * \param value Sub Second Increment Value
+ * \return None
+ */
+IFX_INLINE void IfxEth_setSecondsUpdateValue(IfxEth *eth, uint8 value);
+
+/** \brief Sets the Sub Second Increment Value
+ * \param eth ETH driver structure
+ * \param value Sub Second Increment Value
+ * \return None
+ */
+IFX_INLINE void IfxEth_setSubSecondIncrementValue(IfxEth *eth, uint8 value);
+
+/** \brief Sets subtraction, the time value is subtracted with the contents of the update register
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_setSubtractToTimeUpdate(IfxEth *eth);
+
+/** \brief Sets transmit descriptor address
+ * \param eth pointer to the ethernet module
+ * \param address Address
+ * \return None
+ */
+IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address);
+
+/** \brief Updates the System time with specified values in SECONDS and NANOSECONDS registers
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_updateTimeStamp(IfxEth *eth);
+
+/** \brief Waits for one TX buffer becomes available
+ * \param eth ETH driver structure
+ * retval non NULL_PTR TX buffer is available at the address pointed by the returned value
+ * retval NULL_PTR TX buffer is busy.
+ */
+IFX_INLINE void *IfxEth_waitTransmitBuffer(IfxEth *eth);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Free the receive buffer, enabling it for the further reception
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_freeReceiveBuffer(IfxEth *eth);
+
+/** \brief Request to send the transmit buffer
+ *
+ * The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()
+ * \param eth ETH driver structure
+ * \param len Length of the data put in the transmit buffer (in bytes)
+ * \return None
+ */
+IFX_EXTERN void IfxEth_sendTransmitBuffer(IfxEth *eth, uint16 len);
+
+/** \brief Request to send the transmit buffer
+ *
+ * The transmit buffer is the last one specified by IfxEth_getTransmitBuffer()
+ * \param eth ETH driver structure
+ * \param buffer1Length Length of the data put in the transmit buffer 1 (in bytes)
+ * \param buffer2Length Length of the data put in the transmit buffer 2 (in bytes)
+ * \return None
+ */
+IFX_EXTERN void IfxEth_sendTransmitBuffersRingMode(IfxEth *eth, uint16 buffer1Length, uint16 buffer2Length);
+
+/** \brief Sets the MAC address
+ * \param eth ETH driver structure
+ * \param macAddress MAC address
+ * \return None
+ */
+IFX_EXTERN void IfxEth_setMacAddress(IfxEth *eth, const uint8 *macAddress);
+
+/** \brief Start the receiver functions
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_startReceiver(IfxEth *eth);
+
+/** \brief Stops the receiver functions
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_stopReceiver(IfxEth *eth);
+
+/** \brief writes the header format into buffrer
+ * \param eth ETH driver structure
+ * \param txBuffer pointer to tx buffer
+ * \param destinationAddress pointer to destination address
+ * \param sourceAddress pointer to source address
+ * \param packetSize size of the packet
+ * \return None
+ */
+IFX_EXTERN void IfxEth_writeHeader(IfxEth *eth, uint8 *txBuffer, uint8 *destinationAddress, uint8 *sourceAddress, uint32 packetSize);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_Utility
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get pointer to next RX descriptor
+ * \param descr descr Pointer to an RX descriptor
+ * \return next RX descriptor
+ */
+IFX_INLINE IfxEth_RxDescr *IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr);
+
+/** \brief release RX descriptor
+ * \param descr pointer to Rx descriptor
+ * \return None
+ */
+IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr);
+
+/** \brief Release a TX descriptor for transmit queue
+ * \param descr Enter_String_herdescr Pointer to a TX descriptore
+ * \return None
+ */
+IFX_INLINE void IfxEth_TxDescr_release(IfxEth_TxDescr *descr);
+
+/** \brief resets Ethernet Configuration register
+ * \return None
+ */
+IFX_INLINE void IfxEth_clearMacConfiguration(void);
+
+/** \brief Get pointer to actual RX descriptor
+ * \param eth eth ETH driver structure
+ */
+IFX_INLINE IfxEth_RxDescr *IfxEth_getActualRxDescriptor(IfxEth *eth);
+
+/**
+ */
+IFX_INLINE uint32 IfxEth_getActualRxIndex(IfxEth *eth);
+
+/** \brief Get pointer to actual TX descriptor
+ * \param eth eth ETH driver structure
+ */
+IFX_INLINE IfxEth_TxDescr *IfxEth_getActualTxDescriptor(IfxEth *eth);
+
+/** \brief Get pointer to base RX descriptor
+ * \param eth eth ETH driver structure
+ */
+IFX_INLINE IfxEth_RxDescr *IfxEth_getBaseRxDescriptor(IfxEth *eth);
+
+/** \brief Get pointer to base TX descriptor
+ * \param eth eth ETH driver structure
+ */
+IFX_INLINE IfxEth_TxDescr *IfxEth_getBaseTxDescriptor(IfxEth *eth);
+
+/** \brief returns the status of th eloopback mode
+ * \param eth ETH driver structure
+ * \return Loop back mode status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxEth_getLoopbackMode(IfxEth *eth);
+
+/** \brief Returns pointer to the MAC address configured for this ETH
+ * \param eth ETH driver structure
+ */
+IFX_INLINE void *IfxEth_getMacAddressPointer(IfxEth *eth);
+
+/** \brief returns the Receive Process State
+ * \param eth ETH driver structure
+ * \return Receive Process State
+ */
+IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState(IfxEth *eth);
+
+/** \brief Returns length of the oldest available RX data
+ * \param eth ETH driver structure
+ * \return Data length
+ */
+IFX_INLINE uint16 IfxEth_getRxDataLength(IfxEth *eth);
+
+/** \brief Returns the SRC pointer of Eth
+ * \param eth ETH driver structure
+ * \return pointer to ETH SRCR register
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEth_getSrcPointer(IfxEth *eth);
+
+/** \brief returns the Transmit Process State
+ * \param eth ETH driver structure
+ * \return Transmit Process State
+ */
+IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState(IfxEth *eth);
+
+/** \brief Checks whether Early Receive interrupt is requested
+ * \param eth ETH driver structure
+ * \return TRUE/FALSE
+ */
+IFX_INLINE boolean IfxEth_isEriInterrupt(IfxEth *eth);
+
+/** \brief Checks whether physical connection is active
+ * \param eth ETH driver structure
+ * \return retval zero Connection is inactive
+ * retval non zero Connection is active
+ */
+IFX_INLINE boolean IfxEth_isLinkActive(IfxEth *eth);
+
+/** \brief Checks whether NIS interrupt is requested
+ * \param eth ETH driver structure
+ * \return TRUE/FALSE
+ */
+IFX_INLINE boolean IfxEth_isNisInterrupt(IfxEth *eth);
+
+/**
+ * \param eth pointer to ETH driver structure
+ */
+IFX_INLINE boolean IfxEth_isRxChecksumError(IfxEth *eth);
+
+/** \brief Checks whether one or more RX data is available
+ * \param eth ETH driver structure
+ * \return retval TRUE one or more RX data is available
+ * retval FALSE no RX data is available
+ */
+IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth);
+
+/** \brief Checks whether receive interrupt is requested
+ * \param eth ETH driver structure
+ * \return TRUE/FALSE
+ */
+IFX_INLINE boolean IfxEth_isRxInterrupt(IfxEth *eth);
+
+/** \brief Checks whether Transmit Buffer Unavailable interrupt is requested
+ * \param eth ETH driver structure
+ * \return TRUE/FALSE
+ */
+IFX_INLINE boolean IfxEth_isTuInterrupt(IfxEth *eth);
+
+/** \brief Checks whether transmit interrupt is requested
+ * \param eth ETH driver structure
+ * \return TRUE/FALSE
+ */
+IFX_INLINE boolean IfxEth_isTxInterrupt(IfxEth *eth);
+
+/** \brief reads the status of all flags
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_INLINE void IfxEth_readAllFlags(IfxEth *eth);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable ETH Module
+ * \return None
+ */
+IFX_EXTERN void IfxEth_disableModule(void);
+
+/** \brief Enable ETH Module
+ * \return None
+ */
+IFX_EXTERN void IfxEth_enableModule(void);
+
+/** \brief Gets receive buffer\n
+ * note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed
+ * \param eth ETH driver structure
+ * \return retval NULL_PTR no received frame
+ * retval !NULL_PTR a frame has been received
+ */
+IFX_EXTERN void *IfxEth_getReceiveBuffer(IfxEth *eth);
+
+/** \brief Get a free transmit buffer
+ * \param eth ETH driver structure
+ * \return retval NULL_PTR no free transmit buffer is available
+ * retval !NULL_PTR a free transmit buffer is available
+ */
+IFX_EXTERN void *IfxEth_getTransmitBuffer(IfxEth *eth);
+
+/** \brief Reads the MAC address from module register
+ * \param eth ETH driver structure
+ * \param macAddress MAC address
+ * \return None
+ */
+IFX_EXTERN void IfxEth_readMacAddress(IfxEth *eth, uint8 *macAddress);
+
+/** \brief resets Ethernet kernel
+ * \return None
+ */
+IFX_EXTERN void IfxEth_resetModule(void);
+
+/**
+ * \param eth pointer to ETH driver structure
+ * \param len length of buffer
+ * \return None
+ */
+IFX_EXTERN void IfxEth_setAndSendTransmitBuffer(IfxEth *eth, void *buffer, uint16 len);
+
+/** \brief Set up checksum Engine
+ * \param eth eth ETH driver structure
+ * \param mode specifies checksum mode
+ * \return None
+ */
+IFX_EXTERN void IfxEth_setupChecksumEngine(IfxEth *eth, IfxEth_ChecksumMode mode);
+
+/** \brief Shuffle to next RX descriptor
+ * \param eth eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_shuffleRxDescriptor(IfxEth *eth);
+
+/** \brief Shuffle to next TX descriptor
+ * \param eth eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_shuffleTxDescriptor(IfxEth *eth);
+
+/** \brief Start the transmitter functions
+ * \param eth eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_startTransmitter(IfxEth *eth);
+
+/** \brief Stop the transmitter functions
+ * \param eth eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_stopTransmitter(IfxEth *eth);
+
+/** \brief Wakeup the receiver functions
+ * \param eth eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_wakeupReceiver(IfxEth *eth);
+
+/** \brief Wakeup the transmitter functions
+ * \param eth eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_wakeupTransmitter(IfxEth *eth);
+
+/** \} */
+
+/** \addtogroup IfxLld_Eth_Std_Initialisation
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Setup some properties of a TX descriptor
+ * \param descr Enter_Sdescr Pointer to a TX descriptortring_here
+ * \param length specifies length of transmit descriptor
+ * \param firstSegment specifies first segment of frame
+ * \param lastSegment specifies last segment of frame
+ * \return None
+ */
+IFX_INLINE void IfxEth_TxDescr_setup(IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment);
+
+/** \brief Sets the receive buffer1 of the receive descriptor along with its size
+ * \param eth ETH driver structure
+ * \param descr Pointer to Rx descreptor
+ * \param address Buffer 1 start address
+ * \param size Buffer 1 size
+ * \return None
+ */
+IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size);
+
+/** \brief Sets the receive buffer2 of the receive descriptor along with its size
+ * \param eth ETH driver structure
+ * \param descr Pointer to Rx descreptor
+ * \param address Buffer 1 start address
+ * \param size Buffer 1 size
+ * \return None
+ */
+IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size);
+
+/** \brief Sets the transmit buffer1 of the receive descriptor along with its size
+ * \param eth ETH driver structure
+ * \param descr Pointer to Tx descreptor
+ * \param address Buffer 1 start address
+ * \param size Buffer 1 size
+ * \return None
+ */
+IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size);
+
+/** \brief Sets the transmit buffer2 of the receive descriptor along with its size
+ * \param eth ETH driver structure
+ * \param descr Pointer to Tx descreptor
+ * \param address Buffer 1 start address
+ * \param size Buffer 1 size
+ * \return None
+ */
+IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the driver
+ * \param eth ETH driver structure
+ * \param config ETH configuration structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_init(IfxEth *eth, const IfxEth_Config *config);
+
+/** \brief Initialises the configuration Structure
+ * \param config ETH configuration structure
+ * \param ethSfr Pointer to register base
+ * \return None
+ */
+IFX_EXTERN void IfxEth_initConfig(IfxEth_Config *config, Ifx_ETH *ethSfr);
+
+/** \brief Initialises the receive descriptors
+ * \param eth ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_initReceiveDescriptors(IfxEth *eth);
+
+/** \brief Initialises the receive descriptors
+ * \param eth ETH driver structure
+ * \param config Ring mode Rx buffers configuration
+ * \return None
+ */
+IFX_EXTERN void IfxEth_initReceiveDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeRxBuffersConfig *config);
+
+/** \brief Initialises transmit descriptors
+ * \param eth pointer to ETH driver structure
+ * \return None
+ */
+IFX_EXTERN void IfxEth_initTransmitDescriptors(IfxEth *eth);
+
+/** \brief Initialises transmit descriptors
+ * \param eth pointer to ETH driver structure
+ * \param config Ring mode Tx buffers configuration
+ * \return None
+ */
+IFX_EXTERN void IfxEth_initTransmitDescriptorsRingMode(IfxEth *eth, const IfxEth_RingModeTxBuffersConfig *config);
+
+/** \brief Set up MII mode input pins
+ * \param eth eth pointer to ETH driver structure
+ * \param miiPins pin of port to be set
+ * \return None
+ */
+IFX_EXTERN void IfxEth_setupMiiInputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins);
+
+/** \brief setup MII mode output pins
+ * \param eth eth pointer to ETH driver structure
+ * \param miiPins pin of port to be set
+ * \return None
+ */
+IFX_EXTERN void IfxEth_setupMiiOutputPins(IfxEth *eth, const IfxEth_MiiPins *miiPins);
+
+/** \brief Set up input pins
+ * \param eth eth pointer to ETH driver structure
+ * \param rmiiPins pin of port to be set
+ * \return None
+ */
+IFX_EXTERN void IfxEth_setupRmiiInputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins);
+
+/** \brief set output pin of port
+ * \param eth eth pointer to ETH driver structure
+ * \param rmiiPins pin of port to be set
+ * \return None
+ */
+IFX_EXTERN void IfxEth_setupRmiiOutputPins(IfxEth *eth, const IfxEth_RmiiPins *rmiiPins);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+/** \brief receive buffers
+ */
+IFX_EXTERN uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
+
+IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr;
+
+/** \brief Transmit buffers
+ */
+IFX_EXTERN uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE];
+
+IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr;
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE IfxEth_RxDescr *IfxEth_RxDescr_getNext(IfxEth_RxDescr *descr)
+{
+ return (IfxEth_RxDescr *)(descr->RDES3.U);
+}
+
+
+IFX_INLINE void IfxEth_RxDescr_release(IfxEth_RxDescr *descr)
+{
+ descr->RDES0.A.OWN = 1U;
+}
+
+
+IFX_INLINE void IfxEth_RxDescr_setBuffer(IfxEth_RxDescr *descr, void *buffer)
+{
+ descr->RDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), buffer);
+}
+
+
+IFX_INLINE IfxEth_TxDescr *IfxEth_TxDescr_getNext(IfxEth_TxDescr *descr)
+{
+ return (IfxEth_TxDescr *)(descr->TDES3.U);
+}
+
+
+IFX_INLINE boolean IfxEth_TxDescr_isAvailable(IfxEth_TxDescr *descr)
+{
+ return (descr->TDES0.A.OWN == 0) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxEth_TxDescr_release(IfxEth_TxDescr *descr)
+{
+ descr->TDES0.A.OWN = 1U;
+}
+
+
+IFX_INLINE void IfxEth_TxDescr_setBuffer(IfxEth_TxDescr *descr, void *buffer)
+{
+ descr->TDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), buffer);
+}
+
+
+IFX_INLINE void IfxEth_TxDescr_setup(IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment)
+{
+ IfxEth_TxDescr0 tdes0;
+
+ tdes0.U = descr->TDES0.U;
+ tdes0.A.FS = firstSegment;
+ tdes0.A.LS = lastSegment;
+ descr->TDES0.U = tdes0.U;
+ descr->TDES1.U = length;
+}
+
+
+IFX_INLINE void IfxEth_applySoftwareReset(IfxEth *eth)
+{
+ (void)eth;
+ ETH_BUS_MODE.B.SWR = 1; /* reset module */
+}
+
+
+IFX_INLINE void IfxEth_clearEriInterrupt(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_ERI_OFF));
+}
+
+
+IFX_INLINE void IfxEth_clearMacConfiguration(void)
+{
+ MODULE_ETH.MAC_CONFIGURATION.U = 0;
+}
+
+
+IFX_INLINE void IfxEth_clearRxInterrupt(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_RI_OFF));
+}
+
+
+IFX_INLINE void IfxEth_clearTuInterrupt(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_TU_OFF));
+}
+
+
+IFX_INLINE void IfxEth_clearTxInterrupt(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.STATUS.U = (uint32)((1 << IFX_ETH_STATUS_NIS_OFF) | (1 << IFX_ETH_STATUS_TI_OFF));
+}
+
+
+IFX_INLINE void IfxEth_disableTimeStampCoarseUpdate(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSCFUPDT = 0;
+}
+
+
+IFX_INLINE void IfxEth_disableTimeStampForIpv4Frames(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPV4ENA = 0;
+}
+
+
+IFX_INLINE void IfxEth_enableMmcCounter(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.MMC_CONTROL.B.CNTFREEZ = 0;
+}
+
+
+IFX_INLINE void IfxEth_enableTimeStamp(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSENA = 1;
+}
+
+
+IFX_INLINE void IfxEth_enableTimeStampCoarseUpdate(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSCFUPDT = 1;
+}
+
+
+IFX_INLINE void IfxEth_enableTimeStampForAllFrames(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSENALL = 1;
+}
+
+
+IFX_INLINE void IfxEth_enableTimeStampForEthFrames(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPENA = 1;
+}
+
+
+IFX_INLINE void IfxEth_enableTimeStampForIpv4Frames(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSIPV4ENA = 1;
+}
+
+
+IFX_INLINE void IfxEth_enableTimeStampForVer2Format(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSVER2ENA = 1;
+}
+
+
+IFX_INLINE IfxEth_RxDescr *IfxEth_getActualRxDescriptor(IfxEth *eth)
+{
+ return eth->pRxDescr;
+}
+
+
+IFX_INLINE uint32 IfxEth_getActualRxIndex(IfxEth *eth)
+{
+ uint32 offset = (uint32)eth->pRxDescr - (uint32)IfxEth_getBaseRxDescriptor(eth);
+ return offset / sizeof(IfxEth_RxDescr);
+}
+
+
+IFX_INLINE IfxEth_TxDescr *IfxEth_getActualTxDescriptor(IfxEth *eth)
+{
+ return eth->pTxDescr;
+}
+
+
+IFX_INLINE IfxEth_RxDescr *IfxEth_getBaseRxDescriptor(IfxEth *eth)
+{
+ return eth->rxDescr->items;
+}
+
+
+IFX_INLINE IfxEth_TxDescr *IfxEth_getBaseTxDescriptor(IfxEth *eth)
+{
+ return eth->txDescr->items;
+}
+
+
+IFX_INLINE boolean IfxEth_getLoopbackMode(IfxEth *eth)
+{
+ (void)eth;
+ return (ETH_MAC_CONFIGURATION.B.LM != 0) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void *IfxEth_getMacAddressPointer(IfxEth *eth)
+{
+ return (void *)eth->config.macAddress;
+}
+
+
+IFX_INLINE IfxEth_ReceiveProcessState IfxEth_getReceiveProcessState(IfxEth *eth)
+{
+ (void)eth;
+ return (IfxEth_ReceiveProcessState)MODULE_ETH.STATUS.B.RS;
+}
+
+
+IFX_INLINE uint16 IfxEth_getRxDataLength(IfxEth *eth)
+{
+ uint16 length = 0;
+
+ if (IfxEth_isRxDataAvailable(eth) != FALSE)
+ {
+ length = (uint16)IfxEth_getActualRxDescriptor(eth)->RDES0.A.FL;
+ }
+
+ return length;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxEth_getSrcPointer(IfxEth *eth)
+{
+ (void)eth;
+ return &MODULE_SRC.ETH.ETH[0].SR;
+}
+
+
+IFX_INLINE boolean IfxEth_getTimeStampInitialiseStatus(IfxEth *eth)
+{
+ (void)eth;
+ return MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT;
+}
+
+
+IFX_INLINE boolean IfxEth_getTimeStampUpdateStatus(IfxEth *eth)
+{
+ (void)eth;
+ return MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT;
+}
+
+
+IFX_INLINE IfxEth_TransmitProcessState IfxEth_getTransmitProcessState(IfxEth *eth)
+{
+ (void)eth;
+ return (IfxEth_TransmitProcessState)MODULE_ETH.STATUS.B.TS;
+}
+
+
+IFX_INLINE void IfxEth_initialiseTimeStamp(IfxEth *eth)
+{
+ (void)eth;
+
+ if (MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT == 0)
+ {
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSINIT = 1;
+ }
+}
+
+
+IFX_INLINE boolean IfxEth_isEriInterrupt(IfxEth *eth)
+{
+ (void)eth;
+
+ return MODULE_ETH.STATUS.B.ERI != 0;
+}
+
+
+IFX_INLINE boolean IfxEth_isLinkActive(IfxEth *eth)
+{
+ return eth->config.phyLink() != 0;
+}
+
+
+IFX_INLINE boolean IfxEth_isNisInterrupt(IfxEth *eth)
+{
+ (void)eth;
+
+ return MODULE_ETH.STATUS.B.NIS != 0;
+}
+
+
+IFX_INLINE boolean IfxEth_isRxChecksumError(IfxEth *eth)
+{
+ IfxEth_RxDescr *descr = IfxEth_getActualRxDescriptor(eth);
+ boolean error = (descr->RDES0.A.IPC != 0);
+ descr->RDES0.A.IPC = 0;
+
+ return error;
+}
+
+
+IFX_INLINE boolean IfxEth_isRxDataAvailable(IfxEth *eth)
+{
+ //return (IfxEth_rxDescr[eth->rxIndex][0] & (1U << 31)) == 0);
+ return IfxEth_getActualRxDescriptor(eth)->RDES0.A.OWN == 0;
+}
+
+
+IFX_INLINE boolean IfxEth_isRxInterrupt(IfxEth *eth)
+{
+ (void)eth;
+
+ return MODULE_ETH.STATUS.B.RI != 0;
+}
+
+
+IFX_INLINE boolean IfxEth_isSoftwareResetDone(IfxEth *eth)
+{
+ (void)eth;
+ return ETH_BUS_MODE.B.SWR == 0 ? 1 : 0;
+}
+
+
+IFX_INLINE boolean IfxEth_isTuInterrupt(IfxEth *eth)
+{
+ (void)eth;
+
+ return MODULE_ETH.STATUS.B.TU != 0;
+}
+
+
+IFX_INLINE boolean IfxEth_isTxInterrupt(IfxEth *eth)
+{
+ (void)eth;
+
+ return MODULE_ETH.STATUS.B.TI != 0;
+}
+
+
+IFX_INLINE void IfxEth_readAllFlags(IfxEth *eth)
+{
+ eth->status.U = ETH_STATUS.U;
+}
+
+
+IFX_INLINE void IfxEth_setAddToTimeUpdate(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.ADDSUB = 0;
+}
+
+
+IFX_INLINE void IfxEth_setBinaryRolloverControl(IfxEth *eth, boolean enabled)
+{
+ (void)eth;
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSCTRLSSR = 1;
+}
+
+
+IFX_INLINE void IfxEth_setLoopbackMode(IfxEth *eth, boolean loopbackMode)
+{
+ (void)eth;
+ ETH_MAC_CONFIGURATION.B.LM = loopbackMode ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxEth_setNanoSecondsUpdateValue(IfxEth *eth, uint8 value)
+{
+ (void)eth;
+ MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.TSSS = value;
+}
+
+
+IFX_INLINE void IfxEth_setPhyInterfaceMode(IfxEth *eth, IfxEth_PhyInterfaceMode mode)
+{
+ (void)eth;
+ ETH_GPCTL.B.EPR = mode;
+}
+
+
+IFX_INLINE void IfxEth_setReceiveBuffer1RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
+{
+ descr->RDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
+ descr->RDES1.A.RBS1 = size;
+}
+
+
+IFX_INLINE void IfxEth_setReceiveBuffer2RingMode(IfxEth *eth, IfxEth_RxDescr *descr, uint32 address, uint16 size)
+{
+ descr->RDES3.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
+ descr->RDES1.A.RBS2 = size;
+}
+
+
+IFX_INLINE void IfxEth_setReceiveDescriptorAddress(Ifx_ETH *eth, void *address)
+{
+ eth->RECEIVE_DESCRIPTOR_LIST_ADDRESS.U = (uint32)address;
+}
+
+
+IFX_INLINE void IfxEth_setSecondsUpdateValue(IfxEth *eth, uint8 value)
+{
+ (void)eth;
+ MODULE_ETH.SYSTEM_TIME_SECONDS_UPDATE.B.TSS = value;
+}
+
+
+IFX_INLINE void IfxEth_setSubSecondIncrementValue(IfxEth *eth, uint8 value)
+{
+ (void)eth;
+ MODULE_ETH.SUB_SECOND_INCREMENT.B.SSINC = value;
+}
+
+
+IFX_INLINE void IfxEth_setSubtractToTimeUpdate(IfxEth *eth)
+{
+ (void)eth;
+ MODULE_ETH.SYSTEM_TIME_NANOSECONDS_UPDATE.B.ADDSUB = 1;
+}
+
+
+IFX_INLINE void IfxEth_setTransmitBuffer1RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
+{
+ descr->TDES2.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
+ descr->TDES1.A.TBS1 = size;
+}
+
+
+IFX_INLINE void IfxEth_setTransmitBuffer2RingMode(IfxEth *eth, IfxEth_TxDescr *descr, uint32 address, uint16 size)
+{
+ descr->TDES3.U = (uint32)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), address);
+ descr->TDES1.A.TBS2 = size;
+}
+
+
+IFX_INLINE void IfxEth_setTransmitDescriptorAddress(Ifx_ETH *eth, void *address)
+{
+ eth->TRANSMIT_DESCRIPTOR_LIST_ADDRESS.U = (uint32)address;
+}
+
+
+IFX_INLINE void IfxEth_updateTimeStamp(IfxEth *eth)
+{
+ (void)eth;
+
+ if (MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT == 0)
+ {
+ MODULE_ETH.TIMESTAMP_CONTROL.B.TSUPDT = 1;
+ }
+}
+
+
+IFX_INLINE void *IfxEth_waitTransmitBuffer(IfxEth *eth)
+{
+ void *tx;
+
+ do
+ {
+ tx = IfxEth_getTransmitBuffer(eth);
+ } while (tx == NULL_PTR);
+
+ return tx;
+}
+
+
+#endif /* IFXET_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Crc/IfxFce_Crc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Crc/IfxFce_Crc.c
new file mode 100644
index 0000000..dcd90d6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Crc/IfxFce_Crc.c
@@ -0,0 +1,286 @@
+/**
+ * \file IfxFce_Crc.c
+ * \brief FCE CRC details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxFce_Crc.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
+{
+ Ifx_FCE *fceSFR = fce->fce;
+ uint32 inputDataCounter;
+ uint16 crcResultValue;
+ uint16 *dataPtr = (uint16 *)crcData;
+
+ fceSFR->IN2.CHECK.U = 0xFACECAFE;
+ fceSFR->IN2.LENGTH.U = 0xFACECAFE;
+ fceSFR->IN2.CHECK.U = (uint16)fce->expectedCrc;
+ fceSFR->IN2.LENGTH.U = crcDataLength;
+
+ /*Configure CRC register*/
+ fceSFR->IN2.CRC.U = crcStartValue;
+ {
+ /*Code for CRC-16 calculaion with 0x1021 polynomial*/
+ for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
+ {
+ fceSFR->IN2.IR.U = *(dataPtr++);
+ }
+ }
+
+ crcResultValue = (uint16)fceSFR->IN2.RES.U;
+
+ return crcResultValue;
+}
+
+
+uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
+{
+ Ifx_FCE *fceSFR = fce->fce;
+ uint32 inputDataCounter;
+ uint32 crcResultValue;
+ uint32 *dataPtr = (uint32 *)crcData;
+ volatile uint32 *inPtr;
+
+ /*Crc-32 calculaion with 0x04C11DB7 polynomial*/
+ if (fce->crc32Kernel == IfxFce_Crc32Kernel_0)
+ {
+ fceSFR->IN0.CHECK.U = 0xFACECAFE;
+ fceSFR->IN0.LENGTH.U = 0xFACECAFE;
+ fceSFR->IN0.CHECK.U = fce->expectedCrc;
+ fceSFR->IN0.LENGTH.U = crcDataLength;
+ fceSFR->IN0.CRC.U = crcStartValue;
+
+ inPtr = (volatile uint32 *)&fceSFR->IN0.IR.U;
+ }
+ else
+ {
+ fceSFR->IN1.CHECK.U = 0xFACECAFE;
+ fceSFR->IN1.LENGTH.U = 0xFACECAFE;
+ fceSFR->IN1.CHECK.U = fce->expectedCrc;
+ fceSFR->IN1.LENGTH.U = crcDataLength;
+ fceSFR->IN1.CRC.U = crcStartValue;
+
+ inPtr = (volatile uint32 *)&fceSFR->IN1.IR.U;
+ }
+
+ {
+ for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
+ {
+ *inPtr = *(dataPtr++);
+ }
+ }
+
+ if (fce->crc32Kernel == IfxFce_Crc32Kernel_0)
+ {
+ crcResultValue = fceSFR->IN0.RES.U;
+ }
+ else
+ {
+ crcResultValue = fceSFR->IN1.RES.U;
+ }
+
+ return crcResultValue;
+}
+
+
+uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
+{
+ Ifx_FCE *fceSFR = fce->fce;
+ uint32 inputDataCounter;
+ uint8 crcResultValue;
+ uint8 *dataPtr = (uint8 *)crcData;
+
+ fceSFR->IN3.CHECK.U = 0xFACECAFE;
+ fceSFR->IN3.LENGTH.U = 0xFACECAFE;
+ fceSFR->IN3.CHECK.U = (uint8)fce->expectedCrc;
+ fceSFR->IN3.LENGTH.U = crcDataLength;
+
+ /*Configure CRC register*/
+ fceSFR->IN3.CRC.U = crcStartValue;
+
+ /*Code for CRC-8 calculaion for 0x1D polynomials*/
+ {
+ /* input in INIT register */
+ for (inputDataCounter = 0; inputDataCounter < crcDataLength; ++inputDataCounter)
+ {
+ fceSFR->IN3.IR.U = *(dataPtr++);
+ }
+ }
+ crcResultValue = (uint8)fceSFR->IN3.RES.U;
+
+ return crcResultValue;
+}
+
+
+void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce)
+{
+ if (fce->crcMode == IfxFce_CrcMode_8)
+ {
+ IfxFce_clearCrc8ErrorFlags(fce->fce);
+ }
+ else if (fce->crcMode == IfxFce_CrcMode_16)
+ {
+ IfxFce_clearCrc16ErrorFlags(fce->fce);
+ }
+ else
+ {
+ IfxFce_clearCrc32ErrorFlags(fce->fce, fce->crc32Kernel);
+ }
+}
+
+
+void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce)
+{
+ IfxFce_resetModule(fce->fce);
+}
+
+
+Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce)
+{
+ if (fce->crcMode == IfxFce_CrcMode_8)
+ {
+ return IfxFce_getCrc8InterruptStatus(fce->fce);
+ }
+ else if (fce->crcMode == IfxFce_CrcMode_16)
+ {
+ return IfxFce_getCrc16InterruptStatus(fce->fce);
+ }
+ else
+ {
+ return IfxFce_getCrc32InterruptStatus(fce->fce, fce->crc32Kernel);
+ }
+}
+
+
+void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig)
+{
+ fceCrc->fce = crcConfig->fce;
+ Ifx_FCE *fceSFR = crcConfig->fce;
+
+ fceCrc->crcMode = crcConfig->crcMode;
+ fceCrc->expectedCrc = crcConfig->expectedCrc;
+
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(password);
+
+ Ifx_FCE_CFG tempCFG;
+ tempCFG.U = 0;
+ tempCFG.B.CMI = crcConfig->enabledInterrupts.crcMismatch;
+ tempCFG.B.CEI = crcConfig->enabledInterrupts.configError;
+ tempCFG.B.LEI = crcConfig->enabledInterrupts.lengthError;
+ tempCFG.B.BEI = crcConfig->enabledInterrupts.busError;
+ tempCFG.B.CCE = crcConfig->crcCheckCompared;
+ tempCFG.B.ALR = crcConfig->automaticLengthReload;
+ tempCFG.B.REFIN = crcConfig->dataByteReflectionEnabled;
+ tempCFG.B.REFOUT = crcConfig->crc32BitReflectionEnabled;
+ tempCFG.B.XSEL = crcConfig->crcResultInverted;
+
+ if (crcConfig->crcMode == IfxFce_CrcMode_8)
+ {
+ fceSFR->IN3.CFG.U = tempCFG.U;
+ }
+ else if (crcConfig->crcMode == IfxFce_CrcMode_16)
+ {
+ fceSFR->IN2.CFG.U = tempCFG.U;
+ }
+ else
+ {
+ fceCrc->crc32Kernel = crcConfig->crc32Kernel;
+
+ if (crcConfig->crc32Kernel == IfxFce_Crc32Kernel_0)
+ {
+ fceSFR->IN0.CFG.U = tempCFG.U;
+ }
+ else
+ {
+ fceSFR->IN1.CFG.U = tempCFG.U;
+ }
+ }
+
+ IfxScuWdt_setCpuEndinit(password);
+}
+
+
+void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce)
+{
+ crcConfig->fce = fce->fce;
+ crcConfig->crcMode = IfxFce_CrcMode_32;
+ crcConfig->crcCheckCompared = TRUE;
+ crcConfig->automaticLengthReload = FALSE;
+ crcConfig->dataByteReflectionEnabled = TRUE;
+ crcConfig->crc32BitReflectionEnabled = TRUE;
+ crcConfig->crcResultInverted = TRUE;
+ crcConfig->enabledInterrupts.crcMismatch = FALSE; // enable if CRC is already known
+ crcConfig->enabledInterrupts.configError = TRUE;
+ crcConfig->enabledInterrupts.lengthError = TRUE;
+ crcConfig->enabledInterrupts.busError = TRUE;
+}
+
+
+void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config)
+{
+ fce->fce = config->fce;
+ Ifx_FCE *fceSFR = config->fce;
+
+ IfxFce_enableModule(fceSFR);
+
+ volatile Ifx_SRC_SRCR *src = IfxFce_getSrcPointer(fceSFR);
+ IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
+ IfxSrc_enable(src);
+}
+
+
+void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce)
+{
+ config->fce = fce;
+ config->isrPriority = 0;
+ config->isrTypeOfService = IfxSrc_Tos_cpu0;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Crc/IfxFce_Crc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Crc/IfxFce_Crc.h
new file mode 100644
index 0000000..8e7a33a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Crc/IfxFce_Crc.h
@@ -0,0 +1,565 @@
+/**
+ * \file IfxFce_Crc.h
+ * \brief FCE CRC details
+ * \ingroup IfxLld_Fce
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Fce_Crc_Usage How to use the FCE CRC Interface driver?
+ * \ingroup IfxLld_Fce
+ *
+ *
+ *
+ * FCE gives CRC-x(x= 8,16,32) message signatures. Kernel 3 is used for CRC-8,Kernel 2 is used for CRC-16,Kernel 0 1nd Kernel 1 is used for CRC-32.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Fce_Fce_Preparation Preparation
+ * \subsection IfxLld_Fce_Fce_Include Include Files
+ *
+ * Include following header file into your C code:
+ *
+ * \code
+ * #include
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Fce_Crc_Variables Variables
+ *
+ * Declare the FCE and CRC handles as global variable in your C code:
+ * \code
+ * // used globally
+ * static IfxFce_Crc fce;
+ * static IfxFce_Crc_Crc fceCrc32_0;
+ * static IfxFce_Crc_Crc fceCrc32_1;
+ * static IfxFce_Crc_Crc fceCrc16;
+ * static IfxFce_Crc_Crc fceCrc8;
+ * \endcode
+ *
+ * \subsection IfxLld_Fce_Crc_Interrupt Interrupt Handler Installation
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define IFX_INTPRIO_FCE 1
+ * \endcode
+ *
+ * Add the interrupt service routine to your C code which should do the error flag handling:
+ * \code
+ * IFX_INTERRUPT(fceISR, 0, IFX_INTPRIO_FCE)
+ * {
+ * {
+ * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_0);
+ * if (interruptStatus.U )
+ * {
+ * if ( interruptStatus.B.CMF == 1)
+ * {
+ * // CRC Mismatch Error...!
+ * }
+ * if( interruptStatus.B.CEF == 1)
+ * {
+ * // Configuration Error...!
+ * }
+ * if ( interruptStatus.B.LEF == 1)
+ * {
+ * // Length Error...!
+ * }
+ * if ( interruptStatus.B.BEF == 1)
+ * {
+ * // Bus Error...!
+ * }
+ * }
+ * IfxFce_Crc_clearErrorFlags(&fceCrc32_0);
+ * }
+ *
+ * {
+ * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc32_1);
+ * if (interruptStatus.U )
+ * {
+ * if ( interruptStatus.B.CMF == 1)
+ * {
+ * // CRC Mismatch Error...!
+ * }
+ * if( interruptStatus.B.CEF == 1)
+ * {
+ * // Configuration Error...!
+ * }
+ * if ( interruptStatus.B.LEF == 1)
+ * {
+ * // Length Error...!
+ * }
+ * if ( interruptStatus.B.BEF == 1)
+ * {
+ * // Bus Error...!
+ * }
+ * }
+ * IfxFce_Crc_clearErrorFlags(&fceCrc32_1);
+ * }
+ *
+ * {
+ * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc16);
+ * if (interruptStatus.U )
+ * {
+ * if ( interruptStatus.B.CMF == 1)
+ * {
+ * // CRC Mismatch Error...!
+ * }
+ * if( interruptStatus.B.CEF == 1)
+ * {
+ * // Configuration Error...!
+ * }
+ * if ( interruptStatus.B.LEF == 1)
+ * {
+ * // Length Error...!
+ * }
+ * if ( interruptStatus.B.BEF == 1)
+ * {
+ * // Bus Error...!
+ * }
+ * }
+ * IfxFce_Crc_clearErrorFlags(&fceCrc16);
+ * }
+ *
+ * {
+ * Ifx_FCE_STS interruptStatus = IfxFce_Crc_getInterruptStatus(&fceCrc8);
+ * if (interruptStatus.U )
+ * {
+ * if ( interruptStatus.B.CMF == 1)
+ * {
+ * // CRC Mismatch Error...!
+ * }
+ * if( interruptStatus.B.CEF == 1)
+ * {
+ * // Configuration Error...!
+ * }
+ * if ( interruptStatus.B.LEF == 1)
+ * {
+ * // Length Error...!
+ * }
+ * if ( interruptStatus.B.BEF == 1)
+ * {
+ * // Bus Error...!
+ * }
+ * }
+ * IfxFce_Crc_clearErrorFlags(&fceCrc8);
+ * }
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handler in your initialisation function:
+ * \code
+ * // install interrupt handler
+ * IfxCpu_Irq_installInterruptHandler(fceISR, IFX_INTPRIO_FCE);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Fce_Fce_InitCrc Module Initialisation
+ *
+ * The module initialisation can be done in the same function. Here an example for all CRC kernels:
+ * \code
+ * // create module config
+ * IfxFce_Crc_Config fceConfig;
+ * IfxFce_Crc_initModuleConfig(&fceConfig, &MODULE_FCE0);
+ *
+ * // ISR priorities and interrupt target
+ * fceConfig.isrPriority = IFX_INTPRIO_FCE;
+ * fceConfig.isrTypeOfService = IfxCpu_Irq_getTos( IfxCpu_getCoreIndex());
+ *
+ * // initialize module
+ * //IfxFce_Crc fce; // defined globally
+ * IfxFce_Crc_initModule(&fce, &fceConfig);
+ *
+ * // initialize CRC kernels
+ * IfxFce_Crc_CrcConfig crcConfig;
+ * IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
+ *
+ * //IfxFce_Crc_Crc fceCrc32_0; // defined globally
+ * IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
+ * //IfxFce_Crc_Crc fceCrc32_1; // defined globally
+ * crcConfig.crc32Kernel = IfxFce_Crc32Kernel_1;
+ *
+ *
+ * IfxFce_Crc_initCrc(&fceCrc32_1, &crcConfig);
+ * crcConfig.crc32Kernel = IfxFce_Crc32Kernel_0;
+ *
+ * //IfxFce_Crc_Crc fceCrc16; // defined globally
+ * crcConfig.crcMode = IfxFce_CrcMode_16;
+ * IfxFce_Crc_initCrc(&fceCrc16, &crcConfig);
+ *
+ * //IfxFce_Crc_Crc fceCrc8; // defined globally
+ * crcConfig.crcMode = IfxFce_CrcMode_8;
+ * crcConfig.useDma = TRUE; // Enable Dma transfer
+ * crcConfig.fceChannelId = IfxDma_ChannelId_0;
+ * IfxFce_Crc_initCrc(&fceCrc8, &crcConfig);
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Fce_Fce_ErrorIRQ Error Interrupt on CRC mismatch
+ *
+ * By default, all error interrupts aside from the CRC mismatch interrupt (CMF) are enabled.
+ *
+ * In order to use the CMF interrupt as well, the appr. error flag has to be enabled during configuration:
+ * \code
+ * // initialize CRC kernel with CRC check enabled
+ * IfxFce_Crc_CrcConfig crcConfig;
+ * IfxFce_Crc_initCrcConfig(&crcConfig, &fce);
+ * crcConfig.enabledInterrupts.crcMismatch = TRUE;
+ * IfxFce_Crc_initCrc(&fceCrc32_0, &crcConfig);
+ * \endcode
+ *
+ * And the expected CRC value has to be written into the expectedCrc field of the handle before the CRC calculation is started.
+ *
+ * \code
+ * {
+ * // Expected CRC:
+ * fceCrc32_0.expectedCrc = 0xd95def75;
+ *
+ * // do calculation
+ * uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
+ *
+ * // we can expect, that an error interrupt has been triggered if the CRC over checkData didn't match.
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Fce_Fce_calculateCrc CRC Calculation
+ *
+ * Now, all 4 FCE kernels are configured and can be used to calculate CRC values.
+ *
+ * In following examples, CRC is calculated over following array:
+ * \code
+ * #define CHECK_DATA_SIZE 25 // declare this portion globally
+ * // if Dma is enabled, align memory to 32 byte
+ * uint32 checkData[CHECK_DATA_SIZE] = {
+ * 0xbe9957bb,
+ * 0x1c706c1e,
+ * 0x14c3db3f,
+ * 0x7fb17a93,
+ * 0xb0d9d5a7,
+ * 0x768093e0,
+ * 0x88b206a0,
+ * 0xc51299e4,
+ * 0xe8a97d48,
+ * 0x89367f27,
+ * 0x70095984,
+ * 0xec030f75,
+ * 0xdc22f8d4,
+ * 0xd951407b,
+ * 0x34ae18c6,
+ * 0x4d47ba7d,
+ * 0x0e2e4622,
+ * 0x4a2e90d3,
+ * 0xdaec3752,
+ * 0xcd3ed11c,
+ * 0x36b416b7,
+ * 0x8ea28658,
+ * 0xdd37eee3,
+ * 0x23928b62,
+ * 0x84eb4b22,
+ * };
+ * \endcode
+ *
+ * Function calls:
+ * \code
+ * // Common usage:
+ * {
+ * uint32 fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_0, checkData, CHECK_DATA_SIZE, 0x00000000);
+ *
+ * // -> CRC32 will be 0xd95def75
+ * }
+ *
+ * // Piecewise CRC calculation over two (more more) memory blocks.
+ * // Please note that the initial value requires a bytewise reflection, and an inversion whenever it's passed for the next calculation:
+ * {
+ * uint32 fceCrc;
+ *
+ * fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[0], CHECK_DATA_SIZE-10, 0x00000000);
+ * fceCrc = IfxFce_Crc_calculateCrc32(&fceCrc32_1, (uint32 *)&checkData[CHECK_DATA_SIZE-10], 10, ~IfxFce_reflectCrc32(fceCrc, 32));
+ *
+ * // -> CRC32 will be 0xd95def75 (as well)
+ * }
+ *
+ * // using the CRC16 kernel
+ * {
+ * uint32 fceCrc;
+ *
+ * fceCrc = IfxFce_Crc_calculateCrc16(&fceCrc16, (uint16 *)checkData, CHECK_DATA_SIZE*2, 0x00000000);
+ *
+ * // -> CRC16 will be 0xda6f
+ * }
+ *
+ * // using the CRC8 kernel
+ * {
+ * uint32 fceCrc;
+ *
+ * fceCrc = IfxFce_Crc_calculateCrc8(&fceCrc8, (uint8 *)checkData, CHECK_DATA_SIZE*4, 0x00000000);
+ *
+ * // -> CRC8 will be 0x61
+ * }
+ * \endcode
+ *
+ * /
+ *
+ *
+ *
+ *
+ *
+ *
+ * \defgroup IfxLld_Fce_Crc CRC
+ * \ingroup IfxLld_Fce
+ * \defgroup IfxLld_Fce_Crc_DataStructures Data Structures
+ * \ingroup IfxLld_Fce_Crc
+ * \defgroup IfxLld_Fce_Crc_Module Module Initialise Functions
+ * \ingroup IfxLld_Fce_Crc
+ * \defgroup IfxLld_Fce_Crc_Operative CRC Operation Functions
+ * \ingroup IfxLld_Fce_Crc
+ * \defgroup IfxLld_Fce_Crc_Interrupt Interrupt Status Function
+ * \ingroup IfxLld_Fce_Crc
+ */
+
+#ifndef IFXFCE_CRC_H
+#define IFXFCE_CRC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Fce/Std/IfxFce.h"
+#include "Cpu/Irq/IfxCpu_Irq.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Fce_Crc_DataStructures
+ * \{ */
+/** \brief Specifies the interrupt enable structure
+ */
+typedef struct
+{
+ boolean crcMismatch; /**< \brief Specifies enabel/disable of CRC mismatch interrupt */
+ boolean configError; /**< \brief Specifies enabel/disable of configuration error interrupt */
+ boolean lengthError; /**< \brief Specifies enabel/disable of length error interrupt */
+ boolean busError; /**< \brief Specifies enabel/disable of bus error interrupt */
+} IfxFce_Crc_EnabledInterrupts;
+
+/** \} */
+
+/** \addtogroup IfxLld_Fce_Crc_DataStructures
+ * \{ */
+/** \brief FCE Module Handle;
+ */
+typedef struct
+{
+ Ifx_FCE *fce; /**< \brief Pointer to FCE registers */
+} IfxFce_Crc;
+
+/** \brief Configuration structure of the module
+ */
+typedef struct
+{
+ Ifx_FCE *fce; /**< \brief Pointer to FCE registers */
+ uint16 isrPriority; /**< \brief interrupt priority */
+ IfxSrc_Tos isrTypeOfService; /**< \brief type of interrupt service */
+} IfxFce_Crc_Config;
+
+/** \brief Specifies the pointer to FCE module handler
+ */
+typedef struct
+{
+ Ifx_FCE *fce; /**< \brief Specifies pointer to FCE module registers */
+ IfxFce_CrcMode crcMode; /**< \brief Specifies the CRC mode */
+ uint32 expectedCrc; /**< \brief Specifies the expected CRC to be compared with resulted. */
+ IfxFce_Crc32Kernel crc32Kernel; /**< \brief Specifies the kernel used for CRC-32 */
+} IfxFce_Crc_Crc;
+
+/** \brief Specifies the module configuration structure
+ */
+typedef struct
+{
+ Ifx_FCE *fce; /**< \brief Specifies pointer to FCE module registers */
+ boolean crcCheckCompared; /**< \brief Specifies whether CRC check comparision is enabled or not */
+ boolean automaticLengthReload; /**< \brief Specifies the enable/disable of automatic length reload */
+ boolean dataByteReflectionEnabled; /**< \brief Specifies enable/disable of input data byte wise reflection */
+ boolean crc32BitReflectionEnabled; /**< \brief Specifies enable/disable of CRC 32-bit wise reflection */
+ uint32 expectedCrc; /**< \brief Specifies the expected CRC to be compared with resulted. */
+ IfxFce_CrcMode crcMode; /**< \brief Specifies the CRC mode */
+ boolean crcResultInverted; /**< \brief Specifies the XOR valueto get the final CRC */
+ IfxFce_Crc32Kernel crc32Kernel; /**< \brief Specifies the kernel used for CRC-32 */
+ IfxFce_Crc_EnabledInterrupts enabledInterrupts; /**< \brief Specifies the interrupt enable structure */
+} IfxFce_Crc_CrcConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Fce_Crc_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Deinitialises the FCE module
+ * \param fce Specifies the pointer to FCE module handler
+ * \return None
+ *
+ * Reset the module
+ *
+ * \code
+ * IfxFce_Crc fce;
+ * //Deinitialise the module
+ * IfxFce_Crc_deInitModule(&fce);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxFce_Crc_deInitModule(IfxFce_Crc_Crc *fce);
+
+/** \brief Initialise the FCE module for CRC computation according to CRC mode
+ * \param fceCrc Specifies the pointer to CRC handle
+ * \param crcConfig Specifies the FCE CRC configuration structure
+ * \return None
+ *
+ * Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ *
+ */
+IFX_EXTERN void IfxFce_Crc_initCrc(IfxFce_Crc_Crc *fceCrc, const IfxFce_Crc_CrcConfig *crcConfig);
+
+/** \brief Initialises the default CRC configuration buffer
+ * \param crcConfig Specifies the FCE CRC configuration structure
+ * \param fce Pointer to the FCE module handle
+ * \return None
+ *
+ * Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ *
+ */
+IFX_EXTERN void IfxFce_Crc_initCrcConfig(IfxFce_Crc_CrcConfig *crcConfig, IfxFce_Crc *fce);
+
+/** \brief Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ * \param fce module handle
+ * \param config predefined configuration structure of the module
+ * \return None
+ */
+IFX_EXTERN void IfxFce_Crc_initModule(IfxFce_Crc *fce, const IfxFce_Crc_Config *config);
+
+/** \brief Fills the config structure with default values
+ * \param config configuration structure of the module
+ * \param fce pointer to FCE registers
+ * \return None
+ *
+ * Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ *
+ */
+IFX_EXTERN void IfxFce_Crc_initModuleConfig(IfxFce_Crc_Config *config, Ifx_FCE *fce);
+
+/** \} */
+
+/** \addtogroup IfxLld_Fce_Crc_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Calculate the XORed 16-bit CRC value and returns it. It takes the precomputed XORed and reversed.
+ * \param fce Specifies the pointer to FCE module handler
+ * \param crcData Length of the input data block
+ * \param crcDataLength Length of the input data block
+ * \param crcStartValue start value for CRC calculation
+ * \return Final CRC after XORed with XOR value.
+ *
+ * Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ *
+ */
+IFX_EXTERN uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue);
+
+/** \brief Calculate the XORed 32-bit CRC value and returns it. It takes the precomputed XORed and reversed.
+ * \param fce Specifies the pointer to FCE module handler
+ * \param crcData pointer to the input data block
+ * \param crcDataLength Length of the input data block
+ * \param crcStartValue start value for CRC calculation
+ * \return Final CRC after XORed with XOR value.
+ *
+ * Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ *
+ */
+IFX_EXTERN uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue);
+
+/** \brief Calculate the XORed 8-bit CRC value and returns it. It takes the precomputed XORed and reversed.
+ * \param fce Specifies the pointer to FCE module handler
+ * \param crcData Length of the input data block
+ * \param crcDataLength Length of the input data block
+ * \param crcStartValue start value for CRC calculation
+ * \return Final CRC after XORed with XOR value.
+ *
+ * Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ *
+ */
+IFX_EXTERN uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue);
+
+/** \} */
+
+/** \addtogroup IfxLld_Fce_Crc_Interrupt
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the error flags
+ * \param fce Specifies the pointer to FCE module handler
+ * \return None
+ *
+ * Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ *
+ */
+IFX_EXTERN void IfxFce_Crc_clearErrorFlags(IfxFce_Crc_Crc *fce);
+
+/** \brief Gets the current CRC interrupt status.
+ * \param fce Specifies the pointer to FCE module handler
+ * \return Current interrupt status
+ *
+ * Usage Example: see \ref IfxLld_Fce_Crc_Usage
+ *
+ */
+IFX_EXTERN Ifx_FCE_STS IfxFce_Crc_getInterruptStatus(IfxFce_Crc_Crc *fce);
+
+/** \} */
+
+#endif /* IFXFCE_CRC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Std/IfxFce.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Std/IfxFce.c
new file mode 100644
index 0000000..3432e8d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Std/IfxFce.c
@@ -0,0 +1,124 @@
+/**
+ * \file IfxFce.c
+ * \brief FCE basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxFce.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce)
+{
+ Ifx_FCE_STS interruptStatus;
+ interruptStatus.U = fce->IN2.STS.U;
+ return interruptStatus;
+}
+
+
+Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
+{
+ Ifx_FCE_STS interruptStatus;
+
+ if (crc32Kernel == IfxFce_Crc32Kernel_0)
+ {
+ interruptStatus.U = fce->IN0.STS.U;
+ }
+ else
+ {
+ interruptStatus.U = fce->IN1.STS.U;
+ }
+
+ return interruptStatus;
+}
+
+
+Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce)
+{
+ Ifx_FCE_STS interruptStatus;
+ interruptStatus.U = fce->IN3.STS.U;
+ return interruptStatus;
+}
+
+
+uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength)
+{
+ uint32 ReversedData = 0x0U;
+ uint8 inputDataCounter;
+
+ for (inputDataCounter = 0; inputDataCounter < crcLength; ++inputDataCounter)
+ {
+ if (crcStartValue & 0x01)
+ {
+ ReversedData |= (uint32)((uint32)1 << ((crcLength - 1) - inputDataCounter));
+ }
+
+ crcStartValue = (uint32)((uint32)crcStartValue >> (uint32)1);
+ }
+
+ return ReversedData;
+}
+
+
+void IfxFce_resetModule(Ifx_FCE *fce)
+{
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(password);
+ fce->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ fce->KRST0.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(password);
+
+ while (0 == fce->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(password);
+ fce->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(password);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Std/IfxFce.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Std/IfxFce.h
new file mode 100644
index 0000000..bc3ddc5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Std/IfxFce.h
@@ -0,0 +1,250 @@
+/**
+ * \file IfxFce.h
+ * \brief FCE basic functionality
+ * \ingroup IfxLld_Fce
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Fce_Std_Enum Enumerations
+ * \ingroup IfxLld_Fce_Std
+ * \defgroup IfxLld_Fce_Std_Module Module Functions
+ * \ingroup IfxLld_Fce_Std
+ * \defgroup IfxLld_Fce_Std_Support Support Function
+ * \ingroup IfxLld_Fce_Std
+ * \defgroup IfxLld_Fce_Std_InterruptStatus Interrupt Status Functions
+ * \ingroup IfxLld_Fce_Std
+ */
+
+#ifndef IFXFCE_H
+#define IFXFCE_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxFce_cfg.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "IfxFce_reg.h"
+#include "Src/Std/IfxSrc.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Fce_Std_Enum
+ * \{ */
+/** \brief Ifx_FCE_INx(x= 0,1), Specifies the kernel used for CRC-32
+ */
+typedef enum
+{
+ IfxFce_Crc32Kernel_0 = 0, /**< \brief Specifies the kernel0 used for CRC-32 */
+ IfxFce_Crc32Kernel_1 /**< \brief Specifies the kernel1 used for CRC-32 */
+} IfxFce_Crc32Kernel;
+
+/** \brief Specifies the CRC mode
+ */
+typedef enum
+{
+ IfxFce_CrcMode_8 = 0, /**< \brief Specifies the 8-bit CRC mode */
+ IfxFce_CrcMode_16 = 1, /**< \brief Specifies the 16-bit CRC mode */
+ IfxFce_CrcMode_32 = 2 /**< \brief Specifies the 32-bit CRC mode */
+} IfxFce_CrcMode;
+
+/** \} */
+
+/** \addtogroup IfxLld_Fce_Std_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable the control of FCE module
+ * \param fce Specifies pointer to FCE module registers
+ * \return None
+ */
+IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce);
+
+/** \brief Enable the control of FCE module
+ * \param fce Specifies pointer to FCE module registers
+ * \return None
+ */
+IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reset the module by clearing the kernel
+ * \param fce Specifies pointer to FCE module registers
+ * \return None
+ */
+IFX_EXTERN void IfxFce_resetModule(Ifx_FCE *fce);
+
+/** \} */
+
+/** \addtogroup IfxLld_Fce_Std_Support
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reflects the CRC data and returns it
+ * \param crcStartValue start value for reflection
+ * \param crcLength length of reflected value
+ * \return Reflected CRC data
+ */
+IFX_EXTERN uint32 IfxFce_reflectCrc32(uint32 crcStartValue, uint8 crcLength);
+
+/** \} */
+
+/** \addtogroup IfxLld_Fce_Std_InterruptStatus
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the CRC-16 error flags
+ * \param fce Specifies pointer to FCE module registers
+ * \return None
+ */
+IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce);
+
+/** \brief Clears the CRC-32 error flags
+ * \param fce Specifies pointer to FCE module registers
+ * \param crc32Kernel Specifies the kernel used for CRC-32
+ * \return None
+ */
+IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel);
+
+/** \brief Clears the CRC-8 error flags
+ * \param fce Specifies pointer to FCE module registers
+ * \return None
+ */
+IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce);
+
+/** \brief Returns the SRC pointer for FCE
+ * \param fce Specifies pointer to FCE module registers
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxFce_getSrcPointer(Ifx_FCE *fce);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the CRC-16 interrupt status
+ * \param fce Specifies pointer to FCE module registers
+ * \return Current CRC-16 interrupt status
+ */
+IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc16InterruptStatus(Ifx_FCE *fce);
+
+/** \brief Gets the CRC-32 interrupt status
+ * \param fce Specifies pointer to FCE module registers
+ * \param crc32Kernel Specifies the kernel used for CRC-32
+ * \return Current CRC-32 interrupt status
+ */
+IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc32InterruptStatus(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel);
+
+/** \brief Gets the CRC-8 interrupt status
+ * \param fce Specifies pointer to FCE module registers
+ * \return Current CRC-8 interrupt status
+ */
+IFX_EXTERN Ifx_FCE_STS IfxFce_getCrc8InterruptStatus(Ifx_FCE *fce);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxFce_clearCrc16ErrorFlags(Ifx_FCE *fce)
+{
+ fce->IN2.STS.U = 0x0000000fU;
+}
+
+
+IFX_INLINE void IfxFce_clearCrc32ErrorFlags(Ifx_FCE *fce, IfxFce_Crc32Kernel crc32Kernel)
+{
+ if (crc32Kernel == IfxFce_Crc32Kernel_0)
+ {
+ fce->IN0.STS.U = 0x0000000fU;
+ }
+ else
+ {
+ fce->IN1.STS.U = 0x0000000fU;
+ }
+}
+
+
+IFX_INLINE void IfxFce_clearCrc8ErrorFlags(Ifx_FCE *fce)
+{
+ fce->IN3.STS.U = 0x0000000fU;
+}
+
+
+IFX_INLINE void IfxFce_disableModule(Ifx_FCE *fce)
+{
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(password);
+ fce->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(password);
+}
+
+
+IFX_INLINE void IfxFce_enableModule(Ifx_FCE *fce)
+{
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(password);
+ fce->CLC.B.DISR = 0;
+ IfxScuWdt_setCpuEndinit(password);
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxFce_getSrcPointer(Ifx_FCE *fce)
+{
+ IFX_UNUSED_PARAMETER(fce);
+ return &SRC_FCE;
+}
+
+
+#endif /* IFXFCE_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Fft/IfxFft_Fft.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Fft/IfxFft_Fft.c
new file mode 100644
index 0000000..eddba04
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Fft/IfxFft_Fft.c
@@ -0,0 +1,744 @@
+/**
+ * \file IfxFft_Fft.c
+ * \brief FFT FFT details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxFft_Fft.h"
+
+/******************************************************************************/
+/*----------------------------------Macros------------------------------------*/
+/******************************************************************************/
+
+#define IFXFFT_FFT_DATA_TRANSFER (*((volatile uint64 *)IFXFFT_DATA_SPACE))
+
+#define IFXFFT_FFT_WINDOW_TRANSFER (*((volatile uint64 *)IFXFFT_WINDOW_SPACE))
+
+#define IFXFFT_FFT_DMADISCARDCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 2)
+
+#define IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE + 1)
+
+#define IFXFFT_FFT_DMAINPUTCHANNELID_OPT (IFXFFT_FFT_DMA_CHANNEL_BASE)
+
+#define IFXFFT_FFT_DMADISCARDCHANNELID (dmaDiscard->channelId)
+
+#define IFXFFT_FFT_DMAOUTPUTCHANNELID (dmaOutput->channelId)
+
+#define IFXFFT_FFT_DMAINPUTCHANNELID (dmaInput->channelId)
+
+#define IFXFFT_FFT_MOVE_BTR4 1
+
+#define IFXFFT_FFT_MOVE_SIZE IfxDma_ChannelMoveSize_256bit
+
+#define IFXFFT_FFT_MOVE_DIV 4
+
+#define IFXFFT_FFT_ISALIGNED(address) ((Ifx_AlignOn256((uint32)address) == (uint32)address))
+
+/** \addtogroup IfxLld_Fft_Fft_ModuleFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Configures the CSR register
+ * \param config Configuration structure for the FFT job
+ * \return Desired value to write into the Ifx_FFT.CSR register
+ */
+IFX_STATIC uint32 IfxFft_Fft_calcCSR(const IfxFft_Fft_JobConfig *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Fft_Fft_TransformFuntions
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Unloads output data from the FFT engine
+ * \param job FFT job handle
+ * \return None
+ */
+IFX_STATIC void IfxFft_Fft_unloadOutput(IfxFft_Fft_Job *job);
+
+/** \brief Loads input data into the FFT engine
+ * \param job FFT job handle
+ * \return None
+ */
+IFX_STATIC void IfxFft_Fft_loadInput(IfxFft_Fft_Job *job);
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Calculates the input counters and output counters
+ * \param job job FFT job
+ * \param jobConfig jobConfig Pointer to the job configuration
+ * \return None
+ */
+IFX_STATIC void IfxFft_Fft_calcCounters(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig);
+
+/******************************************************************************/
+/*------------------------Private Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_STATIC uint64 IfxFft_Fft_dummy256[IFXFFT_FFT_MOVE_DIV];
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+IFX_STATIC uint32 IfxFft_Fft_calcCSR(const IfxFft_Fft_JobConfig *config)
+{
+ uint32 csr =
+ (config->fftLength << IFX_FFT_CSR_LENGTH_OFF) |
+ (config->inputFormat << IFX_FFT_CSR_IN_FMT_OFF) |
+ (config->outputFormat << IFX_FFT_CSR_OUT_FMT_OFF) |
+ (config->operation << IFX_FFT_CSR_IFFT_OFF) |
+ ((config->useWindowFunction ? 0U : 1U) << IFX_FFT_CSR_WIN_BYP_OFF);
+ return csr;
+}
+
+
+void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob)
+{
+ *newJob = *originalJob;
+ originalJob->nextJob = newJob;
+}
+
+
+IFX_STATIC void IfxFft_Fft_unloadOutput(IfxFft_Fft_Job *job)
+{
+#if IFXFFT_FFT_DMA_SUPPORT
+#if IFXFFT_FFT_HW_EXEC
+ volatile Ifx_SRC_SRCR *srcr;
+ sint16 discardCount;
+
+#if !IFXFFT_FFT_OPTIMIZED
+ IfxDma_Dma_Channel *dmaOutput = &(job->fft->outputDmaChannel);
+ IfxDma_Dma_Channel *dmaDiscard = &(job->fft->discardDmaChannel);
+ Ifx_DMA *dmaSFR = dmaOutput->dma;
+#else
+ Ifx_DMA *dmaSFR = (&MODULE_DMA);
+#endif
+#if IFXFFT_FFT_OPTIMIZED
+ IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT, job->outputPtr);
+ IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT, job->count64.output);
+#else
+ IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID, job->outputPtr);
+ IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID, job->count64.output);
+#endif
+ discardCount = (job->count64.result - job->count64.output);
+
+ if (discardCount > 0)
+ {
+#if IFXFFT_FFT_OPTIMIZED
+ IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID_OPT, IfxFft_Fft_dummy256);
+ IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID_OPT, discardCount);
+#else
+ IfxDma_setChannelDestinationAddress(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID, IfxFft_Fft_dummy256);
+ IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMADISCARDCHANNELID, discardCount);
+#endif
+
+#if IFXFFT_FFT_OPTIMIZED
+ srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
+#else
+ srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
+#endif
+ srcr->B = job->fft->srcrOutDis;
+ }
+ else
+ {
+#if IFXFFT_FFT_OPTIMIZED
+ srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
+#else
+ srcr = IfxDma_getSrcPointer(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
+#endif
+ srcr->B = job->fft->srcrOutEnd;
+ }
+
+#if IFXFFT_FFT_OPTIMIZED
+ IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID_OPT);
+#else
+ IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAOUTPUTCHANNELID);
+#endif
+#endif
+
+#else
+ sint16 i;
+ uint64 *output64;
+
+ output64 = job->outputPtr;
+
+ for (i = 0; i < job->count64.output; i++)
+ {
+ *(output64++) = IFXFFT_FFT_DATA_TRANSFER;
+ }
+
+ for ( ; i < job->count64.result; i++)
+ {
+ volatile uint64 dummy64 = IFXFFT_FFT_DATA_TRANSFER;
+
+ if (dummy64) // avoid warning message (unused variable)
+ {}
+ }
+
+#endif
+}
+
+
+void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
+{
+ // take over FFT handle
+ job->fft = jobConfig->fft;
+ job->nextJob = NULL_PTR;
+
+ // engine control
+ job->csr.U = IfxFft_Fft_calcCSR(jobConfig);
+ job->inputPtr = jobConfig->inputPtr;
+ job->outputPtr = jobConfig->outputPtr;
+
+ // move counters
+ IfxFft_Fft_calcCounters(job, jobConfig);
+
+ // config check
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) <= IFXFFT_MAX_LENGTH);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, jobConfig->inputLength > 0);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, jobConfig->outputLength > 0);
+#if IFXFFT_FFT_DMA_SUPPORT
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) == jobConfig->inputLength);
+#else
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) >= jobConfig->inputLength);
+#endif
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (IfxFft_getLengthFromCode(jobConfig->fftLength)) >= jobConfig->outputLength);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(jobConfig->outputLength));
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(job->inputPtr));
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFXFFT_FFT_ISALIGNED(job->outputPtr));
+}
+
+
+void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft)
+{
+ config->fft = fft;
+ config->inputLength = 256;
+ config->outputLength = 256;
+ config->fftLength = IfxFft_Length_256;
+ config->inputFormat = IfxFft_Input_realSInt32;
+ config->outputFormat = IfxFft_Output_complexSInt32;
+ config->operation = IfxFft_Operation_fft;
+ config->useWindowFunction = FALSE;
+ config->inputPtr = NULL_PTR;
+ config->outputPtr = NULL_PTR;
+}
+
+
+void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
+{
+#if !IFXFFT_FFT_OPTIMIZED
+ Ifx_FFT *fftSFR = config->fft;
+ Ifx_LMU *lmuSFR = config->lmu;
+
+ fft->fft = fftSFR;
+ fft->lmu = lmuSFR;
+#else
+ Ifx_FFT *fftSFR = (&MODULE_FFT);
+ Ifx_LMU *lmuSFR = (&MODULE_LMU);
+#endif
+#if IFXFFT_FFT_DMA_SUPPORT
+
+ fft->inputIdx = 0;
+ fft->job[0] = 0;
+ fft->job[1] = 0;
+#endif
+
+ if (IfxFft_isModuleEnabled(fftSFR) == FALSE)
+ {
+ IfxFft_enableModule(fftSFR, lmuSFR);
+ }
+
+#if IFXFFT_FFT_DMA_SUPPORT
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->outputPriority > 0);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputPriority > 0);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->intraPriority > 0);
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputDmaChannelId != IfxDma_ChannelId_none);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->outputDmaChannelId != IfxDma_ChannelId_none);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->discardDmaChannelId != IfxDma_ChannelId_none);
+
+ IfxFft_Fft_initDma(fft, config);
+#else
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->typeOfService != IfxSrc_Tos_dma);
+
+ if (config->outputPriority > 0)
+ {
+ volatile Ifx_SRC_SRCR *srcr;
+ // FFT DONE as ISR output
+ srcr = IfxFft_getSrcPointerDone(fftSFR);
+ IfxSrc_init(srcr, config->typeOfService, config->outputPriority);
+ IfxSrc_enable(srcr);
+ }
+
+#endif
+}
+
+
+void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu)
+{
+#if !IFXFFT_FFT_OPTIMIZED
+ config->fft = fft;
+ config->lmu = lmu;
+#endif
+
+#if IFXFFT_FFT_DMA_SUPPORT
+#if IFXFFT_FFT_OPTIMIZED
+ config->inputDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE;
+ config->outputDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE + 1;
+ config->discardDmaChannelId = IFXFFT_FFT_DMA_CHANNEL_BASE + 2;
+#else
+ config->fft = fft;
+ config->lmu = lmu;
+ config->inputDmaChannelId = IfxDma_ChannelId_none;
+ config->outputDmaChannelId = IfxDma_ChannelId_none;
+ config->discardDmaChannelId = IfxDma_ChannelId_none;
+#endif
+#endif
+ config->inputPriority = 0;
+ config->outputPriority = 0;
+ config->typeOfService = IfxSrc_Tos_cpu0;
+}
+
+
+void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData)
+{
+ int i;
+ const uint64 *ptr = windowData;
+
+#if !IFXFFT_FFT_OPTIMIZED
+ /*IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, MODULE_LMU.MEMCON.B.FFTPFT == 0);*/
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, !IfxFft_isEngineBusy(fft->fft));
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IfxFft_isReadyForStart(fft->fft));
+#else
+ /*IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, MODULE_LMU.MEMCON.B.FFTPFT == 0);*/
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, !IfxFft_isEngineBusy(&MODULE_FFT));
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IfxFft_isReadyForStart(&MODULE_FFT));
+#endif
+
+ uint64 *wmem = (uint64 *)IFXFFT_WINDOW_SPACE;
+
+ for (i = 0; i < (IFXFFT_MAX_WINDOW_LENGTH / (sizeof(uint64) / sizeof(uint16))); i++)
+ {
+ *(wmem++) = *(ptr++);
+ }
+}
+
+
+void IfxFft_Fft_isrInput(IfxFft_Fft *fft)
+{
+#if IFXFFT_FFT_DMA_SUPPORT
+
+#if IFXFFT_FFT_PIPELINED
+ IfxFft_Fft_Job *inputJob = fft->job[0];
+
+ if (fft->inputIdx == 0)
+ {
+ if (inputJob != NULL_PTR)
+ {
+ IfxFft_Fft_startJob(inputJob);
+ }
+ }
+ else
+ {
+ if (fft->flags & IFXFFT_FFT_FLAG_DONE)
+ {
+ fft->flags = 0;
+ IfxFft_Fft_unloadOutput(fft->job[1]);
+ fft->job[1] = fft->job[1]->nextJob;
+ }
+ else
+ {
+ if (fft->inputIdx > fft->intraIdx)
+ {
+ fft->flags = IFXFFT_FFT_FLAG_INPUT;
+ }
+ }
+ }
+
+ if (fft->inputIdx == IFXFFT_FFT_NUM_JOBS)
+ {
+ __debug();
+ }
+
+ fft->inputIdx++;
+
+#endif
+#endif
+}
+
+
+void IfxFft_Fft_isrOutput(IfxFft_Fft *fft)
+{
+#if IFXFFT_FFT_PIPELINED
+ IfxFft_Fft_Job *outputJob = fft->job[1];
+
+ if (outputJob != NULL_PTR)
+ {
+ if (outputJob->nextJob != NULL_PTR)
+ {
+ IfxFft_Fft_Job *inputJob = fft->job[0];
+
+ if (inputJob != NULL_PTR)
+ {
+ IfxFft_Fft_startJob(inputJob);
+ }
+ else
+ {
+ if (fft->flags & IFXFFT_FFT_FLAG_DONE)
+ {
+ fft->flags = 0;
+ IfxFft_Fft_unloadOutput(outputJob);
+ fft->job[1] = outputJob->nextJob;
+ }
+ else
+ {
+ fft->flags = IFXFFT_FFT_FLAG_INPUT;
+ }
+ }
+ }
+ else
+ {
+ if (fft->flags & IFXFFT_FFT_FLAG_DONE)
+ {
+ fft->flags = 0;
+ IfxFft_Fft_unloadOutput(outputJob);
+ fft->job[1] = outputJob->nextJob;
+ }
+ else
+ {
+ fft->flags = IFXFFT_FFT_FLAG_INPUT;
+ }
+ }
+ }
+
+#else
+ IfxFft_Fft_Job *outputJob = fft->job[0];
+
+#if !IFXFFT_FFT_DMA_SUPPORT
+ IfxFft_Fft_unloadOutput(outputJob);
+#endif
+
+ if (outputJob->nextJob != NULL_PTR)
+ {
+ boolean result = IfxFft_Fft_startJob(outputJob->nextJob);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
+ }
+ else
+ {
+ fft->job[0] = NULL_PTR;
+ }
+
+#endif
+}
+
+
+IFX_STATIC void IfxFft_Fft_loadInput(IfxFft_Fft_Job *job)
+{
+#if IFXFFT_FFT_DMA_SUPPORT
+
+#if !IFXFFT_FFT_OPTIMIZED
+ IfxDma_Dma_Channel *dmaInput = &job->fft->inputDmaChannel;
+ Ifx_DMA *dmaSFR = dmaInput->dma;
+#else
+ Ifx_DMA *dmaSFR = (&MODULE_DMA);
+#endif
+#if IFXFFT_FFT_HW_EXEC
+#if IFXFFT_FFT_OPTIMIZED
+ IfxDma_setChannelSourceAddress(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT, job->inputPtr);
+ IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT, job->count64.input);
+ IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID_OPT);
+#else
+ IfxDma_setChannelSourceAddress(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID, job->inputPtr);
+ IfxDma_setChannelTransferCount(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID, job->count64.input);
+ IfxDma_startChannelTransaction(dmaSFR, IFXFFT_FFT_DMAINPUTCHANNELID);
+#endif
+#endif
+#else
+ sint16 i;
+ const uint64 *input64 = job->inputPtr;
+
+ for (i = 0; i < job->count64.input; i++)
+ {
+ IFXFFT_FFT_DATA_TRANSFER = *(input64++);
+ }
+
+ for ( ; i < job->count64.expect; i++)
+ {
+ IFXFFT_FFT_DATA_TRANSFER = (uint64)0ULL;
+ }
+
+#endif
+}
+
+
+void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr)
+{
+ job->inputPtr = inputPtr;
+ job->outputPtr = outputPtr;
+}
+
+
+boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job)
+{
+ IfxFft_Fft *fft = job->fft;
+#if !IFXFFT_FFT_OPTIMIZED
+ Ifx_FFT *fftSFR = fft->fft;
+#else
+ Ifx_FFT *fftSFR = (&MODULE_FFT);
+#endif
+ boolean result = IfxFft_isReadyForStart(fftSFR);
+
+ if (result != FALSE)
+ {
+ IfxFft_Fft_triggerEngine(fftSFR, job->csr.U);
+#if IFXFFT_FFT_PIPELINED
+
+ if (fft->job[1] == NULL_PTR)
+ {
+ fft->inputIdx = 0;
+ fft->intraIdx = 0;
+ fft->job[1] = job;
+ fft->flags = 0;
+ }
+
+#endif
+ IfxFft_Fft_loadInput(job);
+
+#if IFXFFT_FFT_PIPELINED
+ fft->job[0] = job->nextJob;
+#else
+ fft->job[0] = job;
+#endif
+ }
+
+ return result;
+}
+
+
+IFX_STATIC void IfxFft_Fft_calcCounters(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig)
+{
+ uint16 shift;
+
+ /* input counters */
+ if (jobConfig->inputFormat == IfxFft_Input_complexSInt32)
+ {
+ shift = 0;
+ }
+ else if (jobConfig->inputFormat == IfxFft_Input_realSInt16)
+ {
+ shift = 2;
+ }
+ else
+ {
+ shift = 1;
+ }
+
+ uint16 fftLength = IfxFft_getLengthFromCode(jobConfig->fftLength);
+#if IFXFFT_FFT_DMA_SUPPORT
+ job->count64.input = (jobConfig->inputLength >> shift) / IFXFFT_FFT_MOVE_DIV;
+ job->count64.expect = (fftLength >> shift) / IFXFFT_FFT_MOVE_DIV;
+#else
+ job->count64.input = jobConfig->inputLength >> shift;
+ job->count64.expect = fftLength >> shift;
+#endif
+ /* output counters */
+ shift = (jobConfig->outputFormat == IfxFft_Output_complexSInt32) ? 0 : 1;
+#if IFXFFT_FFT_DMA_SUPPORT
+ job->count64.result = (fftLength >> shift) / IFXFFT_FFT_MOVE_DIV;
+ job->count64.output = (jobConfig->outputLength >> shift) / IFXFFT_FFT_MOVE_DIV;
+#else
+ job->count64.result = fftLength >> shift;
+ job->count64.output = jobConfig->outputLength >> shift;
+#endif
+}
+
+
+void IfxFft_Fft_isrIntra(IfxFft_Fft *fft)
+{
+#if IFXFFT_FFT_DMA_SUPPORT
+
+# if IFXFFT_FFT_PIPELINED
+
+ if (fft->intraIdx == 0)
+ {
+ fft->flags = 0;
+ IfxFft_Fft_unloadOutput(fft->job[1]);
+ fft->job[1] = fft->job[1]->nextJob;
+ }
+ else
+ {
+ if (fft->flags & IFXFFT_FFT_FLAG_INPUT)
+ {
+ fft->flags = 0;
+ IfxFft_Fft_unloadOutput(fft->job[1]);
+ fft->job[1] = fft->job[1]->nextJob;
+ }
+ else
+ {
+ fft->flags = IFXFFT_FFT_FLAG_DONE;
+ }
+ }
+
+ fft->intraIdx++;
+# else
+ IfxFft_Fft_unloadOutput(fft->job[0]);
+# endif
+#endif
+}
+
+
+void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config)
+{
+#if IFXFFT_FFT_DMA_SUPPORT
+#if !IFXFFT_FFT_OPTIMIZED
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+ Ifx_FFT *fftSFR = config->fft;
+ IfxDma_Dma_Channel *inputDmaChannel = &fft->inputDmaChannel;
+ IfxDma_Dma_Channel *discardDmaChannel = &fft->discardDmaChannel;
+ IfxDma_Dma_Channel *outputDmaChannel = &fft->outputDmaChannel;
+#else
+ Ifx_FFT *fftSFR = (&MODULE_FFT);
+ Ifx_DMA *dmaSFR = (&MODULE_DMA);
+ IfxDma_Dma_Channel dmaChannel;
+ IfxDma_Dma_Channel *inputDmaChannel = &dmaChannel;
+ IfxDma_Dma_Channel *discardDmaChannel = &dmaChannel;
+ IfxDma_Dma_Channel *outputDmaChannel = &dmaChannel;
+#endif
+
+ IfxDma_Dma dma;
+ IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
+
+ IfxDma_Dma_ChannelConfig dmaCfg;
+ IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
+
+ dmaCfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
+ dmaCfg.operationMode = IfxDma_ChannelOperationMode_continuous;
+ dmaCfg.moveSize = IFXFFT_FFT_MOVE_SIZE;
+ dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+
+ {
+ /* output channel */
+ dmaCfg.channelId = config->outputDmaChannelId;
+ dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered via software
+ dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
+
+ // source address is fixed; use circular mode to stay at this address for each move
+ dmaCfg.sourceAddress = IFXFFT_DATA_SPACE;
+ dmaCfg.sourceCircularBufferEnabled = TRUE;
+
+ // destination address and transfer count will be configured during runtime
+ dmaCfg.destinationAddress = 0;
+ dmaCfg.destinationCircularBufferEnabled = FALSE;
+ dmaCfg.transferCount = 0;
+
+ IfxDma_Dma_initChannel(outputDmaChannel, &dmaCfg);
+ }
+ {
+ /* discard channel, reuse most configuration of output channel */
+ dmaCfg.channelId = config->discardDmaChannelId;
+ dmaCfg.hardwareRequestEnabled = TRUE; // will be triggered via output DMA channel
+ IfxDma_Dma_initChannel(discardDmaChannel, &dmaCfg);
+ }
+ {
+ /* input channel */
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->inputDmaChannelId != config->outputDmaChannelId);
+ dmaCfg.channelId = config->inputDmaChannelId;
+ dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered via software
+#if IFXFFT_FFT_PIPELINED
+ dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
+#else
+ dmaCfg.channelInterruptEnabled = FALSE; // no interrupt at end of transaction
+#endif
+ // source address and transfer count will be configured during runtime
+ dmaCfg.sourceAddress = 0;
+ dmaCfg.sourceCircularBufferEnabled = FALSE;
+ dmaCfg.transferCount = 0;
+
+ // destination address is fixed; use circular mode to stay at this address for each move
+ dmaCfg.destinationAddress = IFXFFT_DATA_SPACE;
+ dmaCfg.destinationCircularBufferEnabled = TRUE;
+
+ IfxDma_Dma_initChannel(inputDmaChannel, &dmaCfg);
+ }
+
+ {
+ volatile Ifx_SRC_SRCR *srcr;
+#if IFXFFT_FFT_PIPELINED
+ //Route DMA input SRC to CPU as ISR input
+ srcr = IfxDma_getSrcPointer(dmaSFR, config->inputDmaChannelId);
+ IfxSrc_init(srcr, config->typeOfService, config->inputPriority);
+ IfxSrc_enable(srcr);
+#endif
+ //Route FFT DONE SRC to CPU as ISR midjob
+ srcr = IfxFft_getSrcPointerDone(fftSFR);
+ IfxSrc_init(srcr, config->typeOfService, config->intraPriority);
+ IfxSrc_enable(srcr);
+
+ //Route output DMA request to discard DMA
+ srcr = IfxDma_getSrcPointer(dmaSFR, config->outputDmaChannelId);
+ IfxSrc_init(srcr, IfxSrc_Tos_dma, (Ifx_Priority)config->discardDmaChannelId);
+ IfxSrc_enable(srcr);
+ fft->srcrOutDis = srcr->B;
+
+ //Route DMA discard interrupt to CPU as ISR output
+ srcr = IfxDma_getSrcPointer(dmaSFR, config->discardDmaChannelId);
+ IfxSrc_init(srcr, config->typeOfService, config->outputPriority);
+ IfxSrc_enable(srcr);
+ fft->srcrOutEnd = srcr->B;
+ }
+#endif
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Fft/IfxFft_Fft.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Fft/IfxFft_Fft.h
new file mode 100644
index 0000000..b5d8ceb
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Fft/IfxFft_Fft.h
@@ -0,0 +1,463 @@
+/**
+ * \file IfxFft_Fft.h
+ * \brief FFT FFT details
+ * \ingroup IfxLld_Fft
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Fft_Fft_Usage How to use the FFT driver?
+ * \ingroup IfxLld_Fft
+ *
+ * The FFT interface driver provides a default FFT configuration for calculating forward and inverse FFTs of lengths 8 to 1024 (powers of 2 only) of real or complex input operands.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Fft_Fft_Preparation Preparation
+ * \subsection IfxLld_Fft_Fft_Include Include Files
+ *
+ * Include following header file into your C code:
+ *
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Fft_Fft_Variables Variables
+ *
+ * Declare the FFT handle, FFT job handle and the input output locations as global variables in your C code:
+ *
+ * \code
+ * // FFT window length
+ * #define FFT_LENGTH 512
+ *
+ * // source waveform (must be 256bit aligned!)
+ * __attribute__ ((aligned(256))) sint32 fftIn[FFT_LENGTH] = {
+ * #include "sinewave.inc"
+ * };
+ *
+ * // FFT result (must be 256bit aligned!)
+ * __attribute__ ((aligned(256))) sint32 fftOut[FFT_LENGTH*2];
+ *
+ * // used globally
+ * IfxFft_Fft fft;
+ * IfxFft_Fft_Job fftJob;
+ *
+ * volatile uint32 fftInterruptCounter;
+ * \endcode
+ *
+ * \subsection IfxLld_Fft_Fft_Interrupt Interrupt Handler Installation
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define ISR_PRIORITY_FFT_OUTPUT 1
+ * #define ISR_PRIORITY_FFT_INPUT 2
+ * #define ISR_PRIORITY_FFT_INTRA 3
+ * \endcode
+ *
+ * Add the interrupt service routines to your C code. They have to call the FFT interrupt handlers by passing the fftJob handle:
+ * \code
+ * IFX_INTERRUPT(ISR_Fft_intra, 0, ISR_PRIORITY_FFT_INTRA)
+ * {
+ * IfxFft_Fft_isrIntra(&fft);
+ * }
+ *
+ * IFX_INTERRUPT(ISR_Fft_input, 0, ISR_PRIORITY_FFT_INPUT)
+ * {
+ * IfxFft_Fft_isrInput(&fft);
+ * }
+ *
+ * IFX_INTERRUPT(ISR_Fft_output, 0, ISR_PRIORITY_FFT_output)
+ * {
+ * ++fftInterruptCounter;
+ *
+ * IfxFft_Fft_isrOutput(&fft);
+ *
+ * // do the next transform:
+ * while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler(&ISR_Fft_input, ISR_PRIORITY_FFT_INPUT);
+ * IfxCpu_Irq_installInterruptHandler(&ISR_Fft_output, ISR_PRIORITY_FFT_OUTPUT);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Fft_Fft_InitModule Module Initialisation
+ *
+ * The module initialisation can be done in the same function. Here an example:
+ * \code
+ * // create module config
+ * IfxFft_Fft_Config fftConfig;
+ * IfxFft_Fft_initModuleConfig(&fftConfig, &MODULE_FFT, &MODULE_LMU);
+ *
+ * // configure interrupts
+ * fftConfig.inputPriority = ISR_PRIORITY_FFT_INPUT;
+ * fftConfig.intraPriority = ISR_PRIORITY_FFT_INTRA;
+ * fftConfig.outputPriority = ISR_PRIORITY_FFT_OUTPUT;
+ * fftConfig.typeOfService = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
+ *
+ * // use DMA channels for input/output transfers
+ * fftConfig.inputDmaChannelId = IfxDma_ChannelId_4;
+ * fftConfig.outputDmaChannelId = IfxDma_ChannelId_5;
+ * fftConfig.discardDmaChannelId = IfxDma_ChannelId_6;
+ *
+ * // initialize module
+ * // IfxFft_Fft fft; // defined globally
+ * IfxFft_Fft_initModule(&fft, &fftConfig);
+ * \endcode
+ *
+ * \subsection IfxLld_Fft_Fft_InitJob Job Initialisation
+ *
+ * The FFT job initialisation can also be done in the same function. Here an example:
+ * \code
+ * // create FFT job config
+ * IfxFft_Fft_JobConfig fftJobConfig;
+ * IfxFft_Fft_initJobConfig(&fftJobConfig, &fft);
+ *
+ * // customize job
+ * fftJobConfig.fftLength = IfxFft_Length_512;
+ *
+ * fftJobConfig.inputFormat = IfxFft_Input_realSInt32;
+ * fftJobConfig.inputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftIn);
+ * fftJobConfig.inputLength = FFT_LENGTH;
+ *
+ * fftJobConfig.outputFormat = IfxFft_Output_complexSInt32;
+ * fftJobConfig.outputPtr = (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)fftOut);
+ * fftJobConfig.outputLength = FFT_LENGTH;
+ *
+ * // initialize FFT job
+ * // IfxFft_Fft_Job fftJob; // defined globally
+ * IfxFft_Fft_initJob(&fftJob, &fftJobConfig);
+ * \endcode
+ *
+ * The FFT is ready for use now!
+ *
+ *
+ * \section IfxLld_Fft_Fft_TransformFunctions Transform Functions
+ *
+ * The FFT driver provides simple function to perform the transforms.
+ *
+ * This means: you only have to start the FFT job with pre configured job handle and the transform will be done automatically by the FFT engine and an interrupt will be raised, indicating the end of treansform(DONE).
+ *
+ * \code
+ * // start job until return TRUE.
+ * while (IfxFft_Fft_startJob(&fftJob) == FALSE) {}
+ *
+ * // wait for 3 interrupts
+ * while( fftInterruptCounter < 3 );
+ * \endcode
+ *
+ * \defgroup IfxLld_Fft_Fft FFT
+ * \ingroup IfxLld_Fft
+ * \defgroup IfxLld_Fft_Fft_DataStructures Data Structures
+ * \ingroup IfxLld_Fft_Fft
+ * \defgroup IfxLld_Fft_Fft_ModuleFunctions Module Functions
+ * \ingroup IfxLld_Fft_Fft
+ * \defgroup IfxLld_Fft_Fft_InterruptFunctions Interrupt Functions
+ * \ingroup IfxLld_Fft_Fft
+ * \defgroup IfxLld_Fft_Fft_TransformFuntions Transform Funtions
+ * \ingroup IfxLld_Fft_Fft
+ */
+
+#ifndef IFXFFT_FFT_H
+#define IFXFFT_FFT_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Utilities/Ifx_Assert.h"
+#include "IfxFft_bf.h"
+#include "Fft/Std/IfxFft.h"
+#include "Dma/Dma/IfxDma_Dma.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Cpu/Std/IfxCpu.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXFFT_FFT_FLAG_INPUT (1)
+
+#define IFXFFT_FFT_FLAG_DONE (2)
+
+#define IFXFFT_FFT_HW_EXEC (1)
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+typedef struct IfxFft_Fft_Job_s IfxFft_Fft_Job;
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Fft_Fft_DataStructures
+ * \{ */
+/** \brief Module handle
+ */
+typedef struct
+{
+ Ifx_FFT *fft; /**< \brief Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0) */
+ Ifx_LMU *lmu; /**< \brief Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
+ IfxDma_Dma_Channel inputDmaChannel; /**< \brief Input DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
+ IfxDma_Dma_Channel outputDmaChannel; /**< \brief Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
+ IfxDma_Dma_Channel discardDmaChannel; /**< \brief Discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) && (IFXFFT_FFT_OPTIMIZED == 0) */
+ uint32 flags; /**< \brief Driver flags. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
+ uint32 inputIdx; /**< \brief Input interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
+ uint32 intraIdx; /**< \brief Intra interrupt index. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
+ Ifx_SRC_SRCR_Bits srcrOutDis; /**< \brief Cache of discard DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
+ Ifx_SRC_SRCR_Bits srcrOutEnd; /**< \brief Cache of end of output DMA channel. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
+ IfxFft_Fft_Job *job[2]; /**< \brief FFT job handle */
+} IfxFft_Fft;
+
+/** \brief Structure for counters
+ */
+typedef struct
+{
+ uint16 input; /**< \brief Input count */
+ uint16 expect; /**< \brief Padding */
+ uint16 output; /**< \brief Output count */
+ uint16 result; /**< \brief Discard */
+} IfxFft_Fft_Count64;
+
+/** \} */
+
+/** \addtogroup IfxLld_Fft_Fft_DataStructures
+ * \{ */
+/** \brief Configuration structure of the module
+ */
+typedef struct
+{
+ Ifx_FFT *fft; /**< \brief Pointer to FFT registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
+ Ifx_LMU *lmu; /**< \brief Pointer to LMU registers.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
+ Ifx_Priority inputPriority; /**< \brief "input loading finished" interrupt priority */
+ Ifx_Priority intraPriority; /**< \brief "intra transfer" interrupt priority */
+ Ifx_Priority outputPriority; /**< \brief "output unloading finished" interrupt priority */
+ IfxSrc_Tos typeOfService; /**< \brief Type of interrupt service */
+ IfxDma_ChannelId inputDmaChannelId; /**< \brief Input DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
+ IfxDma_ChannelId outputDmaChannelId; /**< \brief Output DMA channel.Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
+ IfxDma_ChannelId discardDmaChannelId; /**< \brief DMA channel for discarding unused samples. Used when (IFXFFT_FFT_DMA_SUPPORT != 0) */
+} IfxFft_Fft_Config;
+
+/** \brief Configuration structure for the FFT job
+ */
+typedef struct
+{
+ IfxFft_Fft *fft; /**< \brief Pointer To FFT.Used when (IFXFFT_FFT_OPTIMIZED == 0) */
+ uint16 inputLength; /**< \brief Length of the input */
+ uint16 outputLength; /**< \brief Length of the output */
+ IfxFft_Length fftLength; /**< \brief Length of the transform */
+ IfxFft_Input inputFormat; /**< \brief Input format */
+ IfxFft_Output outputFormat; /**< \brief Output format */
+ IfxFft_Operation operation; /**< \brief Operation (FFT / IFFT) */
+ boolean useWindowFunction; /**< \brief Selection to use window function */
+ IFX_CONST void *inputPtr; /**< \brief Pointer to input data */
+ void *outputPtr; /**< \brief Pointer to output data */
+} IfxFft_Fft_JobConfig;
+
+/** \brief FFT job handle
+ */
+struct IfxFft_Fft_Job_s
+{
+ IfxFft_Fft *fft; /**< \brief Pointer to FFT registers. Used when (IFXFFT_FFT_OPTIMIZED == 0) */
+ Ifx_FFT_CSR csr; /**< \brief FFT.CSR register duplicate */
+ IFX_CONST void *inputPtr; /**< \brief Input pointer */
+ void *outputPtr; /**< \brief Output pointer */
+ IfxFft_Fft_Count64 count64; /**< \brief Counters */
+ IfxFft_Fft_Job *nextJob; /**< \brief Pointer to the next job */
+};
+
+/** \} */
+
+/** \addtogroup IfxLld_Fft_Fft_ModuleFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the module
+ * \param fft Module handle
+ * \param config Configuration structure of the module
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
+ *
+ */
+IFX_EXTERN void IfxFft_Fft_initModule(IfxFft_Fft *fft, const IfxFft_Fft_Config *config);
+
+/** \brief Fills the config structure with default values
+ * \param config Configuration structure of the module
+ * \param fft Pointer to FFT registers
+ * \param lmu Pointer to LMU registers
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
+ *
+ */
+IFX_EXTERN void IfxFft_Fft_initModuleConfig(IfxFft_Fft_Config *config, Ifx_FFT *fft, Ifx_LMU *lmu);
+
+/** \} */
+
+/** \addtogroup IfxLld_Fft_Fft_InterruptFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief ISR input routine
+ * \param fft Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxFft_Fft_isrInput(IfxFft_Fft *fft);
+
+/** \brief ISR output routine
+ * \param fft Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxFft_Fft_isrOutput(IfxFft_Fft *fft);
+
+/** \} */
+
+/** \addtogroup IfxLld_Fft_Fft_TransformFuntions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clones and links the jobs
+ * \param originalJob Current (original)FFT job handle
+ * \param newJob Modified (new) FFT job handle
+ * \return None
+ */
+IFX_EXTERN void IfxFft_Fft_cloneAndLinkJobs(IfxFft_Fft_Job *originalJob, IfxFft_Fft_Job *newJob);
+
+/** \brief Initialises the FFT job
+ * \param job FFT job handle
+ * \param jobConfig Configuration structure for the FFT job
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
+ *
+ */
+IFX_EXTERN void IfxFft_Fft_initJob(IfxFft_Fft_Job *job, const IfxFft_Fft_JobConfig *jobConfig);
+
+/** \brief Fills the job configuration structure with default values
+ * \param config Configuration structure for the FFT job
+ * \param fft Module handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
+ *
+ */
+IFX_EXTERN void IfxFft_Fft_initJobConfig(IfxFft_Fft_JobConfig *config, IfxFft_Fft *fft);
+
+/** \brief Initialises the window transfer
+ * \param fft Module handle
+ * \param windowData Window data
+ * \return None
+ */
+IFX_EXTERN void IfxFft_Fft_initWindow(IfxFft_Fft *fft, const uint64 *windowData);
+
+/** \brief Updates the input and output pointers in the FFT job handle
+ * \param job FFT job handle
+ * \param inputPtr Input pointer
+ * \param outputPtr Output pointer
+ * \return None
+ */
+IFX_EXTERN void IfxFft_Fft_modifyDataPointers(IfxFft_Fft_Job *job, const void *inputPtr, void *outputPtr);
+
+/** \brief Starts the FFT job
+ * \param job FFT job handle
+ * \return Module's ready for start (RFS) status (true / false)
+ *
+ * A coding example can be found in \ref IfxLld_Fft_Fft_Usage
+ *
+ */
+IFX_EXTERN boolean IfxFft_Fft_startJob(IfxFft_Fft_Job *job);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \return None
+ */
+IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \return None
+ */
+IFX_EXTERN void IfxFft_Fft_isrIntra(IfxFft_Fft *fft);
+
+/** \brief Initialization of DMA
+ * \param fft fft Module handle
+ * \param config pointing to config strucuture of fft
+ * \return None
+ */
+IFX_EXTERN void IfxFft_Fft_initDma(IfxFft_Fft *fft, const IfxFft_Fft_Config *config);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxFft_Fft_triggerEngine(Ifx_FFT *fft, uint32 csr)
+{
+#if IFXFFT_FFT_HW_EXEC
+ fft->CSR.U = csr | (IFX_FFT_CSR_START_MSK << IFX_FFT_CSR_START_OFF);
+#endif
+}
+
+
+#endif /* IFXFFT_FFT_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Std/IfxFft.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Std/IfxFft.c
new file mode 100644
index 0000000..62cda9a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Std/IfxFft.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxFft.c
+ * \brief FFT basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxFft.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Std/IfxFft.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Std/IfxFft.h
new file mode 100644
index 0000000..2b1e5f8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Std/IfxFft.h
@@ -0,0 +1,346 @@
+/**
+ * \file IfxFft.h
+ * \brief FFT basic functionality
+ * \ingroup IfxLld_Fft
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Fft_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Fft_Std
+ * \defgroup IfxLld_Fft_Std_UtilityFunctions Utility Functions
+ * \ingroup IfxLld_Fft_Std
+ */
+
+#ifndef IFXFFT_H
+#define IFXFFT_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxFft_cfg.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "Src/Std/IfxSrc.h"
+#include "IfxFft_reg.h"
+#include "IfxLmu_reg.h"
+#include "Scu/Std/IfxScuWdt.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Fft_Std_Enumerations
+ * \{ */
+/** \brief Input format
+ * Definition in Ifx_FFT.CSR.B.IN.FMT
+ */
+typedef enum
+{
+ IfxFft_Input_complexSInt32 = 0, /**< \brief 1 complex 32-bit data per 64-bit word */
+ IfxFft_Input_realSInt32 = 1, /**< \brief 2 real 32-bit data per 64-bit word */
+ IfxFft_Input_complexSInt16 = 2, /**< \brief 2 complex 16-bit data per 64-bit word */
+ IfxFft_Input_realSInt16 = 3 /**< \brief 4 real 16-bit data per 64-bit word */
+} IfxFft_Input;
+
+/** \brief Length of transform. Log base 2 of the required transform size.
+ * Length must be between 3 (transform of 8) and 11 (transform of 2048).
+ * Definition in Ifx_FFT.CSR.B.LENGTH
+ */
+typedef enum
+{
+ IfxFft_Length_8 = 3, /**< \brief transform of 8 */
+ IfxFft_Length_16 = 4, /**< \brief transform of 16 */
+ IfxFft_Length_32 = 5, /**< \brief transform of 32 */
+ IfxFft_Length_64 = 6, /**< \brief transform of 64 */
+ IfxFft_Length_128 = 7, /**< \brief transform of 128 */
+ IfxFft_Length_256 = 8, /**< \brief transform of 256 */
+ IfxFft_Length_512 = 9, /**< \brief transform of 512 */
+ IfxFft_Length_1024 = 10 /**< \brief transform of 1024 */
+} IfxFft_Length;
+
+/** \brief Operation (FFT / IFFT)
+ * Definition in Ifx_FFT.CSR.B.IFFT
+ */
+typedef enum
+{
+ IfxFft_Operation_fft = 0, /**< \brief perform FFT */
+ IfxFft_Operation_ifft = 1 /**< \brief perform IFFT */
+} IfxFft_Operation;
+
+/** \brief Output format
+ * Definition in Ifx_FFT.CSR.B.OUT.FMT
+ */
+typedef enum
+{
+ IfxFft_Output_complexSInt32 = 0, /**< \brief 1 complex 32-bit data per 64-bit word */
+ IfxFft_Output_complexSInt16 = 1 /**< \brief 2 complex 16-bit data per 64-bit word */
+} IfxFft_Output;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxFft_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxFft_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxFft_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxFft_SuspendMode;
+
+/** \} */
+
+/** \addtogroup IfxLld_Fft_Std_UtilityFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disables the FFT module and also the LMU interface
+ * \param fft pointer to FFT registers
+ * \param lmu pointer to LMU registers
+ * \return None
+ */
+IFX_INLINE void IfxFft_disableModule(Ifx_FFT *fft, Ifx_LMU *lmu);
+
+/** \brief Enables the FFT module and also the LMU interface
+ * \param fft pointer to FFT registers
+ * \param lmu pointer to LMU registers
+ * \return None
+ */
+IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu);
+
+/** \brief Returns the input format
+ * \param fft pointer to FFT registers
+ * \return Input format
+ */
+IFX_INLINE IfxFft_Input IfxFft_getInputFormat(Ifx_FFT *fft);
+
+/** \brief Returns the length of the transform (length code, 3 to 10)
+ * \param fft pointer to FFT registers
+ * \return Length of the transform (length code)
+ */
+IFX_INLINE IfxFft_Length IfxFft_getLength(Ifx_FFT *fft);
+
+/** \brief Converts the given input length into the transform length code, to write into Ifx_FFT.CSR.B.LENGTH
+ * \param length Input length of the transform
+ * \return Length of the transform (code, 3 to 10)
+ */
+IFX_INLINE IfxFft_Length IfxFft_getLengthCode(uint16 length);
+
+/** \brief Retruns the actual length of the transform from the length code
+ * \param length Length of transform
+ * \return Actual length of the transform
+ */
+IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length);
+
+/** \brief Returns the output format
+ * \param fft pointer to FFT registers
+ * \return Output format
+ */
+IFX_INLINE IfxFft_Output IfxFft_getOutputFormat(Ifx_FFT *fft);
+
+/** \brief Returns the status of FFT DONE request
+ * \param fft pointer to FFT registers
+ * \return Status of FFT DONE request
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerDone(Ifx_FFT *fft);
+
+/** \brief Returns the status of FFT RFS request
+ * \param fft pointer to FFT registers
+ * \return Status of FFT RFS request
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerRfs(Ifx_FFT *fft);
+
+/** \brief Returns the actual length of the transform
+ * \param fft pointer to FFT registers
+ * \return Actual length of the transform ()
+ */
+IFX_INLINE uint16 IfxFft_getTransformLength(Ifx_FFT *fft);
+
+/** \brief Returns the status of whether the FFT Engine is Idle or has at least one transform in operation.
+ * \param fft pointer to FFT registers
+ * \return (true / false)
+ */
+IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft);
+
+/** \brief Returns the status of whether the module is enabled or not
+ * \param fft pointer to FFT registers
+ * \return (true / false)
+ */
+IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param fft Pointer to FFT module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxFft_isModuleSuspended(Ifx_FFT *fft);
+
+/** \brief Returns the status of whether the module can accept a START operation or not
+ * \param fft Pointer to FFT registers
+ * \return (true / false)
+ */
+IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param fft Pointer to FFT module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxFft_setSuspendMode(Ifx_FFT *fft, IfxFft_SuspendMode mode);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxFft_disableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
+{
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(password);
+ // FFT clock disable
+ fft->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(password);
+}
+
+
+IFX_INLINE void IfxFft_enableModule(Ifx_FFT *fft, Ifx_LMU *lmu)
+{
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(password);
+ // FFT clock enable
+ fft->CLC.U = 0x0;
+ IfxScuWdt_setCpuEndinit(password);
+}
+
+
+IFX_INLINE IfxFft_Input IfxFft_getInputFormat(Ifx_FFT *fft)
+{
+ return (IfxFft_Input)fft->CSR.B.IN_FMT;
+}
+
+
+IFX_INLINE IfxFft_Length IfxFft_getLength(Ifx_FFT *fft)
+{
+ return (IfxFft_Length)fft->CSR.B.LENGTH;
+}
+
+
+IFX_INLINE IfxFft_Length IfxFft_getLengthCode(uint16 length)
+{
+ return (IfxFft_Length)(31 - __clz((uint32)length));
+}
+
+
+IFX_INLINE uint16 IfxFft_getLengthFromCode(IfxFft_Length length)
+{
+ return 1 << (uint32)length;
+}
+
+
+IFX_INLINE IfxFft_Output IfxFft_getOutputFormat(Ifx_FFT *fft)
+{
+ return (IfxFft_Output)fft->CSR.B.OUT_FMT;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerDone(Ifx_FFT *fft)
+{
+ // only a single FFT available, therefore no check for the fft pointer required
+ return &MODULE_SRC.FFT.FFT[0].DONE;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxFft_getSrcPointerRfs(Ifx_FFT *fft)
+{
+ // only a single FFT available, therefore no check for the fft pointer required
+ return &MODULE_SRC.FFT.FFT[0].RFS;
+}
+
+
+IFX_INLINE uint16 IfxFft_getTransformLength(Ifx_FFT *fft)
+{
+ return 1U << fft->CSR.B.LENGTH;
+}
+
+
+IFX_INLINE boolean IfxFft_isEngineBusy(Ifx_FFT *fft)
+{
+ return fft->CSR.B.BUSY != 0;
+}
+
+
+IFX_INLINE boolean IfxFft_isModuleEnabled(Ifx_FFT *fft)
+{
+ return fft->CLC.B.DISS == 0;
+}
+
+
+IFX_INLINE boolean IfxFft_isModuleSuspended(Ifx_FFT *fft)
+{
+ Ifx_FFT_OCS ocs;
+
+ // read the status
+ ocs.U = fft->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE boolean IfxFft_isReadyForStart(Ifx_FFT *fft)
+{
+ return fft->CSR.B.RFS != 0;
+}
+
+
+IFX_INLINE void IfxFft_setSuspendMode(Ifx_FFT *fft, IfxFft_SuspendMode mode)
+{
+ Ifx_FFT_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ fft->OCS.U = ocs.U;
+}
+
+
+#endif /* IFXFFT_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Flash/Std/IfxFlash.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Flash/Std/IfxFlash.c
new file mode 100644
index 0000000..fece537
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Flash/Std/IfxFlash.c
@@ -0,0 +1,176 @@
+/**
+ * \file IfxFlash.c
+ * \brief FLASH basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxFlash.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxFlash_clearCorrectableErrorTracking(IfxFlash_PortId portId)
+{
+ MODULE_FLASH0.CBAB[portId].CFG.B.CLR = 1;
+}
+
+
+void IfxFlash_clearUncorrectableErrorTracking(IfxFlash_PortId portId)
+{
+ MODULE_FLASH0.UBAB[portId].CFG.B.CLR = 1;
+}
+
+
+void IfxFlash_disableCorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
+{
+ MODULE_FLASH0.CBAB[portId].CFG.B.DIS = disable;
+}
+
+
+void IfxFlash_disableUncorrectableErrorTracking(IfxFlash_PortId portId, boolean disable)
+{
+ MODULE_FLASH0.UBAB[portId].CFG.B.DIS = disable;
+}
+
+
+void IfxFlash_disableWriteProtection(uint32 flash, IfxFlash_UcbType ucb, uint32 *password)
+{
+ IFX_UNUSED_PARAMETER(flash);
+ volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0x553c);
+ uint32 i;
+
+ *addr1 = ucb;
+
+ for (i = 0; i < 8; i++)
+ {
+ *addr1 = password[i];
+ }
+
+ __dsync();
+}
+
+
+uint32 IfxFlash_getTrackedCorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
+{
+ uint32 numErrors = 0;
+ uint32 fillingLevel = MODULE_FLASH0.CBAB[portId].STAT.U;
+
+ int i;
+
+ for (i = 0;
+ i < IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS &&
+ (fillingLevel & (1 << i)) != 0;
+ ++i)
+ {
+ Ifx_FLASH_CBAB_TOP top;
+ top.U = MODULE_FLASH0.CBAB[portId].TOP.U;
+
+ if (top.B.VLD)
+ {
+ trackedFlashAdresses[numErrors].address = 0xa0000000 | (top.B.ADDR << 5);
+ trackedFlashAdresses[numErrors].errorType = (IfxFlash_ErrorTracking)top.B.ERR;
+ ++numErrors;
+ }
+
+ // clear entry
+ MODULE_FLASH0.CBAB[portId].TOP.U = (((uint32)1) << 31);
+ }
+
+ return numErrors;
+}
+
+
+uint32 IfxFlash_getTrackedUncorrectableErrors(IfxFlash_PortId portId, IfxFlash_ErrorTracking_Address *trackedFlashAdresses)
+{
+ uint32 numErrors = 0;
+ uint32 fillingLevel = MODULE_FLASH0.UBAB[portId].STAT.U;
+
+ int i;
+
+ for (i = 0;
+ i < IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS &&
+ (fillingLevel & (1 << i)) != 0;
+ ++i)
+ {
+ Ifx_FLASH_UBAB_TOP top;
+ top.U = MODULE_FLASH0.UBAB[portId].TOP.U;
+
+ if (top.B.VLD)
+ {
+ trackedFlashAdresses[numErrors].address = 0xa0000000 | (top.B.ADDR << 5);
+ trackedFlashAdresses[numErrors].errorType = (IfxFlash_ErrorTracking)top.B.ERR;
+ ++numErrors;
+ }
+
+ // clear entry
+ MODULE_FLASH0.UBAB[portId].TOP.U = (((uint32)1) << 31);
+ }
+
+ return numErrors;
+}
+
+
+void IfxFlash_selectCorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR,
+ errorTracking == IfxFlash_ErrorTracking_none ||
+ errorTracking == IfxFlash_ErrorTracking_correctedSingleBitError ||
+ errorTracking == IfxFlash_ErrorTracking_correctedDoubleBitError ||
+ errorTracking == IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError);
+
+ MODULE_FLASH0.CBAB[portId].CFG.B.SEL = errorTracking;
+}
+
+
+void IfxFlash_selectUncorrectableErrorTracking(IfxFlash_PortId portId, IfxFlash_ErrorTracking errorTracking)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR,
+ errorTracking == IfxFlash_ErrorTracking_none ||
+ errorTracking == IfxFlash_ErrorTracking_uncorrectableMultiBitError);
+
+ MODULE_FLASH0.UBAB[portId].CFG.B.SEL = errorTracking;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Flash/Std/IfxFlash.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Flash/Std/IfxFlash.h
new file mode 100644
index 0000000..336037a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Flash/Std/IfxFlash.h
@@ -0,0 +1,790 @@
+/**
+ * \file IfxFlash.h
+ * \brief FLASH basic functionality
+ * \ingroup IfxLld_Flash
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Flash_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Flash_Std
+ * \defgroup IfxLld_Flash_Std_CommandSequence CommandSequence Functions
+ * \ingroup IfxLld_Flash_Std
+ * \defgroup IfxLld_Flash_Std_ErrorTracking Error Tracking Functions
+ * \ingroup IfxLld_Flash_Std
+ */
+
+#ifndef IFXFLAS_H
+#define IFXFLAS_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxFlash_cfg.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "IfxFlash_reg.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Flash_Std_Enumerations
+ * \{ */
+/** \brief enumeration for Flash Error tracking
+ */
+typedef enum
+{
+ IfxFlash_ErrorTracking_none = 0, /**< \brief Error tracking disabled */
+ IfxFlash_ErrorTracking_correctedSingleBitError = 1, /**< \brief corrected single bit errors */
+ IfxFlash_ErrorTracking_correctedDoubleBitError = 2, /**< \brief Corrected double-bit errors */
+ IfxFlash_ErrorTracking_correctedSingleOrDoubleBitError = 3, /**< \brief Corrected single-bit and double-bit errors */
+ IfxFlash_ErrorTracking_uncorrectableMultiBitError = 4 /**< \brief Detected uncorrectable errors */
+} IfxFlash_ErrorTracking;
+
+/** \brief Corrected/UnCorrected Bits Address Buffer Port Id
+ */
+typedef enum
+{
+ IfxFlash_PortId_PortId_0 = 0, /**< \brief Port Id 0 */
+ IfxFlash_PortId_PortId_1 = 1 /**< \brief Port Id 1 */
+} IfxFlash_PortId;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Flash_Std_Enumerations
+ * \{ */
+/** \brief Error tracking address structure
+ */
+typedef struct
+{
+ uint32 address; /**< \brief Flash address for error tracking */
+ IfxFlash_ErrorTracking errorType; /**< \brief Error type */
+} IfxFlash_ErrorTracking_Address;
+
+/** \} */
+
+/** \addtogroup IfxLld_Flash_Std_CommandSequence
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Performs the "Clear Status" sequence. Operation and error flags are cleared.
+ * \param flash selects the flash (PMU) module
+ * \return None
+ */
+IFX_INLINE void IfxFlash_clearStatus(uint32 flash);
+
+/** \brief Performs the sequence for entering program page mode
+ * \param pageAddr pageAddr specifies the page being written - the command sequence will be varied accordingly
+ * \return 0 on success, != 0 if invalid or not available page is selected
+ *
+ * Usage Example:
+ * \code
+ *
+ * unsigned int pageAddr = IFXFLASH_DFLASH_START + page*IFXFLASH_DFLASH_PAGE_LENGTH;
+ *
+ * // enter page mode
+ * IfxFlash_enterPageMode(pageAddr);
+ *
+ * \endcode
+ *
+ */
+IFX_INLINE uint8 IfxFlash_enterPageMode(uint32 pageAddr);
+
+/** \brief Performs the erase sequence for n sectors in program or data flash
+ * \param sectorAddr sector address
+ * \param numSector the no.of sectors to be erased
+ * \return None
+ *
+ * Usage Example:
+ * \code
+ *
+ * // erase the first and second data flash
+ * IfxFlash_eraseMultiplePhysicalSectors(IFXFLASH_DFLASH_START,2);
+ *
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxFlash_eraseMultiplePhysicalSectors(uint32 sectorAddr, uint32 numSector);
+
+/** \brief Performs the erase sequence for n sectors in program or data flash
+ * \param sectorAddr sector address
+ * \param numSector the no.of sectors to be erased
+ * \return None
+ *
+ * Usage Example:
+ * \code
+ *
+ * // erase logical sectors of program flash
+ * IfxFlash_eraseMultipleSectors(pFlashTableLog[sector].start,2);
+ *
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxFlash_eraseMultipleSectors(uint32 sectorAddr, uint32 numSector);
+
+/** \brief Performs the erase sequence for a physical sector in program or data flash
+ * \param sectorAddr sector address
+ * \return None
+ *
+ * Usage Example:
+ * \code
+ *
+ * // erase the first data flash
+ * IfxFlash_erasePhysicalSector(IFXFLASH_DFLASH_START);
+ *
+ *
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxFlash_erasePhysicalSector(uint32 sectorAddr);
+
+/** \brief Performs the erase sequence for a sector in program or data flash.
+ * \param sectorAddr sector address
+ * \return None
+ *
+ * Usage Example:
+ * \code
+ *
+ *
+ * // erase all sectors of program flash
+ * for(sector=0; sector 1
+ else if (flash == 1)
+ {
+ while (FLASH1_FSR.U & (1 << flashType))
+ {}
+ }
+#endif
+ else
+ {
+ return 1; // invalid flash selected
+ }
+ __dsync();
+ return 0; // finished
+}
+
+
+IFX_INLINE void IfxFlash_writeBurst(uint32 pageAddr)
+{
+ volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
+ volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
+ volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
+ volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
+
+ *addr1 = pageAddr;
+ *addr2 = 0x00;
+ *addr3 = 0xa0;
+ *addr4 = 0x7a;
+
+ __dsync();
+}
+
+
+IFX_INLINE void IfxFlash_writePage(uint32 pageAddr)
+{
+ volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
+ volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
+ volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
+ volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
+
+ *addr1 = pageAddr;
+ *addr2 = 0x00;
+ *addr3 = 0xa0;
+ *addr4 = 0xaa;
+
+ __dsync();
+}
+
+
+IFX_INLINE void IfxFlash_writePageOnce(uint32 pageAddr)
+{
+ volatile uint32 *addr1 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa50);
+ volatile uint32 *addr2 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaa58);
+ volatile uint32 *addr3 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
+ volatile uint32 *addr4 = (volatile uint32 *)(IFXFLASH_CMD_BASE_ADDRESS | 0xaaa8);
+
+ *addr1 = pageAddr;
+ *addr2 = 0x00;
+ *addr3 = 0xa0;
+ *addr4 = 0x9a;
+
+ __dsync();
+}
+
+
+IFX_INLINE boolean IfxFlash_waitUnbusyAll(void)
+{
+ while (FLASH0_FSR.U & 0x1EU)
+ {}
+
+ __dsync();
+ return 0;
+}
+
+
+#endif /* IFXFLAS_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/IncrEnc/IfxGpt12_IncrEnc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/IncrEnc/IfxGpt12_IncrEnc.c
new file mode 100644
index 0000000..0a52dc5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/IncrEnc/IfxGpt12_IncrEnc.c
@@ -0,0 +1,565 @@
+/**
+ * \file IfxGpt12_IncrEnc.c
+ * \brief GPT12 INCRENC details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGpt12_IncrEnc.h"
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Update internal data when incremental mode is using T2.\n
+ * This function shall be periodically called
+ * \param driver driver handle
+ * \return None
+ */
+IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver);
+
+/** \brief Update internal data when incremental mode is using T3.\n
+ * This function shall be periodically called
+ * \param driver driver handle
+ * \return None
+ */
+IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver);
+
+/** \brief Updates the speed
+ * \param driver driver handle
+ * \param newPosition new position
+ * \return None
+ */
+IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition);
+
+/** \brief Updates the speed
+ * \param driver driver handle
+ * \param newPosition new position
+ * \return None
+ */
+IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition);
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver)
+{
+ return ((float32)driver->turn + (float32)driver->rawPosition / (float32)driver->resolution) * 2.0 * IFX_PI;
+}
+
+
+IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver)
+{
+ return driver->direction;
+}
+
+
+IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver)
+{
+ return driver->status;
+}
+
+
+sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver)
+{
+ return driver->offset;
+}
+
+
+uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver)
+{
+ IFX_UNUSED_PARAMETER(driver)
+ return 1; /* Period per rotation is 1*/
+}
+
+
+float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver)
+{
+ return (float32)driver->rawPosition * driver->positionConst;
+}
+
+
+sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver)
+{
+ return driver->rawPosition;
+}
+
+
+float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver)
+{
+ return driver->updatePeriod;
+}
+
+
+sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver)
+{
+ return driver->resolution;
+}
+
+
+IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver)
+{
+ IFX_UNUSED_PARAMETER(driver)
+ return IfxStdIf_Pos_SensorType_encoder;
+}
+
+
+float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver)
+{
+ return driver->speed;
+}
+
+
+sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver)
+{
+ return driver->turn;
+}
+
+
+boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config)
+{
+ boolean status = TRUE;
+ Ifx_GPT12 *gpt12 = config->module;
+
+ driver->module = gpt12;
+
+ driver->offset = config->base.offset;
+ driver->resolution = config->base.resolution * config->base.resolutionFactor;
+ driver->positionConst = 1.0 / (float32)driver->resolution * 2.0 * IFX_PI;
+ driver->speedModeThreshold = config->base.speedModeThreshold;
+ IfxGpt12_IncrEnc_setRefreshPeriod(driver, config->base.updatePeriod);
+
+ driver->status.status = 0;
+ driver->status.B.notSynchronised = 1;
+ driver->minSpeed = config->base.minSpeed;
+ driver->maxSpeed = config->base.maxSpeed;
+
+ driver->rawPosition = 0;
+ driver->speed = 0;
+ driver->direction = IfxStdIf_Pos_Dir_unknown;
+ driver->turn = 0;
+
+ if (config->pinA->timer == 3)
+ {
+ /* T3 Configuration */
+ IfxGpt12_T3_setMode(gpt12, IfxGpt12_Mode_incrementalInterfaceEdgeDetection);
+
+ switch (config->base.resolutionFactor)
+ {
+ case IfxStdIf_Pos_ResolutionFactor_twoFold:
+ IfxGpt12_T3_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN);
+ break;
+ case IfxStdIf_Pos_ResolutionFactor_fourFold:
+ IfxGpt12_T3_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD);
+ break;
+ default:
+ status = FALSE;
+ break;
+ }
+
+ IfxGpt12_T3_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_external);
+ IfxGpt12_T3_setTimerDirection(gpt12, config->base.reversed ? IfxGpt12_TimerDirection_up : IfxGpt12_TimerDirection_down);
+ IfxGpt12_T3_enableOutput(gpt12, FALSE);
+ IfxGpt12_T3_run(gpt12, IfxGpt12_TimerRun_start);
+
+ if (config->pinZ != NULL_PTR)
+ { /* Only configure T4 if zero signal is available. Zero has to be on T4IN */
+ /* T4 Configuration */
+ IfxGpt12_T4_setMode(gpt12, IfxGpt12_Mode_capture);
+ IfxGpt12_T4_setCaptureInputMode(gpt12, IfxGpt12_CaptureInputMode_risingEdgeTxIN);
+ IfxGpt12_T4_enableClearTimerT2(gpt12, FALSE);
+ IfxGpt12_T4_enableClearTimerT3(gpt12, TRUE);
+ IfxGpt12_T4_setInterruptEnable(gpt12, config->zeroIsrPriority != 0);
+ IfxGpt12_T4_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
+ IfxGpt12_T4_run(gpt12, IfxGpt12_TimerRun_stop);
+
+ if (config->zeroIsrPriority)
+ {
+ /* setup interrupt */
+ volatile Ifx_SRC_SRCR *src = IfxGpt12_T4_getSrc(gpt12);
+ IfxSrc_init(src, config->zeroIsrProvider, config->zeroIsrPriority);
+ IfxSrc_enable(src);
+ }
+ }
+
+ /* T5 Configuration */
+ IfxGpt12_T5_setMode(gpt12, IfxGpt12_Mode_timer);
+ IfxGpt12_T5_setTimerPrescaler(gpt12, IfxGpt12_TimerInputPrescaler_4);
+ IfxGpt12_T5_setCaptureTrigger(gpt12, IfxGpt12_CaptureTrigger_t3inOrT3EUD);
+ IfxGpt12_T5_setCaptureTriggerMode(gpt12, IfxGpt12_CaptureTriggerMode_risingEdge);
+ IfxGpt12_T5_enableClearTimer(gpt12, TRUE);
+ IfxGpt12_T5_setCaptureTriggerEnable(gpt12, TRUE);
+ IfxGpt12_T5_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
+ IfxGpt12_T5_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_internal);
+ IfxGpt12_T5_setTimerDirection(gpt12, IfxGpt12_TimerDirection_up);
+ IfxGpt12_T5_run(gpt12, IfxGpt12_TimerRun_start);
+
+ driver->update = (IfxGpt12_IncrEnc_Update) & IfxGpt12_IncrEnc_updateFromT3;
+ }
+ else if (config->pinA->timer == 2)
+ {
+ /* T2 Configuration */
+ IfxGpt12_T2_setMode(gpt12, IfxGpt12_Mode_incrementalInterfaceEdgeDetection);
+
+ switch (config->base.resolutionFactor)
+ {
+ case IfxStdIf_Pos_ResolutionFactor_twoFold:
+ IfxGpt12_T2_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN);
+ break;
+ case IfxStdIf_Pos_ResolutionFactor_fourFold:
+ IfxGpt12_T2_setIncrementalInterfaceInputMode(gpt12, IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD);
+ break;
+ default:
+ status = FALSE;
+ break;
+ }
+
+ IfxGpt12_T2_setDirectionSource(gpt12, IfxGpt12_TimerDirectionSource_external);
+ IfxGpt12_T2_setTimerDirection(gpt12, config->base.reversed ? IfxGpt12_TimerDirection_up : IfxGpt12_TimerDirection_down);
+ IfxGpt12_T2_run(gpt12, IfxGpt12_TimerRun_start);
+
+ if (config->pinZ != NULL_PTR)
+ { /* Only configure T4 if zero signal is available. Zero has to be on T4EUD */
+ /* T4 Configuration */
+ IfxGpt12_T4_setMode(gpt12, IfxGpt12_Mode_capture);
+ IfxGpt12_T4_setCaptureInputMode(gpt12, IfxGpt12_CaptureInputMode_none);
+ IfxGpt12_T4_enableClearTimerT2(gpt12, TRUE);
+ IfxGpt12_T4_enableClearTimerT3(gpt12, FALSE);
+ IfxGpt12_T4_setInterruptEnable(gpt12, FALSE);
+ IfxGpt12_T4_setRemoteControl(gpt12, IfxGpt12_TimerRemoteControl_off);
+ IfxGpt12_T4_run(gpt12, IfxGpt12_TimerRun_stop);
+ }
+
+ driver->update = (IfxGpt12_IncrEnc_Update) & IfxGpt12_IncrEnc_updateFromT2;
+ }
+
+ if (config->initPins == TRUE)
+ {
+ IfxGpt12_initTxInPinWithPadLevel(config->pinA, config->pinMode, config->pinDriver);
+ IfxGpt12_initTxEudInPinWithPadLevel(config->pinB, config->pinMode, config->pinDriver);
+
+ if (config->pinZ != NULL_PTR)
+ {
+ IfxGpt12_initTxInPinWithPadLevel(config->pinZ, config->pinMode, config->pinDriver);
+ }
+ }
+
+ driver->speedConstTimeDiff =
+ (2.0 * IFX_PI) / (config->base.resolution * 2) * IfxGpt12_T5_getFrequency(gpt12);
+
+ driver->speedFilterEnabled = config->base.speedFilterEnabled;
+
+ if (config->base.speedFilterEnabled)
+ {
+ Ifx_LowPassPt1F32_Config lpfConfig;
+ lpfConfig.gain = 1.0;
+ lpfConfig.cutOffFrequency = config->base.speedFilerCutOffFrequency;
+ lpfConfig.samplingTime = config->base.updatePeriod;
+ Ifx_LowPassPt1F32_init(&driver->speedLpf, &lpfConfig);
+ }
+
+ return status;
+}
+
+
+void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12)
+{
+ IfxStdIf_Pos_initConfig(&config->base);
+ config->base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_twoFold;
+ config->base.minSpeed = 1.0 / 60.0 * (2 * IFX_PI); // 1 rpm
+ config->base.maxSpeed = 20000.0 / 60.0 * (2 * IFX_PI); // 20000 rpm
+ config->base.speedFilterEnabled = TRUE;
+ config->base.speedFilerCutOffFrequency = config->base.maxSpeed / 2 * IFX_PI * 10;
+
+ config->pinA = NULL_PTR;
+ config->pinB = NULL_PTR;
+ config->pinZ = NULL_PTR;
+ config->pinMode = IfxPort_InputMode_noPullDevice;
+ config->module = gpt12;
+ config->zeroIsrPriority = 0;
+ config->zeroIsrProvider = IfxSrc_Tos_cpu0;
+ config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+
+ config->initPins = TRUE;
+}
+
+
+void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver)
+{
+ if (driver->status.B.notSynchronised)
+ {
+ driver->status.B.notSynchronised = 0;
+ }
+
+ if (driver->direction == IfxStdIf_Pos_Dir_forward)
+ {
+ driver->turn++;
+ }
+ else
+ {
+ driver->turn--;
+ }
+}
+
+
+void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver)
+{
+ driver->rawPosition = 0;
+ driver->turn = 0;
+ driver->speed = 0;
+ driver->status.status = 0;
+ driver->status.B.notSynchronised = 1;
+}
+
+
+void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver)
+{
+ IfxStdIf_Pos_Status status;
+ status.status = 0;
+ status.B.notSynchronised = driver->status.B.notSynchronised;
+ driver->status.status = status.status;
+}
+
+
+void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset)
+{
+ driver->offset = offset;
+ driver->status.B.notSynchronised = 0;
+}
+
+
+void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod)
+{
+ driver->updatePeriod = updatePeriod;
+ driver->speedConstPulseCount = (2.0 * IFX_PI) / driver->resolution / updatePeriod;
+ driver->speedModeThresholdTick = driver->speedModeThreshold * driver->resolution * updatePeriod / (2.0 * IFX_PI);
+}
+
+
+boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver)
+{
+ /* Ensure the stdif is reset to zeros */
+ memset(stdif, 0, sizeof(IfxStdIf_Pos));
+
+ /* Set the driver */
+ stdif->driver = driver;
+
+ /* *INDENT-OFF* Note: this file was indented manually by the author. */
+ /* Set the API link */
+ stdif->onZeroIrq =(IfxStdIf_Pos_OnZeroIrq )&IfxGpt12_IncrEnc_onZeroIrq;
+ stdif->getAbsolutePosition=(IfxStdIf_Pos_GetAbsolutePosition )&IfxGpt12_IncrEnc_getAbsolutePosition;
+ stdif->getDirection =(IfxStdIf_Pos_GetDirection )&IfxGpt12_IncrEnc_getDirection;
+ stdif->getFault =(IfxStdIf_Pos_GetFault )&IfxGpt12_IncrEnc_getFault;
+ stdif->getOffset =(IfxStdIf_Pos_GetOffset )&IfxGpt12_IncrEnc_getOffset;
+ stdif->getPeriodPerRotation =(IfxStdIf_Pos_GetPeriodPerRotation )&IfxGpt12_IncrEnc_getPeriodPerRotation;
+ stdif->getPosition =(IfxStdIf_Pos_GetPosition )&IfxGpt12_IncrEnc_getPosition;
+ stdif->getRawPosition =(IfxStdIf_Pos_GetRawPosition )&IfxGpt12_IncrEnc_getRawPosition;
+ stdif->getRefreshPeriod =(IfxStdIf_Pos_GetRefreshPeriod )&IfxGpt12_IncrEnc_getRefreshPeriod;
+ stdif->getResolution =(IfxStdIf_Pos_GetResolution )&IfxGpt12_IncrEnc_getResolution;
+ stdif->getSensorType =(IfxStdIf_Pos_GetSensorType )&IfxGpt12_IncrEnc_getSensorType;
+ stdif->reset =(IfxStdIf_Pos_Reset )&IfxGpt12_IncrEnc_reset;
+ stdif->resetFaults =(IfxStdIf_Pos_ResetFaults )&IfxGpt12_IncrEnc_resetFaults;
+ stdif->getSpeed =(IfxStdIf_Pos_GetSpeed )&IfxGpt12_IncrEnc_getSpeed;
+ stdif->update =(IfxStdIf_Pos_Update )&IfxGpt12_IncrEnc_update;
+ stdif->setOffset =(IfxStdIf_Pos_SetOffset )&IfxGpt12_IncrEnc_setOffset;
+ stdif->setRefreshPeriod =(IfxStdIf_Pos_SetRefreshPeriod )&IfxGpt12_IncrEnc_setRefreshPeriod;
+ stdif->getTurn =(IfxStdIf_Pos_GetTurn )&IfxGpt12_IncrEnc_getTurn;
+ /* *INDENT-ON* */
+
+ return TRUE;
+}
+
+
+void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver)
+{
+ driver->update(driver);
+}
+
+
+IFX_STATIC void IfxGpt12_IncrEnc_updateFromT2(IfxGpt12_IncrEnc *driver)
+{
+ Ifx_GPT12 *gpt12 = driver->module;
+ sint32 newPosition;
+ driver->direction = gpt12->T2CON.B.T2RDIR ? IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos_Dir_forward;
+
+ newPosition = gpt12->T2.U;
+
+ newPosition = (newPosition + driver->offset);
+
+ if (newPosition >= driver->resolution)
+ {
+ newPosition %= driver->resolution;
+ }
+ else if (newPosition < 0)
+ {
+ newPosition = (newPosition + driver->resolution);
+ }
+
+ IfxGpt12_IncrEnc_updateSpeedFromT2(driver, newPosition);
+ driver->rawPosition = newPosition;
+}
+
+
+IFX_STATIC void IfxGpt12_IncrEnc_updateFromT3(IfxGpt12_IncrEnc *driver)
+{
+ Ifx_GPT12 *gpt12 = driver->module;
+ sint32 newPosition;
+ driver->direction = gpt12->T3CON.B.T3RDIR ? IfxStdIf_Pos_Dir_backward : IfxStdIf_Pos_Dir_forward;
+
+ newPosition = gpt12->T3.U;
+
+ newPosition = (newPosition + driver->offset);
+
+ if (newPosition >= driver->resolution)
+ {
+ newPosition %= driver->resolution;
+ }
+ else if (newPosition < 0)
+ {
+ newPosition = (newPosition + driver->resolution);
+ }
+
+ IfxGpt12_IncrEnc_updateSpeedFromT3(driver, newPosition);
+ driver->rawPosition = newPosition;
+}
+
+
+IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT2(IfxGpt12_IncrEnc *driver, sint32 newPosition)
+{
+ float32 speed;
+ sint32 diff;
+
+ if (driver->direction == IfxStdIf_Pos_Dir_forward)
+ {
+ diff = newPosition - driver->rawPosition;
+ }
+ else
+ {
+ diff = driver->rawPosition - newPosition;
+ }
+
+ if (diff < 0)
+ {
+ diff += driver->resolution;
+ }
+
+ speed = diff * driver->speedConstPulseCount;
+
+ speed = driver->direction == IfxStdIf_Pos_Dir_forward ? speed : -speed;
+
+ if (driver->speedFilterEnabled)
+ {
+ driver->speed = Ifx_LowPassPt1F32_do(&driver->speedLpf, speed);
+ }
+ else
+ {
+ driver->speed = speed;
+ }
+}
+
+
+IFX_STATIC void IfxGpt12_IncrEnc_updateSpeedFromT3(IfxGpt12_IncrEnc *driver, sint32 newPosition)
+{
+ float32 speed;
+ sint32 diff;
+
+ if (driver->direction == IfxStdIf_Pos_Dir_forward)
+ {
+ diff = newPosition - driver->rawPosition;
+ }
+ else
+ {
+ diff = driver->rawPosition - newPosition;
+ }
+
+ if (diff < 0)
+ {
+ diff += driver->resolution;
+ }
+
+ if (diff > driver->speedModeThresholdTick)
+ { /* Use pulse count mode ( Fast speed ) */
+ speed = diff * driver->speedConstPulseCount;
+ }
+ else
+ { /* Use time diff mode (slow speed), only if T3 is used as core */
+ Ifx_GPT12 *gpt12 = driver->module;
+ volatile Ifx_SRC_SRCR *srcT5 = IfxGpt12_T5_getSrc(gpt12);
+
+ if (srcT5->B.SRR != 1)
+ { // NO overflow of T5
+ volatile Ifx_SRC_SRCR *srcCap = IfxGpt12_getCaptureSrc(gpt12);
+
+ // Check if a new value is captured
+ if (srcCap->B.SRR != 0)
+ {
+ // Delete Capture Request Bit
+ srcCap->B.CLRR = 1;
+ speed = driver->speedConstTimeDiff / gpt12->CAPREL.B.CAPREL;
+ }
+ else
+ {
+ speed = driver->speed;
+ }
+ }
+ else
+ { // T5 overflow detected
+ // Delete Overflow Request bit
+ srcT5->B.CLRR = 1;
+ speed = 0.0;
+ }
+ }
+
+ speed = driver->direction == IfxStdIf_Pos_Dir_forward ? speed : -speed;
+
+ if (driver->speedFilterEnabled)
+ {
+ driver->speed = Ifx_LowPassPt1F32_do(&driver->speedLpf, speed);
+ }
+ else
+ {
+ driver->speed = speed;
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/IncrEnc/IfxGpt12_IncrEnc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/IncrEnc/IfxGpt12_IncrEnc.h
new file mode 100644
index 0000000..d704048
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/IncrEnc/IfxGpt12_IncrEnc.h
@@ -0,0 +1,423 @@
+/**
+ * \file IfxGpt12_IncrEnc.h
+ * \brief GPT12 INCRENC details
+ * \ingroup IfxLld_Gpt12
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gpt12_IncrEnc INCRENC
+ * \ingroup IfxLld_Gpt12
+ *
+ * \defgroup IfxLld_Gpt12_IncrEnc_Usage How to use the GPT12 Incremental Encoder Driver
+ * \ingroup IfxLld_Gpt12_IncrEnc
+ *
+ * The IncrEnc interface can be used in one of the following configurations T3 as core or T2 as core
+ *
+ * Setup with T3 as core
+ * - T3 as incremental mode
+ * - Multiplication factor:
+ * - twoFold: use both edges of TxIn
+ * - fourFold: use both edges of TxIn and TxEUD
+ * - Reverse of direction supported by GPT12
+ * - T3 value diff is used for speed calculation at high speed (speed > speedModeThreshold)
+ * - T4 used for zero signal detection if pinZ is not NULL
+ * - interrupt is generated to support turn calculation if zeroIsrPriority != 0
+ * - T4 clears T3 on zero signal event on TxIn input
+ * - T5 used for low speed calculation (speed < speedModeThreshold)
+ * - Rising edge of TxIn or TxEUD captures the T5 timer in CAPREL
+ *
+ * Setup with T2 as core
+ * - T2 as incremental mode
+ * - Multiplication factor:
+ * - twoFold: sample on both edges of TxIn
+ * - fourFold: sample on both edges of TxIn and TxEUD
+ * - Reverse of direction supported by GPT12
+ * - T2 value diff is used for speed calculation at high speed
+ * - T4 used for zero signal detection if pinZeroTxEUD is not NULL
+ * - T4 clears T2 on zero signal event on TxEUD input
+ *
+ * \section IfxLld_Gpt12_IncrEnc_Preparation Preparation
+ * \subsection IfxLld_Gpt12_IncrEnc_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Gpt12_IncrEnc_Variables Variables
+ *
+ * \code
+ * // used globally
+ * static IfxGpt12_IncrEnc gpt12;
+ * \endcode
+ *
+ * \subsection IfxLld_Gpt12_Gpt_Interrupt Interrupt Handler Installation
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define ISR_PRIORITY_INCRENC_ZERO 6
+ * \endcode
+ *
+ * Add the interrupt service routines to your C code. They have to call the GPT12 interrupt handlers by passing the gpt12 handle:
+ * \code
+ * IFX_INTERRUPT(ISR_IncrIncZero, 0, ISR_PRIORITY_INCRENC_ZERO)
+ * {
+ * IfxGpt12_IncrEnc_onZeroIrq(&gpt12);
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler(&ISR_IncrIncZero, ISR_PRIORITY_INCRENC_ZERO);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Gpt12_Gpt_Init Module Initialisation
+ *
+ * The module initialisation can be done in the same function. Here an example:
+ * \code
+ * // Initialize global clocks
+ * IfxGpt12_enableModule(&MODULE_GPT120);
+ * IfxGpt12_setGpt1BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt1BlockPrescaler_8);
+ * IfxGpt12_setGpt2BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt2BlockPrescaler_4);
+ *
+ * // create module config
+ * IfxGpt12_IncrEnc_Config gpt12Config;
+ * IfxGpt12_IncrEnc_initConfig(&gpt12Config , &MODULE_GPT120);
+ *
+ * // implementation with T3 as core
+ * gpt12Config.base.offset = 0;
+ * gpt12Config.base.reversed = FALSE;
+ * gpt12Config.base.resolution = 2048;
+ * gpt12Config.base.periodPerRotation = 1;
+ * gpt12Config.base.resolutionFactor = IfxStdIf_Pos_ResolutionFactor_fourFold;
+ * gpt12Config.base.updatePeriod = 100e-6;
+ * gpt12Config.base.speedModeThreshold = 200;
+ * gpt12Config.base.minSpeed = 10;
+ * gpt12Config.base.maxSpeed = 500;
+ * gpt12Config.zeroIsrPriority = ISR_PRIORITY(INTERRUPT_INCRINC_ZERO);
+ * gpt12Config.zeroIsrProvider = ISR_PROVIDER(INTERRUPT_INCRINC_ZERO);
+ * gpt12Config.pinA = &IfxGpt120_T3INA_P02_6_IN;
+ * gpt12Config.pinB = &IfxGpt120_T3EUDA_P02_7_IN;
+ * gpt12Config.pinZ = &IfxGpt120_T4INA_P02_8_IN;
+ * gpt12Config.pinMode = IfxPort_InputMode_noPullDevice;
+ *
+ * gpt12Config.base.speedFilterEnabled = TRUE;
+ * gpt12Config.base.speedFilerCutOffFrequency = config.base.maxSpeed / 2 * IFX_PI * 2;
+ *
+ *
+ * // initialize module
+ * //IfxGpt12_IncrEnc gpt12; // defined globally
+ * IfxGpt12_IncrEnc_init(&gpt12, &gpt12Config);
+ * \endcode
+ *
+ * \section IfxLld_Gpt12_IncrEnc_Update Update
+ *
+ * speed, position and direction of the incremental encoder can be collected by the following
+ *
+ * \code
+ * float32 speed, rawPosition;
+ * IfxStdIf_Pos_Dir direction;
+ *
+ * Ifx_TickTime tickRefresh = gpt12.updatePeriod * TimeConst_1s;
+ *
+ * Ifx_TickTime refreshDeadLine = now();
+ *
+ * if (isDeadLine(refreshDeadLine))
+ * {
+ * refreshDeadLine = addTTime(refreshDeadLine, tickRefresh);
+ * IfxGpt12_IncrEnc_update(&gpt12);
+ *
+ * speed = IfxGpt12_IncrEnc_getSpeed(&gpt12);
+ * rawPosition = IfxGpt12_IncrEnc_getRawPosition(&gpt12);
+ * direction = IfxGpt12_IncrEnc_getDirection(&gpt12);
+ * }
+ * \endcode
+ *
+ * \defgroup IfxLld_Gpt12_IncrEnc INCRENC
+ * \ingroup IfxLld_Gpt12
+ * \defgroup IfxLld_Gpt12_IncrEnc_Datastructures Data structures
+ * \ingroup IfxLld_Gpt12_IncrEnc
+ * \defgroup IfxLld_Gpt12_IncrEnc_Functions Functions
+ * \ingroup IfxLld_Gpt12_IncrEnc
+ * \defgroup IfxLld_Gpt12_IncrEnc_StdIf_Functions StdIf Functions
+ * \ingroup IfxLld_Gpt12_IncrEnc
+ */
+
+#ifndef IFXGPT12_INCRENC_H
+#define IFXGPT12_INCRENC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "StdIf/IfxStdIf_Pos.h"
+#include "SysSe/Math/Ifx_LowPassPt1F32.h"
+#include "Gpt12/Std/IfxGpt12.h"
+#include "string.h"
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+typedef IfxStdIf_Pos_Update IfxGpt12_IncrEnc_Update;
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gpt12_IncrEnc_Datastructures
+ * \{ */
+/** \brief Incremental encoder object
+ */
+typedef struct
+{
+ sint32 rawPosition; /**< \brief raw position in ticks. \note: the value already contains the offset */
+ float32 speed; /**< \brief mechanical speed in rad/s */
+ sint32 turn; /**< \brief number of mechanical turns */
+ IfxStdIf_Pos_Dir direction; /**< \brief rotation direction */
+ IfxStdIf_Pos_Status status; /**< \brief error code (0 = no error) */
+ sint32 offset; /**< \brief raw position offset */
+ sint32 resolution; /**< \brief resolution of this position sensor interface */
+ float32 updatePeriod; /**< \brief update period in seconds */
+ float32 speedConstPulseCount; /**< \brief constant for calculating mechanical speed (in rad/s) from raw speed in pulse count mode */
+ float32 speedConstTimeDiff; /**< \brief constant for calculating mechanical speed (in rad/s) from raw speed in time diff mode */
+ float32 positionConst; /**< \brief constant for calculating mechanical position (in rad) from raw position */
+ float32 speedModeThreshold; /**< \brief treshold used for speed calculation using pulse count mode or time diff mode in rad/s */
+ sint32 speedModeThresholdTick; /**< \brief treshold used for speed calculation using pulse count mode or time diff mode in ticks */
+ Ifx_GPT12 *module; /**< \brief Pointer to the GPT12 module */
+ float32 minSpeed; /**< \brief Absolute minimal allowed speed. below speed is recognized as 0rad/s */
+ float32 maxSpeed; /**< \brief Absolute maximal allowed speed. Above speed is recognized as error */
+ Ifx_LowPassPt1F32 speedLpf; /**< \brief Low pass filter object */
+ IfxGpt12_IncrEnc_Update update; /**< \brief Update call back API */
+ boolean speedFilterEnabled; /**< \brief Enable / disable the speed low pass filter */
+} IfxGpt12_IncrEnc;
+
+/** \brief Configuration structure for GPT12
+ */
+typedef struct
+{
+ IfxStdIf_Pos_Config base; /**< \brief Configuration data of \ref library_srvsw_stdif_posif */
+ Ifx_GPT12 *module; /**< \brief Pointer to module base address */
+ IfxGpt12_TxIn_In *pinA; /**< \brief Encoder A signal. Should be connecting to T2 or T3 TxIN. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
+ IfxGpt12_TxEud_In *pinB; /**< \brief Encoder B signal. Should be connecting to T2 or T3 TxEUD. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
+ IfxGpt12_TxIn_In *pinZ; /**< \brief Encoder Z signal. Should be connecting to T4 TxIn for use with T3 and TxEUD (Ignore compiler type conflict warning) for use with T4. See \ref IfxLld_Gpt12_pinmap "GPT12 pin map data" */
+ IfxPort_InputMode pinMode; /**< \brief Pin mode for A, B and Z inputs */
+ Ifx_Priority zeroIsrPriority; /**< \brief Interrupt isrPriority of the zero interrupt, if 0 the interrupt is disable */
+ IfxSrc_Tos zeroIsrProvider; /**< \brief Interrupt service provider for the zero interrupt */
+ IfxPort_PadDriver pinDriver; /**< \brief Pad Driver */
+ boolean initPins; /**< \brief TRUE: Initialize pins in driver
+ * FALSE: Don't initialize pins. User handles separately. */
+} IfxGpt12_IncrEnc_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gpt12_IncrEnc_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the Incremental interface
+ * \param driver incremental encoder interface Handle
+ * \param config Configuration structure for incremental encoder
+ * \return TRUE on success else FALSE
+ *
+ * \code
+ * // create module config
+ * IfxGpt12_IncrEnc_Config gptConfig;
+ * IfxGpt12_IncrEnc_initConfig(&gptConfig , &MODULE_GPT120);
+ *
+ * // initialize module
+ * //IfxGpt12_IncrEnc gpt12; // defined globally
+ *
+ * IfxGpt12_IncrEnc_init(&gpt12, &gptConfig);
+ * \endcode
+ *
+ */
+IFX_EXTERN boolean IfxGpt12_IncrEnc_init(IfxGpt12_IncrEnc *driver, const IfxGpt12_IncrEnc_Config *config);
+
+/** \brief Initializes the configuration structure to default
+ * \param config Configuration structure for incremental encoder
+ * \param gpt12 pointer to module base address
+ * \return None
+ *
+ * see \ref IfxGpt12_IncrEnc_init
+ *
+ */
+IFX_EXTERN void IfxGpt12_IncrEnc_initConfig(IfxGpt12_IncrEnc_Config *config, Ifx_GPT12 *gpt12);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gpt12_IncrEnc_StdIf_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief \see IfxStdIf_Pos_GetAbsolutePosition
+ * \param driver driver handle
+ * \return absolute position
+ */
+IFX_EXTERN float32 IfxGpt12_IncrEnc_getAbsolutePosition(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetDirection
+ * \param driver driver handle
+ * \return direction
+ */
+IFX_EXTERN IfxStdIf_Pos_Dir IfxGpt12_IncrEnc_getDirection(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetFault
+ * \param driver driver handle
+ * \return Fault
+ */
+IFX_EXTERN IfxStdIf_Pos_Status IfxGpt12_IncrEnc_getFault(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetOffset
+ * \param driver driver handle
+ * \return offset address
+ */
+IFX_EXTERN sint32 IfxGpt12_IncrEnc_getOffset(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetPeriodPerRotation
+ * \param driver driver handle
+ * \return Period per rotation
+ */
+IFX_EXTERN uint16 IfxGpt12_IncrEnc_getPeriodPerRotation(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetPosition
+ * \param driver driver handle
+ * \return position
+ */
+IFX_EXTERN float32 IfxGpt12_IncrEnc_getPosition(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetRawPosition
+ * \param driver driver handle
+ * \return position in ticks
+ */
+IFX_EXTERN sint32 IfxGpt12_IncrEnc_getRawPosition(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetRefreshPeriod
+ * \param driver driver handle
+ * \return update period
+ */
+IFX_EXTERN float32 IfxGpt12_IncrEnc_getRefreshPeriod(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetResolution
+ * \param driver driver handle
+ * \return resolution
+ */
+IFX_EXTERN sint32 IfxGpt12_IncrEnc_getResolution(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetSensorType
+ * \param driver driver handle
+ * \return sensor type
+ */
+IFX_EXTERN IfxStdIf_Pos_SensorType IfxGpt12_IncrEnc_getSensorType(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetSpeed
+ * \param driver driver handle
+ * \return speed
+ */
+IFX_EXTERN float32 IfxGpt12_IncrEnc_getSpeed(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_GetTurn
+ * \param driver driver handle
+ * \return the number of turns
+ */
+IFX_EXTERN sint32 IfxGpt12_IncrEnc_getTurn(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_OnZeroIrq
+ * \param driver driver handle
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_IncrEnc_onZeroIrq(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_Reset
+ * \param driver driver handle
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_IncrEnc_reset(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_ResetFaults
+ * \param driver driver handle
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_IncrEnc_resetFaults(IfxGpt12_IncrEnc *driver);
+
+/** \brief \see IfxStdIf_Pos_SetOffset
+ * \param driver driver handle
+ * \param offset offset address
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_IncrEnc_setOffset(IfxGpt12_IncrEnc *driver, sint32 offset);
+
+/** \brief \see IfxStdIf_Pos_SetRefreshPeriod
+ * \param driver driver handle
+ * \param updatePeriod update period
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_IncrEnc_setRefreshPeriod(IfxGpt12_IncrEnc *driver, float32 updatePeriod);
+
+/** \brief \see IfxStdIf_Pos_Update
+ * \param driver driver handle
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_IncrEnc_update(IfxGpt12_IncrEnc *driver);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes the standard interface "Pos"
+ * \param stdif Standard interface position object
+ * \param driver incremental encoder interface Handle
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGpt12_IncrEnc_stdIfPosInit(IfxStdIf_Pos *stdif, IfxGpt12_IncrEnc *driver);
+
+#endif /* IFXGPT12_INCRENC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/Std/IfxGpt12.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/Std/IfxGpt12.c
new file mode 100644
index 0000000..dd60433
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/Std/IfxGpt12.c
@@ -0,0 +1,404 @@
+/**
+ * \file IfxGpt12.c
+ * \brief GPT12 basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGpt12.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12)
+{
+ float32 freq = IfxGpt12_getModuleFrequency(gpt12);
+
+ IfxGpt12_Mode mode;
+ IfxGpt12_TimerInputPrescaler prescaler;
+
+ IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
+
+ switch (bps1)
+ {
+ case IfxGpt12_Gpt1BlockPrescaler_4:
+ freq = freq / 4;
+ break;
+ case IfxGpt12_Gpt1BlockPrescaler_8:
+ freq = freq / 8;
+ break;
+ case IfxGpt12_Gpt1BlockPrescaler_16:
+ freq = freq / 16;
+ break;
+ default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
+ freq = freq / 32;
+ break;
+ }
+
+ mode = IfxGpt12_T2_getMode(gpt12);
+ prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T2CON.B.T2I;
+
+ if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
+ {
+ freq = freq / (1 << prescaler);
+ }
+ else
+ {
+ freq = freq / 2;
+ }
+
+ return freq;
+}
+
+
+float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12)
+{
+ float32 freq = IfxGpt12_getModuleFrequency(gpt12);
+
+ IfxGpt12_Mode mode;
+ IfxGpt12_TimerInputPrescaler prescaler;
+
+ IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
+
+ switch (bps1)
+ {
+ case IfxGpt12_Gpt1BlockPrescaler_4:
+ freq = freq / 4;
+ break;
+ case IfxGpt12_Gpt1BlockPrescaler_8:
+ freq = freq / 8;
+ break;
+ case IfxGpt12_Gpt1BlockPrescaler_16:
+ freq = freq / 16;
+ break;
+ default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
+ freq = freq / 32;
+ break;
+ }
+
+ mode = (IfxGpt12_Mode)gpt12->T3CON.B.T3M;
+ prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T3CON.B.T3I;
+
+ if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
+ {
+ freq = freq / (1 << prescaler);
+ }
+ else
+ {
+ freq = freq / 2;
+ }
+
+ return freq;
+}
+
+
+float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12)
+{
+ float32 freq = IfxGpt12_getModuleFrequency(gpt12);
+
+ IfxGpt12_Mode mode;
+ IfxGpt12_TimerInputPrescaler prescaler;
+
+ IfxGpt12_Gpt1BlockPrescaler bps1 = (IfxGpt12_Gpt1BlockPrescaler)gpt12->T3CON.B.BPS1;
+
+ switch (bps1)
+ {
+ case IfxGpt12_Gpt1BlockPrescaler_4:
+ freq = freq / 4;
+ break;
+ case IfxGpt12_Gpt1BlockPrescaler_8:
+ freq = freq / 8;
+ break;
+ case IfxGpt12_Gpt1BlockPrescaler_16:
+ freq = freq / 16;
+ break;
+ default: /* case IfxGpt12_Gpt1BlockPrescaler_32: */
+ freq = freq / 32;
+ break;
+ }
+
+ mode = (IfxGpt12_Mode)gpt12->T4CON.B.T4M;
+ prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T4CON.B.T4I;
+
+ if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
+ {
+ freq = freq / (1 << prescaler);
+ }
+ else
+ {
+ freq = freq / 2;
+ }
+
+ return freq;
+}
+
+
+float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12)
+{
+ float32 freq = IfxGpt12_getModuleFrequency(gpt12);
+
+ IfxGpt12_Mode mode;
+ IfxGpt12_TimerInputPrescaler prescaler;
+
+ IfxGpt12_Gpt2BlockPrescaler bps2 = (IfxGpt12_Gpt2BlockPrescaler)gpt12->T6CON.B.BPS2;
+
+ switch (bps2)
+ {
+ case IfxGpt12_Gpt2BlockPrescaler_2:
+ freq = freq / 2;
+ break;
+ case IfxGpt12_Gpt2BlockPrescaler_4:
+ freq = freq / 4;
+ break;
+ case IfxGpt12_Gpt2BlockPrescaler_8:
+ freq = freq / 8;
+ break;
+ default: /* case IfxGpt12_Gpt2BlockPrescaler_16: */
+ freq = freq / 16;
+ break;
+ }
+
+ mode = (IfxGpt12_Mode)gpt12->T5CON.B.T5M;
+ prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T5CON.B.T5I;
+
+ if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
+ {
+ freq = freq / (1 << prescaler);
+ }
+ else
+ {
+ freq = freq / 2;
+ }
+
+ return freq;
+}
+
+
+float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12)
+{
+ float32 freq = IfxGpt12_getModuleFrequency(gpt12);
+
+ IfxGpt12_Mode mode;
+ IfxGpt12_TimerInputPrescaler prescaler;
+
+ IfxGpt12_Gpt2BlockPrescaler bps2 = (IfxGpt12_Gpt2BlockPrescaler)gpt12->T6CON.B.BPS2;
+
+ switch (bps2)
+ {
+ case IfxGpt12_Gpt2BlockPrescaler_2:
+ freq = freq / 2;
+ break;
+ case IfxGpt12_Gpt2BlockPrescaler_4:
+ freq = freq / 4;
+ break;
+ case IfxGpt12_Gpt2BlockPrescaler_8:
+ freq = freq / 8;
+ break;
+ default: /* case IfxGpt12_Gpt2BlockPrescaler_16: */
+ freq = freq / 16;
+ break;
+ }
+
+ mode = (IfxGpt12_Mode)gpt12->T6CON.B.T6M;
+ prescaler = (IfxGpt12_TimerInputPrescaler)gpt12->T6CON.B.T6I;
+
+ if ((mode == IfxGpt12_Mode_timer) || (mode == IfxGpt12_Mode_highGatedTimer) || (mode == IfxGpt12_Mode_lowGatedTimer))
+ {
+ freq = freq / (1 << prescaler);
+ }
+ else
+ {
+ freq = freq / 2;
+ }
+
+ return freq;
+}
+
+
+void IfxGpt12_disableModule(Ifx_GPT12 *gpt12)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw);
+ gpt12->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(psw);
+}
+
+
+void IfxGpt12_enableModule(Ifx_GPT12 *gpt12)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw);
+ gpt12->CLC.B.DISR = 0;
+ IfxScuWdt_setCpuEndinit(psw);
+}
+
+
+void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode)
+{
+ IfxPort_setPinModeInput(txEudIn->pin.port, txEudIn->pin.pinIndex, inputMode);
+
+ switch (txEudIn->timer)
+ {
+ case 2:
+ IfxGpt12_T2_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ case 3:
+ IfxGpt12_T3_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ case 4:
+ IfxGpt12_T4_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ case 5:
+ IfxGpt12_T5_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ case 6:
+ IfxGpt12_T6_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ default:
+ break;
+ }
+}
+
+
+void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(txEudIn->pin.port, txEudIn->pin.pinIndex, inputMode);
+ IfxPort_setPinPadDriver(txEudIn->pin.port, txEudIn->pin.pinIndex, padDriver);
+
+ switch (txEudIn->timer)
+ {
+ case 2:
+ IfxGpt12_T2_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ case 3:
+ IfxGpt12_T3_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ case 4:
+ IfxGpt12_T4_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ case 5:
+ IfxGpt12_T5_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ case 6:
+ IfxGpt12_T6_setEudInput(txEudIn->module, (IfxGpt12_EudInput)txEudIn->select);
+ break;
+ default:
+ break;
+ }
+}
+
+
+void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode)
+{
+ IfxPort_setPinModeInput(txIn->pin.port, txIn->pin.pinIndex, inputMode);
+
+ switch (txIn->timer)
+ {
+ case 2:
+ IfxGpt12_T2_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ case 3:
+ IfxGpt12_T3_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ case 4:
+ IfxGpt12_T4_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ case 5:
+ IfxGpt12_T5_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ case 6:
+ IfxGpt12_T6_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ default:
+ break;
+ }
+}
+
+
+void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(txIn->pin.port, txIn->pin.pinIndex, inputMode);
+ IfxPort_setPinPadDriver(txIn->pin.port, txIn->pin.pinIndex, padDriver);
+
+ switch (txIn->timer)
+ {
+ case 2:
+ IfxGpt12_T2_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ case 3:
+ IfxGpt12_T3_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ case 4:
+ IfxGpt12_T4_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ case 5:
+ IfxGpt12_T5_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ case 6:
+ IfxGpt12_T6_setInput(txIn->module, (IfxGpt12_Input)txIn->select);
+ break;
+ default:
+ break;
+ }
+}
+
+
+void IfxGpt12_resetModule(Ifx_GPT12 *gpt12)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ gpt12->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ gpt12->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == gpt12->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ gpt12->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/Std/IfxGpt12.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/Std/IfxGpt12.h
new file mode 100644
index 0000000..5b07703
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gpt12/Std/IfxGpt12.h
@@ -0,0 +1,1665 @@
+/**
+ * \file IfxGpt12.h
+ * \brief GPT12 basic functionality
+ * \ingroup IfxLld_Gpt12
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gpt12_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Gpt12_Std
+ * \defgroup IfxLld_Gpt12_Std_InterruptFunctions Interrupt Functions
+ * \ingroup IfxLld_Gpt12_Std
+ * \defgroup IfxLld_Gpt12_Std_ConfigurationFunctions Configuration Functions
+ * \ingroup IfxLld_Gpt12_Std
+ * \defgroup IfxLld_Gpt12_Std_UtilityFunctions Utility Functions
+ * \ingroup IfxLld_Gpt12_Std
+ * \defgroup IfxLld_Gpt12_Std_OperativeFunctions Operative Functions
+ * \ingroup IfxLld_Gpt12_Std
+ */
+
+#ifndef IFXGPT12_H
+#define IFXGPT12_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxGpt12_cfg.h"
+#include "Src/Std/IfxSrc.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "IfxGpt12_reg.h"
+#include "_PinMap/IfxGpt12_PinMap.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gpt12_Std_Enumerations
+ * \{ */
+/** \brief Input Select for CAPIN \n
+ * Definition in IfxGPT12.PISEL.B.ISCAPIN
+ */
+typedef enum
+{
+ IfxGpt12_CaptureInput_A = 0, /**< \brief signal CAPINA selected */
+ IfxGpt12_CaptureInput_B = 1, /**< \brief signal CAPINB selected */
+ IfxGpt12_CaptureInput_C = 2, /**< \brief signal CAPINC selected */
+ IfxGpt12_CaptureInput_D = 3 /**< \brief signal CAPIND selected */
+} IfxGpt12_CaptureInput;
+
+/** \brief Tx Input Edge Selection (Capture Mode, x=2,4)
+ */
+typedef enum
+{
+ IfxGpt12_CaptureInputMode_none = 0, /**< \brief None, Counter is disabled */
+ IfxGpt12_CaptureInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
+ IfxGpt12_CaptureInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
+ IfxGpt12_CaptureInputMode_bothEdgesTxIN = 3 /**< \brief (rising or falling edge) on TxIN */
+} IfxGpt12_CaptureInputMode;
+
+/** \brief Capture Trigger Enable \n
+ * Definition in IfxGPT12.T5CON.B.CT3
+ */
+typedef enum
+{
+ IfxGpt12_CaptureTrigger_capin = 0, /**< \brief Capture Trigger Enable from CAPIN */
+ IfxGpt12_CaptureTrigger_t3inOrT3EUD = 1 /**< \brief Capture Trigger Enable from T3IN/T3EUD */
+} IfxGpt12_CaptureTrigger;
+
+/** \brief Capture Trigger Selection \n
+ * Definition in IfxGPT12.T5CON.B.CI
+ */
+typedef enum
+{
+ IfxGpt12_CaptureTriggerMode_disabled = 0, /**< \brief capture disabled */
+ IfxGpt12_CaptureTriggerMode_risingEdge = 1, /**< \brief positive Transition on CAPIN or any Transition on T3IN */
+ IfxGpt12_CaptureTriggerMode_fallingEdge = 2, /**< \brief negative Transition on CAPIN or any Transition on T3EUD */
+ IfxGpt12_CaptureTriggerMode_randomEdge = 3 /**< \brief Any Transition on CAPIN or any Transition on T3IN/T3EUD */
+} IfxGpt12_CaptureTriggerMode;
+
+/** \brief Input Edge Selection for counter mode\n
+ * Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 6)
+ */
+typedef enum
+{
+ IfxGpt12_CounterInputMode_counterDisabled = 0, /**< \brief Counter Tx is disabled */
+ IfxGpt12_CounterInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
+ IfxGpt12_CounterInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
+ IfxGpt12_CounterInputMode_bothEdgesTxIN = 3, /**< \brief rising or falling edge on TxIN */
+ IfxGpt12_CounterInputMode_risingEdgeTxOTL = 5, /**< \brief rising edge of TxOTL (x=3,6) */
+ IfxGpt12_CounterInputMode_fallingEdgeTxOTL = 6, /**< \brief falling edge of TxOTL */
+ IfxGpt12_CounterInputMode_bothEdgesTxOTL = 7 /**< \brief rising or falling edge of TxOTL */
+} IfxGpt12_CounterInputMode;
+
+/** \brief Input Select for TxEUD \n
+ * Definition in IfxGPT12.PISEL.B.ISTxEUD (x = 2 to 4)
+ */
+typedef enum
+{
+ IfxGpt12_EudInput_A = 0, /**< \brief signal TXEUDA selected */
+ IfxGpt12_EudInput_B = 1, /**< \brief signal TXEUDB selected */
+ IfxGpt12_EudInput_C = 2, /**< \brief signal TXEUDC selected */
+ IfxGpt12_EudInput_D = 3 /**< \brief signal TXEUDD selected */
+} IfxGpt12_EudInput;
+
+/** \brief GPT1 block prescaler Selection\n
+ * Definition in IfxGPT12.T3CON.B.BPS1
+ */
+typedef enum
+{
+ IfxGpt12_Gpt1BlockPrescaler_8 = 0, /**< \brief fGPT/8 */
+ IfxGpt12_Gpt1BlockPrescaler_4 = 1, /**< \brief fGPT/4 */
+ IfxGpt12_Gpt1BlockPrescaler_32 = 2, /**< \brief fGPT/32 */
+ IfxGpt12_Gpt1BlockPrescaler_16 = 3 /**< \brief fGPT/16 */
+} IfxGpt12_Gpt1BlockPrescaler;
+
+/** \brief Gpt2 block prescaler Selection\n
+ * Definition in IfxGPT12.T6CON.B.BPS2
+ */
+typedef enum
+{
+ IfxGpt12_Gpt2BlockPrescaler_4 = 0, /**< \brief fGPT/4 */
+ IfxGpt12_Gpt2BlockPrescaler_2 = 1, /**< \brief fGPT/2 */
+ IfxGpt12_Gpt2BlockPrescaler_16 = 2, /**< \brief fGPT/16 */
+ IfxGpt12_Gpt2BlockPrescaler_8 = 3 /**< \brief fGPT/8 */
+} IfxGpt12_Gpt2BlockPrescaler;
+
+/** \brief Input Edge Selection for Incremental Interface mode\n
+ * Definition in IfxGPT12.TxCON.B.TxI (x=2, 3 and 4)
+ */
+typedef enum
+{
+ IfxGpt12_IncrementalInterfaceInputMode_stopCounterTx = 0, /**< \brief Counter Tx Stop */
+ IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxIN = 1, /**< \brief (rising or falling edge) on TxIN */
+ IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxEUD = 2, /**< \brief (rising or falling edge) on TxEUD */
+ IfxGpt12_IncrementalInterfaceInputMode_bothEdgesTxINOrTxEUD = 3 /**< \brief (rising or falling edge) on any Tx input (TxIN or TxEUD) */
+} IfxGpt12_IncrementalInterfaceInputMode;
+
+/** \brief Input Select for TxIN \n
+ * Definition in IfxGPT12.PISEL.B.ISTxIN (x = 2 to 4)
+ */
+typedef enum
+{
+ IfxGpt12_Input_A = 0, /**< \brief signal TXINA selected */
+ IfxGpt12_Input_B = 1, /**< \brief signal TXINB selected */
+ IfxGpt12_Input_C = 2, /**< \brief signal TXINC selected */
+ IfxGpt12_Input_D = 3 /**< \brief signal TXIND selected */
+} IfxGpt12_Input;
+
+/** \brief Timer operating mode \n
+ * Definition in IfxGPT12.TxCON.B.TxM (x = 2 to 4)
+ */
+typedef enum
+{
+ IfxGpt12_Mode_timer = 0, /**< \brief Timer Mode selected */
+ IfxGpt12_Mode_counter = 1, /**< \brief Counter Mode selected */
+ IfxGpt12_Mode_lowGatedTimer = 2, /**< \brief Low Gated Timer Mode selected */
+ IfxGpt12_Mode_highGatedTimer = 3, /**< \brief High Gated Timer Mode selected */
+ IfxGpt12_Mode_reload = 4, /**< \brief Reload Mode selected */
+ IfxGpt12_Mode_capture = 5, /**< \brief Capture Mode selected */
+ IfxGpt12_Mode_incrementalInterfaceRotationDetection = 6, /**< \brief Incremental Interface Mode selected */
+ IfxGpt12_Mode_incrementalInterfaceEdgeDetection = 7 /**< \brief Incremental Interface Mode selected */
+} IfxGpt12_Mode;
+
+/** \brief Input Edge Selection for reload mode\n
+ * Definition in IfxGPT12.TxCON.B.TxI (x = 2 and 4)
+ */
+typedef enum
+{
+ IfxGpt12_ReloadInputMode_counterDisabled = 0, /**< \brief Counter Tx is disabled */
+ IfxGpt12_ReloadInputMode_risingEdgeTxIN = 1, /**< \brief rising edge on TxIN */
+ IfxGpt12_ReloadInputMode_fallingEdgeTxIN = 2, /**< \brief falling edge on TxIN */
+ IfxGpt12_ReloadInputMode_bothEdgesTxIN = 3, /**< \brief rising or falling edge on TxIN */
+ IfxGpt12_ReloadInputMode_risingEdgeTxOTL = 5, /**< \brief rising edge of Tx toggle latch TxOTL */
+ IfxGpt12_ReloadInputMode_fallingEdgeTxOTL = 6, /**< \brief falling edge of Tx toggle latch TxOTL */
+ IfxGpt12_ReloadInputMode_bothEdgesTxOTL = 7 /**< \brief rising or falling edge of Tx toggle latch TxOTL */
+} IfxGpt12_ReloadInputMode;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_GPT12.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxGpt12_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxGpt12_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxGpt12_SleepMode;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxGpt12_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxGpt12_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxGpt12_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxGpt12_SuspendMode;
+
+/** \brief Timer Count Direction\n
+ * Definition in IfxGPT12.TxCON.B.TxUD (x=2 to 6)
+ */
+typedef enum
+{
+ IfxGpt12_TimerDirection_up = 0, /**< \brief Timer Up Direction selected */
+ IfxGpt12_TimerDirection_down = 1 /**< \brief Timer Down Direction selected */
+} IfxGpt12_TimerDirection;
+
+/** \brief Timer count direction control source\n
+ * Definition in IfxGPT12.TxCON.B.TxUDE (x=2 to 6)
+ */
+typedef enum
+{
+ IfxGpt12_TimerDirectionSource_internal = 0, /**< \brief Timer Dir Control = TxUD (x=2,3,4) */
+ IfxGpt12_TimerDirectionSource_external = 1 /**< \brief Timer Dir Control = TxUD (x=2,3,4) */
+} IfxGpt12_TimerDirectionSource;
+
+/** \brief Input prescaler Selection for the timer\n
+ * Definition in IfxGPT12.TxCON.B.TxI (x = 2 to 4)
+ */
+typedef enum
+{
+ IfxGpt12_TimerInputPrescaler_1 = 0,
+ IfxGpt12_TimerInputPrescaler_2 = 1,
+ IfxGpt12_TimerInputPrescaler_4 = 2,
+ IfxGpt12_TimerInputPrescaler_8 = 3,
+ IfxGpt12_TimerInputPrescaler_16 = 4,
+ IfxGpt12_TimerInputPrescaler_32 = 5,
+ IfxGpt12_TimerInputPrescaler_64 = 6,
+ IfxGpt12_TimerInputPrescaler_128 = 7
+} IfxGpt12_TimerInputPrescaler;
+
+/** \brief Timer Reload Mode\n
+ * Definition in IfxGPT12.T6CON.B.T6SR
+ */
+typedef enum
+{
+ IfxGpt12_TimerReloadMode_disable, /**< \brief Reload mode disabled */
+ IfxGpt12_TimerReloadMode_enable /**< \brief Reload mode enabled */
+} IfxGpt12_TimerReloadMode;
+
+/** \brief Timer Remote Control enable choice \n
+ * Definition in IfxGPT12.TxCON.B.TxRC (x = 2 and 4)
+ */
+typedef enum
+{
+ IfxGpt12_TimerRemoteControl_off = 0, /**< \brief T2 RemoteControl Off */
+ IfxGpt12_TimerRemoteControl_on = 1 /**< \brief T2 RemoteControl On */
+} IfxGpt12_TimerRemoteControl;
+
+/** \brief Timer Run / stop control choice (only if TxCON.B.TxRC = 0)\n
+ * Definition in IfxGPT12.TxCON.B.TxR (x = 2 to 6)
+ */
+typedef enum
+{
+ IfxGpt12_TimerRun_stop = 0, /**< \brief Timer x Stops */
+ IfxGpt12_TimerRun_start = 1 /**< \brief Timer X Run */
+} IfxGpt12_TimerRun;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gpt12_Std_InterruptFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the address of Timer 2 service request
+ * \param gpt12 Pointer to module base address
+ * \return address of timer 2 Interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the address of Timer 3 service request
+ * \param gpt12 Pointer to module base address
+ * \return address of Timer 3 Interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the address of Timer 4 service request
+ * \param gpt12 Pointer to module base address
+ * \return address of timer 4 interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the address of Timer 5 service request
+ * \param gpt12 Pointer to module base address
+ * \return address of Timer 5 Interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the address of Timer 6 service request
+ * \param gpt12 Pointer to module base address
+ * \return address of Timer 6 interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the address of capture service request
+ * \param gpt12 Pointer to module base address
+ * \return address of capture Interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gpt12_Std_ConfigurationFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Sets the input edge selection for the capture mode of the T2 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input prescaler value in capture mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode);
+
+/** \brief Sets the input edge selection for the counter mode of the T2 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input edge selection in counter mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
+
+/** \brief Sets the T2 timer count direction source internal / external
+ * \param gpt12 Pointer to module base address
+ * \param source direction source
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
+
+/** \brief Sets the EUD input for the T2 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the EUD input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
+
+/** \brief Sets the input edge selection for the incremental interface mode of the T2 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input edge selection in IIM mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
+
+/** \brief Sets the input for the T2 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the Input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
+
+/** \brief Enables / Disables the interrupt generation of the T2 timer
+ * \param gpt12 pointer to module base address
+ * \param enabled Enable/Disable choice
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled);
+
+/** \brief Sets the mode of operation od T2 timer
+ * \param gpt12 Pointer to module base address
+ * \param mode Select the mode of operation
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
+
+/** \brief Sets the input edge selection for the reload mode of the T2 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input prescaler value in reload mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode);
+
+/** \brief Sets the remote control of the T2 timer
+ * \param gpt12 pointer to module base address
+ * \param control enable the remote control
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
+
+/** \brief Sets the T2 timer count direction
+ * \param gpt12 Pointer to module base address
+ * \param direction select the Timer direction
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
+
+/** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T2 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputPrescaler input prescaler value in timer mode and gated timer mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
+
+/** \brief Enable / Disable the T3 Output on pin T3OUT
+ * \param gpt12 Pointer to module base address
+ * \param enable enable / disable choice for T3OE
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable);
+
+/** \brief Sets the input edge selection for the counter mode of the T3 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input edge selection in counter mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
+
+/** \brief Sets the T3 timer count direction source internal / external
+ * \param gpt12 Pointer to module base address
+ * \param source direction source
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
+
+/** \brief Sets the EUD input for the T3 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the EUD input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
+
+/** \brief Sets the input edge selection for the incremental interface mode of the T3 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input edge selection in IIM mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
+
+/** \brief Sets the input for the T3 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the Input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
+
+/** \brief Sets the mode of operation od T3 timer
+ * \param gpt12 Pointer to module base address
+ * \param mode Select the mode of operation
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
+
+/** \brief Sets the T3 timer count direction
+ * \param gpt12 Pointer to module base address
+ * \param direction select the Timer direction
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
+
+/** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T3 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputPrescaler input prescaler value in timer mode and gated timer mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
+
+/** \brief Enables / Disables the clear timer T2 bit of the T4 timer
+ * \param gpt12 pointer to module base address
+ * \param enabled Enable/Disable choice
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled);
+
+/** \brief Enables / Disables the clear timer T3 bit of the T4 timer
+ * \param gpt12 pointer to module base address
+ * \param enabled Enable/Disable choice
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled);
+
+/** \brief Sets the input edge selection for the capture mode of the T4 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input prescaler value in capture mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode);
+
+/** \brief Sets the input edge selection for the counter mode of the T4 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input edge selection in counter mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
+
+/** \brief Sets the T4 timer count direction source internal / external
+ * \param gpt12 Pointer to module base address
+ * \param source direction source
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
+
+/** \brief Sets the EUD input for the T4 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the EUD input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
+
+/** \brief Sets the input edge selection for the incremental interface mode of the T4 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input edge selection in IIM mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode);
+
+/** \brief Sets the input for the T4 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the Input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
+
+/** \brief Enables / Disables the interrupt generation of the T4 timer
+ * \param gpt12 pointer to module base address
+ * \param enabled Enable/Disable choice
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled);
+
+/** \brief Sets the mode of operation od T4 timer
+ * \param gpt12 Pointer to module base address
+ * \param mode Select the mode of operation
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
+
+/** \brief Sets the input edge selection for the reload mode of the T4 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input prescaler value in reload mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode);
+
+/** \brief Sets the remote control of the T4 timer
+ * \param gpt12 pointer to module base address
+ * \param control enable the remote control
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
+
+/** \brief Sets the T4 timer count direction
+ * \param gpt12 Pointer to module base address
+ * \param direction select the Timer direction
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
+
+/** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T4 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputPrescaler input prescaler value in timer mode and gated timer mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
+
+/** \brief Enables / Disables the clear timer bit of the T5 timer
+ * \param gpt12 pointer to module base address
+ * \param enabled Enable/Disable choice
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled);
+
+/** \brief Sets the capture trigger of teh T5 timer
+ * \param gpt12 Pointer to Module base address
+ * \param trigger Capture trigger
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger);
+
+/** \brief Enables / Disables the capture trigger of the T5 timer
+ * \param gpt12 pointer to module base address
+ * \param enabled Enable/Disable choice
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled);
+
+/** \brief Sets the capture trigger mode of the T5 timer
+ * \param gpt12 Pointer to module base address
+ * \param mode Select the capture trigger mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode);
+
+/** \brief Sets the input edge selection for the counter mode of the T5 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input edge selection in counter mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
+
+/** \brief Sets the T5 timer count direction source internal / external
+ * \param gpt12 Pointer to module base address
+ * \param source direction source
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
+
+/** \brief Sets the EUD input for the T5 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the EUD input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
+
+/** \brief Sets the input for the T5 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the Input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
+
+/** \brief Sets the mode of operation od T5 timer
+ * \param gpt12 Pointer to module base address
+ * \param mode Select the mode of operation
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
+
+/** \brief Sets the remote control of the T5 timer
+ * \param gpt12 pointer to module base address
+ * \param control enable the remote control
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control);
+
+/** \brief Sets the T5 timer count direction
+ * \param gpt12 Pointer to module base address
+ * \param direction select the Timer direction
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
+
+/** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T5 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputPrescaler input prescaler value in timer mode and gated timer mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
+
+/** \brief Enables / Disables the clear timer bit of the T6 timer
+ * \param gpt12 pointer to module base address
+ * \param enabled Enable/Disable choice
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled);
+
+/** \brief Sets the input edge selection for the counter mode of the T6 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputMode input edge selection in counter mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode);
+
+/** \brief sets the T6 timer count direction source internal / external
+ * \param gpt12 Pointer to module base address
+ * \param source direction source
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source);
+
+/** \brief Sets the EUD input for the T6 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the EUD input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input);
+
+/** \brief Sets the input for the T6 timer
+ * \param gpt12 Pointer to module base address
+ * \param input Select the Input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input);
+
+/** \brief Sets the mode of operation od T6 timer
+ * \param gpt12 Pointer to module base address
+ * \param mode Select the mode of operation
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode);
+
+/** \brief sets the T6 timer count direction
+ * \param gpt12 Pointer to module base address
+ * \param mode Timer Reload Mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode);
+
+/** \brief sets the T6 timer count direction
+ * \param gpt12 Pointer to module base address
+ * \param direction select the Timer direction
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction);
+
+/** \brief Sets the input prescaler for the Timer mode and Gated timer mode of T6 timer
+ * \param gpt12 Pointer to module base address
+ * \param inputPrescaler input prescaler value in timer mode and gated timer mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler);
+
+/** \brief Initializes a Capin_In input
+ * \param capIn the TxIn Pin which should be configured
+ * \param inputMode the pin input mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode);
+
+/** \brief Initializes a SLSO output
+ * \param txOut the TxOUT Pin which should be configured
+ * \param outputMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Sets the capture input
+ * \param gpt12 Pointer to Module base address
+ * \param input Select the capture input signal
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input);
+
+/** \brief Sets the GPT1 block prescaler
+ * \param gpt12 Pointer to module base address
+ * \param bps1 Select the GPT1 block Prescaler
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1);
+
+/** \brief Sets the GPT2 block prescaler
+ * \param gpt12 Pointer to module base address
+ * \param bps2 Select the GPT2 block Prescaler
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disables the module
+ * \param gpt12 Pointer to module base address
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_disableModule(Ifx_GPT12 *gpt12);
+
+/** \brief Enables the module
+ * \param gpt12 Pointer to module base address
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_enableModule(Ifx_GPT12 *gpt12);
+
+/** \brief Initializes a TxEUDIn_IN input
+ * \param txEudIn the TxEUD_IN Pin which should be configured
+ * \param inputMode the pin input mode which should be configured
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_initTxEudInPin(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode);
+
+/** \brief Initializes a TxIn input
+ * \param txIn the TxIn Pin which should be configured
+ * \param inputMode the pin input mode which should be configured
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_initTxInPin(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gpt12_Std_UtilityFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the operating mode of the T2 timer
+ * \param gpt12 Pointer to module base address
+ * \return mode of operation
+ */
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the timer value of the T2 timer
+ * \param gpt12 Pointer to module base address
+ * \return timer current value
+ */
+IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the operating mode of the T3 timer
+ * \param gpt12 Pointer to module base address
+ * \return mode of operation
+ */
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the timer value of the T3 timer
+ * \param gpt12 Pointer to module base address
+ * \return timer current value
+ */
+IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the operating mode of the T4 timer
+ * \param gpt12 Pointer to module base address
+ * \return mode of operation
+ */
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the timer value of the T4 timer
+ * \param gpt12 Pointer to module base address
+ * \return timer current value
+ */
+IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the operating mode of the T5 timer
+ * \param gpt12 Pointer to module base address
+ * \return mode of operation
+ */
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the timer value of the T5 timer
+ * \param gpt12 Pointer to module base address
+ * \return timer current value
+ */
+IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the operating mode of the T6 timer
+ * \param gpt12 Pointer to module base address
+ * \return mode of operation
+ */
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the timer value of the T6 timer
+ * \param gpt12 Pointer to module base address
+ * \return timer current value
+ */
+IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the gpt12 module frequency
+ * \param gpt12 Pointer to module base address
+ * \return gpt12 module frequency
+ */
+IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the frequency of the T2 timer
+ * \param gpt12 Pointer to Module base address
+ * \return frequency
+ */
+IFX_EXTERN float32 IfxGpt12_T2_getFrequency(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the frequency of the T3 timer
+ * \param gpt12 Pointer to Module base address
+ * \return frequency
+ */
+IFX_EXTERN float32 IfxGpt12_T3_getFrequency(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the frequency of the T4 timer
+ * \param gpt12 Pointer to Module base address
+ * \return frequency
+ */
+IFX_EXTERN float32 IfxGpt12_T4_getFrequency(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the frequency of the T5 timer
+ * \param gpt12 Pointer to Module base address
+ * \return frequency
+ */
+IFX_EXTERN float32 IfxGpt12_T5_getFrequency(Ifx_GPT12 *gpt12);
+
+/** \brief Returns the frequency of the T6 timer
+ * \param gpt12 Pointer to Module base address
+ * \return frequency
+ */
+IFX_EXTERN float32 IfxGpt12_T6_getFrequency(Ifx_GPT12 *gpt12);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gpt12_Std_OperativeFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Starts / stops the T2 Timer
+ * \param gpt12 Pointer to Module base address
+ * \param runTimer Start/stop Timer 2
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
+
+/** \brief Sets value for the T2 timer
+ * \param gpt12 pointer to module base address
+ * \param value Timer Value
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
+
+/** \brief Starts / stops the T3 Timer
+ * \param gpt12 Pointer to module base address
+ * \param runTimer start/stop Timer 3
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
+
+/** \brief Sets value for the T3 Timer
+ * \param gpt12 pointer to module base address
+ * \param value Timer Value
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
+
+/** \brief Starts / stops the T4 Timer
+ * \param gpt12 Pointer to module base address
+ * \param runTimer Start/stop Timer 4
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
+
+/** \brief Sets value for the T4 timer
+ * \param gpt12 pointer to module base address
+ * \param value Timer Value
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
+
+/** \brief Starts / stops the T5 Timer
+ * \param gpt12 Pointer to module base address
+ * \param runTimer Start/stop Timer 5
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
+
+/** \brief Sets value for the T5 timer
+ * \param gpt12 pointer to module base address
+ * \param value Timer Value
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
+
+/** \brief Starts / stops the T6 Timer
+ * \param gpt12 Pointer to module base address
+ * \param runTimer Start/stop Timer 6
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer);
+
+/** \brief Sets value for the T6 timer
+ * \param gpt12 pointer to module base address
+ * \param value Timer Value
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param gpt12 pointer to GPT12 registers
+ * \param value Reload value
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param gpt12 pointer to GPT12 registers
+ * \param mode mode selection (enable/disable)
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param gpt12 Pointer to GPT12 module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief resets GPT12 kernel
+ * \param gpt12 pointer to GPT12 registers
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_resetModule(Ifx_GPT12 *gpt12);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Provides functionality for both setting of CAPIN pin direction as input and configuring pad driver
+ * \param capIn the TxIn Pin which should be configured
+ * \param inputMode the pin input mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param gpt12 Pointer to GPT12 module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Provides functionality for both setting of TXEUD pin direction as input and configuring pad driver
+ * \param txEudIn the TxEUD_IN Pin which should be configured
+ * \param inputMode the pin input mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_initTxEudInPinWithPadLevel(const IfxGpt12_TxEud_In *txEudIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Provides functionality for both setting of TXIN pin direction as input and configuring pad driver
+ * \param txIn the TxIn Pin which should be configured
+ * \param inputMode the pin input mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_EXTERN void IfxGpt12_initTxInPinWithPadLevel(const IfxGpt12_TxIn_In *txIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T2_getMode(Ifx_GPT12 *gpt12)
+{
+ return (IfxGpt12_Mode)gpt12->T2CON.B.T2M;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T2_getSrc(Ifx_GPT12 *gpt12)
+{
+ IFX_UNUSED_PARAMETER(gpt12)
+ return &MODULE_SRC.GPT12.GPT12[0].T2;
+}
+
+
+IFX_INLINE uint16 IfxGpt12_T2_getTimerValue(Ifx_GPT12 *gpt12)
+{
+ return (uint16)gpt12->T2.U;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
+{
+ gpt12->T2CON.B.T2R = runTimer;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
+{
+ gpt12->T2CON.B.T2I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
+{
+ gpt12->T2CON.B.T2I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
+{
+ gpt12->T2CON.B.T2UDE = source;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
+ gpt12->PISEL.B.IST2EUD = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
+{
+ gpt12->T2CON.B.T2I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
+ gpt12->PISEL.B.IST2IN = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
+{
+ gpt12->T2CON.B.T2IRDIS = enabled ? 0 : 1;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
+{
+ gpt12->T2CON.B.T2M = mode;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
+{
+ gpt12->T2CON.B.T2I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
+{
+ gpt12->T2CON.B.T2RC = control;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
+{
+ gpt12->T2CON.B.T2UD = direction;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
+{
+ gpt12->T2CON.B.T2I = inputPrescaler;
+}
+
+
+IFX_INLINE void IfxGpt12_T2_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
+{
+ gpt12->T2.U = value;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_enableOutput(Ifx_GPT12 *gpt12, boolean enable)
+{
+ gpt12->T3CON.B.T3OE = enable ? 1 : 0;
+}
+
+
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T3_getMode(Ifx_GPT12 *gpt12)
+{
+ return (IfxGpt12_Mode)gpt12->T3CON.B.T3M;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T3_getSrc(Ifx_GPT12 *gpt12)
+{
+ IFX_UNUSED_PARAMETER(gpt12)
+ return &MODULE_SRC.GPT12.GPT12[0].T3;
+}
+
+
+IFX_INLINE uint16 IfxGpt12_T3_getTimerValue(Ifx_GPT12 *gpt12)
+{
+ return (uint16)gpt12->T3.U;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
+{
+ gpt12->T3CON.B.T3R = runTimer;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, inputMode <= IfxGpt12_CounterInputMode_bothEdgesTxIN); /* wrong selection */
+ gpt12->T3CON.B.T3I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
+{
+ gpt12->T3CON.B.T3UDE = source;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
+{
+ gpt12->PISEL.B.IST3EUD = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
+{
+ gpt12->T3CON.B.T3I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
+{
+ gpt12->PISEL.B.IST3IN = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, ((mode != IfxGpt12_Mode_reload) && (mode != IfxGpt12_Mode_capture))); /* wrong selection */
+ gpt12->T3CON.B.T3M = mode;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
+{
+ gpt12->T3CON.B.T3UD = direction;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
+{
+ gpt12->T3CON.B.T3I = inputPrescaler;
+}
+
+
+IFX_INLINE void IfxGpt12_T3_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
+{
+ gpt12->T3.U = value;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_enableClearTimerT2(Ifx_GPT12 *gpt12, boolean enabled)
+{
+ gpt12->T4CON.B.CLRT2EN = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_enableClearTimerT3(Ifx_GPT12 *gpt12, boolean enabled)
+{
+ gpt12->T4CON.B.CLRT3EN = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T4_getMode(Ifx_GPT12 *gpt12)
+{
+ return (IfxGpt12_Mode)gpt12->T4CON.B.T4M;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T4_getSrc(Ifx_GPT12 *gpt12)
+{
+ IFX_UNUSED_PARAMETER(gpt12)
+ return &MODULE_SRC.GPT12.GPT12[0].T4;
+}
+
+
+IFX_INLINE uint16 IfxGpt12_T4_getTimerValue(Ifx_GPT12 *gpt12)
+{
+ return (uint16)gpt12->T4.U;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
+{
+ gpt12->T4CON.B.T4R = runTimer;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setCaptureInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInputMode inputMode)
+{
+ gpt12->T4CON.B.T4I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
+{
+ gpt12->T4CON.B.T4I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
+{
+ gpt12->T4CON.B.T4UDE = source;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
+{
+ gpt12->PISEL.B.IST4EUD = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setIncrementalInterfaceInputMode(Ifx_GPT12 *gpt12, IfxGpt12_IncrementalInterfaceInputMode inputMode)
+{
+ gpt12->T4CON.B.T4I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
+{
+ gpt12->PISEL.B.IST4IN = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setInterruptEnable(Ifx_GPT12 *gpt12, boolean enabled)
+{
+ gpt12->T4CON.B.T4IRDIS = enabled ? 0 : 1;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
+{
+ gpt12->T4CON.B.T4M = mode;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setReloadInputMode(Ifx_GPT12 *gpt12, IfxGpt12_ReloadInputMode inputMode)
+{
+ gpt12->T4CON.B.T4I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
+{
+ gpt12->T4CON.B.T4RC = control;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
+{
+ gpt12->T4CON.B.T4UD = direction;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
+{
+ gpt12->T4CON.B.T4I = inputPrescaler;
+}
+
+
+IFX_INLINE void IfxGpt12_T4_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
+{
+ gpt12->T4.U = value;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
+{
+ gpt12->T5CON.B.T5CLR = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T5_getMode(Ifx_GPT12 *gpt12)
+{
+ return (IfxGpt12_Mode)gpt12->T5CON.B.T5M;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T5_getSrc(Ifx_GPT12 *gpt12)
+{
+ IFX_UNUSED_PARAMETER(gpt12)
+ return &MODULE_SRC.GPT12.GPT12[0].T5;
+}
+
+
+IFX_INLINE uint16 IfxGpt12_T5_getTimerValue(Ifx_GPT12 *gpt12)
+{
+ return (uint16)gpt12->T5.U;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
+{
+ gpt12->T5CON.B.T5R = runTimer;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setCaptureTrigger(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTrigger trigger)
+{
+ gpt12->T5CON.B.CT3 = trigger;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setCaptureTriggerEnable(Ifx_GPT12 *gpt12, boolean enabled)
+{
+ gpt12->T5CON.B.T5SC = enabled;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setCaptureTriggerMode(Ifx_GPT12 *gpt12, IfxGpt12_CaptureTriggerMode mode)
+{
+ gpt12->T5CON.B.CI = mode;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
+{
+ gpt12->T5CON.B.T5I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
+{
+ gpt12->T5CON.B.T5UDE = source;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
+ gpt12->PISEL.B.IST5EUD = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
+ gpt12->PISEL.B.IST5IN = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode <= IfxGpt12_Mode_highGatedTimer); /* wrong selection */
+ gpt12->T5CON.B.T5M = mode;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setRemoteControl(Ifx_GPT12 *gpt12, IfxGpt12_TimerRemoteControl control)
+{
+ gpt12->T5CON.B.T5RC = control;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
+{
+ gpt12->T5CON.B.T5UD = direction;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
+{
+ gpt12->T5CON.B.T5I = inputPrescaler;
+}
+
+
+IFX_INLINE void IfxGpt12_T5_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
+{
+ gpt12->T5.U = value;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_enableClearTimer(Ifx_GPT12 *gpt12, boolean enabled)
+{
+ gpt12->T6CON.B.T6CLR = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE IfxGpt12_Mode IfxGpt12_T6_getMode(Ifx_GPT12 *gpt12)
+{
+ return (IfxGpt12_Mode)gpt12->T6CON.B.T6M;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_T6_getSrc(Ifx_GPT12 *gpt12)
+{
+ IFX_UNUSED_PARAMETER(gpt12)
+ return &MODULE_SRC.GPT12.GPT12[0].T6;
+}
+
+
+IFX_INLINE uint16 IfxGpt12_T6_getTimerValue(Ifx_GPT12 *gpt12)
+{
+ return (uint16)gpt12->T6.U;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_run(Ifx_GPT12 *gpt12, IfxGpt12_TimerRun runTimer)
+{
+ gpt12->T6CON.B.T6R = runTimer;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setCounterInputMode(Ifx_GPT12 *gpt12, IfxGpt12_CounterInputMode inputMode)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, inputMode <= IfxGpt12_CounterInputMode_bothEdgesTxIN); /* wrong selection */
+ gpt12->T6CON.B.T6I = inputMode;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setDirectionSource(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirectionSource source)
+{
+ gpt12->T6CON.B.T6UDE = source;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setEudInput(Ifx_GPT12 *gpt12, IfxGpt12_EudInput input)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
+ gpt12->PISEL.B.IST6EUD = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setInput(Ifx_GPT12 *gpt12, IfxGpt12_Input input)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, input <= 1); /* wrong selection */
+ gpt12->PISEL.B.IST6IN = input;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setMode(Ifx_GPT12 *gpt12, IfxGpt12_Mode mode)
+{
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode <= IfxGpt12_Mode_highGatedTimer); /* wrong selection */
+ gpt12->T6CON.B.T6M = mode;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setReloadMode(Ifx_GPT12 *gpt12, IfxGpt12_TimerReloadMode mode)
+{
+ gpt12->T6CON.B.T6SR = mode;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setTimerDirection(Ifx_GPT12 *gpt12, IfxGpt12_TimerDirection direction)
+{
+ gpt12->T6CON.B.T6UD = direction;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setTimerPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_TimerInputPrescaler inputPrescaler)
+{
+ gpt12->T6CON.B.T6I = inputPrescaler;
+}
+
+
+IFX_INLINE void IfxGpt12_T6_setTimerValue(Ifx_GPT12 *gpt12, uint16 value)
+{
+ gpt12->T6.U = value;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGpt12_getCaptureSrc(Ifx_GPT12 *gpt12)
+{
+ IFX_UNUSED_PARAMETER(gpt12)
+ return &MODULE_SRC.GPT12.GPT12[0].CIRQ;
+}
+
+
+IFX_INLINE float32 IfxGpt12_getModuleFrequency(Ifx_GPT12 *gpt12)
+{
+ IFX_UNUSED_PARAMETER(gpt12)
+ return IfxScuCcu_getSpbFrequency();
+}
+
+
+IFX_INLINE void IfxGpt12_initCapInPin(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode)
+{
+ IfxPort_setPinModeInput(capIn->pin.port, capIn->pin.pinIndex, inputMode);
+ IfxGpt12_setCaptureInput(capIn->module, (IfxGpt12_CaptureInput)capIn->select);
+}
+
+
+IFX_INLINE void IfxGpt12_initCapInPinWithPadLevel(const IfxGpt12_TxIn_In *capIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(capIn->pin.port, capIn->pin.pinIndex, inputMode);
+ IfxPort_setPinPadDriver(capIn->pin.port, capIn->pin.pinIndex, padDriver);
+ IfxGpt12_setCaptureInput(capIn->module, (IfxGpt12_CaptureInput)capIn->select);
+}
+
+
+IFX_INLINE void IfxGpt12_initTxOutPin(const IfxGpt12_TxOut_Out *txOut, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(txOut->pin.port, txOut->pin.pinIndex, outputMode, txOut->select);
+ IfxPort_setPinPadDriver(txOut->pin.port, txOut->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE boolean IfxGpt12_isModuleSuspended(Ifx_GPT12 *gpt12)
+{
+ Ifx_GPT12_OCS ocs;
+
+ // read the status
+ ocs.U = gpt12->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxGpt12_setCaptureInput(Ifx_GPT12 *gpt12, IfxGpt12_CaptureInput input)
+{
+ gpt12->PISEL.B.ISCAPIN = input;
+}
+
+
+IFX_INLINE void IfxGpt12_setCaptureReload(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode value)
+{
+ gpt12->CAPREL.B.CAPREL = value;
+}
+
+
+IFX_INLINE void IfxGpt12_setGpt1BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt1BlockPrescaler bps1)
+{
+ gpt12->T3CON.B.BPS1 = bps1;
+}
+
+
+IFX_INLINE void IfxGpt12_setGpt2BlockPrescaler(Ifx_GPT12 *gpt12, IfxGpt12_Gpt2BlockPrescaler bps2)
+{
+ gpt12->T6CON.B.BPS2 = bps2;
+}
+
+
+IFX_INLINE void IfxGpt12_setSleepMode(Ifx_GPT12 *gpt12, IfxGpt12_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ gpt12->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxGpt12_setSuspendMode(Ifx_GPT12 *gpt12, IfxGpt12_SuspendMode mode)
+{
+ Ifx_GPT12_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ gpt12->OCS.U = ocs.U;
+}
+
+
+#endif /* IFXGPT12_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.c
new file mode 100644
index 0000000..a4dc88e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.c
@@ -0,0 +1,161 @@
+/**
+ * \file IfxGtm_Atom_Pwm.c
+ * \brief GTM PWM details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Atom_Pwm.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config)
+{
+ boolean result = TRUE;
+
+ driver->gtm = config->gtm;
+ driver->atomIndex = config->atom;
+
+ Ifx_GTM_ATOM *atomSFR = &config->gtm->ATOM[config->atom];
+ driver->atom = atomSFR;
+ driver->atomChannel = config->atomChannel;
+ Ifx_GTM_ATOM_AGC *agc = &atomSFR->AGC;
+ driver->agc = agc;
+
+ /* Initialize the timer part */
+ if (config->synchronousUpdateEnabled == 1)
+ {
+ IfxGtm_Atom_Agc_enableChannelUpdate(agc, config->atomChannel, TRUE);
+ }
+
+ IfxGtm_Atom_Agc_setChannelForceUpdate(agc, config->atomChannel, TRUE, TRUE);
+
+ IfxGtm_Atom_Ch_setSignalLevel(atomSFR, config->atomChannel, config->signalLevel);
+
+ IfxGtm_Atom_Ch_setMode(atomSFR, config->atomChannel, config->mode);
+
+ if (config->pin.outputPin != NULL_PTR)
+ {
+ IfxGtm_PinMap_setAtomTout(config->pin.outputPin, config->pin.outputMode, config->pin.padDriver);
+ }
+
+ // enable and initialise interrupts if chosen
+ if ((config->interrupt.ccu0Enabled == 1) || (config->interrupt.ccu1Enabled == 1))
+ {
+ IfxGtm_Atom_Ch_setNotification(atomSFR, config->atomChannel, config->interrupt.mode, config->interrupt.ccu0Enabled, config->interrupt.ccu1Enabled);
+
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxGtm_Atom_Ch_getSrcPointer(config->gtm, config->atom, config->atomChannel);
+ IfxSrc_init(src, config->interrupt.isrProvider, config->interrupt.isrPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (config->synchronousUpdateEnabled == 1)
+ {
+ IfxGtm_Atom_Ch_setCompareZeroShadow(atomSFR, config->atomChannel, config->period);
+ IfxGtm_Atom_Ch_setCompareOneShadow(atomSFR, config->atomChannel, config->dutyCycle);
+ }
+ else
+ {
+ IfxGtm_Atom_Ch_setCompareZero(atomSFR, config->atomChannel, config->period);
+ IfxGtm_Atom_Ch_setCompareOne(atomSFR, config->atomChannel, config->dutyCycle);
+ }
+
+ IfxGtm_Atom_Agc_enableChannel(agc, config->atomChannel, TRUE, FALSE);
+ IfxGtm_Atom_Agc_enableChannelOutput(agc, config->atomChannel, TRUE, FALSE);
+
+ if (config->immediateStartEnabled == TRUE)
+ {
+ IfxGtm_Atom_Agc_trigger(driver->agc);
+ }
+
+ return result;
+}
+
+
+void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm)
+{
+ config->gtm = gtm;
+ config->atom = IfxGtm_Atom_0;
+ config->atomChannel = IfxGtm_Atom_Ch_0;
+ config->period = 20;
+ config->dutyCycle = 10;
+ config->signalLevel = Ifx_ActiveState_high;
+ config->mode = IfxGtm_Atom_Mode_outputPwm;
+ config->oneShotModeEnabled = FALSE;
+ config->synchronousUpdateEnabled = FALSE;
+ config->immediateStartEnabled = TRUE;
+ config->interrupt.ccu0Enabled = FALSE;
+ config->interrupt.ccu1Enabled = FALSE;
+ config->interrupt.mode = IfxGtm_IrqMode_pulseNotify;
+ config->interrupt.isrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.isrPriority = 0;
+ config->pin.outputPin = NULL_PTR;
+ config->pin.outputMode = IfxPort_OutputMode_pushPull;
+ config->pin.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+}
+
+
+void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
+{
+ /* Enable channel if not enabled already */
+ IfxGtm_Atom_Agc_enableChannel(driver->agc, driver->atomChannel, TRUE, immediate);
+ IfxGtm_Atom_Agc_enableChannelOutput(driver->agc, driver->atomChannel, TRUE, immediate);
+
+ /* Trigger the start now */
+ IfxGtm_Atom_Agc_trigger(driver->agc);
+}
+
+
+void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate)
+{
+ /* Disable channels */
+ IfxGtm_Atom_Agc_enableChannel(driver->agc, driver->atomChannel, FALSE, immediate);
+ IfxGtm_Atom_Agc_enableChannelOutput(driver->agc, driver->atomChannel, FALSE, immediate);
+
+ /* Trigger the stop now */
+ IfxGtm_Atom_Agc_trigger(driver->agc);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h
new file mode 100644
index 0000000..9b857ae
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.h
@@ -0,0 +1,230 @@
+/**
+ * \file IfxGtm_Atom_Pwm.h
+ * \brief GTM PWM details
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Atom_Pwm_Usage How to use the GTM ATOM PWM Driver
+ * \ingroup IfxLld_Gtm_Atom_Pwm
+ *
+ * This interface allows to generate simple PWM signal on a ATOM out put and can generate interrupts if enabled.
+ * this output can also be routed to port pin if required.
+ *
+ * \section Preparation Preparation
+ * \subsection Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection Variables Variables
+ * define global variables if necessary
+ *
+ * \code
+ * Ifx_GTM *gtm = &MODULE_GTM;
+ * #define ATOM0_CH0_PRIO 20
+ * \endcode
+ *
+ * \subsection Interrupts Interrupts
+ * define Interrupts if needed
+ *
+ * \code
+ * IFX_INTERRUPT(ATOM0Ch0_ISR, 0, ATOM0_CH0_PRIO)
+ * {}
+ * \endcode
+ *
+ * \subsection Initialization Initialization
+ *
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler (ATOM0Ch0_ISR, ATOM0_CH0_PRIO);
+ *
+ * // enable GTM clock
+ * {
+ * float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
+ * // Enables the GTM
+ * IfxGtm_enable(gtm);
+ * // Set the global clock frequency to the max
+ * IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
+ * // Set the CMU CLK0
+ * IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
+ * // FXCLK: used by TOM and CLK0: used by ATOM
+ * IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
+ * }
+ *
+ * // initialise ATOM
+ * IfxGtm_Atom_Pwm_Config atomConfig; \\configuration structure
+ * IfxGtm_Atom_Pwm_Driver atomHandle; \\ handle
+ *
+ * IfxGtm_Atom_Pwm_initConfig(&atomConfig, gtm);
+ *
+ * atomConfig.tomChannel = IfxGtm_Tom_Ch_0;
+ * atomConfig.period = 20;
+ * atomConfig.dutyCycle = 10;
+ * atomConfig.interrupt.ccu0Enabled = TRUE;
+ * atomConfig.interrupt.isrPriority = ATOM0_CH0_PRIO;
+ * atomConfig.pin.outputPin = &IfxGtm_ATOM0_0_TOUT0_P02_0_OUT;
+ *
+ * IfxGtm_Atom_Pwm_init(&atomHandle, &atomConfig);
+ * \endcode
+ *
+ * ATOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.
+ *
+ * \defgroup IfxLld_Gtm_Atom_Pwm ATOM PWM Interface Driver
+ * \ingroup IfxLld_Gtm_Atom
+ * \defgroup IfxLld_Gtm_Atom_Pwm_DataStructures ATOM PWM DataStructures
+ * \ingroup IfxLld_Gtm_Atom_Pwm
+ * \defgroup IfxLld_Gtm_Atom_Pwm_Pwm_Functions Pwm Functions
+ * \ingroup IfxLld_Gtm_Atom_Pwm
+ */
+
+#ifndef IFXGTM_ATOM_PWM_H
+#define IFXGTM_ATOM_PWM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_PinMap/IfxGtm_PinMap.h"
+#include "Gtm/Std/IfxGtm_Atom.h"
+#include "Gtm/Std/IfxGtm_Cmu.h"
+#include "Cpu/Std/IfxCpu.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Atom_Pwm_DataStructures
+ * \{ */
+/** \brief configuration structure for interrupts
+ */
+typedef struct
+{
+ boolean ccu0Enabled; /**< \brief Enable/Disable choice for CCU0 trigger interrupt */
+ boolean ccu1Enabled; /**< \brief Enable/Disable choice for CCU1 trigger interrupt */
+ IfxGtm_IrqMode mode; /**< \brief IRQ mode of interrupt */
+ IfxSrc_Tos isrProvider; /**< \brief Type of Service for Ccu0/1 interrupt */
+ Ifx_Priority isrPriority; /**< \brief Priority for Ccu0/1 interrupt */
+} IfxGtm_Atom_Pwm_Interrupt;
+
+/** \brief configuration structure for output pin
+ */
+typedef struct
+{
+ IfxGtm_Atom_ToutMap *outputPin; /**< \brief output pin */
+ IfxPort_OutputMode outputMode; /**< \brief Output mode */
+ IfxPort_PadDriver padDriver; /**< \brief Pad driver */
+} IfxGtm_Atom_Pwm_pin;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Atom_Pwm_DataStructures
+ * \{ */
+/** \brief Configuration structure
+ */
+typedef struct
+{
+ Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
+ IfxGtm_Atom atom; /**< \brief Index of the ATOM object used */
+ IfxGtm_Atom_Ch atomChannel; /**< \brief ATOM channel used for the timer */
+ IfxGtm_Atom_Mode mode; /**< \brief Atom mode of operation */
+ uint32 period; /**< \brief Period */
+ uint32 dutyCycle; /**< \brief Duty Cycle */
+ Ifx_ActiveState signalLevel; /**< \brief Signal Level */
+ boolean oneShotModeEnabled; /**< \brief Enable/Disable the one shot mode */
+ boolean synchronousUpdateEnabled; /**< \brief Synchronous or Asynchronous update */
+ boolean immediateStartEnabled; /**< \brief enable immediate start after init */
+ IfxGtm_Atom_Pwm_Interrupt interrupt; /**< \brief configuration structure for interrupt */
+ IfxGtm_Atom_Pwm_pin pin; /**< \brief configuration structure for output pin */
+} IfxGtm_Atom_Pwm_Config;
+
+/** \brief Driver Handle
+ */
+typedef struct
+{
+ Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
+ IfxGtm_Atom atomIndex; /**< \brief Index of the ATOM object used */
+ IfxGtm_Atom_Ch atomChannel; /**< \brief ATOM channel used for the timer */
+ Ifx_GTM_ATOM *atom; /**< \brief Pointer to the ATOM object */
+ Ifx_GTM_ATOM_AGC *agc; /**< \brief Pointer to the AGC object */
+ IfxGtm_Atom_Mode mode; /**< \brief Atom mode of operation */
+} IfxGtm_Atom_Pwm_Driver;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Atom_Pwm_Pwm_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the Timer object
+ * \param driver ATOM Handle
+ * \param config Configuration structure for ATOM
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Pwm_init(IfxGtm_Atom_Pwm_Driver *driver, const IfxGtm_Atom_Pwm_Config *config);
+
+/** \brief Initializes the configuration structure to default
+ * \param config This parameter is Initialised by the function
+ * \param gtm Pointer to GTM module
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Pwm_initConfig(IfxGtm_Atom_Pwm_Config *config, Ifx_GTM *gtm);
+
+/** \brief Starts the PWM generation from the configured channel.
+ * \param driver handle for the PWM device.
+ * \param immediate immediate start or not.
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Pwm_start(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate);
+
+/** \brief Stops the PWM generation from the configured channel
+ * \param driver handle for the PWM device
+ * \param immediate immediate start or not.
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Pwm_stop(IfxGtm_Atom_Pwm_Driver *driver, boolean immediate);
+
+/** \} */
+
+#endif /* IFXGTM_ATOM_PWM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/PwmHl/IfxGtm_Atom_PwmHl.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/PwmHl/IfxGtm_Atom_PwmHl.c
new file mode 100644
index 0000000..29bcf00
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/PwmHl/IfxGtm_Atom_PwmHl.c
@@ -0,0 +1,746 @@
+/**
+ * \file IfxGtm_Atom_PwmHl.c
+ * \brief GTM PWMHL details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Atom_PwmHl.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "stddef.h"
+#include "string.h"
+
+/** \addtogroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions
+ * \{ */
+/******************************************************************************/
+/*------------------------Inline Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Inverts the active state
+ * \param activeState Active state
+ * \return State
+ */
+IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState);
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Sets switched to OFF
+ * \param driver GTM ATOM PWM driver
+ * \param tOn ON time
+ * \param shift Shift value in ticks
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
+
+/** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
+ * \param driver GTM ATOM PWM driver
+ * \param tOn T on
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+/** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
+ * \param driver GTM ATOM PWM driver
+ * \param tOn T on
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+/** \brief Set the outputs to inactive
+ * \param driver GTM ATOM PWM driver
+ * \param tOn T on
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+/** \brief Update Pulse
+ * \param driver GTM ATOM PWM driver
+ * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
+
+/** \brief Set Pulse to OFF
+ * \param driver GTM ATOM PWM driver
+ * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
+
+/** \brief Update Shift Center Aligned
+ * \param driver GTM ATOM PWM driver
+ * \param tOn ON time
+ * \param shift Shift value in ticks
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
+
+/** \} */
+
+/******************************************************************************/
+/*------------------------Private Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_STATIC IFX_CONST IfxGtm_Atom_PwmHl_Mode IfxGtm_Atom_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
+ {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
+ {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Atom_PwmHl_updateCenterAligned, &IfxGtm_Atom_PwmHl_updateShiftCenterAligned, &IfxGtm_Atom_PwmHl_updatePulse },
+ {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
+ {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Atom_PwmHl_updateEdgeAligned, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulse },
+ {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Atom_PwmHl_updateOff, &IfxGtm_Atom_PwmHl_updateAndShiftOff, &IfxGtm_Atom_PwmHl_updatePulseOff},
+};
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE Ifx_ActiveState IfxGtm_Atom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
+{
+ return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
+}
+
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver)
+{
+ return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
+}
+
+
+float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver)
+{
+ return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
+}
+
+
+Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver)
+{
+ return driver->base.mode;
+}
+
+
+boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config)
+{
+ boolean result = TRUE;
+ uint16 channelMask;
+ uint16 channelsMask = 0;
+ uint32 channelIndex;
+
+ IfxGtm_Atom_Timer *timer = config->timer;
+
+ driver->base.mode = Ifx_Pwm_Mode_init;
+ driver->timer = timer;
+ driver->base.setMode = 0;
+ driver->base.inverted = FALSE;
+ driver->base.ccxActiveState = config->base.ccxActiveState;
+ driver->base.coutxActiveState = config->base.coutxActiveState;
+ driver->base.channelCount = config->base.channelCount;
+
+ IfxGtm_Atom_PwmHl_setDeadtime(driver, config->base.deadtime);
+ IfxGtm_Atom_PwmHl_setMinPulse(driver, config->base.minPulse);
+
+ driver->atom = &(timer->gtm->ATOM[config->atom]);
+ /* Only one AGC */
+ driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS);
+
+ IfxGtm_Cmu_Clk clock = IfxGtm_Atom_Ch_getClockSource(timer->atom, timer->timerChannel);
+
+ for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
+ {
+ IfxGtm_Atom_Ch channel;
+ /* CCX */
+ channel = config->ccx[channelIndex]->channel;
+ driver->ccx[channelIndex] = channel;
+ channelMask = 1 << channel;
+ channelsMask |= channelMask;
+
+ /* Initialize the timer part */
+ IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
+ driver->base.inverted ? config->base.ccxActiveState :
+ IfxGtm_Atom_PwmHl_invertActiveState(config->base.ccxActiveState),
+ IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
+
+ /* Initialize the port */
+ if (config->initPins == TRUE)
+ {
+ IfxGtm_PinMap_setAtomTout(config->ccx[channelIndex],
+ config->base.outputMode, config->base.outputDriver);
+ }
+
+ /* COUTX */
+ channel = config->coutx[channelIndex]->channel;
+ driver->coutx[channelIndex] = channel;
+ channelMask = 1 << channel;
+ channelsMask |= channelMask;
+
+ /* Initialize the timer part */
+ IfxGtm_Atom_Ch_configurePwmMode(driver->atom, channel, clock,
+ driver->base.inverted ?
+ IfxGtm_Atom_PwmHl_invertActiveState(config->base.coutxActiveState)
+ : config->base.coutxActiveState,
+ IfxGtm_Atom_Ch_ResetEvent_onTrigger, IfxGtm_Atom_Ch_OutputTrigger_forward);
+
+ /* Initialize the port */
+ if (config->initPins == TRUE)
+ {
+ IfxGtm_PinMap_setAtomTout(config->coutx[channelIndex],
+ config->base.outputMode, config->base.outputDriver);
+ }
+ }
+
+ IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, channelsMask, 0, TRUE);
+ IfxGtm_Atom_Agc_enableChannels(driver->agc, channelsMask, 0, TRUE);
+
+ IfxGtm_Atom_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
+
+ Ifx_TimerValue tOn[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS] = {0};
+ IfxGtm_Atom_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
+
+ /* Transfer the shadow registers */
+ IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, channelsMask, 0, 0, 0);
+ IfxGtm_Atom_Agc_trigger(driver->agc);
+ IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, channelsMask, 0, 0);
+
+ /* Enable timer to update the channels */
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ IfxGtm_Atom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
+ IfxGtm_Atom_Timer_addToChannelMask(timer, driver->coutx[channelIndex]);
+ }
+
+ return result;
+}
+
+
+void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config)
+{
+ IfxStdIf_PwmHl_initConfig(&config->base);
+ config->timer = NULL_PTR;
+ config->atom = IfxGtm_Atom_0;
+ config->ccx = NULL_PTR;
+ config->coutx = NULL_PTR;
+ config->initPins = TRUE;
+}
+
+
+boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime)
+{
+ Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
+ driver->base.deadtime = value;
+
+ return TRUE;
+}
+
+
+boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse)
+{
+ Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
+
+ driver->base.minPulse = value + driver->base.deadtime;
+ driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
+
+ return TRUE;
+}
+
+
+boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode)
+{
+ boolean result = TRUE;
+ IfxGtm_Atom_PwmHl_Base *base = &driver->base;
+
+ if (base->mode != mode)
+ {
+ if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Atom_PwmHl_modes[mode].update == NULL_PTR))
+ {
+ mode = Ifx_Pwm_Mode_off;
+ result = FALSE;
+ }
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_Atom_PwmHl_modes[mode].mode);
+
+ base->mode = mode;
+ driver->update = IfxGtm_Atom_PwmHl_modes[mode].update;
+ driver->updateAndShift = IfxGtm_Atom_PwmHl_modes[mode].updateAndShift;
+ driver->updatePulse = IfxGtm_Atom_PwmHl_modes[mode].updatePulse;
+
+ if (base->mode != Ifx_Pwm_Mode_off)
+ {
+ base->inverted = IfxGtm_Atom_PwmHl_modes[mode].inverted;
+ }
+ else
+ { /* Keep previous inverted for off mode */
+ }
+
+ if (base->inverted)
+ {
+ driver->ccxTemp = driver->coutx;
+ driver->coutxTemp = driver->ccx;
+ }
+ else
+ {
+ driver->ccxTemp = driver->ccx;
+ driver->coutxTemp = driver->coutx;
+ }
+
+ { /* Workaround to enable the signal inversion required for center aligned inverted
+ * and right aligned modes */
+ /** \note Changing signal level may produce short circuit at the power stage,
+ * in which case the inverter must be disable during this action.*/
+
+ /* Ifx_Pwm_Mode_centerAligned and Ifx_Pwm_Mode_LeftAligned use inverted=FALSE */
+ /* Ifx_Pwm_Mode_centerAlignedInverted and Ifx_Pwm_Mode_RightAligned use inverted=TRUE */
+ uint32 channelIndex;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ IfxGtm_Atom_Ch channel;
+
+ channel = driver->ccx[channelIndex];
+ IfxGtm_Atom_Ch_setSignalLevel(driver->atom, channel, base->inverted
+ ? base->ccxActiveState
+ : IfxGtm_Atom_PwmHl_invertActiveState(driver->base.ccxActiveState));
+
+ channel = driver->coutx[channelIndex];
+ IfxGtm_Atom_Ch_setSignalLevel(driver->atom, channel, base->inverted
+ ? IfxGtm_Atom_PwmHl_invertActiveState(driver->base.coutxActiveState)
+ : base->coutxActiveState);
+ }
+ }
+ }
+
+ return result;
+}
+
+
+void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
+{
+ driver->update(driver, tOn);
+}
+
+
+void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
+{
+ driver->updateAndShift(driver, tOn, shift);
+}
+
+
+void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
+{
+ driver->updatePulse(driver, tOn, offset);
+}
+
+
+void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
+{
+ /* Dummy Function for StdIf Compile*/
+ IFX_UNUSED_PARAMETER(driver)
+ IFX_UNUSED_PARAMETER(activeCh)
+ IFX_UNUSED_PARAMETER(stuckSt)
+}
+
+
+boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver)
+{
+ /* Ensure the stdif is reset to zeros */
+ memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
+
+ /* *INDENT-OFF* Note: this file was indented manually by the author. */
+ /* Set the API link */
+ stdif->driver = driver;
+ stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Atom_PwmHl_setDeadtime;
+ stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Atom_PwmHl_getDeadtime;
+ stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Atom_PwmHl_setMinPulse;
+ stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Atom_PwmHl_getMinPulse;
+ stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Atom_PwmHl_getMode;
+ stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Atom_PwmHl_setMode;
+ stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Atom_PwmHl_setOnTime;
+ stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Atom_PwmHl_setOnTimeAndShift;
+ stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Atom_PwmHl_setPulse;
+ stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Atom_PwmHl_setupChannels;
+ IfxGtm_Atom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
+ /* *INDENT-ON* */
+
+ return TRUE;
+}
+
+
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateAndShiftOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
+{
+ IfxGtm_Atom_PwmHl_updateOff(driver, NULL_PTR);
+ IFX_UNUSED_PARAMETER(tOn)
+ IFX_UNUSED_PARAMETER(shift)
+}
+
+
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
+{
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+ Ifx_TimerValue deadtime = driver->base.deadtime;
+
+ period = driver->timer->base.period;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue cm0, cm1;
+ x = tOn[channelIndex];
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if ((x < driver->base.minPulse) || (x <= deadtime))
+ { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
+ x = 0;
+ }
+ else if (x > driver->base.maxPulse)
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
+ period + 1 /* No compare event */,
+ 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
+ period + 2 /* No compare event, issues has been seen with +1 */,
+ 2 /* 1st compare event (issue: expected to be 1)*/);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ cm1 = (period - x) / 2; // CM1
+ cm0 = (period + x) / 2; // CM0
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ }
+}
+
+
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateEdgeAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
+{
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+ Ifx_TimerValue deadtime = driver->base.deadtime;
+
+ period = driver->timer->base.period;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue cm0, cm1;
+ x = tOn[channelIndex];
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if ((x < driver->base.minPulse) || (x <= deadtime))
+ { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
+ x = 0;
+ }
+ else if (x > driver->base.maxPulse)
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
+ period + 1 /* No compare event */,
+ 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
+ period + 2 /* No compare event, issues has been seen with +1 */,
+ 2 /* 1st compare event (issue: expected to be 1)*/);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ cm1 = 2; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
+ cm0 = x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ }
+}
+
+
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateOff(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn)
+{
+ IFX_UNUSED_PARAMETER(tOn)
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+ period = driver->timer->base.period;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
+ 2 /* 1 will keep the previous level*/, period + 2);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], period + 1, 2);
+ }
+}
+
+
+IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
+{
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+
+ period = driver->timer->base.period;
+
+ /* Top channels */
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue o;
+ Ifx_TimerValue cm0, cm1;
+
+ x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
+ o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if ((x < driver->base.minPulse) || (o > period))
+ {
+ x = 0;
+ }
+ else if ((x > driver->base.maxPulse) || (o + x > period))
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
+ period + 1 /* No compare event */,
+ 2 /* 1st compare event (issue: expected to be 1)*/);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
+ cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
+ }
+ }
+
+ /* Bottom channels */
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue o;
+ Ifx_TimerValue cm0, cm1;
+
+ x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex + driver->base.channelCount]);
+ o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex + driver->base.channelCount]);
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if (x < driver->base.minPulse)
+ {
+ x = 0;
+ }
+ else if (x > driver->base.maxPulse)
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
+ period + 2 /* No compare event, issues has been seen with +1 */,
+ 2 /* 1st compare event (issue: expected to be 1)*/);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
+ cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0, cm1);
+ }
+ }
+}
+
+
+IFX_STATIC void IfxGtm_Atom_PwmHl_updatePulseOff(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset)
+{
+ IFX_UNUSED_PARAMETER(tOn)
+ IFX_UNUSED_PARAMETER(offset)
+
+ IfxGtm_Atom_PwmHl_updateOff(driver, NULL_PTR);
+}
+
+
+IFX_STATIC void IfxGtm_Atom_PwmHl_updateShiftCenterAligned(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
+{
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+ Ifx_TimerValue deadtime = driver->base.deadtime;
+
+ period = driver->timer->base.period;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue s; /* Shift value */
+ Ifx_TimerValue cm0, cm1;
+ x = tOn[channelIndex];
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if ((x < driver->base.minPulse) || (x <= deadtime))
+ { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
+ x = 0;
+ }
+ else if (x > driver->base.maxPulse)
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex],
+ period + 1 /* No compare event */,
+ 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex],
+ period + 2 /* No compare event, issues has been seen with +1 */,
+ 2 /* 1st compare event (issue: expected to be 1)*/);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ s = shift[channelIndex];
+
+ if (s > 0)
+ {
+ s = __minX(s, (period - x) / 2 - 1);
+ }
+ else
+ {
+ s = __maxX(s, (x - period) / 2 + 1);
+ }
+
+ cm1 = s + (period - x) / 2; // CM1
+ cm0 = s + (period + x) / 2; // CM0
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
+ IfxGtm_Atom_Ch_setCompareShadow(driver->atom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/PwmHl/IfxGtm_Atom_PwmHl.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/PwmHl/IfxGtm_Atom_PwmHl.h
new file mode 100644
index 0000000..08fe816
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/PwmHl/IfxGtm_Atom_PwmHl.h
@@ -0,0 +1,308 @@
+/**
+ * \file IfxGtm_Atom_PwmHl.h
+ * \brief GTM PWMHL details
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Atom_PwmHl_Usage How to use the GTM ATOM PWM Driver
+ * \ingroup IfxLld_Gtm_Atom_PwmHl
+ *
+ * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
+ * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
+ *
+ * \section Specific Specific implementation
+ * Implementation is similar to \ref IfxLld_Gtm_Tom_PwmHl
+ *
+ * \todo add documentation
+ *
+ * For a detailed configuration of the microcontroller, see \ref IfxGtm_Atom_PwmHl_init().
+ *
+ * \section Example Usage example
+ * Initialisation is done by, e.g:
+ * \code
+ * IfxGtm_Atom_PwmHl_Config driverConfig;
+ * IfxGtm_Atom_PwmHl driverData;
+ * IfxStdIf_PwmHl pwmhl;
+ * IfxGtm_Atom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
+ * IfxGtm_Atom_PwmHl_init(&driverData, &driverConfig);
+ * IfxGtm_Atom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
+ * \endcode
+ *
+ * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
+ * \code
+ * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
+ * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
+ *
+ * onTime[0] = 10;
+ * onTime[1] = 20;
+ * onTime[2] = 30;
+ *
+ * IfxStdIf_Timer_disableUpdate(timer);
+ * IfxStdIf_Timer_setPeriod(timer, period);
+ * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
+ * IfxStdIf_Timer_applyUpdate(timer);
+ * \endcode
+ *
+ * \defgroup IfxLld_Gtm_Atom_PwmHl ATOM PWM HL Interface Driver
+ * \ingroup IfxLld_Gtm_Atom
+ * \defgroup IfxLld_Gtm_Atom_PwmHl_Data_Structures Data Structures
+ * \ingroup IfxLld_Gtm_Atom_PwmHl
+ * \defgroup IfxLld_Gtm_Atom_PwmHl_Functions PwmHl Functions
+ * \ingroup IfxLld_Gtm_Atom_PwmHl
+ * \defgroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions PwmHl StdIf Functions
+ * \ingroup IfxLld_Gtm_Atom_PwmHl
+ */
+
+#ifndef IFXGTM_ATOM_PWMHL_H
+#define IFXGTM_ATOM_PWMHL_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "StdIf/IfxStdIf_PwmHl.h"
+#include "Gtm/Atom/Timer/IfxGtm_Atom_Timer.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
+ */
+#define IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS (8)
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+typedef struct IfxGtm_Atom_PwmHl_s IfxGtm_Atom_PwmHl;
+
+typedef void (*IfxGtm_Atom_PwmHl_Update)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+typedef void (*IfxGtm_Atom_PwmHl_UpdateShift)(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
+
+typedef void (*IfxGtm_Atom_PwmHl_UpdatePulse)(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Atom_PwmHl_Data_Structures
+ * \{ */
+/** \brief Multi-channels PWM object definition (channels only)
+ */
+typedef struct
+{
+ Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
+ Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
+ Ifx_TimerValue maxPulse; /**< \brief internal parameter */
+ Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
+ sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
+ Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
+ Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
+ boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
+ uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
+} IfxGtm_Atom_PwmHl_Base;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Atom_PwmHl_Data_Structures
+ * \{ */
+/** \brief GTM ATOM: PWM HL configuration
+ */
+typedef struct
+{
+ IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
+ IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
+ IfxGtm_Atom atom; /**< \brief ATOM unit used */
+ IFX_CONST IfxGtm_Atom_ToutMapP *ccx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
+ IFX_CONST IfxGtm_Atom_ToutMapP *coutx; /**< \brief Pointer to an array of size pwmHl.channels.channelCount containing the channels used. Channels must be adjacent channels */
+ boolean initPins; /**< \brief TRUE: Initialize pins in driver
+ * FALSE: Don't initialize pins in driver. User handles separately. */
+} IfxGtm_Atom_PwmHl_Config;
+
+/** \brief Structure for PWM configuration
+ */
+typedef struct
+{
+ Ifx_Pwm_Mode mode; /**< \brief Pwm Mode */
+ boolean inverted; /**< \brief Inverted configuration for the selected mode */
+ IfxGtm_Atom_PwmHl_Update update; /**< \brief update call back function for the selected mode */
+ IfxGtm_Atom_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
+ IfxGtm_Atom_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
+} IfxGtm_Atom_PwmHl_Mode;
+
+/** \brief GTM ATOM PWM driver
+ */
+struct IfxGtm_Atom_PwmHl_s
+{
+ IfxGtm_Atom_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
+ IfxGtm_Atom_Timer *timer; /**< \brief Pointer to the linked timer object */
+ IfxGtm_Atom_PwmHl_Update update; /**< \brief Update function for actual selected mode */
+ IfxGtm_Atom_PwmHl_UpdateShift updateAndShift; /**< \brief Update shift function for actual selected mode */
+ IfxGtm_Atom_PwmHl_UpdatePulse updatePulse; /**< \brief Update pulse function for actual selected mode */
+ Ifx_GTM_ATOM *atom; /**< \brief ATOM unit used */
+ Ifx_GTM_ATOM_AGC *agc; /**< \brief AGC unit used */
+ IfxGtm_Atom_Ch ccx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the CCCX outputs */
+ IfxGtm_Atom_Ch coutx[IFXGTM_ATOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief ATOM channels used for the OUTX outputs */
+ IfxGtm_Atom_Ch *ccxTemp; /**< \brief cached value */
+ IfxGtm_Atom_Ch *coutxTemp; /**< \brief cached value */
+};
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Atom_PwmHl_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes the timer object
+ * note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
+ * \param driver GTM ATOM PWM driver
+ * \param config GTM ATOM: PWM HL configuration
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_PwmHl_init(IfxGtm_Atom_PwmHl *driver, const IfxGtm_Atom_PwmHl_Config *config);
+
+/** \brief Initialize the configuration structure to default
+ * \param config Channel configuration. This parameter is Initialised by the function
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_PwmHl_initConfig(IfxGtm_Atom_PwmHl_Config *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Atom_PwmHl_PwmHl_StdIf_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the dead time
+ * \see IfxStdIf_PwmHl_GetDeadtime
+ * \param driver GTM ATOM PWM driver
+ * \return Dead Time
+ */
+IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getDeadtime(IfxGtm_Atom_PwmHl *driver);
+
+/** \brief Returns the minimum pulse
+ * \see IfxStdIf_PwmHl_GetMinPulse
+ * \param driver GTM ATOM PWM driver
+ * \return Min Pulse
+ */
+IFX_EXTERN float32 IfxGtm_Atom_PwmHl_getMinPulse(IfxGtm_Atom_PwmHl *driver);
+
+/** \brief Returns Pwm mode
+ * \see IfxStdIf_PwmHl_GetMode
+ * \param driver GTM ATOM PWM driver
+ * \return Pwm mode
+ */
+IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Atom_PwmHl_getMode(IfxGtm_Atom_PwmHl *driver);
+
+/** \brief Sets the dead time
+ * \see IfxStdIf_PwmHl_SetDeadtime
+ * \param driver GTM ATOM PWM driver
+ * \param deadtime Dead time value
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setDeadtime(IfxGtm_Atom_PwmHl *driver, float32 deadtime);
+
+/** \brief Sets the minimum pulse
+ * \see IfxStdIf_PwmHl_SetMinPulse
+ * \param driver GTM ATOM PWM driver
+ * \param minPulse Minimum pulse
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMinPulse(IfxGtm_Atom_PwmHl *driver, float32 minPulse);
+
+/** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
+ * \see IfxStdIf_PwmHl_SetMode
+ * \param driver GTM ATOM PWM driver
+ * \param mode Pwm mode
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_PwmHl_setMode(IfxGtm_Atom_PwmHl *driver, Ifx_Pwm_Mode mode);
+
+/** \brief Sets the ON time
+ * \see IfxStdIf_PwmHl_SetOnTime
+ * \param driver GTM ATOM PWM driver
+ * \param tOn ON time
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTime(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+/** \brief Sets the ON time and Shift
+ * \param driver GTM ATOM PWM driver
+ * \param tOn ON time
+ * \param shift Shift value in ticks
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_PwmHl_setOnTimeAndShift(IfxGtm_Atom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
+
+/** \brief Sets the ON time and offset, all switched are independent
+ * \param driver GTM ATOM PWM driver
+ * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_PwmHl_setPulse(IfxGtm_Atom_PwmHl *driver, float32 *tOn, float32 *offset);
+
+/** \brief Set up channels
+ * \see IfxStdIf_PwmHl_SetupChannels
+ * \param driver GTM ATOM PWM driver
+ * \param activeCh Active channel
+ * \param stuckSt Stuck state
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_PwmHl_setupChannels(IfxGtm_Atom_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
+
+/** \brief Initialises the statndard interface Pwm
+ * \param stdif Standard interface object, will be initialized by the function
+ * \param driver Interface driver to be used by the standard interface. must be initialised separately
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Atom_PwmHl *driver);
+
+/** \} */
+
+#endif /* IFXGTM_ATOM_PWMHL_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Timer/IfxGtm_Atom_Timer.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Timer/IfxGtm_Atom_Timer.c
new file mode 100644
index 0000000..aac26cd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Timer/IfxGtm_Atom_Timer.c
@@ -0,0 +1,393 @@
+/**
+ * \file IfxGtm_Atom_Timer.c
+ * \brief GTM TIMER details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Atom_Timer.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "IfxGtm_bf.h"
+#include "stddef.h"
+#include "string.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver)
+{
+ boolean event;
+ event = IfxGtm_Atom_Ch_isZeroNotification(driver->atom, driver->timerChannel);
+
+ if (event)
+ {
+ IfxGtm_Atom_Ch_clearZeroNotification(driver->atom, driver->timerChannel);
+ }
+ else
+ {}
+
+ return event;
+}
+
+
+boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver)
+{
+ boolean event;
+ event = IfxGtm_Atom_Ch_isOneNotification(driver->atom, driver->triggerChannel);
+
+ if (event)
+ {
+ IfxGtm_Atom_Ch_clearOneNotification(driver->atom, driver->triggerChannel);
+ }
+ else
+ {}
+
+ return event;
+}
+
+
+void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel)
+{
+ driver->channelsMask |= 1 << channel;
+ driver->agcDisableUpdate = IfxGtm_Atom_Agc_buildFeature(0, driver->channelsMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
+ driver->agcApplyUpdate = IfxGtm_Atom_Agc_buildFeature(driver->channelsMask, 0, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
+}
+
+
+void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver)
+{
+ IfxGtm_Atom_Agc_setChannelsUpdate(driver->agc, driver->agcApplyUpdate);
+}
+
+
+void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver)
+{
+ IfxGtm_Atom_Agc_setChannelsUpdate(driver->agc, driver->agcDisableUpdate);
+}
+
+
+float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver)
+{
+ return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
+}
+
+
+float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver)
+{
+ return driver->base.clockFreq;
+}
+
+
+Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver)
+{
+ return driver->offset;
+}
+
+
+Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver)
+{
+ return driver->base.period;
+}
+
+
+volatile uint32 *IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver)
+{
+ return IfxGtm_Atom_Ch_getTimerPointer(driver->atom, driver->timerChannel);
+}
+
+
+float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver)
+{
+ return 1.0 / driver->base.clockFreq;
+}
+
+
+Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver)
+{
+ return IfxGtm_Atom_Ch_getCompareOne(driver->atom, driver->triggerChannel) - 1;
+}
+
+
+volatile uint32 *IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver)
+{
+ return IfxGtm_Atom_Ch_getCompareOnePointer(driver->atom, driver->triggerChannel);
+}
+
+
+boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config)
+{
+ boolean result = TRUE;
+ IfxGtm_Atom_Timer_Base *base = &driver->base;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
+
+ driver->gtm = config->gtm;
+ driver->atomIndex = config->atom;
+ driver->atom = &config->gtm->ATOM[config->atom];
+ driver->timerChannel = config->timerChannel;
+
+ base->triggerEnabled = config->base.trigger.enabled;
+
+ if (base->triggerEnabled)
+ {
+ if (config->triggerOut != NULL_PTR)
+ {
+ driver->triggerChannel = config->triggerOut->channel;
+ }
+ else
+ {
+ result = FALSE;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result); /* triggerOut is required */
+ }
+ }
+ else
+ {
+ driver->triggerChannel = driver->timerChannel; // Set to timer channel to disable its use
+ }
+
+ driver->agc = (Ifx_GTM_ATOM_AGC *)&driver->atom->AGC.GLB_CTRL;
+
+ driver->channelsMask = 0;
+ driver->agcApplyUpdate = 0;
+ driver->agcDisableUpdate = 0;
+
+ /* Initialize the timer part */
+ IfxGtm_Atom_Ch_configurePwmMode(driver->atom, driver->timerChannel, config->clock,
+ (Ifx_ActiveState)config->base.trigger.risingEdgeAtPeriod, IfxGtm_Atom_Ch_ResetEvent_onCm0,
+ IfxGtm_Atom_Ch_OutputTrigger_generate);
+
+ IfxGtm_Atom_Timer_updateInputFrequency(driver);
+
+ if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
+ {
+ result = FALSE;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+ else
+ {}
+
+ IfxGtm_Atom_Timer_setFrequency(driver, config->base.frequency);
+ driver->offset = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / config->base.frequency * config->base.startOffset);
+
+ IfxGtm_Atom_Ch_setCounterValue(driver->atom, driver->timerChannel, driver->offset);
+
+ /* Initialize the trigger part */
+ IfxGtm_Atom_Timer_addToChannelMask(driver, driver->timerChannel);
+
+ if (base->triggerEnabled)
+ {
+ IfxGtm_Atom_Ch triggerChannel = driver->triggerChannel;
+ uint16 triggerChannelMask = 1 << triggerChannel;
+
+ IfxGtm_Atom_Ch_setSignalLevel(driver->atom, triggerChannel, config->base.trigger.risingEdgeAtPeriod ? Ifx_ActiveState_high : Ifx_ActiveState_low);
+
+ IfxGtm_Atom_Ch_setCounterValue(driver->atom, triggerChannel, driver->offset);
+
+ if (triggerChannel != driver->timerChannel)
+ {
+ IfxGtm_Atom_Ch_configurePwmMode(driver->atom, triggerChannel, config->clock,
+ (Ifx_ActiveState)config->base.trigger.risingEdgeAtPeriod, IfxGtm_Atom_Ch_ResetEvent_onTrigger,
+ IfxGtm_Atom_Ch_OutputTrigger_forward);
+ IfxGtm_Atom_Agc_enableChannels(driver->agc, triggerChannelMask, 0, FALSE);
+ IfxGtm_Atom_Timer_addToChannelMask(driver, driver->triggerChannel);
+ }
+ else
+ {}
+
+ /* Signal must go out of the GTM even if the port outpout is not enabled */
+ IfxGtm_Atom_Agc_enableChannelsOutput(driver->agc, triggerChannelMask, 0, FALSE);
+
+ if ((config->base.trigger.outputEnabled) && (config->initPins == TRUE))
+ {
+ /* Initialize the port */
+ IfxGtm_PinMap_setAtomTout(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
+ }
+ else
+ {}
+
+ IfxGtm_Atom_Timer_setTrigger(driver, config->base.trigger.triggerPoint);
+ }
+ else
+ {}
+
+ /* Interrupt configuration */
+ {
+ volatile Ifx_SRC_SRCR *src;
+ boolean timerHasIrq = config->base.isrPriority > 0;
+ boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
+
+ if (driver->triggerChannel == driver->timerChannel)
+ {
+ IfxGtm_Atom_Ch_setNotification(driver->atom, driver->timerChannel, timerHasIrq ? config->irqModeTimer : config->irqModeTrigger, timerHasIrq, triggerHasIrq);
+ src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->timerChannel);
+ IfxSrc_init(src, timerHasIrq ? config->base.isrProvider : config->base.trigger.isrProvider, timerHasIrq ? config->base.isrPriority : config->base.trigger.isrPriority);
+ IfxSrc_enable(src);
+ }
+ else
+ {
+ IfxGtm_IrqMode irqMode = IfxGtm_IrqMode_pulseNotify;
+
+ if (timerHasIrq)
+ {
+ IfxGtm_Atom_Ch_setNotification(driver->atom, driver->timerChannel, irqMode, TRUE, FALSE);
+ src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->timerChannel);
+ IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (triggerHasIrq)
+ {
+ IfxGtm_Atom_Ch_setNotification(driver->atom, driver->triggerChannel, irqMode, FALSE, TRUE);
+ src = IfxGtm_Atom_Ch_getSrcPointer(driver->gtm, config->atom, driver->triggerChannel);
+ IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
+ IfxSrc_enable(src);
+ }
+ }
+ }
+
+ /* Transfer the shadow registers */
+ IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, driver->channelsMask, 0, 0, 0);
+ IfxGtm_Atom_Agc_trigger(driver->agc);
+ IfxGtm_Atom_Agc_setChannelsForceUpdate(driver->agc, 0, driver->channelsMask, 0, 0);
+
+ return result;
+}
+
+
+void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm)
+{
+ IfxStdIf_Timer_initConfig(&config->base);
+ config->gtm = gtm;
+ config->atom = IfxGtm_Atom_0;
+ config->timerChannel = IfxGtm_Atom_Ch_0;
+ config->triggerOut = NULL_PTR;
+ config->clock = IfxGtm_Cmu_Clk_0;
+ config->base.countDir = IfxStdIf_Timer_CountDir_up;
+ config->irqModeTimer = IfxGtm_IrqMode_level;
+ config->irqModeTrigger = IfxGtm_IrqMode_level;
+ config->initPins = TRUE;
+}
+
+
+void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver)
+{
+ IfxGtm_Atom_Agc_enableChannels(driver->agc, driver->channelsMask, 0, TRUE);
+}
+
+
+boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency)
+{
+ Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
+
+ return IfxGtm_Atom_Timer_setPeriod(driver, period);
+}
+
+
+boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period)
+{
+ driver->base.period = period;
+ IfxGtm_Atom_Ch_setCompareZeroShadow(driver->atom, driver->timerChannel, period);
+
+ if (driver->triggerChannel != driver->timerChannel)
+ {
+ IfxGtm_Atom_Ch_setCompareZeroShadow(driver->atom, driver->triggerChannel, period);
+ }
+
+ return TRUE;
+}
+
+
+void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled)
+{
+ IfxGtm_Atom_Ch_setOneShotMode(driver->atom, driver->timerChannel, enabled);
+}
+
+
+void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint)
+{
+ IfxGtm_Atom_Ch_setCompareOneShadow(driver->atom, driver->triggerChannel, triggerPoint + 1);
+}
+
+
+boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver)
+{
+ /* Ensure the stdif is reset to zeros */
+ memset(stdif, 0, sizeof(IfxStdIf_Timer));
+
+ /* *INDENT-OFF* Note: this file was indented manually by the author. */
+ /* Set the API link */
+ stdif->driver = driver;
+ stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxGtm_Atom_Timer_getFrequency;
+ stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxGtm_Atom_Timer_getPeriod;
+ stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxGtm_Atom_Timer_getResolution;
+ stdif->getTrigger =(IfxStdIf_Timer_GetTrigger )&IfxGtm_Atom_Timer_getTrigger;
+ stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxGtm_Atom_Timer_setFrequency;
+ stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxGtm_Atom_Timer_updateInputFrequency;
+ stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxGtm_Atom_Timer_applyUpdate;
+ stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxGtm_Atom_Timer_disableUpdate;
+ stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxGtm_Atom_Timer_getInputFrequency;
+ stdif->run =(IfxStdIf_Timer_Run )&IfxGtm_Atom_Timer_run;
+ stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxGtm_Atom_Timer_setPeriod;
+ stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxGtm_Atom_Timer_setSingleMode;
+ stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxGtm_Atom_Timer_setTrigger;
+ stdif->stop =(IfxStdIf_Timer_Stop )&IfxGtm_Atom_Timer_stop;
+ stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxGtm_Atom_Timer_acknowledgeTimerIrq;
+ stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxGtm_Atom_Timer_acknowledgeTriggerIrq;
+ /* *INDENT-ON* */
+
+ return TRUE;
+}
+
+
+void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver)
+{
+ IfxGtm_Atom_Agc_enableChannels(driver->agc, 0, driver->channelsMask, TRUE);
+}
+
+
+void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver)
+{
+ driver->base.clockFreq = IfxGtm_Atom_Ch_getClockFrequency(driver->gtm, driver->atom, driver->timerChannel);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Timer/IfxGtm_Atom_Timer.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Timer/IfxGtm_Atom_Timer.h
new file mode 100644
index 0000000..153c2ed
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Timer/IfxGtm_Atom_Timer.h
@@ -0,0 +1,335 @@
+/**
+ * \file IfxGtm_Atom_Timer.h
+ * \brief GTM TIMER details
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Atom_Timer_Usage How to use the GTM ATOM Timer Driver
+ * \ingroup IfxLld_Gtm_Atom_Timer
+ *
+ * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
+ * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
+ *
+ * \section Specific Specific implementation
+ * Implementation is similar to \ref IfxLld_Gtm_Tom_Timer.
+ *
+ * \todo Add documentation
+ *
+ * For a detailed configuration of the microcontroller, see \ref IfxGtm_Atom_Timer_init().
+ *
+ * \section Example Usage example
+ * Initialisation:
+ * \code
+ * IfxGtm_Atom_Timer_Config driverConfig;
+ * IfxGtm_Atom_Timer driverData;
+ * IfxStdIf_Timer timer;
+ * IfxGtm_Atom_Timer_initConfig(&driverConfig, &MODULE_GTM);
+ * IfxGtm_Atom_Timer_init (&driverData, &driverConfig);
+ * boolean IfxGtm_Atom_Timer_stdIfTimerInit(&timer, &driverData);
+ * \endcode
+ *
+ * During run-time, \ref library_srvsw_stdif_timer "the interface functions" should be used:
+ * \code
+ * IfxStdIf_Timer_run(timer);
+ * IfxStdIf_Timer_disableUpdate(timer);
+ * IfxStdIf_Timer_setPeriod(timer, period);
+ * IfxStdIf_Timer_applyUpdate(timer);
+ * \endcode
+ *
+ * \defgroup IfxLld_Gtm_Atom_Timer ATOM Timer Interface Driver
+ * \ingroup IfxLld_Gtm_Atom
+ * \defgroup IfxLld_Gtm_Atom_Timer_Timer_StdIf_Functions Timer StdIf Functions
+ * \ingroup IfxLld_Gtm_Atom_Timer
+ * \defgroup IfxLld_Gtm_Atom_Timer_Timer_Functions Timer Functions
+ * \ingroup IfxLld_Gtm_Atom_Timer
+ * \defgroup IfxLld_Gtm_Atom_Timer_Data_Structures Data Structures
+ * \ingroup IfxLld_Gtm_Atom_Timer
+ */
+
+#ifndef IFXGTM_ATOM_TIMER_H
+#define IFXGTM_ATOM_TIMER_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_PinMap/IfxGtm_PinMap.h"
+#include "Gtm/Std/IfxGtm_Atom.h"
+#include "Gtm/Std/IfxGtm_Cmu.h"
+#include "StdIf/IfxStdIf_Timer.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Atom_Timer_Data_Structures
+ * \{ */
+/** \brief Structure for the timer base
+ */
+typedef struct
+{
+ Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
+ boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
+ float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
+ IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
+} IfxGtm_Atom_Timer_Base;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Atom_Timer_Data_Structures
+ * \{ */
+/** \brief TOM Timer interface
+ */
+typedef struct
+{
+ IfxGtm_Atom_Timer_Base base; /**< \brief Timer base structure */
+ Ifx_GTM *gtm; /**< \brief GTM module used for the timer functionality */
+ Ifx_GTM_ATOM *atom; /**< \brief ATOM used for the timer functionality */
+ Ifx_GTM_ATOM_AGC *agc; /**< \brief Pointer to the AGC object */
+ IfxGtm_Atom atomIndex; /**< \brief Enum for ATOM objects */
+ IfxGtm_Atom_Ch timerChannel; /**< \brief ATOM channel used for the timer */
+ IfxGtm_Atom_Ch triggerChannel; /**< \brief ATOM channel used for the trigger, if identical to the timerChannel, the trigger interrupt is having the same interrupt level as the timer interrupt */
+ uint16 channelsMask; /**< \brief Mask for channels to be modified together */
+ Ifx_TimerValue offset; /**< \brief Timer initial offset in ticks */
+ uint32 agcDisableUpdate; /**< \brief AGC value for disable update */
+ uint32 agcApplyUpdate; /**< \brief AGC value for apply update */
+} IfxGtm_Atom_Timer;
+
+/** \brief Configuration structure for TOM Timer
+ */
+typedef struct
+{
+ IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
+ Ifx_GTM *gtm; /**< \brief GTM used for the timer functionality */
+ IfxGtm_Atom atom; /**< \brief ATOM used for the timer functionality */
+ IfxGtm_Atom_Ch timerChannel; /**< \brief ATOM channel used for the timer */
+ IfxGtm_Atom_ToutMap *triggerOut; /**< \brief ATOM channel used for the trigger output, can be identical to the timer channe */
+ IfxGtm_Cmu_Clk clock; /**< \brief Timer input clock */
+ IfxGtm_IrqMode irqModeTimer; /**< \brief Interrupt mode for the timer */
+ IfxGtm_IrqMode irqModeTrigger; /**< \brief Interrupt mode for the trigger */
+ boolean initPins; /**< \brief TRUE: Initialize pins in driver
+ * FALSE: Don't initialize pins in driver : user handles separately */
+} IfxGtm_Atom_Timer_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Atom_Timer_Timer_StdIf_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the timer event
+ * \see IfxStdIf_Timer_AckTimerIrq
+ * \param driver ATOM Timer interface Handle
+ * \return Timer event
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTimerIrq(IfxGtm_Atom_Timer *driver);
+
+/** \brief Returns the trigger event
+ * \see IfxStdIf_Timer_AckTriggerIrq
+ * \param driver ATOM Timer interface Handle
+ * \return Trigger event
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Timer_acknowledgeTriggerIrq(IfxGtm_Atom_Timer *driver);
+
+/** \brief Add a channel to the channel mask
+ * Channels present in the mask are started, stopped, updated at the same time as the timer:
+ * IfxGtm_Atom_Timer_applyUpdate, IfxGtm_Atom_Timer_disableUpdate, IfxGtm_Atom_Timer_stop, IfxGtm_Atom_Timer_run
+ * \param driver ATOM Timer interface Handle
+ * \param channel Channel to ba added to the mask
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_addToChannelMask(IfxGtm_Atom_Timer *driver, IfxGtm_Atom_Ch channel);
+
+/** \brief Enables the transfer of the shadow registers
+ * \see IfxStdIf_Timer_ApplyUpdate
+ * \param driver ATOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_applyUpdate(IfxGtm_Atom_Timer *driver);
+
+/** \brief Disables the upadte
+ * \see IfxStdIf_Timer_DisableUpdate
+ * \param driver ATOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_disableUpdate(IfxGtm_Atom_Timer *driver);
+
+/** \brief Returns the frequency
+ * \see IfxStdIf_Timer_GetFrequency
+ * \param driver ATOM Timer interface Handle
+ * \return Frequency
+ */
+IFX_EXTERN float32 IfxGtm_Atom_Timer_getFrequency(IfxGtm_Atom_Timer *driver);
+
+/** \brief Returns the Input frequncy
+ * \see IfxStdIf_Timer_GetInputFrequency
+ * \param driver ATOM Timer interface Handle
+ * \return Frequency
+ */
+IFX_EXTERN float32 IfxGtm_Atom_Timer_getInputFrequency(IfxGtm_Atom_Timer *driver);
+
+/** \brief Returns the period of the timer
+ * \see IfxStdIf_Timer_GetPeriod
+ * \param driver ATOM Timer interface Handle
+ * \return Period
+ */
+IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getPeriod(IfxGtm_Atom_Timer *driver);
+
+/** \brief Returns the resolution
+ * \see IfxStdIf_Timer_GetResolution
+ * \param driver ATOM Timer interface Handle
+ * \return Resolution
+ */
+IFX_EXTERN float32 IfxGtm_Atom_Timer_getResolution(IfxGtm_Atom_Timer *driver);
+
+/** \brief Returns the trigger point
+ * \param driver ATOM Timer interface Handle
+ * \return Trigger point
+ */
+IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getTrigger(IfxGtm_Atom_Timer *driver);
+
+/** \brief Runs the timer
+ * \see IfxStdIf_Timer_Run
+ * \param driver ATOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_run(IfxGtm_Atom_Timer *driver);
+
+/** \brief Sets the frequency
+ * \see IfxStdIf_Timer_SetFrequency
+ * \param driver ATOM Timer interface Handle
+ * \param frequency Frequency
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Timer_setFrequency(IfxGtm_Atom_Timer *driver, float32 frequency);
+
+/** \brief Sets the period for the timer
+ * \see IfxStdIf_Timer_SetPeriod
+ * \param driver ATOM Timer interface Handle
+ * \param period Period value
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Timer_setPeriod(IfxGtm_Atom_Timer *driver, Ifx_TimerValue period);
+
+/** \brief Sets the single shot mode of the timer
+ * \see IfxStdIf_Timer_SetSingleMode
+ * \param driver ATOM Timer interface Handle
+ * \param enabled If TRUE, sets the single shot mode
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_setSingleMode(IfxGtm_Atom_Timer *driver, boolean enabled);
+
+/** \brief Sets the trigger
+ * \see IfxStdIf_Timer_SetTrigger
+ * \param driver ATOM Timer interface Handle
+ * \param triggerPoint Trigger point value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_setTrigger(IfxGtm_Atom_Timer *driver, Ifx_TimerValue triggerPoint);
+
+/** \brief Initializes the standard interface timer
+ * \param stdif Standard interface object, will be initialized by the function
+ * \param driver Interface driver to be used by the standard interface. must be initialised separately
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Atom_Timer *driver);
+
+/** \brief Stops the timer
+ * \see IfxStdIf_Timer_Stop
+ * \param driver ATOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_stop(IfxGtm_Atom_Timer *driver);
+
+/** \brief Updates the input frequency
+ * \see IfxStdIf_Timer_UpdateInputFrequency
+ * \param driver ATOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_updateInputFrequency(IfxGtm_Atom_Timer *driver);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Atom_Timer_Timer_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the initial timer offset in ticks
+ * \see IfxStdIf_Timer_GetOffset
+ * \param driver ATOM Timer interface Handle
+ * \return Returns the initial timer offset in ticks
+ */
+IFX_EXTERN Ifx_TimerValue IfxGtm_Atom_Timer_getOffset(IfxGtm_Atom_Timer *driver);
+
+/** \brief Returns the pointer to timer channel
+ * \param driver ATOM Timer interface Handle
+ * \return Pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Atom_Timer_getPointer(IfxGtm_Atom_Timer *driver);
+
+/** \brief Returns the pointer to trigger channel
+ * \param driver ATOM Timer interface Handle
+ * \return Pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Atom_Timer_getTriggerPointer(IfxGtm_Atom_Timer *driver);
+
+/** \brief Initialises the timer object
+ * \param driver ATOM Timer interface Handle
+ * \param config Configuration structure for ATOM Timer
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Timer_init(IfxGtm_Atom_Timer *driver, const IfxGtm_Atom_Timer_Config *config);
+
+/** \brief Initializes the configuration structure to default
+ * \param config Configuration structure for ATOM Timer
+ * \param gtm Pointer to GTM module
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Timer_initConfig(IfxGtm_Atom_Timer_Config *config, Ifx_GTM *gtm);
+
+/** \} */
+
+#endif /* IFXGTM_ATOM_TIMER_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm.c
new file mode 100644
index 0000000..d8c38e2
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm.c
@@ -0,0 +1,80 @@
+/**
+ * \file IfxGtm.c
+ * \brief GTM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Scu/Std/IfxScuCcu.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxGtm_disable(Ifx_GTM *gtm)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(psw);
+ gtm->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(psw);
+}
+
+
+void IfxGtm_enable(Ifx_GTM *gtm)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(psw);
+ gtm->CLC.B.DISR = 0;
+ IfxScuWdt_setCpuEndinit(psw);
+}
+
+
+float32 IfxGtm_getSysClkFrequency(void)
+{
+ return IfxScuCcu_getGtmFrequency();
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm.h
new file mode 100644
index 0000000..d24eb2e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm.h
@@ -0,0 +1,177 @@
+/**
+ * \file IfxGtm.h
+ * \brief GTM basic functionality
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Std_Basic_Functions Basic Functions
+ * \ingroup IfxLld_Gtm_Std
+ * \defgroup IfxLld_Gtm_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Gtm_Std
+ */
+
+#ifndef IFXGTM_H
+#define IFXGTM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxGtm_cfg.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Std_Enumerations
+ * \{ */
+/** \brief Enum for GTM interrupt modes
+ */
+typedef enum
+{
+ IfxGtm_IrqMode_level = 0,
+ IfxGtm_IrqMode_pulse = 1,
+ IfxGtm_IrqMode_pulseNotify = 2,
+ IfxGtm_IrqMode_singlePulse = 3
+} IfxGtm_IrqMode;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxGtm_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxGtm_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxGtm_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxGtm_SuspendMode;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Std_Basic_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returs the status of module enabled or disabled
+ * \param gtm Pointer to GTM module
+ * \return status: TRUE/FALSE
+ */
+IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param gtm Pointer to GTM module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param gtm Pointer to GTM module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disables the module
+ * \param gtm Pointer to GTM module
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_disable(Ifx_GTM *gtm);
+
+/** \brief Enables the module
+ * \param gtm Pointer to GTM module
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_enable(Ifx_GTM *gtm);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief returns the GTM SYSCLK frequency.
+ * Refer to the Clock distribution for details on GTM SYS CLK.
+ * \return sysFreq
+ */
+IFX_EXTERN float32 IfxGtm_getSysClkFrequency(void);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE boolean IfxGtm_isEnabled(Ifx_GTM *gtm)
+{
+ return gtm->CLC.B.DISS == 0;
+}
+
+
+IFX_INLINE boolean IfxGtm_isModuleSuspended(Ifx_GTM *gtm)
+{
+ Ifx_GTM_OCS ocs;
+
+ // read the status
+ ocs.U = gtm->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxGtm_setSuspendMode(Ifx_GTM *gtm, IfxGtm_SuspendMode mode)
+{
+ Ifx_GTM_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+
+ gtm->OCS.U = ocs.U;
+}
+
+
+#endif /* IFXGTM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Atom.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Atom.c
new file mode 100644
index 0000000..b94809f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Atom.c
@@ -0,0 +1,567 @@
+/**
+ * \file IfxGtm_Atom.c
+ * \brief GTM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Atom.h"
+#include "IfxGtm_bf.h"
+
+/******************************************************************************/
+/*----------------------------------Macros------------------------------------*/
+/******************************************************************************/
+
+/** \brief Number of channels per ATOM AGC
+ */
+#define IFXGTM_ATOM_NUM_AGC_CHANNELS (8)
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
+{
+ uint8 i;
+ uint32 reg = 0;
+ uint32 mask = enableMask | (disableMask << 16);
+
+ for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
+ {
+ /* Bitfield length is 2 bits */
+ uint8 shift = (i * 2) + bitfieldOffset;
+
+ if (mask & 0x1)
+ {
+ reg |= IfxGtm_FeatureControl_enable << shift;
+ }
+
+ if (mask & 0x10000)
+ {
+ reg |= IfxGtm_FeatureControl_disable << shift;
+ }
+
+ mask = mask >> 1;
+ }
+
+ return reg;
+}
+
+
+uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset)
+{
+ uint32 reg = 0;
+
+ /* Bitfield length is 2 bits */
+ uint8 shift = (((uint8)channel % 8) * 2) + bitfieldOffset;
+
+ if (enabled == 1)
+ {
+ reg = IfxGtm_FeatureControl_enable << shift;
+ }
+ else
+ {
+ reg = IfxGtm_FeatureControl_disable << shift;
+ }
+
+ return reg;
+}
+
+
+void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
+{
+ uint32 value;
+
+ value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
+
+ if (immediate)
+ {
+ agc->ENDIS_CTRL.U = value;
+ agc->ENDIS_STAT.U = value;
+ }
+ else
+ {
+ agc->ENDIS_CTRL.U = value;
+ }
+}
+
+
+void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate)
+{
+ uint32 value;
+
+ value = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
+
+ if (immediate)
+ {
+ agc->OUTEN_CTRL.U = value;
+ agc->OUTEN_STAT.U = value;
+ }
+ else
+ {
+ agc->OUTEN_CTRL.U = value;
+ }
+}
+
+
+void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled)
+{
+ agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
+}
+
+
+void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
+{
+ uint32 value;
+
+ value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_ENDIS_CTRL_ENDIS_CTRL0_OFF);
+
+ if (immediate)
+ {
+ agc->ENDIS_CTRL.U = value;
+ agc->ENDIS_STAT.U = value;
+ }
+ else
+ {
+ agc->ENDIS_CTRL.U = value;
+ }
+}
+
+
+void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate)
+{
+ uint32 value;
+
+ value = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_OUTEN_CTRL_OUTEN_CTRL0_OFF);
+
+ if (immediate)
+ {
+ agc->OUTEN_CTRL.U = value;
+ agc->OUTEN_STAT.U = value;
+ }
+ else
+ {
+ agc->OUTEN_CTRL.U = value;
+ }
+}
+
+
+void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
+{
+ agc->INT_TRIG.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_INT_TRIG_INT_TRIG0_OFF);
+}
+
+
+void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask)
+{
+ agc->GLB_CTRL.U = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_GLB_CTRL_UPEN_CTRL0_OFF);
+}
+
+
+void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled)
+{
+ agc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
+}
+
+
+void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask)
+{
+ uint8 i;
+ uint32 reg = 0;
+
+ for (i = 0; i < IFXGTM_ATOM_NUM_AGC_CHANNELS; i++)
+ {
+ if (resetMask & 0x1)
+ {
+ reg |= 1 << i;
+ }
+
+ resetMask = resetMask >> 1;
+ }
+
+ agc->GLB_CTRL.U = reg << IFX_GTM_ATOM_AGC_GLB_CTRL_RST_CH0_OFF;
+}
+
+
+void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled)
+{
+ uint32 regEnable, regReset;
+
+ regEnable = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, enabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
+ regReset = IfxGtm_Atom_Agc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
+
+ agc->FUPD_CTRL.U = regEnable | (regReset << 16);
+}
+
+
+void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
+{
+ uint32 regEnable, regReset;
+
+ regEnable = IfxGtm_Atom_Agc_buildFeature(enableMask, disableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_FUPD_CTRL0_OFF);
+ regReset = IfxGtm_Atom_Agc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_ATOM_AGC_FUPD_CTRL_RSTCN0_CH0_OFF);
+ agc->FUPD_CTRL.U = regEnable | regReset;
+}
+
+
+void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value)
+{
+ Ifx_GTM_ATOM_AGC_ACT_TB act_tb;
+
+ act_tb.U = agc->ACT_TB.U;
+ act_tb.B.TBU_SEL = base;
+ act_tb.B.ACT_TB = value;
+ agc->ACT_TB.U = act_tb.U;
+}
+
+
+void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc)
+{
+ agc->GLB_CTRL.U = 1 << IFX_GTM_ATOM_AGC_GLB_CTRL_HOST_TRIG_OFF;
+}
+
+
+void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->IRQ_NOTIFY.B.CCU1TC = 1;
+}
+
+
+void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->IRQ_NOTIFY.B.CCU0TC = 1;
+}
+
+
+void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+ Ifx_GTM_ATOM_CH_CTRL ctrl;
+
+ ctrl.U = 0;
+ ctrl.B.MODE = IfxGtm_Atom_Mode_outputPwm;
+
+ ctrl.B.CLK_SRC = clock;
+
+ ctrl.B.RST_CCU0 = resetEvent;
+ ctrl.B.SL = (activeState == Ifx_ActiveState_high ? 1 : 0);
+ ctrl.B.TRIGOUT = trigger;
+
+ atomCh->CTRL.U = ctrl.U;
+}
+
+
+float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ IfxGtm_Cmu_Clk clock;
+
+ clock = IfxGtm_Atom_Ch_getClockSource(atom, channel);
+
+ return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
+}
+
+
+IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ IfxGtm_Cmu_Clk clock;
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+ clock = (IfxGtm_Cmu_Clk)atomCh->CTRL.B.CLK_SRC;
+
+ return clock;
+}
+
+
+uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ return atomCh->CM1.U;
+}
+
+
+volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ return (volatile uint32 *)&atomCh->CM1;
+}
+
+
+uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ return atomCh->CM0.U;
+}
+
+
+volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ return (volatile uint32 *)&atomCh->CM0;
+}
+
+
+boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ boolean result;
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ result = atomCh->STAT.B.OL == 1;
+
+ return result;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel)
+{
+ IFX_UNUSED_PARAMETER(gtm)
+ return &MODULE_SRC.GTM.GTM[0].ATOM[atom][channel / 2];
+}
+
+
+volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ return (volatile uint32 *)((uint32)&(atom->CH0.CN0.U) + channel * (offsetof(Ifx_GTM_ATOM, CH1) - offsetof(Ifx_GTM_ATOM, CH0)));
+}
+
+
+boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ boolean result;
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+ result = atomCh->IRQ_NOTIFY.B.CCU1TC != 0;
+ return result;
+}
+
+
+boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ boolean result;
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+ result = atomCh->IRQ_NOTIFY.B.CCU0TC != 0;
+ return result;
+}
+
+
+void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->IRQ_FORCINT.B.TRG_CCU1TC = 1;
+}
+
+
+void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->IRQ_FORCINT.B.TRG_CCU0TC = 1;
+}
+
+
+void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CTRL.B.CLK_SRC = clock;
+}
+
+
+void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
+ atomCh->CM1.U = compareOne;
+}
+
+
+void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CTRL.B.MODE = mode;
+}
+
+
+void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ Ifx_GTM_ATOM_CH_IRQ_EN en;
+ en.U = atomCh->IRQ_EN.U;
+
+ /* Disable all interrupts of the interrupt set to change mode */
+ atomCh->IRQ_EN.U = IFX_ZEROS;
+ atomCh->IRQ_MODE.B.IRQ_MODE = mode;
+ atomCh->IRQ_EN.U = en.U; /* Set the values back */
+
+ en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
+ en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
+ atomCh->IRQ_EN.U = en.U;
+}
+
+
+void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CTRL.B.OSM = enabled ? 1 : 0;
+}
+
+
+void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CTRL.B.RST_CCU0 = event;
+}
+
+
+void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
+}
+
+
+void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CTRL.B.TRIGOUT = trigger;
+}
+
+
+void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->CTRL.B.ARU_EN = enabled;
+}
+
+
+uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ return atomCh->CN0.U;
+}
+
+
+void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->SOMC.B.ACB42 = control;
+}
+
+
+void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->SOMC.B.ACB10 = ctrl;
+}
+
+
+void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+ atomCh->RDADDR.B.RDADDR0 = address;
+}
+
+
+void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+ atomCh->RDADDR.B.RDADDR1 = address;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Atom.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Atom.h
new file mode 100644
index 0000000..a2209f8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Atom.h
@@ -0,0 +1,609 @@
+/**
+ * \file IfxGtm_Atom.h
+ * \brief GTM basic functionality
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ *
+ * \defgroup IfxLld_Gtm_Std_Atom Atom Basic Functionality
+ * \ingroup IfxLld_Gtm_Std
+ * \defgroup IfxLld_Gtm_Std_Atom_Enumerations ATOM Enumerations
+ * \ingroup IfxLld_Gtm_Std_Atom
+ * \defgroup IfxLld_Gtm_Std_Atom_Channel_Functions ATOM Channel Functions
+ * \ingroup IfxLld_Gtm_Std_Atom
+ * \defgroup IfxLld_Gtm_Std_Atom_AGC_Functions ATOM AGC Functions
+ * \ingroup IfxLld_Gtm_Std_Atom
+ */
+
+#ifndef IFXGTM_ATOM_H
+#define IFXGTM_ATOM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxGtm_cfg.h"
+#include "IfxGtm.h"
+#include "IfxGtm_Tbu.h"
+#include "Src/Std/IfxSrc.h"
+#include "IfxGtm_Cmu.h"
+#include "stddef.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Std_Atom_Enumerations
+ * \{ */
+/** \brief Reset source for channel counter CN0
+ */
+typedef enum
+{
+ IfxGtm_Atom_Ch_OutputTrigger_forward = 0, /**< \brief Forward the trigger from the previous channel */
+ IfxGtm_Atom_Ch_OutputTrigger_generate = 1 /**< \brief Generate the trigger from the current channel */
+} IfxGtm_Atom_Ch_OutputTrigger;
+
+/** \brief Reset event for channel counter CN0
+ */
+typedef enum
+{
+ IfxGtm_Atom_Ch_ResetEvent_onCm0 = 0,
+ IfxGtm_Atom_Ch_ResetEvent_onTrigger = 1
+} IfxGtm_Atom_Ch_ResetEvent;
+
+/** \brief Enum for ATOM mode
+ */
+typedef enum
+{
+ IfxGtm_Atom_Mode_outputImmediate,
+ IfxGtm_Atom_Mode_outputCompare,
+ IfxGtm_Atom_Mode_outputPwm,
+ IfxGtm_Atom_Mode_outputSerial
+} IfxGtm_Atom_Mode;
+
+/** \} */
+
+/** \brief Enable/disable of Aru Input to ATOM channel
+ */
+typedef enum
+{
+ IfxGtm_Atom_AruInput_disabled = 0, /**< \brief ARU input disabled */
+ IfxGtm_Atom_AruInput_enabled = 1 /**< \brief ARU input enabled */
+} IfxGtm_Atom_AruInput;
+
+/** \brief Match Compare control modes
+ */
+typedef enum
+{
+ IfxGtm_Atom_SomcControl_compareBoth = 0, /**< \brief compare CCU0 and CCU1 in parallel */
+ IfxGtm_Atom_SomcControl_compareBoth1 = 1, /**< \brief compare CCU0 and CCU1 in parallel */
+ IfxGtm_Atom_SomcControl_ccu0Ts0 = 2, /**< \brief compare CCU0 against TS0 */
+ IfxGtm_Atom_SomcControl_ccu1Ts12 = 3, /**< \brief compare only CCU1 against TS1 or TS2 */
+ IfxGtm_Atom_SomcControl_ccu0ccu1Ts0 = 4, /**< \brief compare CCU0 then CCU1, use TS0 */
+ IfxGtm_Atom_SomcControl_ccu0ccu1Ts12 = 5, /**< \brief compare CCU0 then CCU1. Use TS1 or TS2 */
+ IfxGtm_Atom_SomcControl_ccu0Ts0ccu1Ts12 = 6, /**< \brief compare CCU0 with TS0 then CCU1 with TS1 or TS2 */
+ IfxGtm_Atom_SomcControl_cancelCompare = 7 /**< \brief Cancel pending compare events */
+} IfxGtm_Atom_SomcControl;
+
+/** \brief SOMC signal level Control
+ */
+typedef enum
+{
+ IfxGtm_Atom_SomcSignalLevelControl_noChange = 0, /**< \brief no signal level change at output */
+ IfxGtm_Atom_SomcSignalLevelControl_sl0out1 = 1, /**< \brief SL= 0 -> Out=1; SL=1->Out=0 */
+ IfxGtm_Atom_SomcSignalLevelControl_sl0out0 = 2, /**< \brief SL=0->Out=0; SL=1->Out=1 */
+ IfxGtm_Atom_SomcSignalLevelControl_toggle = 3 /**< \brief toggle the output signal level */
+} IfxGtm_Atom_SomcSignalLevelControl;
+
+/** \addtogroup IfxLld_Gtm_Std_Atom_Channel_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the base addredd of selected Atom channel
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return Pointer to channel base address
+ */
+IFX_INLINE Ifx_GTM_ATOM_CH *IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Sets the compare 0 and 1 shadow values
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param shadowZero Compare zero shadow value
+ * \param shadowOne Compare one shadow value
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the channel One notification
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_clearOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Clears the channel Zero notification
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_clearZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param clock Clock source
+ * \param activeState Active State
+ * \param resetEvent Channel reset event
+ * \param trigger Channel trigger output mode
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_configurePwmMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock, Ifx_ActiveState activeState, IfxGtm_Atom_Ch_ResetEvent resetEvent, IfxGtm_Atom_Ch_OutputTrigger trigger);
+
+/** \brief Returns the ATOM channel input clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return ATOM channel input clock frequency in Hz
+ */
+IFX_EXTERN float32 IfxGtm_Atom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns the channel clock source
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return The clock source
+ */
+IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Atom_Ch_getClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns the compare one value
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return compare one value
+ */
+IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns the compare one pointer
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return compare one pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getCompareOnePointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns the compare zero value
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return compare zero value
+ */
+IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns the compare zero pointer
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return compare zero pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getCompareZeroPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Gets the ATOM output level
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return TRUE the output is high, FALSE the output is low
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Ch_getOutputLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns a pointer to the ATOM channel SRC
+ * \param gtm Pointer to GTM module
+ * \param atom Specifies the atom object
+ * \param channel Channel index
+ * \return Pointer to the TOM channel SRC
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGtm_Atom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Atom atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns the Timer pointer
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return Timer pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Atom_Ch_getTimerPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns the status of channel One notification
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return Status of channel One notification
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Ch_isOneNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Returns the status of channel Zero notification
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return Status of channel Zero notification
+ */
+IFX_EXTERN boolean IfxGtm_Atom_Ch_isZeroNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Raises the interrupt for Compare 1
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Raises the interrupt for Compare 0
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_raiseInterruptZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \brief Sets the channel clock source
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param clock Channel clock source
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setClockSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Cmu_Clk clock);
+
+/** \brief Sets the compare 0 and 1 values
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param compareZero Compare zero value
+ * \param compareOne Compare one value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setCompare(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero, uint32 compareOne);
+
+/** \brief Sets the compare 1 value
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param compareOne Compare one value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOne(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareOne);
+
+/** \brief Sets the compare 1 shadow value
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param shadowOne Compare one shadow value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setCompareOneShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowOne);
+
+/** \brief Sets the compare 0 value
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param compareZero Compare zero value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZero(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 compareZero);
+
+/** \brief Sets the compare 0 shadow value
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param shadowZero Compare zero shadow value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setCompareZeroShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero);
+
+/** \brief Sets the counter value
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param value Counter value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 value);
+
+/** \brief set the Atom operating mode
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param mode Atom operating mode
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Mode mode);
+
+/** \brief Sets the channel notification
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param mode Interrupt mode
+ * \param interruptOnCompareZero If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
+ * \param interruptOnCompareOne If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setNotification(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne);
+
+/** \brief Enable/disable the one shot mode
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param enabled If TRUE, the feature is enabled, else disabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setOneShotMode(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled);
+
+/** \brief Sets the channel clock source either from local or from previous channel
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param event Channel reset event
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setResetSource(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_ResetEvent event);
+
+/** \brief Sets the signal level
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param activeState Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setSignalLevel(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, Ifx_ActiveState activeState);
+
+/** \brief Sets the channel trigger output
+ * \param atom Pointer to the ATOM object
+ * \param channel Channel index
+ * \param trigger Channel trigger output mode
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setTriggerOutput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_Ch_OutputTrigger trigger);
+
+/** \brief Get the counter value
+ * \param atom pointer to the ATOM instance
+ * \param channel channel index of the ATOM
+ * \return counter value
+ */
+IFX_EXTERN uint32 IfxGtm_Atom_Ch_getCounterValue(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Std_Atom_AGC_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Sets the channels for update (UPEN)
+ * \param agc Pointer to the AGC object
+ * \param value value for the channel enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Builds the register value for the feature enable/disable
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param bitfieldOffset Offset of the channel 0 bitfield in the register
+ * \return The register value
+ */
+IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
+
+/** \brief Builds the register value for the feature enable/disable for a single channel
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \param bitfieldOffset Offset of the channel 0 bitfield in the register
+ * \return The register value
+ */
+IFX_EXTERN uint32 IfxGtm_Atom_Agc_buildFeatureForChannel(IfxGtm_Atom_Ch channel, boolean enabled, uint8 bitfieldOffset);
+
+/** \brief Enable/disable one channel (ENDIS)
+ * \param agc Pointer to the AGC object
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \param immediate If TRUE, the action is done immediately else, the action is done on AGC trigger (CTRL_TRIG)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_enableChannel(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate);
+
+/** \brief Enable/disable one channel output (OUTEN)
+ * \param agc Pointer to the AGC object
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelOutput(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean immediate);
+
+/** \brief Enable/disable one channel for update (UPEN)
+ * \param agc Pointer to the AGC object
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled);
+
+/** \brief Enable/disable one or more channels (ENDIS)
+ * \param agc Pointer to the AGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_enableChannels(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate);
+
+/** \brief Enable/disable one or more channels output (OUTEN)
+ * \param agc Pointer to the TGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsOutput(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, boolean immediate);
+
+/** \brief Enable/disable the TGC channels trigger
+ * \param agc Pointer to the AGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsTrigger(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask);
+
+/** \brief Enable/disable one or more channels for update (UPEN)
+ * \param agc Pointer to the AGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_enableChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask);
+
+/** \brief Enable/disable the time base trigger
+ * \param agc Pointer to the AGC object
+ * \param enabled If TRUE, the trigger is enabled else disabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_enableTimeTrigger(Ifx_GTM_ATOM_AGC *agc, boolean enabled);
+
+/** \brief Reset one or more channels
+ * \param agc Pointer to the AGC object
+ * \param resetMask Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_resetChannels(Ifx_GTM_ATOM_AGC *agc, uint32 resetMask);
+
+/** \brief Enable/disable one channel for update (FUPD)
+ * \param agc Pointer to the AGC object
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \param resetEnabled Enable/ Disable reset choise of the feature
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_setChannelForceUpdate(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Atom_Ch channel, boolean enabled, boolean resetEnabled);
+
+/** \brief Enable/disable one or more channels for the force update feature (FUPD)
+ * \param agc Pointer to the AGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param resetEnableMask Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
+ * \param resetDisableMask Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_setChannelsForceUpdate(Ifx_GTM_ATOM_AGC *agc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask);
+
+/** \brief Sets the trigger time base and time base value
+ * \param agc Pointer to the AGC object
+ * \param base Time base used for comparison
+ * \param value Compare value that raise the trigger
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_setTimeTrigger(Ifx_GTM_ATOM_AGC *agc, IfxGtm_Tbu_Ts base, uint32 value);
+
+/** \brief Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
+ * \param agc Pointer to the AGC object
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Agc_trigger(Ifx_GTM_ATOM_AGC *agc);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief enable/disable ARU input for the ATOM channel specified.
+ * \param atom pointer to the ATOM instance
+ * \param channel index of ATOM channel
+ * \param enabled ARU enable status
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setAruInput(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, boolean enabled);
+
+/** \brief sets the SOMC control bits for the specified ATOM channel
+ * \param atom pointer to ATOM instance
+ * \param channel ATOM channel index
+ * \param control SOMC control mode enum
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setSomcControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcControl control);
+
+/** \brief sets the SL control for SOMC mode.
+ * \param atom pointer to the ATOM instance
+ * \param channel index of ATOM channel
+ * \param ctrl SIgnal level control
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setSomcSignalLevelControl(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, IfxGtm_Atom_SomcSignalLevelControl ctrl);
+
+/** \brief set the ARU read address 0
+ * \param atom pointer to ATOM instance
+ * \param channel ATOM channel index
+ * \param address ARU read address 0
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress0(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address);
+
+/** \brief set the ARU read address 1
+ * \param atom pointer to ATOM instance
+ * \param channel ATOM channel index
+ * \param address ARU read address 1
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Atom_Ch_setAruReadAddress1(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 address);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE Ifx_GTM_ATOM_CH *IfxGtm_Atom_Ch_getChannelPointer(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel)
+{
+ return (Ifx_GTM_ATOM_CH *)((uint32)&atom->CH0.RDADDR.U + 0x80 * channel);
+}
+
+
+IFX_INLINE void IfxGtm_Atom_Ch_setCompareShadow(Ifx_GTM_ATOM *atom, IfxGtm_Atom_Ch channel, uint32 shadowZero, uint32 shadowOne)
+{
+ Ifx_GTM_ATOM_CH *atomCh = IfxGtm_Atom_Ch_getChannelPointer(atom, channel);
+
+ atomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
+ atomCh->SR1.U = shadowOne;
+}
+
+
+IFX_INLINE void IfxGtm_Atom_Agc_setChannelsUpdate(Ifx_GTM_ATOM_AGC *agc, uint32 value)
+{
+ agc->GLB_CTRL.U = value;
+}
+
+
+#endif /* IFXGTM_ATOM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Cmu.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Cmu.c
new file mode 100644
index 0000000..968d79c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Cmu.c
@@ -0,0 +1,424 @@
+/**
+ * \file IfxGtm_Cmu.c
+ * \brief GTM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Cmu.h"
+#include "IfxGtm_Dpll.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "math.h"
+#include "IfxGtm_bf.h"
+#include "IfxGtm.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask)
+{
+ gtm->CMU.CLK_EN.U = clkMask;
+}
+
+
+float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled)
+{
+ float32 frequency;
+
+ if ((IfxGtm_Cmu_isClkClockEnabled(gtm, clkIndex) != FALSE) || (assumeEnabled != FALSE))
+ {
+ switch (clkIndex)
+ {
+ case IfxGtm_Cmu_Clk_0:
+ case IfxGtm_Cmu_Clk_1:
+ case IfxGtm_Cmu_Clk_2:
+ case IfxGtm_Cmu_Clk_3:
+ case IfxGtm_Cmu_Clk_4:
+ case IfxGtm_Cmu_Clk_5:
+ frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK0_5[clkIndex].CTRL.B.CLK_CNT + 1);
+ break;
+ case IfxGtm_Cmu_Clk_6:
+
+ if (gtm->CMU.CLK_6.CTRL.B.CLK6_SEL == 0)
+ {
+ frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK_6.CTRL.B.CLK_CNT + 1);
+ }
+ else
+ {
+ frequency = IfxGtm_Dpll_getSubIncFrequency(gtm, IfxGtm_Dpll_SubInc_2);
+ }
+
+ break;
+ case IfxGtm_Cmu_Clk_7:
+
+ if (gtm->CMU.CLK_7.CTRL.B.CLK7_SEL == 0)
+ {
+ frequency = IfxGtm_Cmu_getGclkFrequency(gtm) / (gtm->CMU.CLK_7.CTRL.B.CLK_CNT + 1);
+ }
+ else
+ {
+ frequency = IfxGtm_Dpll_getSubIncFrequency(gtm, IfxGtm_Dpll_SubInc_1);
+ }
+
+ break;
+ default:
+ frequency = 0.0;
+ break;
+ }
+ }
+ else
+ {
+ frequency = 0.0;
+ }
+
+ return frequency;
+}
+
+
+float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled)
+{
+ float32 frequency;
+
+ if (IfxGtm_Cmu_isEclkClockEnabled(gtm, clkIndex) || (assumeEnabled != FALSE))
+ {
+ float32 Z = gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM;
+ float32 N = gtm->CMU.ECLK[clkIndex].DEN.B.ECLK_DEN;
+ float32 multiplier = N / Z / 2;
+ frequency = IfxGtm_Cmu_getGclkFrequency(gtm) * multiplier;
+ }
+ else
+ {
+ frequency = 0.0;
+ }
+
+ return frequency;
+}
+
+
+float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled)
+{
+ float32 frequency;
+ uint8 fxSelect;
+
+ if (IfxGtm_Cmu_isFxClockEnabled(gtm) || (assumeEnabled != FALSE))
+ {
+ fxSelect = gtm->CMU.FXCLK.CTRL.B.FXCLK_SEL;
+
+ if (fxSelect == 0)
+ {
+ frequency = IfxGtm_Cmu_getGclkFrequency(gtm);
+ }
+ else if (fxSelect <= 6)
+ {
+ frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_5, assumeEnabled);
+ }
+ else if (fxSelect == 7)
+ {
+ frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_6, assumeEnabled);
+ }
+ else if (fxSelect == 8)
+ {
+ frequency = IfxGtm_Cmu_getClkFrequency(gtm, IfxGtm_Cmu_Clk_7, assumeEnabled);
+ }
+ else
+ {
+ frequency = IfxGtm_Cmu_getGclkFrequency(gtm);
+ }
+
+ switch (clkIndex)
+ {
+ case IfxGtm_Cmu_Fxclk_0:
+ frequency = frequency / 1;
+ break;
+ case IfxGtm_Cmu_Fxclk_1:
+ frequency = frequency / 16;
+ break;
+ case IfxGtm_Cmu_Fxclk_2:
+ frequency = frequency / 256;
+ break;
+ case IfxGtm_Cmu_Fxclk_3:
+ frequency = frequency / 4096;
+ break;
+ case IfxGtm_Cmu_Fxclk_4:
+ frequency = frequency / 65536;
+ break;
+ default:
+ frequency = 0.0;
+ break;
+ }
+ }
+ else
+ {
+ frequency = 0.0;
+ }
+
+ return frequency;
+}
+
+
+float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm)
+{
+ float32 N = gtm->CMU.GCLK_DEN.B.GCLK_DEN;
+ float32 Z = gtm->CMU.GCLK_NUM.B.GCLK_NUM;
+ float32 multiplier = N / Z;
+
+ return IfxGtm_Cmu_getModuleFrequency(gtm) * multiplier;
+}
+
+
+float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm)
+{
+ return IfxGtm_getSysClkFrequency();
+}
+
+
+boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex)
+{
+ return ((gtm->CMU.CLK_EN.U >> (2 * clkIndex)) & IFX_GTM_CMU_CLK_EN_EN_CLK0_MSK) == 0x3;
+}
+
+
+boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex)
+{
+ return ((gtm->CMU.CLK_EN.U >> (2 * clkIndex + 16)) & IFX_GTM_CMU_CLK_EN_EN_CLK0_MSK) == 0x3;
+}
+
+
+boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm)
+{
+ return gtm->CMU.CLK_EN.B.EN_FXCLK == 0x3;
+}
+
+
+void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal)
+{
+ switch (clkIndex)
+ {
+ case IfxGtm_Cmu_Clk_6:
+ gtm->CMU.CLK_6.CTRL.B.CLK6_SEL = useGlobal ? 0 : 1;
+ break;
+ case IfxGtm_Cmu_Clk_7:
+ gtm->CMU.CLK_7.CTRL.B.CLK7_SEL = useGlobal ? 0 : 1;
+ break;
+ default:
+ break;
+ }
+}
+
+
+void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency)
+{
+ float32 t = (IfxGtm_Cmu_getGclkFrequency(gtm) / frequency) - 1;
+ uint32 cnt = (uint32)t;
+
+ if ((t - (float32)cnt) > 0.5)
+ { /* Round to nearest */
+ cnt++;
+ }
+
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw);
+
+ switch (clkIndex)
+ {
+ case IfxGtm_Cmu_Clk_0:
+ case IfxGtm_Cmu_Clk_1:
+ case IfxGtm_Cmu_Clk_2:
+ case IfxGtm_Cmu_Clk_3:
+ case IfxGtm_Cmu_Clk_4:
+ case IfxGtm_Cmu_Clk_5:
+ gtm->CMU.CLK0_5[clkIndex].CTRL.B.CLK_CNT = cnt;
+ break;
+ case IfxGtm_Cmu_Clk_6:
+ gtm->CMU.CLK_6.CTRL.B.CLK_CNT = cnt;
+ break;
+ case IfxGtm_Cmu_Clk_7:
+ gtm->CMU.CLK_7.CTRL.B.CLK_CNT = cnt;
+ break;
+ default:
+ break;
+ }
+
+ IfxScuWdt_setCpuEndinit(psw);
+}
+
+
+void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency)
+{
+ float32 f;
+ float32 bestDistance = frequency;
+ float32 fIn = IfxGtm_Cmu_getGclkFrequency(gtm) * 2;
+ uint32 z, n, nBest = 1, zBest = 1;
+ float32 t;
+
+ for (z = 1; z < 0xFFFFFF; z++)
+ {
+ boolean endLoop = FALSE;
+ t = fIn / z;
+
+ for (n = z; n > 0; n--)
+ {
+ float32 distance;
+ f = t * n;
+ distance = fabsf(frequency - f);
+
+ if (distance < bestDistance)
+ {
+ bestDistance = distance;
+ nBest = n;
+ zBest = z;
+ }
+
+ if (bestDistance < 0.1)
+ {
+ endLoop = TRUE;
+ break;
+ }
+ }
+
+ if (endLoop)
+ {
+ break;
+ }
+ }
+
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw);
+ gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM = zBest;
+ gtm->CMU.ECLK[clkIndex].NUM.B.ECLK_NUM = zBest; /* write twice to be sure */
+ gtm->CMU.ECLK[clkIndex].DEN.B.ECLK_DEN = nBest;
+ IfxScuWdt_setCpuEndinit(psw);
+}
+
+
+void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency)
+{
+ float32 f;
+ float32 bestDistance = frequency;
+
+ float32 fIn = IfxGtm_Cmu_getModuleFrequency(gtm);
+ uint32 z, n, nBest = 1, zBest = 1;
+ float32 t;
+
+#if 1
+
+ for (z = 1; z < 0xFFFFFF; z++)
+ {
+ boolean endLoop = FALSE;
+ t = fIn / z;
+
+ for (n = z; n > 0; n--)
+ {
+ float32 distance;
+ f = t * n;
+ distance = fabsf(frequency - f);
+
+ if (distance < bestDistance)
+ {
+ bestDistance = distance;
+ nBest = n;
+ zBest = z;
+ }
+
+ if (bestDistance < 0.1)
+ {
+ endLoop = TRUE;
+ break;
+ }
+ }
+
+ if (endLoop)
+ {
+ break;
+ }
+ }
+
+#else
+
+ for (n = 1; n < 0xFFFFFF; n++)
+ {
+ float32 distance;
+ /* get best z */
+ z = floorf(frequency * n / fIn);
+ t = fIn / n;
+
+ /* lower value */
+ f = t * z;
+ distance = fabsf(frequency - f);
+
+ if (distance < bestDistance)
+ {
+ bestDistance = distance;
+ nBest = n;
+ zBest = z;
+ }
+
+ /* upper value */
+ f = t * (z + 1);
+ distance = fabsf(frequency - f);
+
+ if (distance < bestDistance)
+ {
+ bestDistance = distance;
+ nBest = n;
+ zBest = z;
+ }
+
+ if (bestDistance == 0.0)
+ {
+ break;
+ }
+ }
+
+#endif
+
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw);
+ gtm->CMU.GCLK_NUM.B.GCLK_NUM = zBest;
+ gtm->CMU.GCLK_NUM.B.GCLK_NUM = zBest; /* write twice to be sure */
+ gtm->CMU.GCLK_DEN.B.GCLK_DEN = nBest;
+ IfxScuWdt_setCpuEndinit(psw);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Cmu.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Cmu.h
new file mode 100644
index 0000000..8c9d754
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Cmu.h
@@ -0,0 +1,212 @@
+/**
+ * \file IfxGtm_Cmu.h
+ * \brief GTM basic functionality
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Std_Cmu Cmu Basic Functionality
+ * \ingroup IfxLld_Gtm_Std
+ * \defgroup IfxLld_Gtm_Std_Cmu_CMUEnumerations CMU Enumerations
+ * \ingroup IfxLld_Gtm_Std_Cmu
+ * \defgroup IfxLld_Gtm_Std_Cmu_CMU_Basic_Functions CMU Basic Functions
+ * \ingroup IfxLld_Gtm_Std_Cmu
+ */
+
+#ifndef IFXGTM_CMU_H
+#define IFXGTM_CMU_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxGtm_cfg.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Std_Cmu_CMUEnumerations
+ * \{ */
+typedef enum
+{
+ IfxGtm_Cmu_Clk_0 = 0,
+ IfxGtm_Cmu_Clk_1,
+ IfxGtm_Cmu_Clk_2,
+ IfxGtm_Cmu_Clk_3,
+ IfxGtm_Cmu_Clk_4,
+ IfxGtm_Cmu_Clk_5,
+ IfxGtm_Cmu_Clk_6,
+ IfxGtm_Cmu_Clk_7
+} IfxGtm_Cmu_Clk;
+
+typedef enum
+{
+ IfxGtm_Cmu_Eclk_0 = 0,
+ IfxGtm_Cmu_Eclk_1,
+ IfxGtm_Cmu_Eclk_2
+} IfxGtm_Cmu_Eclk;
+
+typedef enum
+{
+ IfxGtm_Cmu_Fxclk_0 = 0,
+ IfxGtm_Cmu_Fxclk_1,
+ IfxGtm_Cmu_Fxclk_2,
+ IfxGtm_Cmu_Fxclk_3,
+ IfxGtm_Cmu_Fxclk_4
+} IfxGtm_Cmu_Fxclk;
+
+/** \brief Tim Filter counter frequency select
+ */
+typedef enum
+{
+ IfxGtm_Cmu_Tim_Filter_Clk_0, /**< \brief FLT_CNT counts with CMU_CLK0 */
+ IfxGtm_Cmu_Tim_Filter_Clk_1, /**< \brief FLT_CNT counts with CMU_CLK1 */
+ IfxGtm_Cmu_Tim_Filter_Clk_6, /**< \brief FLT_CNT counts with CMU_CLK6 */
+ IfxGtm_Cmu_Tim_Filter_Clk_7 /**< \brief FLT_CNT counts with CMU_CLK7 */
+} IfxGtm_Cmu_Tim_Filter_Clk;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Std_Cmu_CMU_Basic_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Enable / Disable the configurable, fixed, and external clocks
+ * \param gtm Pointer to GTM module
+ * \param clkMask Enable / Disable mask.
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Cmu_enableClocks(Ifx_GTM *gtm, uint32 clkMask);
+
+/** \brief Returns the GTM configurable clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
+ * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
+ * \return GTM configurable clock frequency in Hz
+ */
+IFX_EXTERN float32 IfxGtm_Cmu_getClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean assumeEnabled);
+
+/** \brief Returns the GTM external clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
+ * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
+ * \return GTM external clock frequency in Hz
+ */
+IFX_EXTERN float32 IfxGtm_Cmu_getEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, boolean assumeEnabled);
+
+/** \brief Returns the GTM fixed clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \param clkIndex Index of the fixed clock 0=CMU_FXCLK0, 1=CMU_FXCLK1, ...
+ * \param assumeEnabled When TRUE, attempt to calculate the frequency as if the clock is enabled.
+ * \return GTM fixed clock frequency in Hz
+ */
+IFX_EXTERN float32 IfxGtm_Cmu_getFxClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Fxclk clkIndex, boolean assumeEnabled);
+
+/** \brief Returns the GTM global clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \return GTM global clock frequency in Hz
+ */
+IFX_EXTERN float32 IfxGtm_Cmu_getGclkFrequency(Ifx_GTM *gtm);
+
+/** \brief returns the CMU module frequency in Hz. This is only for CMU module frequency.
+ * For GTM SYS frequency: IfxGtm_getSysClkFrequency() is to be used.
+ * \param gtm Pointer to GTM module
+ * \return GTM module frequency in Hz
+ */
+IFX_EXTERN float32 IfxGtm_Cmu_getModuleFrequency(Ifx_GTM *gtm);
+
+/** \brief Returns the configurable clock enable status
+ * \param gtm Pointer to GTM module
+ * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
+ * \return TRUE The clock is enabled, FALSE The clock is disabled
+ */
+IFX_EXTERN boolean IfxGtm_Cmu_isClkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex);
+
+/** \brief Returns the external clock enable status
+ * \param gtm Pointer to GTM module
+ * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
+ * \return TRUE The clock is enabled, FALSE The clock is disabled
+ */
+IFX_EXTERN boolean IfxGtm_Cmu_isEclkClockEnabled(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex);
+
+/** \brief Returns the fixed clock enable status
+ * \param gtm Pointer to GTM module
+ * \return TRUE The clock is enabled, FALSE The clock is disabled
+ */
+IFX_EXTERN boolean IfxGtm_Cmu_isFxClockEnabled(Ifx_GTM *gtm);
+
+/** \brief Select the clock input for CLK6 and CLK7
+ * note The frequency can only be modified when the corresponding clock is disabled using IfxGtm_Cmu_enableClocks()
+ * \param gtm Pointer to GTM module
+ * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
+ * \param useGlobal if TRUE, uses the global clock as an input, else use the SUB_INC input
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Cmu_selectClkInput(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, boolean useGlobal);
+
+/** \brief Set the GTM configurable clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \param clkIndex Index of the configurable clock 0=CMU_CLK0, 1=CMU_CLK1, ...
+ * \param frequency Frequency in Hz
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Cmu_setClkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Clk clkIndex, float32 frequency);
+
+/** \brief Set the GTM external clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \param clkIndex Index of the external clock 0=CMU_ECLK0, 1=CMU_ECLK1, ...
+ * \param frequency Frequency in Hz
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Cmu_setEclkFrequency(Ifx_GTM *gtm, IfxGtm_Cmu_Eclk clkIndex, float32 frequency);
+
+/** \brief Set the GTM global clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \param frequency Frequency in Hz
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Cmu_setGclkFrequency(Ifx_GTM *gtm, float32 frequency);
+
+/** \} */
+
+#endif /* IFXGTM_CMU_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Dpll.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Dpll.c
new file mode 100644
index 0000000..ffe9268
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Dpll.c
@@ -0,0 +1,60 @@
+/**
+ * \file IfxGtm_Dpll.c
+ * \brief GTM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Dpll.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index)
+{
+ IFX_UNUSED_PARAMETER(gtm)
+ IFX_UNUSED_PARAMETER(index)
+ return 0.0F;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Dpll.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Dpll.h
new file mode 100644
index 0000000..b993d47
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Dpll.h
@@ -0,0 +1,74 @@
+/**
+ * \file IfxGtm_Dpll.h
+ * \brief GTM basic functionality
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Std_Dpll Dpll Basic Functionality
+ * \ingroup IfxLld_Gtm_Std
+ * \defgroup IfxLld_Gtm_Std_Dpll_Basic_Functions DPLL Basic Functions
+ * \ingroup IfxLld_Gtm_Std_Dpll
+ */
+
+#ifndef IFXGTM_DPLL_H
+#define IFXGTM_DPLL_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxGtm_cfg.h"
+/** \addtogroup IfxLld_Gtm_Std_Dpll_Basic_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Dummy Function, returns 0.0F
+ * \param gtm Pointer to GTM module
+ * \param index Dpll subincrement index
+ * \return frequency
+ */
+IFX_EXTERN float32 IfxGtm_Dpll_getSubIncFrequency(Ifx_GTM *gtm, IfxGtm_Dpll_SubInc index);
+
+/** \} */
+
+#endif /* IFXGTM_DPLL_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tbu.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tbu.c
new file mode 100644
index 0000000..cf811f5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tbu.c
@@ -0,0 +1,74 @@
+/**
+ * \file IfxGtm_Tbu.c
+ * \brief GTM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Tbu.h"
+#include "IfxGtm_Cmu.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
+{
+ float32 result = 0.0F;
+
+ if (channel == IfxGtm_Tbu_Ts_0)
+ {
+ result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH0_CTRL.B.CH_CLK_SRC, TRUE);
+ }
+ else if (channel == IfxGtm_Tbu_Ts_1)
+ {
+ result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH1_CTRL.B.CH_CLK_SRC, TRUE);
+ }
+ else if (channel == IfxGtm_Tbu_Ts_2)
+ {
+ result = IfxGtm_Cmu_getClkFrequency(gtm, (IfxGtm_Cmu_Clk)gtm->TBU.CH2_CTRL.B.CH_CLK_SRC, TRUE);
+ }
+
+ return result;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tbu.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tbu.h
new file mode 100644
index 0000000..ca41ab3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tbu.h
@@ -0,0 +1,135 @@
+/**
+ * \file IfxGtm_Tbu.h
+ * \brief GTM basic functionality
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Std_Tbu Tbu Basic Functionality
+ * \ingroup IfxLld_Gtm_Std
+ * \defgroup IfxLld_Gtm_Std_Tbu_Enumerations TBU Enumerations
+ * \ingroup IfxLld_Gtm_Std_Tbu
+ * \defgroup IfxLld_Gtm_Std_Tbu_Basic_Functions TBU Basic Functions
+ * \ingroup IfxLld_Gtm_Std_Tbu
+ */
+
+#ifndef IFXGTM_TBU_H
+#define IFXGTM_TBU_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxGtm_cfg.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Std_Tbu_Enumerations
+ * \{ */
+/** \brief GTM TOM TBU Time stamps
+ */
+typedef enum
+{
+ IfxGtm_Tbu_Ts_0,
+ IfxGtm_Tbu_Ts_1,
+ IfxGtm_Tbu_Ts_2
+} IfxGtm_Tbu_Ts;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Std_Tbu_Basic_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Enables the channel
+ * \param gtm Pointer to GTM module
+ * \param channel TBU Time stamps
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
+
+/** \brief Function to check if a TBU channel is enabled.
+ * Returns TRUE if the corresponding channel is enabled
+ * Returns FALSE if the corresponding channel is disabled.
+ * \param gtm Pointer to GTM SFR
+ * \param channel Channel of TBU
+ * \return TRUE: channel is enabled
+ */
+IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the clock frequency
+ * \param gtm Pointer to GTM module
+ * \param channel TBU Time stamps
+ * \return frequency
+ */
+IFX_EXTERN float32 IfxGtm_Tbu_getClockFrequency(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxGtm_Tbu_enableChannel(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
+{
+ uint32 shift = channel * 2;
+
+ __ldmst_c(>m->TBU.CHEN.U, (3U << shift), (IfxGtm_FeatureControl_enable << shift));
+}
+
+
+IFX_INLINE boolean IfxGtm_Tbu_isChannelEnabled(Ifx_GTM *gtm, IfxGtm_Tbu_Ts channel)
+{
+ uint32 shift = channel * 2;
+ uint32 enable_status = (gtm->TBU.CHEN.U & ((uint32)3 << shift)) >> shift;
+
+ return enable_status == (uint32)IfxGtm_FeatureControl_enabled;
+}
+
+
+#endif /* IFXGTM_TBU_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tim.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tim.c
new file mode 100644
index 0000000..aae6d82
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tim.c
@@ -0,0 +1,173 @@
+/**
+ * \file IfxGtm_Tim.c
+ * \brief GTM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Tim.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
+{
+ IfxGtm_Cmu_Clk clock;
+
+ clock = IfxGtm_Tim_Ch_getCaptureClockSource(channel);
+
+ return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
+}
+
+
+IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel)
+{
+ return (IfxGtm_Cmu_Clk)channel->CTRL.B.CLK_SEL;
+}
+
+
+float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
+{
+ IfxGtm_Cmu_Tim_Filter_Clk filterClock;
+ IfxGtm_Cmu_Clk clock;
+
+ filterClock = IfxGtm_Tim_Ch_getFilterClockSource(channel);
+
+ switch (filterClock)
+ {
+ case IfxGtm_Cmu_Tim_Filter_Clk_0:
+ clock = IfxGtm_Cmu_Clk_0;
+ break;
+ case IfxGtm_Cmu_Tim_Filter_Clk_1:
+ clock = IfxGtm_Cmu_Clk_1;
+ break;
+ case IfxGtm_Cmu_Tim_Filter_Clk_6:
+ clock = IfxGtm_Cmu_Clk_6;
+ break;
+ case IfxGtm_Cmu_Tim_Filter_Clk_7:
+ clock = IfxGtm_Cmu_Clk_7;
+ break;
+ default:
+ clock = IfxGtm_Cmu_Clk_0; // This case never occurs
+ break;
+ }
+
+ return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
+}
+
+
+IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel)
+{
+ return (IfxGtm_Cmu_Tim_Filter_Clk)channel->CTRL.B.FLT_CNT_FRQ;
+}
+
+
+float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel)
+{
+ IfxGtm_Cmu_Clk clock;
+
+ clock = IfxGtm_Tim_Ch_getTimeoutClockSource(channel);
+
+ return IfxGtm_Cmu_getClkFrequency(gtm, clock, TRUE);
+}
+
+
+IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel)
+{
+ return (IfxGtm_Cmu_Clk)channel->TDUV.B.TCS;
+}
+
+
+void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost)
+{
+ Ifx_GTM_TIM_CH_IRQ_EN en;
+ en.U = channel->IRQ_EN.U;
+
+ en.B.NEWVAL_IRQ_EN = irqOnNewVal ? 1 : 0;
+ en.B.CNTOFL_IRQ_EN = irqOnCntOverflow ? 1 : 0;
+ en.B.ECNTOFL_IRQ_EN = irqOnEcntOverflow ? 1 : 0;
+ en.B.GPROFL_IRQ_EN = irqOnDatalost ? 1 : 0;
+ channel->IRQ_EN.U = en.U;
+}
+
+
+void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock)
+{
+ channel->CTRL.B.CLK_SEL = clock;
+}
+
+
+void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch)
+{
+ Ifx_GTM_TIM_CH_IRQ_EN en;
+ en.U = channel->IRQ_EN.U;
+
+ en.B.GLITCHDET_IRQ_EN = irqOnGlitch ? 1 : 0;
+
+ channel->IRQ_EN.U = en.U;
+}
+
+
+void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode)
+{
+ Ifx_GTM_TIM_CH_IRQ_EN en;
+ en.U = channel->IRQ_EN.U;
+
+ /* Disable all interrupts of the interrupt set to change mode */
+ channel->IRQ_EN.U = 0;
+ channel->IRQ_MODE.B.IRQ_MODE = mode;
+ channel->IRQ_EN.U = en.U; /* Set the values back */
+}
+
+
+void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout)
+{
+ Ifx_GTM_TIM_CH_IRQ_EN en;
+ en.U = channel->IRQ_EN.U;
+
+ en.B.TODET_IRQ_EN = irqOnTimeout ? 1 : 0;
+
+ channel->IRQ_EN.U = en.U;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tim.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tim.h
new file mode 100644
index 0000000..5eb0815
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tim.h
@@ -0,0 +1,385 @@
+/**
+ * \file IfxGtm_Tim.h
+ * \brief GTM basic functionality
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ *
+ * \defgroup IfxLld_Gtm_Std_Tim Tim Basic Functionality
+ * \ingroup IfxLld_Gtm_Std
+ * \defgroup IfxLld_Gtm_Std_Tim_Enumerations TIM Enumerations
+ * \ingroup IfxLld_Gtm_Std_Tim
+ * \defgroup IfxLld_Gtm_Std_Tim_Channel_Functions TIM Channel Functions
+ * \ingroup IfxLld_Gtm_Std_Tim
+ */
+
+#ifndef IFXGTM_TIM_H
+#define IFXGTM_TIM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxGtm_cfg.h"
+#include "Src/Std/IfxSrc.h"
+#include "IfxGtm.h"
+#include "IfxGtm_Cmu.h"
+#include "IfxGtm_bf.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Std_Tim_Enumerations
+ * \{ */
+typedef enum
+{
+ IfxGtm_Tim_CntsSel_cntReg = 0,
+ IfxGtm_Tim_CntsSel_tbuTs0
+} IfxGtm_Tim_CntsSel;
+
+/** \brief Enum for Filter counter
+ */
+typedef enum
+{
+ IfxGtm_Tim_FilterCounter_upDown = 0,
+ IfxGtm_Tim_FilterCounter_hold
+} IfxGtm_Tim_FilterCounter;
+
+/** \brief Enum for Filter mode
+ */
+typedef enum
+{
+ IfxGtm_Tim_FilterMode_immediateEdgePropagation = 0, /**< \brief Immediate edge Propagation mode */
+ IfxGtm_Tim_FilterMode_individualDeglitchTime /**< \brief Individual deglitch mode */
+} IfxGtm_Tim_FilterMode;
+
+typedef enum
+{
+ IfxGtm_Tim_GprSel_tbuTs0 = 0,
+ IfxGtm_Tim_GprSel_tbuTs1,
+ IfxGtm_Tim_GprSel_tbuTs2,
+ IfxGtm_Tim_GprSel_cnts
+} IfxGtm_Tim_GprSel;
+
+typedef enum
+{
+ IfxGtm_Tim_Input_currentChannel = 0,
+ IfxGtm_Tim_Input_adjacentChannel
+} IfxGtm_Tim_Input;
+
+typedef enum
+{
+ IfxGtm_Tim_Mode_pwmMeasurement = 0, /**< \brief TPWM */
+ IfxGtm_Tim_Mode_pulseIntegration, /**< \brief TPIM */
+ IfxGtm_Tim_Mode_inputEvent, /**< \brief TIEM */
+ IfxGtm_Tim_Mode_inputPrescaler, /**< \brief TIPM */
+ IfxGtm_Tim_Mode_bitCompression /**< \brief TBCM */
+} IfxGtm_Tim_Mode;
+
+/** \brief Enum for Timeout control
+ */
+typedef enum
+{
+ IfxGtm_Tim_Timeout_disabled, /**< \brief Timeout feature disabled */
+ IfxGtm_Tim_Timeout_risingEdge, /**< \brief Timeout feature enabled for rising edge only */
+ IfxGtm_Tim_Timeout_fallingEdge, /**< \brief Timeout feature enabled for falling edge only */
+ IfxGtm_Tim_Timeout_bothEdge /**< \brief Timeout feature enabled for both edges */
+} IfxGtm_Tim_Timeout;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Std_Tim_Channel_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the counter overflow flag
+ * \param channel TIM channel pointer
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Clears the data lost flag
+ * \param channel TIM channel pointer
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Clears the event counter overflow flag
+ * \param channel TIM channel pointer
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Clears the glitch flag
+ * \param channel TIM channel pointer
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Clears the new value flag
+ * \param channel TIM channel pointer
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Returns a pointer to the TIM channel SRC
+ * \param gtm Pointer to GTM module
+ * \param tim Specifies the tim module no
+ * \param channel Channel index
+ * \return Pointer to the TIM channel SRC
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel);
+
+/** \brief Test the counter overflow flag
+ * \param channel TIM channel pointer
+ * \return TRUE if the flag is set, else FALSE
+ */
+IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Test the data lost flag
+ * \param channel TIM channel pointer
+ * \return TRUE if the flag is set, else FALSE
+ */
+IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Test the event counter overflow flag
+ * \param channel TIM channel pointer
+ * \return TRUE if the flag is set, else FALSE
+ */
+IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Test the glitch flag
+ * \param channel TIM channel pointer
+ * \return TRUE if the flag is set, else FALSE
+ */
+IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Test the new value flag
+ * \param channel TIM channel pointer
+ * \return TRUE if the flag is set, else FALSE
+ */
+IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Returns the pointer to the TIM channel
+ * \param tim Pointer to Tim base
+ * \param channel TIM channel
+ * \return Pointer to TIM channel base
+ */
+IFX_INLINE Ifx_GTM_TIM_CH *IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel);
+
+/** \brief Reset the specified TIM channel
+ * \param tim Pointer to GTM TIM instance
+ * \param channel Channel index
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the Capture Clock Frequency
+ * \param gtm Pointer to GTM module
+ * \param channel Pointer to TIM channel base
+ * \return Capture clock frequency
+ */
+IFX_EXTERN float32 IfxGtm_Tim_Ch_getCaptureClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
+
+/** \brief Returns the capture clock source selected
+ * \param channel TIM channel pointer
+ * \return capture clock source
+ */
+IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getCaptureClockSource(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Returns the Filter Clock Frequency
+ * \param gtm Pointer to GTM module
+ * \param channel Pointer to TIM channel base
+ * \return Filter clock frequency
+ */
+IFX_EXTERN float32 IfxGtm_Tim_Ch_getFilterClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
+
+/** \brief Returns the Filter clock source selected
+ * \param channel TIM channel pointer
+ * \return Filter clock source
+ */
+IFX_EXTERN IfxGtm_Cmu_Tim_Filter_Clk IfxGtm_Tim_Ch_getFilterClockSource(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Returns the Timeout Clock Frequency
+ * \param gtm Pointer to GTM module
+ * \param channel Pointer to TIM channel base
+ * \return Timeout clock frequency
+ */
+IFX_EXTERN float32 IfxGtm_Tim_Ch_getTimeoutClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TIM_CH *channel);
+
+/** \brief Returns the Timeout clock source selected
+ * \param channel TIM channel pointer
+ * \return Timeout clock source
+ */
+IFX_EXTERN IfxGtm_Cmu_Clk IfxGtm_Tim_Ch_getTimeoutClockSource(Ifx_GTM_TIM_CH *channel);
+
+/** \brief Set the channel notification
+ * \param channel TIM channel pointer
+ * \param irqOnNewVal If TRUE, the interrupt on new value is enabled
+ * \param irqOnCntOverflow If TRUE, the interrupt on CNT overflow is enabled
+ * \param irqOnEcntOverflow If TRUE, the interrupt on ECNT overflow is enabled
+ * \param irqOnDatalost If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tim_Ch_setChannelNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnNewVal, boolean irqOnCntOverflow, boolean irqOnEcntOverflow, boolean irqOnDatalost);
+
+/** \brief Set the channel clock source
+ * \param channel TIM channel pointer
+ * \param clock Selected clock
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tim_Ch_setClockSource(Ifx_GTM_TIM_CH *channel, IfxGtm_Cmu_Clk clock);
+
+/** \brief Set the filter notification
+ * \param channel TIM channel pointer
+ * \param irqOnGlitch If TRUE, the interrupt on glitch is enabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tim_Ch_setFilterNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnGlitch);
+
+/** \brief This function configures the TIM channel IRQ mode
+ * \param channel TIM channel pointer
+ * \param mode Notification Mode
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tim_Ch_setNotificationMode(Ifx_GTM_TIM_CH *channel, IfxGtm_IrqMode mode);
+
+/** \brief Set the timeout notification
+ * \param channel TIM channel pointer
+ * \param irqOnTimeout If TRUE, the interrupt on timeout is enabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tim_Ch_setTimeoutNotification(Ifx_GTM_TIM_CH *channel, boolean irqOnTimeout);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxGtm_Tim_Ch_clearCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
+{
+ channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_CNTOFL_OFF;
+}
+
+
+IFX_INLINE void IfxGtm_Tim_Ch_clearDataLostEvent(Ifx_GTM_TIM_CH *channel)
+{
+ channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_GPROFL_OFF;
+}
+
+
+IFX_INLINE void IfxGtm_Tim_Ch_clearEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
+{
+ channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_ECNTOFL_OFF;
+}
+
+
+IFX_INLINE void IfxGtm_Tim_Ch_clearGlitchEvent(Ifx_GTM_TIM_CH *channel)
+{
+ channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_GLITCHDET_OFF;
+}
+
+
+IFX_INLINE void IfxGtm_Tim_Ch_clearNewValueEvent(Ifx_GTM_TIM_CH *channel)
+{
+ channel->IRQ_NOTIFY.U = 0x1 << IFX_GTM_TIM_CH_IRQ_NOTIFY_NEWVAL_OFF;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxGtm_Tim_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tim tim, IfxGtm_Tim_Ch channel)
+{
+ IFX_UNUSED_PARAMETER(gtm)
+ return &MODULE_SRC.GTM.GTM[0].TIM[tim][channel];
+}
+
+
+IFX_INLINE boolean IfxGtm_Tim_Ch_isCntOverflowEvent(Ifx_GTM_TIM_CH *channel)
+{
+ return channel->IRQ_NOTIFY.B.CNTOFL == 1;
+}
+
+
+IFX_INLINE boolean IfxGtm_Tim_Ch_isDataLostEvent(Ifx_GTM_TIM_CH *channel)
+{
+ return channel->IRQ_NOTIFY.B.GPROFL == 1;
+}
+
+
+IFX_INLINE boolean IfxGtm_Tim_Ch_isEcntOverflowEvent(Ifx_GTM_TIM_CH *channel)
+{
+ return channel->IRQ_NOTIFY.B.ECNTOFL == 1;
+}
+
+
+IFX_INLINE boolean IfxGtm_Tim_Ch_isGlitchEvent(Ifx_GTM_TIM_CH *channel)
+{
+ return channel->IRQ_NOTIFY.B.GLITCHDET == 1;
+}
+
+
+IFX_INLINE boolean IfxGtm_Tim_Ch_isNewValueEvent(Ifx_GTM_TIM_CH *channel)
+{
+ return channel->IRQ_NOTIFY.B.NEWVAL == 1;
+}
+
+
+IFX_INLINE Ifx_GTM_TIM_CH *IfxGtm_Tim_getChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
+{
+ return (Ifx_GTM_TIM_CH *)((uint32)&tim->CH0.GPR0.U + ((uint32)&tim->CH1 - (uint32)&tim->CH0) * channel);
+}
+
+
+IFX_INLINE void IfxGtm_Tim_Ch_resetChannel(Ifx_GTM_TIM *tim, IfxGtm_Tim_Ch channel)
+{
+ tim->RST.U |= (uint32)1 << (uint32)channel;
+}
+
+
+#endif /* IFXGTM_TIM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tom.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tom.c
new file mode 100644
index 0000000..381d12f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tom.c
@@ -0,0 +1,558 @@
+/**
+ * \file IfxGtm_Tom.c
+ * \brief GTM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Tom.h"
+#include "IfxGtm_bf.h"
+#include "IfxGtm_Cmu.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+ tomCh->IRQ_NOTIFY.B.CCU1TC = 1;
+}
+
+
+void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+ tomCh->IRQ_NOTIFY.B.CCU0TC = 1;
+}
+
+
+float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ IfxGtm_Tom_Ch_ClkSrc clock;
+ IfxGtm_Cmu_Fxclk clkIndex[5] = {
+ IfxGtm_Cmu_Fxclk_0, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 */
+ IfxGtm_Cmu_Fxclk_1, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 */
+ IfxGtm_Cmu_Fxclk_2, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 */
+ IfxGtm_Cmu_Fxclk_3, /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 */
+ IfxGtm_Cmu_Fxclk_4 /*IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 */
+ };
+
+ clock = IfxGtm_Tom_Ch_getClockSource(tom, channel);
+
+ if (clock == IfxGtm_Tom_Ch_ClkSrc_noClock)
+ {
+ return 0.0;
+ }
+ else
+ {
+ return IfxGtm_Cmu_getFxClkFrequency(gtm, clkIndex[clock], TRUE);
+ }
+}
+
+
+IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ IfxGtm_Tom_Ch_ClkSrc clock = IfxGtm_Tom_Ch_ClkSrc_noClock;
+
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ clock = (IfxGtm_Tom_Ch_ClkSrc)tomCh->CTRL.B.CLK_SRC_SR;
+
+ return clock;
+}
+
+
+uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ return tomCh->CM1.U;
+}
+
+
+volatile uint32 *IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ return (volatile uint32 *)&tomCh->CM1.U;
+}
+
+
+uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ return tomCh->CM0.U;
+}
+
+
+volatile uint32 *IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+ return (volatile uint32 *)&tomCh->CM0.U;
+}
+
+
+boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ boolean result;
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ result = tomCh->STAT.B.OL == 1;
+
+ return result;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel)
+{
+ IFX_UNUSED_PARAMETER(gtm)
+ return &MODULE_SRC.GTM.GTM[0].TOM[tom][channel / 2];
+}
+
+
+Ifx_GTM_TOM_TGC *IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex)
+{
+ Ifx_GTM_TOM_TGC *pointer;
+
+ if (tgcIndex == 0)
+ {
+ pointer = (Ifx_GTM_TOM_TGC *)&tom->TGC0_GLB_CTRL;
+ }
+ else
+ {
+ pointer = (Ifx_GTM_TOM_TGC *)&tom->TGC1_GLB_CTRL;
+ }
+
+ return pointer;
+}
+
+
+volatile uint32 *IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+ return (volatile uint32 *)&tomCh->CN0.U;
+}
+
+
+boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ boolean result;
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+ result = tomCh->IRQ_NOTIFY.B.CCU1TC != 0;
+ return result;
+}
+
+
+boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ boolean result;
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+ result = tomCh->IRQ_NOTIFY.B.CCU0TC != 0;
+ return result;
+}
+
+
+void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+ tomCh->IRQ_FORCINT.B.TRG_CCU1TC0 = 1;
+}
+
+
+void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+ tomCh->IRQ_FORCINT.B.TRG_CCU0TC0 = 1;
+}
+
+
+void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CTRL.B.CLK_SRC_SR = clock;
+}
+
+
+void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
+ tomCh->CM1.U = compareOne;
+}
+
+
+void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CM1.U = compareOne; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->SR1.U = shadowOne; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
+ tomCh->SR1.U = shadowOne;
+}
+
+
+void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CM0.U = compareZero; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->SR0.U = shadowZero; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CN0.U = value; // TK: replaced .B access to optimize runtime
+}
+
+
+void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
+{
+ if (channel <= IfxGtm_Tom_Ch_7)
+ {
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CTRL.B.GCM = enabled ? 1 : 0;
+ }
+}
+
+
+void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ Ifx_GTM_TOM_CH_IRQ_EN en;
+ en.U = tomCh->IRQ_EN.U;
+
+ /* Disable all interrupts of the interrupt set to change mode */
+ tomCh->IRQ_EN.U = IFX_ZEROS;
+ tomCh->IRQ_MODE.B.IRQ_MODE = mode;
+ tomCh->IRQ_EN.U = en.U; /* Set the values back */
+
+ en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
+ en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
+ tomCh->IRQ_EN.U = en.U;
+}
+
+
+void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CTRL.B.OSM = enabled ? 1 : 0;
+}
+
+
+void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
+{
+ if (channel == IfxGtm_Tom_Ch_15)
+ {
+ tom->CH15.CTRL.B.BITREV = enabled ? 1 : 0;
+ }
+}
+
+
+void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CTRL.B.RST_CCU0 = event;
+}
+
+
+void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CTRL.B.SL = activeState == Ifx_ActiveState_high ? 1 : 0;
+}
+
+
+void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled)
+{
+ if (channel <= IfxGtm_Tom_Ch_7)
+ {
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CTRL.B.SPEM = enabled ? 1 : 0;
+ }
+}
+
+
+void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger)
+{
+ Ifx_GTM_TOM_CH *tomCh = IfxGtm_Tom_Ch_getChannelPointer(tom, channel);
+
+ tomCh->CTRL.B.TRIGOUT = trigger;
+}
+
+
+uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset)
+{
+ uint8 i;
+ uint32 reg = 0;
+ uint32 mask = enableMask | (disableMask << 16);
+
+ for (i = 0; i < IFXGTM_TOM_NUM_TGC_CHANNELS; i++)
+ {
+ /* Bitfield length is 2 bits */
+ uint8 shift = (i * 2) + bitfieldOffset;
+
+ if (mask & 0x1)
+ {
+ reg |= IfxGtm_FeatureControl_enable << shift;
+ }
+
+ if (mask & 0x10000)
+ {
+ reg |= IfxGtm_FeatureControl_disable << shift;
+ }
+
+ mask = mask >> 1;
+ }
+
+ return reg;
+}
+
+
+uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset)
+{
+ uint32 reg = 0;
+
+ /* Bitfield length is 2 bits */
+ uint8 shift = ((channel % 8) * 2) + bitfieldOffset;
+
+ if (enabled == 1)
+ {
+ reg = IfxGtm_FeatureControl_enable << shift;
+ }
+ else
+ {
+ reg = IfxGtm_FeatureControl_disable << shift;
+ }
+
+ return reg;
+}
+
+
+void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
+{
+ uint32 value;
+
+ value = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_ENDIS_CTRL_ENDIS_CTRL0_OFF);
+
+ if (immediate)
+ {
+ tgc->ENDIS_CTRL.U = value;
+ tgc->ENDIS_STAT.U = value;
+ }
+ else
+ {
+ tgc->ENDIS_CTRL.U = value;
+ }
+}
+
+
+void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate)
+{
+ uint32 value;
+
+ value = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_OUTEN_CTRL_OUTEN_CTRL0_OFF);
+
+ if (immediate)
+ {
+ tgc->OUTEN_CTRL.U = value;
+ tgc->OUTEN_STAT.U = value;
+ }
+ else
+ {
+ tgc->OUTEN_CTRL.U = value;
+ }
+}
+
+
+void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled)
+{
+ tgc->GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
+}
+
+
+void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
+{
+ uint32 value;
+
+ value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_ENDIS_CTRL_ENDIS_CTRL0_OFF);
+
+ if (immediate)
+ {
+ tgc->ENDIS_CTRL.U = value;
+ tgc->ENDIS_STAT.U = value;
+ }
+ else
+ {
+ tgc->ENDIS_CTRL.U = value;
+ }
+}
+
+
+void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate)
+{
+ uint32 value;
+
+ value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_OUTEN_CTRL_OUTEN_CTRL0_OFF);
+
+ if (immediate)
+ {
+ tgc->OUTEN_CTRL.U = value;
+ tgc->OUTEN_STAT.U = value;
+ }
+ else
+ {
+ tgc->OUTEN_CTRL.U = value;
+ }
+}
+
+
+void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
+{
+ tgc->INT_TRIG.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_INT_TRIG_INT_TRIG0_OFF);
+}
+
+
+void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask)
+{
+ tgc->GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
+}
+
+
+void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled)
+{
+ tgc->ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
+}
+
+
+void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask)
+{
+ uint8 i;
+ uint32 reg = 0;
+
+ for (i = 0; i < IFXGTM_TOM_NUM_TGC_CHANNELS; i++)
+ {
+ if (resetMask & 0x1)
+ {
+ reg |= 1 << i;
+ }
+
+ resetMask = resetMask >> 1;
+ }
+
+ tgc->GLB_CTRL.U = reg << IFX_GTM_TOM_TGC0_GLB_CTRL_RST_CH0_OFF;
+}
+
+
+void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled)
+{
+ uint32 regEnable, regReset;
+
+ regEnable = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, enabled, IFX_GTM_TOM_TGC0_FUPD_CTRL_FUPD_CTRL0_OFF);
+ regReset = IfxGtm_Tom_Tgc_buildFeatureForChannel(channel, resetEnabled, IFX_GTM_TOM_TGC0_FUPD_CTRL_RSTCN0_CH0_OFF);
+
+ tgc->FUPD_CTRL.U = regEnable | (regReset << 16);
+}
+
+
+void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask)
+{
+ uint32 regEnable, regReset;
+
+ regEnable = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_FUPD_CTRL_FUPD_CTRL0_OFF);
+ regReset = IfxGtm_Tom_Tgc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_TOM_TGC0_FUPD_CTRL_RSTCN0_CH0_OFF);
+
+ tgc->FUPD_CTRL.U = regEnable | regReset;
+}
+
+
+void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value)
+{
+ Ifx_GTM_TOM_TGC0_ACT_TB act_tb;
+
+ act_tb.U = tgc->ACT_TB.U;
+ act_tb.B.TBU_SEL = base;
+ act_tb.B.ACT_TB = value;
+ tgc->ACT_TB.U = act_tb.U;
+}
+
+
+void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc)
+{
+ tgc->GLB_CTRL.U = 1 << IFX_GTM_TOM_TGC0_GLB_CTRL_HOST_TRIG_OFF;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tom.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tom.h
new file mode 100644
index 0000000..4603259
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Std/IfxGtm_Tom.h
@@ -0,0 +1,537 @@
+/**
+ * \file IfxGtm_Tom.h
+ * \brief GTM basic functionality
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ *
+ * \defgroup IfxLld_Gtm_Std_Tom Tom Basic Functionality
+ * \ingroup IfxLld_Gtm_Std
+ * \defgroup IfxLld_Gtm_Std_Tom_Enumerations TOM Enumerations
+ * \ingroup IfxLld_Gtm_Std_Tom
+ * \defgroup IfxLld_Gtm_Std_Tom_Channel_Functions TOM Channel Functions
+ * \ingroup IfxLld_Gtm_Std_Tom
+ * \defgroup IfxLld_Gtm_Std_Tom_TGC_Functions TOM TGC Functions
+ * \ingroup IfxLld_Gtm_Std_Tom
+ */
+
+#ifndef IFXGTM_TOM_H
+#define IFXGTM_TOM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxGtm_cfg.h"
+#include "IfxGtm.h"
+#include "IfxGtm_Tbu.h"
+#include "Src/Std/IfxSrc.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Number of channels per TOM TGC
+ */
+#define IFXGTM_TOM_NUM_TGC_CHANNELS (8)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Std_Tom_Enumerations
+ * \{ */
+/** \brief Clock source for the TOM channels
+ */
+typedef enum
+{
+ IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0 = 0, /**< \brief div 1 */
+ IfxGtm_Tom_Ch_ClkSrc_cmuFxclk1 = 1, /**< \brief div 16 */
+ IfxGtm_Tom_Ch_ClkSrc_cmuFxclk2 = 2, /**< \brief div 256 */
+ IfxGtm_Tom_Ch_ClkSrc_cmuFxclk3 = 3, /**< \brief div 4096 */
+ IfxGtm_Tom_Ch_ClkSrc_cmuFxclk4 = 4, /**< \brief div 32768 */
+ IfxGtm_Tom_Ch_ClkSrc_noClock = 5 /**< \brief no clock */
+} IfxGtm_Tom_Ch_ClkSrc;
+
+/** \brief Reset source for channel counter CN0
+ */
+typedef enum
+{
+ IfxGtm_Tom_Ch_OutputTrigger_forward = 0, /**< \brief Forward the trigger from the previous channel */
+ IfxGtm_Tom_Ch_OutputTrigger_generate = 1 /**< \brief Generate the trigger from the current channel */
+} IfxGtm_Tom_Ch_OutputTrigger;
+
+/** \brief Reset event for channel counter CN0
+ */
+typedef enum
+{
+ IfxGtm_Tom_Ch_ResetEvent_onCm0 = 0,
+ IfxGtm_Tom_Ch_ResetEvent_onTrigger = 1
+} IfxGtm_Tom_Ch_ResetEvent;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Std_Tom_Channel_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the base addredd of selected Tom channel
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return Pointer to channel base address
+ */
+IFX_INLINE Ifx_GTM_TOM_CH *IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the channel One notification
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_clearOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Clears the channel Zero notification
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_clearZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the TOM channel input clock frequency in Hz
+ * \param gtm Pointer to GTM module
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return TOM channel input clock frequency in Hz
+ */
+IFX_EXTERN float32 IfxGtm_Tom_Ch_getClockFrequency(Ifx_GTM *gtm, Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the channel clock source
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return The clock source
+ */
+IFX_EXTERN IfxGtm_Tom_Ch_ClkSrc IfxGtm_Tom_Ch_getClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the compare one value
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return compare one value
+ */
+IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the compare one pointer
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return compare one pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getCompareOnePointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the compare zero value
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return compare zero value
+ */
+IFX_EXTERN uint32 IfxGtm_Tom_Ch_getCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the compare zero pointer
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return compare zero pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getCompareZeroPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Gets the TOM output level
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return TRUE the output is high, FALSE the output is low
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Ch_getOutputLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns a pointer to the TOM channel SRC
+ * \param gtm Pointer to GTM module
+ * \param tom Specifies the tom object
+ * \param channel Channel index
+ * \return Pointer to the TOM channel SRC
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxGtm_Tom_Ch_getSrcPointer(Ifx_GTM *gtm, IfxGtm_Tom tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the TGC pointer
+ * \param tom Pointer to the TOM object
+ * \param tgcIndex TGC index
+ * \return TOM TGC object pointer
+ */
+IFX_EXTERN Ifx_GTM_TOM_TGC *IfxGtm_Tom_Ch_getTgcPointer(Ifx_GTM_TOM *tom, uint32 tgcIndex);
+
+/** \brief Returns the Timer pointer
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return Timer pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Tom_Ch_getTimerPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the status of channel One notification
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return Status of channel One notification
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Ch_isOneNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Returns the status of channel Zero notification
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return Status of channel Zero notification
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Ch_isZeroNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Raises the interrupt for Compare 1
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Raises the interrupt for Compare 0
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_raiseInterruptZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel);
+
+/** \brief Sets the channel clock source
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param clock Channel clock source
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setClockSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ClkSrc clock);
+
+/** \brief Sets the compare 0 and 1 values
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param compareZero Compare zero value
+ * \param compareOne Compare one value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setCompare(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero, uint32 compareOne);
+
+/** \brief Sets the compare 1 value
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param compareOne Compare one value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOne(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareOne);
+
+/** \brief Sets the compare 1 shadow value
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param shadowOne Compare one shadow value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setCompareOneShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowOne);
+
+/** \brief Sets the compare 0 and 1 shadow values
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param shadowZero Compare zero shadow value
+ * \param shadowOne Compare one shadow value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setCompareShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero, uint32 shadowOne);
+
+/** \brief Sets the compare 0 value
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param compareZero Compare zero value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZero(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 compareZero);
+
+/** \brief Sets the compare 0 shadow value
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param shadowZero Compare zero shadow value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setCompareZeroShadow(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 shadowZero);
+
+/** \brief Sets the counter value
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param value Counter value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setCounterValue(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, uint32 value);
+
+/** \brief Enable/disable the gated counter mode (channel 0 to 7 only)
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param enabled If TRUE, the feature is enabled, else disabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setGatedCounter(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
+
+/** \brief Sets the channel notification
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param mode Interrupt mode
+ * \param interruptOnCompareZero If TRUE, an interrupt is generated on compare 0, else no interrupt is generated
+ * \param interruptOnCompareOne If TRUE, an interrupt is generated on compare 1, else no interrupt is generated
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setNotification(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_IrqMode mode, boolean interruptOnCompareZero, boolean interruptOnCompareOne);
+
+/** \brief Enable/disable the one shot mode
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param enabled If TRUE, the feature is enabled, else disabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setOneShotMode(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
+
+/** \brief Enable/disable the PCM mode (channel 15 only)
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param enabled If TRUE, the feature is enabled, else disabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setPcm(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
+
+/** \brief Sets the channel clock source either from local or from previous channel
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param event Channel reset event
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setResetSource(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_ResetEvent event);
+
+/** \brief Sets the signal level
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param activeState Signal level active state. In case the channel is reset, the output is set to not active. The signal is active between 0 and the leading edge (CM1) and inactive between the leading edge and the trailing edge (CM0).
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setSignalLevel(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, Ifx_ActiveState activeState);
+
+/** \brief Enable/disable the SPE mode (channel 0 to 7 only)
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param enabled If TRUE, the feature is enabled, else disabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setSpe(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, boolean enabled);
+
+/** \brief Sets the channel trigger output
+ * \param tom Pointer to the TOM object
+ * \param channel Channel index
+ * \param trigger Channel trigger output mode
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Ch_setTriggerOutput(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel, IfxGtm_Tom_Ch_OutputTrigger trigger);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Std_Tom_TGC_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Sets the tgc global control value
+ * \param tgc Pointer to the TGC object
+ * \param control global control value
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Builds the register value for the feature enable/disable
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param bitfieldOffset Offset of the channel 0 bitfield in the register
+ * \return The register value
+ */
+IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeature(uint16 enableMask, uint16 disableMask, uint8 bitfieldOffset);
+
+/** \brief Builds the register value for the feature enable/disable for a single channel
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \param bitfieldOffset Offset of the channel 0 bitfield in the register
+ * \return The register value
+ */
+IFX_EXTERN uint32 IfxGtm_Tom_Tgc_buildFeatureForChannel(IfxGtm_Tom_Ch channel, boolean enabled, uint8 bitfieldOffset);
+
+/** \brief Enable/disable one channel (ENDIS)
+ * \param tgc Pointer to the TGC object
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannel(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate);
+
+/** \brief Enable/disable one channel output (OUTEN)
+ * \param tgc Pointer to the TGC object
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelOutput(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean immediate);
+
+/** \brief Enable/disable one channel for update (UPEN)
+ * \param tgc Pointer to the TGC object
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled);
+
+/** \brief Enable/disable one or more channels (ENDIS)
+ * \param tgc Pointer to the TGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannels(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate);
+
+/** \brief Enable/disable one or more channels output (OUTEN)
+ * \param tgc Pointer to the TGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param immediate If TRUE, the action is done immediately else, the action is done on TGC trigger (CTRL_TRIG)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsOutput(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, boolean immediate);
+
+/** \brief Enable/disable the TGC channels trigger
+ * \param tgc Pointer to the TGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsTrigger(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask);
+
+/** \brief Enable/disable one or more channels for update (UPEN)
+ * \param tgc Pointer to the TGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_enableChannelsUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask);
+
+/** \brief Enable/disable the time base trigger
+ * \param tgc Pointer to the TGC object
+ * \param enabled If TRUE, the trigger is enabled else disabled
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_enableTimeTrigger(Ifx_GTM_TOM_TGC *tgc, boolean enabled);
+
+/** \brief Reset one or more channels
+ * \param tgc Pointer to the TGC object
+ * \param resetMask Mask for the channel reset (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_resetChannels(Ifx_GTM_TOM_TGC *tgc, uint32 resetMask);
+
+/** \brief Enable/disable one channel for update (FUPD)
+ * \param tgc Pointer to the TGC object
+ * \param channel Channel index
+ * \param enabled Enable/ Disable choise of the feature
+ * \param resetEnabled Enable/ Disable reset choise of the feature
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelForceUpdate(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tom_Ch channel, boolean enabled, boolean resetEnabled);
+
+/** \brief Enable/disable one or more channels for the force update feature (FUPD)
+ * \param tgc Pointer to the TGC object
+ * \param enableMask Mask for the channel feature enable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param disableMask Mask for the channel feature disable (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \param resetEnableMask Mask for the enabled channels counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...) Channel 0, bit 1: channel 1, ...)
+ * \param resetDisableMask Mask for the disabled channels with no counter reset on force update (bit 0: Channel 0, bit 1: channel 1, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_setChannelsForceUpdate(Ifx_GTM_TOM_TGC *tgc, uint16 enableMask, uint16 disableMask, uint16 resetEnableMask, uint16 resetDisableMask);
+
+/** \brief Sets the trigger time base and time base value
+ * \param tgc Pointer to the TGC object
+ * \param base Time base used for comparison
+ * \param value Compare value that raise the trigger
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_setTimeTrigger(Ifx_GTM_TOM_TGC *tgc, IfxGtm_Tbu_Ts base, uint32 value);
+
+/** \brief Raise the trigger for the channel enable/disable settings, output enable settings, and force update event (CTRL_TRIG)
+ * \param tgc Pointer to the TGC object
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Tgc_trigger(Ifx_GTM_TOM_TGC *tgc);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE Ifx_GTM_TOM_CH *IfxGtm_Tom_Ch_getChannelPointer(Ifx_GTM_TOM *tom, IfxGtm_Tom_Ch channel)
+{
+ return (Ifx_GTM_TOM_CH *)((uint32)&tom->CH0.CTRL.U + 0x40 * channel);
+}
+
+
+IFX_INLINE void IfxGtm_Tom_Tgc_writeGlobalControl(Ifx_GTM_TOM_TGC *tgc, uint32 control)
+{
+ tgc->GLB_CTRL.U = control;
+}
+
+
+#endif /* IFXGTM_TOM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim/In/IfxGtm_Tim_In.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim/In/IfxGtm_Tim_In.c
new file mode 100644
index 0000000..590fc21
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim/In/IfxGtm_Tim_In.c
@@ -0,0 +1,341 @@
+/**
+ * \file IfxGtm_Tim_In.c
+ * \brief GTM IN details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Tim_In.h"
+#include "IfxGtm_bf.h"
+#include "string.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config)
+{
+ boolean result = TRUE;
+ Ifx_GTM_TIM_CH *channel;
+
+ IfxGtm_Tim_Ch channelIndex;
+ IfxGtm_Tim timIndex;
+ IfxGtm_Tim_In_Input input;
+
+ if (config->filter.inputPin != NULL_PTR)
+ {
+ channelIndex = config->filter.inputPin->channel;
+ timIndex = config->filter.inputPin->tim;
+
+ input = IfxGtm_Tim_In_Input_currentChannel;
+ }
+ else
+ {
+ channelIndex = config->channelIndex;
+ timIndex = config->timIndex;
+ input = config->filter.input;
+ }
+
+ channel = IfxGtm_Tim_getChannel(&config->gtm->TIM[timIndex], channelIndex);
+ driver->timIndex = config->timIndex;
+ driver->channelIndex = config->channelIndex;
+ driver->channel = channel;
+ driver->periodTick = 0;
+ driver->pulseLengthTick = 0;
+ driver->dataCoherent = FALSE;
+ driver->newData = FALSE;
+ driver->dataLost = FALSE;
+ driver->overflowCnt = FALSE;
+ driver->edgeCounterUpper = 0;
+
+ channel->CTRL.B.TIM_MODE = IfxGtm_Tim_Mode_pwmMeasurement;
+
+ IfxGtm_Tim_Ch_setClockSource(channel, config->capture.clock);
+
+ driver->captureClockFrequency = IfxGtm_Tim_Ch_getCaptureClockFrequency(config->gtm, channel);
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->capture.mode == Ifx_Pwm_Mode_leftAligned) || (config->capture.mode == Ifx_Pwm_Mode_rightAligned));
+
+ result &= (config->capture.mode == Ifx_Pwm_Mode_leftAligned) || (config->capture.mode == Ifx_Pwm_Mode_rightAligned);
+ channel->CTRL.B.DSL = config->capture.mode == Ifx_Pwm_Mode_leftAligned ? 1 : 0;
+
+ channel->CTRL.B.CNTS_SEL = IfxGtm_Tim_CntsSel_cntReg;
+ channel->CTRL.B.GPR0_SEL = IfxGtm_Tim_GprSel_cnts; /* Use CNTS as input for GPR0 */
+ channel->CTRL.B.GPR1_SEL = IfxGtm_Tim_GprSel_cnts; /* Use CNT as input for GPR1 */
+
+ /* Interrupt configuration */
+ if (config->isrPriority)
+ {
+ volatile Ifx_SRC_SRCR *src;
+ IfxGtm_Tim_Ch_setNotificationMode(channel, config->irqMode);
+ IfxGtm_Tim_Ch_setChannelNotification(channel, config->capture.irqOnNewVal,
+ config->capture.irqOnCntOverflow, config->capture.irqOnEcntOverflow, config->capture.irqOnDatalost);
+
+ src = IfxGtm_Tim_Ch_getSrcPointer(config->gtm, timIndex, channelIndex);
+ IfxSrc_init(src, config->isrProvider, config->isrPriority);
+ IfxSrc_enable(src);
+ }
+
+ /* Timeout configuration */
+ if (config->timeout.timeout > 0)
+ {
+ float32 clockFrequency;
+ sint32 timeout;
+ channel->TDUV.B.TCS = config->timeout.clock;
+ clockFrequency = IfxGtm_Tim_Ch_getTimeoutClockFrequency(config->gtm, channel);
+
+ timeout = (uint32)(config->timeout.timeout * clockFrequency) - 1;
+
+ if (timeout < 0)
+ {
+ timeout = 0;
+ }
+ else if (timeout >= (1 << IFX_GTM_TIM_CH_TDUV_TCS_MSK))
+ {
+ timeout = IFX_GTM_TIM_CH_TDUV_TCS_MSK;
+ result = FALSE;
+ }
+
+ channel->CTRL.B.TOCTRL = config->capture.mode == Ifx_Pwm_Mode_leftAligned ? IfxGtm_Tim_Timeout_risingEdge : IfxGtm_Tim_Timeout_fallingEdge;
+ channel->TDUV.B.TOV = timeout;
+
+ IfxGtm_Tim_Ch_setTimeoutNotification(channel, config->timeout.irqOnTimeout);
+ }
+
+ /* Input configuration */
+
+ config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_MODE_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_MODE_1_OFF - IFX_GTM_TIM_IN_SRC_MODE_0_OFF)); // MODE 0
+
+ switch (input)
+ {
+ case IfxGtm_Tim_In_Input_currentChannel:
+ config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 0
+ channel->CTRL.B.CICTRL = IfxGtm_Tim_Input_currentChannel;
+ break;
+ case IfxGtm_Tim_In_Input_adjacentChannel:
+ config->gtm->TIM[timIndex].IN_SRC.U = 1 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 0
+ channel->CTRL.B.CICTRL = IfxGtm_Tim_Input_adjacentChannel;
+ break;
+ case IfxGtm_Tim_In_Input_aux:
+ config->gtm->TIM[timIndex].IN_SRC.U = 2 << (IFX_GTM_TIM_IN_SRC_VAL_0_OFF + channelIndex * (IFX_GTM_TIM_IN_SRC_VAL_1_OFF - IFX_GTM_TIM_IN_SRC_VAL_0_OFF)); // VAL 1
+ break;
+ }
+
+ if (config->filter.inputPin != NULL_PTR)
+ {
+ IfxGtm_PinMap_setTimTin(config->filter.inputPin, config->filter.inputPinMode);
+ }
+
+ /*Filter configuration */
+ if ((config->filter.fallingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
+ || (config->filter.risingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none))
+ {
+ float32 clockFrequency;
+ sint32 fallingfilterTime;
+ sint32 risingfilterTime;
+
+ channel->CTRL.B.FLT_EN = 1;
+ channel->CTRL.B.FLT_CNT_FRQ = config->filter.clock;
+
+ clockFrequency = IfxGtm_Tim_Ch_getFilterClockFrequency(config->gtm, channel);
+
+ fallingfilterTime = (uint32)(config->filter.fallingEdgeFilterTime * clockFrequency) - 1;
+
+ if (fallingfilterTime < 0)
+ {
+ fallingfilterTime = 0;
+ }
+ else if (fallingfilterTime > (sint32)IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK)
+ {
+ fallingfilterTime = IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK;
+ result = FALSE;
+ }
+
+ channel->FLT_FE.B.FLT_FE = fallingfilterTime;
+
+ risingfilterTime = (uint32)(config->filter.risingEdgeFilterTime * clockFrequency) - 1;
+
+ if (risingfilterTime < 0)
+ {
+ risingfilterTime = 0;
+ }
+ else if (risingfilterTime > (sint32)IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK)
+ {
+ risingfilterTime = IFX_GTM_TIM_CH_FLT_FE_FLT_FE_MSK;
+ result = FALSE;
+ }
+
+ channel->FLT_RE.B.FLT_RE = risingfilterTime;
+
+ if (config->filter.fallingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
+ {
+ if (config->filter.fallingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation)
+ {
+ channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
+ }
+ else
+ {
+ channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_individualDeglitchTime;
+ channel->CTRL.B.FLT_CTR_FE = config->filter.fallingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown ? IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim_FilterCounter_hold;
+ }
+ }
+ else
+ {
+ channel->CTRL.B.FLT_MODE_FE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
+ channel->FLT_FE.B.FLT_FE = 0;
+ }
+
+ if (config->filter.risingEdgeMode != IfxGtm_Tim_In_ConfigFilterMode_none)
+ {
+ if (config->filter.risingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation)
+ {
+ channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
+ }
+ else
+ {
+ channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_individualDeglitchTime;
+ channel->CTRL.B.FLT_CTR_RE = config->filter.risingEdgeMode == IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown ? IfxGtm_Tim_FilterCounter_upDown : IfxGtm_Tim_FilterCounter_hold;
+ }
+ }
+ else
+ {
+ channel->CTRL.B.FLT_MODE_RE = IfxGtm_Tim_FilterMode_immediateEdgePropagation;
+ channel->FLT_RE.B.FLT_RE = 0;
+ }
+
+ IfxGtm_Tim_Ch_setFilterNotification(channel, config->filter.irqOnGlitch);
+ }
+
+ /* Enable TIM channel */
+ channel->CTRL.B.TIM_EN = 1;
+
+ return result;
+}
+
+
+void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm)
+{
+ memset(config, 0, sizeof(IfxGtm_Tim_In_Config));
+
+ config->gtm = gtm;
+ config->timIndex = IfxGtm_Tim_0;
+ config->channelIndex = IfxGtm_Tim_Ch_0;
+ config->irqMode = IfxGtm_IrqMode_pulseNotify;
+ config->isrProvider = IfxSrc_Tos_cpu0;
+ config->isrPriority = 0;
+ config->capture.irqOnNewVal = FALSE;
+ config->capture.irqOnCntOverflow = FALSE;
+ config->capture.irqOnEcntOverflow = FALSE;
+ config->capture.irqOnDatalost = FALSE;
+ config->capture.clock = IfxGtm_Cmu_Clk_0;
+ config->capture.mode = Ifx_Pwm_Mode_leftAligned;
+ config->timeout.irqOnTimeout = FALSE;
+ config->timeout.clock = IfxGtm_Cmu_Clk_0;
+ config->timeout.timeout = 0.0;
+ config->filter.input = IfxGtm_Tim_In_Input_currentChannel;
+ config->filter.inputPin = NULL_PTR;
+ config->filter.inputPinMode = IfxPort_InputMode_noPullDevice;
+ config->filter.risingEdgeMode = IfxGtm_Tim_In_ConfigFilterMode_none;
+ config->filter.fallingEdgeMode = IfxGtm_Tim_In_ConfigFilterMode_none;
+ config->filter.risingEdgeFilterTime = 0;
+ config->filter.fallingEdgeFilterTime = 0;
+ config->filter.clock = IfxGtm_Cmu_Tim_Filter_Clk_0;
+}
+
+
+void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver)
+{
+ IfxGtm_Tim_In_update(driver);
+}
+
+
+void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver)
+{
+ driver->dataLost = IfxGtm_Tim_Ch_isDataLostEvent(driver->channel);
+
+ if (driver->dataLost)
+ {
+ IfxGtm_Tim_Ch_clearDataLostEvent(driver->channel);
+ }
+
+ driver->glitch = IfxGtm_Tim_Ch_isGlitchEvent(driver->channel);
+
+ if (driver->glitch)
+ {
+ IfxGtm_Tim_Ch_clearGlitchEvent(driver->channel);
+ }
+
+ driver->newData = IfxGtm_Tim_Ch_isNewValueEvent(driver->channel);
+
+ if (driver->newData)
+ {
+ Ifx_GTM_TIM_CH_GPR0 gpr0;
+ Ifx_GTM_TIM_CH_GPR1 gpr1;
+
+ gpr0.U = driver->channel->GPR0.U;
+ gpr1.U = driver->channel->GPR1.U;
+ driver->periodTick = gpr1.B.GPR1;
+ driver->pulseLengthTick = gpr0.B.GPR0;
+ driver->dataCoherent = gpr0.B.ECNT == gpr1.B.ECNT;
+
+ // read the edge counter
+ driver->edgeCount = driver->channel->ECNT.B.ECNT;
+
+ if (IfxGtm_Tim_Ch_isEcntOverflowEvent(driver->channel))
+ {
+ driver->edgeCounterUpper++;
+ IfxGtm_Tim_Ch_clearEcntOverflowEvent(driver->channel);
+ }
+
+ driver->overflowCnt = IfxGtm_Tim_Ch_isCntOverflowEvent(driver->channel);
+
+ if (driver->overflowCnt)
+ {
+ driver->newData = FALSE;
+ IfxGtm_Tim_Ch_clearCntOverflowEvent(driver->channel);
+ }
+
+ IfxGtm_Tim_Ch_clearNewValueEvent(driver->channel);
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim/In/IfxGtm_Tim_In.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim/In/IfxGtm_Tim_In.h
new file mode 100644
index 0000000..59031c8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim/In/IfxGtm_Tim_In.h
@@ -0,0 +1,311 @@
+/**
+ * \file IfxGtm_Tim_In.h
+ * \brief GTM IN details
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Tim_In TIM Input Interface
+ * \ingroup IfxLld_Gtm_Tim
+ * \defgroup IfxLld_Gtm_Tim_In_DataStructures Data Structures
+ * \ingroup IfxLld_Gtm_Tim_In
+ * \defgroup IfxLld_Gtm_Tim_In_Enumerations Enumerations
+ * \ingroup IfxLld_Gtm_Tim_In
+ * \defgroup IfxLld_Gtm_Tim_In_Funtions Funtions
+ * \ingroup IfxLld_Gtm_Tim_In
+ */
+
+#ifndef IFXGTM_TIM_IN_H
+#define IFXGTM_TIM_IN_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_PinMap/IfxGtm_PinMap.h"
+#include "Gtm/Std/IfxGtm_Tim.h"
+#include "Gtm/Std/IfxGtm_Cmu.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "_Utilities/Ifx_Assert.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Tim_In_Enumerations
+ * \{ */
+/** \brief Config Filter Mode
+ */
+typedef enum
+{
+ IfxGtm_Tim_In_ConfigFilterMode_immediateEdgePropagation, /**< \brief Immediate edge propagation mode */
+ IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeUpDown, /**< \brief Individual deglitch time mode (Up Down) */
+ IfxGtm_Tim_In_ConfigFilterMode_individualDeglitchTimeHold, /**< \brief Individual deglitch time mode (Hold) */
+ IfxGtm_Tim_In_ConfigFilterMode_none /**< \brief No filter */
+} IfxGtm_Tim_In_ConfigFilterMode;
+
+/** \brief Input Source
+ */
+typedef enum
+{
+ IfxGtm_Tim_In_Input_currentChannel, /**< \brief Use the input from the current channel */
+ IfxGtm_Tim_In_Input_adjacentChannel, /**< \brief Use the input from the adjacent channel */
+ IfxGtm_Tim_In_Input_aux /**< \brief Use the input from the aux */
+} IfxGtm_Tim_In_Input;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Tim_In_DataStructures
+ * \{ */
+/** \brief Configuration structure for TIM capture
+ */
+typedef struct
+{
+ boolean irqOnNewVal; /**< \brief If TRUE, the interrupt on new value is enabled */
+ boolean irqOnCntOverflow; /**< \brief If TRUE, the interrupt on CNT overflow is enabled */
+ boolean irqOnEcntOverflow; /**< \brief If TRUE, the interrupt on ECNT (Edge counter) overflow is enabled */
+ boolean irqOnDatalost; /**< \brief If TRUE, the interrupt on data lost (GPR0, GPR1) is enabled */
+ IfxGtm_Cmu_Clk clock; /**< \brief Timer input clock */
+ Ifx_Pwm_Mode mode; /**< \brief PWM mode, only Ifx_Pwm_Mode_leftAligned and Ifx_Pwm_Mode_righAligned are supported */
+} IfxGtm_Tim_In_ConfigCapture;
+
+/** \brief Configuration structure for TIM filter
+ */
+typedef struct
+{
+ IfxGtm_Cmu_Tim_Filter_Clk clock; /**< \brief Timeout clock */
+ IfxGtm_Tim_In_ConfigFilterMode risingEdgeMode; /**< \brief Filter mode for rising edge */
+ IfxGtm_Tim_In_ConfigFilterMode fallingEdgeMode; /**< \brief Filter mode for falling edge */
+ float32 risingEdgeFilterTime; /**< \brief Rising edge filter time in second */
+ float32 fallingEdgeFilterTime; /**< \brief Falling edge filter time in second */
+ boolean irqOnGlitch; /**< \brief If TRUE, the interrupt on glitch is enabled */
+ IfxGtm_Tim_In_Input input; /**< \brief selected input */
+ IfxGtm_Tim_TinMap *inputPin; /**< \brief If defined, this value overwrites the IfxGtm_Tim_In_Config.filter.input, IfxGtm_Tim_In_Config.timIndex, IfxGtm_Tim_In_Config.channelIndex */
+ IfxPort_InputMode inputPinMode; /**< \brief Input pin mode */
+} IfxGtm_Tim_In_ConfigFilter;
+
+/** \brief Configuration structure for TIM timeout
+ */
+typedef struct
+{
+ IfxGtm_Cmu_Clk clock; /**< \brief Timeout clock */
+ float32 timeout; /**< \brief Timeout in second. Value of 0 disable the timeout functionality see 27.10.3 Timeout Detection Unit (TDU) */
+ boolean irqOnTimeout; /**< \brief If TRUE, the interrupt on timeout is enabled */
+} IfxGtm_Tim_In_ConfigTimeout;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tim_In_DataStructures
+ * \{ */
+/** \brief Driver Handle
+ */
+typedef struct
+{
+ Ifx_GTM_TIM_CH *channel; /**< \brief TIM channel used */
+ uint32 periodTick; /**< \brief Period value in clock ticks */
+ uint32 pulseLengthTick; /**< \brief Duty value in clock ticks */
+ boolean dataCoherent; /**< \brief TRUE, if the duty and period values are measured from the same period */
+ boolean overflowCnt; /**< \brief TRUE if the last measurement show an overflow in CNT */
+ boolean newData; /**< \brief TRUE when values are updated, and if none of the counter CNT, CNTS have overflowed */
+ boolean dataLost; /**< \brief TRUE if data are lost */
+ uint32 edgeCounterUpper; /**< \brief upper part of the edge counter */
+ boolean glitch; /**< \brief TRUE if glitch is detected */
+ float32 captureClockFrequency; /**< \brief Capture clock frequency in Hz */
+ IfxGtm_Tim timIndex; /**< \brief Index of the TIM module being used. */
+ IfxGtm_Tim_Ch channelIndex; /**< \brief Index of the TIM channel being used. */
+ uint16 edgeCount; /**< \brief number of edges counted. */
+} IfxGtm_Tim_In;
+
+/** \brief Configuration structure for TIM input capture
+ */
+typedef struct
+{
+ Ifx_GTM *gtm; /**< \brief GTM used */
+ IfxGtm_Tim timIndex; /**< \brief TIM index */
+ IfxGtm_Tim_Ch channelIndex; /**< \brief Channel index */
+ IfxGtm_IrqMode irqMode; /**< \brief Interrupt mode for the new value available */
+ IfxSrc_Tos isrProvider; /**< \brief Interrupt service provider for the timer interrupt */
+ Ifx_Priority isrPriority; /**< \brief Set the interrupt priority for new value available. If 0, no interrupt will be generated */
+ IfxGtm_Tim_In_ConfigCapture capture; /**< \brief Capture configuration */
+ IfxGtm_Tim_In_ConfigFilter filter; /**< \brief Filter configuration */
+ IfxGtm_Tim_In_ConfigTimeout timeout; /**< \brief Timeout configuration */
+} IfxGtm_Tim_In_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tim_In_Funtions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear the new data flag
+ * \param driver TIM Input object
+ * \return None
+ */
+IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver);
+
+/** \brief return the dutycycle in percent
+ * \param driver TIM Input object
+ * \param dataCoherent If true, the duty cycle has been calculated with coherent values for the period and duty, else the period and duty value are from 2 adjacent periods
+ * \return duty
+ */
+IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent);
+
+/** \brief Return the period in second
+ * \param driver TIM Input object
+ * \return period value in seconds
+ */
+IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver);
+
+/** \brief Return the period value in tick
+ * \param driver TIM Input object
+ * \return period value in ticks
+ */
+IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver);
+
+/** \brief Return the pulse length value in tick
+ * \param driver TIM Input object
+ * \return pulse length
+ */
+IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver);
+
+/** \brief Indicates if data were lost
+ * \param driver TIM Input object
+ * \return TRUE if Data is lost FALSE otherwise
+ */
+IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver);
+
+/** \brief Indicates if new data are present (new data flag)
+ * \param driver TIM Input object
+ * \return TRUE if New Data FALSE otherwise
+ */
+IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes the input capture object
+ * \param driver TIM Input object
+ * \param config Configuration structure for the input capture Timer
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tim_In_init(IfxGtm_Tim_In *driver, const IfxGtm_Tim_In_Config *config);
+
+/** \brief Initializes the configuration structure to default
+ * \param config Configuration structure for the input capture Timer
+ * \param gtm Pointer to GTM module
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tim_In_initConfig(IfxGtm_Tim_In_Config *config, Ifx_GTM *gtm);
+
+/** \brief will update the driver state\n
+ * To be called in the interrupt generated by the IfxGtm_Tim_In driver
+ * \param driver TIM Input object
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tim_In_onIsr(IfxGtm_Tim_In *driver);
+
+/** \brief Updates the period and duty cycle
+ * \param driver TIM Input object
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tim_In_update(IfxGtm_Tim_In *driver);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxGtm_Tim_In_clearNewData(IfxGtm_Tim_In *driver)
+{
+ driver->newData = FALSE;
+}
+
+
+IFX_INLINE float32 IfxGtm_Tim_In_getDutyPercent(IfxGtm_Tim_In *driver, boolean *dataCoherent)
+{
+ float32 duty;
+ boolean interruptState = IfxCpu_disableInterrupts();
+ duty = (float32)(driver->pulseLengthTick * 100) / driver->periodTick;
+ *dataCoherent = driver->dataCoherent;
+ IfxCpu_restoreInterrupts(interruptState);
+
+ return duty;
+}
+
+
+IFX_INLINE float32 IfxGtm_Tim_In_getPeriodSecond(IfxGtm_Tim_In *driver)
+{
+ return IfxGtm_Tim_In_getPeriodTicks(driver) / driver->captureClockFrequency;
+}
+
+
+IFX_INLINE sint32 IfxGtm_Tim_In_getPeriodTicks(IfxGtm_Tim_In *driver)
+{
+ return driver->periodTick;
+}
+
+
+IFX_INLINE sint32 IfxGtm_Tim_In_getPulseLengthTick(IfxGtm_Tim_In *driver)
+{
+ return driver->pulseLengthTick;
+}
+
+
+IFX_INLINE boolean IfxGtm_Tim_In_isDataLost(IfxGtm_Tim_In *driver)
+{
+ return driver->dataLost;
+}
+
+
+IFX_INLINE boolean IfxGtm_Tim_In_isNewData(IfxGtm_Tim_In *driver)
+{
+ return driver->newData;
+}
+
+
+#endif /* IFXGTM_TIM_IN_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.c
new file mode 100644
index 0000000..74a2b1f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.c
@@ -0,0 +1,171 @@
+/**
+ * \file IfxGtm_Tom_Pwm.c
+ * \brief GTM PWM details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Tom_Pwm.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config)
+{
+ boolean result = TRUE;
+
+ driver->gtm = config->gtm;
+ driver->tomIndex = config->tom;
+
+ Ifx_GTM_TOM *tomSFR = &config->gtm->TOM[config->tom];
+ driver->tom = tomSFR;
+ driver->tomChannel = config->tomChannel;
+
+ if (config->tomChannel <= 7)
+ {
+ driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
+ driver->tgc[1] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
+ }
+ else
+ {
+ driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
+ driver->tgc[1] = NULL_PTR; /* NOTE currently no concatenation between TOMs */
+ }
+
+ /* Initialize the timer part */
+ if (config->synchronousUpdateEnabled == 1)
+ {
+ IfxGtm_Tom_Tgc_enableChannelUpdate(driver->tgc[0], config->tomChannel, TRUE);
+ }
+
+ IfxGtm_Tom_Ch_setClockSource(tomSFR, config->tomChannel, config->clock);
+
+ IfxGtm_Tom_Tgc_setChannelForceUpdate(driver->tgc[0], config->tomChannel, TRUE, TRUE);
+
+ IfxGtm_Tom_Ch_setSignalLevel(tomSFR, config->tomChannel, config->signalLevel);
+
+ if (config->pin.outputPin != NULL_PTR)
+ {
+ IfxGtm_PinMap_setTomTout(config->pin.outputPin, config->pin.outputMode, config->pin.padDriver);
+ }
+
+ // enable and initialise interrupts if chosen
+ if ((config->interrupt.ccu0Enabled == 1) || (config->interrupt.ccu1Enabled == 1))
+ {
+ IfxGtm_Tom_Ch_setNotification(tomSFR, config->tomChannel, config->interrupt.mode, config->interrupt.ccu0Enabled, config->interrupt.ccu1Enabled);
+
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxGtm_Tom_Ch_getSrcPointer(config->gtm, config->tom, config->tomChannel);
+ IfxSrc_init(src, config->interrupt.isrProvider, config->interrupt.isrPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (config->synchronousUpdateEnabled == 1)
+ {
+ IfxGtm_Tom_Ch_setCompareZeroShadow(tomSFR, config->tomChannel, config->period);
+ IfxGtm_Tom_Ch_setCompareOneShadow(tomSFR, config->tomChannel, config->dutyCycle);
+ IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
+ }
+ else
+ {
+ IfxGtm_Tom_Ch_setCompareZero(tomSFR, config->tomChannel, config->period);
+ IfxGtm_Tom_Ch_setCompareOne(tomSFR, config->tomChannel, config->dutyCycle);
+ }
+
+ IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], config->tomChannel, TRUE, FALSE);
+ IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], config->tomChannel, TRUE, FALSE);
+
+ if (config->immediateStartEnabled == TRUE)
+ {
+ IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
+ }
+
+ return result;
+}
+
+
+void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm)
+{
+ config->gtm = gtm;
+ config->tom = IfxGtm_Tom_0;
+ config->tomChannel = IfxGtm_Tom_Ch_0;
+ config->clock = IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0;
+ config->period = 20;
+ config->dutyCycle = 10;
+ config->signalLevel = Ifx_ActiveState_high;
+ config->oneShotModeEnabled = FALSE;
+ config->synchronousUpdateEnabled = FALSE;
+ config->immediateStartEnabled = TRUE;
+ config->interrupt.ccu0Enabled = FALSE;
+ config->interrupt.ccu1Enabled = FALSE;
+ config->interrupt.mode = IfxGtm_IrqMode_pulseNotify;
+ config->interrupt.isrProvider = IfxSrc_Tos_cpu0;
+ config->interrupt.isrPriority = 0;
+ config->pin.outputPin = NULL_PTR;
+ config->pin.outputMode = IfxPort_OutputMode_pushPull;
+ config->pin.padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+}
+
+
+void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
+{
+ /* Enable channel if not enabled already */
+ IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], driver->tomChannel, TRUE, immediate);
+ IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], driver->tomChannel, TRUE, immediate);
+
+ /* Trigger the start now */
+ IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
+}
+
+
+void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate)
+{
+ /* Disable channels */
+ IfxGtm_Tom_Tgc_enableChannel(driver->tgc[0], driver->tomChannel, FALSE, immediate);
+ IfxGtm_Tom_Tgc_enableChannelOutput(driver->tgc[0], driver->tomChannel, FALSE, immediate);
+
+ /* Trigger the stop now */
+ IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h
new file mode 100644
index 0000000..7dc657f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.h
@@ -0,0 +1,233 @@
+/**
+ * \file IfxGtm_Tom_Pwm.h
+ * \brief GTM PWM details
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Tom_Pwm_Usage How to use the GTM TOM PWM Driver
+ * \ingroup IfxLld_Gtm_Tom_Pwm
+ *
+ * This interface allows to generate simple PWM signal on a TOM out put and can generate interrupts if enabled.
+ * this output can also be routed to port pin if required.
+ *
+ * \section Preparation Preparation
+ * \subsection Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection Variables Variables
+ * define global variables if necessary
+ *
+ * \code
+ * Ifx_GTM *gtm = &MODULE_GTM;
+ * #define TOM0_CH0_PRIO 10
+ * \endcode
+ *
+ * \subsection Interrupts Interrupts
+ * define Interrupts if needed
+ *
+ * \code
+ * IFX_INTERRUPT(TOM0Ch0_ISR, 0, TOM0_CH0_PRIO)
+ * {}
+ * \endcode
+ *
+ * \subsection Initialization Initialization
+ *
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler (TOM0Ch0_ISR, TOM0_CH0_PRIO);
+ *
+ * // enable GTM clock
+ * {
+ * float32 frequency = IfxGtm_Cmu_getModuleFrequency(gtm);
+ * // Enables the GTM
+ * IfxGtm_enable(gtm);
+ * // Set the global clock frequency to the max
+ * IfxGtm_Cmu_setGclkFrequency(gtm, frequency);
+ * // Set the CMU CLK0
+ * IfxGtm_Cmu_setClkFrequency(gtm, IfxGtm_Cmu_Clk_0, frequency);
+ * // FXCLK: used by TOM and CLK0: used by ATOM
+ * IfxGtm_Cmu_enableClocks(gtm, IFXGTM_CMU_CLKEN_FXCLK | IFXGTM_CMU_CLKEN_CLK0);
+ * }
+ *
+ * // initialise TOM
+ * IfxGtm_Tom_Pwm_Config tomConfig; \\configuration structure
+ * IfxGtm_Tom_Pwm_Driver tomHandle; \\ handle
+ *
+ * IfxGtm_Tom_Pwm_initConfig(&tomConfig, gtm);
+ *
+ * tomConfig.tomChannel = IfxGtm_Tom_Ch_0;
+ * tomConfig.period = 20;
+ * tomConfig.dutyCycle = 10;
+ * tomConfig.interrupt.ccu0Enabled = TRUE;
+ * tomConfig.interrupt.isrPriority = TOM0_CH0_PRIO;
+ * tomConfig.pin.outputPin = &IfxGtm_TOM0_0_TOUT106_P10_4_OUT;
+ *
+ * IfxGtm_Tom_Pwm_init(&tomHandle, &tomConfig);
+ * \endcode
+ *
+ * TOM will be now generating a PWM signal on the selected port pin while generating selected interrupt according to above configured period and duty cycle.
+ *
+ * \defgroup IfxLld_Gtm_Tom_Pwm TOM PWM Interface Driver
+ * \ingroup IfxLld_Gtm_Tom
+ * \defgroup IfxLld_Gtm_Tom_Pwm_DataStructures TOM PWM DataStructures
+ * \ingroup IfxLld_Gtm_Tom_Pwm
+ * \defgroup IfxLld_Gtm_Tom_Pwm_Pwm_Functions Pwm Functions
+ * \ingroup IfxLld_Gtm_Tom_Pwm
+ */
+
+#ifndef IFXGTM_TOM_PWM_H
+#define IFXGTM_TOM_PWM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_PinMap/IfxGtm_PinMap.h"
+#include "Gtm/Std/IfxGtm_Tom.h"
+#include "Gtm/Std/IfxGtm_Cmu.h"
+#include "Cpu/Std/IfxCpu.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Tom_Pwm_DataStructures
+ * \{ */
+/** \brief configuration structure for interrupts
+ */
+typedef struct
+{
+ boolean ccu0Enabled; /**< \brief Enable/Disable choice for CCU0 trigger interrupt */
+ boolean ccu1Enabled; /**< \brief Enable/Disable choice for CCU1 trigger interrupt */
+ IfxGtm_IrqMode mode; /**< \brief IRQ mode of interrupt */
+ IfxSrc_Tos isrProvider; /**< \brief Type of Service for Ccu0/1 interrupt */
+ Ifx_Priority isrPriority; /**< \brief Priority for Ccu0/1 interrupt */
+} IfxGtm_Tom_Pwm_Interrupt;
+
+/** \} */
+
+/** \brief configuration structure for output pin
+ */
+typedef struct
+{
+ IfxGtm_Tom_ToutMap *outputPin; /**< \brief output pin */
+ IfxPort_OutputMode outputMode; /**< \brief Output mode */
+ IfxPort_PadDriver padDriver; /**< \brief Pad driver */
+} IfxGtm_Tom_Pwm_pin;
+
+/** \addtogroup IfxLld_Gtm_Tom_Pwm_DataStructures
+ * \{ */
+/** \brief Configuration structure
+ */
+typedef struct
+{
+ Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
+ IfxGtm_Tom tom; /**< \brief Index of the TOM object used */
+ IfxGtm_Tom_Ch tomChannel; /**< \brief TOM channel used for the timer */
+ IfxGtm_Tom_Ch_ClkSrc clock; /**< \brief Timer input clock */
+ uint32 period; /**< \brief Period */
+ uint32 dutyCycle; /**< \brief Duty Cycle */
+ Ifx_ActiveState signalLevel; /**< \brief Signal Level */
+ boolean oneShotModeEnabled; /**< \brief Enable/Disable the one shot mode */
+ boolean synchronousUpdateEnabled; /**< \brief Synchronous or Asynchronous update */
+ IfxGtm_Tom_Pwm_Interrupt interrupt; /**< \brief configuration structure for interrupt */
+ IfxGtm_Tom_Pwm_pin pin; /**< \brief configuration structure for output pin */
+ boolean immediateStartEnabled; /**< \brief enable/disable immediate start of PWM */
+} IfxGtm_Tom_Pwm_Config;
+
+/** \brief Driver Handle
+ */
+typedef struct
+{
+ Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
+ IfxGtm_Tom tomIndex; /**< \brief Index of the TOM object used */
+ IfxGtm_Tom_Ch tomChannel; /**< \brief TOM channel used for the timer */
+ Ifx_GTM_TOM *tom; /**< \brief Pointer to the TOM object */
+ Ifx_GTM_TOM_TGC *tgc[2]; /**< \brief Pointer to the TGC object */
+} IfxGtm_Tom_Pwm_Driver;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tom_Pwm_Pwm_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the Timer object
+ * \param driver TOM Handle
+ * \param config Configuration structure for TOM Timer
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Pwm_init(IfxGtm_Tom_Pwm_Driver *driver, const IfxGtm_Tom_Pwm_Config *config);
+
+/** \brief Initializes the configuration structure to default
+ * \param config This parameter is Initialised by the function
+ * \param gtm Pointer to GTM module
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Pwm_initConfig(IfxGtm_Tom_Pwm_Config *config, Ifx_GTM *gtm);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief starts the PWM generation from the configured channel
+ * \param driver handle for the PWM device
+ * \param immediate immediate start or not
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Pwm_start(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate);
+
+/** \brief Stops the PWM generation from the configured channel
+ * \param driver handle for the PWM device
+ * \param immediate immediate start or not.
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Pwm_stop(IfxGtm_Tom_Pwm_Driver *driver, boolean immediate);
+
+#endif /* IFXGTM_TOM_PWM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/PwmHl/IfxGtm_Tom_PwmHl.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/PwmHl/IfxGtm_Tom_PwmHl.c
new file mode 100644
index 0000000..76b6ad7
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/PwmHl/IfxGtm_Tom_PwmHl.c
@@ -0,0 +1,774 @@
+/**
+ * \file IfxGtm_Tom_PwmHl.c
+ * \brief GTM PWMHL details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Tom_PwmHl.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "stddef.h"
+#include "string.h"
+
+/** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions
+ * \{ */
+/******************************************************************************/
+/*------------------------Inline Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Inverts the active state
+ * \param activeState Active state
+ * \return State
+ */
+IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState);
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Sets switched to OFF
+ * \param driver GTM TOM PWM driver
+ * \param tOn ON time
+ * \param shift Shift value in ticks
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
+
+/** \brief Updates the x output duty cycle in center aligned and center aligned inverted modes
+ * \param driver GTM TOM PWM driver
+ * \param tOn T on
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+/** \brief Updates the x output duty cycle in edge aligned modes (left and right aligned)
+ * \param driver GTM TOM PWM driver
+ * \param tOn T on
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+/** \brief Set the outputs to inactive
+ * \param driver GTM TOM PWM driver
+ * \param tOn T on
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+/** \brief Update Pulse
+ * \param driver GTM TOM PWM driver
+ * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
+
+/** \brief Set Pulse to OFF
+ * \param driver GTM TOM PWM driver
+ * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
+
+/** \brief Update Shift Center Aligned
+ * \param driver GTM TOM PWM driver
+ * \param tOn ON time
+ * \param shift Shift value in ticks
+ * \return None
+ */
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
+
+/** \} */
+
+/******************************************************************************/
+/*------------------------Private Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_STATIC IFX_CONST IfxGtm_Tom_PwmHl_Mode IfxGtm_Tom_PwmHl_modes[Ifx_Pwm_Mode_off + 1] = {
+ {Ifx_Pwm_Mode_centerAligned, FALSE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
+ {Ifx_Pwm_Mode_centerAlignedInverted, TRUE, &IfxGtm_Tom_PwmHl_updateCenterAligned, &IfxGtm_Tom_PwmHl_updateShiftCenterAligned, &IfxGtm_Tom_PwmHl_updatePulse },
+ {Ifx_Pwm_Mode_leftAligned, FALSE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
+ {Ifx_Pwm_Mode_rightAligned, TRUE, &IfxGtm_Tom_PwmHl_updateEdgeAligned, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulse },
+ {Ifx_Pwm_Mode_off, FALSE, &IfxGtm_Tom_PwmHl_updateOff, &IfxGtm_Tom_PwmHl_updateAndShiftOff, &IfxGtm_Tom_PwmHl_updatePulseOff}
+};
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE Ifx_ActiveState IfxGtm_Tom_PwmHl_invertActiveState(Ifx_ActiveState activeState)
+{
+ return activeState == Ifx_ActiveState_low ? Ifx_ActiveState_high : Ifx_ActiveState_low;
+}
+
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver)
+{
+ return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.deadtime);
+}
+
+
+float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver)
+{
+ return IfxStdIf_Timer_tickToS(driver->timer->base.clockFreq, driver->base.minPulse - driver->base.deadtime);
+}
+
+
+Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver)
+{
+ return driver->base.mode;
+}
+
+
+boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config)
+{
+ boolean result = TRUE;
+ uint16 channelMask;
+ uint16 channelsMask = 0;
+ uint32 channelIndex;
+ uint16 maskShift = 0;
+ IfxGtm_Tom_Timer *timer = config->timer;
+
+ driver->base.mode = Ifx_Pwm_Mode_init;
+ driver->timer = timer;
+ driver->base.setMode = 0;
+ driver->base.inverted = FALSE;
+ driver->base.ccxActiveState = config->base.ccxActiveState;
+ driver->base.coutxActiveState = config->base.coutxActiveState;
+ driver->base.channelCount = config->base.channelCount;
+
+ IfxGtm_Tom_PwmHl_setDeadtime(driver, config->base.deadtime);
+ IfxGtm_Tom_PwmHl_setMinPulse(driver, config->base.minPulse);
+
+ driver->tom = &(timer->gtm->TOM[config->tom]);
+
+ /* config->ccx[0] is used for the definition of the TGC */
+ if (config->ccx[0]->channel <= 7)
+ {
+ driver->tgc = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
+ }
+ else
+ {
+ driver->tgc = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
+ }
+
+ maskShift = (config->ccx[0]->channel <= 7) ? 0 : 8;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.channelCount <= IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS);
+
+ IfxGtm_Tom_Ch_ClkSrc clock = IfxGtm_Tom_Ch_getClockSource(timer->tom, timer->timerChannel);
+
+ for (channelIndex = 0; channelIndex < config->base.channelCount; channelIndex++)
+ {
+ IfxGtm_Tom_Ch channel;
+ /* CCX */
+ channel = config->ccx[channelIndex]->channel;
+ driver->ccx[channelIndex] = channel;
+ channelMask = 1 << (channel - maskShift);
+ channelsMask |= channelMask;
+
+ /* Initialize the timer part */
+ IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
+
+ /* Initialize the SOUR reset value and enable the channel */
+ IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, !driver->base.inverted
+ ? config->base.ccxActiveState
+ : IfxGtm_Tom_PwmHl_invertActiveState(config->base.ccxActiveState));
+ IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelMask, 0, TRUE); /* Write the SOUR outout with !SL */
+ IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelMask, 0, TRUE);
+
+ /* Set the SL to the required level for run time */
+ IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, driver->base.inverted
+ ? config->base.ccxActiveState
+ : IfxGtm_Tom_PwmHl_invertActiveState(config->base.ccxActiveState));
+ IfxGtm_Tom_Ch_setResetSource(driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
+ IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
+ IfxGtm_Tom_Ch_setCounterValue(driver->tom, channel, IfxGtm_Tom_Timer_getOffset(driver->timer));
+
+ /*Initialize the port */
+ if (config->initPins == TRUE)
+ {
+ IfxGtm_PinMap_setTomTout(config->ccx[channelIndex],
+ config->base.outputMode, config->base.outputDriver);
+ IfxPort_setPinState(config->ccx[channelIndex]->pin.port, config->ccx[channelIndex]->pin.pinIndex, config->base.ccxActiveState ? IfxPort_State_low : IfxPort_State_high);
+ }
+
+ /* COUTX */
+ channel = config->coutx[channelIndex]->channel;
+ driver->coutx[channelIndex] = channel;
+ channelMask = 1 << (channel - maskShift);
+ channelsMask |= channelMask;
+
+ /* Initialize the timer part */
+ IfxGtm_Tom_Ch_setClockSource(driver->tom, channel, clock);
+
+ /* Initialize the SOUR reset value, SL and enable the channel */
+ IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, driver->base.inverted
+ ? IfxGtm_Tom_PwmHl_invertActiveState(config->base.coutxActiveState)
+ : config->base.coutxActiveState);
+ IfxGtm_Tom_Tgc_enableChannels(driver->tgc, channelMask, 0, TRUE);
+ IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc, channelMask, 0, TRUE);
+
+ IfxGtm_Tom_Ch_setResetSource(driver->tom, channel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
+ IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, channel, IfxGtm_Tom_Ch_OutputTrigger_forward);
+ IfxGtm_Tom_Ch_setCounterValue(driver->tom, channel, IfxGtm_Tom_Timer_getOffset(driver->timer));
+
+ /*Initialize the port */
+ if (config->initPins == TRUE)
+ {
+ IfxGtm_PinMap_setTomTout(config->coutx[channelIndex],
+ config->base.outputMode, config->base.outputDriver);
+ IfxPort_setPinState(config->coutx[channelIndex]->pin.port, config->coutx[channelIndex]->pin.pinIndex, config->base.coutxActiveState ? IfxPort_State_low : IfxPort_State_high);
+ }
+ }
+
+ IfxGtm_Tom_PwmHl_setMode(driver, Ifx_Pwm_Mode_off);
+
+ Ifx_TimerValue tOn[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS] = {0};
+ IfxGtm_Tom_PwmHl_updateOff(driver, tOn); /* tOn do not need defined values */
+
+ /* Transfer the shadow registers */
+ IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, channelsMask, 0, 0, 0);
+ IfxGtm_Tom_Tgc_trigger(driver->tgc);
+ IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc, 0, channelsMask, 0, 0);
+
+ /* Enable timer to update the channels */
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ IfxGtm_Tom_Timer_addToChannelMask(timer, driver->ccx[channelIndex]);
+ IfxGtm_Tom_Timer_addToChannelMask(timer, driver->coutx[channelIndex]);
+ }
+
+ return result;
+}
+
+
+void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config)
+{
+ IfxStdIf_PwmHl_initConfig(&config->base);
+ config->timer = NULL_PTR;
+ config->tom = IfxGtm_Tom_0;
+ config->ccx = NULL_PTR;
+ config->coutx = NULL_PTR;
+ config->initPins = TRUE;
+}
+
+
+boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime)
+{
+ Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, deadtime);
+ driver->base.deadtime = value;
+
+ return TRUE;
+}
+
+
+boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse)
+{
+ Ifx_TimerValue value = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, minPulse);
+
+ driver->base.minPulse = value + driver->base.deadtime;
+ driver->base.maxPulse = driver->timer->base.period - driver->base.minPulse;
+
+ return TRUE;
+}
+
+
+boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode)
+{
+ boolean result = TRUE;
+ IfxGtm_Tom_PwmHl_Base *base = &driver->base;
+
+ if (base->mode != mode)
+ {
+ if ((mode > Ifx_Pwm_Mode_off) || (IfxGtm_Tom_PwmHl_modes[mode].update == NULL_PTR))
+ {
+ mode = Ifx_Pwm_Mode_off;
+ result = FALSE;
+ }
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mode == IfxGtm_Tom_PwmHl_modes[mode].mode);
+
+ base->mode = mode;
+ driver->update = IfxGtm_Tom_PwmHl_modes[mode].update;
+ driver->updateAndShift = IfxGtm_Tom_PwmHl_modes[mode].updateAndShift;
+ driver->updatePulse = IfxGtm_Tom_PwmHl_modes[mode].updatePulse;
+
+ if (base->mode != Ifx_Pwm_Mode_off)
+ {
+ base->inverted = IfxGtm_Tom_PwmHl_modes[mode].inverted;
+ }
+ else
+ { /* Keep previous inverted for off mode */
+ }
+
+ if (base->inverted)
+ {
+ driver->ccxTemp = driver->coutx;
+ driver->coutxTemp = driver->ccx;
+ }
+ else
+ {
+ driver->ccxTemp = driver->ccx;
+ driver->coutxTemp = driver->coutx;
+ }
+
+ { /* Workaround to enable the signal inversion required for center aligned inverted
+ * and right aligned modes */
+ /** \note that changing signal level may produce short circuit at the power stage,
+ * in which case the inverter must be disable during this action. */
+
+ /* Ifx_Pwm_Mode_centerAligned and Ifx_Pwm_Mode_LeftAligned use inverted=FALSE */
+ /* Ifx_Pwm_Mode_centerAlignedInverted and Ifx_Pwm_Mode_RightAligned use inverted=TRUE */
+ uint32 channelIndex;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ IfxGtm_Tom_Ch channel;
+
+ channel = driver->ccx[channelIndex];
+ IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, base->inverted
+ ? base->ccxActiveState
+ : IfxGtm_Tom_PwmHl_invertActiveState(driver->base.ccxActiveState));
+
+ channel = driver->coutx[channelIndex];
+ IfxGtm_Tom_Ch_setSignalLevel(driver->tom, channel, base->inverted
+ ? IfxGtm_Tom_PwmHl_invertActiveState(driver->base.coutxActiveState)
+ : base->coutxActiveState);
+ }
+ }
+ }
+
+ return result;
+}
+
+
+void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
+{
+ driver->update(driver, tOn);
+}
+
+
+void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
+{
+ driver->updateAndShift(driver, tOn, shift);
+}
+
+
+void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
+{
+ driver->updatePulse(driver, tOn, offset);
+}
+
+
+void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt)
+{
+ /* Dummy Function for StdIf compile */
+ IFX_UNUSED_PARAMETER(driver)
+ IFX_UNUSED_PARAMETER(activeCh)
+ IFX_UNUSED_PARAMETER(stuckSt)
+}
+
+
+boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver)
+{
+ /* Ensure the stdif is reset to zeros */
+ memset(stdif, 0, sizeof(IfxStdIf_PwmHl));
+
+ /* *INDENT-OFF* Note: this file was indented manually by the author. */
+ /* Set the API link */
+ stdif->driver = driver;
+ stdif->setDeadtime = (IfxStdIf_PwmHl_SetDeadtime )&IfxGtm_Tom_PwmHl_setDeadtime;
+ stdif->getDeadtime = (IfxStdIf_PwmHl_GetDeadtime )&IfxGtm_Tom_PwmHl_getDeadtime;
+ stdif->setMinPulse = (IfxStdIf_PwmHl_SetMinPulse )&IfxGtm_Tom_PwmHl_setMinPulse;
+ stdif->getMinPulse = (IfxStdIf_PwmHl_GetMinPulse )&IfxGtm_Tom_PwmHl_getMinPulse;
+ stdif->getMode = (IfxStdIf_PwmHl_GetMode )&IfxGtm_Tom_PwmHl_getMode;
+ stdif->setMode = (IfxStdIf_PwmHl_SetMode )&IfxGtm_Tom_PwmHl_setMode;
+ stdif->setOnTime = (IfxStdIf_PwmHl_SetOnTime )&IfxGtm_Tom_PwmHl_setOnTime;
+ stdif->setOnTimeAndShift = (IfxStdIf_PwmHl_SetOnTimeAndShift)&IfxGtm_Tom_PwmHl_setOnTimeAndShift;
+ stdif->setPulse = (IfxStdIf_PwmHl_SetPulse )&IfxGtm_Tom_PwmHl_setPulse;
+ stdif->setupChannels = (IfxStdIf_PwmHl_SetupChannels )&IfxGtm_Tom_PwmHl_setupChannels;
+ IfxGtm_Tom_Timer_stdIfTimerInit(&stdif->timer, driver->timer);
+ /* *INDENT-ON* */
+
+ return TRUE;
+}
+
+
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateAndShiftOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
+{
+ IFX_UNUSED_PARAMETER(tOn)
+ IFX_UNUSED_PARAMETER(shift)
+
+ IfxGtm_Tom_PwmHl_updateOff(driver, NULL_PTR);
+}
+
+
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
+{
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+ Ifx_TimerValue deadtime = driver->base.deadtime;
+
+ period = driver->timer->base.period;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue cm0, cm1;
+ x = tOn[channelIndex];
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if ((x < driver->base.minPulse) || (x <= deadtime))
+ { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
+ x = 0;
+ }
+ else if (x > driver->base.maxPulse)
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
+ period + 1 /* No compare event */,
+ 2 /* 1st compare event (issue: expected to be 1) */ + deadtime);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
+ period + 2 /* No compare event, issues has been seen with +1 */,
+ 2 /* 1st compare event (issue: expected to be 1) */);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ cm1 = (period - x) / 2; // CM1
+ cm0 = (period + x) / 2; // CM0
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ }
+}
+
+
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateEdgeAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
+{
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+ Ifx_TimerValue deadtime = driver->base.deadtime;
+
+ period = driver->timer->base.period;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue cm0, cm1;
+ x = tOn[channelIndex];
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if ((x < driver->base.minPulse) || (x <= deadtime))
+ { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
+ x = 0;
+ }
+ else if (x > driver->base.maxPulse)
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
+ period + 1 /* No compare event */,
+ 2 /* 1st compare event (issue: expected to be 1) */ + deadtime);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
+ period + 2 /* No compare event, issues has been seen with +1 */,
+ 2 /* 1st compare event (issue: expected to be 1) */);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ cm1 = 2; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
+ cm0 = x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ }
+}
+
+
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateOff(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn)
+{
+ IFX_UNUSED_PARAMETER(tOn)
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+
+ period = driver->timer->base.period;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
+ 2 /* 1 will keep the previous level */, period + 2);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], period + 1, 2);
+ }
+}
+
+
+IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
+{
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+
+ period = driver->timer->base.period;
+
+ /* Top channels */
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue o;
+ Ifx_TimerValue cm0, cm1;
+
+ x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex]);
+ o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex]);
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if ((x < driver->base.minPulse) || (o > period))
+ {
+ x = 0;
+ }
+ else if ((x > driver->base.maxPulse) || (o + x > period))
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
+ period + 1 /* No compare event */,
+ 2 /* 1st compare event (issue: expected to be 1)*/);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
+ cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
+ }
+ }
+
+ /* Bottom channels */
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue o;
+ Ifx_TimerValue cm0, cm1;
+
+ x = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, tOn[channelIndex + driver->base.channelCount]);
+ o = IfxStdIf_Timer_sToTick(driver->timer->base.clockFreq, offset[channelIndex + driver->base.channelCount]);
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if (x < driver->base.minPulse)
+ {
+ x = 0;
+ }
+ else if (x > driver->base.maxPulse)
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
+ period + 2 /* No compare event, issues has been seen with +1 */,
+ 2 /* 1st compare event (issue: expected to be 1)*/);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ cm1 = 2 + o; // CM1, set to 2 due to a GTM issue. should be 1 according to spec
+ cm0 = o + x; // CM0, set to x+2 due to a GTM issue. should be x+1 according to spec
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0, cm1);
+ }
+ }
+}
+
+
+IFX_STATIC void IfxGtm_Tom_PwmHl_updatePulseOff(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset)
+{
+ IFX_UNUSED_PARAMETER(tOn)
+ IFX_UNUSED_PARAMETER(offset)
+ IfxGtm_Tom_PwmHl_updateOff(driver, NULL_PTR);
+}
+
+
+IFX_STATIC void IfxGtm_Tom_PwmHl_updateShiftCenterAligned(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift)
+{
+ uint8 channelIndex;
+ Ifx_TimerValue period;
+ Ifx_TimerValue deadtime = driver->base.deadtime;
+
+ period = driver->timer->base.period;
+
+ for (channelIndex = 0; channelIndex < driver->base.channelCount; channelIndex++)
+ {
+ Ifx_TimerValue x; /* x=period*dutyCycle, x=OnTime+deadTime */
+ Ifx_TimerValue s; /* Shift value */
+ Ifx_TimerValue cm0, cm1;
+ x = tOn[channelIndex];
+
+ if (driver->base.inverted != FALSE)
+ {
+ x = period - x;
+ }
+ else
+ {}
+
+ if ((x < driver->base.minPulse) || (x <= deadtime))
+ { /* For deadtime condition: avoid leading edge of top channel to occur after the trailing edge */
+ x = 0;
+ }
+ else if (x > driver->base.maxPulse)
+ {
+ x = period;
+ }
+ else
+ {}
+
+ /* Special handling due to GTM issue */
+ if (x == period)
+ { /* 100% duty cycle */
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex],
+ period + 1 /* No compare event */,
+ 2 /* 1st compare event (issue: expected to be 1)*/ + deadtime);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex],
+ period + 2 /* No compare event, issues has been seen with +1 */,
+ 2 /* 1st compare event (issue: expected to be 1)*/);
+ }
+ else if (x == 0)
+ {
+ cm0 = 1;
+ cm1 = period + 2;
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ else
+ { /* x% duty cycle */
+ s = shift[channelIndex];
+
+ if (s > 0)
+ {
+ s = __minX(s, (period - x) / 2 - 1);
+ }
+ else
+ {
+ s = __maxX(s, (x - period) / 2 + 1);
+ }
+
+ cm1 = s + (period - x) / 2; // CM1
+ cm0 = s + (period + x) / 2; // CM0
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->ccxTemp[channelIndex], cm0, cm1 + deadtime);
+ IfxGtm_Tom_Ch_setCompareShadow(driver->tom, driver->coutxTemp[channelIndex], cm0 + deadtime, cm1);
+ }
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/PwmHl/IfxGtm_Tom_PwmHl.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/PwmHl/IfxGtm_Tom_PwmHl.h
new file mode 100644
index 0000000..63c9a28
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/PwmHl/IfxGtm_Tom_PwmHl.h
@@ -0,0 +1,350 @@
+/**
+ * \file IfxGtm_Tom_PwmHl.h
+ * \brief GTM PWMHL details
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Tom_PwmHl_Usage How to use the GTM TOM PWM Driver
+ * \ingroup IfxLld_Gtm_Tom_PwmHl
+ *
+ * This driver implements the PWM functionalities as defined by \ref library_srvsw_stdif_pwmhl.
+ * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_pwmhl "standard interface APIs".
+ *
+ * \section specific Specific implementation
+ * The PWM driver is a concatenation of a \ref IfxLld_Gtm_Tom_Timer "timer" with additional PWM generation cells.
+ *
+ * The timer is implemented as described in \ref IfxLld_Gtm_Tom_Timer, it generate an internal trigger
+ * that is used to synchronize all the TOM channel used (shown in red in the pictures below).
+ *
+ * The picture below presents two configuration examples:
+ * - On the left, the timer and trigger are generated using the same TOM channel CH0. The 3 dual-complementary
+ * PWMs, CCx and COUTx, are generated using 6 additional TOM channels (CH1 to Ch6).
+ * - On the right, the timer and the trigger uses separate TOM channels to allow the triggering of the ADC
+ * conversions. The order of the CCx and COUTx has been allocated freely between CH9 up to CH14.
+ *
+ * \image html "IfxGtm_Tom_PwmHl-0.png" "PWM implementations on GTM TOM"
+ *
+ *
+ * Each of the TOM channel used for the generation of the CCx and COUTx signals are configured as in the figure below:
+ *
+ * \image html "IfxGtm_Tom_PwmHl-1.png" "TOM channel configuration".
+ *
+ * The internal trigger (red line) is generated by the \ref IfxLld_Gtm_Tom_Timer "timer" on timer rest and used by the
+ * TOM PWM channels to reset the counters CN0 and transfer the shadow values saved in SR0 and SR1 to the
+ * CM0 and CM1 registers. When the counter CN0 reach the values of the CM0 or CM1 compare registers,
+ * a rising or falling edge is generated on the output PWM signal. The signal active state configuration
+ * define which of the CM0 or CM1 is generating the falling or rising edge.
+ *
+ * This trigger mechanism ensure that all the PWM channels, period and trigger are updated at the
+ * exact same time, avoiding any possibility for glitch or incoherent signals.
+ *
+ * The clock use is the same as the timer clock.
+ *
+ * In order to ensure a coherent update of all registers, the internal trigger must be disable before updating
+ * the timer, trigger and PWM duty cycles shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.
+ *
+ * \subsection features Features
+ * - This implementation allows from 1 up to 3 dual-complementary PWM channels.
+ * - Resources used:
+ * - Additionally to the linked timer resources used, the following resources are used:
+ * - 2 TOM channels per PWM channels
+ * - All TOM channels used must be own by the same TOM and TGC as for the linked timer
+ * - The TOM channel used for the timer must always have a lower index than the TOM channels
+ * used for the pwm.
+ * - All TOM channels used (including the timer and the trigger) must be contiguous but the order of the TOM channels is free.
+ *
+ *
+ * For a detailed configuration of the microcontroller, see \ref IfxGtm_Tom_PwmHl_init().
+ *
+ * \section example Usage Example
+ * Initialisation is done by, e.g:
+ * \code
+ * IfxGtm_Tom_PwmHl_Config driverConfig;
+ * IfxGtm_Tom_PwmHl driverData;
+ * IfxStdIf_PwmHl pwmhl;
+ * IfxGtm_Tom_PwmHl_initConfig(&driverConfig, &MODULE_GTM);
+ * IfxGtm_Tom_PwmHl_init(&driverData, &driverConfig);
+ * IfxGtm_Tom_PwmHl_stdIfPwmHlInit(pwmhl, &driverData);
+ * \endcode
+ *
+ * During run-time, \ref library_srvsw_stdif_pwmhl "the interface functions" shall be used, e.g.:
+ * \code
+ * IfxStdIf_Timer* timer = IfxStdIf_PwmHl_getTimer(pwmhl);
+ * Ifx_TimerValue onTime[3]; // assume configured for three HL channels
+ *
+ * onTime[0] = 10;
+ * onTime[1] = 20;
+ * onTime[2] = 30;
+ *
+ * IfxStdIf_Timer_disableUpdate(timer);
+ * IfxStdIf_Timer_setPeriod(timer, period);
+ * IfxStdIf_PwmHl_setOnTime(pwmhl, onTime);
+ * IfxStdIf_Timer_applyUpdate(timer);
+ * \endcode
+ *
+ * \defgroup IfxLld_Gtm_Tom_PwmHl TOM PWM HL Interface Driver
+ * \ingroup IfxLld_Gtm_Tom
+ * \defgroup IfxLld_Gtm_Tom_PwmHl_Data_Structures Data Structures
+ * \ingroup IfxLld_Gtm_Tom_PwmHl
+ * \defgroup IfxLld_Gtm_Tom_PwmHl_PwmHl_Functions PwmHl Functions
+ * \ingroup IfxLld_Gtm_Tom_PwmHl
+ * \defgroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions PwmHl StdIf Functions
+ * \ingroup IfxLld_Gtm_Tom_PwmHl
+ */
+
+#ifndef IFXGTM_TOM_PWMHL_H
+#define IFXGTM_TOM_PWMHL_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "StdIf/IfxStdIf_PwmHl.h"
+#include "Gtm/Tom/Timer/IfxGtm_Tom_Timer.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Maximal number of channels handled by the driver. One channel has a top and bottom pwm output
+ * Limited to 3 because the PWM channels used must be owned by the same TGC
+ */
+#define IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS (3)
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+typedef struct IfxGtm_Tom_PwmHl_s IfxGtm_Tom_PwmHl;
+
+typedef void (*IfxGtm_Tom_PwmHl_Update)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+typedef void (*IfxGtm_Tom_PwmHl_UpdateShift)(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
+
+typedef void (*IfxGtm_Tom_PwmHl_UpdatePulse)(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Tom_PwmHl_Data_Structures
+ * \{ */
+/** \brief Multi-channels PWM object definition (channels only)
+ */
+typedef struct
+{
+ Ifx_TimerValue deadtime; /**< \brief Dead time between the top and bottom channel in ticks */
+ Ifx_TimerValue minPulse; /**< \brief minimum pulse that is output, shorter pulse time will be output as 0% duty cycle */
+ Ifx_TimerValue maxPulse; /**< \brief internal parameter */
+ Ifx_Pwm_Mode mode; /**< \brief actual PWM mode */
+ sint8 setMode; /**< \brief A non zero flag indicates that the PWM mode is being modified */
+ Ifx_ActiveState ccxActiveState; /**< \brief Top PWM active state */
+ Ifx_ActiveState coutxActiveState; /**< \brief Bottom PWM active state */
+ boolean inverted; /**< \brief Flag indicating the center aligned inverted mode (TRUE) */
+ uint8 channelCount; /**< \brief Number of PWM channels, one channel is made of a top and bottom channel */
+} IfxGtm_Tom_PwmHl_Base;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tom_PwmHl_Data_Structures
+ * \{ */
+/** \brief GTM TOM: PWM HL configuration
+ */
+typedef struct
+{
+ IfxStdIf_PwmHl_Config base; /**< \brief PWM HL standard interface configuration */
+ IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
+ IfxGtm_Tom tom; /**< \brief TOM unit used */
+ IFX_CONST IfxGtm_Tom_ToutMapP *ccx; /**< \brief Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important. */
+ IFX_CONST IfxGtm_Tom_ToutMapP *coutx; /**< \brief Pointer to an array of size base.channelCount/2 containing the channels used. All channels used for ccx and coutx must be adjacent to the channel used for the timer, order is not important */
+ boolean initPins; /**< \brief TRUE: Initialize pins in driver
+ * FALSE: Don't initialize pins in driver: user handles separately */
+} IfxGtm_Tom_PwmHl_Config;
+
+/** \brief Structure for PWM configuration
+ */
+typedef struct
+{
+ Ifx_Pwm_Mode mode; /**< \brief Pwm Mode */
+ boolean inverted; /**< \brief Inverted configuration for the selected mode */
+ IfxGtm_Tom_PwmHl_Update update; /**< \brief update call back function for the selected mode */
+ IfxGtm_Tom_PwmHl_UpdateShift updateAndShift; /**< \brief update shift call back function for the selected mode */
+ IfxGtm_Tom_PwmHl_UpdatePulse updatePulse; /**< \brief update pulse call back function for the selected mode */
+} IfxGtm_Tom_PwmHl_Mode;
+
+/** \brief GTM TOM PWM driver
+ */
+struct IfxGtm_Tom_PwmHl_s
+{
+ IfxGtm_Tom_PwmHl_Base base; /**< \brief Multi-channels PWM object definition (channels only) */
+ IfxGtm_Tom_Timer *timer; /**< \brief Pointer to the linked timer object */
+ IfxGtm_Tom_PwmHl_Update update; /**< \brief Update function for actual selected mode */
+ IfxGtm_Tom_PwmHl_UpdateShift updateAndShift; /**< \brief Update shift function for actual selected mode */
+ IfxGtm_Tom_PwmHl_UpdatePulse updatePulse; /**< \brief Update pulse function for actual selected mode */
+ Ifx_GTM_TOM *tom; /**< \brief TOM unit used */
+ Ifx_GTM_TOM_TGC *tgc; /**< \brief TGC unit used */
+ IfxGtm_Tom_Ch ccx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the CCCX outputs */
+ IfxGtm_Tom_Ch coutx[IFXGTM_TOM_PWMHL_MAX_NUM_CHANNELS]; /**< \brief TOM channels used for the OUTX outputs */
+ IfxGtm_Tom_Ch *ccxTemp; /**< \brief cached value */
+ IfxGtm_Tom_Ch *coutxTemp; /**< \brief cached value */
+};
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes the timer object
+ * note To ensure that the channels counter are reset by the timer and do not overflow, leading to random signal on the output, the timer must be started before the call to this function.
+ * Note: all PWM channels must use the same TGC
+ * Note: the current implementation must use the same TGC for the timer and PWM channels
+ * \param driver GTM TOM PWM driver
+ * \param config GTM TOM: PWM HL configuration
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_PwmHl_init(IfxGtm_Tom_PwmHl *driver, const IfxGtm_Tom_PwmHl_Config *config);
+
+/** \brief Initialize the configuration structure to default
+ * \param config Channel configuration. This parameter is Initialised by the function
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_PwmHl_initConfig(IfxGtm_Tom_PwmHl_Config *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tom_PwmHl_PwmHl_StdIf_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the dead time
+ * \see IfxStdIf_PwmHl_GetDeadtime
+ * \param driver GTM TOM PWM driver
+ * \return Dead Time
+ */
+IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getDeadtime(IfxGtm_Tom_PwmHl *driver);
+
+/** \brief Returns the minimum pulse
+ * \see IfxStdIf_PwmHl_GetMinPulse
+ * \param driver GTM TOM PWM driver
+ * \return Min Pulse
+ */
+IFX_EXTERN float32 IfxGtm_Tom_PwmHl_getMinPulse(IfxGtm_Tom_PwmHl *driver);
+
+/** \brief Returns Pwm mode
+ * \see IfxStdIf_PwmHl_GetMode
+ * \param driver GTM TOM PWM driver
+ * \return Pwm mode
+ */
+IFX_EXTERN Ifx_Pwm_Mode IfxGtm_Tom_PwmHl_getMode(IfxGtm_Tom_PwmHl *driver);
+
+/** \brief Sets the dead time
+ * \see IfxStdIf_PwmHl_setDeadtime
+ * \param driver GTM TOM PWM driver
+ * \param deadtime Dead time value
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setDeadtime(IfxGtm_Tom_PwmHl *driver, float32 deadtime);
+
+/** \brief Sets the minimum pulse
+ * \see IfxStdIf_PwmHl_setMinPulse
+ * \param driver GTM TOM PWM driver
+ * \param minPulse Minimum pulse
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMinPulse(IfxGtm_Tom_PwmHl *driver, float32 minPulse);
+
+/** \brief Sets the PWM mode, the mode is only applied after setOnTime() + applyUpdate()
+ * \see IfxStdIf_PwmHl_SetMode
+ * \param driver GTM TOM PWM driver
+ * \param mode Pwm mode
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_PwmHl_setMode(IfxGtm_Tom_PwmHl *driver, Ifx_Pwm_Mode mode);
+
+/** \brief Sets the ON time
+ * \see IfxStdIf_PwmHl_SetOnTime
+ * \param driver GTM TOM PWM driver
+ * \param tOn ON time
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTime(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn);
+
+/** \brief Sets the ON time and Shift
+ * \param driver GTM TOM PWM driver
+ * \param tOn ON time
+ * \param shift Shift value in ticks
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_PwmHl_setOnTimeAndShift(IfxGtm_Tom_PwmHl *driver, Ifx_TimerValue *tOn, Ifx_TimerValue *shift);
+
+/** \brief Sets the ON time and offset, all switched are independent
+ * \param driver GTM TOM PWM driver
+ * \param tOn ON times. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \param offset Offset value in ticks. Phase 0 top, phase 1 top, ... phase 0 bottom, phase 1 botteom, ...
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_PwmHl_setPulse(IfxGtm_Tom_PwmHl *driver, float32 *tOn, float32 *offset);
+
+/** \brief Set up channels
+ * \see IfxStdIf_PwmHl_SetupChannels
+ * \param driver GTM TOM PWM driver
+ * \param activeCh Active channel
+ * \param stuckSt Stuck state
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_PwmHl_setupChannels(IfxGtm_Tom_PwmHl *driver, boolean *activeCh, boolean *stuckSt);
+
+/** \brief Initialises the statndard interface Pwm
+ * \param stdif Standard interface object, will be initialized by the function
+ * \param driver Interface driver to be used by the standard interface. must be initialised separately
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_PwmHl_stdIfPwmHlInit(IfxStdIf_PwmHl *stdif, IfxGtm_Tom_PwmHl *driver);
+
+/** \} */
+
+#endif /* IFXGTM_TOM_PWMHL_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Timer/IfxGtm_Tom_Timer.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Timer/IfxGtm_Tom_Timer.c
new file mode 100644
index 0000000..0368cd5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Timer/IfxGtm_Tom_Timer.c
@@ -0,0 +1,448 @@
+/**
+ * \file IfxGtm_Tom_Timer.c
+ * \brief GTM TIMER details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Tom_Timer.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "IfxGtm_bf.h"
+#include "stddef.h"
+#include "string.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver)
+{
+ boolean event;
+
+ event = IfxGtm_Tom_Ch_isZeroNotification(driver->tom, driver->timerChannel);
+
+ if (event)
+ {
+ IfxGtm_Tom_Ch_clearZeroNotification(driver->tom, driver->timerChannel);
+ }
+ else
+ {}
+
+ return event;
+}
+
+
+boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver)
+{
+ boolean event;
+
+ event = IfxGtm_Tom_Ch_isOneNotification(driver->tom, driver->triggerChannel);
+
+ if (event)
+ {
+ IfxGtm_Tom_Ch_clearOneNotification(driver->tom, driver->triggerChannel);
+ }
+ else
+ {}
+
+ return event;
+}
+
+
+void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel)
+{
+ if (driver->timerChannel <= IfxGtm_Tom_Ch_7)
+ {
+ if (channel <= IfxGtm_Tom_Ch_7)
+ {
+ driver->channelsMask[0] |= 1 << channel;
+ driver->tgcGlobalControlDisableUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[0], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
+ driver->tgcGlobalControlApplyUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[0], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
+ }
+ else
+ {
+ driver->channelsMask[1] |= 1 << (channel - IfxGtm_Tom_Ch_8);
+ driver->tgcGlobalControlDisableUpdate[1] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[1], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
+ driver->tgcGlobalControlApplyUpdate[1] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[1], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
+ }
+ }
+ else
+ {
+ driver->channelsMask[0] |= 1 << (channel - IfxGtm_Tom_Ch_8);
+ driver->tgcGlobalControlDisableUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(0, driver->channelsMask[0], IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
+ driver->tgcGlobalControlApplyUpdate[0] = IfxGtm_Tom_Tgc_buildFeature(driver->channelsMask[0], 0, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
+ }
+}
+
+
+void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver)
+{
+ IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[0], driver->tgcGlobalControlApplyUpdate[0]);
+
+ if (driver->tgc[1])
+ {
+ IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[1], driver->tgcGlobalControlApplyUpdate[1]); /* Note: Write of 0 value has no effect */
+ }
+}
+
+
+void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver)
+{
+ IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[0], driver->tgcGlobalControlDisableUpdate[0]);
+
+ if (driver->tgc[1])
+ {
+ IfxGtm_Tom_Tgc_writeGlobalControl(driver->tgc[1], driver->tgcGlobalControlDisableUpdate[1]); /* Note: Write of 0 value has no effect */
+ }
+}
+
+
+float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver)
+{
+ return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
+}
+
+
+float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver)
+{
+ return driver->base.clockFreq;
+}
+
+
+Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver)
+{
+ return driver->offset;
+}
+
+
+Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver)
+{
+ return driver->base.period;
+}
+
+
+volatile uint32 *IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver)
+{
+ return IfxGtm_Tom_Ch_getTimerPointer(driver->tom, driver->timerChannel);
+}
+
+
+float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver)
+{
+ return 1.0 / driver->base.clockFreq;
+}
+
+
+Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver)
+{
+ return IfxGtm_Tom_Ch_getCompareOne(driver->tom, driver->triggerChannel) - 1;
+}
+
+
+volatile uint32 *IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver)
+{
+ return IfxGtm_Tom_Ch_getCompareOnePointer(driver->tom, driver->triggerChannel);
+}
+
+
+boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config)
+{
+ boolean result = TRUE;
+ IfxGtm_Tom_Timer_Base *base = &driver->base;
+ uint16 maskShift;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
+
+ driver->gtm = config->gtm;
+ driver->tomIndex = config->tom;
+ driver->tom = &config->gtm->TOM[config->tom];
+ driver->timerChannel = config->timerChannel;
+
+ base->triggerEnabled = config->base.trigger.enabled;
+
+ if (base->triggerEnabled)
+ {
+ if (config->triggerOut != NULL_PTR)
+ {
+ driver->triggerChannel = config->triggerOut->channel;
+ }
+ else
+ {
+ result = FALSE;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result); /* triggerOut is required */
+ }
+ }
+ else
+ {
+ driver->triggerChannel = driver->timerChannel; // Set to timer channel to disable its use
+ }
+
+ if (config->timerChannel <= 7)
+ {
+ driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 0);
+ driver->tgc[1] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
+ }
+ else
+ {
+ driver->tgc[0] = IfxGtm_Tom_Ch_getTgcPointer(driver->tom, 1);
+ driver->tgc[1] = NULL_PTR; /* NOTE currently no concatenation between TOMs */
+ }
+
+ driver->channelsMask[0] = 0;
+ driver->tgcGlobalControlApplyUpdate[0] = 0;
+ driver->tgcGlobalControlDisableUpdate[0] = 0;
+
+ driver->channelsMask[1] = 0;
+ driver->tgcGlobalControlApplyUpdate[1] = 0;
+ driver->tgcGlobalControlDisableUpdate[1] = 0;
+
+ /* Initialize the timer part */
+ IfxGtm_Tom_Ch_setClockSource(driver->tom, driver->timerChannel, config->clock);
+ IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, driver->timerChannel, IfxGtm_Tom_Ch_OutputTrigger_generate);
+
+ IfxGtm_Tom_Timer_updateInputFrequency(driver);
+
+ if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
+ {
+ result = FALSE;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+ else
+ {}
+
+ IfxGtm_Tom_Timer_setFrequency(driver, config->base.frequency);
+
+ driver->offset = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / config->base.frequency * config->base.startOffset);
+
+ IfxGtm_Tom_Ch_setCounterValue(driver->tom, driver->timerChannel, driver->offset);
+
+ /* Initialize the trigger part */
+ maskShift = (config->timerChannel <= 7) ? 0 : 8;
+ IfxGtm_Tom_Timer_addToChannelMask(driver, driver->timerChannel);
+
+ if (base->triggerEnabled)
+ {
+ IfxGtm_Tom_Ch triggerChannel = driver->triggerChannel;
+ uint16 triggerChannelMask = 1 << (triggerChannel - maskShift);
+ /* TO DO: enable the trigger to be not in the same TGC group as the timer */
+
+ IfxGtm_Tom_Ch_setSignalLevel(driver->tom, triggerChannel, config->base.trigger.risingEdgeAtPeriod ? Ifx_ActiveState_high : Ifx_ActiveState_low);
+ IfxGtm_Tom_Ch_setCounterValue(driver->tom, triggerChannel, driver->offset);
+
+ if (triggerChannel != driver->timerChannel)
+ {
+ IfxGtm_Tom_Ch_setResetSource(driver->tom, triggerChannel, IfxGtm_Tom_Ch_ResetEvent_onTrigger);
+ IfxGtm_Tom_Ch_setClockSource(driver->tom, triggerChannel, config->clock);
+ IfxGtm_Tom_Ch_setTriggerOutput(driver->tom, triggerChannel, IfxGtm_Tom_Ch_OutputTrigger_forward);
+ IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], triggerChannelMask, 0, FALSE);
+ IfxGtm_Tom_Timer_addToChannelMask(driver, driver->triggerChannel);
+ }
+ else
+ {}
+
+ /* Signal must go out of the GTM even if the port outpout is not enabled */
+ IfxGtm_Tom_Tgc_enableChannelsOutput(driver->tgc[0], triggerChannelMask, 0, FALSE);
+
+ if ((config->base.trigger.outputEnabled) && (config->initPins == TRUE))
+ {
+ /* Initialize the port */
+ IfxGtm_PinMap_setTomTout(config->triggerOut, config->base.trigger.outputMode, config->base.trigger.outputDriver);
+ }
+ else
+ {}
+
+ IfxGtm_Tom_Timer_setTrigger(driver, config->base.trigger.triggerPoint);
+ }
+ else
+ {}
+
+ /* Interrupt configuration */
+ {
+ volatile Ifx_SRC_SRCR *src;
+ boolean timerHasIrq = config->base.isrPriority > 0;
+ boolean triggerHasIrq = (config->base.trigger.isrPriority > 0) && base->triggerEnabled;
+
+ if (driver->triggerChannel == driver->timerChannel)
+ {
+ IfxGtm_Tom_Ch_setNotification(driver->tom, driver->timerChannel, timerHasIrq ? config->irqModeTimer : config->irqModeTrigger, timerHasIrq, triggerHasIrq);
+ src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->timerChannel);
+ IfxSrc_init(src, timerHasIrq ? config->base.isrProvider : config->base.trigger.isrProvider, timerHasIrq ? config->base.isrPriority : config->base.trigger.isrPriority);
+ IfxSrc_enable(src);
+ }
+ else
+ {
+ IfxGtm_IrqMode irqMode = IfxGtm_IrqMode_pulseNotify;
+
+ if (timerHasIrq)
+ {
+ IfxGtm_Tom_Ch_setNotification(driver->tom, driver->timerChannel, irqMode, TRUE, FALSE);
+ src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->timerChannel);
+ IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (triggerHasIrq)
+ {
+ IfxGtm_Tom_Ch_setNotification(driver->tom, driver->triggerChannel, irqMode, FALSE, TRUE);
+ src = IfxGtm_Tom_Ch_getSrcPointer(driver->gtm, config->tom, driver->triggerChannel);
+ IfxSrc_init(src, config->base.trigger.isrProvider, config->base.trigger.isrPriority);
+ IfxSrc_enable(src);
+ }
+ }
+ }
+
+ /* Transfer the shadow registers */
+ IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc[0], driver->channelsMask[0], 0, 0, 0);
+ IfxGtm_Tom_Tgc_trigger(driver->tgc[0]);
+ IfxGtm_Tom_Tgc_setChannelsForceUpdate(driver->tgc[0], 0, driver->channelsMask[0], 0, 0);
+
+ return result;
+}
+
+
+void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm)
+{
+ IfxStdIf_Timer_initConfig(&config->base);
+ config->gtm = gtm;
+ config->tom = IfxGtm_Tom_0;
+ config->timerChannel = IfxGtm_Tom_Ch_0;
+ config->triggerOut = NULL_PTR;
+ config->clock = IfxGtm_Tom_Ch_ClkSrc_cmuFxclk0;
+ config->base.countDir = IfxStdIf_Timer_CountDir_up;
+ config->irqModeTimer = IfxGtm_IrqMode_level;
+ config->irqModeTrigger = IfxGtm_IrqMode_level;
+ config->initPins = TRUE;
+}
+
+
+void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver)
+{
+ IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], driver->channelsMask[0], 0, TRUE);
+
+ if (driver->tgc[1])
+ {
+ IfxGtm_Tom_Tgc_enableChannels(driver->tgc[1], driver->channelsMask[1], 0, TRUE); /* Note: Write of 0 value has no effect */
+ }
+}
+
+
+boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency)
+{
+ Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
+
+ return IfxGtm_Tom_Timer_setPeriod(driver, period);
+}
+
+
+boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period)
+{
+ driver->base.period = period;
+ IfxGtm_Tom_Ch_setCompareZeroShadow(driver->tom, driver->timerChannel, period);
+
+ if (driver->triggerChannel != driver->timerChannel)
+ {
+ IfxGtm_Tom_Ch_setCompareZeroShadow(driver->tom, driver->triggerChannel, period);
+ }
+
+ return TRUE;
+}
+
+
+void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled)
+{
+ IfxGtm_Tom_Ch_setOneShotMode(driver->tom, driver->timerChannel, enabled);
+}
+
+
+void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint)
+{
+ IfxGtm_Tom_Ch_setCompareOneShadow(driver->tom, driver->triggerChannel, triggerPoint + 1);
+}
+
+
+boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver)
+{
+ /* Ensure the stdif is reset to zeros */
+ memset(stdif, 0, sizeof(IfxStdIf_Timer));
+
+ /* *INDENT-OFF* Note: this file was indented manually by the author. */
+ /* Set the API link */
+ stdif->driver = driver;
+ stdif->getFrequency =(IfxStdIf_Timer_GetFrequency )&IfxGtm_Tom_Timer_getFrequency;
+ stdif->getPeriod =(IfxStdIf_Timer_GetPeriod )&IfxGtm_Tom_Timer_getPeriod;
+ stdif->getResolution =(IfxStdIf_Timer_GetResolution )&IfxGtm_Tom_Timer_getResolution;
+ stdif->getTrigger =(IfxStdIf_Timer_GetTrigger )&IfxGtm_Tom_Timer_getTrigger;
+ stdif->setFrequency =(IfxStdIf_Timer_SetFrequency )&IfxGtm_Tom_Timer_setFrequency;
+ stdif->updateInputFrequency =(IfxStdIf_Timer_UpdateInputFrequency)&IfxGtm_Tom_Timer_updateInputFrequency;
+ stdif->applyUpdate =(IfxStdIf_Timer_ApplyUpdate )&IfxGtm_Tom_Timer_applyUpdate;
+ stdif->disableUpdate =(IfxStdIf_Timer_DisableUpdate )&IfxGtm_Tom_Timer_disableUpdate;
+ stdif->getInputFrequency =(IfxStdIf_Timer_GetInputFrequency )&IfxGtm_Tom_Timer_getInputFrequency;
+ stdif->run =(IfxStdIf_Timer_Run )&IfxGtm_Tom_Timer_run;
+ stdif->setPeriod =(IfxStdIf_Timer_SetPeriod )&IfxGtm_Tom_Timer_setPeriod;
+ stdif->setSingleMode =(IfxStdIf_Timer_SetSingleMode )&IfxGtm_Tom_Timer_setSingleMode;
+ stdif->setTrigger =(IfxStdIf_Timer_SetTrigger )&IfxGtm_Tom_Timer_setTrigger;
+ stdif->stop =(IfxStdIf_Timer_Stop )&IfxGtm_Tom_Timer_stop;
+ stdif->ackTimerIrq =(IfxStdIf_Timer_AckTimerIrq )&IfxGtm_Tom_Timer_acknowledgeTimerIrq;
+ stdif->ackTriggerIrq =(IfxStdIf_Timer_AckTriggerIrq )&IfxGtm_Tom_Timer_acknowledgeTriggerIrq;
+ /* *INDENT-ON* */
+
+ return TRUE;
+}
+
+
+void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver)
+{
+ IfxGtm_Tom_Tgc_enableChannels(driver->tgc[0], 0, driver->channelsMask[0], TRUE);
+
+ if (driver->tgc[1])
+ {
+ IfxGtm_Tom_Tgc_enableChannels(driver->tgc[1], 0, driver->channelsMask[1], TRUE); /* Note: Write of 0 value has no effect */
+ }
+}
+
+
+void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver)
+{
+ driver->base.clockFreq = IfxGtm_Tom_Ch_getClockFrequency(driver->gtm, driver->tom, driver->timerChannel);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Timer/IfxGtm_Tom_Timer.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Timer/IfxGtm_Tom_Timer.h
new file mode 100644
index 0000000..42330b9
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Timer/IfxGtm_Tom_Timer.h
@@ -0,0 +1,378 @@
+/**
+ * \file IfxGtm_Tom_Timer.h
+ * \brief GTM TIMER details
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Tom_Timer_Usage How to use the GTM TOM Timer Driver
+ * \ingroup IfxLld_Gtm_Tom_Timer
+ *
+ * This driver implements the timer functionalities as defined by \ref library_srvsw_stdif_timer.
+ * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
+ *
+ * \section specific Specific Implementation
+ * The timer fucntinality is implemented using either a single or 2 TOM channels. The dicision to use 1 or 2 channels is done
+ * depending on the following requirements:
+ * - relative position of the timer channel to the other channels used if any
+ * - need to trigger an other module, for example ADC triggering.
+ *
+ * The figure below show how the TOM is \ref IfxGtm_Tom_Timer_Config "configured" when a single TOM channel is used for the timer and trigger functinalities.
+ * The internal trigger signal (red line) is generated when the counter CN0 reach the CM0 compare register. The value of CM0 act as the period value. This internal
+ * trigger is used to reset the CN0 counter and simultaneously transfer the shadow values for the period value (SR0->CM0)
+ * and trigger edge (SR1->CM1). The internal trigger is used as a trigger input to the next TOM channel.
+ * The trigger signal (output trigger) is generated by the CM0 and CM1 compare values. Depending on the trigger signal active
+ * edge \ref IfxGtm_Tom_Timer_Config "configuiration", the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.
+ *
+ * \image html "IfxGtm_Tom_Timer-0.png" "Timer using one signle TOM channel"
+ *
+ * In case 2 TOM channels are used for the timer and trigger functionalities,
+ * the 1st channel (CHz in the figure below) is used for the generation of the period,
+ * and the 2nd channel (CHz+n the below figure, the figure shows n=1 as example) is used for the trigger generation.
+ *
+ * The CHz TOM channel generates the internal trigger signal (red line) when the counter CN0 reach the CM0 compare register.
+ * The value of CM0 of CHz act as the period value. This internal trigger is used to reset the CN0 counter and simultaneously
+ * transfer the shadow period value (SR0->CM0). The internal trigger is used as an input for the next TOM channel.
+ *
+ * The CHz+n TOM channel, uses the internal trigger signal to simultaneously resets the
+ * counter CN0, and transfer the shadow values used for the generation of the trigger falling and rising edges (SR0->CM0 and SR1->CM1).
+ * The internal trigger is used as a trigger input to the next TOM channel.
+ * Depending on the trigger signal active edge \ref IfxGtm_Tom_Timer_Config "configuiration", the CM0 will reset, and the CM1 will set the trigger signal, or vice versa.
+ * In orter to have a similar behaviour to the single channel implementation,
+ * the CM0 is set to the same value as CHz CM0, and CM1 is used for the trigger edge.
+ *
+ * \image html "IfxGtm_Tom_Timer-1.png" "Timer using two different TOM channels for the timer and the trigger"
+ *
+ *
+ * In order to ensure a coherent update of all registers, the internal trigger must be disable before updating
+ * the timer and trigger shadow values, and enabled once the update is done. The transfer will ocucrs at the next timer reset.
+ *
+ * - Resources used:
+ * - if the trigger channel is identical to the timer channel, only one TOM channels is used
+ * - if the trigger channel is different from the timer channel, 2 TOM channels are used
+ * - All channels used must be own by the same TOM and TOM TGC
+ * - The timer counting direction is limited to \ref IfxStdIf_Timer_CountDir_up
+ * - If the TOM trigger channel is not the same as the TOM timer channels
+ * - The TOM channel used for the trigger must have a lower index than the TOM channels
+ * used for the timer.
+ * - the TOM channels must be contiguous, unless specified by the driver using the timer driver.
+ *
+ * Note: the timer and trigger must bepart of the same TGC, but PWM channels can be of different TGC of the same TOM as the timer
+ *
+ * For a detailed configuration of the microcontroller, see \ref IfxGtm_Tom_Timer_init().
+ *
+ * \section example Usage example
+ * Initialisation:
+ * \code
+ * IfxGtm_Tom_Timer_Config driverConfig;
+ * IfxGtm_Tom_Timer driverData;
+ * IfxStdIf_Timer timer;
+ * IfxGtm_Tom_Timer_initConfig(&driverConfig, &MODULE_GTM);
+ * IfxGtm_Tom_Timer_init (&driverData, &driverConfig);
+ * boolean IfxGtm_Tom_Timer_stdIfTimerInit(&timer, &driverData);
+ * \endcode
+ *
+ * During run-time, \ref library_srvsw_stdif_timer "the interface functions" should be used:
+ * \code
+ * IfxStdIf_Timer_run(timer);
+ * IfxStdIf_Timer_disableUpdate(timer);
+ * IfxStdIf_Timer_setPeriod(timer, period);
+ * IfxStdIf_Timer_applyUpdate(timer);
+ * \endcode
+ *
+ * \defgroup IfxLld_Gtm_Tom_Timer TOM Timer Interface Driver
+ * \ingroup IfxLld_Gtm_Tom
+ * \defgroup IfxLld_Gtm_Tom_Timer_Data_Structures Data Structures
+ * \ingroup IfxLld_Gtm_Tom_Timer
+ * \defgroup IfxLld_Gtm_Tom_Timer_Timer_Functions Timer Functions
+ * \ingroup IfxLld_Gtm_Tom_Timer
+ * \defgroup IfxLld_Gtm_Tom_Timer_Timer_StdIf_Functions Timer StdIf Functions
+ * \ingroup IfxLld_Gtm_Tom_Timer
+ */
+
+#ifndef IFXGTM_TOM_TIMER_H
+#define IFXGTM_TOM_TIMER_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_PinMap/IfxGtm_PinMap.h"
+#include "Gtm/Std/IfxGtm_Tom.h"
+#include "Gtm/Std/IfxGtm_Cmu.h"
+#include "StdIf/IfxStdIf_Timer.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Tom_Timer_Data_Structures
+ * \{ */
+/** \brief Structure for the timer base
+ */
+typedef struct
+{
+ Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
+ boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialised */
+ float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
+ IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
+} IfxGtm_Tom_Timer_Base;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tom_Timer_Data_Structures
+ * \{ */
+/** \brief TOM Timer interface Handle
+ */
+typedef struct
+{
+ IfxGtm_Tom_Timer_Base base; /**< \brief Timer base structure */
+ Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
+ Ifx_GTM_TOM *tom; /**< \brief Pointer to the TOM object */
+ Ifx_GTM_TOM_TGC *tgc[2]; /**< \brief Pointer to the TGC object */
+ IfxGtm_Tom tomIndex; /**< \brief Enum for TOM objects */
+ IfxGtm_Tom_Ch timerChannel; /**< \brief TOM channel used for the timer */
+ IfxGtm_Tom_Ch triggerChannel; /**< \brief TOM channel used for the trigger, can be identical to the timer channel */
+ uint16 channelsMask[2]; /**< \brief Mask for channels to be modified together, The 1st value corresponds to the Timer's TGC, the 2nd value corresponds to the timer's next TGC if any */
+ Ifx_TimerValue offset; /**< \brief Timer initial offset in ticks */
+ uint32 tgcGlobalControlDisableUpdate[2]; /**< \brief Cached value for TGC GLOB_CTR */
+ uint32 tgcGlobalControlApplyUpdate[2]; /**< \brief Cached value for TGC GLOB_CTR */
+} IfxGtm_Tom_Timer;
+
+/** \brief Configuration structure for TOM Timer
+ */
+typedef struct
+{
+ IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
+ Ifx_GTM *gtm; /**< \brief Pointer to GTM module */
+ IfxGtm_Tom tom; /**< \brief Index of the TOM object used */
+ IfxGtm_Tom_Ch timerChannel; /**< \brief TOM channel used for the timer */
+ IfxGtm_Tom_ToutMap *triggerOut; /**< \brief TOM channel used for the trigger output, can be identical to the timer channel */
+ IfxGtm_Tom_Ch_ClkSrc clock; /**< \brief Timer input clock */
+ IfxGtm_IrqMode irqModeTimer; /**< \brief Interrupt mode for the timer */
+ IfxGtm_IrqMode irqModeTrigger; /**< \brief Interrupt mode for the trigger */
+ boolean initPins; /**< \brief TRUE : Initialize pins in driver.
+ * FALSE: Don't initialize pins : handled separately by user */
+} IfxGtm_Tom_Timer_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tom_Timer_Timer_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the initial timer offset in ticks
+ * \param driver TOM Timer interface Handle
+ * \return Returns the initial timer offset in ticks
+ */
+IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getOffset(IfxGtm_Tom_Timer *driver);
+
+/** \brief Returns the pointer to timer channel
+ * \param driver TOM Timer interface Handle
+ * \return Pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Tom_Timer_getPointer(IfxGtm_Tom_Timer *driver);
+
+/** \brief Returns the pointer to trigger channel
+ * \param driver TOM Timer interface Handle
+ * \return Pointer
+ */
+IFX_EXTERN volatile uint32 *IfxGtm_Tom_Timer_getTriggerPointer(IfxGtm_Tom_Timer *driver);
+
+/** \brief Initialises the timer object
+ * \param driver TOM Timer interface Handle
+ * \param config Configuration structure for TOM Timer
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Timer_init(IfxGtm_Tom_Timer *driver, const IfxGtm_Tom_Timer_Config *config);
+
+/** \brief Initializes the configuration structure to default
+ * \param config This parameter is Initialised by the function
+ * \param gtm Pointer to GTM module
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_initConfig(IfxGtm_Tom_Timer_Config *config, Ifx_GTM *gtm);
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Tom_Timer_Timer_StdIf_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the timer event
+ * \see IfxStdIf_Timer_AckTimerIrq
+ * \param driver TOM Timer interface Handle
+ * \return Timer event
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTimerIrq(IfxGtm_Tom_Timer *driver);
+
+/** \brief Returns the trigger event
+ * \see IfxStdIf_Timer_AckTriggerIrq
+ * \param driver TOM Timer interface Handle
+ * \return Trigger event
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Timer_acknowledgeTriggerIrq(IfxGtm_Tom_Timer *driver);
+
+/** \brief Add a channel to the channel mask
+ * Channels present in the mask are started, stopped, updated at the same time as the timer:
+ * IfxGtm_Tom_Timer_applyUpdate, IfxGtm_Tom_Timer_disableUpdate, IfxGtm_Tom_Timer_stop, IfxGtm_Tom_Timer_run
+ * \param driver TOM Timer interface Handle
+ * \param channel Channel to ba added to the mask
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_addToChannelMask(IfxGtm_Tom_Timer *driver, IfxGtm_Tom_Ch channel);
+
+/** \brief Enables the transfer of the shadow registers
+ * \see IfxStdIf_Timer_ApplyUpdate
+ * Specific implementation: Enable the transfer of the shadow registers
+ * \param driver TOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_applyUpdate(IfxGtm_Tom_Timer *driver);
+
+/** \brief Disables the upadte
+ * \see IfxStdIf_Timer_DisableUpdate
+ * Specific implementation: Disable the transfer of the shadow registers
+ * \param driver TOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_disableUpdate(IfxGtm_Tom_Timer *driver);
+
+/** \brief Returns the frequency
+ * \see IfxStdIf_Timer_GetFrequency
+ * \param driver TOM Timer interface Handle
+ * \return Frequency
+ */
+IFX_EXTERN float32 IfxGtm_Tom_Timer_getFrequency(IfxGtm_Tom_Timer *driver);
+
+/** \brief Returns the Input frequncy
+ * \param driver TOM Timer interface Handle
+ * \return Frequency
+ */
+IFX_EXTERN float32 IfxGtm_Tom_Timer_getInputFrequency(IfxGtm_Tom_Timer *driver);
+
+/** \brief Returns the period of the timer
+ * \see IfxStdIf_Timer_GetPeriod
+ * \param driver TOM Timer interface Handle
+ * \return Period
+ */
+IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getPeriod(IfxGtm_Tom_Timer *driver);
+
+/** \brief Returns the resolution
+ * \see IfxStdIf_Timer_GetResolution
+ * \param driver TOM Timer interface Handle
+ * \return Resolution
+ */
+IFX_EXTERN float32 IfxGtm_Tom_Timer_getResolution(IfxGtm_Tom_Timer *driver);
+
+/** \brief Returns the trigger point
+ * \param driver TOM Timer interface Handle
+ * \return Trigger point
+ */
+IFX_EXTERN Ifx_TimerValue IfxGtm_Tom_Timer_getTrigger(IfxGtm_Tom_Timer *driver);
+
+/** \brief Runs the timer
+ * \see IfxStdIf_Timer_Run
+ * \param driver TOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_run(IfxGtm_Tom_Timer *driver);
+
+/** \brief Sets the frequency
+ * \see IfxStdIf_Timer_SetFrequency
+ * \param driver TOM Timer interface Handle
+ * \param frequency Frequency
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Timer_setFrequency(IfxGtm_Tom_Timer *driver, float32 frequency);
+
+/** \brief Sets the period for the timer
+ * \see IfxStdIf_Timer_SetPeriod
+ * \param driver TOM Timer interface Handle
+ * \param period Period value
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Timer_setPeriod(IfxGtm_Tom_Timer *driver, Ifx_TimerValue period);
+
+/** \brief Sets the single shot mode of the timer
+ * \see IfxStdIf_Timer_SetSingleMode
+ * \param driver TOM Timer interface Handle
+ * \param enabled If TRUE, sets the single shot mode
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_setSingleMode(IfxGtm_Tom_Timer *driver, boolean enabled);
+
+/** \brief Sets the trigger
+ * \see IfxStdIf_Timer_SetTrigger
+ * \param driver TOM Timer interface Handle
+ * \param triggerPoint Trigger point value
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_setTrigger(IfxGtm_Tom_Timer *driver, Ifx_TimerValue triggerPoint);
+
+/** \brief Initializes the standard interface timer
+ * \param stdif Standard interface timer object, will be initialized by the function
+ * \param driver Interface driver to be used by the standard interface. must be initialised separately
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Tom_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxGtm_Tom_Timer *driver);
+
+/** \brief Stops the timer
+ * \see IfxStdIf_Timer_Stop
+ * \param driver TOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_stop(IfxGtm_Tom_Timer *driver);
+
+/** \brief Updates the input frequency
+ * \see IfxStdIf_Timer_UpdateInputFrequency
+ * \param driver TOM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Tom_Timer_updateInputFrequency(IfxGtm_Tom_Timer *driver);
+
+/** \} */
+
+#endif /* IFXGTM_TOM_TIMER_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Trig/IfxGtm_Trig.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Trig/IfxGtm_Trig.c
new file mode 100644
index 0000000..01d628b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Trig/IfxGtm_Trig.c
@@ -0,0 +1,314 @@
+/**
+ * \file IfxGtm_Trig.c
+ * \brief GTM TRIG details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_Trig.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Trig_Data_Structures
+ * \{ */
+typedef struct
+{
+ sint8 config; /**< \brief Value for SEL0/1. config=0xFF means "not available" */
+} IfxGtm_Trig_Channel;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Trig_Data_Structures
+ * \{ */
+typedef struct
+{
+ IfxGtm_Trig_Channel channel[IfxGtm_Trig_AdcTrigChannel_count];
+} IfxGtm_Trig_Source;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Trig_Data_Structures
+ * \{ */
+typedef struct
+{
+ IfxGtm_Trig_Source source[IfxGtm_Trig_AdcTrigSource_count];
+} IfxGtm_Trig_Trigger;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Trig_Data_Structures
+ * \{ */
+typedef struct
+{
+ IfxGtm_Trig_Trigger trigger[IfxGtm_Trig_AdcTrig_count];
+} IfxGtm_Trig_AdcTrig_Table;
+
+/** \} */
+
+/******************************************************************************/
+/*------------------------Private Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc0_1_2 = {
+ .trigger = {
+ {.source = { //IfxGtm_AdcTrig_0
+ //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
+ {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
+ {.channel = { {.config = 0x09}, {.config = 0x0A}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
+
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
+ }},
+ {.source = { //IfxGtm_AdcTrig_1
+ //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
+ {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
+ {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
+
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}}}, //IfxGtm_AdcTrigSource_tom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
+ }}
+ }
+};
+
+IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_AdcTrig_tableAdc3_4 = {
+ .trigger = {
+ {.source = { //IfxGtm_AdcTrig_0
+ // IfxGtm_AdcTrig
+ //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
+ {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
+ {.channel = { {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
+ {.channel = { {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
+
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x09}, {.config = 0x0A}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
+ }},
+ {.source = { //IfxGtm_AdcTrig_1
+ //{.channel = { {Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
+ {.channel = { {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0x08}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0B}, {.config = 0x0C}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x0D}, {.config = 0x0E}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
+
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0x04}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
+ }}
+ }
+};
+
+/** \brief Trigger table for SENT triggers
+ */
+IFX_STATIC IFX_CONST IfxGtm_Trig_AdcTrig_Table IfxGtm_Trig_SentTrig_table = {
+ .trigger = {
+ {.source = { //IfxGtm_AdcTrig_0
+ //{.channel = {{Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
+ {.channel = { {.config = 0x04}, {.config = 0x05}, {.config = 0x06}, {.config = 0x07}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0x00}, {.config = 0x01}, {.config = 0x02}, {.config = 0x03}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
+ }},
+ {.source = { //IfxGtm_AdcTrig_1
+ //{.channel = {{Channel_4 }, {Channel_5 }, {Channel_6 }, {Channel_7 }, {Channel_13 }, {Channel_14 }, {Channel_15 }}},
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom1
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom2
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_atom3
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom0
+ {.channel = { {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}, {.config = 0xFF}}}, //IfxGtm_AdcTrigSource_tom1
+ }}
+ }
+};
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel)
+{
+ boolean result = dsadcChannel <= 5;
+
+ if (result != FALSE)
+ {
+ uint32 mask = 0xFU << (timChannel * 4);
+ __ldmst_c(&(gtm->INOUTSEL.DSADC.INSEL[tim].U), mask, dsadcChannel << (timChannel * 4));
+ }
+
+ return result;
+}
+
+
+void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel)
+{
+ uint32 shift = dsadcChannel * 4;
+ uint32 mask = 0xFU << shift;
+ uint32 value = sel << shift;
+
+ switch (dsadcTrig)
+ {
+ case IfxGtm_Trig_DsadcTrig_0:
+ __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL00.U), mask, value);
+ break;
+ case IfxGtm_Trig_DsadcTrig_1:
+ __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL10.U), mask, value);
+ break;
+ }
+}
+
+
+boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel)
+{
+ IFX_CONST IfxGtm_Trig_AdcTrig_Table *table = NULL_PTR;
+ uint8 config;
+
+ boolean result = 0;
+
+ switch (adcGroup)
+ {
+ case IfxGtm_Trig_AdcGroup_0:
+ case IfxGtm_Trig_AdcGroup_1:
+ case IfxGtm_Trig_AdcGroup_2:
+ table = &IfxGtm_Trig_AdcTrig_tableAdc0_1_2;
+ break;
+ case IfxGtm_Trig_AdcGroup_3:
+ case IfxGtm_Trig_AdcGroup_4:
+ table = &IfxGtm_Trig_AdcTrig_tableAdc3_4;
+ break;
+ default:
+ break;
+ }
+
+ if (table != NULL_PTR)
+ {
+ config = table->trigger[adcTrig].source[source].channel[channel].config;
+ result = config != 0xFF;
+ uint32 shift = adcGroup * 4;
+ uint32 mask = 0xFU << shift;
+ uint32 value = config << shift;
+
+ switch (adcTrig)
+ {
+ case IfxGtm_Trig_AdcTrig_0:
+ __ldmst_c(&(gtm->ADCTRIG0OUT0.U), mask, value);
+ break;
+ case IfxGtm_Trig_AdcTrig_1:
+ __ldmst_c(&(gtm->ADCTRIG1OUT0.U), mask, value);
+ break;
+ default:
+ result = FALSE;
+ break;
+ }
+ }
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
+
+ return result;
+}
+
+
+boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel)
+{
+ IFX_CONST IfxGtm_Trig_AdcTrig_Table *table = NULL_PTR;
+ uint8 config;
+ uint32 shift, mask, value;
+ boolean result = 0;
+
+ switch (sentGroup)
+ {
+ case IfxGtm_Trig_SentGroup_0:
+ case IfxGtm_Trig_SentGroup_1:
+ case IfxGtm_Trig_SentGroup_2:
+ table = &IfxGtm_Trig_AdcTrig_tableAdc0_1_2;
+ break;
+ case IfxGtm_Trig_SentGroup_3:
+ case IfxGtm_Trig_SentGroup_4:
+ table = &IfxGtm_Trig_AdcTrig_tableAdc3_4;
+ break;
+ case IfxGtm_Trig_SentGroup_5:
+ table = &IfxGtm_Trig_SentTrig_table;
+ break;
+ default:
+ break;
+ }
+
+ if (table != NULL_PTR)
+ {
+ config = table->trigger[sentTrig].source[source].channel[channel].config;
+ result = config != 0xFF;
+
+ if ((sentGroup / 6) == 0) // write to VADC registers
+ {
+ shift = (sentGroup % 5) * 4;
+ }
+ else // write to DSADC registers
+ {
+ shift = (sentGroup % 6) * 4;
+ }
+
+ mask = 0xFU << shift;
+ value = config << shift;
+
+ if ((sentGroup / 6) == 0) // write to VADC registers
+ {
+ __ldmst_c(&(gtm->ADCTRIG0OUT0.U), mask, value);
+ }
+ else // write to DSADC registers
+ {
+ __ldmst_c(&(gtm->INOUTSEL.DSADC.OUTSEL00.U), mask, value);
+ }
+ }
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, result);
+
+ return result;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Trig/IfxGtm_Trig.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Trig/IfxGtm_Trig.h
new file mode 100644
index 0000000..6a34d70
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Trig/IfxGtm_Trig.h
@@ -0,0 +1,235 @@
+/**
+ * \file IfxGtm_Trig.h
+ * \brief GTM TRIG details
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_Trig GTM Trigger Configuration
+ * \ingroup IfxLld_Gtm
+ * \defgroup IfxLld_Gtm_Trig_Enumerations Enumerations
+ * \ingroup IfxLld_Gtm_Trig
+ * \defgroup IfxLld_Gtm_Trig_Data_Structures Data Structures
+ * \ingroup IfxLld_Gtm_Trig
+ * \defgroup IfxLld_Gtm_Trig_Trigger_Functions Trigger Functions
+ * \ingroup IfxLld_Gtm_Trig
+ */
+
+#ifndef IFXGTM_TRIG_H
+#define IFXGTM_TRIG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "_Impl/IfxGtm_cfg.h"
+#include "Gtm/Std/IfxGtm_Tim.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Trig_Enumerations
+ * \{ */
+/** \brief Enum for ADC group
+ */
+typedef enum
+{
+ IfxGtm_Trig_AdcGroup_0, /**< \brief For ADC group 0 */
+ IfxGtm_Trig_AdcGroup_1, /**< \brief For ADC group 1 */
+ IfxGtm_Trig_AdcGroup_2, /**< \brief For ADC group 2 */
+ IfxGtm_Trig_AdcGroup_3, /**< \brief For ADC group 3 */
+ IfxGtm_Trig_AdcGroup_4 /**< \brief For ADC group 4 */
+} IfxGtm_Trig_AdcGroup;
+
+/** \brief Enum for ADC trigger
+ */
+typedef enum
+{
+ IfxGtm_Trig_AdcTrig_0,
+ IfxGtm_Trig_AdcTrig_1,
+ IfxGtm_Trig_AdcTrig_count /**< \brief count of the enum definition */
+} IfxGtm_Trig_AdcTrig;
+
+/** \brief Enum for ADC trigger channel
+ */
+typedef enum
+{
+ IfxGtm_Trig_AdcTrigChannel_4,
+ IfxGtm_Trig_AdcTrigChannel_5,
+ IfxGtm_Trig_AdcTrigChannel_6,
+ IfxGtm_Trig_AdcTrigChannel_7,
+ IfxGtm_Trig_AdcTrigChannel_13,
+ IfxGtm_Trig_AdcTrigChannel_14,
+ IfxGtm_Trig_AdcTrigChannel_15,
+ IfxGtm_Trig_AdcTrigChannel_count /**< \brief count of the enum definition */
+} IfxGtm_Trig_AdcTrigChannel;
+
+/** \brief Enum for ADC trigger source
+ */
+typedef enum
+{
+ IfxGtm_Trig_AdcTrigSource_atom0,
+ IfxGtm_Trig_AdcTrigSource_atom1,
+ IfxGtm_Trig_AdcTrigSource_atom2,
+ IfxGtm_Trig_AdcTrigSource_atom3,
+ IfxGtm_Trig_AdcTrigSource_tom0,
+ IfxGtm_Trig_AdcTrigSource_tom1,
+ IfxGtm_Trig_AdcTrigSource_count /**< \brief count of the enum definition */
+} IfxGtm_Trig_AdcTrigSource;
+
+/** \brief Enum for DSADC trigger
+ */
+typedef enum
+{
+ IfxGtm_Trig_DsadcTrig_0,
+ IfxGtm_Trig_DsadcTrig_1
+} IfxGtm_Trig_DsadcTrig;
+
+/** \brief Enum for DSADC trigger source
+ */
+typedef enum
+{
+ IfxGtm_Trig_DsadcTrigSource_tomX_6,
+ IfxGtm_Trig_DsadcTrigSource_tomX_7,
+ IfxGtm_Trig_DsadcTrigSource_tomX_13,
+ IfxGtm_Trig_DsadcTrigSource_tomX_14,
+ IfxGtm_Trig_DsadcTrigSource_atomX_4,
+ IfxGtm_Trig_DsadcTrigSource_atomX_5,
+ IfxGtm_Trig_DsadcTrigSource_atomX_6,
+ IfxGtm_Trig_DsadcTrigSource_atomX_7
+} IfxGtm_Trig_DsadcTrigSource;
+
+/** \brief Enum for SENT group
+ */
+typedef enum
+{
+ IfxGtm_Trig_SentGroup_0, /**< \brief For SENT group 0 */
+ IfxGtm_Trig_SentGroup_1, /**< \brief For SENT group 1 */
+ IfxGtm_Trig_SentGroup_2, /**< \brief For SENT group 2 */
+ IfxGtm_Trig_SentGroup_3, /**< \brief For SENT group 3 */
+ IfxGtm_Trig_SentGroup_4, /**< \brief For SENT group 4 */
+ IfxGtm_Trig_SentGroup_5 /**< \brief For SENT group 5 */
+} IfxGtm_Trig_SentGroup;
+
+/** \brief Enum for SENT trigger
+ */
+typedef enum
+{
+ IfxGtm_Trig_SentTrig_0 /**< \brief sent trigger 0 */
+} IfxGtm_Trig_SentTrig;
+
+/** \brief Enum for SENT trigger channel
+ */
+typedef enum
+{
+ IfxGtm_Trig_SentTrigChannel_4,
+ IfxGtm_Trig_SentTrigChannel_5,
+ IfxGtm_Trig_SentTrigChannel_6,
+ IfxGtm_Trig_SentTrigChannel_7,
+ IfxGtm_Trig_SentTrigChannel_13,
+ IfxGtm_Trig_SentTrigChannel_14,
+ IfxGtm_Trig_SentTrigChannel_15,
+ IfxGtm_Trig_SentTrigChannel_count /**< \brief count of the enum definition */
+} IfxGtm_Trig_SentTrigChannel;
+
+/** \brief Enum for SENT trigger source
+ */
+typedef enum
+{
+ IfxGtm_Trig_SentTrigSource_atom0,
+ IfxGtm_Trig_SentTrigSource_atom1,
+ IfxGtm_Trig_SentTrigSource_atom2,
+ IfxGtm_Trig_SentTrigSource_atom3,
+ IfxGtm_Trig_SentTrigSource_tom0,
+ IfxGtm_Trig_SentTrigSource_tom1,
+ IfxGtm_Trig_SentTrigSource_count /**< \brief count of the enum definition */
+} IfxGtm_Trig_SentTrigSource;
+
+/** \} */
+
+/** \addtogroup IfxLld_Gtm_Trig_Trigger_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \param gtm Pointer to GTM module
+ * \param dsadcChannel DSADC channel
+ * \param tim TIM object
+ * \param timChannel TIM channel
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Trig_fromDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Tim tim, IfxGtm_Tim_Ch timChannel);
+
+/**
+ * \param gtm Pointer to GTM module
+ * \param dsadcChannel DSADC channel
+ * \param dsadcTrig DSADC trigger
+ * \param sel DSADC trigger source
+ * \return None
+ */
+IFX_EXTERN void IfxGtm_Trig_toDsadc(Ifx_GTM *gtm, uint32 dsadcChannel, IfxGtm_Trig_DsadcTrig dsadcTrig, IfxGtm_Trig_DsadcTrigSource sel);
+
+/**
+ * \param gtm Pointer to GTM module
+ * \param adcGroup ADC group
+ * \param adcTrig ADC trigger
+ * \param source ADC trigger source
+ * \param channel ADC trigger channel
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Trig_toVadc(Ifx_GTM *gtm, IfxGtm_Trig_AdcGroup adcGroup, IfxGtm_Trig_AdcTrig adcTrig, IfxGtm_Trig_AdcTrigSource source, IfxGtm_Trig_AdcTrigChannel channel);
+
+/**
+ * \param gtm Pointer to GTM module
+ * \param sentGroup SENT group
+ * \param sentTrig SENT trigger
+ * \param source SENT trigger source
+ * \param channel SENT trigger channel
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxGtm_Trig_toSent(Ifx_GTM *gtm, IfxGtm_Trig_SentGroup sentGroup, IfxGtm_Trig_SentTrig sentTrig, IfxGtm_Trig_SentTrigSource source, IfxGtm_Trig_SentTrigChannel channel);
+
+/** \} */
+
+#endif /* IFXGTM_TRIG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Hssl/IfxHssl_Hssl.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Hssl/IfxHssl_Hssl.c
new file mode 100644
index 0000000..916e5e0
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Hssl/IfxHssl_Hssl.c
@@ -0,0 +1,580 @@
+/**
+ * \file IfxHssl_Hssl.c
+ * \brief HSSL HSSL details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxHssl_Hssl.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl)
+{
+ Ifx_HSSL *hsslSFR = hssl->hssl; /* pointer to HSSL registers */
+
+ /* store the errors in the structure */
+ if (hsslSFR->MFLAGS.B.NACK != 0)
+ {
+ hssl->errorFlags.notAcknowledgeError = 1;
+ }
+
+ if (hsslSFR->MFLAGS.B.TTE != 0)
+ {
+ hssl->errorFlags.transactionTagError = 1;
+ }
+
+ if (hsslSFR->MFLAGS.B.TIMEOUT != 0)
+ {
+ hssl->errorFlags.timeoutError = 1;
+ }
+
+ if (hsslSFR->MFLAGS.B.UNEXPECTED != 0)
+ {
+ hssl->errorFlags.unexpectedError = 1;
+ }
+
+ if (hsslSFR->MFLAGS.B.MAV != 0)
+ {
+ hssl->errorFlags.memoryAccessViolation = 1;
+ }
+
+ if (hsslSFR->MFLAGS.B.SRIE != 0)
+ {
+ hssl->errorFlags.busAccessError = 1;
+ }
+
+ if (hsslSFR->MFLAGS.B.PIE1 != 0)
+ {
+ hssl->errorFlags.channelNumberCodeError = 1;
+ }
+
+ if (hsslSFR->MFLAGS.B.PIE2 != 0)
+ {
+ hssl->errorFlags.dataLengthError = 1;
+ }
+
+ if (hsslSFR->MFLAGS.B.CRCE != 0)
+ {
+ hssl->errorFlags.crcError = 1;
+ }
+}
+
+
+void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl)
+{
+ hssl->errorFlags.notAcknowledgeError = 0;
+ hssl->errorFlags.transactionTagError = 0;
+ hssl->errorFlags.timeoutError = 0;
+ hssl->errorFlags.unexpectedError = 0;
+ hssl->errorFlags.memoryAccessViolation = 0;
+ hssl->errorFlags.busAccessError = 0;
+ hssl->errorFlags.channelNumberCodeError = 0;
+ hssl->errorFlags.dataLengthError = 0;
+ hssl->errorFlags.crcError = 0;
+}
+
+
+void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct)
+{
+ uint32 i;
+ IFX_UNUSED_PARAMETER(hsct);
+
+ for (i = 0; i < 8000; i++)
+ {
+ __nop();
+ }
+}
+
+
+void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig)
+{
+ channel->hssl = channelConfig->hssl; /* adding HSSL register pointer to channel handle */
+ channel->hsct = channelConfig->hsct; /* adding HSCT register pointer to channel handle */
+
+ channel->channelId = channelConfig->channelId; /* adding channel id to channel handle */
+ channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction; /* default request, no action */
+
+ channel->streamingModeOn = FALSE; /* command mode (used in waitAcknowledge function) */
+ channel->streamingMode = channelConfig->streamingMode; /* adding streaming mode to channel handle */
+ channel->loopBack = channelConfig->loopBack; /* adding loopback selection to channel handle */
+}
+
+
+void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct)
+{
+ channelConfig->hssl = hssl->hssl;
+ channelConfig->hsct = hsct->hsct;
+
+ channelConfig->channelId = IfxHssl_ChannelId_0; /* default channel 0 */
+ channelConfig->streamingMode = IfxHssl_StreamingMode_single; /* default streaming mode continuous */
+ channelConfig->loopBack = hsct->loopBack;
+ hssl->loopBack = hsct->loopBack; /* copy to hssl handle, used in trasfer apis */
+}
+
+
+void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config)
+{
+ Ifx_HSCT *hsctSFR = config->hsct; /* pointer to HSCT registers */
+
+ hsct->hsct = hsctSFR; /* adding HSCT register pointer to module handle */
+ hsct->loopBack = config->loopBack; /* adding loopback selection to module handle */
+
+#ifndef IFXHSSL_HSCT_DISABLE_PINCONFIG
+ /* Pad initialisiation */
+ IfxPort_setPinModeInput(&MODULE_P21, 2, IfxPort_InputMode_noPullDevice); /* RXDN */
+ IfxPort_setPinModeInput(&MODULE_P21, 3, IfxPort_InputMode_noPullDevice); /* RXDP */
+ IfxPort_setPinModeOutput(&MODULE_P21, 4, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general); /* TXDN */
+ IfxPort_setPinModeOutput(&MODULE_P21, 5, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general); /* TXDP */
+
+ /* select the clock direction */
+ if (config->interfaceMode == IfxHssl_InterfaceMode_master)
+ {
+ IfxPort_setPinModeOutput(&MODULE_P20, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_alt5); /* CLKOUT */
+ IfxPort_setPinPadDriver(&MODULE_P20, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+ }
+ else
+ {
+ IfxPort_setPinModeInput(&MODULE_P20, 0, IfxPort_InputMode_pullDown); /* CLKIN */
+ }
+
+ if (config->loopBack == FALSE)
+ /* LVDS configuration */
+ {
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
+
+ P21_LPCR1.B_P21.RDIS_CTRL = 1;
+ P21_LPCR1.B_P21.RX_DIS = 0;
+
+ P21_LPCR2.B.TDIS_CTRL = 1;
+ P21_LPCR2.B.TX_DIS = 0;
+ P21_LPCR2.B.TX_PD = 0;
+
+ IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
+ }
+
+#endif
+
+ /* HSCT initialisation */
+ IfxHssl_enableHsctModule(hsctSFR); /* enabling the HSCT module */
+
+ hsctSFR->IRQCLR.B.TXTECLR = 1; /* due to AI */
+
+ /* slave interface initialisation */
+ if (config->interfaceMode == IfxHssl_InterfaceMode_slave) /* slave mode initialisation */
+ {
+ hsctSFR->INIT.B.IFM = IfxHssl_InterfaceMode_slave; /* slave mode */
+ hsctSFR->INIT.B.SYS_CLK_EN = 0; /* disabling the system clock */
+ hsctSFR->INIT.B.SRCF = IfxHssl_ClockFrequencyRate_20Mhz; /* Reference Clock Frequency rate 20 MHz */
+ hsctSFR->CONFIGPHY.B.OSCCLKEN = IfxHssl_PllReferenceClock_hsctSystemClockInput; /* PLL reference clock is hsct system clock input */
+ hsctSFR->CONFIGPHY.B.PHYRST = 0; /* disable PHY reset */
+ hsctSFR->CONFIGPHY.B.PLLWMF = 16; /* PLL frequency control word multiplication factor */
+ }
+
+ /* master interface initialisation */
+ else /* master mode initialisation */
+ {
+ hsctSFR->INIT.B.IFM = IfxHssl_InterfaceMode_master; /* master mode */
+ hsctSFR->INIT.B.SYS_CLK_EN = 1; /* enabling the system clock */
+ hsctSFR->INIT.B.SRCF = IfxHssl_ClockFrequencyRate_20Mhz; /* Reference Clock Frequency rate 20 MHz */
+ hsctSFR->CONFIGPHY.B.OSCCLKEN = IfxHssl_PllReferenceClock_oscillatorInput; /* PLL reference clock is Oscillator input */
+ hsctSFR->CONFIGPHY.B.PHYRST = 0; /* disable PHY reset */
+ hsctSFR->CONFIGPHY.B.PLLPON = 1; /* PLL power on */
+ hsctSFR->CONFIGPHY.B.PLLWMF = 16; /* PLL frequency control word multiplication factor */
+ hsctSFR->IFCTRL.B.MTXSPEED = IfxHssl_MasterModeTxSpeed_lowSpeed; /* Tx low speed */
+ hsctSFR->IFCTRL.B.MRXSPEED = IfxHssl_MasterModeRxSpeed_lowSpeed; /* Rx low speed */
+
+ /* change from low speed to high speed */
+ if (config->highSpeedMode)
+ {
+ hsctSFR->IFCTRL.B.MTXSPEED = IfxHssl_MasterModeTxSpeed_highSpeed; /* Tx high speed */
+ hsctSFR->IFCTRL.B.MRXSPEED = IfxHssl_MasterModeRxSpeed_highSpeed; /* Rx high speed */
+ }
+
+ while (hsctSFR->STATPHY.B.PLOCK == 0) /* wait until pll is locked */
+ {}
+ }
+
+ hsctSFR->DISABLE.U = 0;
+}
+
+
+void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct)
+{
+ config->hsct = hsct;
+
+ /* interface mode */
+ config->interfaceMode = IfxHssl_InterfaceMode_master;
+
+ /* high speed mode disabled */
+ config->highSpeedMode = FALSE;
+
+ config->loopBack = FALSE; /* default with out loopback */
+}
+
+
+void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config)
+{
+ Ifx_HSSL *hsslSFR = config->hssl; /* pointer to HSSL registers */
+
+ hssl->hssl = hsslSFR; /* adding HSSL register pointer to module handle */
+
+ /* HSSL initialisation */
+ IfxHssl_enableHsslModule(hsslSFR); /* enabling the HSSL module */
+ hsslSFR->CFG.B.PREDIV = config->preDivider; /* predivivder */
+ hsslSFR->CFG.B.SCM = 0; /* command mode */
+
+ /* Access windows */
+ hsslSFR->AW[0].AWSTART.U = config->accessWindow0.start; /* start of access window */
+ hsslSFR->AW[0].AWEND.U = config->accessWindow0.end; /* end of access window */
+ hsslSFR->AW[1].AWSTART.U = config->accessWindow1.start; /* start of access window */
+ hsslSFR->AW[1].AWEND.U = config->accessWindow1.end; /* end of access window */
+ hsslSFR->AW[2].AWSTART.U = config->accessWindow2.start; /* start of access window */
+ hsslSFR->AW[2].AWEND.U = config->accessWindow2.end; /* end of access window */
+ hsslSFR->AW[3].AWSTART.U = config->accessWindow3.start; /* start of access window */
+ hsslSFR->AW[3].AWEND.U = config->accessWindow3.end; /* end of access window */
+
+ hsslSFR->AR.U = 0x000000ff; /* allow read/write access for all windows */
+
+ hsslSFR->MFLAGSCL.B.INIC = 1; /* chnage into run mode */
+ hsslSFR->TIDADD.U = (uint32)IFXHSSL_JTAG_ID_ADDRESS; /* Writing JTAG_ID of the device to TIDADD.This'll be used in the response when the other device queries for ID */
+
+ while (hsslSFR->MFLAGS.B.INI) /* wait until the mode changes */
+ {}
+}
+
+
+void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl)
+{
+ config->hssl = hssl;
+
+ /* Access windows */
+ config->accessWindow0.start = 0x00000000; /* start of access window */
+ config->accessWindow0.end = 0xffffffff; /* end of access window */
+ config->accessWindow1.start = 0x00000000; /* start of access window */
+ config->accessWindow1.end = 0xffffffff; /* end of access window */
+ config->accessWindow2.start = 0x00000000; /* start of access window */
+ config->accessWindow2.end = 0xffffffff; /* end of access window */
+ config->accessWindow3.start = 0x00000000; /* start of access window */
+ config->accessWindow3.end = 0xffffffff; /* end of access window */
+
+ /* predivider */
+ config->preDivider = 256;
+}
+
+
+IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count)
+{
+ IfxHssl_ChannelId channelId = channel->channelId;
+ Ifx_HSSL_TS_FC tsfcReg;
+
+ if (channelId == IfxHssl_ChannelId_2)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+
+ /* target start address to memeroy block 0 on target device (writing into HSSL_TSSA0 of the target) */
+ IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.SA[0], slaveTargetAddress, IfxHssl_DataLength_32bit);
+
+ while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
+ {
+ if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+ }
+
+ /* Precautionary measure on target for any last streaming interruption */
+ /* Read count register on the target */
+ IfxHssl_Hssl_read(channel, (uint32)&channel->hssl->TS.FC, IfxHssl_DataLength_32bit);
+
+ while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
+ {
+ if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+ }
+
+ tsfcReg.U = IfxHssl_Hssl_getReadData(channel);
+ tsfcReg.B.RELCOUNT = tsfcReg.B.CURCOUNT;
+ /* Set the RELCOUNT equal to CURCOUNT on the target */
+ IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.FC, count, IfxHssl_DataLength_16bit);
+
+ while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
+ {
+ if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+ }
+
+ /* Disable the streaming on the target */
+ IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->MFLAGSCL, (1 << IFX_HSSL_MFLAGSCL_TSEC_OFF), IfxHssl_DataLength_32bit);
+
+ while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
+ {
+ if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+ }
+
+ /* memory count into target reload count register on target device */
+ IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->TS.FC, count, IfxHssl_DataLength_16bit);
+
+ while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
+ {
+ if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+ }
+
+ /* incase of transfers between two different devices (loopback off) */
+ if (!channel->loopBack)
+ {
+ /* Get the target configuration */
+ IfxHssl_Hssl_read(channel, (uint32)&channel->hssl->CFG, IfxHssl_DataLength_32bit);
+
+ while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
+ {
+ if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+ }
+
+ /* Check if the target streaming is enabled */
+ if ((IfxHssl_Hssl_getReadData(channel) & (0x00070100)) != 0x00070100)
+ {
+ /* enable streaming mode (single) of channel 2 on target device */
+ IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->CFG, 0x00070100, IfxHssl_DataLength_32bit);
+
+ while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
+ {
+ if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+ }
+ }
+
+ /* enable streaming on target device */
+ IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, (uint32)&channel->hssl->MFLAGSSET, 0x10000000, IfxHssl_DataLength_32bit);
+
+ while (IfxHssl_Hssl_waitAcknowledge(channel) != IfxHssl_Hssl_Status_ok)
+ {
+ if (IfxHssl_Hssl_waitAcknowledge(channel) == IfxHssl_Hssl_Status_error)
+ {
+ return IfxHssl_Hssl_Status_error;
+ }
+ }
+ }
+
+ channel->streamingModeOn = TRUE; /* for waitAcknowledge function */
+ /* preperation was successful */
+ return IfxHssl_Hssl_Status_ok;
+}
+
+
+IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength)
+{
+ uint32 data = 0; /* not required, data will be read back */
+ return IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_readFrame, address, data, dataLength); /* initiate the read request */
+}
+
+
+void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command)
+{
+ Ifx_HSCT *hsctSFR = hsct->hsct;
+
+ hsctSFR->IFCTRL.B.IFCVS = command; /* write the command into the register */
+ hsctSFR->IFCTRL.B.SIFCV = 1; /* activate the command */
+
+ IfxHssl_Hssl_delay(hsct); /* wait until the change happens */
+}
+
+
+IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
+{
+ Ifx_HSSL_I *hsslI = (Ifx_HSSL_I *)&channel->hssl->I[channel->channelId];
+
+ if (channel->currentFrameRequest != IfxHssl_Hssl_FrameRequest_noAction)
+ {
+ return IfxHssl_Hssl_Status_busy;
+ }
+
+ hsslI->ICON.B.DATLEN = dataLength; /* 0x2 -> word size */
+ hsslI->ICON.B.TOREL = 0xff; /* max reload value */
+
+ switch (frameRequest)
+ {
+ case IfxHssl_Hssl_FrameRequest_readFrame:
+ hsslI->ICON.B.RWT = IfxHssl_Command_readFrame;
+ hsslI->IRWA.U = address;
+ break;
+ case IfxHssl_Hssl_FrameRequest_writeFrame:
+ hsslI->ICON.B.RWT = IfxHssl_Command_writeFrame;
+ hsslI->IWD.U = data;
+ hsslI->IRWA.U = address;
+ break;
+ case IfxHssl_Hssl_FrameRequest_triggerFrame:
+ hsslI->ICON.B.RWT = IfxHssl_Command_triggerFrame;
+ hsslI->IWD.U = data; /* dummy */
+ hsslI->IRWA.U = address; /* dummy */
+ break;
+ case IfxHssl_Hssl_FrameRequest_readId:
+ /* request an ID frame */
+ hsslI->ICON.B.IDQ = 1;
+ break;
+ default:
+ /* invalid request */
+ return IfxHssl_Hssl_Status_error;
+ }
+
+ channel->currentFrameRequest = frameRequest;
+
+ return IfxHssl_Hssl_Status_ok;
+}
+
+
+IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel)
+{
+ uint32 requestType = channel->currentFrameRequest;
+ IfxHssl_ChannelId channelId = channel->channelId;
+
+ if ((channelId == IfxHssl_ChannelId_2) && (channel->hssl->CFG.B.SCM == 1))
+ {
+ while (channel->hssl->MFLAGS.B.ISB)
+ {
+ /* transfer in progress */
+ }
+ }
+ else
+ {
+ if (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_writeFrame)
+ {
+ requestType = 1;
+ }
+
+ /* expect a read frame when requestType == IfxHssl_Hssl_FrameRequest_readId */
+ if ((channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_readFrame) || (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_readId))
+ {
+ requestType = 2;
+ }
+
+ if (channel->currentFrameRequest == IfxHssl_Hssl_FrameRequest_triggerFrame)
+ {
+ requestType = 3;
+ }
+
+ uint32 qFlags = channel->hssl->QFLAGS.U;
+ uint32 mFlags = channel->hssl->MFLAGS.U;
+ uint32 acknwoledgeFlagsMask = ((requestType << (16 + (channel->channelId * 2))) | (1 << channel->channelId));
+ uint32 errorFlagsMask = ((0x03E00000) | (4369 << channel->channelId)); /* all the possible errors */
+
+ if (channel->hssl->I[channelId].ICON.B.BSY == 1)
+ {
+ return IfxHssl_Hssl_Status_busy;
+ }
+
+ if (qFlags & acknwoledgeFlagsMask) /* transfer in progress? */
+ {
+ return IfxHssl_Hssl_Status_busy; /* return busy status in case of no error */
+ }
+
+ if (mFlags & errorFlagsMask) /* check for errors */
+ {
+ channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction;
+ return IfxHssl_Hssl_Status_error; /* return error status in case of an error */
+ }
+
+ /* transfer is finished */
+ channel->currentFrameRequest = IfxHssl_Hssl_FrameRequest_noAction;
+ }
+
+ return IfxHssl_Hssl_Status_ok;
+}
+
+
+IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength)
+{
+ return IfxHssl_Hssl_singleFrameRequest(channel, IfxHssl_Hssl_FrameRequest_writeFrame, address, data, dataLength);
+}
+
+
+IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count)
+{
+ Ifx_HSSL *hsslSFR = hssl->hssl;
+ Ifx_HSSL_IS *hsslIS = (Ifx_HSSL_IS *)&hsslSFR->IS;
+ IfxHssl_StreamingMode streamingMode = IfxHssl_StreamingMode_single;
+
+ /* single memory block streaming */
+ hsslIS->SA[0].U = (uint32)data; /* initiator start address to memeroy block 0 */
+
+ hsslIS->FC.B.RELCOUNT = count; /* memory count into initiator reload count register */
+
+ hsslSFR->CFG.B.SCM = 1; /* enable streaming mode of channel 2 on the initiator */
+ hsslSFR->CFG.B.SMT = streamingMode; /* set transmitter streaming mode ( single / continuous ) on the initiator */
+ hsslSFR->CFG.B.SMR = streamingMode; /* set receiver streaming mode ( single / continuous ) on the initiator */
+ /* streaming is supported only on IfxHssl_ChannelId_2 */
+ hsslSFR->I[IfxHssl_ChannelId_2].ICON.B.TOREL = 0xff; /* set the transmitter reload value to 0xff.*/
+
+ /* incase of transfers within the device(loopback on) */
+ if (hssl->loopBack)
+ {
+ hsslSFR->MFLAGSSET.B.TSES = 1; /* enable target */
+ }
+
+ /* initiate the transfer */
+ hsslSFR->MFLAGSSET.B.ISBS = 1;
+
+ /* streaming started */
+ return IfxHssl_Hssl_Status_ok;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Hssl/IfxHssl_Hssl.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Hssl/IfxHssl_Hssl.h
new file mode 100644
index 0000000..4913184
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Hssl/IfxHssl_Hssl.h
@@ -0,0 +1,780 @@
+/**
+ * \file IfxHssl_Hssl.h
+ * \brief HSSL HSSL details
+ * \ingroup IfxLld_Hssl
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Hssl_Hssl_Usage How to use the HSSL Interface driver?
+ * \ingroup IfxLld_Hssl
+ *
+ * The HSSL interface driver provides a default HSSL/HSCT configuration for point to point communication at two transfer speeds, 5MBaud (low speed) and 320MBaud (high speed).
+ * It also supports streaming transfers of data a memory block at both low and high speeds.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Hssl_Hssl_Preparation Preparation
+ * \subsection IfxLld_Hssl_Hssl_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Hssl_Hssl_Variables Variables
+ *
+ * Declare the HSSL handle, HSCT handle and channel array as global variables in your C code:
+ *
+ * \code
+ * // used globally
+ * static IfxHssl_Hssl hssl;
+ * static IfxHssl_Hsct hsct;
+ * IfxHssl_Hssl_Channel hsslChannel[4];
+ * __attribute__ ((aligned(256))) uint32 txData[80]; // needs to be declared globally in case of streaming transfers
+ * \endcode
+ *
+ * \subsection IfxLld_Hssl_Hssl_InitModule Module Initialisation
+ *
+ * The module initialisation can be done as follows:
+ *
+ * \code
+ * // create module config
+ * IfxHssl_Hsct_Config hsctConfig;
+ * IfxHssl_Hssl_initHsctModuleConfig(&hsctConfig, &MODULE_HSCT);
+ *
+ * // select the interface mode (in case of slave)
+ * hsctConfig.interfaceMode = IfxHssl_InterfaceMode_slave;
+ *
+ * // select the high speed mode if required
+ * hsctConfig.highSpeedMode = TRUE;
+ *
+ * // initialize module
+ * // IfxHssl_Hsct hsct; defined globally
+ * IfxHssl_Hssl_initHsctModule(&hsct, &hsctConfig);
+ *
+ * // create module config
+ * IfxHssl_Hssl_Config hsslConfig;
+ * IfxHssl_Hssl_initHsslModuleConfig(&hsslConfig, &MODULE_HSSL);
+ *
+ * // IfxHssl_Hssl hssl; defined globally
+ * IfxHssl_Hssl_initHsslModule(&hssl, &hsslConfig);
+ * \endcode
+ *
+ * If application intends to explicitly configure the pins for HSCT module IFXHSSL_HSCT_DISABLE_PINCONFIG macro should be defined in the application.
+ * The explicit pin assignment should be done prior to IfxHssl_Hssl_initHsctModule().
+ *
+ * \subsection IfxLld_Hssl_Hssl_InitChannel Channel Initialisation
+ *
+ * The Channel initialisation can be done as follows:
+ *
+ * \code
+ * // create HSSL channel config
+ * IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
+ * IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
+ *
+ * // initialize the channels
+ * // IfxHssl_Hssl_Channel hsslChannel[4]; defined globally
+ * for(int i=0; i<4; ++i)
+ * {
+ * hsslChannelConfig.channelId = (IfxHssl_ChannelId)i;
+ * IfxHssl_Hssl_initChannel(&hsslChannel[i], &hsslChannelConfig);
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Hssl_Hssl_LinkSpeed Changing HSCT link speed
+ *
+ * The link speed change can be done as follows
+ *
+ * As per the above settings the HSCT master is in High speed reception and transmission.
+ *
+ * The pseudo code for setting the target to High speed is as below
+ *
+ * \code
+ *
+ * // Set the Tx link speed of the master to Low speed
+ * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
+ *
+ * // Enable reception at the Slave
+ * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_enableReception);
+ *
+ * // Send interface commmand to change Rx to High speed at the target
+ * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedReception);
+ *
+ * // Send interface commmand to change Tx to High speed at the target
+ * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_highSpeedTransmission);
+ *
+ * // Set the Tx link speed of the master to High speed
+ * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_highSpeed);
+ *
+ * \endcode
+ *
+ * The pseudo code for setitng the target to Low speed from High speed (ie. if hsctConfig.highSpeedMode is set to TRUE).
+ *
+ * \code
+ *
+ * // Set the Tx link speed of master to Low speed
+ * IfxHssl_setHsctTxLinkSpeed(&hsct , IfxHssl_MasterModeTxSpeed_lowSpeed);
+ *
+ * // Send interface command to change Rx to low speed at the target
+ * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedReception);
+ *
+ * // Set the Rx link speed of master to Low speed
+ * IfxHssl_setHsctRxLinkSpeed(&hsct, IfxHssl_MasterModeRxSpeed_lowSpeed);
+ *
+ * // Send interface command to change Tx to low speed at the target
+ * IfxHssl_Hssl_sendControlCommand(&hsct,IfxHssl_ControlCommand_lowSpeedTransmission);
+ *
+ * \endcode
+ *
+ * The HSSL is ready for use now!
+ *
+ *
+ * \section IfxLld_Hssl_Hssl_DataTransfers Data Transfers
+ * \subsection IfxLld_Hssl_Hssl_SimpleTransfers Simple Transfers
+ *
+ * The HSSL driver provides simple to use data transfer functions,
+ *
+ * It supports direct writing of 8/16/32 bit data from the initiator into a target's register, as well as reading a value from the target
+ *
+ * \code
+ * // write some data to remote location:
+ * IfxHssl_Hssl_write(&hsslChannel[0], 0x70000000, 0x12345678, IfxHssl_DataLength_32bit);
+ *
+ * // wait for the acknowledgement
+ * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
+ * {
+ * if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
+ * {
+ * IfxHssl_Hssl_checkErrors(&hssl);
+ * break;
+ * }
+ * }
+ * \endcode
+ *
+ * A simple to use receive function is available as well.
+ *
+ * \code
+ * // read some data from remote location:
+ * IfxHssl_Hssl_read(&hsslChannel[0], 0x70000000, IfxHssl_DataLength_32bit);
+ *
+ * // wait for the acknowledgement
+ * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) != IfxHssl_Hssl_Status_ok )
+ * {
+ * if( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[0]) == IfxHssl_Hssl_Status_error )
+ * {
+ * IfxHssl_Hssl_checkErrors(&hssl);
+ * break;
+ * }
+ * }
+ *
+ * // read data from the register
+ * uint32 dataL = IfxHssl_Hssl_getReadData(&hsslChannel[0]);
+ * \endcode
+ *
+ * \subsection IfxLld_Hssl_Hssl_StreamingTransfers Streaming Transfers
+ *
+ * HSSL driver also supports streaming transfers of data as a memory block at both low and high speeds.
+ *
+ * Preparing the target for streaming with the desired memory location where the data needs to be transfered
+ *
+ * \code
+ * // choose a channel other than channel2 for register access
+ * // prepare streaming of single memory block
+ * IfxHssl_Hssl_prepareStream(&hsslChannel[0], 0x70000000, 10);
+ * \endcode
+ *
+ * Stream the memory block
+ *
+ * Usage Example:
+ * \code
+ * // __attribute__ ((aligned(256))) uint32 txData[80]; expected to be declared globally
+ *
+ * // for single block streaming transfer
+ * // change the txData address to global address before passing it to the API
+ *
+ * // IfxHssl_Hssl_writeStream(&hssl, (uint32 *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)txData), 10);
+ *
+ * IfxHssl_Hssl_writeStream(&hssl, txData, 10);
+ *
+ * // wait until the streaming is finished
+ * while( IfxHssl_Hssl_waitAcknowledge(&hsslChannel[2]) != IfxHssl_Hssl_Status_ok )
+ * {}
+ * \endcode
+ *
+ * \subsection IfxLld_Hssl_Hssl_DMAOperatedCommandQueues DMA Operated Command Queues
+ *
+ * It makes sense to do this from outside the driver, by initialising the DMA after HSSL, and send command queues through linked lists
+ * here is an example of how to use DMA operated command queues.
+ *
+ *
+ * Include following header files into your C code:
+ * \code
+ * #include
+ * #include
+ * #include
+ * \endcode
+ *
+ * Declare the HSSL handle, HSCT handle, HSSL channel handle and DMA channel handle as global variables in your C code:
+ *
+ * \code
+ * // used globally
+ * static IfxHssl_Hssl hssl;
+ * static IfxHssl_Hsct hsct;
+ * IfxHssl_Hssl_Channel hsslChannel;
+ * // DMA channel handle
+ * IfxDma_Dma_Channel chn;
+ *
+ * // Linked List storage
+ * // IMPORTANT: it has to be aligned to an 64bit address, otherwise DMA can't read it
+ * #define NUM_LINKED_LIST_ITEMS 3
+ * __attribute__ ((aligned(64))) Ifx_DMA_CH linkedList[NUM_LINKED_LIST_ITEMS] ;
+ * // transfer these values to channel 0 : HSSL_IWD0, HSSL_ICON0, HSSL_IRWA0 registers via linked lists
+ * #define NUM_TRANSFERED_WORDS 3
+ * // three write command queues with different data and to different addresses on slave
+ * uint32 sourceBuffer[NUM_LINKED_LIST_ITEMS][NUM_TRANSFERED_WORDS] = {
+ * {0xC0CAC01A, 0xFF0A0000, 0x70000000},
+ * {0xBA5EBA11, 0xFF0A0000, 0x70000010},
+ * {0xDEADBEEF, 0xFF0A0000, 0x70000020}
+ * };
+ *
+ * // three command queues to the same channel 0
+ * const uint32 destinationAddresses[NUM_LINKED_LIST_ITEMS] = {
+ * (uint32)&HSSL_I0_IWD,
+ * (uint32)&HSSL_I0_IWD,
+ * (uint32)&HSSL_I0_IWD
+ * };
+ * \endcode
+ *
+ * Initialise the hssl module, see \ref IfxLld_Hssl_Hssl_InitModule
+ *
+ * Initialise the hssl channel
+ *
+ * \code
+ * // create HSSL channel config
+ * IfxHssl_Hssl_ChannelConfig hsslChannelConfig;
+ * IfxHssl_Hssl_initChannelConfig(&hsslChannelConfig, &hssl, &hsct);
+ *
+ * // initialize the channel 0
+ * // IfxHssl_Hssl_Channel hsslChannel; defined globally
+ * hsslChannelConfig.channelId = 0;
+ * IfxHssl_Hssl_initChannel(&hsslChannel, &hsslChannelConfig);
+ * \endcode
+ *
+ * Build a linked list
+ *
+ * \code
+ * // create module config
+ * IfxDma_Dma_Config dmaConfig;
+ * IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
+ * // initialize module
+ * IfxDma_Dma dma;
+ * IfxDma_Dma_initModule(&dma, &dmaConfig);
+ * // initial channel configuration
+ * IfxDma_Dma_ChannelConfig cfg;
+ * IfxDma_Dma_initChannelConfig(&cfg, &dma);
+ * // following settings are used by all transactions
+ * cfg.transferCount = NUM_TRANSFERED_WORDS;
+ * cfg.requestMode = IfxDma_ChannelRequestMode_completeTransactionPerRequest;
+ * cfg.moveSize = IfxDma_ChannelMoveSize_32bit;
+ * cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
+ * // generate linked list items
+ * for(int i=0; iB.CLRR = 1;
+ * // start linked list transaction
+ * IfxDma_Dma_startChannelTransaction(&chn);
+ * // wait for service request which is triggered at the end of linked list transfers
+ * while( !(IfxDma_Dma_getSrcPointer(&chn))->B.SRR );
+ * \endcode
+ *
+ * \subsection IfxLld_Hssl_Hssl_Interrupts Interrupts usage
+ *
+ * Interrupts can be enabled from the application by using the APIs provided in the driver,
+ * there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,\n
+ * APIs to enable the the enterrupts are also available.
+ *
+ * here is an example of how to use the interrupts in HSSL driver.
+ *
+ * Using HSCT interrupts
+ *
+ * After initialising HSCT module \ref IfxLld_Hssl_Hssl_InitModule
+ *
+ * choose what flags needs to be enabled for HSCT interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
+ * and after choosing all the flags needed, enable the HSCT interrupt with desired type of service and priority.
+ *
+ * \code
+ * Ifx_HSCT *hsct = &MODULE_HSCT;
+ * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_headerError);
+ * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_payloadError);
+ * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_commandError);
+ * IfxHssl_enableHsctInterruptFlag(hsct, IfxHssl_Hsct_InterruptSource_speedModeSwitchError);
+ *
+ * // enable the HSCT interrupt
+ * IfxHssl_enableHsctInterrupt(hsct, IfxSrc_Tos_cpu0, 4);
+ * \endcode
+ *
+ * Using HSSl interrupts
+ *
+ * HSSL global error interrupt (EXI)
+ *
+ * After initilaising HSSL module \ref IfxLld_Hssl_Hssl_InitModule
+ *
+ * choose what flags needs to be enabled for HSSL global error (EXI) interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
+ * and after choosing all the flags needed, enable the HSSL EXI interrupt with desired type of service and priority
+ *
+ * \code
+ * Ifx_HSSL *hssl = &MODULE_HSSL;
+ * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_busAccessError);
+ * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_dataLengthError);
+ * IfxHssl_enableHsslGlobalErrorInterruptFlag(hssl, IfxHssl_Hssl_EXIInterruptSource_crcError);
+ *
+ *
+ * // enable the HSSL EXI interrupt
+ * IfxHssl_enableHsslEXIInterrupt(hssl, IfxSrc_Tos_cpu0, 6);
+ * \endcode
+ *
+ * HSSL channel specific error interrupt (ERR)
+ *
+ * After initilaising HSSL channel \ref IfxLld_Hssl_Hssl_InitChannel
+ *
+ * choose what flags needs to be enabled for HSSL channel specific error (ERR) interrupt and call the following function once for each flag by choosing the right flag as parameter,\n
+ * and after choosing all the flags needed, enable the HSSL ERR interrupt with desired channel, type of service and priority
+ *
+ * \code
+ * Ifx_HSSL *hssl = &MODULE_HSSL;
+ * IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_transactionTagError);
+ * IfxHssl_enableHsslChannelErrorInterruptFlag(hssl, channelId_0, IfxHssl_Hssl_ERRInterruptSource_timeoutError);
+ *
+ * // enable the HSSL ERR interrupt
+ * IfxHssl_enableHsslERRInterrupt(hssl, channelId_0, IfxSrc_Tos_cpu0, 8);
+ * \endcode
+ *
+ * you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts \ref IfxLld_Cpu_Irq_Usage
+ *
+ * some additional APIs to clear, disable interrupt flags and get flag status are also available.
+ *
+ * \defgroup IfxLld_Hssl_Hssl HSSL
+ * \ingroup IfxLld_Hssl
+ * \defgroup IfxLld_Hssl_Hssl_DataStructures Data Structures
+ * \ingroup IfxLld_Hssl_Hssl
+ * \defgroup IfxLld_Hssl_Hssl_Enumerations Enumerations
+ * \ingroup IfxLld_Hssl_Hssl
+ * \defgroup IfxLld_Hssl_Hssl_ModuleFunctions Module Functions
+ * \ingroup IfxLld_Hssl_Hssl
+ * \defgroup IfxLld_Hssl_Hssl_ChannelFunctions Channel Functions
+ * \ingroup IfxLld_Hssl_Hssl
+ * \defgroup IfxLld_Hssl_Hssl_SimpleCom Simple Communication
+ * \ingroup IfxLld_Hssl_Hssl
+ * \defgroup IfxLld_Hssl_Hssl_ErrorHandling Error Handling
+ * \ingroup IfxLld_Hssl_Hssl
+ * \defgroup IfxLld_Hssl_Hssl_StreamingCom Streaming Communication
+ * \ingroup IfxLld_Hssl_Hssl
+ */
+
+#ifndef IFXHSSL_HSSL_H
+#define IFXHSSL_HSSL_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Hssl/Std/IfxHssl.h"
+#include "Port/Std/IfxPort.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Hssl_Hssl_Enumerations
+ * \{ */
+/** \brief frame request selection
+ */
+typedef enum
+{
+ IfxHssl_Hssl_FrameRequest_readFrame = 1, /**< \brief read frame rquest */
+ IfxHssl_Hssl_FrameRequest_writeFrame = 2, /**< \brief write frame rquest */
+ IfxHssl_Hssl_FrameRequest_triggerFrame = 3, /**< \brief trigger frame rquest */
+ IfxHssl_Hssl_FrameRequest_readId = 4, /**< \brief read id request */
+ IfxHssl_Hssl_FrameRequest_noAction = 5 /**< \brief no action */
+} IfxHssl_Hssl_FrameRequest;
+
+/** \brief module status
+ */
+typedef enum
+{
+ IfxHssl_Hssl_Status_ok = 0, /**< \brief status ok */
+ IfxHssl_Hssl_Status_busy = 1, /**< \brief status busy */
+ IfxHssl_Hssl_Status_error = 2 /**< \brief status error */
+} IfxHssl_Hssl_Status;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Hssl_Hssl_DataStructures
+ * \{ */
+/** \brief structure for access windows
+ */
+typedef struct
+{
+ uint32 start; /**< \brief start of the access */
+ uint32 end; /**< \brief end of the access */
+} IfxHssl_Hssl_AccessWindow;
+
+/** \} */
+
+/** \brief structure for error flags
+ */
+typedef struct
+{
+ uint8 notAcknowledgeError : 1; /**< \brief not acknowledge error / tag error */
+ uint8 transactionTagError : 1; /**< \brief transaction tag error */
+ uint8 timeoutError : 1; /**< \brief timeout error */
+ uint8 unexpectedError : 1; /**< \brief unexpected type of frame error */
+ uint8 memoryAccessViolation : 1; /**< \brief memory access violation */
+ uint8 busAccessError : 1; /**< \brief SRI/SPB bus access error */
+ uint8 channelNumberCodeError : 1; /**< \brief PHY inconsistency error 1 (channel number code error) */
+ uint8 dataLengthError : 1; /**< \brief PHY inconsistency error 2 (data length error) */
+ uint8 crcError : 1; /**< \brief CRC error */
+} IfxHssl_Hssl_errorFlags;
+
+/** \addtogroup IfxLld_Hssl_Hssl_DataStructures
+ * \{ */
+/** \brief HSSL Handle
+ */
+typedef struct
+{
+ Ifx_HSSL *hssl; /**< \brief pointer to HSSL register */
+ IfxHssl_Hssl_errorFlags errorFlags; /**< \brief structure for error flags */
+ boolean loopBack; /**< \brief loop back (enable / disable) for streaming transfers within the microcontroller */
+} IfxHssl_Hssl;
+
+/** \brief channel handle
+ */
+typedef struct
+{
+ Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
+ Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
+ IfxHssl_ChannelId channelId; /**< \brief channel number (id) */
+ IfxHssl_Hssl_FrameRequest currentFrameRequest; /**< \brief current frame request */
+ IfxHssl_StreamingMode streamingMode; /**< \brief streaming mode selection ( single / continuous ) */
+ boolean loopBack; /**< \brief loopback (enable / disable) for streaming transfers within the microcontroller */
+ boolean streamingModeOn; /**< \brief streaming mode or command mode */
+} IfxHssl_Hssl_Channel;
+
+/** \brief configuration structure for channel
+ */
+typedef struct
+{
+ Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
+ Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
+ IfxHssl_ChannelId channelId; /**< \brief channel number (id) */
+ IfxHssl_StreamingMode streamingMode; /**< \brief streaming mode selection ( single / continuous ) */
+ boolean loopBack; /**< \brief loop back (enable / disable) for streaming transfers within the microcontroller */
+} IfxHssl_Hssl_ChannelConfig;
+
+/** \brief configuration structure of the HSSL module
+ */
+typedef struct
+{
+ Ifx_HSSL *hssl; /**< \brief pointer to HSSL registers */
+ IfxHssl_Hssl_AccessWindow accessWindow0; /**< \brief access window of channel 0 */
+ IfxHssl_Hssl_AccessWindow accessWindow1; /**< \brief access window of channel 1 */
+ IfxHssl_Hssl_AccessWindow accessWindow2; /**< \brief access window of channel 2 */
+ IfxHssl_Hssl_AccessWindow accessWindow3; /**< \brief access window of channel 3 */
+ uint16 preDivider; /**< \brief Defines the down-scaled module clock to be used by all channel timeout timers */
+} IfxHssl_Hssl_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Hssl_Hssl_ModuleFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the module
+ * \param hsct HSCT Handle
+ * \param config configuration structure of the HSCT module
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN void IfxHssl_Hssl_initHsctModule(IfxHssl_Hsct *hsct, const IfxHssl_Hsct_Config *config);
+
+/** \brief Fills the config structure with default values
+ * \param config configuration structure of the HSCT module
+ * \param hsct pointer to HSCT register
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN void IfxHssl_Hssl_initHsctModuleConfig(IfxHssl_Hsct_Config *config, Ifx_HSCT *hsct);
+
+/** \brief Initialises the Hssl module
+ * \param hssl HSSL handle
+ * \param config configuration structure of the module
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN void IfxHssl_Hssl_initHsslModule(IfxHssl_Hssl *hssl, const IfxHssl_Hssl_Config *config);
+
+/** \brief Fills the config structure with default values
+ * \param config configuration structure of the module
+ * \param hssl pointer to HSSL registers
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN void IfxHssl_Hssl_initHsslModuleConfig(IfxHssl_Hssl_Config *config, Ifx_HSSL *hssl);
+
+/** \} */
+
+/** \addtogroup IfxLld_Hssl_Hssl_ChannelFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the channel
+ * \param channel channel handle
+ * \param channelConfig configuration structure for channel
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN void IfxHssl_Hssl_initChannel(IfxHssl_Hssl_Channel *channel, const IfxHssl_Hssl_ChannelConfig *channelConfig);
+
+/** \brief Fills the channel config structure with default values
+ * \param channelConfig configuration structure for channel
+ * \param hssl HSSL Handle
+ * \param hsct HSCT Handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN void IfxHssl_Hssl_initChannelConfig(IfxHssl_Hssl_ChannelConfig *channelConfig, IfxHssl_Hssl *hssl, IfxHssl_Hsct *hsct);
+
+/** \} */
+
+/** \addtogroup IfxLld_Hssl_Hssl_SimpleCom
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief reads and returs the data
+ * \param channel channel handle
+ * \return data
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initiates read request
+ * \param channel channel handle
+ * \param address address of the location from where the data is to be read
+ * \param dataLength length of the data
+ * \return module status (ok, busy, error)
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_read(IfxHssl_Hssl_Channel *channel, uint32 address, IfxHssl_DataLength dataLength);
+
+/** \brief sends a predefined command from master to slave
+ * \param hsct HSCT Handle
+ * \param command command value
+ * \return None
+ *
+ * Usage Example:
+ * \code
+ * // enable slave Tx channel (Rx disable to Rx low peed)
+ * IfxHssl_Hssl_sendControlCommand(&channel, IfxHssl_ControlCommand_enableReception);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxHssl_Hssl_sendControlCommand(IfxHssl_Hsct *hsct, uint8 command);
+
+/** \brief serves the frame request (read, write, trigger frame and read id)
+ * \param channel channel handle
+ * \param frameRequest frame request
+ * \param address address of the location (to be written into / read from)
+ * \param data data to be written
+ * \param dataLength length of the data
+ * \return module status (ok, busy, error)
+ */
+IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_singleFrameRequest(IfxHssl_Hssl_Channel *channel, IfxHssl_Hssl_FrameRequest frameRequest, uint32 address, uint32 data, IfxHssl_DataLength dataLength);
+
+/** \brief waits until the current transaction is done
+ * \param channel channel handle
+ * \return module status (ok, busy, error)
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_waitAcknowledge(IfxHssl_Hssl_Channel *channel);
+
+/** \brief writes single frame of data into the specified address
+ * \param channel channel handle
+ * \param address address of the location where the data is to be written
+ * \param data data that needs to be written
+ * \param dataLength length of the data (8, 16, 32 bit)
+ * \return module status (ok, busy, error)
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_write(IfxHssl_Hssl_Channel *channel, uint32 address, uint32 data, IfxHssl_DataLength dataLength);
+
+/** \} */
+
+/** \addtogroup IfxLld_Hssl_Hssl_ErrorHandling
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief stores the status of errors in the respective members of the error flags structure
+ * \param hssl HSSL Handle
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_Hssl_checkErrors(IfxHssl_Hssl *hssl);
+
+/** \brief clears the status of members in the error flags structure
+ * \param hssl HSSL Handle
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_Hssl_clearErrorFlags(IfxHssl_Hssl *hssl);
+
+/** \brief a simple software delay
+ * \param hsct HSCT Handle
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_Hssl_delay(IfxHssl_Hsct *hsct);
+
+/** \} */
+
+/** \addtogroup IfxLld_Hssl_Hssl_StreamingCom
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Prepares the target device for streaming
+ * \param channel channel handle
+ * \param slaveTargetAddress address of the location on target device where the data needs to be transfered
+ * \param count Frame count (length of the data in the memory as 256 bytes per frame)
+ * \return module status (ok, busy, error)
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_prepareStream(IfxHssl_Hssl_Channel *channel, uint32 slaveTargetAddress, Ifx_SizeT count);
+
+/** \brief transfers one memory block of data
+ * useful for transfering huge data from one location to another and between devices.
+ * NOTE: This function should be called only for IfxHssl_ChannelId_2
+ * \param hssl HSSL handle
+ * \param data starting address of the location to be read from (memory block 0 / HSSL_ISSA0)
+ * \param count Frame count (length of the data in the memory as 256 bytes per frame)
+ * \return module status (ok, busy, error)
+ *
+ * A coding example can be found in \ref IfxLld_Hssl_Hssl_Usage
+ *
+ */
+IFX_EXTERN IfxHssl_Hssl_Status IfxHssl_Hssl_writeStream(IfxHssl_Hssl *hssl, uint32 *data, Ifx_SizeT count);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE uint32 IfxHssl_Hssl_getReadData(IfxHssl_Hssl_Channel *channel)
+{
+ Ifx_HSSL_I *hsslI = (Ifx_HSSL_I *)&channel->hssl->I[channel->channelId];
+ return hsslI->IRD.U; /* retutn the data read from the data register */
+}
+
+
+#endif /* IFXHSSL_HSSL_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Std/IfxHssl.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Std/IfxHssl.c
new file mode 100644
index 0000000..79e5d49
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Std/IfxHssl.c
@@ -0,0 +1,243 @@
+/**
+ * \file IfxHssl.c
+ * \brief HSSL basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxHssl.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxHssl_disableHsctModule(Ifx_HSCT *hsct)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
+ hsct->CLC.B.DISR = 1; /* disables the module */
+ IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
+}
+
+
+void IfxHssl_disableHsslModule(Ifx_HSSL *hssl)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
+ hssl->CLC.B.DISR = 1; /* disables the module */
+ IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
+}
+
+
+void IfxHssl_enableHsctModule(Ifx_HSCT *hsct)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
+ hsct->CLC.B.DISR = 0; /* enables the module */
+ IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
+}
+
+
+void IfxHssl_enableHsslModule(Ifx_HSSL *hssl)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(psw); /* clears the endinit protection */
+ hssl->CLC.B.DISR = 0; /* enables the module */
+ IfxScuWdt_setCpuEndinit(psw); /* sets the endinit protection back on */
+}
+
+
+Ifx_HSCT *IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct)
+{
+ Ifx_HSCT *module;
+
+ if (hsct < IFXHSSL_NUM_MODULES)
+ {
+ module = (Ifx_HSCT *)IfxHssl_cfg_hsctIndexMap[hsct].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
+
+
+IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct)
+{
+ uint32 index;
+ IfxHssl_hsctIndex result;
+
+ result = IfxHssl_hsctIndex_none;
+
+ for (index = 0; index < IFXHSSL_NUM_MODULES; index++)
+ {
+ if (IfxHssl_cfg_hsctIndexMap[index].module == hsct)
+ {
+ result = (IfxHssl_hsctIndex)IfxHssl_cfg_hsctIndexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct)
+{
+ IFX_UNUSED_PARAMETER(hsct);
+ return &MODULE_SRC.HSCT.HSCT[0].SR;
+}
+
+
+Ifx_HSSL *IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl)
+{
+ Ifx_HSSL *module;
+
+ if (hssl < IFXHSSL_NUM_MODULES)
+ {
+ module = (Ifx_HSSL *)IfxHssl_cfg_hsslIndexMap[hssl].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
+{
+ IFX_UNUSED_PARAMETER(hssl);
+ return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].COK;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
+{
+ IFX_UNUSED_PARAMETER(hssl);
+ return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].ERR;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl)
+{
+ IFX_UNUSED_PARAMETER(hssl);
+ return &MODULE_SRC.HSSL.EXI;
+}
+
+
+IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl)
+{
+ uint32 index;
+ IfxHssl_hsslIndex result;
+
+ result = IfxHssl_hsslIndex_none;
+
+ for (index = 0; index < IFXHSSL_NUM_MODULES; index++)
+ {
+ if (IfxHssl_cfg_hsslIndexMap[index].module == hssl)
+ {
+ result = (IfxHssl_hsslIndex)IfxHssl_cfg_hsslIndexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
+{
+ IFX_UNUSED_PARAMETER(hssl);
+ return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].RDI;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId)
+{
+ IFX_UNUSED_PARAMETER(hssl);
+ return &MODULE_SRC.HSSL.HSSL[(uint32)channelId].TRG;
+}
+
+
+void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ hsct->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ hsct->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == hsct->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ hsct->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ hssl->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ hssl->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == hssl->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ hssl->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Std/IfxHssl.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Std/IfxHssl.h
new file mode 100644
index 0000000..855309c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Std/IfxHssl.h
@@ -0,0 +1,965 @@
+/**
+ * \file IfxHssl.h
+ * \brief HSSL basic functionality
+ * \ingroup IfxLld_Hssl
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Hssl_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Hssl_Std
+ * \defgroup IfxLld_Hssl_Std_HsctFunctions Hsct Functions
+ * \ingroup IfxLld_Hssl_Std
+ * \defgroup IfxLld_Hssl_Std_Structures Data Structures
+ * \ingroup IfxLld_Hssl_Std
+ * \defgroup IfxLld_Hssl_Std_HsslFunctions Hssl Functions
+ * \ingroup IfxLld_Hssl_Std
+ */
+
+#ifndef IFXHSSL_H
+#define IFXHSSL_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxHssl_cfg.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "IfxHssl_bf.h"
+#include "IfxHsct_bf.h"
+#include "Src/Std/IfxSrc.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Hssl_Std_Enumerations
+ * \{ */
+/** \brief channel selection
+ */
+typedef enum
+{
+ IfxHssl_ChannelId_0, /**< \brief Channel 0 */
+ IfxHssl_ChannelId_1, /**< \brief Channel 1 */
+ IfxHssl_ChannelId_2, /**< \brief Channel 2 */
+ IfxHssl_ChannelId_3 /**< \brief Channel 3 */
+} IfxHssl_ChannelId;
+
+/** \brief SysClk / Reference Clock Frequency rate
+ * Definition in Ifx_HSCT.INIT.B.SRCF
+ */
+typedef enum
+{
+ IfxHssl_ClockFrequencyRate_20Mhz = 0, /**< \brief SysClk/ RefClk is 20 MHz (Divider 1/1) */
+ IfxHssl_ClockFrequencyRate_10Mhz = 1 /**< \brief SysClk/ RefClk is 10 MHz (Divider 1/2) */
+} IfxHssl_ClockFrequencyRate;
+
+/** \brief communication command selection
+ * Definition in Ifx_HSSL.I.ICON.B.RWT
+ */
+typedef enum
+{
+ IfxHssl_Command_noAction = 0, /**< \brief command no action */
+ IfxHssl_Command_readFrame = 1, /**< \brief command read frame */
+ IfxHssl_Command_writeFrame = 2, /**< \brief command write frame */
+ IfxHssl_Command_triggerFrame = 3 /**< \brief command trigger frame */
+} IfxHssl_Command;
+
+/** \brief predefined control command payload values
+ */
+typedef enum
+{
+ IfxHssl_ControlCommand_ping = 0, /**< \brief ping (send by master. Slave sends back a fixed 32-bit payload result.) */
+ IfxHssl_ControlCommand_highSpeedClockStart = 2, /**< \brief slave interface clock multiplier start (in preparation for high speed mode) */
+ IfxHssl_ControlCommand_highSpeedClockStop = 4, /**< \brief slave interface clock multiplier stop (after fallback from high speed mode) */
+ IfxHssl_ControlCommand_lowSpeedTransmission = 8, /**< \brief select low speed mode for transfers from the Master to the Slave */
+ IfxHssl_ControlCommand_highSpeedTransmission = 16, /**< \brief select high speed mode for transfers from the Master to the Slave */
+ IfxHssl_ControlCommand_lowSpeedReception = 32, /**< \brief select low speed mode for transfers from the Slave to the Master */
+ IfxHssl_ControlCommand_mediumSpeedReception = 64, /**< \brief select medium speed mode for transfers from the Slave to the master */
+ IfxHssl_ControlCommand_highSpeedReception = 128, /**< \brief select high speed mode for transfers from the Slave to the master */
+ IfxHssl_ControlCommand_enableReception = 49, /**< \brief enable Slave interface transmitter */
+ IfxHssl_ControlCommand_disableReception = 50, /**< \brief disable Slave interface transmitter */
+ IfxHssl_ControlCommand_turnOnClockTestMode = 52, /**< \brief turn on clock test mode */
+ IfxHssl_ControlCommand_turnOffClockTestMode = 56, /**< \brief turn off clock test mode */
+ IfxHssl_ControlCommand_turnOnPayloadLoopback = 255 /**< \brief turn on payload loopback */
+} IfxHssl_ControlCommand;
+
+/** \brief Defines the length of the data in bits of the write and read command.
+ * Definition in Ifx_HSSL.I.ICON.B.DATLEN
+ */
+typedef enum
+{
+ IfxHssl_DataLength_8bit = 0, /**< \brief 8 bit */
+ IfxHssl_DataLength_16bit = 1, /**< \brief 16 bit */
+ IfxHssl_DataLength_32bit = 2 /**< \brief 32 bit */
+} IfxHssl_DataLength;
+
+/** \brief HSCT interrupt source
+ * Definition in Ifx_HSCT.IRQ
+ */
+typedef enum
+{
+ IfxHssl_Hsct_InterruptSource_headerError = IFX_HSCT_IRQ_HER_OFF, /**< \brief Header error detected */
+ IfxHssl_Hsct_InterruptSource_payloadError = IFX_HSCT_IRQ_PYER_OFF, /**< \brief Payload error detected */
+ IfxHssl_Hsct_InterruptSource_commandError = IFX_HSCT_IRQ_CER_OFF, /**< \brief HSCT Command error */
+ IfxHssl_Hsct_InterruptSource_interfaceControlFrameSend = IFX_HSCT_IRQ_IFCFS_OFF, /**< \brief Interface control frame send */
+ IfxHssl_Hsct_InterruptSource_speedModeSwitchError = IFX_HSCT_IRQ_SMER_OFF, /**< \brief Speed mode switch error */
+ IfxHssl_Hsct_InterruptSource_unsolicitedMessageSendFinished = IFX_HSCT_IRQ_USMSF_OFF, /**< \brief Unsolicited message frame send finished */
+ IfxHssl_Hsct_InterruptSource_pllLockLosterror = IFX_HSCT_IRQ_PLER_OFF, /**< \brief Pll lock lost error */
+ IfxHssl_Hsct_InterruptSource_UnsolicitedMessageReceived = IFX_HSCT_IRQ_USM_OFF, /**< \brief Unsolicited message received */
+ IfxHssl_Hsct_InterruptSource_pingAnswerReceived = IFX_HSCT_IRQ_PAR_OFF, /**< \brief PING Answer Received */
+ IfxHssl_Hsct_InterruptSource_txTransferError = IFX_HSCT_IRQ_TXTE_OFF, /**< \brief TX transfer error occurred on a disabled
+ * TX channel */
+ IfxHssl_Hsct_InterruptSource_synchronizationFifoOverflow = IFX_HSCT_IRQ_SFO_OFF, /**< \brief Synchronization FIFO overflow (in RX
+ * direction) */
+ IfxHssl_Hsct_InterruptSource_synchronizationFifoUnderflow = IFX_HSCT_IRQ_SFU_OFF /**< \brief Synchronization FIFO underflow (in TX
+ * direction) */
+} IfxHssl_Hsct_InterruptSource;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_HSCT.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxHssl_Hsct_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxHssl_Hsct_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxHssl_Hsct_SleepMode;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_HSSL.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxHssl_Hssl_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxHssl_Hssl_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxHssl_Hssl_SleepMode;
+
+/** \brief interface mode (master IF /slave IF)
+ * Definition in Ifx_HSCT.INIT.B.IFM
+ */
+typedef enum
+{
+ IfxHssl_InterfaceMode_master = 0, /**< \brief master IF mode */
+ IfxHssl_InterfaceMode_slave = 1 /**< \brief slave IF mode */
+} IfxHssl_InterfaceMode;
+
+/** \brief master mode receive speed
+ * Definition in Ifx_HSCT.IFCTRL.B.MRXSPEED
+ */
+typedef enum
+{
+ IfxHssl_MasterModeRxSpeed_lowSpeed = 0, /**< \brief low speed */
+ IfxHssl_MasterModeRxSpeed_mediumSpeed = 1, /**< \brief medium speed */
+ IfxHssl_MasterModeRxSpeed_highSpeed = 2 /**< \brief high speed */
+} IfxHssl_MasterModeRxSpeed;
+
+/** \brief master mode transmit speed
+ * Definition in Ifx_HSCT.IFCTRL.B.MTXSPEED
+ */
+typedef enum
+{
+ IfxHssl_MasterModeTxSpeed_lowSpeed = 0, /**< \brief low speed */
+ IfxHssl_MasterModeTxSpeed_highSpeed = 2 /**< \brief high speed */
+} IfxHssl_MasterModeTxSpeed;
+
+/** \brief PLL reference clock
+ * Definition in Ifx_HSCT.CONFIGPHY.B.OSCCLKEN
+ */
+typedef enum
+{
+ IfxHssl_PllReferenceClock_hsctSystemClockInput = 0, /**< \brief hsct system clock input (HSCT SysClk_i) */
+ IfxHssl_PllReferenceClock_oscillatorInput = 1 /**< \brief oscillator input */
+} IfxHssl_PllReferenceClock;
+
+/** \brief streaming mode ( single / continuous )
+ * Definition in Ifx_HSSL.CFG.B.SMT/SMR
+ */
+typedef enum
+{
+ IfxHssl_StreamingMode_continuous = 0, /**< \brief streaming mode continuous (with two memory blocks) */
+ IfxHssl_StreamingMode_single = 1 /**< \brief streaming mode single (with one memory block) */
+} IfxHssl_StreamingMode;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxHssl_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxHssl_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxHssl_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxHssl_SuspendMode;
+
+/** \} */
+
+/** \brief HSSL channel error interrupt source, which triggers the ERR interrupt
+ * Definition in Ifx_HSSL.MFLAGS
+ */
+typedef enum
+{
+ IfxHssl_Hssl_ERRInterruptSource_notAcknowledgeError = IFX_HSSL_MFLAGS_NACK_OFF, /**< \brief NACK error (triggers ERR interrupt) */
+ IfxHssl_Hssl_ERRInterruptSource_transactionTagError = IFX_HSSL_MFLAGS_TTE_OFF, /**< \brief Transaction Tag Error (triggers ERR interrupt) */
+ IfxHssl_Hssl_ERRInterruptSource_timeoutError = IFX_HSSL_MFLAGS_TIMEOUT_OFF, /**< \brief Timeout error (triggers ERR interrupt) */
+ IfxHssl_Hssl_ERRInterruptSource_unexpectedError = IFX_HSSL_MFLAGS_UNEXPECTED_OFF /**< \brief Unexpected error (triggers ERR interrupt) */
+} IfxHssl_Hssl_ERRInterruptSource;
+
+/** \brief HSSL global error interrupt source, which triggers the EXI interrupt
+ * Definition in Ifx_HSSL.MFLAGS
+ */
+typedef enum
+{
+ IfxHssl_Hssl_EXIInterruptSource_memoryAccessViolation = IFX_HSSL_MFLAGS_MAV_OFF, /**< \brief Memory Access Violation error (triggers EXI interrupt) */
+ IfxHssl_Hssl_EXIInterruptSource_busAccessError = IFX_HSSL_MFLAGS_SRIE_OFF, /**< \brief SRI/SPB Bus Access Error (triggers EXI interrupt) */
+ IfxHssl_Hssl_EXIInterruptSource_channelNumberCodeError = IFX_HSSL_MFLAGS_PIE1_OFF, /**< \brief PHY Inconsistency Error 1 (Channel Number
+ * Code Error, triggers EXI interrupt) */
+ IfxHssl_Hssl_EXIInterruptSource_dataLengthError = IFX_HSSL_MFLAGS_PIE2_OFF, /**< \brief PHY Inconsistency Error 2 (Data Length Error, triggers EXI interrupt) */
+ IfxHssl_Hssl_EXIInterruptSource_crcError = IFX_HSSL_MFLAGS_CRCE_OFF /**< \brief CRC error (triggers EXI interrupt) */
+} IfxHssl_Hssl_EXIInterruptSource;
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Hssl_Std_Structures
+ * \{ */
+/** \brief HSCT module handle
+ */
+typedef struct
+{
+ Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
+ boolean loopBack; /**< \brief loopc back selection */
+} IfxHssl_Hsct;
+
+/** \brief Configuration structure of the HSCT module
+ */
+typedef struct
+{
+ Ifx_HSCT *hsct; /**< \brief pointer to HSCT registers */
+ IfxHssl_InterfaceMode interfaceMode; /**< \brief interface mode (master IF /slave IF) */
+ boolean highSpeedMode; /**< \brief high speed mode selection */
+ boolean loopBack; /**< \brief loopc back selection */
+} IfxHssl_Hsct_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Hssl_Std_HsctFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the HSCT interrupt flag
+ * \param hsct pointer to HSCT registers
+ * \param source HSCT interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
+
+/** \brief Enables HSCT interrupt flag
+ * \param hsct pointer to HSCT registers
+ * \param source HSCT interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
+
+/** \brief Enables HSCT interrupt
+ * \param hsct pointer to HSCT registers
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority Priority of the interrupt
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief Enables HSCT interrupt flag
+ * \param hsct pointer to HSCT registers
+ * \param source HSCT interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
+
+/** \brief Returns the HSCT interrupt flag status
+ * \param hsct pointer to HSCT registers
+ * \param source HSCT interrupt source
+ * \return Status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param hsct pointer to HSCT registers
+ * \param mode mode selection (enable/disable)
+ * \return None
+ */
+IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode);
+
+/** \brief Get the last received unsolicited status message
+ * \param hsct pointer to HSCT registers
+ * \return Get the unsolicited status message.
+ */
+IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct);
+
+/** \brief Send the unsolicited status message
+ * \param hsct pointer to HSCT registers
+ * \param message Unsolicited status message to be sent
+ * \return None
+ */
+IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message);
+
+/** \brief Set the HSCT RX link speed
+ * \param hsct pointer to HSCT registers
+ * \param rxSpeed Speed for Rx link
+ * \return None
+ */
+IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed);
+
+/** \brief Set the HSCT TX link speed
+ * \param hsct pointer to HSCT registers
+ * \param txSpeed Speed for Tx link
+ * \return None
+ */
+IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed);
+
+/** \brief Enable hsct transmit path in master interface
+ * \param hsct pointer to HSCT registers
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct);
+
+/** \brief Enable hsct receive path in master interface
+ * \param hsct pointer to HSCT registers
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct);
+
+/** \brief Disable hsct transmit path in master interface
+ * \param hsct pointer to HSCT registers
+ * \return None
+ */
+IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct);
+
+/** \brief Disable hsct receive path in master interface
+ * \param hsct pointer to HSCT registers
+ * \return None
+ */
+IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disables hsct module
+ * \param hsct pointer to HSCT registers
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_disableHsctModule(Ifx_HSCT *hsct);
+
+/** \brief Enables hsct module
+ * \param hsct pointer to HSCT registers
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_enableHsctModule(Ifx_HSCT *hsct);
+
+/**
+ * \param hsct Resource index of the HSCT
+ * \return HSCT module register address
+ */
+IFX_EXTERN Ifx_HSCT *IfxHssl_getHsctAddress(IfxHssl_hsctIndex hsct);
+
+/** \brief API to get the resource index of the HSCT specified.
+ * \return Resource index of the HSCT
+ */
+IFX_EXTERN IfxHssl_hsctIndex IfxHssl_getHsctIndex(Ifx_HSCT *hsct);
+
+/** \brief Returns the SRC pointer for HSCT
+ * \param hsct pointer to HSCT registers
+ * \return SRC pointer for HSCT
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsctSrcPointer(Ifx_HSCT *hsct);
+
+/** \brief resets HSCT kernel
+ * \param hsct pointer to HSCT registers
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_resetHsctKernel(Ifx_HSCT *hsct);
+
+/** \} */
+
+/** \addtogroup IfxLld_Hssl_Std_HsslFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the HSSl channel error interrupt flag
+ * \param hssl pointer to HSSl registers
+ * \param source HSSL channel error interrupt source
+ * \param channelId HSSL channel number
+ * \return None
+ */
+IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
+
+/** \brief Clears the HSSl global error interrupt flag
+ * \param hssl pointer to HSSl registers
+ * \param source HSSL global error interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
+
+/** \brief Clears the Initialise Mode Flag status
+ * \param hssl pointer to HSSL registers
+ * \return None
+ */
+IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl);
+
+/** \brief Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt
+ * \param hssl pointer to HSSl registers
+ * \param source HSSL channel error interrupt source
+ * \param channelId HSSL channel number
+ * \return None
+ */
+IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
+
+/** \brief Disables the HSSl channel error interrupt flag, which trggers the EXI interrupt
+ * \param hssl pointer to HSSl registers
+ * \param source HSSL global error interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
+
+/** \brief Enables all error flags
+ * \param hssl pointer to HSSL registers
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl);
+
+/** \brief Enables HSSL COK interrupt of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param channelId HSSL channel number
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority Priority of the interrupt
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief Enables the HSSl channel error interrupt flag, which trggers the ERR interrupt
+ * \param hssl pointer to HSSl registers
+ * \param source HSSL channel error interrupt source
+ * \param channelId HSSL channel number
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
+
+/** \brief Enables HSSL ERR interrupt of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param channelId HSSL channel number
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority Priority of the interrupt
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief Enables HSSL EXI interrupt of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority Priority of the interrupt
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief Enables the HSSl global error interrupt flag, which trggers the EXI interrupt
+ * \param hssl pointer to HSSl registers
+ * \param source HSSL global error interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
+
+/** \brief Enables HSSL RDI interrupt of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param channelId HSSL channel number
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority Priority of the interrupt
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief Enables HSSL TRG interrupt of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param channelId HSSL channel number
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority Priority of the interrupt
+ * \return None
+ */
+IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief Returns the status of all MFLAGS status
+ * \param hssl pointer to HSSL registers
+ * \return MFLAGS status
+ */
+IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl);
+
+/** \brief Returns the Current Count value
+ * \param hssl pointer to HSSL registers
+ * \return Current Count value
+ */
+IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl);
+
+/** \brief Clears the HSSl channel error interrupt flag
+ * \param hssl pointer to HSSl registers
+ * \param source HSSL channel error interrupt source
+ * \param channelId HSSL channel number
+ * \return Status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId);
+
+/** \brief Clears the HSSl global error interrupt flag
+ * \param hssl pointer to HSSl registers
+ * \param source HSSL global error interrupt source
+ * \return Status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source);
+
+/** \brief Returns the Initialise Mode Flag status
+ * \param hssl pointer to HSSL registers
+ * \return status : TRUE/FALSE
+ */
+IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl);
+
+/** \brief Returns the Reload Count value
+ * \param hssl pointer to HSSL registers
+ * \return Current Count value
+ */
+IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param hssl Pointer to HSSL module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param hssl pointer to HSSL registers
+ * \param mode mode selection (enable/disable)
+ * \return None
+ */
+IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode);
+
+/** \brief Sets the Initialise Mode Flag
+ * \param hssl pointer to HSSL registers
+ * \return None
+ */
+IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl);
+
+/** \brief Sets the reload Count
+ * \param hssl pointer to HSSL registers
+ * \param reloadValue Reload Value
+ * \return None
+ */
+IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param hssl Pointer to HSSL module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode);
+
+/** \brief Sets the Timeout Reload Value
+ * \param hssl pointer to HSSL registers
+ * \param channelId HSSL channel number
+ * \param timeoutValue Timeout Value
+ * \return None
+ */
+IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief DIsables the hssl module
+ * \param hssl pointer to HSSl registers
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_disableHsslModule(Ifx_HSSL *hssl);
+
+/** \brief Enables the hssl module
+ * \param hssl pointer to HSSl registers
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_enableHsslModule(Ifx_HSSL *hssl);
+
+/**
+ * \param hssl Resource index of the HSSL
+ * \return HSSL module register address
+ */
+IFX_EXTERN Ifx_HSSL *IfxHssl_getHsslAddress(IfxHssl_hsslIndex hssl);
+
+/** \brief Returns the SRC pointer for HSSL COK of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param channelId HSSL channel number
+ * \return SRC pointer for HSSL COK interrupt of specific channel
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslCOKSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
+
+/** \brief Returns the SRC pointer for HSSL ERR of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param channelId HSSL channel number
+ * \return SRC pointer for HSSL ERR interrupt of specific channel
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslERRSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
+
+/** \brief Returns the SRC pointer for HSSL EXI interrupt
+ * \param hssl pointer to HSSl registers
+ * \return SRC pointer for HSSL EXI interrupt
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslEXISrcPointer(Ifx_HSSL *hssl);
+
+/** \brief API to get the resource index of the HSSL specified.
+ * \return Resource index of the HSSL
+ */
+IFX_EXTERN IfxHssl_hsslIndex IfxHssl_getHsslIndex(Ifx_HSSL *hssl);
+
+/** \brief Returns the SRC pointer for HSSL COK of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param channelId HSSL channel number
+ * \return SRC pointer for HSSL RDI interrupt of specific channel
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslRDISrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
+
+/** \brief Returns the SRC pointer for HSSL TRG of specified channel
+ * \param hssl pointer to HSSl registers
+ * \param channelId HSSL channel number
+ * \return SRC pointer for HSSL TRG interrupt of specific channel
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxHssl_getHsslTRGSrcPointer(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId);
+
+/** \brief resets the HSSL kernel
+ * \param hssl pointer to HSSL registers
+ * \return None
+ */
+IFX_EXTERN void IfxHssl_resetHsslKernel(Ifx_HSSL *hssl);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxHssl_clearHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
+{
+ uint32 value = 1 << source;
+ hsct->IRQCLR.U = value;
+}
+
+
+IFX_INLINE void IfxHssl_clearHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
+{
+ uint32 value = 1 << ((uint32)(channelId + source));
+ hssl->MFLAGSCL.U = value;
+}
+
+
+IFX_INLINE void IfxHssl_clearHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
+{
+ uint32 value = 1 << source;
+ hssl->MFLAGSCL.U = value;
+}
+
+
+IFX_INLINE void IfxHssl_clearInitialiseModeFlag(Ifx_HSSL *hssl)
+{
+ hssl->MFLAGSCL.B.INIC = 0x1U;
+}
+
+
+IFX_INLINE void IfxHssl_disableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
+{
+ uint32 value = 1 << source;
+ hsct->IRQEN.U &= ~value;
+}
+
+
+IFX_INLINE void IfxHssl_disableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
+{
+ uint32 value = 1 << ((uint32)(channelId + source));
+ hssl->MFLAGSEN.U &= ~value;
+}
+
+
+IFX_INLINE void IfxHssl_disableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
+{
+ uint32 value = 1 << source;
+ hssl->MFLAGSEN.U &= ~value;
+}
+
+
+IFX_INLINE void IfxHssl_enableAllErrorFlags(Ifx_HSSL *hssl)
+{
+ hssl->MFLAGSEN.U = 0x23E0FFFFU;
+}
+
+
+IFX_INLINE void IfxHssl_enableHsctInterrupt(Ifx_HSCT *hsct, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxHssl_getHsctSrcPointer(hsct);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+IFX_INLINE void IfxHssl_enableHsctInterruptFlag(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
+{
+ uint32 value = 1 << source;
+ hsct->IRQEN.U |= value;
+}
+
+
+IFX_INLINE void IfxHssl_enableHsslCOKInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxHssl_getHsslCOKSrcPointer(hssl, channelId);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+IFX_INLINE void IfxHssl_enableHsslChannelErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
+{
+ uint32 value = 1 << ((uint32)(channelId + source));
+ hssl->MFLAGSEN.U |= value;
+}
+
+
+IFX_INLINE void IfxHssl_enableHsslERRInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxHssl_getHsslERRSrcPointer(hssl, channelId);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+IFX_INLINE void IfxHssl_enableHsslEXIInterrupt(Ifx_HSSL *hssl, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxHssl_getHsslEXISrcPointer(hssl);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+IFX_INLINE void IfxHssl_enableHsslGlobalErrorInterruptFlag(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
+{
+ uint32 value = 1 << source;
+ hssl->MFLAGSEN.U |= value;
+}
+
+
+IFX_INLINE void IfxHssl_enableHsslRDIInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxHssl_getHsslRDISrcPointer(hssl, channelId);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+IFX_INLINE void IfxHssl_enableHsslTRGInterrupt(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxHssl_getHsslTRGSrcPointer(hssl, channelId);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+IFX_INLINE uint32 IfxHssl_getAllMflagsStatus(Ifx_HSSL *hssl)
+{
+ return hssl->MFLAGS.U;
+}
+
+
+IFX_INLINE uint16 IfxHssl_getCurrentCount(Ifx_HSSL *hssl)
+{
+ return hssl->IS.FC.B.CURCOUNT;
+}
+
+
+IFX_INLINE boolean IfxHssl_getHsctInterruptFlagStatus(Ifx_HSCT *hsct, IfxHssl_Hsct_InterruptSource source)
+{
+ return (hsct->IRQ.U >> source) & 0x1;
+}
+
+
+IFX_INLINE boolean IfxHssl_getHsslChannelErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_ERRInterruptSource source, IfxHssl_ChannelId channelId)
+{
+ return (hssl->MFLAGS.U >> ((uint32)(channelId + source))) & 0x1;
+}
+
+
+IFX_INLINE boolean IfxHssl_getHsslGloabalErrorInterruptFlagStatus(Ifx_HSSL *hssl, IfxHssl_Hssl_EXIInterruptSource source)
+{
+ return (hssl->MFLAGS.U >> source) & 0x1;
+}
+
+
+IFX_INLINE boolean IfxHssl_getInitialiseModeFlagStatus(Ifx_HSSL *hssl)
+{
+ return hssl->MFLAGS.B.INI != 0;
+}
+
+
+IFX_INLINE uint16 IfxHssl_getReloadCount(Ifx_HSSL *hssl)
+{
+ return hssl->IS.FC.B.RELCOUNT;
+}
+
+
+IFX_INLINE boolean IfxHssl_isModuleSuspended(Ifx_HSSL *hssl)
+{
+ Ifx_HSSL_OCS ocs;
+
+ /* read the status */
+ ocs.U = hssl->OCS.U;
+
+ /* return the status */
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxHssl_setHsctSleepMode(Ifx_HSCT *hsct, IfxHssl_Hsct_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ hsct->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxHssl_setHsslSleepMode(Ifx_HSSL *hssl, IfxHssl_Hssl_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ hssl->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxHssl_setInitialiseModeFlag(Ifx_HSSL *hssl)
+{
+ hssl->MFLAGSSET.B.INIS = 0x1U;
+}
+
+
+IFX_INLINE void IfxHssl_setReloadCount(Ifx_HSSL *hssl, uint16 reloadValue)
+{
+ hssl->IS.FC.B.RELCOUNT = reloadValue;
+}
+
+
+IFX_INLINE void IfxHssl_setSuspendMode(Ifx_HSSL *hssl, IfxHssl_SuspendMode mode)
+{
+ Ifx_HSSL_OCS ocs;
+
+ /* remove protection and configure the suspend mode. */
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ hssl->OCS.U = ocs.U;
+}
+
+
+IFX_INLINE void IfxHssl_setTimeoutReloadValue(Ifx_HSSL *hssl, IfxHssl_ChannelId channelId, uint8 timeoutValue)
+{
+ hssl->I[channelId].ICON.B.TOREL = timeoutValue;
+}
+
+
+IFX_INLINE uint32 IfxHssl_getHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct)
+{
+ return hsct->USMR.U;
+}
+
+
+IFX_INLINE void IfxHssl_sendHsctUnsolicitedStatusMessage(Ifx_HSCT *hsct, uint32 message)
+{
+ hsct->USMS.U = message;
+}
+
+
+IFX_INLINE void IfxHssl_setHsctRxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeRxSpeed rxSpeed)
+{
+ hsct->IFCTRL.B.MRXSPEED = rxSpeed;
+}
+
+
+IFX_INLINE void IfxHssl_setHsctTxLinkSpeed(Ifx_HSCT *hsct, IfxHssl_MasterModeTxSpeed txSpeed)
+{
+ hsct->IFCTRL.B.MTXSPEED = txSpeed;
+}
+
+
+IFX_INLINE void IfxHssl_enableHsctTransmitPath(Ifx_HSCT *hsct)
+{
+ hsct->DISABLE.B.TX_DIS = 0x0U;
+}
+
+
+IFX_INLINE void IfxHssl_enableHsctReceivePath(Ifx_HSCT *hsct)
+{
+ hsct->DISABLE.B.RX_DIS = 0x0U;
+}
+
+
+IFX_INLINE void IfxHssl_disableHsctTransmitPath(Ifx_HSCT *hsct)
+{
+ hsct->DISABLE.B.TX_DIS = 0x1U;
+}
+
+
+IFX_INLINE void IfxHssl_disableHsctReceivePath(Ifx_HSCT *hsct)
+{
+ hsct->DISABLE.B.RX_DIS = 0x1U;
+}
+
+
+#endif /* IFXHSSL_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/I2c/IfxI2c_I2c.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/I2c/IfxI2c_I2c.c
new file mode 100644
index 0000000..284df3b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/I2c/IfxI2c_I2c.c
@@ -0,0 +1,457 @@
+/**
+ * \file IfxI2c_I2c.c
+ * \brief I2C I2C details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxI2c_I2c.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c)
+{
+ config->i2c = i2c;
+ config->baudrate = 400000;
+ config->pins = NULL_PTR;
+}
+
+
+void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig)
+{
+ i2cDevice->i2c = i2cDeviceConfig->i2c;
+ i2cDevice->deviceAddress = i2cDeviceConfig->deviceAddress;
+}
+
+
+void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c)
+{
+ i2cDeviceConfig->i2c = i2c;
+ i2cDeviceConfig->deviceAddress = 0xff;
+}
+
+
+void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config)
+{
+ Ifx_I2C *i2cSFR = config->i2c;
+ i2c->i2c = i2cSFR;
+
+ IfxI2c_enableModule(i2cSFR);
+ IfxI2c_stop(i2cSFR); // enter config Mode
+ IfxI2c_configureAsMaster(i2cSFR);
+ IfxI2c_setBaudrate(i2cSFR, config->baudrate);
+
+ if (config->pins != NULL_PTR)
+ {
+ IfxI2c_initSclSdaPin(config->pins->scl, config->pins->sda, config->pins->padDriver);
+ }
+
+ IfxI2c_run(i2cSFR);
+ i2c->baudrate = IfxI2c_getBaudrate(i2cSFR);
+ i2c->busStatus = IfxI2c_getBusStatus(i2cSFR);
+ i2c->status = IfxI2c_I2c_Status_ok;
+}
+
+
+IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
+{
+ IfxI2c_I2c_Status status = IfxI2c_I2c_Status_ok;
+ Ifx_I2C *i2c = i2cDevice->i2c->i2c;
+ uint32 packet;
+ uint8 slAddr = i2cDevice->deviceAddress;
+
+ union data
+ {
+ uint32 packet;
+ uint8 packetbyte[4];
+ } rxdata;
+
+ rxdata.packet = 0;
+
+ sint32 bytesToReceive = size;
+ uint32 bytes;
+
+ // bus free?
+ if (IfxI2c_busIsFree(i2c) == FALSE)
+ {
+ status = IfxI2c_I2c_Status_busNotFree;
+ i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
+ i2cDevice->i2c->status = status;
+ return status;
+ }
+
+ IfxI2c_clearAllProtocolInterruptSources(i2c);
+ IfxI2c_clearAllErrorInterruptSources(i2c);
+
+ // send device address with RnW bit set
+ packet = slAddr | 1; // set read bit
+ IfxI2c_setTransmitPacketSize(i2c, 1); // send slave address packet with RnW = 1
+ IfxI2c_setReceivePacketSize(i2c, size); // set number of bytes to reveive
+ IfxI2c_writeFifo(i2c, packet);
+ IfxI2c_clearLastSingleRequestInterruptSource(i2c);
+ IfxI2c_clearSingleRequestInterruptSource(i2c);
+ IfxI2c_clearLastBurstRequestInterruptSource(i2c);
+ IfxI2c_clearBurstRequestInterruptSource(i2c);
+
+ /* Poll until aribtration lost, nack, or rx mode flag is reset, or the error is gone*/
+ while ((i2c->PIRQSS.U & ((1 << IFX_I2C_PIRQSS_AL_OFF) | (1 << IFX_I2C_PIRQSS_NACK_OFF) | (1 << IFX_I2C_PIRQSS_RX_OFF))) || i2c->ERRIRQSS.U)
+ {}
+
+ /* check status*/
+ if (i2c->ERRIRQSS.U)
+ {
+ IfxI2c_clearAllErrorInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+ else if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost) == TRUE)
+ {
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
+ status = IfxI2c_I2c_Status_al;
+ }
+ else if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived) == TRUE)
+ {
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived);
+ status = IfxI2c_I2c_Status_nak;
+ }
+ else if (size > 0) // required to poll for nak
+
+ {
+ if (size > 32) // if fifo is too small => disable global interrupts!
+ { // assumes TC is faster than i2c and therefor a fifo overflow is not possible
+ boolean intEnabled = IfxCpu_disableInterrupts(); // disable global interrupts to prevent fifo overflow
+ uint32 i;
+
+ for (i = 0; i < (uint32)size; i += 4)
+ {
+ if (bytesToReceive >= 4)
+ {
+ bytes = 4;
+ bytesToReceive -= 4;
+ }
+ else
+ {
+ bytes = bytesToReceive;
+ bytesToReceive = 0;
+ }
+
+ uint32 ris;
+
+ while (!(ris = i2c->RIS.U)) // wait for fifo request or error
+
+ {}
+
+ // check request flags
+ if (ris & ((1 << IFX_I2C_RIS_LSREQ_INT_OFF) | (1 << IFX_I2C_RIS_SREQ_INT_OFF) | (1 << IFX_I2C_RIS_LBREQ_INT_OFF) | (1 << IFX_I2C_RIS_BREQ_INT_OFF)))
+ {
+ rxdata.packet = i2c->RXD.U;
+ uint32 k;
+
+ for (k = 0; k < bytes; k++)
+ {
+ data[i + k] = rxdata.packetbyte[k];
+ }
+
+ IfxI2c_clearLastSingleRequestInterruptSource(i2c);
+ IfxI2c_clearSingleRequestInterruptSource(i2c);
+ IfxI2c_clearLastBurstRequestInterruptSource(i2c);
+ IfxI2c_clearBurstRequestInterruptSource(i2c);
+ }
+
+ // check errors
+ if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
+ {
+ IfxI2c_clearAllProtocolInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ break;
+ }
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
+ {
+ IfxI2c_clearAllErrorInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ break;
+ }
+ }
+
+ IfxCpu_restoreInterrupts(intEnabled); // (re-) enable global interrupts
+
+ // TX_END: transmission finished
+ while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
+ {}
+
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
+ }
+ else
+ {
+ // wait until all bytes are received
+ while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
+ {}
+
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
+
+ // check errors
+ uint32 ris;
+ ris = i2c->RIS.U;
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
+ {
+ IfxI2c_clearAllProtocolInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
+ {
+ IfxI2c_clearAllErrorInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+
+ if (status != IfxI2c_I2c_Status_error)
+ {
+ // read fifo
+ uint32 i;
+
+ for (i = 0; i < (uint32)size; i += 4)
+ {
+ if (bytesToReceive >= 4)
+ {
+ bytes = 4;
+ bytesToReceive -= 4;
+ }
+ else
+ {
+ bytes = bytesToReceive;
+ bytesToReceive = 0;
+ }
+
+ uint32 k;
+ rxdata.packet = i2c->RXD.U;
+ IfxI2c_clearLastSingleRequestInterruptSource(i2c);
+ IfxI2c_clearSingleRequestInterruptSource(i2c);
+ IfxI2c_clearLastBurstRequestInterruptSource(i2c);
+ IfxI2c_clearBurstRequestInterruptSource(i2c);
+
+ for (k = 0; k < bytes; k++)
+ {
+ data[i + k] = rxdata.packetbyte[k];
+ }
+ }
+ }
+ }
+
+ // finally check errors
+ uint32 ris;
+ ris = i2c->RIS.U;
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
+ {
+ IfxI2c_clearAllProtocolInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
+ {
+ IfxI2c_clearAllErrorInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+ }
+
+ IfxI2c_releaseBus(i2c);
+ i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
+ i2cDevice->i2c->status = status;
+ return status;
+}
+
+
+IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size)
+{
+ IfxI2c_I2c_Status status = IfxI2c_I2c_Status_ok;
+ Ifx_I2C *i2c = i2cDevice->i2c->i2c;
+ uint8 slAddr = i2cDevice->deviceAddress;
+ union data
+ {
+ uint32 packet;
+ uint8 packetbyte[4];
+ } txdata;
+
+ sint32 bytesToSend = size + 1; // +1 slave device address
+ uint32 bytes;
+
+ if (IfxI2c_busIsFree(i2c) == FALSE)
+ {
+ status = IfxI2c_I2c_Status_busNotFree;
+ i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
+ i2cDevice->i2c->status = status;
+ return status;
+ }
+
+ // build one packet containing the slave address
+
+ IfxI2c_clearAllProtocolInterruptSources(i2c);
+ IfxI2c_clearAllErrorInterruptSources(i2c);
+
+ // try to seize control, if not return
+ IfxI2c_setTransmitPacketSize(i2c, 1);
+ IfxI2c_writeFifo(i2c, slAddr);
+ IfxI2c_clearLastSingleRequestInterruptSource(i2c);
+ IfxI2c_clearSingleRequestInterruptSource(i2c);
+ IfxI2c_clearLastBurstRequestInterruptSource(i2c);
+ IfxI2c_clearBurstRequestInterruptSource(i2c);
+
+ // wait until packet is sent
+ while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
+ {}
+
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
+
+ // check status
+ if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost) == TRUE)
+ {
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
+ status = IfxI2c_I2c_Status_al;
+ }
+ else if (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived) == TRUE)
+ {
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived);
+ status = IfxI2c_I2c_Status_nak;
+ }
+ else if (size > 0) // write i2c device
+
+ {
+ uint32 i, j = 0;
+
+ // assumes TC is faster then i2c and therefor a fifo underflow is not possible
+ boolean intEnabled = IfxCpu_disableInterrupts(); // disable global interrupts to prevent FIFO underflow
+ IfxI2c_setTransmitPacketSize(i2c, size + 1);
+
+ for (i = 0; i < (uint32)(size + 1); i += 4)
+ {
+ if (bytesToSend >= 4)
+ {
+ bytes = 4;
+ bytesToSend -= 4;
+ }
+ else
+ {
+ bytes = bytesToSend;
+ bytesToSend = 0;
+ }
+
+ txdata.packet = 0;
+
+ for (j = 0; j < bytes; j++)
+ {
+ if ((i == 0) && (j == 0))
+ {
+ txdata.packetbyte[j] = (uint8)slAddr;
+ }
+
+ else
+ {
+ txdata.packetbyte[j] = (uint8)data[i + j - 1];
+ }
+ }
+
+ do
+ {
+ // check errors
+ uint32 ris;
+ ris = i2c->RIS.U;
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
+ {
+ IfxI2c_clearAllProtocolInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
+ {
+ IfxI2c_clearAllErrorInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+ } while (i2c->FFSSTAT.B.FFS == 8 && status != IfxI2c_I2c_Status_error); // wait to prevent FIFO overflow
+
+ if (status == IfxI2c_I2c_Status_error)
+ {
+ break;
+ }
+
+ IfxI2c_writeFifo(i2c, txdata.packet);
+ IfxI2c_clearLastSingleRequestInterruptSource(i2c);
+ IfxI2c_clearSingleRequestInterruptSource(i2c);
+ IfxI2c_clearLastBurstRequestInterruptSource(i2c);
+ IfxI2c_clearBurstRequestInterruptSource(i2c);
+ }
+
+ IfxCpu_restoreInterrupts(intEnabled); // (re-) enable global interrupts
+
+ // wait until all bytes are sent
+ while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
+ {}
+
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
+
+ // finally check errors
+ uint32 ris;
+ ris = i2c->RIS.U;
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_P_INT_OFF)) // check protocol flags
+ {
+ IfxI2c_clearAllProtocolInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+
+ if (ris & (1 << IFX_I2C_RIS_I2C_ERR_INT_OFF)) // error flags
+ {
+ IfxI2c_clearAllErrorInterruptSources(i2c);
+ status = IfxI2c_I2c_Status_error;
+ }
+ }
+
+ IfxI2c_releaseBus(i2c);
+ i2cDevice->i2c->busStatus = IfxI2c_getBusStatus(i2c);
+ i2cDevice->i2c->status = status;
+ return status;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/I2c/IfxI2c_I2c.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/I2c/IfxI2c_I2c.h
new file mode 100644
index 0000000..ab030e2
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/I2c/IfxI2c_I2c.h
@@ -0,0 +1,429 @@
+/**
+ * \file IfxI2c_I2c.h
+ * \brief I2C I2C details
+ * \ingroup IfxLld_I2c
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_I2c_I2c_Usage How to use the I2c driver?
+ * \ingroup IfxLld_I2c
+ *
+ * The I2c driver provides a default configuration for 8bit wide data transfers in Master mode.
+ *
+ * NOTE: Interrupts are disabled during data transfers as long as the driver operates on the I2C hardware FIFO,
+ * except for reading 32 bytes or less. This is due to limitations of the I2c Module.
+ *
+ * NOTE : Send Slave address as 8-bit by left shifting it by 1.E.g incase of EEPROM,slave address is 7 bit represented
+ * as 0x50, after left shifting it by 1, it will be 0xa0
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_I2c_I2c Preparation Preparation
+ * \subsection IfxLld_I2c_I2c_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_I2c_I2c_Variables Variables
+ *
+ * Declare the I2c handle, the I2c device handle and the data buffer in your C code:
+ *
+ * \code
+ * // used globally
+ * static IfxI2c_I2c i2c; // i2c handle
+ * static IfxI2c_I2c_Device i2cDev; // slave device handle
+ * uint8 data[128]; // data buffer
+ * \endcode
+ *
+ * \subsection IfxLld_I2c_I2c_Init Module Initialisation
+ *
+ * \code
+ * // create config structure
+ * IfxI2c_I2c_Config config;
+ *
+ * // fill structure with default values and Module address
+ * IfxI2c_I2c_initConfig(&config, &MODULE_I2C0);
+ *
+ * // configure pins
+ * const IfxI2c_Pins pins = {
+ * &IfxI2c0_SCL_P02_5_INOUT,
+ * &IfxI2c0_SDA_P02_4_INOUT,
+ * IfxPort_PadDriver_cmosAutomotiveSpeed1
+ * };
+ *
+ * config.pins = &pins;
+ *
+ * config.baudrate = 400000; // 400 kHz
+ *
+ * // initialize module
+ * IfxI2c_I2c_initModule(&i2c, &config);
+ * \endcode
+ *
+ * \subsection IfxLld_I2c_I2c_InitDevice Device Initialisation
+ * Here the i2c device handle is initialized.
+ * \code
+ * // create device config
+ * IfxI2c_I2c_deviceConfig i2cDeviceConfig;
+ *
+ * // fill structure with default values and i2c Handler
+ * IfxI2c_I2c_initDeviceConfig(&i2cDeviceConfig, &i2c);
+ *
+ * // set device specifig values.
+ * i2cDeviceConfig.deviceAddress = 0xa0; // 8 bit device address
+ *
+ * // initialize the i2c device handle
+ * IfxI2c_I2c_initDevice(&i2cDev, &i2cDeviceConfig);
+ * \endcode
+ *
+ * \section IfxLld_I2c_I2c_DataTransfers Data Transfers
+ * Example for an i2c EEPROM.
+ *
+ * \subsection IfxLld_I2c_I2c_Write Write
+ *
+ * \code
+ * uint16 addr = 0x0000;
+ *
+ * // setup the device's internal address
+ * data[0] = addr >> 8; // High byte
+ * data[1] = (uint8)addr; // Low byte
+ * // setup data to be written
+ * data[2] = 0x01;
+ * data[3] = 0x02;
+ * data[4] = 0x03;
+ *
+ * uint8 size = 5; // 5 bytes to transmit to i2cDev (data and internal address)
+ *
+ * // write data to device as soon as it is ready
+ * while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
+ * \endcode
+ *
+ * \subsection IfxLld_I2c_I2c_Read Read
+ *
+ * \code
+ * Ifx_SizeT size;
+ * uint16 addr = 0x0000;
+ *
+ * // setup internal address to be read from
+ * data[0] = addr >> 8; // High byte
+ * data[1] = (uint8)addr; // Low byte
+ * size = 2;
+ * while(IfxI2c_I2c_write(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
+ *
+ * size = 8; // 8 bytes to read
+ *
+ * // read device data to data array
+ * while(IfxI2c_I2c_read(&i2cDev, data, size) == IfxI2c_I2c_Status_nak);
+ * \endcode
+ *
+ * \subsection IfxLld_I2c_I2c_ACK Acknowledge Polling
+ * It is also possible to poll explicitly for NAK.
+ *
+ * By using write operations:
+ * \code
+ * // size = 0;
+ * while(IfxI2c_I2c_write(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer
+ * \endcode
+ *
+ * By using read operations:
+ * \code
+ * // size = 0;
+ * while(IfxI2c_I2c_read(&i2cDev, data, 0) == IfxI2c_I2c_Status_nak)); // where data is just a dummy pointer
+ * \endcode
+ *
+ * \subsection IfxLld_I2c_I2c_Interrupts Interrupts usage
+ *
+ * Interrupts can be enabled from the application by using the APIs provided in the driver,
+ * there are APIs available in the driver to enable, disable, clear and read the status of interrupt falgs, along with these,\n
+ * APIs to enable the the interrupts are also available.
+ *
+ * here is an example of how to use the interrupts in I2C driver.
+ *
+ * Using I2C interrupts
+ *
+ *
+ * I2C burst data transfer interrupt
+ *
+ * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
+ *
+ * choose the burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing burst data transfer \n
+ * interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority
+ *
+ * \code
+ * //enable burst data transfer interrupt source
+ * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
+ * IfxI2c_enableBurstRequestInterruptSource(i2c);
+ *
+ * // enable the burst data transfer interrupt
+ * IfxI2c_enableBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
+ * \endcode
+ *
+ * I2C last burst data transfer interrupt
+ *
+ * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
+ *
+ * choose the last burst data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last burst data transfer \n
+ * interrupt source, enable burst data transfer service request or interrupt with the desired type of service and priority
+ *
+ * \code
+ * //enable last burst data transfer interrupt source
+ * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
+ * IfxI2c_enableLastBurstRequestInterruptSource(i2c);
+ *
+ * // enable the last burst data transfer interrupt
+ * IfxI2c_enableLastBurstDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
+ * \endcode
+ *
+ * I2C single data transfer interrupt
+ *
+ * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
+ *
+ * choose the single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing single data transfer \n
+ * interrupt source, enable single data transfer service request or interrupt with the desired type of service and priority
+ *
+ * \code
+ * //enable burst data transfer interrupt source
+ * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
+ * IfxI2c_enableSingleRequestInterruptSource(i2c);
+ *
+ * // enable the burst data transfer interrupt
+ * IfxI2c_enableSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
+ * \endcode
+ *
+ * I2C last single data transfer interrupt
+ *
+ * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
+ *
+ * choose the last single data transfer interrupt source needed to be enabled for I2C module and call the following function once and after choosing last single data transfer \n
+ * interrupt source, enable last single data transfer service request or interrupt with the desired type of service and priority
+ *
+ * \code
+ * //enable burst data transfer interrupt source
+ * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
+ * IfxI2c_enableLastSingleRequestInterruptSource(i2c);
+ *
+ * // enable the burst data transfer interrupt
+ * IfxI2c_enableLastSingleDataTransferInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
+ * \endcode
+ *
+ * I2C error interrupt (ERR)
+ *
+ * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
+ *
+ * choose the error interrupt sources needed to be enabled for I2C module and call the following functions once for each error interrupt source by choosing the right \n
+ * error interrupt source as parameter,and after choosing all the error interrupt sources, enable the I2C error interrupt flag and then enable I2C error service request or interrupt with desired type of service and priority
+ *
+ * \code
+ * //enable error interrupt sources
+ * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
+ * IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_rxFifoUnderflow);
+ * IfxI2c_enableErrorInterruptSource(i2c, IfxI2c_ErrorInterruptSource_txFifoOverflow);
+ *
+ * // enable the error interrupt flag
+ * IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
+ *
+ * // enable the error interrupt
+ * IfxI2c_enableErrorInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
+ * \endcode
+ *
+ *
+ * I2C protocol interrupt (PROTOCOL)
+ *
+ * After initilaising I2C device \ref IfxLld_I2c_I2c_InitDevice
+ *
+ * choose the protocol interrupt sources needed to be enabled for I2C module and call the following functions once for each protocol interrupt source by choosing the \n
+ * right protocol interrupt source as parameter,and after choosing all the protocol interrupt sources, enable the I2C protocol interrupt flag and then enable \n
+ * I2C protocol service request or interrupt with desired type of service and priority
+ *
+ * \code
+ * //enable protocol interrupt sources
+ * Ifx_I2C *i2c = &MODULE_I2C0; // or choose &MODULE_I2C1
+ * IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_addressMatch);
+ * IfxI2c_enableProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_arbitrationLost);
+ *
+ * // enable the protocol interrupt flag
+ * IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
+ *
+ * // enable the protocol interrupt
+ * IfxI2c_enableProtocolInterrupt(i2c, IfxSrc_Tos_cpu0, 8);
+ * \endcode
+ *
+ * you can define the ISR of your own and service the interrupt, please refer to more general usage of interrupts \ref IfxLld_Cpu_Irq_Usage
+ *
+ * some additional APIs to clear, disable interrupt flags and get flag status are also available.
+ *
+ * \defgroup IfxLld_I2c_I2c I2C
+ * \ingroup IfxLld_I2c
+ * \defgroup IfxLld_I2c_I2c_Functions Module Functions
+ * \ingroup IfxLld_I2c_I2c
+ * \defgroup IfxLld_I2c_I2c_Enum Enumerations
+ * \ingroup IfxLld_I2c_I2c
+ * \defgroup IfxLld_I2c_I2c_DataStructures Data Structures
+ * \ingroup IfxLld_I2c_I2c
+ */
+
+#ifndef IFXI2C_I2C_H
+#define IFXI2C_I2C_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "I2c/Std/IfxI2c.h"
+#include "Cpu/Std/IfxCpu.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_I2c_I2c_Enum
+ * \{ */
+typedef enum
+{
+ IfxI2c_I2c_Status_ok = 0, /**< \brief ok */
+ IfxI2c_I2c_Status_nak = 1, /**< \brief NAK */
+ IfxI2c_I2c_Status_al = 2, /**< \brief Arbitration Lost */
+ IfxI2c_I2c_Status_busNotFree = 3, /**< \brief bus is not free */
+ IfxI2c_I2c_Status_error = 4 /**< \brief error */
+} IfxI2c_I2c_Status;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_I2c_I2c_DataStructures
+ * \{ */
+/** \brief Handler
+ */
+typedef struct
+{
+ Ifx_I2C *i2c; /**< \brief Module Pointer */
+ IfxI2c_BusStatus busStatus; /**< \brief Status of the bus */
+ IfxI2c_I2c_Status status; /**< \brief Status of the last bus operation */
+ float32 baudrate; /**< \brief Baudrate */
+} IfxI2c_I2c;
+
+/** \brief Structure to configure the Module
+ */
+typedef struct
+{
+ Ifx_I2C *i2c; /**< \brief Module Pointer */
+ float32 baudrate; /**< \brief Baudrate */
+ IFX_CONST IfxI2c_Pins *pins; /**< \brief Pins */
+} IfxI2c_I2c_Config;
+
+/** \brief Structure with slave device data
+ */
+typedef struct
+{
+ IfxI2c_I2c *i2c; /**< \brief Module Pionter */
+ uint8 deviceAddress;
+} IfxI2c_I2c_Device;
+
+/** \brief Structure to configure the device's data structure
+ */
+typedef struct
+{
+ IfxI2c_I2c *i2c; /**< \brief Module Pointer */
+ uint8 deviceAddress; /**< \brief the slave device's address */
+} IfxI2c_I2c_deviceConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_I2c_I2c_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Fills the config structure with default values
+ * \param config Structure to configure the Module
+ * \param i2c Module address
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_I2c_initConfig(IfxI2c_I2c_Config *config, Ifx_I2C *i2c);
+
+/** \brief Initializes the device Handler
+ * \param i2cDevice I2c device Handler
+ * \param i2cDeviceConfig Structure to configure the device's data structure
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
+ *
+ */
+IFX_EXTERN void IfxI2c_I2c_initDevice(IfxI2c_I2c_Device *i2cDevice, const IfxI2c_I2c_deviceConfig *i2cDeviceConfig);
+
+/** \brief Fills the config structure of the slave device with default values.
+ * \param i2cDeviceConfig Structure to configure the device's data structure
+ * \param i2c Handler
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_I2c_initDeviceConfig(IfxI2c_I2c_deviceConfig *i2cDeviceConfig, IfxI2c_I2c *i2c);
+
+/** \brief Initializes the Module
+ * \param i2c Handler
+ * \param config Configuration structure
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
+ *
+ */
+IFX_EXTERN void IfxI2c_I2c_initModule(IfxI2c_I2c *i2c, const IfxI2c_I2c_Config *config);
+
+/** \brief reads the I2c device
+ *
+ * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
+ *
+ */
+IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_read(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size);
+
+/** \brief writes to the I2c device
+ *
+ * A coding example can be found in \ref IfxLld_I2c_I2c_Usage
+ *
+ */
+IFX_EXTERN IfxI2c_I2c_Status IfxI2c_I2c_write(IfxI2c_I2c_Device *i2cDevice, volatile uint8 *data, Ifx_SizeT size);
+
+/** \} */
+
+#endif /* IFXI2C_I2C_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/Std/IfxI2c.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/Std/IfxI2c.c
new file mode 100644
index 0000000..d16657a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/Std/IfxI2c.c
@@ -0,0 +1,309 @@
+/**
+ * \file IfxI2c.c
+ * \brief I2C basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxI2c.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxI2c_configureAsMaster(Ifx_I2C *i2c)
+{
+ // enter config Mode
+ IfxI2c_stop(i2c);
+
+ i2c->ADDRCFG.U = 0;
+ i2c->ADDRCFG.B.MnS = 1; // master mode
+ i2c->ADDRCFG.B.SONA = 0; // don't release the bus on NACK
+ i2c->ADDRCFG.B.SOPE = 0; // after transfer go into master restart state
+ i2c->ADDRCFG.B.TBAM = 0; // 7 bit address mode
+ i2c->FIFOCFG.U = 0;
+ i2c->FIFOCFG.B.TXFC = 1; // FIFO as flow controller
+ i2c->FIFOCFG.B.RXFC = 1; // FIFO as flow controller
+ i2c->FIFOCFG.B.TXBS = 0; // Burst size 1 word
+ i2c->FIFOCFG.B.RXBS = 0; // Burst size 1 word
+ i2c->FIFOCFG.B.TXFA = 0; // fifo is byte aligned
+ i2c->FIFOCFG.B.RXFA = 0; // fifo is byte aligned
+}
+
+
+void IfxI2c_disableModule(Ifx_I2C *i2c)
+{
+ uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(pwd);
+
+ i2c->CLC.B.DISR = 1;
+
+ while (i2c->CLC.B.DISS == 0)
+ {}
+
+ IfxScuWdt_setCpuEndinit(pwd);
+}
+
+
+void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxI2c_getBurstDataTransferSrcPointer(i2c);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxI2c_getErrorSrcPointer(i2c);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxI2c_getLastBurstDataTransferSrcPointer(i2c);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxI2c_getLastSingleDataTransferSrcPointer(i2c);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+void IfxI2c_enableModule(Ifx_I2C *i2c)
+{
+ uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(pwd);
+ i2c->CLC.B.DISR = 0U;
+
+ while (i2c->CLC.B.DISS == 1U)
+ {}
+
+ i2c->CLC1.B.RMC = 1U;
+
+ while (i2c->CLC1.B.RMC != 1U)
+ {}
+
+ i2c->CLC1.B.DISR = 0U;
+
+ while (i2c->CLC1.B.DISS == 1U)
+ {}
+
+ // disable all interrupts
+ i2c->ERRIRQSM.U = 0x00;
+ i2c->PIRQSM.U = 0x00;
+ i2c->IMSC.U = 0x00;
+
+ IfxScuWdt_setCpuEndinit(pwd);
+}
+
+
+void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxI2c_getProtocolSrcPointer(i2c);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority)
+{
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxI2c_getSingleDataTransferSrcPointer(i2c);
+ IfxSrc_init(src, typeOfService, priority);
+ IfxSrc_enable(src);
+}
+
+
+Ifx_I2C *IfxI2c_getAddress(IfxI2c_Index i2c)
+{
+ Ifx_I2C *module;
+
+ if (i2c < IFXI2C_NUM_MODULES)
+ {
+ module = (Ifx_I2C *)IfxI2c_cfg_indexMap[i2c].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
+
+
+float32 IfxI2c_getBaudrate(Ifx_I2C *i2c)
+{
+ uint8 inc = i2c->FDIVCFG.B.INC;
+ uint16 dec = i2c->FDIVCFG.B.DEC;
+ uint8 rmc = i2c->CLC1.B.RMC;
+ float32 fKernel = IfxScuCcu_getBaud1Frequency();
+
+ return (fKernel / rmc) / ((2 * dec / inc) + 3);
+}
+
+
+IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c)
+{
+ uint32 index;
+ IfxI2c_Index result;
+
+ result = IfxI2c_Index_none;
+
+ for (index = 0; index < IFXI2C_NUM_MODULES; index++)
+ {
+ if (IfxI2c_cfg_indexMap[index].module == i2c)
+ {
+ result = (IfxI2c_Index)IfxI2c_cfg_indexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver)
+{
+ IfxPort_OutputMode mode = (IfxPort_OutputMode)IfxPort_Mode_outputOpenDrainGeneral;
+ IfxPort_setPinModeOutput(scl->pin.port, scl->pin.pinIndex, mode, scl->outSelect);
+ IfxPort_setPinModeOutput(sda->pin.port, sda->pin.pinIndex, mode, sda->outSelect);
+ IfxPort_setPinPadDriver(scl->pin.port, scl->pin.pinIndex, padDriver);
+ IfxPort_setPinPadDriver(sda->pin.port, sda->pin.pinIndex, padDriver);
+ IfxI2c_setPinSelection(scl->module, (IfxI2c_PinSelect)scl->inSelect); // note: uses the same PISEL register like SDA
+}
+
+
+void IfxI2c_releaseBus(Ifx_I2C *i2c)
+{
+ // only set the set end of transmisson bit if bus is not free
+ if (i2c->BUSSTAT.B.BS != IfxI2c_BusStatus_idle)
+ {
+ i2c->ENDDCTRL.B.SETEND = 1;
+
+ // wait until bus is free
+ while (IfxI2c_getProtocolInterruptSourceStatus(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd) == FALSE)
+ {}
+
+ IfxI2c_clearProtocolInterruptSource(i2c, IfxI2c_ProtocolInterruptSource_transmissionEnd);
+ }
+}
+
+
+void IfxI2c_resetFifo(Ifx_I2C *i2c)
+{
+ /* reset FIFO */
+ i2c->FIFOCFG.U = 0x0;
+ i2c->FIFOCFG.B.TXFC = 0U;
+ i2c->FIFOCFG.B.RXFC = 0U;
+ i2c->FIFOCFG.B.TXBS = 0U;
+ i2c->FIFOCFG.B.RXBS = 0U;
+ i2c->FIFOCFG.B.TXFA = 0U;
+ i2c->FIFOCFG.B.RXFA = 0U;
+}
+
+
+void IfxI2c_resetModule(Ifx_I2C *i2c)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ i2c->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ i2c->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == i2c->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ i2c->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate)
+{
+ float32 fKernel = IfxScuCcu_getBaud1Frequency();
+ uint8 rmc = i2c->CLC1.B.RMC;
+ float32 dec;
+ dec = (((fKernel / rmc) / baudrate) - 3) / 2; // always: Inc = 1
+
+ // dec:inc must be at least 6
+ if (dec < 6)
+ {
+ dec = 6;
+ }
+ else if (dec > (1 << IFX_I2C_FDIVCFG_DEC_LEN) - 1)
+ {
+ dec = (1 << IFX_I2C_FDIVCFG_DEC_LEN) - 1;
+ }
+
+ uint16 pwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(pwd);
+ /* Baudrate configuration */
+ i2c->FDIVCFG.B.INC = 1;
+ i2c->FDIVCFG.B.DEC = (uint16)(dec + 0.5);
+ i2c->TIMCFG.B.SDA_DEL_HD_DAT = 0x3F;
+ i2c->TIMCFG.B.FS_SCL_LOW = 1;
+ i2c->TIMCFG.B.EN_SCL_LOW_LEN = 1;
+ i2c->TIMCFG.B.SCL_LOW_LEN = 0x20;
+
+ IfxScuWdt_setCpuEndinit(pwd);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/Std/IfxI2c.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/Std/IfxI2c.h
new file mode 100644
index 0000000..221a840
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/Std/IfxI2c.h
@@ -0,0 +1,945 @@
+/**
+ * \file IfxI2c.h
+ * \brief I2C basic functionality
+ * \ingroup IfxLld_I2c
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_I2c_Std_enums Enumerations
+ * \ingroup IfxLld_I2c_Std
+ * \defgroup IfxLld_I2c_Std_functions Functions
+ * \ingroup IfxLld_I2c_Std
+ * \defgroup IfxLld_I2c_Std_structures Data Structures
+ * \ingroup IfxLld_I2c_Std
+ */
+
+#ifndef IFXI2C_H
+#define IFXI2C_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxI2c_cfg.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "IfxI2c_bf.h"
+#include "_PinMap/IfxI2c_PinMap.h"
+#include "Src/Std/IfxSrc.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_I2c_Std_enums
+ * \{ */
+typedef enum
+{
+ IfxI2c_BusStatus_idle = 0, /**< \brief idle */
+ IfxI2c_BusStatus_started = 1, /**< \brief started */
+ IfxI2c_BusStatus_busyMaster = 2, /**< \brief busy Master */
+ IfxI2c_BusStatus_remoteSlave = 3 /**< \brief remote Slave */
+} IfxI2c_BusStatus;
+
+/** \brief enable error interrupt request source
+ * Definition in Ifx.I2C.ERRIRQSM.U
+ */
+typedef enum
+{
+ IfxI2c_ErrorInterruptSource_rxFifoUnderflow = IFX_I2C_ERRIRQSM_RXF_UFL_OFF, /**< \brief receive fifo underflow service request */
+ IfxI2c_ErrorInterruptSource_rxFifoOverflow = IFX_I2C_ERRIRQSM_RXF_OFL_OFF, /**< \brief receive fifo overflow service request */
+ IfxI2c_ErrorInterruptSource_txFifoUnderflow = IFX_I2C_ERRIRQSM_TXF_UFL_OFF, /**< \brief transmit fifo underflow service request */
+ IfxI2c_ErrorInterruptSource_txFifoOverflow = IFX_I2C_ERRIRQSM_TXF_OFL_OFF /**< \brief transmit fifo overflow service request */
+} IfxI2c_ErrorInterruptSource;
+
+typedef enum
+{
+ IfxI2c_PinSelect_a = 0,
+ IfxI2c_PinSelect_b = 1,
+ IfxI2c_PinSelect_c = 2,
+ IfxI2c_PinSelect_d = 3,
+ IfxI2c_PinSelect_e = 4,
+ IfxI2c_PinSelect_f = 5,
+ IfxI2c_PinSelect_g = 6,
+ IfxI2c_PinSelect_h = 7
+} IfxI2c_PinSelect;
+
+/** \brief enable protocol interrupt source
+ * Definition in Ifx.I2C.PIRQSM.U
+ */
+typedef enum
+{
+ IfxI2c_ProtocolInterruptSource_addressMatch = IFX_I2C_PIRQSM_AM_OFF, /**< \brief address match service request */
+ IfxI2c_ProtocolInterruptSource_generalCall = IFX_I2C_PIRQSM_GC_OFF, /**< \brief general call service request */
+ IfxI2c_ProtocolInterruptSource_masterCode = IFX_I2C_PIRQSM_MC_OFF, /**< \brief master code service request */
+ IfxI2c_ProtocolInterruptSource_arbitrationLost = IFX_I2C_PIRQSM_AL_OFF, /**< \brief arbitration lost service request */
+ IfxI2c_ProtocolInterruptSource_notAcknowledgeReceived = IFX_I2C_PIRQSM_NACK_OFF, /**< \brief not acknowledge received service request */
+ IfxI2c_ProtocolInterruptSource_transmissionEnd = IFX_I2C_PIRQSM_TX_END_OFF, /**< \brief transmission end service request */
+ IfxI2c_ProtocolInterruptSource_receiveMode = IFX_I2C_PIRQSM_RX_OFF /**< \brief receive mode service request */
+} IfxI2c_ProtocolInterruptSource;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_I2C.CLC1.B.EDIS
+ */
+typedef enum
+{
+ IfxI2c_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxI2c_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxI2c_SleepMode;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_I2c_Std_structures
+ * \{ */
+/** \brief Pin Structure
+ */
+typedef struct
+{
+ IfxI2c_Scl_InOut *scl;
+ IfxI2c_Sda_InOut *sda;
+ IfxPort_PadDriver padDriver;
+} IfxI2c_Pins;
+
+/** \} */
+
+/** \addtogroup IfxLld_I2c_Std_functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns if the bus is free
+ */
+IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c);
+
+/** \brief clears all DTR interrupt sources
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c);
+
+/** \brief clears all Error Interrupt sources
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c);
+
+/** \brief Clears all Protocol Interrupt sources
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c);
+
+/** \brief clears burst request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief clears the specified source of error interrupt
+ * \param i2c pointer to i2c registers
+ * \param source error interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
+
+/** \brief clears last burst request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief clears last single request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief clears the specified source of protocol interrupt
+ * \param i2c pointer to i2c registers
+ * \param source protocol interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
+
+/** \brief clears single request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief disables burst request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief disables the error interrupt flag
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c);
+
+/** \brief disables the specified source of error interrupt
+ * \param i2c pointer to i2c registers
+ * \param source error interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
+
+/** \brief disables last burst request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief disables last single request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief disables the Protocol interrupt flag
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c);
+
+/** \brief disables the specified source of protocol interrupt
+ * \param i2c pointer to i2c registers
+ * \param source protocol interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
+
+/** \brief disables single request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief enables burst request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief enables the error interrupt flag
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c);
+
+/** \brief enables the specified source of error interrupt
+ * \param i2c pointer to i2c registers
+ * \param source error interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
+
+/** \brief enables last burst request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief enables last single request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief enables the protocol interrupt flag
+ * \param i2c pointer to I2C registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c);
+
+/** \brief enables the specified source of protocol interrupt
+ * \param i2c pointer to I2C registers
+ * \param source protocol interrupt source
+ * \return None
+ */
+IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
+
+/** \brief enables single request interrupt source
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource(Ifx_I2C *i2c);
+
+/** \brief Returns the SRC pointer for I2C burst data transfer request interrupt
+ * \param i2c pointer to i2c registers
+ * \return SRC pointer for I2C burst data transfer Service interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c);
+
+/** \brief returns the status of burst request interrupt source status
+ * \param i2c pointer to i2c registers
+ * \return status
+ */
+IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus(Ifx_I2C *i2c);
+
+/**
+ * \param i2c pointer to i2c registers
+ * \return BusStatus
+ */
+IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c);
+
+/** \brief returns the current status of error interrupt flag
+ * \param i2c pointer to i2c registers
+ * \return status
+ */
+IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c);
+
+/** \brief returns the status of the error interrupt source
+ * \param i2c pointer to i2c registers
+ * \param source error interrupt source
+ * \return status
+ */
+IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source);
+
+/** \brief Returns the SRC pointer for I2C Error interrupt
+ * \param i2c pointer to i2c registers
+ * \return SRC pointer for I2C Error Service interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c);
+
+/** \brief Returns the SRC pointer for I2C last burst data transfer request interrupt
+ * \param i2c pointer to i2c registers
+ * \return SRC pointer for I2C last burst data transfer Service interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c);
+
+/** \brief returns the status of last burst request interrupt source status
+ * \param i2c pointer to i2c registers
+ * \return status
+ */
+IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus(Ifx_I2C *i2c);
+
+/** \brief Returns the SRC pointer for I2C last single data transfer request interrupt
+ * \param i2c pointer to i2c registers
+ * \return SRC pointer for I2C last single data transfer Service interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c);
+
+/** \brief returns the status of last single request interrupt source status
+ * \param i2c pointer to i2c registers
+ * \return status
+ */
+IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus(Ifx_I2C *i2c);
+
+/** \brief returns the current raw status of protocol interrupt
+ * \param i2c pointer to i2c registers
+ * \return status
+ */
+IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c);
+
+/** \brief returns the status of specified protocol interrupt source
+ * \param i2c pointer to i2c registers
+ * \param source protocol interrupt source
+ * \return status
+ */
+IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source);
+
+/** \brief Returns the SRC pointer for I2C Protocol interrupt
+ * \param i2c pointer to i2c registers
+ * \return SRC pointer for I2C Protocol Service interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c);
+
+/** \brief Returns the SRC pointer for I2C single data transfer request interrupt
+ * \param i2c pointer to i2c registers
+ * \return SRC pointer for I2C single data transfer Service interrupt
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c);
+
+/** \brief returns the status of single request interrupt source status
+ * \param i2c pointer to i2c registers
+ * \return status
+ */
+IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus(Ifx_I2C *i2c);
+
+/** \brief Returns if the Fifo is requesting new data
+ */
+IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c);
+
+/**
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c);
+
+/** \brief selects the pin
+ * \param i2c pointer to i2c registers
+ * \param pisel pin to be select
+ * \return None
+ */
+IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel);
+
+/** \brief Sets the number of bytes to be received
+ * \param i2c pointer to i2c registers
+ * \param size number of packets
+ * \return None
+ */
+IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size);
+
+/**
+ * \param i2c pointer to i2c registers
+ * \param address device address
+ * \return None
+ */
+IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param i2c pointer to i2c registers
+ * \param mode mode selection (enable / disable)
+ * \return None
+ */
+IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode);
+
+/** \brief Sets the number of bytes to be tansmitted
+ * \param i2c pointer to i2c registers
+ * \param size number of packets
+ * \return None
+ */
+IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size);
+
+/**
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c);
+
+/**
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c);
+
+/** \brief Writes a packet (4 bytes) into the Fifo
+ * \param i2c pointer to i2c registers
+ * \param packet specifies the byte to be transfer
+ * \return None
+ */
+IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Configures the Module as Master
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_configureAsMaster(Ifx_I2C *i2c);
+
+/** \brief Disables the I2c Module
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_disableModule(Ifx_I2C *i2c);
+
+/** \brief Enables the Burst data transfer interrupt
+ * \param i2c pointer to i2c registers
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority priority of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_enableBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief Enables the Error interrupt
+ * \param i2c pointer to i2c registers
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority priority of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_enableErrorInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief enables the last burst data transfer interrupt
+ * \param i2c pointer to i2c registers
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority priority of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_enableLastBurstDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief enables the last single data transfer interrupt
+ * \param i2c pointer to i2c registers
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority priority of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_enableLastSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief Enables the I2c Module
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_enableModule(Ifx_I2C *i2c);
+
+/** \brief Enables the protocol interrupt
+ * \param i2c pointer to i2c registers
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority Priority of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_enableProtocolInterrupt(void *i2c, IfxSrc_Tos typeOfService, uint16 priority);
+
+/** \brief enables the single data transfer interrupt
+ * \param i2c pointer to i2c registers
+ * \param typeOfService Type of Service (Cpu or DMA)
+ * \param priority priority of the interrupt
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_enableSingleDataTransferInterrupt(Ifx_I2C *i2c, IfxSrc_Tos typeOfService, uint16 priority);
+
+/**
+ * \param i2c Resource index of the I2c
+ * \return I2C module register address
+ */
+IFX_EXTERN Ifx_I2C *IfxI2c_getAddress(IfxI2c_Index i2c);
+
+/** \brief Returns the real Baudrate
+ * \return Baudrate
+ */
+IFX_EXTERN float32 IfxI2c_getBaudrate(Ifx_I2C *i2c);
+
+/** \brief API to get the resource index of the I2C specified.
+ * \param i2c Pointer to the I2C HW module (register memory map)
+ * \return Resource index of the I2C
+ */
+IFX_EXTERN IfxI2c_Index IfxI2c_getIndex(Ifx_I2C *i2c);
+
+/**
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_initSclSdaPin(const IfxI2c_Scl_InOut *scl, const IfxI2c_Sda_InOut *sda, IfxPort_PadDriver padDriver);
+
+/** \brief Releases the bus, i.e puts a stop condition on the bus
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_releaseBus(Ifx_I2C *i2c);
+
+/**
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_resetFifo(Ifx_I2C *i2c);
+
+/** \brief resets the I2c kernel
+ * \param i2c pointer to i2c registers
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_resetModule(Ifx_I2C *i2c);
+
+/** \brief Calculates the desired baudrate
+ * \param i2c pointer to i2c registers
+ * \param baudrate specifies the baud rate
+ * \return None
+ */
+IFX_EXTERN void IfxI2c_setBaudrate(Ifx_I2C *i2c, float32 baudrate);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE boolean IfxI2c_busIsFree(Ifx_I2C *i2c)
+{
+ boolean free = FALSE;
+
+ if (i2c->BUSSTAT.B.BS == IfxI2c_BusStatus_idle)
+ {
+ free = TRUE;
+ }
+
+ return free;
+}
+
+
+IFX_INLINE void IfxI2c_clearAllDtrInterruptSources(Ifx_I2C *i2c)
+{
+ i2c->ICR.U = (1 << IFX_I2C_ICR_LSREQ_INT_OFF) | (1 << IFX_I2C_ICR_SREQ_INT_OFF) | (1 << IFX_I2C_ICR_LBREQ_INT_OFF) | (1 << IFX_I2C_ICR_BREQ_INT_OFF);
+}
+
+
+IFX_INLINE void IfxI2c_clearAllErrorInterruptSources(Ifx_I2C *i2c)
+{
+ i2c->ERRIRQSC.U = (1 << IFX_I2C_ERRIRQSC_RXF_UFL_OFF) | (1 << IFX_I2C_ERRIRQSC_RXF_OFL_OFF) | (1 << IFX_I2C_ERRIRQSC_TXF_UFL_OFF) | (1 << IFX_I2C_ERRIRQSC_TXF_OFL_OFF);
+}
+
+
+IFX_INLINE void IfxI2c_clearAllProtocolInterruptSources(Ifx_I2C *i2c)
+{
+ i2c->PIRQSC.U = (1 << IFX_I2C_PIRQSC_AM_OFF) | (1 << IFX_I2C_PIRQSC_GC_OFF) | (1 << IFX_I2C_PIRQSC_MC_OFF) | (1 << IFX_I2C_PIRQSC_AL_OFF) | (1 << IFX_I2C_PIRQSC_NACK_OFF) | (1 << IFX_I2C_PIRQSC_TX_END_OFF) | (1 << IFX_I2C_PIRQSC_RX_OFF);
+}
+
+
+IFX_INLINE void IfxI2c_clearBurstRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->ICR.B.BREQ_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_clearErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
+{
+ i2c->ERRIRQSC.U = (1 << source);
+}
+
+
+IFX_INLINE void IfxI2c_clearLastBurstRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->ICR.B.LBREQ_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_clearLastSingleRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->ICR.B.LSREQ_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_clearProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
+{
+ i2c->PIRQSC.U = (1 << source);
+}
+
+
+IFX_INLINE void IfxI2c_clearSingleRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->ICR.B.SREQ_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_disableBurstRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.BREQ_INT = 0;
+}
+
+
+IFX_INLINE void IfxI2c_disableErrorInterruptFlag(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.I2C_ERR_INT = 0;
+}
+
+
+IFX_INLINE void IfxI2c_disableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
+{
+ i2c->ERRIRQSM.U &= ~(1 << source);
+}
+
+
+IFX_INLINE void IfxI2c_disableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.LBREQ_INT = 0;
+}
+
+
+IFX_INLINE void IfxI2c_disableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.LSREQ_INT = 0;
+}
+
+
+IFX_INLINE void IfxI2c_disableProtocolInterruptFlag(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.I2C_P_INT = 0;
+}
+
+
+IFX_INLINE void IfxI2c_disableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
+{
+ i2c->PIRQSM.U &= ~(1 << source);
+}
+
+
+IFX_INLINE void IfxI2c_disableSingleRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.SREQ_INT = 0;
+}
+
+
+IFX_INLINE void IfxI2c_enableBurstRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.BREQ_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_enableErrorInterruptFlag(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.I2C_ERR_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_enableErrorInterruptSource(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
+{
+ i2c->ERRIRQSM.U |= (1 << source);
+}
+
+
+IFX_INLINE void IfxI2c_enableLastBurstRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.LBREQ_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_enableLastSingleRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.LSREQ_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_enableProtocolInterruptFlag(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.I2C_P_INT = 1;
+}
+
+
+IFX_INLINE void IfxI2c_enableProtocolInterruptSource(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
+{
+ i2c->PIRQSM.U |= (1 << source);
+}
+
+
+IFX_INLINE void IfxI2c_enableSingleRequestInterruptSource(Ifx_I2C *i2c)
+{
+ i2c->IMSC.B.SREQ_INT = 1;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getBurstDataTransferSrcPointer(Ifx_I2C *i2c)
+{
+ if (i2c == &MODULE_I2C0)
+ {
+ return &MODULE_SRC.I2C.I2C[0].BREQ;
+ }
+ else
+ {
+ return &MODULE_SRC.I2C.I2C[1].BREQ;
+ }
+}
+
+
+IFX_INLINE boolean IfxI2c_getBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
+{
+ return i2c->RIS.B.BREQ_INT;
+}
+
+
+IFX_INLINE IfxI2c_BusStatus IfxI2c_getBusStatus(Ifx_I2C *i2c)
+{
+ return (IfxI2c_BusStatus)i2c->BUSSTAT.B.BS;
+}
+
+
+IFX_INLINE boolean IfxI2c_getErrorInterruptFlagStatus(Ifx_I2C *i2c)
+{
+ return i2c->RIS.B.I2C_ERR_INT;
+}
+
+
+IFX_INLINE boolean IfxI2c_getErrorInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ErrorInterruptSource source)
+{
+ return (i2c->ERRIRQSS.U & (1 << source)) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getErrorSrcPointer(Ifx_I2C *i2c)
+{
+ if (i2c == &MODULE_I2C0)
+ {
+ return &MODULE_SRC.I2C.I2C[0].ERR;
+ }
+ else
+ {
+ return &MODULE_SRC.I2C.I2C[1].ERR;
+ }
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastBurstDataTransferSrcPointer(Ifx_I2C *i2c)
+{
+ if (i2c == &MODULE_I2C0)
+ {
+ return &MODULE_SRC.I2C.I2C[0].LBREQ;
+ }
+ else
+ {
+ return &MODULE_SRC.I2C.I2C[1].LBREQ;
+ }
+}
+
+
+IFX_INLINE boolean IfxI2c_getLastBurstRequestInterruptSourceStatus(Ifx_I2C *i2c)
+{
+ return i2c->RIS.B.LBREQ_INT;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getLastSingleDataTransferSrcPointer(Ifx_I2C *i2c)
+{
+ if (i2c == &MODULE_I2C0)
+ {
+ return &MODULE_SRC.I2C.I2C[0].LSREQ;
+ }
+ else
+ {
+ return &MODULE_SRC.I2C.I2C[1].LSREQ;
+ }
+}
+
+
+IFX_INLINE boolean IfxI2c_getLastSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
+{
+ return i2c->RIS.B.LSREQ_INT;
+}
+
+
+IFX_INLINE boolean IfxI2c_getProtocolInterruptFlagStatus(Ifx_I2C *i2c)
+{
+ return i2c->RIS.B.I2C_P_INT;
+}
+
+
+IFX_INLINE boolean IfxI2c_getProtocolInterruptSourceStatus(Ifx_I2C *i2c, IfxI2c_ProtocolInterruptSource source)
+{
+ return (i2c->PIRQSS.U & (1 << source)) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getProtocolSrcPointer(Ifx_I2C *i2c)
+{
+ if (i2c == &MODULE_I2C0)
+ {
+ return &MODULE_SRC.I2C.I2C[0].P;
+ }
+ else
+ {
+ return &MODULE_SRC.I2C.I2C[1].P;
+ }
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxI2c_getSingleDataTransferSrcPointer(Ifx_I2C *i2c)
+{
+ if (i2c == &MODULE_I2C0)
+ {
+ return &MODULE_SRC.I2C.I2C[0].SREQ;
+ }
+ else
+ {
+ return &MODULE_SRC.I2C.I2C[1].SREQ;
+ }
+}
+
+
+IFX_INLINE boolean IfxI2c_getSingleRequestInterruptSourceStatus(Ifx_I2C *i2c)
+{
+ return i2c->RIS.B.SREQ_INT;
+}
+
+
+IFX_INLINE boolean IfxI2c_isFifoRequest(Ifx_I2C *i2c)
+{
+ return i2c->RIS.U & 0x0F ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxI2c_run(Ifx_I2C *i2c)
+{
+ i2c->RUNCTRL.U = 1;
+}
+
+
+IFX_INLINE void IfxI2c_setPinSelection(Ifx_I2C *i2c, IfxI2c_PinSelect pisel)
+{
+ i2c->GPCTL.B.PISEL = pisel;
+}
+
+
+IFX_INLINE void IfxI2c_setReceivePacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
+{
+ i2c->MRPSCTRL.B.MRPS = size;
+}
+
+
+IFX_INLINE void IfxI2c_setSlaveDeviceAddress(Ifx_I2C *i2c, uint16 address)
+{
+ i2c->ADDRCFG.B.ADR = address;
+}
+
+
+IFX_INLINE void IfxI2c_setSleepMode(Ifx_I2C *i2c, IfxI2c_SleepMode mode)
+{
+ i2c->CLC1.B.EDIS = mode;
+}
+
+
+IFX_INLINE void IfxI2c_setTransmitPacketSize(Ifx_I2C *i2c, Ifx_SizeT size)
+{
+ i2c->TPSCTRL.B.TPS = size;
+}
+
+
+IFX_INLINE void IfxI2c_stop(Ifx_I2C *i2c)
+{
+ i2c->RUNCTRL.U = 0;
+}
+
+
+IFX_INLINE void IfxI2c_waitBusFree(Ifx_I2C *i2c)
+{
+ while (IfxI2c_getBusStatus(i2c) != IfxI2c_BusStatus_idle)
+ {}
+}
+
+
+IFX_INLINE void IfxI2c_writeFifo(Ifx_I2C *i2c, uint32 packet)
+{
+ i2c->TXD.U = packet;
+}
+
+
+#endif /* IFXI2C_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/IfxLldVersion.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/IfxLldVersion.h
new file mode 100644
index 0000000..aa932d0
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/IfxLldVersion.h
@@ -0,0 +1,10 @@
+#ifndef IFX_LLD_VERSION_H
+#define IFX_LLD_VERSION_H
+
+#define IFX_LLD_VERSION_GENERATION 1 /**< \brief Indicates the driver generation */
+#define IFX_LLD_VERSION_MAJOR 0 /**< \brief Informs about changes which could lead to incompatibilities */
+#define IFX_LLD_VERSION_MAJOR_UPDATE 1 /**< \brief Informs about a release for a new derivative without further API changes */
+#define IFX_LLD_VERSION_MINOR 11 /**< \brief Informs about new additions to the library */
+#define IFX_LLD_VERSION_REVISION 0 /**< \brief Informs about patches and/or documentation changes */
+
+#endif /* IFX_LLD_VERSION_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Driver/IfxIom_Driver.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Driver/IfxIom_Driver.c
new file mode 100644
index 0000000..52ab4d8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Driver/IfxIom_Driver.c
@@ -0,0 +1,406 @@
+/**
+ * \file IfxIom_Driver.c
+ * \brief IOM DRIVER details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxIom_Driver.h"
+#include "IfxIom_bf.h"
+#include "_Utilities/Ifx_Assert.h"
+
+/******************************************************************************/
+/*----------------------------------Macros------------------------------------*/
+/******************************************************************************/
+
+#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(refInput) ((IfxIom_RefInputSignal)((refInput >> 8) & 0xFF))
+
+#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(monInput) ((IfxIom_MonInputSignal)((monInput >> 8) & 0xFF))
+
+#define IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(refInput) ((refInput >> 0) & 0xFF)
+
+#define IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(monInput) ((monInput >> 0) & 0xFF)
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver)
+{
+ Ifx_IOM *module = driver->module;
+ module->FPCESR.U = 0xFFFFFFFF;
+}
+
+
+void IfxIom_Driver_clearHistory(IfxIom_Driver *driver)
+{
+ Ifx_IOM *module = driver->module;
+ module->ECMETH0.U = 0;
+}
+
+
+void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver)
+{
+ Ifx_IOM *module = driver->iomDriver->module;
+
+ if (driver->monInput == IfxIom_MonInputSignal_p)
+ {
+ module->FPCESR.U = 0x10001 << driver->monIndex;
+ }
+}
+
+
+void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver)
+{
+ Ifx_IOM *module = driver->iomDriver->module;
+
+ if (driver->refInput == IfxIom_RefInputSignal_p)
+ {
+ module->FPCESR.U = 0x10001 << driver->refIndex;
+ }
+}
+
+
+uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver)
+{
+ uint32 value;
+ value = driver->module->ECMSELR.U;
+ driver->module->ECMSELR.U = 0;
+ return value;
+}
+
+
+void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver)
+{
+ IfxIom_Driver *iomDriver = driver->iomDriver;
+ Ifx_IOM *module = iomDriver->module;
+
+ /* Configure the ECM */
+ if (driver->systemEventTriggerThreshold == 1)
+ {
+ module->ECMSELR.U &= ~(1 << (driver->channel + IFX_IOM_ECMSELR_CES0_OFF));
+ }
+ else if (driver->systemEventTriggerThreshold >= 2)
+ {
+ module->ECMSELR.U &= ~(1 << (driver->accumulatedCounterIndex + IFX_IOM_ECMSELR_CTS0_OFF));
+ }
+ else
+ {
+ /* No event generated */
+ }
+}
+
+
+void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver)
+{
+ IfxIom_Driver *iomDriver = driver->iomDriver;
+ Ifx_IOM *module = iomDriver->module;
+
+ /* Configure the ECM */
+ if (driver->systemEventTriggerThreshold == 1)
+ {
+ module->ECMSELR.U |= (1 << (driver->channel + IFX_IOM_ECMSELR_CES0_OFF));
+ }
+ else if (driver->systemEventTriggerThreshold >= 2)
+ {
+ module->ECMSELR.U |= (1 << (driver->accumulatedCounterIndex + IFX_IOM_ECMSELR_CTS0_OFF));
+ }
+ else
+ {
+ /* No event generated */
+ }
+}
+
+
+void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d)
+{
+ Ifx_IOM *module = driver->module;
+ uint32 value;
+
+ value = module->ECMETH0.U;
+ *a = value & 0xFFFF;
+ *b = value >> 16;
+
+ value = module->ECMETH1.U;
+ *c = value & 0xFFFF;
+ *d = value >> 16;
+}
+
+
+boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config)
+{
+ driver->module = config->module;
+ driver->accumulatedEventUsedMask = 0;
+ driver->lamUsedMask = 0;
+ return TRUE;
+}
+
+
+void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module)
+{
+ config->module = module;
+}
+
+
+boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config)
+{
+ boolean result = TRUE;
+ IfxIom_Driver *iomDriver = config->iomDriver;
+ Ifx_IOM *module = iomDriver->module;
+ float32 fiom;
+ fiom = IfxIom_getFrequency(module);
+
+ /* Check parameter ranges */
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (config->systemEventTriggerThreshold & (~IFX_IOM_ECMCCFG_THRC0_MSK)) == 0);
+
+ driver->accumulatedCounterIndex = -1;
+ driver->channel = config->channel;
+ driver->iomDriver = iomDriver;
+
+ if (iomDriver->lamUsedMask & (1 << driver->channel))
+ {
+ /* LAM already in use */
+ result = FALSE;
+ }
+ else
+ {
+ iomDriver->lamUsedMask |= 1 << driver->channel;
+
+ {
+ /* Configure reference input signal */
+ uint8 refIndex;
+ IfxIom_RefInputSignal refInput;
+
+ refIndex = IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(config->ref.input);
+ refInput = IFXIOM_DRIVER_LAM_GET_REF_INPUT_SIGNAL(config->ref.input);
+ driver->refIndex = refIndex;
+ driver->refInput = refInput;
+
+ module->FPCCTR[refIndex].B.ISR = refInput;
+
+ if (refInput == IfxIom_RefInputSignal_p)
+ {
+ if (config->ref.filter.mode == IfxIom_LamFilterMode_noFilter)
+ {
+ module->FPCCTR[refIndex].B.MOD = IfxIom_LamFilterMode_immediateDebounceBothEdge;
+ module->FPCCTR[refIndex].B.CMP = 0;
+ }
+ else if ((config->ref.filter.mode == IfxIom_LamFilterMode_prescalerOnFallingEdge)
+ ||
+ (config->ref.filter.mode == IfxIom_LamFilterMode_prescalerOnRisingEdge))
+ {
+ module->FPCCTR[refIndex].B.MOD = config->ref.filter.mode;
+ module->FPCCTR[refIndex].B.CMP = config->ref.filter.prescalerFactor - 1;
+ }
+ else
+ {
+ module->FPCCTR[refIndex].B.MOD = config->ref.filter.mode;
+ module->FPCCTR[refIndex].B.CMP = fiom * config->ref.filter.risingEdgeFilterTime;
+ module->FPCCTR[refIndex].B.RTG = config->ref.filter.clearTimerOnGlitch ? 1 : 0;
+ }
+ }
+ }
+
+ {
+ /* Configure monitor input signal */
+ uint8 monIndex;
+ IfxIom_MonInputSignal monInput;
+
+ monIndex = IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(config->mon.input);
+ monInput = IFXIOM_DRIVER_LAM_GET_MON_INPUT_SIGNAL(config->mon.input);
+ driver->monIndex = monIndex;
+ driver->monInput = monInput;
+
+ module->FPCCTR[monIndex].B.ISM = monInput;
+
+ if (monInput == IfxIom_MonInputSignal_p)
+ {
+ if (config->mon.filter.mode == IfxIom_LamFilterMode_noFilter)
+ {
+ module->FPCCTR[monIndex].B.MOD = IfxIom_LamFilterMode_immediateDebounceBothEdge;
+ module->FPCCTR[monIndex].B.CMP = 0;
+ }
+ else
+ {
+ module->FPCCTR[monIndex].B.MOD = config->mon.filter.mode;
+ module->FPCCTR[monIndex].B.CMP = fiom * config->mon.filter.risingEdgeFilterTime;
+ module->FPCCTR[monIndex].B.RTG = config->mon.filter.clearTimerOnGlitch ? 1 : 0;
+ }
+ }
+ }
+
+ {
+ /* Configure the LAM */
+ module->LAMCFG[driver->channel].B.IVR = config->ref.inverted ? 1 : 0;
+ module->LAMCFG[driver->channel].B.IVM = config->mon.inverted ? 1 : 0;
+ module->LAMCFG[driver->channel].B.MOS = config->event.source == IfxIom_LamEventSource_mon ? 0 : 1;
+ module->LAMCFG[driver->channel].B.RMS = config->eventWindow.run;
+ module->LAMCFG[driver->channel].B.EWS = config->eventWindow.controlSource;
+ module->LAMCFG[driver->channel].B.EDS =
+ ((config->eventWindow.clearEvent) << 0)
+ | ((config->event.trigger) << 2)
+ ;
+ module->LAMCFG[driver->channel].B.IVW = config->eventWindow.inverted ? 1 : 0;
+ module->LAMCFG[driver->channel].B.MCS = IFXIOM_DRIVER_LAM_GET_MON_INPUT_INDEX(config->mon.input);
+ module->LAMCFG[driver->channel].B.RCS = IFXIOM_DRIVER_LAM_GET_REF_INPUT_INDEX(config->ref.input);
+
+ module->LAMEWS[driver->channel].B.THR = fiom * config->eventWindow.threshold;
+ }
+
+ {
+ /* Configure the ECM */
+ driver->systemEventTriggerThreshold = config->systemEventTriggerThreshold;
+
+ if (driver->systemEventTriggerThreshold == 1)
+ {
+ module->ECMSELR.U |= 1 << (config->channel + IFX_IOM_ECMSELR_CES0_OFF);
+ }
+ else if (driver->systemEventTriggerThreshold >= 2)
+ {
+ /* Look for a free counter */
+ sint8 index;
+ uint8 accumulatedEventUsedMask = iomDriver->accumulatedEventUsedMask;
+ boolean success = FALSE;
+
+ for (index = 0; index < 4; index++)
+ {
+ if ((accumulatedEventUsedMask & (1 << index)) == 0)
+ {
+ success = TRUE;
+ iomDriver->accumulatedEventUsedMask |= 1 << index;
+ driver->accumulatedCounterIndex = index;
+ module->ECMSELR.U |= 1 << (index + IFX_IOM_ECMSELR_CTS0_OFF);
+
+ module->ECMCCFG.U |= (
+ (driver->channel << IFX_IOM_ECMCCFG_SELC0_OFF)
+ | (driver->systemEventTriggerThreshold << IFX_IOM_ECMCCFG_THRC0_OFF)
+ ) << (index * IFX_IOM_ECMCCFG_SELC1_OFF);
+ break;
+ }
+ }
+
+ result &= success;
+ }
+ else
+ {
+ /* No event generated */
+ }
+ }
+ }
+
+ return result;
+}
+
+
+void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver)
+{
+ config->iomDriver = driver;
+ config->channel = IfxIom_LamId_0;
+ config->event.source = IfxIom_LamEventSource_mon;
+ config->event.trigger = IfxIom_LamEventTrigger_none;
+ config->eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
+ config->eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
+ config->eventWindow.inverted = FALSE;
+ config->eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
+ config->eventWindow.threshold = 0.0;
+ config->mon.filter.clearTimerOnGlitch = FALSE;
+ config->mon.filter.fallingEdgeFilterTime = 0.0;
+ config->mon.filter.mode = IfxIom_LamFilterMode_noFilter;
+ config->mon.filter.prescalerFactor = 1;
+ config->mon.filter.risingEdgeFilterTime = 0.0;
+ config->mon.input = IfxIom_MonInput_p33_0;
+ config->mon.inverted = FALSE;
+ config->ref.filter.clearTimerOnGlitch = FALSE;
+ config->ref.filter.fallingEdgeFilterTime = 0.0;
+ config->ref.filter.mode = IfxIom_LamFilterMode_noFilter;
+ config->ref.filter.prescalerFactor = 1;
+ config->ref.filter.risingEdgeFilterTime = 0.0;
+ config->ref.input = IfxIom_RefInput_p33_0;
+ config->ref.inverted = FALSE;
+ config->systemEventTriggerThreshold = 1;
+}
+
+
+void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
+{
+ Ifx_IOM *module = driver->iomDriver->module;
+
+ if (driver->monInput == IfxIom_MonInputSignal_p)
+ {
+ uint32 index;
+ index = driver->monIndex;
+ *risingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_REG0_OFF)) != 0;
+ *fallingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_FEG0_OFF)) != 0;
+ }
+ else
+ {
+ *risingEdgeGlitch = FALSE;
+ *fallingEdgeGlitch = FALSE;
+ }
+}
+
+
+void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch)
+{
+ Ifx_IOM *module = driver->iomDriver->module;
+
+ if (driver->refInput == IfxIom_RefInputSignal_p)
+ {
+ uint32 index;
+ index = driver->refIndex;
+ *risingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_REG0_OFF)) != 0;
+ *fallingEdgeGlitch = (module->FPCESR.U >> (index + IFX_IOM_FPCESR_FEG0_OFF)) != 0;
+ }
+ else
+ {
+ *risingEdgeGlitch = FALSE;
+ *fallingEdgeGlitch = FALSE;
+ }
+}
+
+
+void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask)
+{
+ driver->module->ECMSELR.U = mask;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Driver/IfxIom_Driver.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Driver/IfxIom_Driver.h
new file mode 100644
index 0000000..bdfbdcb
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Driver/IfxIom_Driver.h
@@ -0,0 +1,338 @@
+/**
+ * \file IfxIom_Driver.h
+ * \brief IOM DRIVER details
+ * \ingroup IfxLld_Iom
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * The IOM driver enable easy usage of the IOM module, by abstracting the internal module structure.
+ * For it's configuration it requires the LAM channel to be used together with the reference and monitor signal. The muxes and filters
+ * are configured accordingly. The driver handles the event combiner "accumulated event timer" resources base on the single or multi-event
+ * configuration making use of the next free timer if required.
+ *
+ * Double resource usage (LAM channel, accumulated event timers) is checked and reported at driver initialization .
+ *
+ * The driver care for the timing and clock conversion, all timing configuration are to be given in second.
+ *
+ * Example of use:
+ * - Initialization of the Iom
+ * - Initialization of LAM channel 0 with:
+ * - IOM monitor input: External pin P20.13, delay debounce filter both edge 0.5us, signal inverted,
+ * - IOM reference: GTM TOUT14, no filter, not inverted
+ * - Event window controlled by ref signal, with a free running timer and cleared on any edge of the reference signal, threshold set to 1us
+ * - Event source is XOR of monitor and reference signal, event is triggered on falling edge of the XOR
+ * - An alarm signal is generated if the monitor signal is not within the threshold, after two events.
+ *
+ *
+ * \code
+ * void InitLam(IfxIom_Driver *driver, IfxIom_Driver *lam){
+ * IfxIom_Driver_Config configDriver;
+ * IfxIom_Driver_LamConfig configLam;
+ *
+ * IfxIom_Driver_initConfig(&configDriver, &MODULE_IOM);
+ * IfxIom_Driver_init(driver, &configDriver);
+ *
+ * IfxIom_Driver_initLamConfig(&configLam, driver);
+ *
+ * configLam.channel = IfxIom_LamId_0;
+ *
+ * configLam.mon.input = IfxIom_MonInput_p20_13;
+ * configLam.mon.filter.mode = IfxIom_LamFilterMode_delayDebounceBothEdge;
+ * configLam.mon.filter.clearTimerOnGlitch = FALSE;
+ * configLam.mon.filter.fallingEdgeFilterTime = 0.5e-6;
+ * configLam.mon.filter.risingEdgeFilterTime = configLam.ref.filter.fallingEdgeFilterTime;
+ * configLam.mon.inverted = TRUE;
+ *
+ * configLam.ref.input= IfxIom_RefInput_gtmTout14;
+ * configLam.ref.filter.mode = IfxIom_LamFilterMode_noFilter;
+ * configLam.ref.inverted = FALSE;
+ *
+ * configLam.eventWindow.controlSource = IfxIom_LamEventWindowControlSource_ref;
+ * configLam.eventWindow.run = IfxIom_LamEventWindowRunControl_freeRunning;
+ * configLam.eventWindow.clearEvent = IfxIom_LamEventWindowClearEvent_anyEdge;
+ * configLam.eventWindow.threshold = 1e-6;
+ * configLam.event.source = IfxIom_LamEventSource_monXorRef;
+ * configLam.event.trigger = IfxIom_LamEventTrigger_fallingEdge;
+ *
+ * configLam.systemEventTriggerThreshold = 2;
+ *
+ * IfxIom_Driver_initLam(lam, &configLam);
+ *
+ * }
+ * \endcode
+ *
+ * \defgroup IfxLld_Iom_Driver IOM Driver
+ * \ingroup IfxLld_Iom
+ * \defgroup IfxLld_Iom_Driver_func Driver Functions
+ * \ingroup IfxLld_Iom_Driver
+ * \defgroup IfxLld_Iom_Driver_struct Structures
+ * \ingroup IfxLld_Iom_Driver
+ */
+
+#ifndef IFXIOM_DRIVER_H
+#define IFXIOM_DRIVER_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Iom/Std/IfxIom.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Iom_Driver_struct
+ * \{ */
+/** \brief IOM LAM filter configuration
+ */
+typedef struct
+{
+ boolean clearTimerOnGlitch; /**< \brief If set, the timer is cleared on glitch, else it is decremented */
+ float32 fallingEdgeFilterTime; /**< \brief Falling edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time. */
+ IfxIom_LamFilterMode mode; /**< \brief Filter mode */
+ uint32 prescalerFactor; /**< \brief Prescaler factor, must be > 0, only valid for prescaler mode */
+ float32 risingEdgeFilterTime; /**< \brief Rising edge filter time in second for immediate debounce filter mode. In delayed filter time this corresponds to the minimal filter time. */
+} IfxIom_Driver_LamFilterConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Iom_Driver_struct
+ * \{ */
+/** \brief IOM driver
+ */
+typedef struct
+{
+ Ifx_IOM *module; /**< \brief Pointer to IOM module SFR set */
+ uint8 accumulatedEventUsedMask; /**< \brief Indicates the used / unused accumulated counter ECM. bit0=CTS0, bit1=CTS2, ... 0=unused, 1=used */
+ uint16 lamUsedMask; /**< \brief Indicates the used / unused LAM. bit0=LAM0, bit1=LAM2, ... 0=unused, 1=used */
+} IfxIom_Driver;
+
+/** \brief IOM LAM event configuration
+ */
+typedef struct
+{
+ IfxIom_LamEventSource source; /**< \brief Event source */
+ IfxIom_LamEventTrigger trigger; /**< \brief Event trigger */
+} IfxIom_Driver_LamEventConfig;
+
+/** \brief IOM LAM event window configuration
+ */
+typedef struct
+{
+ IfxIom_LamEventWindowClearEvent clearEvent; /**< \brief Timer clear event */
+ IfxIom_LamEventWindowControlSource controlSource; /**< \brief Timer control source */
+ boolean inverted; /**< \brief If TRUE, the event window is inverted */
+ IfxIom_LamEventWindowRunControl run; /**< \brief Timer run control */
+ float32 threshold; /**< \brief Event window threshold in second. If 0, no event are generated */
+} IfxIom_Driver_LamEventWindowConfig;
+
+/** \brief IOM LAM monitor input configuration
+ */
+typedef struct
+{
+ IfxIom_Driver_LamFilterConfig filter; /**< \brief Filter configuration */
+ IfxIom_MonInput input; /**< \brief Monitor input */
+ boolean inverted; /**< \brief If TRUE, the signal is inverted */
+} IfxIom_Driver_LamMonConfig;
+
+/** \brief IOM LAM reference input configuration
+ */
+typedef struct
+{
+ IfxIom_Driver_LamFilterConfig filter; /**< \brief Filter configuration */
+ IfxIom_RefInput input; /**< \brief Reference input */
+ boolean inverted; /**< \brief If TRUE, the signal is inverted */
+} IfxIom_Driver_LamRefConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Iom_Driver_struct
+ * \{ */
+/** \brief IOM Driver Configuration
+ */
+typedef struct
+{
+ Ifx_IOM *module; /**< \brief IOM module SFRs */
+} IfxIom_Driver_Config;
+
+/** \brief IOM LAM object
+ */
+typedef struct
+{
+ IfxIom_Driver *iomDriver; /**< \brief Main IOM Driver */
+ IfxIom_LamId channel; /**< \brief LAM Channel */
+ uint8 monIndex; /**< \brief Monitor input index */
+ uint8 refIndex; /**< \brief Reference input index */
+ IfxIom_RefInputSignal refInput; /**< \brief Reference input */
+ IfxIom_MonInputSignal monInput; /**< \brief Monitor input */
+ sint8 accumulatedCounterIndex; /**< \brief Accumulated counter used. Negative value means no counter used */
+ uint8 systemEventTriggerThreshold; /**< \brief Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM. */
+} IfxIom_Driver_Lam;
+
+/** \brief IOM LAM configuration
+ */
+typedef struct
+{
+ IfxIom_Driver *iomDriver; /**< \brief Pointer to the IOM driver */
+ IfxIom_LamId channel; /**< \brief LAM channel to be used */
+ IfxIom_Driver_LamEventConfig event; /**< \brief LAM event configuration */
+ IfxIom_Driver_LamEventWindowConfig eventWindow; /**< \brief LAM eventWindow configuration */
+ IfxIom_Driver_LamMonConfig mon; /**< \brief LAM Monitor input configuration */
+ IfxIom_Driver_LamRefConfig ref; /**< \brief LAM reference input configuration */
+ uint8 systemEventTriggerThreshold; /**< \brief Specifies the number of LAM event that triggers the System Event. Value 0 disables the trigger event. Value one enables the trigger event. Value from 2 to 15 will use the counter to filter events, max 4 counters exists for the IOM. */
+} IfxIom_Driver_LamConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Iom_Driver_func
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear all LAM monitor and reference glitch flags
+ * \param driver Pointer to the IOM driver object
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_clearAllGlitch(IfxIom_Driver *driver);
+
+/** \brief Clear the IOM event history
+ * \param driver Pointer to the IOM driver object
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_clearHistory(IfxIom_Driver *driver);
+
+/** \brief Clear the LAM monitor signal glitch flag
+ * \param driver Pointer to the LAM driver object
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_clearLamMonGlitch(IfxIom_Driver_Lam *driver);
+
+/** \brief Clear the LAM reference signal glitch flag
+ * \param driver Pointer to the LAM driver object
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_clearLamRefGlitch(IfxIom_Driver_Lam *driver);
+
+/** \brief Disable all event generation
+ * \param driver Pointer to the IOM driver object
+ * \return Return the configured events
+ */
+IFX_EXTERN uint32 IfxIom_Driver_disableEvents(IfxIom_Driver *driver);
+
+/** \brief Disable the event generation for the LAM
+ * \param driver Pointer to the LAM driver object
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_disableLamEvent(IfxIom_Driver_Lam *driver);
+
+/** \brief Enable the event genration for the LAM
+ * \param driver Pointer to the LAM driver object
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_enableLamEvent(IfxIom_Driver_Lam *driver);
+
+/** \brief Return the IOM event history.
+ * In returned mask value, bit0= LAM0, bit1=LAM1, ...
+ * \param driver Pointer to the IOM driver object
+ * \param a Event mask of history level 0 (Last event)
+ * \param b Event mask of history level 1
+ * \param c Event mask of history level 2
+ * \param d Event mask of history level 3 (oldest event)
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_getHistory(IfxIom_Driver *driver, uint16 *a, uint16 *b, uint16 *c, uint16 *d);
+
+/** \brief Initialize the IOM
+ * Must be called before IfxIom_Driver_initLam()
+ * \param driver Pointer to the IOM driver object. Will be initialized by the function
+ * \param config IOM driver configuration
+ * \return TRUE in case of success else FALSE
+ */
+IFX_EXTERN boolean IfxIom_Driver_init(IfxIom_Driver *driver, IfxIom_Driver_Config *config);
+
+/** \brief Set the IOM default configuration
+ * \param config IOM configuration. Will be initialized by the function
+ * \param module Pointer to the IOM module
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_initConfig(IfxIom_Driver_Config *config, Ifx_IOM *module);
+
+/** \brief Initialize the LAM channel
+ * \param driver Pointer to the LAM driver object. Will be initialized by the function
+ * \param config LAM driver configuration
+ * \return TRUE in case of success else FALSE
+ */
+IFX_EXTERN boolean IfxIom_Driver_initLam(IfxIom_Driver_Lam *driver, IfxIom_Driver_LamConfig *config);
+
+/** \brief Set the LAM default configuration
+ * \param config LAM configuration. Will be initialized by the function
+ * \param driver Pointer to the IOM driver object
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_initLamConfig(IfxIom_Driver_LamConfig *config, IfxIom_Driver *driver);
+
+/** \brief Return the LAM monitor glitch flags
+ * \param driver Pointer to the LAM driver object
+ * \param risingEdgeGlitch Set to TRUE by the function if rising edge glitch were detected on the monitor signal
+ * \param fallingEdgeGlitch Set to TRUE by the function if falling edge glitch were detected on the monitor signal
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_isLamMonGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch);
+
+/** \brief Return the LAM reference glitch flags
+ * \param driver Pointer to the LAM driver object
+ * \param risingEdgeGlitch Set to TRUE by the function if rising edge glitch were detected on the reference signal
+ * \param fallingEdgeGlitch Set to TRUE by the function if falling edge glitch were detected on the reference signal
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_isLamRefGlitch(IfxIom_Driver_Lam *driver, boolean *risingEdgeGlitch, boolean *fallingEdgeGlitch);
+
+/** \brief Restore the IOM event mask
+ * \param driver Pointer to the IOM driver object
+ * \param mask Event configuration as returned by IfxIom_Driver_disableEvents()
+ * \return None
+ */
+IFX_EXTERN void IfxIom_Driver_restoreEvents(IfxIom_Driver *driver, uint32 mask);
+
+/** \} */
+
+#endif /* IFXIOM_DRIVER_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Std/IfxIom.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Std/IfxIom.c
new file mode 100644
index 0000000..db173ae
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Std/IfxIom.c
@@ -0,0 +1,85 @@
+/**
+ * \file IfxIom.c
+ * \brief IOM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxIom.h"
+#include "Scu/Std/IfxScuCcu.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxIom_getFrequency(Ifx_IOM *iom)
+{
+ IFX_UNUSED_PARAMETER(iom)
+ float32 fspb;
+ float32 fgtm;
+
+ fspb = IfxScuCcu_getSpbFrequency();
+ fgtm = IfxScuCcu_getGtmFrequency();
+
+ return fspb > fgtm ? fspb : fgtm;
+}
+
+
+void IfxIom_resetModule(Ifx_IOM *iom)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ iom->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ iom->KRST0.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (iom->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ iom->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Std/IfxIom.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Std/IfxIom.h
new file mode 100644
index 0000000..a9cfe72
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Std/IfxIom.h
@@ -0,0 +1,252 @@
+/**
+ * \file IfxIom.h
+ * \brief IOM basic functionality
+ * \ingroup IfxLld_Iom
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Iom_Std_Enumeration Enumeration
+ * \ingroup IfxLld_Iom_Std
+ * \defgroup IfxLld_Iom_Std_Utility Utility Functions
+ * \ingroup IfxLld_Iom_Std
+ * \defgroup IfxLld_Iom_Std_Enumeration_Obsolete Enumeration Obsolete (NOt recommended for use)
+ * \ingroup IfxLld_Iom_Std
+ * \defgroup IfxLld_Iom_Std_Module_Obsolete Module Functions Obsolete (NOt recommended for use)
+ * \ingroup IfxLld_Iom_Std
+ */
+
+#ifndef IFXIOM_H
+#define IFXIOM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxIom_cfg.h"
+#include "IfxIom_reg.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Iom_Std_Enumeration
+ * \{ */
+/** \brief Event source configuration
+ * IOM_LAMCFGm.MOS
+ */
+typedef enum
+{
+ IfxIom_LamEventSource_mon = 0, /**< \brief Monitor signal is sourced directly from FPCmch */
+ IfxIom_LamEventSource_monXorRef = 1 /**< \brief Monitor signal is EXOR'd with FPCrch */
+} IfxIom_LamEventSource;
+
+/** \brief Event trigger configuration
+ * IOM_LAMCFGm.EDS upper two bits
+ */
+typedef enum
+{
+ IfxIom_LamEventTrigger_none = 0, /**< \brief Neither edge used to gate event generation */
+ IfxIom_LamEventTrigger_risingEdge = 1, /**< \brief Positive edge used to gate event generation */
+ IfxIom_LamEventTrigger_fallingEdge = 2, /**< \brief Negative edge used to gate event generation */
+ IfxIom_LamEventTrigger_anyEdge = 3 /**< \brief Either edge used to gate event generation */
+} IfxIom_LamEventTrigger;
+
+/** \brief Timer clear event configuration
+ * IOM_LAMCFGm.EDS upper lower bits
+ */
+typedef enum
+{
+ IfxIom_LamEventWindowClearEvent_none = 0, /**< \brief Neither edge used to clear event windowcounter */
+ IfxIom_LamEventWindowClearEvent_risingEdge = 1, /**< \brief Positive edge used to clear event windowcounter */
+ IfxIom_LamEventWindowClearEvent_fallingEdge = 2, /**< \brief Negative edge used to clear event windowcounter */
+ IfxIom_LamEventWindowClearEvent_anyEdge = 3 /**< \brief Either edge used to clear event windowcounter */
+} IfxIom_LamEventWindowClearEvent;
+
+/** \brief Timer control source configuration
+ * IOM_LAMCFGm.EWS
+ */
+typedef enum
+{
+ IfxIom_LamEventWindowControlSource_ref = 0, /**< \brief Event window generation is determined from the reference signal */
+ IfxIom_LamEventWindowControlSource_mon = 1 /**< \brief Event window generation is determined from the monitor signal */
+} IfxIom_LamEventWindowControlSource;
+
+/** \brief Timer run configuration
+ * IOM_LAMCFGm.RMS
+ */
+typedef enum
+{
+ IfxIom_LamEventWindowRunControl_freeRunning = 0, /**< \brief Event window generation is free-running. */
+ IfxIom_LamEventWindowRunControl_gated = 1 /**< \brief Event window generation is gated with the monitor or reference signal */
+} IfxIom_LamEventWindowRunControl;
+
+/** \brief FPC filer mode
+ * IOM_FPCCTRk.MOD, with additional definition for noFilter
+ */
+typedef enum
+{
+ IfxIom_LamFilterMode_delayDebounceBothEdge = 0, /**< \brief Delayed Debounce Filter Mode on both edges */
+ IfxIom_LamFilterMode_immediateDebounceBothEdge = 1, /**< \brief Immediate Debounce Filter Mode on both edges */
+ IfxIom_LamFilterMode_immediateDebounceRisingEdge = 2, /**< \brief Rising edge: Immediate Debounce Filter Mode, falling edge: no filtering */
+ IfxIom_LamFilterMode_immediateDebounceFallingEdge = 3, /**< \brief Rising edge: no filtering, falling edge: Immediate Debounce Filter Mode */
+ IfxIom_LamFilterMode_delayDebounceRisingEdgeImmediateDebounceFallingEdge = 4, /**< \brief Rising edge: Delayed Debounce Filter Mode, falling edge: Immediate Debounce Filter Mode */
+ IfxIom_LamFilterMode_immediateDebounceRisingEdgeDelayDebounceFallingEdge = 5, /**< \brief Immediate Debounce Filter Mode, falling edge: Delayed Debounce Filter Mode */
+ IfxIom_LamFilterMode_prescalerOnRisingEdge = 6, /**< \brief Prescaler Mode (triggered on rising edge) */
+ IfxIom_LamFilterMode_prescalerOnFallingEdge = 7, /**< \brief Prescaler Mode (triggered on falling edge) */
+ IfxIom_LamFilterMode_noFilter = 8 /**< \brief No filter (value used for software only ) */
+} IfxIom_LamFilterMode;
+
+/** \brief Specifies the Logic Module Analyser Module Number
+ */
+typedef enum
+{
+ IfxIom_LamId_0 = 0, /**< \brief Specifies the LAM Id0 */
+ IfxIom_LamId_1, /**< \brief Specifies the LAM Id1 */
+ IfxIom_LamId_2, /**< \brief Specifies the LAM Id2 */
+ IfxIom_LamId_3, /**< \brief Specifies the LAM Id3 */
+ IfxIom_LamId_4, /**< \brief Specifies the LAM Id4 */
+ IfxIom_LamId_5, /**< \brief Specifies the LAM Id5 */
+ IfxIom_LamId_6, /**< \brief Specifies the LAM Id6 */
+ IfxIom_LamId_7, /**< \brief Specifies the LAM Id7 */
+ IfxIom_LamId_8, /**< \brief Specifies the LAM Id8 */
+ IfxIom_LamId_9, /**< \brief Specifies the LAM Id9 */
+ IfxIom_LamId_10, /**< \brief Specifies the LAM Id10 */
+ IfxIom_LamId_11, /**< \brief Specifies the LAM Id11 */
+ IfxIom_LamId_12, /**< \brief Specifies the LAM Id12 */
+ IfxIom_LamId_13, /**< \brief Specifies the LAM Id13 */
+ IfxIom_LamId_14, /**< \brief Specifies the LAM Id14 */
+ IfxIom_LamId_15 /**< \brief Specifies the LAM Id15 */
+} IfxIom_LamId;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal
+ * Definition in Ifx_IOM.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxIom_SleepMode_enable = 0, /**< \brief Enables sleep mode */
+ IfxIom_SleepMode_disable = 1 /**< \brief Disables sleep mode */
+} IfxIom_SleepMode;
+
+/** \} */
+
+/** \addtogroup IfxLld_Iom_Std_Enumeration_Obsolete
+ * \{ */
+/** \} */
+
+/** \addtogroup IfxLld_Iom_Std_Utility
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disables the IOM module .
+ * \param iom Pointer to IOM module registers
+ * \return None
+ */
+IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom);
+
+/** \brief Enable the IOM module control.
+ * \param iom Pointer to IOM module registers
+ * \param clockDivider IOM clock divider. Set to 1 for max clock.
+ * \return None
+ */
+IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider);
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal
+ * \param iom Pointer to IOM registers
+ * \param mode Mode selection (enable/disable)
+ * \return None
+ */
+IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Return the frequency used for the filter and timers clock
+ * \param iom Pointer to IOM module registers
+ */
+IFX_EXTERN float32 IfxIom_getFrequency(Ifx_IOM *iom);
+
+/** \brief Reset the IOM module
+ * \param iom Pointer to IOM module registers
+ * \return None
+ */
+IFX_EXTERN void IfxIom_resetModule(Ifx_IOM *iom);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxIom_disableModule(Ifx_IOM *iom)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(psw);
+ iom->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(psw);
+}
+
+
+IFX_INLINE void IfxIom_enableModule(Ifx_IOM *iom, uint8 clockDivider)
+{
+ uint16 psw = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(psw);
+ iom->CLC.B.RMC = clockDivider;
+ iom->CLC.B.DISR = 0;
+ IfxScuWdt_setCpuEndinit(psw);
+}
+
+
+IFX_INLINE void IfxIom_setSleepMode(Ifx_IOM *iom, IfxIom_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ iom->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+#endif /* IFXIOM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Msc/IfxMsc_Msc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Msc/IfxMsc_Msc.c
new file mode 100644
index 0000000..5fda375
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Msc/IfxMsc_Msc.c
@@ -0,0 +1,720 @@
+/**
+ * \file IfxMsc_Msc.c
+ * \brief MSC MSC details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxMsc_Msc.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc)
+{
+ IfxMsc_resetModule(msc->msc);
+}
+
+
+IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+ IfxMsc_Target enX = IfxMsc_Target_en0;
+
+ if (target == IfxMsc_Msc_Target_low)
+ {
+ enX = IfxMsc_getDataLowTarget(mscSfr);
+ }
+ else if (target == IfxMsc_Msc_Target_high)
+ {
+ enX = IfxMsc_getDataHighTarget(mscSfr);
+ }
+
+ return enX;
+}
+
+
+void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
+{
+ Ifx_MSC *mscSfr = config->msc;
+
+ msc->msc = mscSfr;
+
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ /* Enable the MSCx Clock */
+ IfxMsc_enableModule(mscSfr);
+
+ /* Configure MSC hadrware enable and set the divider mode */
+ {
+ Ifx_MSC_FDR fdr;
+
+ /* Read the FDR register content */
+ fdr.U = mscSfr->FDR.U;
+ /* Select the divider mode */
+ fdr.B.DM = config->clockConfig.dividerMode;
+ /* Enable Hardware Clock Control */
+ fdr.B.ENHW = IfxMsc_HardwareClock_enabled;
+
+ mscSfr->FDR.U = fdr.U;
+ }
+
+ /* Configure Upstream Channel Data Format */
+ {
+ Ifx_MSC_USR usr;
+
+ /* Read the USR register content */
+ usr.U = mscSfr->USR.U;
+ /* Service Request Delay Control */
+ usr.B.SRDC = config->upstreamConfig.serviceRequestDelay;
+ /* Select parity control Even - 0, Odd - 1 */
+ usr.B.PCTR = config->upstreamConfig.parity;
+ /* Select upstream baud rate fMSC/xx */
+ usr.B.URR = config->upstreamConfig.upstreamChannelReceivingRate;
+ /* Select 12 bit or 16 bit frame */
+ usr.B.UFT = config->upstreamConfig.upstreamChannelFrameType;
+
+ mscSfr->USR.U = usr.U;
+ }
+
+ /* Normal divider */
+ if (config->clockConfig.dividerMode == 1)
+ {
+ /* Initialize MSC BaudRate at 6.25MHz, Fsys = 100MHz */
+ mscSfr->FDR.B.STEP =
+ IfxMsc_upstreamNormalBaudCalculator(mscSfr, config->clockConfig.baudrate);
+ }
+ /* Fractional divider */
+ else
+ {
+ /* Initialize MSC BaudRate at 6.25MHz, Fsys = 100MHz */
+ mscSfr->FDR.B.STEP = (uint32)IfxMsc_upstreamFractionalBaudCalculator(mscSfr, config->clockConfig.baudrate);
+ }
+
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ /* Configure IOs */
+ {
+ IfxMsc_Msc_Io *io = (IfxMsc_Msc_Io *)&config->io;
+
+ IfxMsc_Fclp_Out *fclp = io->fclp.pin;
+
+ if (fclp != NULL_PTR)
+ {
+ IfxMsc_initFclpPin(fclp, io->fclp.mode, io->pinDriver);
+ }
+
+ IfxMsc_Fcln_Out *fcln = io->fcln.pin;
+
+ if (fcln != NULL_PTR)
+ {
+ IfxMsc_initFclnPin(fcln, io->fcln.mode, io->pinDriver);
+ }
+
+ IfxMsc_Sop_Out *sop = io->sop.pin;
+
+ if (sop != NULL_PTR)
+ {
+ IfxMsc_initSopPin(sop, io->sop.mode, io->pinDriver);
+ }
+
+ IfxMsc_Son_Out *son = io->son.pin;
+
+ if (son != NULL_PTR)
+ {
+ IfxMsc_initSonPin(son, io->son.mode, io->pinDriver);
+ }
+
+ IfxMsc_En_Out *en0 = io->en0.pin;
+
+ if (en0 != NULL_PTR)
+ {
+ IfxMsc_initEnPin(en0, io->en0.mode, io->pinDriver);
+ }
+
+ IfxMsc_En_Out *en1 = io->en1.pin;
+
+ if (en1 != NULL_PTR)
+ {
+ IfxMsc_initEnPin(en1, io->en1.mode, io->pinDriver);
+ }
+
+ IfxMsc_En_Out *en2 = io->en2.pin;
+
+ if (en2 != NULL_PTR)
+ {
+ IfxMsc_initEnPin(en2, io->en2.mode, io->pinDriver);
+ }
+
+ IfxMsc_En_Out *en3 = io->en3.pin;
+
+ if (en3 != NULL_PTR)
+ {
+ IfxMsc_initEnPin(en3, io->en3.mode, io->pinDriver);
+ }
+
+ IfxMsc_Sdi_In *sdi = io->sdi.pin;
+
+ if (sdi != NULL_PTR)
+ {
+ IfxMsc_initSdiPin(sdi, io->sdi.mode, io->pinDriver);
+ }
+
+ IfxMsc_Inj_In *inj0 = io->inj0.pin;
+
+ if (inj0 != NULL_PTR)
+ {
+ IfxMsc_initInjPin(inj0, io->inj0.mode, io->pinDriver);
+ }
+
+ IfxMsc_Inj_In *inj1 = io->inj1.pin;
+
+ if (inj1 != NULL_PTR)
+ {
+ IfxMsc_initInjPin(inj1, io->inj1.mode, io->pinDriver);
+ }
+ }
+
+ /* Configure the control of upstream channel timeout feature */
+ {
+ Ifx_MSC_USCE usce;
+
+ /* Read the USCE register content */
+ usce.U = mscSfr->USCE.U;
+ /* Upstream Timeout Value */
+ usce.B.USTOVAL = config->upstreamConfig.upstreamTimeoutValue;
+ /* Upstream Timeout Prescaler */
+ usce.B.USTOPRE = config->upstreamConfig.upstreamTimeoutPrescaler;
+ /* Upstream Timeout Interrupt */
+ usce.B.USTOIP = config->interruptConfig.upstreamTimeoutInterruptNode,
+ usce.B.USTOEN = config->interruptConfig.upstreamTimeoutInterrupt,
+
+ mscSfr->USCE.U = usce.U;
+ }
+
+ /* Control the operation mode and frame layout of the downstream channel transmission */
+ {
+ Ifx_MSC_DSC dsc;
+
+ /* Read the DSC register content */
+ dsc.U = mscSfr->DSC.U;
+
+ /* Passive Phase Length */
+ dsc.B.PPD = config->downstreamConfig.dataFramePassivePhaseLength;
+ /* Number of command bits transmitted */
+ dsc.B.NBC = config->downstreamConfig.commandFrameLength;
+ /* SRH Selection Bit */
+ dsc.B.ENSELH = config->downstreamConfig.srhActivePhaseSelection;
+ /* SRL Selection Bit */
+ dsc.B.ENSELL = config->downstreamConfig.srlActivePhaseSelection;
+ /* Number of SRH Bits transmitted */
+ dsc.B.NDBH = config->downstreamConfig.srhDataFrameLength;
+ /* Number of SRL Bits transmitted */
+ dsc.B.NDBL = config->downstreamConfig.srlDataFrameLength;
+ /* Transmission Mode - Triggered or data repetition */
+ dsc.B.TM = config->downstreamConfig.transmissionMode;
+
+ mscSfr->DSC.U = dsc.U;
+ }
+
+ /* Number Of Passive Time Frames */
+ mscSfr->DSS.B.NPTF = config->downstreamConfig.passiveTimeFrameCount;
+
+ /* Select Source for SRL */
+ mscSfr->DSDSL.U = config->downstreamConfig.downstreamDataSourcesLow;
+ /* Select Source for SRH */
+ mscSfr->DSDSH.U = config->downstreamConfig.downstreamDataSourcesHigh;
+
+ /* Emergency Stop Enable for Bits */
+ mscSfr->ESR.U = config->downstreamConfig.emergencyStopEnableBits;
+
+ /* Interrupt configuration */
+ {
+ Ifx_MSC_ICR icr;
+
+ icr.U = mscSfr->ICR.U;
+
+ icr.B.EDIP = config->interruptConfig.dataFrameInterruptNode;
+ icr.B.EDIE = config->interruptConfig.dataFrameInterrupt;
+ icr.B.ECIP = config->interruptConfig.commandFrameInterruptNode;
+ icr.B.ECIE = config->interruptConfig.commandFrameInterrupt;
+ icr.B.TFIP = config->interruptConfig.timeFrameInterruptNode;
+ icr.B.TFIE = config->interruptConfig.timeFrameInterrupt;
+ icr.B.RDIP = config->interruptConfig.receiveDataInterruptNode;
+ icr.B.RDIE = config->interruptConfig.receiveDataInterrupt;
+
+ /* additional interrupt configured in USCE for Upstream Interrupt node SR4 */
+
+ Ifx_MSC_USCE usce;
+
+ /* Read the USCE register content */
+ usce.U = mscSfr->USCE.U;
+
+ if (config->interruptConfig.upstreamTimeoutInterruptNode == IfxMsc_UpstreamTimeoutInterruptNode_SR4)
+ {
+ usce.B.USTOIP = 0;
+ usce.B.UTASR = 1;
+ }
+ else
+ {
+ usce.B.USTOIP = config->interruptConfig.upstreamTimeoutInterruptNode;
+ usce.B.UTASR = 0;
+ }
+
+ usce.B.USTOEN = config->interruptConfig.upstreamTimeoutInterrupt;
+
+ mscSfr->USCE.U = usce.U;
+
+ mscSfr->ICR.U = icr.U;
+
+ /* ABRA */
+ Ifx_MSC_ABC abc;
+ abc.U = mscSfr->ABC.U;
+
+ if (config->interruptConfig.overflowInterruptNode == IfxMsc_OverflowInterruptNode_SR4)
+ {
+ abc.B.OIP = 0;
+ abc.B.OASR = 1;
+ }
+ else
+ {
+ abc.B.OIP = config->interruptConfig.overflowInterruptNode;
+ abc.B.OASR = 0;
+ }
+
+ abc.B.OIE = config->interruptConfig.overflowInterrupt;
+
+ if (config->interruptConfig.underflowInterruptNode == IfxMsc_UnderflowInterruptNode_SR4)
+ {
+ abc.B.UIP = 0;
+ abc.B.UASR = 1;
+ }
+ else
+ {
+ abc.B.UIP = config->interruptConfig.underflowInterruptNode;
+ abc.B.UASR = 0;
+ }
+
+ abc.B.UIE = config->interruptConfig.underflowInterrupt;
+
+ mscSfr->ABC.U = abc.U;
+ }
+
+ /* MSC inputs/outputs signal polarities */
+ {
+ Ifx_MSC_OCR ocr;
+
+ /* Read the OCR register content */
+ ocr.U = mscSfr->OCR.U;
+ /* FCL is activated during active phases or always */
+ ocr.B.CLKCTRL = config->outputControlConfig.fclClockControl;
+ /* SDI Line Polarity - SDI and SI */
+ ocr.B.ILP = config->outputControlConfig.sdiLinePolarity;
+ /* Chip Selection Lines Polarity - EN[0:3, ENL, ENH and ENC */
+ ocr.B.CSLP = config->outputControlConfig.cslpPolarity;
+ /* SOP Line Polarity - SOP, SON, SO */
+ ocr.B.SLP = config->outputControlConfig.sopPolarity;
+ /* FCLP Line Polarity - FCLP, FCLN and FCL */
+ ocr.B.CLP = config->outputControlConfig.fclpPolarity;
+
+ mscSfr->OCR.U = ocr.U;
+ }
+ /* Chip Enable Selection for ENL */
+ IfxMsc_setDataLowTarget(mscSfr, config->target[0]);
+
+ /* Chip Enable Selection for ENH */
+ IfxMsc_setDataHighTarget(mscSfr, config->target[0]);
+
+ /* Chip Enable Selection for ENC */
+ IfxMsc_setCommandTarget(mscSfr, IfxMsc_Msc_getTarget(msc, IfxMsc_Msc_Target_low));
+
+ /* Configure the Injection Enable and number of SRHE, SRLE Bits transmitted and Extension Enable */
+ {
+ Ifx_MSC_DSCE dsce;
+
+ /* Read the DSCE register content */
+ dsce.U = mscSfr->DSCE.U;
+ /* Command-Data-Command in Data Repetition Mode */
+ dsce.B.CDCM = config->downstreamConfig.commandDataCommandReceptionMode;
+ /* Injection Position of the Pin 1 Signal */
+ dsce.B.INJPOSP1 = config->downstreamConfig.injectionPositionPin1;
+ /* Injection Enable of the Pin 1 Signal */
+ dsce.B.INJENP1 = config->downstreamConfig.externalSignalInjectionPin1;
+ /* Injection Position of the Pin 0 Signal */
+ dsce.B.INJPOSP0 = config->downstreamConfig.injectionPositionPin0;
+ /* Injection Enable of the Pin 0 Signal */
+ dsce.B.INJENP0 = config->downstreamConfig.externalSignalInjectionPin0;
+
+ mscSfr->DSCE.U = dsce.U;
+ }
+
+ /* If enabled configure extension registers */
+ if (config->downstreamExtensionConfig.extension == IfxMsc_Extension_enabled)
+ {
+ IfxMsc_Msc_initializeDataExtension(msc, config);
+ }
+
+ /* If enabled, configure ABRA block */
+ if (config->abraConfig.abraBlockBypass != IfxMsc_AsynchronousBlock_bypassed)
+ {
+ IfxMsc_Msc_initializeAbra(msc, config);
+ }
+}
+
+
+void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc)
+{
+ const IfxMsc_Msc_Config defaultConfig = {
+ .msc = NULL_PTR,
+ .clockConfig = {
+ .baudrate = 3125000,
+ .dividerMode = IfxMsc_DividerMode_normal,
+ .step = 0
+ },
+ .upstreamConfig = {
+ .upstreamChannelFrameType = IfxMsc_UpstreamChannelFrameType_12bit,
+ .upstreamChannelReceivingRate = IfxMsc_UpstreamChannelReceivingRate_16,
+ .parity = IfxMsc_Parity_even,
+ .serviceRequestDelay = IfxMsc_ServiceRequestDelay_noDelay,
+ .upstreamTimeoutPrescaler = IfxMsc_UpstreamTimeoutPrescaler_32768,
+ .upstreamTimeoutValue = IfxMsc_UpstreamTimeoutValue_16
+ },
+ .interruptConfig = {
+ .dataFrameInterruptNode = IfxMsc_DataFrameInterruptNode_SR0,
+ .dataFrameInterrupt = IfxMsc_DataFrameInterrupt_disabled,
+ .commandFrameInterruptNode = IfxMsc_CommandFrameInterruptNode_SR0,
+ .commandFrameInterrupt = IfxMsc_CommandFrameInterrupt_disabled,
+ .timeFrameInterruptNode = IfxMsc_TimeFrameInterruptNode_SR0,
+ .timeFrameInterrupt = IfxMsc_TimeFrameInterrupt_disabled,
+ .receiveDataInterruptNode = IfxMsc_ReceiveDataInterruptNode_SR0,
+ .receiveDataInterrupt = IfxMsc_ReceiveDataInterrupt_disabled,
+ .upstreamTimeoutInterruptNode = IfxMsc_UpstreamTimeoutInterruptNode_SR0,
+ .upstreamTimeoutInterrupt = IfxMsc_UpstreamTimeoutInterrupt_disabled,
+ .overflowInterruptNode = IfxMsc_OverflowInterruptNode_SR0,
+ .overflowInterrupt = IfxMsc_OverflowInterrupt_disabled,
+ .underflowInterruptNode = IfxMsc_UnderflowInterruptNode_SR0,
+ .underflowInterrupt = IfxMsc_UnderflowInterrupt_disabled
+ },
+ .outputControlConfig = {
+ .fclpPolarity = IfxMsc_FclLinePolarity_nonInverted,
+ .sopPolarity = IfxMsc_SoLinePolarity_nonInverted,
+ .cslpPolarity = IfxMsc_ChipSelectActiveState_low,
+ .sdiLinePolarity = IfxMsc_SdiLinePolarity_likeSi,
+ .fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly
+ },
+ .downstreamConfig = {
+ .transmissionMode = IfxMsc_TransmissionMode_triggered,
+ .srlDataFrameLength = IfxMsc_DataFrameLength_16,
+ .srhDataFrameLength = IfxMsc_DataFrameLength_16,
+ .srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
+ .srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none,
+ .commandFrameLength = IfxMsc_CommandFrameLength_32,
+ .dataFramePassivePhaseLength = IfxMsc_DataFramePassivePhaseLength_2,
+ .passiveTimeFrameCount = IfxMsc_PassiveTimeFrameCount_0,
+ .externalSignalInjectionPin0 = IfxMsc_ExternalSignalInjection_disabled,
+ .injectionPositionPin0 = IfxMsc_ExternalBitInjectionPosition_0,
+ .externalSignalInjectionPin1 = IfxMsc_ExternalSignalInjection_disabled,
+ .injectionPositionPin1 = IfxMsc_ExternalBitInjectionPosition_0,
+ .commandDataCommandReceptionMode = IfxMsc_CommandDataCommandRepetitionMode_disabled,
+ .downstreamDataSourcesLow = 0,
+ .downstreamDataSourcesHigh = 0,
+ .emergencyStopEnableBits = 0
+ },
+ .downstreamExtensionConfig = {
+ .extension = IfxMsc_Extension_disabled,
+ .srlBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
+ .srhBitsShiftedAtDataFramesExtension = IfxMsc_MsbBitDataExtension_notPresent,
+ .downstreamExtensionDataSourcesLow = 0,
+ .downstreamExtensionDataSourcesHigh = 0,
+ .emergencyStopExtensionEnableBits = 0,
+ .dataFrameExtensionPassivePhaseLength = IfxMsc_DataFrameExtensionPassivePhaseLength_0,
+ .controlFrameExtensionPassivePhaseLength = IfxMsc_ControlFrameExtensionPassivePhaseLength_0,
+ .nDividerDownstream = IfxMsc_NDividerDownstream_1
+ },
+ .abraConfig = {
+ .abraDownstreamBlockBaudrate = 500000,
+ .lowPhaseOfShiftClock = IfxMsc_ShiftClockPhaseDuration_1,
+ .highPhaseOfShiftClock = IfxMsc_ShiftClockPhaseDuration_1,
+ .nDividerAbra = IfxMsc_NDividerAbra_1,
+ .abraBlockBypass = IfxMsc_AsynchronousBlock_bypassed,
+ .clockSelectAbra = IfxMsc_ClockSelect_fspb
+ },
+ .io = {
+ .fclp = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_OutputMode_pushPull
+ },
+ .fcln = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_OutputMode_pushPull
+ },
+ .sop = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_OutputMode_pushPull
+ },
+ .son = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_OutputMode_pushPull
+ },
+ .en0 = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_OutputMode_pushPull
+ },
+ .en1 = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_OutputMode_pushPull
+ },
+ .en2 = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_OutputMode_pushPull
+ },
+ .en3 = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_OutputMode_pushPull
+ },
+ .sdi = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_InputMode_pullUp
+ },
+ .inj0 = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_InputMode_pullUp
+ },
+ .inj1 = {
+ .pin = NULL_PTR,
+ .mode = IfxPort_InputMode_pullUp
+ },
+ .pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed3
+ }
+ };
+
+ /* Default Configuration */
+ *config = defaultConfig;
+
+ /* take over module pointer */
+ config->msc = msc;
+}
+
+
+void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ /* N Divider Downstream */
+ mscSfr->DSTE.B.NDD =
+ IfxMsc_downstreamAbraBaudCalculator(config->abraConfig.abraDownstreamBlockBaudrate);
+
+ /* Configure Asynchronous block */
+ {
+ Ifx_MSC_ABC abc;
+
+ /* Read the ABC register content */
+ abc.U = mscSfr->ABC.U;
+ /* Asynchronous Block Bypass */
+ abc.B.ABB = config->abraConfig.abraBlockBypass;
+ /* Clock Select */
+ abc.B.CLKSEL = config->abraConfig.clockSelectAbra;
+ /* N Divider ABRA */
+ abc.B.NDA = config->abraConfig.nDividerAbra;
+ /* Duration of the High Phase of the Shift Clock */
+ abc.B.HIGH = config->abraConfig.highPhaseOfShiftClock;
+ /* Duration of the Low Phase of the Shift Clock */
+ abc.B.LOW = config->abraConfig.lowPhaseOfShiftClock;
+
+ mscSfr->ABC.U = abc.U;
+ }
+}
+
+
+void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ /* Configure the number of SRHE, SRLE Bits transmitted and Extension Enable */
+ {
+ Ifx_MSC_DSCE dsce;
+
+ /* Read the DSCE register content */
+ dsce.U = mscSfr->DSCE.U;
+ /* Extension Enable */
+ dsce.B.EXEN = config->downstreamExtensionConfig.extension;
+ /* Configure the number of SRLE Bits transmitted */
+ dsce.B.NDBLE = config->downstreamExtensionConfig.srlBitsShiftedAtDataFramesExtension;
+ /* Configure the number of SRHE Bits transmitted */
+ dsce.B.NDBHE = config->downstreamExtensionConfig.srhBitsShiftedAtDataFramesExtension;
+
+ mscSfr->DSCE.U = dsce.U;
+ }
+
+ /* Select Source for SRLE */
+ mscSfr->DSDSLE.U = config->downstreamExtensionConfig.downstreamExtensionDataSourcesLow;
+
+ /* Select Source for SRHE */
+ mscSfr->DSDSHE.U = config->downstreamExtensionConfig.downstreamExtensionDataSourcesHigh;
+
+ /* Emergency Stop Enable for Bit */
+ mscSfr->ESRE.U = config->downstreamExtensionConfig.emergencyStopExtensionEnableBits;
+
+ /* Passive Phase Length at Data and Control Frames Extension */
+ {
+ Ifx_MSC_DSTE dste;
+
+ /* Read the DSTE register content */
+ dste.U = mscSfr->DSTE.U;
+ /* Passive Phase Length at Control Frames Extension */
+ dste.B.PPCE = config->downstreamExtensionConfig.controlFrameExtensionPassivePhaseLength;
+ /* Passive Phase Length at Data Frames Extension */
+ dste.B.PPDE = config->downstreamExtensionConfig.dataFrameExtensionPassivePhaseLength;
+ /* N Divider for Downstream */
+ dste.B.NDD = config->downstreamExtensionConfig.nDividerDownstream;
+
+ mscSfr->DSTE.U = dste.U;
+ }
+}
+
+
+uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+ uint16 data = 0;
+
+ /* Check for valid flag */
+ if (!IfxMsc_getUpstreamValidFlag(mscSfr, upstreamIdx))
+ {
+ return (uint32)0xFFFFFFFF;
+ }
+
+ /* Clear the flag */
+ IfxMsc_clearUpstreamValidFlag(mscSfr, upstreamIdx);
+
+ /* Read the data */
+ data = IfxMsc_getData(mscSfr, upstreamIdx);
+
+ return data;
+}
+
+
+void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ /* Downstream command */
+ mscSfr->DC.U = command;
+}
+
+
+void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ {
+ Ifx_MSC_DD dd;
+ dd.B.DDL = dataLow;
+ dd.B.DDH = dataHigh;
+
+ /* Downstream Data */
+ mscSfr->DD.U = dd.U;
+ }
+
+ /* Send data */
+ mscSfr->ISC.B.SDP = 1;
+}
+
+
+void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ /* Downstream Data (mirror) + extension */
+ mscSfr->DDE.U = dataExtension;
+ mscSfr->DDM.U = data;
+
+ /* Send data */
+ mscSfr->ISC.B.SDP = 1;
+}
+
+
+void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ /* Downstream Data High only */
+ mscSfr->DD.B.DDH = data;
+
+ /* Send data */
+ mscSfr->ISC.B.SDP = 1;
+}
+
+
+void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ /* Downstream Data Low only */
+ mscSfr->DD.B.DDL = data;
+
+ /* Send data */
+ mscSfr->ISC.B.SDP = 1;
+}
+
+
+void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ IfxMsc_setCommandTarget(mscSfr, enX);
+}
+
+
+void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow)
+{
+ Ifx_MSC *mscSfr = msc->msc;
+
+ /* Set data low target */
+ IfxMsc_setDataLowTarget(mscSfr, enXLow);
+ /* Set data high target */
+ IfxMsc_setDataHighTarget(mscSfr, enXHigh);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Msc/IfxMsc_Msc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Msc/IfxMsc_Msc.h
new file mode 100644
index 0000000..4e43c7f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Msc/IfxMsc_Msc.h
@@ -0,0 +1,606 @@
+/**
+ * \file IfxMsc_Msc.h
+ * \brief MSC MSC details
+ * \ingroup IfxLld_Msc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Msc_Msc_Usage How to use the MSC Interface driver?
+ * \ingroup IfxLld_Msc
+ *
+ * The MSC interface driver provides a default MSC configuration
+ *
+ *
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Msc_Msc_Preparation Preparation
+ * \subsection IfxLld_Msc_Msc_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Msc_Msc_Variables Variables
+ *
+ * Declare the MSC handle as global variable in your C code:
+ *
+ * \code
+ * // MSC handle
+ * static IfxMsc_Msc *msc;
+ *
+ * // IO Pins
+ * static const IfxMsc_Msc_Io IfxMsc_PinMap[IFXMSC_NUM_MODULES] = {
+ * {
+ * { &IfxMsc0_FCLP_P13_1_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc0_FCLN_P13_0_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc0_SOP_P13_3_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc0_SON_P13_2_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc0_EN0_P10_3_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc0_EN1_P11_2_OUT, IfxPort_OutputMode_pushPull },
+ * {NULL_PTR},
+ * {NULL_PTR},
+ * { &IfxMsc0_SDI0_P11_10_IN, IfxPort_InputMode_pullUp },
+ * { &IfxMsc0_INJ0_P00_0_IN, IfxPort_InputMode_pullUp },
+ * { &IfxMsc0_INJ1_P10_5_IN, IfxPort_InputMode_pullUp },
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3
+ * },
+ *
+ * #if IFXMSC_NUM_MODULES >= 2
+ * {
+ * { &IfxMsc1_FCLP_P22_1_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc1_FCLN_P22_0_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc1_SOP_P22_3_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc1_SON_P22_2_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc1_EN0_P23_4_OUT, IfxPort_OutputMode_pushPull },
+ * { &IfxMsc1_EN1_P23_5_OUT, IfxPort_OutputMode_pushPull },
+ * {NULL_PTR},
+ * {NULL_PTR},
+ * { &IfxMsc1_SDI0_P23_1_IN, IfxPort_InputMode_pullUp },
+ * { &IfxMsc1_INJ0_P23_3_IN, IfxPort_InputMode_pullUp },
+ * { &IfxMsc1_INJ1_P33_13_IN, IfxPort_InputMode_pullUp },
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3
+ * },
+ * #endif
+ * };
+ * \endcode
+ *
+ * \subsection IfxLld_Msc_Msc_Init Module Initialisation
+ *
+ * The module initialisation can be done as followed:
+ * \code
+ * // create configuration (same is used for all MSCs)
+ * IfxMsc_Msc_Config mscConfig;
+ * IfxMsc_Msc_initModuleConfig(&mscConfig, &MODULE_MSC0);
+ *
+ * // increase baudrate for faster simulation:
+ * mscConfig.clockConfig.baudrate = 25000000;
+ * mscConfig.clockConfig.dividerMode = IfxMsc_DividerMode_fractional;
+ *
+ * // FCL only activated on transfers
+ * mscConfig.outputControlConfig.fclClockControl = IfxMsc_FclClockControlEnabled_activePhaseOnly;
+ *
+ * // in this case we also don't need a selection bit
+ * mscConfig.downstreamConfig.srlActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
+ * mscConfig.downstreamConfig.srhActivePhaseSelection = IfxMsc_ActivePhaseSelection_none;
+ *
+ * // initialize MSCs
+ * for(int i=0; iISC.B.CDEDI = 1;
+ * }
+ *
+ * // new transfer
+ * for(int i=0; iISR.B.DEDI ); // check if new data could be written
+ * while( msc[i].msc->DSS.B.DFA ); // check if we are still in the active data phase
+ * }
+ * }
+ * \endcode
+ *
+ * \defgroup IfxLld_Msc_Msc MSC
+ * \ingroup IfxLld_Msc
+ * \defgroup IfxLld_Msc_Msc_Enumerations Enumerations
+ * \ingroup IfxLld_Msc_Msc
+ * \defgroup IfxLld_Msc_Msc_Data_Structures Data Structures
+ * \ingroup IfxLld_Msc_Msc
+ * \defgroup IfxLld_Msc_Msc_Module_Initialize_Functions Module Initialize Functions
+ * \ingroup IfxLld_Msc_Msc
+ * \defgroup IfxLld_Msc_Msc_Send_Functions Send Functions
+ * \ingroup IfxLld_Msc_Msc
+ * \defgroup IfxLld_Msc_Msc_Receive_Functions Receive Functions
+ * \ingroup IfxLld_Msc_Msc
+ * \defgroup IfxLld_Msc_Msc_Target_Read_Write_Functions Target Read Write Functions
+ * \ingroup IfxLld_Msc_Msc
+ */
+
+#ifndef IFXMSC_MSC_H
+#define IFXMSC_MSC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Msc/Std/IfxMsc.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Msc_Msc_Enumerations
+ * \{ */
+/** \brief Msc Instance Number
+ */
+typedef enum
+{
+ IfxMsc_Msc_Target_low = 0, /**< \brief MSC Target Low */
+ IfxMsc_Msc_Target_high = 1 /**< \brief MSC Target High */
+} IfxMsc_Msc_Target;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Msc_Msc_Data_Structures
+ * \{ */
+typedef struct
+{
+ IfxMsc_En_Out *pin;
+ IfxPort_OutputMode mode;
+} IfxMsc_Msc_en;
+
+typedef struct
+{
+ IfxMsc_Fcln_Out *pin;
+ IfxPort_OutputMode mode;
+} IfxMsc_Msc_fcln;
+
+typedef struct
+{
+ IfxMsc_Fclp_Out *pin;
+ IfxPort_OutputMode mode;
+} IfxMsc_Msc_fclp;
+
+typedef struct
+{
+ IfxMsc_Inj_In *pin;
+ IfxPort_InputMode mode;
+} IfxMsc_Msc_inj0;
+
+typedef struct
+{
+ IfxMsc_Inj_In *pin;
+ IfxPort_InputMode mode;
+} IfxMsc_Msc_inj1;
+
+typedef struct
+{
+ IfxMsc_Sdi_In *pin;
+ IfxPort_InputMode mode;
+} IfxMsc_Msc_sdi;
+
+typedef struct
+{
+ IfxMsc_Son_Out *pin;
+ IfxPort_OutputMode mode;
+} IfxMsc_Msc_son;
+
+typedef struct
+{
+ IfxMsc_Sop_Out *pin;
+ IfxPort_OutputMode mode;
+} IfxMsc_Msc_sop;
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Msc_Data_Structures
+ * \{ */
+/** \brief ABRA block Configuration Structure
+ */
+typedef struct
+{
+ uint32 abraDownstreamBlockBaudrate; /**< \brief Specifies ABRA downstream block baud */
+ IfxMsc_ShiftClockPhaseDuration lowPhaseOfShiftClock; /**< \brief Specifies Low phase of shift clock */
+ IfxMsc_ShiftClockPhaseDuration highPhaseOfShiftClock; /**< \brief Specifies High phase of shift clock */
+ IfxMsc_NDividerAbra nDividerAbra; /**< \brief Specifies the N divider */
+ IfxMsc_AsynchronousBlock abraBlockBypass; /**< \brief Specifies ABRA block bypass */
+ IfxMsc_ClockSelect clockSelectAbra; /**< \brief Specifies the clock select for ABRA */
+} IfxMsc_Msc_Abra;
+
+/** \brief Clock configuration data Structure
+ */
+typedef struct
+{
+ uint32 baudrate; /**< \brief Specifies the baud rate */
+ IfxMsc_DividerMode dividerMode; /**< \brief Specifies divided clock properties */
+ uint16 step; /**< \brief Specifies the step value */
+} IfxMsc_Msc_Clock;
+
+/** \brief Downstream Control Configuration Structure
+ */
+typedef struct
+{
+ IfxMsc_TransmissionMode transmissionMode; /**< \brief Specifies the transmission Mode */
+ IfxMsc_DataFrameLength srlDataFrameLength; /**< \brief Specifies the Number of SRL bits shifted at data frames */
+ IfxMsc_DataFrameLength srhDataFrameLength; /**< \brief Specifies the Number of SRH bits shifted at data frames */
+ IfxMsc_ActivePhaseSelection srlActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
+ IfxMsc_ActivePhaseSelection srhActivePhaseSelection; /**< \brief Specifies the Enable SRL active phase selection bit */
+ IfxMsc_CommandFrameLength commandFrameLength; /**< \brief Specifies the Number of bits shifted at command frames */
+ IfxMsc_DataFramePassivePhaseLength dataFramePassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Data Frames */
+ IfxMsc_PassiveTimeFrameCount passiveTimeFrameCount; /**< \brief Specifies the Number of Passive Time Frames */
+ IfxMsc_ExternalSignalInjection externalSignalInjectionPin0; /**< \brief Specifies the Injection Enable Pin 0 */
+ IfxMsc_ExternalBitInjectionPosition injectionPositionPin0; /**< \brief Specifies the Injection Position Pin 0 */
+ IfxMsc_ExternalSignalInjection externalSignalInjectionPin1; /**< \brief Specifies the Injection Enable Pin 1 */
+ IfxMsc_ExternalBitInjectionPosition injectionPositionPin1; /**< \brief Specifies the Injection Position Pin 1 */
+ IfxMsc_CommandDataCommandRepetitionMode commandDataCommandReceptionMode; /**< \brief Specifies the Command-Data-Command in Data Repetition Mode */
+ uint32 downstreamDataSourcesLow; /**< \brief Specifies the Downstream Data Source selections Low */
+ uint32 downstreamDataSourcesHigh; /**< \brief Specifies the Downstream Data Source selections High */
+ uint32 emergencyStopEnableBits; /**< \brief Emergency Stop */
+} IfxMsc_Msc_DownstreamControlConfig;
+
+/** \brief Downstream Control Extension Configuration Structure
+ */
+typedef struct
+{
+ IfxMsc_Extension extension; /**< \brief Specifies the Extension Enable */
+ IfxMsc_MsbBitDataExtension srlBitsShiftedAtDataFramesExtension; /**< \brief Specifies the Number of SRLE bits shifted at Data Frames */
+ IfxMsc_MsbBitDataExtension srhBitsShiftedAtDataFramesExtension; /**< \brief Specifies the Number of SRHE bits shifted at Data Frames */
+ uint32 downstreamExtensionDataSourcesLow; /**< \brief Specifies the Downstream Select Data Source Low Extension */
+ uint32 downstreamExtensionDataSourcesHigh; /**< \brief Specifies the Downstream Select Data Source High Extension */
+ uint32 emergencyStopExtensionEnableBits; /**< \brief Emergency Stop Extension */
+ IfxMsc_DataFrameExtensionPassivePhaseLength dataFrameExtensionPassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Data Frames Extension */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength controlFrameExtensionPassivePhaseLength; /**< \brief Specifies the Passive Phase Length at Control Frames Extension */
+ IfxMsc_NDividerDownstream nDividerDownstream; /**< \brief Specifies the division ratio for downstream generator clock */
+} IfxMsc_Msc_DownstreamControlExtensionConfig;
+
+/** \brief Interrupt Configuration Structure
+ */
+typedef struct
+{
+ IfxMsc_DataFrameInterruptNode dataFrameInterruptNode; /**< \brief Specifies the Data Frame Interrupt Node */
+ IfxMsc_DataFrameInterrupt dataFrameInterrupt; /**< \brief Specifies the Data Frame Interrupt Mode */
+ IfxMsc_CommandFrameInterruptNode commandFrameInterruptNode; /**< \brief Specifies the Command Frame Interrupt Node */
+ IfxMsc_CommandFrameInterrupt commandFrameInterrupt; /**< \brief Specifies the Command Frame Interrupt Mode */
+ IfxMsc_TimeFrameInterruptNode timeFrameInterruptNode; /**< \brief Specifies the Time Frame Interrupt Node */
+ IfxMsc_TimeFrameInterrupt timeFrameInterrupt; /**< \brief Specifies the Time Frame Interrupt Mode */
+ IfxMsc_ReceiveDataInterruptNode receiveDataInterruptNode; /**< \brief Specifies the Receive Interrupt Node */
+ IfxMsc_ReceiveDataInterrupt receiveDataInterrupt; /**< \brief Specifies the Receive Interrupt Mode */
+ IfxMsc_UpstreamTimeoutInterruptNode upstreamTimeoutInterruptNode; /**< \brief Specifies the Upstream Timeout Interrupt Node */
+ IfxMsc_UpstreamTimeoutInterrupt upstreamTimeoutInterrupt; /**< \brief Specifies the Upstream Timeout Interrupt Mode */
+ IfxMsc_OverflowInterruptNode overflowInterruptNode; /**< \brief Specifies the ABRA Overflow Interrupt Node */
+ IfxMsc_OverflowInterrupt overflowInterrupt; /**< \brief Specifies the ABRA Overflow Interrupt Mode */
+ IfxMsc_UnderflowInterruptNode underflowInterruptNode; /**< \brief Specifies the ABRA Underflow Interrupt Node */
+ IfxMsc_UnderflowInterrupt underflowInterrupt; /**< \brief Specifies the ABRA Underflow Interrupt Mode */
+} IfxMsc_Msc_InterruptConfig;
+
+/** \brief MSC Pin Configuration Structure
+ */
+typedef struct
+{
+ IfxMsc_Msc_fclp fclp;
+ IfxMsc_Msc_fcln fcln;
+ IfxMsc_Msc_sop sop;
+ IfxMsc_Msc_son son;
+ IfxMsc_Msc_en en0;
+ IfxMsc_Msc_en en1;
+ IfxMsc_Msc_en en2;
+ IfxMsc_Msc_en en3;
+ IfxMsc_Msc_sdi sdi;
+ IfxMsc_Msc_inj0 inj0;
+ IfxMsc_Msc_inj1 inj1;
+ IfxPort_PadDriver pinDriver;
+} IfxMsc_Msc_Io;
+
+/** \brief Output Control Configuration Structure
+ */
+typedef struct
+{
+ IfxMsc_FclLinePolarity fclpPolarity; /**< \brief Specifies the FCLP Polarity */
+ IfxMsc_SoLinePolarity sopPolarity; /**< \brief Specifies the SLP Polarity */
+ IfxMsc_ChipSelectActiveState cslpPolarity; /**< \brief Specifies the CSLP Polarity */
+ IfxMsc_SdiLinePolarity sdiLinePolarity; /**< \brief Specifies the ILP Polarity */
+ IfxMsc_FclClockControlEnabled fclClockControl; /**< \brief Specifies the CLKCTRL Polarity */
+} IfxMsc_Msc_OutputControlConfig;
+
+/** \brief Upstream Control Configuration Structure
+ */
+typedef struct
+{
+ IfxMsc_UpstreamChannelFrameType upstreamChannelFrameType; /**< \brief Specifies the Upstream Channel Frame Type */
+ IfxMsc_UpstreamChannelReceivingRate upstreamChannelReceivingRate; /**< \brief Specifies the Upstream Channel Receiving Rate */
+ IfxMsc_Parity parity; /**< \brief Specifies the Parity Mode */
+ IfxMsc_ServiceRequestDelay serviceRequestDelay; /**< \brief Specifies the Service Request Delay */
+ IfxMsc_UpstreamTimeoutPrescaler upstreamTimeoutPrescaler; /**< \brief Specifies the Upstream Timeout Prescaler */
+ IfxMsc_UpstreamTimeoutValue upstreamTimeoutValue; /**< \brief Specifies the Upstream Timeout Value */
+} IfxMsc_Msc_UpstreamStatusConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Msc_Data_Structures
+ * \{ */
+/** \brief MSC base address data Structure
+ */
+typedef struct
+{
+ Ifx_MSC *msc; /**< \brief Specifies the pointer to the MSC registers */
+} IfxMsc_Msc;
+
+/** \brief MSC Module Configuration Structure
+ */
+typedef struct
+{
+ Ifx_MSC *msc; /**< \brief Specifies the pointer to the MSC registers */
+ IfxMsc_Msc_Clock clockConfig; /**< \brief Specifies the Clock configuration */
+ IfxMsc_Msc_UpstreamStatusConfig upstreamConfig; /**< \brief Specifies the Upstream configuration */
+ IfxMsc_Msc_InterruptConfig interruptConfig; /**< \brief Specifies the Interrupt configuration */
+ IfxMsc_Msc_OutputControlConfig outputControlConfig; /**< \brief Specifies the Output Control configuration */
+ IfxMsc_Msc_DownstreamControlConfig downstreamConfig; /**< \brief Specifies the Downstream configuration */
+ IfxMsc_Msc_DownstreamControlExtensionConfig downstreamExtensionConfig; /**< \brief Specifies the Downstream Extension configuration */
+ IfxMsc_Msc_Abra abraConfig; /**< \brief Specifies the ABRA configuration */
+ IfxMsc_Target target[IFXMSC_NUM_ENABLE_SELECT_LINES]; /**< \brief Specifies the Downstream targets */
+ IfxMsc_Msc_Io io; /**< \brief Specifies the IO Pin configuration */
+} IfxMsc_Msc_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Msc_Module_Initialize_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief de-initialize MSC module
+ * \param msc pointer to the MSC module handle
+ * \return None
+ *
+ * \code
+ * IfxMsc_Msc_deInitModule(&msc);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxMsc_Msc_deInitModule(IfxMsc_Msc *msc);
+
+/** \brief initialize the MSC module
+ * \param msc pointer to the MSC module handle
+ * \param config pointer to the MSC module configuration
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
+ *
+ */
+IFX_EXTERN void IfxMsc_Msc_initModule(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
+
+/** \brief initialize the MSC module configuration
+ * \param config pointer to the MSC configuration
+ * \param msc pointer to the MSC registers
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
+ *
+ */
+IFX_EXTERN void IfxMsc_Msc_initModuleConfig(IfxMsc_Msc_Config *config, Ifx_MSC *msc);
+
+/** \brief initialize the ABRA block
+ * \param msc pointer to the MSC module handle
+ * \param config pointer to the MSC module configuration
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_Msc_initializeAbra(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
+
+/** \brief initialize the MSC data extension block for 64bit operation
+ * \param msc pointer to the MSC module handle
+ * \param config pointer to the MSC module configuration
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_Msc_initializeDataExtension(IfxMsc_Msc *msc, const IfxMsc_Msc_Config *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Msc_Send_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief send downstream command
+ * \param msc pointer to the MSC module handle
+ * \param command transmit command
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_Msc_sendCommand(IfxMsc_Msc *msc, uint32 command);
+
+/** \brief send complete downstream data, both high and low
+ * \param msc pointer to the MSC module handle
+ * \param dataLow low data to be transmitted
+ * \param dataHigh high data to be transmitted
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Msc_Msc_Usage
+ *
+ */
+IFX_EXTERN void IfxMsc_Msc_sendData(IfxMsc_Msc *msc, uint16 dataLow, uint16 dataHigh);
+
+/** \brief Send downstream data extension (64bit)
+ * \param msc pointer to the MSC module handle
+ * \param data Data to send
+ * \param dataExtension Data extension to send
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_Msc_sendDataExtension(IfxMsc_Msc *msc, uint32 data, uint32 dataExtension);
+
+/** \brief send high downstream data
+ * \param msc pointer to the MSC module handle
+ * \param data high downstream data to be transmitted
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_Msc_sendDataHigh(IfxMsc_Msc *msc, uint16 data);
+
+/** \brief send high downstream data
+ * \param msc pointer to the MSC module handle
+ * \param data low downstream data to be transmitted
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_Msc_sendDataLow(IfxMsc_Msc *msc, uint16 data);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Msc_Receive_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief receive upstream data
+ * \param msc pointer to the MSC module handle
+ * \param upstreamIdx index of the upstream data register
+ * \return data
+ */
+IFX_EXTERN uint32 IfxMsc_Msc_receiveData(IfxMsc_Msc *msc, uint8 upstreamIdx);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Msc_Target_Read_Write_Functions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief get the target during high and low phase
+ * \param msc pointer to the MSC module handle
+ * \param target low phase target or high phase target
+ * \return selected target
+ */
+IFX_EXTERN IfxMsc_Target IfxMsc_Msc_getTarget(IfxMsc_Msc *msc, IfxMsc_Msc_Target target);
+
+/** \brief set the command for target
+ * \param msc pointer to the MSC module handle
+ * \param enX enX target to be selected
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_Msc_setCommandTarget(IfxMsc_Msc *msc, IfxMsc_Target enX);
+
+/** \brief set the target data to be transmitted during low and high phase
+ * \param msc pointer to the MSC module handle
+ * \param enXHigh high target to be selected
+ * \param enXLow low target to be selected
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_Msc_setDataTarget(IfxMsc_Msc *msc, IfxMsc_Target enXHigh, IfxMsc_Target enXLow);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \param msc pointer to the MSC module handle
+ * \return None
+ */
+IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc);
+
+/**
+ * \param msc pointer to the MSC module handle
+ * \return status of the active data frame
+ */
+IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc);
+
+/**
+ * \param msc pointer to the MSC module handle
+ * \return status of the data frame interrupt
+ */
+IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxMsc_Msc_clearDataFrameInterrupt(IfxMsc_Msc *msc)
+{
+ IfxMsc_clearDataFrameInterruptFlag(msc->msc);
+}
+
+
+IFX_INLINE boolean IfxMsc_Msc_getActiveDataFrameStatus(IfxMsc_Msc *msc)
+{
+ return IfxMsc_getActiveDataFrameStatus(msc->msc);
+}
+
+
+IFX_INLINE boolean IfxMsc_Msc_getDataFrameInterruptStatus(IfxMsc_Msc *msc)
+{
+ return IfxMsc_getDataFrameInterruptFlag(msc->msc);
+}
+
+
+#endif /* IFXMSC_MSC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Std/IfxMsc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Std/IfxMsc.c
new file mode 100644
index 0000000..23d7436
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Std/IfxMsc.c
@@ -0,0 +1,252 @@
+/**
+ * \file IfxMsc.c
+ * \brief MSC basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxMsc.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc)
+{
+ /* Data Frame Interrupt Clear */
+ msc->ISC.B.CDEDI = 1;
+}
+
+
+void IfxMsc_clearReset(Ifx_MSC *msc)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ if (msc->KRST0.B.RSTSTAT == 1)
+ {
+ msc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ }
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxMsc_disableModule(Ifx_MSC *msc)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ /* Disable module */
+ msc->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud)
+{
+ uint32 fsys = IfxScuCcu_getSpbFrequency();
+ uint32 ndd = 0;
+
+ /* DSTE.NDD = fsys / 2*BR */
+
+ ndd = fsys / (2 * baud);
+
+ return ndd - 1;
+}
+
+
+uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
+{
+ IFX_UNUSED_PARAMETER(msc);
+
+ float32 fsys = IfxScuCcu_getSpbFrequency();
+ uint64 step = 0;
+
+ step = (uint64)((uint64)(2 * baud * 1024)) / fsys;
+
+ return step;
+}
+
+
+uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
+{
+ IFX_UNUSED_PARAMETER(msc);
+
+ float32 fsys = IfxScuCcu_getSpbFrequency();
+ uint32 step = 0;
+
+ /* FDR.STEP = 1024 - fsys / (2*BR) */
+
+ step = 1024 - (fsys / (2 * baud));
+
+ return step;
+}
+
+
+void IfxMsc_enableModule(Ifx_MSC *msc)
+{
+ /* Disable module disable bit */
+ msc->CLC.U = 0;
+}
+
+
+boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc)
+{
+ return msc->DSS.B.DFA;
+}
+
+
+Ifx_MSC *IfxMsc_getAddress(IfxMsc_Index msc)
+{
+ Ifx_MSC *module;
+
+ if (msc < IFXMSC_NUM_MODULES)
+ {
+ module = (Ifx_MSC *)IfxMsc_cfg_indexMap[msc].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
+
+
+boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc)
+{
+ boolean flag = 0;
+
+ flag = msc->ISR.B.DEDI;
+
+ return flag;
+}
+
+
+IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc)
+{
+ uint32 index;
+ IfxMsc_Index result;
+
+ result = IfxMsc_Index_none;
+
+ for (index = 0; index < IFXMSC_NUM_MODULES; index++)
+ {
+ if (IfxMsc_cfg_indexMap[index].module == msc)
+ {
+ result = (IfxMsc_Index)IfxMsc_cfg_indexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+void IfxMsc_resetModule(Ifx_MSC *msc)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ /* Reset kernel */
+ msc->KRST1.B.RST = 1;
+ msc->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+
+ while (msc->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
+
+ {}
+
+ /* TODO Check if CLC enable is required */
+ //msc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud)
+{
+ float32 fsys = IfxScuCcu_getSpbFrequency();
+ uint64 step = 0;
+ uint32 df = 1;
+
+ /* FDR.STEP = DF*BR*1024 / fsys */
+
+ if (msc->USR.B.URR != 0)
+ {
+ df = 1 << (msc->USR.B.URR + 1);
+ }
+ else
+ {
+ df = 0;
+ }
+
+ step = (uint64)((uint64)((df * baud) * 1024)) / fsys;
+
+ return step;
+}
+
+
+uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud)
+{
+ float32 fsys = IfxScuCcu_getSpbFrequency();
+ uint32 step = 0;
+ uint32 df = 1;
+
+ /* FDR.STEP = 1024 - fsys / DF*BR */
+
+ if (msc->USR.B.URR != 0)
+ {
+ df = 1 << (msc->USR.B.URR + 1);
+ }
+ else
+ {
+ df = 0;
+ }
+
+ step = 1024 - (fsys / (df * baud));
+
+ return step;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Std/IfxMsc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Std/IfxMsc.h
new file mode 100644
index 0000000..a42a0e3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Std/IfxMsc.h
@@ -0,0 +1,1778 @@
+/**
+ * \file IfxMsc.h
+ * \brief MSC basic functionality
+ * \ingroup IfxLld_Msc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Msc_Std_Enum Enumerations
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_Config_Flags Configure Flags
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_Set_Command_Target Set Command Target
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_Set_Data Set Data
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_Get_Data Get Data
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_Enable_Module Enable Module
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_Reset_Module Reset Module
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_Baud_Calculator Baud Calculator
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_IO IO Pin Configuration Functions
+ * \ingroup IfxLld_Msc_Std
+ * \defgroup IfxLld_Msc_Std_Module Module Functions
+ * \ingroup IfxLld_Msc_Std
+ */
+
+#ifndef IFXMSC_H
+#define IFXMSC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxMsc_cfg.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "_PinMap/IfxMsc_PinMap.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Msc_Std_Enum
+ * \{ */
+/** \brief Enable SRL/SRH Active Phase Selection Bit\n
+ * Definition in Ifx_MSC.DSC.B.ENSELH and Ifx_MSC.DSC.B.ENSELL
+ */
+typedef enum
+{
+ IfxMsc_ActivePhaseSelection_none = 0, /**< \brief No selection bit inserted */
+ IfxMsc_ActivePhaseSelection_lowLevel = 1 /**< \brief Low level selection bit inserted */
+} IfxMsc_ActivePhaseSelection;
+
+/** \brief Asynchronous Block Configuration Register - Asynchronous Block Bypass\n
+ * Definition in Ifx_MSC.ABC.B.ABB
+ */
+typedef enum
+{
+ IfxMsc_AsynchronousBlock_bypassed = 0, /**< \brief Asynchronous block and the n-divider of the MSC downstream path are bypassed and are disabled */
+ IfxMsc_AsynchronousBlock_noBypassed = 1 /**< \brief Asynchronous block and the n-divider of the MSC downstream path are active */
+} IfxMsc_AsynchronousBlock;
+
+/** \brief Output Control Register - Chip Selection Line Polarity\n
+ * Definition in Ifx_MSC.OCR.B.CSLP
+ */
+typedef enum
+{
+ IfxMsc_ChipSelectActiveState_high = 0, /**< \brief EN[3:0] and ENL,ENH,ENC polarities are identical */
+ IfxMsc_ChipSelectActiveState_low = 1 /**< \brief EN[3:0] and ENL,ENH,ENC polarities are inverted */
+} IfxMsc_ChipSelectActiveState;
+
+/** \brief Asynchronous Block Configuration Register - Clock Select\n
+ * Definition in Ifx_MSC.ABC.B.CLKSEL
+ */
+typedef enum
+{
+ IfxMsc_ClockSelect_noClock = 0, /**< \brief no clock source for the ABRA block */
+ IfxMsc_ClockSelect_fspb = 1, /**< \brief f_SPB is the clock source for the ABRA block */
+ IfxMsc_ClockSelect_fsri = 2, /**< \brief f_SRI is the clock source for the ABRA block */
+ IfxMsc_ClockSelect_feray = 4 /**< \brief f_ERAY is the clock source for the ABRA block */
+} IfxMsc_ClockSelect;
+
+/** \brief Downstream Control Enhanced Register - Command-Data-Command in Data Repetition Mode\n
+ * Definition in Ifx_MSC.DSCE.B.CDCM
+ */
+typedef enum
+{
+ IfxMsc_CommandDataCommandRepetitionMode_disabled = 0, /**< \brief Disables the automatic insertion of data */
+ IfxMsc_CommandDataCommandRepetitionMode_enabled = 1 /**< \brief Enables the automatic insertion of data */
+} IfxMsc_CommandDataCommandRepetitionMode;
+
+/** \brief Interrupt Control Register - Command Frame Interrupt Enable\n
+ * Definition in Ifx_MSC.ICR.B.ECIE
+ */
+typedef enum
+{
+ IfxMsc_CommandFrameInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
+ IfxMsc_CommandFrameInterrupt_enabled = 1 /**< \brief Interrupt generation enabled */
+} IfxMsc_CommandFrameInterrupt;
+
+/** \brief Interrupt Control Register - Command Frame Interrupt Node Pointer\n
+ * Definition in Ifx_MSC.ICR.B.ECIP
+ */
+typedef enum
+{
+ IfxMsc_CommandFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
+ IfxMsc_CommandFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
+ IfxMsc_CommandFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
+ IfxMsc_CommandFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
+} IfxMsc_CommandFrameInterruptNode;
+
+/** \brief Number of Bits shifted at command frames\n
+ * Definition in Ifx_MSC.DSC.B.NBC
+ */
+typedef enum
+{
+ IfxMsc_CommandFrameLength_0 = 0, /**< \brief No bit shifted */
+ IfxMsc_CommandFrameLength_1 = 1, /**< \brief SRL[0] Shifted */
+ IfxMsc_CommandFrameLength_2 = 2, /**< \brief SRL[1:0] Shifted */
+ IfxMsc_CommandFrameLength_3, /**< \brief SRL[2:0] Shifted */
+ IfxMsc_CommandFrameLength_4, /**< \brief SRL[3:0] Shifted */
+ IfxMsc_CommandFrameLength_5, /**< \brief SRL[4:0] Shifted */
+ IfxMsc_CommandFrameLength_6, /**< \brief SRL[5:0] Shifted */
+ IfxMsc_CommandFrameLength_7, /**< \brief SRL[6:0] Shifted */
+ IfxMsc_CommandFrameLength_8, /**< \brief SRL[7:0] Shifted */
+ IfxMsc_CommandFrameLength_9, /**< \brief SRL[8:0] Shifted */
+ IfxMsc_CommandFrameLength_10, /**< \brief SRL[9:0] Shifted */
+ IfxMsc_CommandFrameLength_11, /**< \brief SRL[10:0] Shifted */
+ IfxMsc_CommandFrameLength_12, /**< \brief SRL[11:0] Shifted */
+ IfxMsc_CommandFrameLength_13, /**< \brief SRL[12:0] Shifted */
+ IfxMsc_CommandFrameLength_14, /**< \brief SRL[13:0] Shifted */
+ IfxMsc_CommandFrameLength_15, /**< \brief SRL[14:0] Shifted */
+ IfxMsc_CommandFrameLength_16, /**< \brief SRL[15:0] Shifted */
+ IfxMsc_CommandFrameLength_17 = 17, /**< \brief SRL[15:0] and SRH[0] Shifted */
+ IfxMsc_CommandFrameLength_18 = 18, /**< \brief SRL[15:0] and SRH[1:0] Shifted */
+ IfxMsc_CommandFrameLength_19, /**< \brief SRL[15:0] and SRH[2:0] Shifted */
+ IfxMsc_CommandFrameLength_20, /**< \brief SRL[15:0] and SRH[3:0] Shifted */
+ IfxMsc_CommandFrameLength_21, /**< \brief SRL[15:0] and SRH[4:0] Shifted */
+ IfxMsc_CommandFrameLength_22, /**< \brief SRL[15:0] and SRH[5:0] Shifted */
+ IfxMsc_CommandFrameLength_23, /**< \brief SRL[15:0] and SRH[6:0] Shifted */
+ IfxMsc_CommandFrameLength_24, /**< \brief SRL[15:0] and SRH[7:0] Shifted */
+ IfxMsc_CommandFrameLength_25, /**< \brief SRL[15:0] and SRH[8:0] Shifted */
+ IfxMsc_CommandFrameLength_26, /**< \brief SRL[15:0] and SRH[9:0] Shifted */
+ IfxMsc_CommandFrameLength_27, /**< \brief SRL[15:0] and SRH[10:0] Shifted */
+ IfxMsc_CommandFrameLength_28, /**< \brief SRL[15:0] and SRH[11:0] Shifted */
+ IfxMsc_CommandFrameLength_29, /**< \brief SRL[15:0] and SRH[12:0] Shifted */
+ IfxMsc_CommandFrameLength_30, /**< \brief SRL[15:0] and SRH[13:0] Shifted */
+ IfxMsc_CommandFrameLength_31, /**< \brief SRL[15:0] and SRH[14:0] Shifted */
+ IfxMsc_CommandFrameLength_32 /**< \brief SRL[15:0] and SRH[15:0] Shifted */
+} IfxMsc_CommandFrameLength;
+
+/** \brief Downstream Timing Extension Register - Passive Phase Length at Control Frames Extension\n
+ * Definition in Ifx_MSC.DSTE.B.PPCE
+ */
+typedef enum
+{
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_0 = 0, /**< \brief Length of Command frames passive phase is 2 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_1, /**< \brief Length of Command frames passive phase is 3 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_2, /**< \brief Length of Command frames passive phase is 4 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_3, /**< \brief Length of Command frames passive phase is 5 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_4, /**< \brief Length of Command frames passive phase is 6 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_5, /**< \brief Length of Command frames passive phase is 7 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_6, /**< \brief Length of Command frames passive phase is 8 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_7, /**< \brief Length of Command frames passive phase is 9 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_8, /**< \brief Length of Command frames passive phase is 10 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_9, /**< \brief Length of Command frames passive phase is 11 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_10, /**< \brief Length of Command frames passive phase is 12 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_11, /**< \brief Length of Command frames passive phase is 13 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_12, /**< \brief Length of Command frames passive phase is 14 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_13, /**< \brief Length of Command frames passive phase is 15 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_14, /**< \brief Length of Command frames passive phase is 16 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_15, /**< \brief Length of Command frames passive phase is 17 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_16, /**< \brief Length of Command frames passive phase is 18 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_17, /**< \brief Length of Command frames passive phase is 19 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_18, /**< \brief Length of Command frames passive phase is 20 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_19, /**< \brief Length of Command frames passive phase is 21 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_20, /**< \brief Length of Command frames passive phase is 22 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_21, /**< \brief Length of Command frames passive phase is 23 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_22, /**< \brief Length of Command frames passive phase is 24 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_23, /**< \brief Length of Command frames passive phase is 25 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_24, /**< \brief Length of Command frames passive phase is 26 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_25, /**< \brief Length of Command frames passive phase is 27 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_26, /**< \brief Length of Command frames passive phase is 28 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_27, /**< \brief Length of Command frames passive phase is 29 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_28, /**< \brief Length of Command frames passive phase is 30 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_29, /**< \brief Length of Command frames passive phase is 31 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_30, /**< \brief Length of Command frames passive phase is 32 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_31, /**< \brief Length of Command frames passive phase is 33 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_32, /**< \brief Length of Command frames passive phase is 34 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_33, /**< \brief Length of Command frames passive phase is 35 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_34, /**< \brief Length of Command frames passive phase is 36 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_35, /**< \brief Length of Command frames passive phase is 37 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_36, /**< \brief Length of Command frames passive phase is 38 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_37, /**< \brief Length of Command frames passive phase is 39 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_38, /**< \brief Length of Command frames passive phase is 40 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_39, /**< \brief Length of Command frames passive phase is 41 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_40, /**< \brief Length of Command frames passive phase is 42 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_41, /**< \brief Length of Command frames passive phase is 43 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_42, /**< \brief Length of Command frames passive phase is 44 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_43, /**< \brief Length of Command frames passive phase is 45 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_44, /**< \brief Length of Command frames passive phase is 46 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_45, /**< \brief Length of Command frames passive phase is 47 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_46, /**< \brief Length of Command frames passive phase is 48 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_47, /**< \brief Length of Command frames passive phase is 49 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_48, /**< \brief Length of Command frames passive phase is 50 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_49, /**< \brief Length of Command frames passive phase is 51 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_50, /**< \brief Length of Command frames passive phase is 52 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_51, /**< \brief Length of Command frames passive phase is 53 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_52, /**< \brief Length of Command frames passive phase is 54 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_53, /**< \brief Length of Command frames passive phase is 55 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_54, /**< \brief Length of Command frames passive phase is 56 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_55, /**< \brief Length of Command frames passive phase is 57 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_56, /**< \brief Length of Command frames passive phase is 58 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_57, /**< \brief Length of Command frames passive phase is 59 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_58, /**< \brief Length of Command frames passive phase is 60 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_59, /**< \brief Length of Command frames passive phase is 61 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_60, /**< \brief Length of Command frames passive phase is 62 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_61, /**< \brief Length of Command frames passive phase is 63 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_62, /**< \brief Length of Command frames passive phase is 64 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_63, /**< \brief Length of Command frames passive phase is 65 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_64, /**< \brief Length of Command frames passive phase is 66 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_65, /**< \brief Length of Command frames passive phase is 67 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_66, /**< \brief Length of Command frames passive phase is 68 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_67, /**< \brief Length of Command frames passive phase is 69 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_68, /**< \brief Length of Command frames passive phase is 70 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_69, /**< \brief Length of Command frames passive phase is 71 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_70, /**< \brief Length of Command frames passive phase is 72 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_71, /**< \brief Length of Command frames passive phase is 73 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_72, /**< \brief Length of Command frames passive phase is 74 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_73, /**< \brief Length of Command frames passive phase is 75 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_74, /**< \brief Length of Command frames passive phase is 76 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_75, /**< \brief Length of Command frames passive phase is 77 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_76, /**< \brief Length of Command frames passive phase is 78 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_77, /**< \brief Length of Command frames passive phase is 79 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_78, /**< \brief Length of Command frames passive phase is 80 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_79, /**< \brief Length of Command frames passive phase is 81 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_80, /**< \brief Length of Command frames passive phase is 82 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_81, /**< \brief Length of Command frames passive phase is 83 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_82, /**< \brief Length of Command frames passive phase is 84 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_83, /**< \brief Length of Command frames passive phase is 85 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_84, /**< \brief Length of Command frames passive phase is 86 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_85, /**< \brief Length of Command frames passive phase is 87 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_86, /**< \brief Length of Command frames passive phase is 88 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_87, /**< \brief Length of Command frames passive phase is 89 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_88, /**< \brief Length of Command frames passive phase is 90 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_89, /**< \brief Length of Command frames passive phase is 91 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_90, /**< \brief Length of Command frames passive phase is 92 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_91, /**< \brief Length of Command frames passive phase is 93 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_92, /**< \brief Length of Command frames passive phase is 94 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_93, /**< \brief Length of Command frames passive phase is 95 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_94, /**< \brief Length of Command frames passive phase is 96 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_95, /**< \brief Length of Command frames passive phase is 97 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_96, /**< \brief Length of Command frames passive phase is 98 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_97, /**< \brief Length of Command frames passive phase is 99 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_98, /**< \brief Length of Command frames passive phase is 100 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_99, /**< \brief Length of Command frames passive phase is 101 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_100, /**< \brief Length of Command frames passive phase is 102 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_101, /**< \brief Length of Command frames passive phase is 103 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_102, /**< \brief Length of Command frames passive phase is 104 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_103, /**< \brief Length of Command frames passive phase is 105 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_104, /**< \brief Length of Command frames passive phase is 106 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_105, /**< \brief Length of Command frames passive phase is 107 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_106, /**< \brief Length of Command frames passive phase is 108 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_107, /**< \brief Length of Command frames passive phase is 109 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_108, /**< \brief Length of Command frames passive phase is 110 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_109, /**< \brief Length of Command frames passive phase is 111 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_110, /**< \brief Length of Command frames passive phase is 112 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_111, /**< \brief Length of Command frames passive phase is 113 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_112, /**< \brief Length of Command frames passive phase is 114 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_113, /**< \brief Length of Command frames passive phase is 115 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_114, /**< \brief Length of Command frames passive phase is 116 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_115, /**< \brief Length of Command frames passive phase is 117 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_116, /**< \brief Length of Command frames passive phase is 118 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_117, /**< \brief Length of Command frames passive phase is 119 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_118, /**< \brief Length of Command frames passive phase is 120 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_119, /**< \brief Length of Command frames passive phase is 121 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_120, /**< \brief Length of Command frames passive phase is 122 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_121, /**< \brief Length of Command frames passive phase is 123 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_122, /**< \brief Length of Command frames passive phase is 124 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_123, /**< \brief Length of Command frames passive phase is 125 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_124, /**< \brief Length of Command frames passive phase is 126 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_125, /**< \brief Length of Command frames passive phase is 127 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_126, /**< \brief Length of Command frames passive phase is 128 */
+ IfxMsc_ControlFrameExtensionPassivePhaseLength_127 /**< \brief Length of Command frames passive phase is 129 */
+} IfxMsc_ControlFrameExtensionPassivePhaseLength;
+
+/** \brief Downstream Timing Extension Register - Passive Phase Length at Data Frames Extension\n
+ * Definition in Ifx_MSC.DSTE.B.PPDE
+ */
+typedef enum
+{
+ IfxMsc_DataFrameExtensionPassivePhaseLength_0 = 0, /**< \brief 0 Additional MSB bits extension of the PPD bit field */
+ IfxMsc_DataFrameExtensionPassivePhaseLength_1, /**< \brief 1 Additional MSB bits extension of the PPD bit field */
+ IfxMsc_DataFrameExtensionPassivePhaseLength_2, /**< \brief 2 Additional MSB bits extension of the PPD bit field */
+ IfxMsc_DataFrameExtensionPassivePhaseLength_3 /**< \brief 3 Additional MSB bits extension of the PPD bit field */
+} IfxMsc_DataFrameExtensionPassivePhaseLength;
+
+/** \brief Interrupt Control Register - Data Frame Interrupt Enable\n
+ * Definition in Ifx_MSC.ICR.B.EDIE
+ */
+typedef enum
+{
+ IfxMsc_DataFrameInterrupt_disabled = 0, /**< \brief Interrupt generation Disable */
+ IfxMsc_DataFrameInterrupt_atLastDataBit = 1, /**< \brief An interrupt is generated when the last data bit has been shifted out */
+ IfxMsc_DataFrameInterrupt_atFirstDataBit = 2 /**< \brief An interrupt is generated when the First data bit has been shifted out */
+} IfxMsc_DataFrameInterrupt;
+
+/** \brief Interrupt Control Register - Data Frame Interrupt Node Pointer\n
+ * Definition in Ifx_MSC.ICR.B.EDIP
+ */
+typedef enum
+{
+ IfxMsc_DataFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
+ IfxMsc_DataFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
+ IfxMsc_DataFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
+ IfxMsc_DataFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
+} IfxMsc_DataFrameInterruptNode;
+
+/** \brief Number of SRx[] (x->SRL/SRH) Bits Shifted at Data Frames\n
+ * Definition in Ifx_MSC.DSC.B.NDBH and Ifx_MSC.DSC.B.NDBL
+ */
+typedef enum
+{
+ IfxMsc_DataFrameLength_0 = 0, /**< \brief No SRx bit shifted */
+ IfxMsc_DataFrameLength_1 = 1, /**< \brief SRx[0] Shifted */
+ IfxMsc_DataFrameLength_2 = 2, /**< \brief SRx[1:0] Shifted */
+ IfxMsc_DataFrameLength_3, /**< \brief SRx[2:0] Shifted */
+ IfxMsc_DataFrameLength_4, /**< \brief SRx[3:0] Shifted */
+ IfxMsc_DataFrameLength_5, /**< \brief SRx[4:0] Shifted */
+ IfxMsc_DataFrameLength_6, /**< \brief SRx[5:0] Shifted */
+ IfxMsc_DataFrameLength_7, /**< \brief SRx[6:0] Shifted */
+ IfxMsc_DataFrameLength_8, /**< \brief SRx[7:0] Shifted */
+ IfxMsc_DataFrameLength_9, /**< \brief SRx[8:0] Shifted */
+ IfxMsc_DataFrameLength_10, /**< \brief SRx[9:0] Shifted */
+ IfxMsc_DataFrameLength_11, /**< \brief SRx[10:0] Shifted */
+ IfxMsc_DataFrameLength_12, /**< \brief SRx[11:0] Shifted */
+ IfxMsc_DataFrameLength_13, /**< \brief SRx[12:0] Shifted */
+ IfxMsc_DataFrameLength_14, /**< \brief SRx[13:0] Shifted */
+ IfxMsc_DataFrameLength_15, /**< \brief SRx[14:0] Shifted */
+ IfxMsc_DataFrameLength_16 /**< \brief SRx[15:0] Shifted */
+} IfxMsc_DataFrameLength;
+
+/** \brief Passive Phase Length at Data Frames\n
+ * Definition in Ifx_MSC.DSC.B.PPD
+ */
+typedef enum
+{
+ IfxMsc_DataFramePassivePhaseLength_2 = 2, /**< \brief Passive phase length is 2 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_3, /**< \brief Passive phase length is 3 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_4, /**< \brief Passive phase length is 4 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_5, /**< \brief Passive phase length is 5 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_6, /**< \brief Passive phase length is 6 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_7, /**< \brief Passive phase length is 7 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_8, /**< \brief Passive phase length is 8 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_9, /**< \brief Passive phase length is 9 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_10, /**< \brief Passive phase length is 10 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_11, /**< \brief Passive phase length is 11 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_12, /**< \brief Passive phase length is 12 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_13, /**< \brief Passive phase length is 13 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_14, /**< \brief Passive phase length is 14 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_15, /**< \brief Passive phase length is 15 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_16, /**< \brief Passive phase length is 16 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_17, /**< \brief Passive phase length is 17 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_18, /**< \brief Passive phase length is 18 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_19, /**< \brief Passive phase length is 19 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_20, /**< \brief Passive phase length is 20 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_21, /**< \brief Passive phase length is 21 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_22, /**< \brief Passive phase length is 22 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_23, /**< \brief Passive phase length is 23 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_24, /**< \brief Passive phase length is 24 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_25, /**< \brief Passive phase length is 25 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_26, /**< \brief Passive phase length is 26 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_27, /**< \brief Passive phase length is 27 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_28, /**< \brief Passive phase length is 28 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_29, /**< \brief Passive phase length is 29 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_30, /**< \brief Passive phase length is 30 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_31, /**< \brief Passive phase length is 31 tFCL */
+ IfxMsc_DataFramePassivePhaseLength_32 /**< \brief Passive phase length is 32 tFCL */
+} IfxMsc_DataFramePassivePhaseLength;
+
+/** \brief Divider mode
+ */
+typedef enum
+{
+ IfxMsc_DividerMode_normal = 1, /**< \brief divider mode is normal */
+ IfxMsc_DividerMode_fractional = 2 /**< \brief divider mode is fractional */
+} IfxMsc_DividerMode;
+
+/** \brief Emergency Stop Register - Emergency stop feature Enable or Disable - SRL and SRH\n
+ * Definition in Ifx_MSC.ESR
+ */
+typedef enum
+{
+ IfxMsc_EmergencyStop_disabled = 0, /**< \brief Emergency stop feature for SRx bit is Disabled */
+ IfxMsc_EmergencyStop_enabled = 1 /**< \brief Emergency stop feature for SRx bit is Enabled */
+} IfxMsc_EmergencyStop;
+
+/** \brief Downstream Control Enhanced Register - Extension Enable\n
+ * Definition in Ifx_MSC.DSCE.B.NDBLE
+ */
+typedef enum
+{
+ IfxMsc_Extension_disabled = 0, /**< \brief Disables the extension bit fields */
+ IfxMsc_Extension_enabled = 1 /**< \brief Enables the extension bit fields */
+} IfxMsc_Extension;
+
+/** \brief Downstream Control Enhanced Register - Injection Position of the Pin 0 and 1 Signal\n
+ * Definition in Ifx_MSC.DSCE.B.INJPOSP0 and Ifx_MSC.DSCE.B.INJPOSP1
+ */
+typedef enum
+{
+ IfxMsc_ExternalBitInjectionPosition_0 = 0, /**< \brief Injected external bit is at Position 0 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_1, /**< \brief Injected external bit is at Position 1 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_2, /**< \brief Injected external bit is at Position 2 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_3, /**< \brief Injected external bit is at Position 3 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_4, /**< \brief Injected external bit is at Position 4 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_5, /**< \brief Injected external bit is at Position 5 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_6, /**< \brief Injected external bit is at Position 6 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_7, /**< \brief Injected external bit is at Position 7 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_8, /**< \brief Injected external bit is at Position 8 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_9, /**< \brief Injected external bit is at Position 9 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_10, /**< \brief Injected external bit is at Position 10 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_11, /**< \brief Injected external bit is at Position 11 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_12, /**< \brief Injected external bit is at Position 12 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_13, /**< \brief Injected external bit is at Position 13 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_14, /**< \brief Injected external bit is at Position 14 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_15, /**< \brief Injected external bit is at Position 15 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_16, /**< \brief Injected external bit is at Position 16 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_17, /**< \brief Injected external bit is at Position 17 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_18, /**< \brief Injected external bit is at Position 18 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_19, /**< \brief Injected external bit is at Position 19 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_20, /**< \brief Injected external bit is at Position 20 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_21, /**< \brief Injected external bit is at Position 21 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_22, /**< \brief Injected external bit is at Position 22 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_23, /**< \brief Injected external bit is at Position 23 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_24, /**< \brief Injected external bit is at Position 24 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_25, /**< \brief Injected external bit is at Position 25 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_26, /**< \brief Injected external bit is at Position 26 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_27, /**< \brief Injected external bit is at Position 27 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_28, /**< \brief Injected external bit is at Position 28 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_29, /**< \brief Injected external bit is at Position 29 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_30, /**< \brief Injected external bit is at Position 30 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_31, /**< \brief Injected external bit is at Position 31 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_32, /**< \brief Injected external bit is at Position 32 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_33, /**< \brief Injected external bit is at Position 33 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_34, /**< \brief Injected external bit is at Position 34 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_35, /**< \brief Injected external bit is at Position 35 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_36, /**< \brief Injected external bit is at Position 36 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_37, /**< \brief Injected external bit is at Position 37 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_38, /**< \brief Injected external bit is at Position 38 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_39, /**< \brief Injected external bit is at Position 39 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_40, /**< \brief Injected external bit is at Position 40 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_41, /**< \brief Injected external bit is at Position 41 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_42, /**< \brief Injected external bit is at Position 42 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_43, /**< \brief Injected external bit is at Position 43 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_44, /**< \brief Injected external bit is at Position 44 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_45, /**< \brief Injected external bit is at Position 45 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_46, /**< \brief Injected external bit is at Position 46 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_47, /**< \brief Injected external bit is at Position 47 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_48, /**< \brief Injected external bit is at Position 48 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_49, /**< \brief Injected external bit is at Position 49 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_50, /**< \brief Injected external bit is at Position 50 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_51, /**< \brief Injected external bit is at Position 51 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_52, /**< \brief Injected external bit is at Position 52 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_53, /**< \brief Injected external bit is at Position 53 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_54, /**< \brief Injected external bit is at Position 54 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_55, /**< \brief Injected external bit is at Position 55 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_56, /**< \brief Injected external bit is at Position 56 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_57, /**< \brief Injected external bit is at Position 57 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_58, /**< \brief Injected external bit is at Position 58 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_59, /**< \brief Injected external bit is at Position 59 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_60, /**< \brief Injected external bit is at Position 60 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_61, /**< \brief Injected external bit is at Position 61 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_62, /**< \brief Injected external bit is at Position 62 of the data frame */
+ IfxMsc_ExternalBitInjectionPosition_63 /**< \brief Injected external bit is at Position 63 of the data frame */
+} IfxMsc_ExternalBitInjectionPosition;
+
+/** \brief Downstream Control Enhanced Register - Injection Enable of the Pin 0 and 1 Signal\n
+ * Definition in Ifx_MSC.DSCE.B.INJENP0 and Ifx_MSC.DSCE.B.INJENP1
+ */
+typedef enum
+{
+ IfxMsc_ExternalSignalInjection_disabled = 0, /**< \brief Disables the external signal injection in a data frame */
+ IfxMsc_ExternalSignalInjection_enabled = 1 /**< \brief Enables the external signal injection in a data frame */
+} IfxMsc_ExternalSignalInjection;
+
+/** \brief Output Control Register - Clock Control\n
+ * Definition in Ifx_MSC.OCR.B.CLKCTRL
+ */
+typedef enum
+{
+ IfxMsc_FclClockControlEnabled_activePhaseOnly = 0, /**< \brief FCL is active during active phases of data or command frames */
+ IfxMsc_FclClockControlEnabled_always = 1 /**< \brief FCL is always active */
+} IfxMsc_FclClockControlEnabled;
+
+/** \brief Output Control Register - FCLP Line Polarity\n
+ * Definition in Ifx_MSC.OCR.B.CLP
+ */
+typedef enum
+{
+ IfxMsc_FclLinePolarity_nonInverted = 0, /**< \brief FCLP and FCL signal polarity is identical */
+ IfxMsc_FclLinePolarity_inverted = 1 /**< \brief FCLP signal has inverted FCL signal polarity */
+} IfxMsc_FclLinePolarity;
+
+/** \brief Enable hardware clock control
+ */
+typedef enum
+{
+ IfxMsc_HardwareClock_disabled = 0, /**< \brief Hardware clock disable */
+ IfxMsc_HardwareClock_enabled = 1 /**< \brief Hardware clock enable */
+} IfxMsc_HardwareClock;
+
+/** \brief Interrupt Service Request
+ */
+typedef enum
+{
+ IfxMsc_InterruptServiceRequest_0 = 0, /**< \brief Interrupt Service Request number0 */
+ IfxMsc_InterruptServiceRequest_1, /**< \brief Interrupt Service Request number1 */
+ IfxMsc_InterruptServiceRequest_2, /**< \brief Interrupt Service Request number2 */
+ IfxMsc_InterruptServiceRequest_3, /**< \brief Interrupt Service Request number3 */
+ IfxMsc_InterruptServiceRequest_4 /**< \brief Interrupt Service Request number4 */
+} IfxMsc_InterruptServiceRequest;
+
+/** \brief OCDS Control and Status - OCDS Suspend Control
+ * Definition in Ifx_MSC.OCS.B.SUS
+ */
+typedef enum
+{
+ IfxMsc_ModuleSuspendRequestBit_noSuspend = 0, /**< \brief OCDS is not suspended */
+ IfxMsc_ModuleSuspendRequestBit_hardSuspend = 1, /**< \brief OCDS is Hard suspended. Clock is switched off immediately */
+ IfxMsc_ModuleSuspendRequestBit_softSuspend = 2 /**< \brief OCDS is Soft suspended */
+} IfxMsc_ModuleSuspendRequestBit;
+
+/** \brief Downstream Control Enhanced Register - Number of SRL/SRH Bits Shifted at Data Frames Extension (NDBL/NDBH)\n
+ * Definition in Ifx_MSC.DSCE.B.NDBLE and Ifx_MSC.DSCE.B.NDBHE
+ */
+typedef enum
+{
+ IfxMsc_MsbBitDataExtension_notPresent = 0, /**< \brief Additional MSB bit is not present in the extension of the NDBL/NDBH bit field */
+ IfxMsc_MsbBitDataExtension_present = 1 /**< \brief Additional MSB bit is present in the extension of the NDBL/NDBH bit field */
+} IfxMsc_MsbBitDataExtension;
+
+/** \brief Asynchronous Block Configuration Register - N Divider ABRA\n
+ * Definition in Ifx_MSC.ABC.B.NDA
+ */
+typedef enum
+{
+ IfxMsc_NDividerAbra_1 = 0, /**< \brief Division ratio is 1 */
+ IfxMsc_NDividerAbra_2, /**< \brief Division ratio is 2 */
+ IfxMsc_NDividerAbra_3, /**< \brief Division ratio is 3 */
+ IfxMsc_NDividerAbra_4, /**< \brief Division ratio is 4 */
+ IfxMsc_NDividerAbra_5, /**< \brief Division ratio is 5 */
+ IfxMsc_NDividerAbra_6, /**< \brief Division ratio is 6 */
+ IfxMsc_NDividerAbra_7, /**< \brief Division ratio is 7 */
+ IfxMsc_NDividerAbra_8 /**< \brief Division ratio is 8 */
+} IfxMsc_NDividerAbra;
+
+/** \brief Downstream Timing Extension Register - N Divider Downstream\n
+ * Definition in Ifx_MSC.DSTE.B.NDD
+ */
+typedef enum
+{
+ IfxMsc_NDividerDownstream_1 = 0, /**< \brief division ratio is 1 */
+ IfxMsc_NDividerDownstream_2, /**< \brief division ratio is 2 */
+ IfxMsc_NDividerDownstream_3, /**< \brief division ratio is 3 */
+ IfxMsc_NDividerDownstream_4, /**< \brief division ratio is 4 */
+ IfxMsc_NDividerDownstream_5, /**< \brief division ratio is 5 */
+ IfxMsc_NDividerDownstream_6, /**< \brief division ratio is 6 */
+ IfxMsc_NDividerDownstream_7, /**< \brief division ratio is 7 */
+ IfxMsc_NDividerDownstream_8, /**< \brief division ratio is 8 */
+ IfxMsc_NDividerDownstream_9, /**< \brief division ratio is 9 */
+ IfxMsc_NDividerDownstream_10, /**< \brief division ratio is 10 */
+ IfxMsc_NDividerDownstream_11, /**< \brief division ratio is 11 */
+ IfxMsc_NDividerDownstream_12, /**< \brief division ratio is 12 */
+ IfxMsc_NDividerDownstream_13, /**< \brief division ratio is 13 */
+ IfxMsc_NDividerDownstream_14, /**< \brief division ratio is 14 */
+ IfxMsc_NDividerDownstream_15, /**< \brief division ratio is 15 */
+ IfxMsc_NDividerDownstream_16 /**< \brief division ratio is 16 */
+} IfxMsc_NDividerDownstream;
+
+/** \brief Asynchronous Block Configuration Register - Overflow Interrupt Enable\n
+ * Definition in Ifx_MSC.ABC.B.OIE
+ */
+typedef enum
+{
+ IfxMsc_OverflowInterrupt_disabled = 0, /**< \brief Disables the path of the overflow interrupt towards the interrupt node */
+ IfxMsc_OverflowInterrupt_enabled = 1 /**< \brief Enables the path of the overflow interrupt towards the interrupt node */
+} IfxMsc_OverflowInterrupt;
+
+/** \brief Asynchronous Block Configuration Register - Overflow Interrupt Node Pointer\n
+ * Definition in Ifx_MSC.ABC.B.OIP
+ */
+typedef enum
+{
+ IfxMsc_OverflowInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
+ IfxMsc_OverflowInterruptNode_SR1, /**< \brief Service request output SR1 selected */
+ IfxMsc_OverflowInterruptNode_SR2, /**< \brief Service request output SR2 selected */
+ IfxMsc_OverflowInterruptNode_SR3, /**< \brief Service request output SR3 selected */
+ IfxMsc_OverflowInterruptNode_SR4 /**< \brief Service request output SR4 selected */
+} IfxMsc_OverflowInterruptNode;
+
+/** \brief Parity Mode\n
+ * Definition in Ifx_MSC.USR.B.PCT
+ */
+typedef enum
+{
+ IfxMsc_Parity_even = 0, /**< \brief Even Parity */
+ IfxMsc_Parity_odd = 1 /**< \brief Odd Parity */
+} IfxMsc_Parity;
+
+/** \brief Downstream Status Register - Number Of Passive Time Frames\n
+ * Definition in Ifx_MSC.DSS.B.NPTF
+ */
+typedef enum
+{
+ IfxMsc_PassiveTimeFrameCount_0 = 0, /**< \brief No Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_1 = 1, /**< \brief 1 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_2, /**< \brief 2 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_3, /**< \brief 3 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_4, /**< \brief 4 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_5, /**< \brief 5 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_6, /**< \brief 6 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_7, /**< \brief 7 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_8, /**< \brief 8 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_9, /**< \brief 9 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_10, /**< \brief 10 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_11, /**< \brief 11 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_12, /**< \brief 12 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_13, /**< \brief 13 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_14, /**< \brief 14 Passive time frames inserted */
+ IfxMsc_PassiveTimeFrameCount_15 /**< \brief 15 Passive time frames inserted */
+} IfxMsc_PassiveTimeFrameCount;
+
+/** \brief Interrupt Control Register - Receive Data Interrupt Enable\n
+ * Definition in Ifx_MSC.ICR.B.RDIE
+ */
+typedef enum
+{
+ IfxMsc_ReceiveDataInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
+ IfxMsc_ReceiveDataInterrupt_onDataReceive = 1, /**< \brief An interrupt is generated when data is received and written into the upstream data registers */
+ IfxMsc_ReceiveDataInterrupt_onRdieSet = 2, /**< \brief An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H */
+ IfxMsc_ReceiveDataInterrupt_onDataReceiveInUd3 = 3 /**< \brief An interrupt is generated as with RDIE = 01B but only if the received data is not equal to 00H */
+} IfxMsc_ReceiveDataInterrupt;
+
+/** \brief Interrupt Control Register - Receive Data Interrupt Pointer\n
+ * Definition in Ifx_MSC.ICR.B.RDIP
+ */
+typedef enum
+{
+ IfxMsc_ReceiveDataInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
+ IfxMsc_ReceiveDataInterruptNode_SR1, /**< \brief Service request output SR1 selected */
+ IfxMsc_ReceiveDataInterruptNode_SR2, /**< \brief Service request output SR2 selected */
+ IfxMsc_ReceiveDataInterruptNode_SR3 /**< \brief Service request output SR3 selected */
+} IfxMsc_ReceiveDataInterruptNode;
+
+/** \brief Output Control Register - SDI Line Polarity\n
+ * Definition in Ifx_MSC.OCR.B.ILP
+ */
+typedef enum
+{
+ IfxMsc_SdiLinePolarity_likeSi = 0, /**< \brief SDI and SI signal polarities are identical */
+ IfxMsc_SdiLinePolarity_invertedSi = 1 /**< \brief SDI and SI signal polarities are inverted */
+} IfxMsc_SdiLinePolarity;
+
+/** \brief Output Control Register - Serial Data Input Selection\n
+ * Definition in Ifx_MSC.OCR.B.SDISEL
+ */
+typedef enum
+{
+ IfxMsc_SerialDataInput_0 = 0, /**< \brief SDI0 is selected for the SDI of the upstream channel */
+ IfxMsc_SerialDataInput_1, /**< \brief SDI1 is selected for the SDI of the upstream channel */
+ IfxMsc_SerialDataInput_2, /**< \brief SDI2 is selected for the SDI of the upstream channel */
+ IfxMsc_SerialDataInput_3, /**< \brief SDI3 is selected for the SDI of the upstream channel */
+ IfxMsc_SerialDataInput_4, /**< \brief SDI4 is selected for the SDI of the upstream channel */
+ IfxMsc_SerialDataInput_5, /**< \brief SDI5 is selected for the SDI of the upstream channel */
+ IfxMsc_SerialDataInput_6, /**< \brief SDI6 is selected for the SDI of the upstream channel */
+ IfxMsc_SerialDataInput_7 /**< \brief SDI7 is selected for the SDI of the upstream channel */
+} IfxMsc_SerialDataInput;
+
+/** \brief Service Request Delay\n
+ * Definition in Ifx_MSC.USR.B.SRDC
+ */
+typedef enum
+{
+ IfxMsc_ServiceRequestDelay_noDelay = 0, /**< \brief No Delay */
+ IfxMsc_ServiceRequestDelay_1bit = 1 /**< \brief Delay of 1 bit time */
+} IfxMsc_ServiceRequestDelay;
+
+/** \brief Asynchronous Block Configuration Register - Duration of the Low/High Phase of the Shift Clock\n
+ * Definition in Ifx_MSC.ABC.B.LOW and Ifx_MSC.ABC.B.HIGH
+ */
+typedef enum
+{
+ IfxMsc_ShiftClockPhaseDuration_1 = 0, /**< \brief Duration in periods of f_A is 1 */
+ IfxMsc_ShiftClockPhaseDuration_2, /**< \brief Duration in periods of f_A is 2 */
+ IfxMsc_ShiftClockPhaseDuration_3, /**< \brief Duration in periods of f_A is 3 */
+ IfxMsc_ShiftClockPhaseDuration_4, /**< \brief Duration in periods of f_A is 4 */
+ IfxMsc_ShiftClockPhaseDuration_5, /**< \brief Duration in periods of f_A is 5 */
+ IfxMsc_ShiftClockPhaseDuration_6, /**< \brief Duration in periods of f_A is 6 */
+ IfxMsc_ShiftClockPhaseDuration_7, /**< \brief Duration in periods of f_A is 7 */
+ IfxMsc_ShiftClockPhaseDuration_8, /**< \brief Duration in periods of f_A is 8 */
+ IfxMsc_ShiftClockPhaseDuration_9, /**< \brief Duration in periods of f_A is 9 */
+ IfxMsc_ShiftClockPhaseDuration_10, /**< \brief Duration in periods of f_A is 10 */
+ IfxMsc_ShiftClockPhaseDuration_11, /**< \brief Duration in periods of f_A is 11 */
+ IfxMsc_ShiftClockPhaseDuration_12, /**< \brief Duration in periods of f_A is 12 */
+ IfxMsc_ShiftClockPhaseDuration_13, /**< \brief Duration in periods of f_A is 13 */
+ IfxMsc_ShiftClockPhaseDuration_14, /**< \brief Duration in periods of f_A is 14 */
+ IfxMsc_ShiftClockPhaseDuration_15, /**< \brief Duration in periods of f_A is 15 */
+ IfxMsc_ShiftClockPhaseDuration_16 /**< \brief Duration in periods of f_A is 16 */
+} IfxMsc_ShiftClockPhaseDuration;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_MSC.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxMsc_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxMsc_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxMsc_SleepMode;
+
+/** \brief Output Control Register - SOP Line Polarity\n
+ * Definition in Ifx_MSC.OCR.B.SLP
+ */
+typedef enum
+{
+ IfxMsc_SoLinePolarity_nonInverted = 0, /**< \brief SOP and SO polarity is identical */
+ IfxMsc_SoLinePolarity_inverted = 1 /**< \brief SOP and SO polarity is inverted */
+} IfxMsc_SoLinePolarity;
+
+/** \brief Downstream Select Data Source Low Register - Select Source for - SRL and SRHNumber Of Passive Time Frames\n
+ * Definition in Ifx_MSC.DSDSL and Ifx_MSC.DSDSH
+ */
+typedef enum
+{
+ IfxMsc_Source_downstreamDataRegister = 0, /**< \brief SRx[16] is taken from data Register DD.DDL[xx] */
+ IfxMsc_Source_alternateInputLine = 2, /**< \brief SRx[16] is taken from ALTINL input line */
+ IfxMsc_Source_alternateInputLineInverted = 3 /**< \brief SRx[16] is taken from ALTINL input line in inverted state */
+} IfxMsc_Source;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxMsc_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxMsc_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxMsc_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxMsc_SuspendMode;
+
+/** \brief Msc Targets - use as chip enable selection for ENH, ENL and ENC
+ */
+typedef enum
+{
+ IfxMsc_Target_en0 = 0, /**< \brief Target EN0 */
+ IfxMsc_Target_en1, /**< \brief Target EN1 */
+ IfxMsc_Target_en2, /**< \brief Target EN2 */
+ IfxMsc_Target_en3 /**< \brief Target EN3 */
+} IfxMsc_Target;
+
+/** \brief Interrupt Control Register - Time Frame Interrupt Enable\n
+ * Definition in Ifx_MSC.ICR.B.TFIE
+ */
+typedef enum
+{
+ IfxMsc_TimeFrameInterrupt_disabled = 0, /**< \brief Interrupt generation disabled */
+ IfxMsc_TimeFrameInterrupt_enabled = 1 /**< \brief Interrupt generation enabled */
+} IfxMsc_TimeFrameInterrupt;
+
+/** \brief Interrupt Control Register - Time Frame Interrupt Pointer\n
+ * Definition in Ifx_MSC.ICR.B.TFIP
+ */
+typedef enum
+{
+ IfxMsc_TimeFrameInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
+ IfxMsc_TimeFrameInterruptNode_SR1, /**< \brief Service request output SR1 selected */
+ IfxMsc_TimeFrameInterruptNode_SR2, /**< \brief Service request output SR2 selected */
+ IfxMsc_TimeFrameInterruptNode_SR3 /**< \brief Service request output SR3 selected */
+} IfxMsc_TimeFrameInterruptNode;
+
+/** \brief Downstream Channel Transmission Mode\n
+ * Definition in Ifx_MSC.DSC.B.TM
+ */
+typedef enum
+{
+ IfxMsc_TransmissionMode_triggered = 0, /**< \brief Triggered Mode */
+ IfxMsc_TransmissionMode_dataRepetition = 1 /**< \brief Data Repetition Mode */
+} IfxMsc_TransmissionMode;
+
+/** \brief Asynchronous Block Configuration Register - Underflow Interrupt Enable\n
+ * Definition in Ifx_MSC.ABC.B.UIE
+ */
+typedef enum
+{
+ IfxMsc_UnderflowInterrupt_disabled = 0, /**< \brief Disables the path of the Underflow interrupt towards the interrupt node */
+ IfxMsc_UnderflowInterrupt_enabled = 1 /**< \brief Enables the path of the Underflow interrupt towards the interrupt node */
+} IfxMsc_UnderflowInterrupt;
+
+/** \brief Asynchronous Block Configuration Register - Underflow Interrupt Node Pointer\n
+ * Definition in Ifx_MSC.ABC.B.UIP
+ */
+typedef enum
+{
+ IfxMsc_UnderflowInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
+ IfxMsc_UnderflowInterruptNode_SR1, /**< \brief Service request output SR1 selected */
+ IfxMsc_UnderflowInterruptNode_SR2, /**< \brief Service request output SR2 selected */
+ IfxMsc_UnderflowInterruptNode_SR3, /**< \brief Service request output SR3 selected */
+ IfxMsc_UnderflowInterruptNode_SR4 /**< \brief Service request output SR4 selected */
+} IfxMsc_UnderflowInterruptNode;
+
+/** \brief Channel Frame Type\n
+ * Definition in Ifx_MSC.USR.B.UFT
+ */
+typedef enum
+{
+ IfxMsc_UpstreamChannelFrameType_12bit = 0, /**< \brief 12-bit Upstream frame selected */
+ IfxMsc_UpstreamChannelFrameType_16bit = 1 /**< \brief 16-bit Upstream frame selected */
+} IfxMsc_UpstreamChannelFrameType;
+
+/** \brief Upstream Receiving Rate\n
+ * Definition in Ifx_MSC.USR.B.URR
+ */
+typedef enum
+{
+ IfxMsc_UpstreamChannelReceivingRate_disabled = 0, /**< \brief Disabled */
+ IfxMsc_UpstreamChannelReceivingRate_4 = 1, /**< \brief Baud rate = f_MSC / 4 */
+ IfxMsc_UpstreamChannelReceivingRate_8 = 2, /**< \brief Baud rate = f_MSC / 8 */
+ IfxMsc_UpstreamChannelReceivingRate_16 = 3, /**< \brief Baud rate = f_MSC / 16 */
+ IfxMsc_UpstreamChannelReceivingRate_32 = 4, /**< \brief Baud rate = f_MSC / 32 */
+ IfxMsc_UpstreamChannelReceivingRate_64 = 5, /**< \brief Baud rate = f_MSC / 64 */
+ IfxMsc_UpstreamChannelReceivingRate_128 = 6, /**< \brief Baud rate = f_MSC / 128 */
+ IfxMsc_UpstreamChannelReceivingRate_256 = 7 /**< \brief Baud rate = f_MSC / 256 */
+} IfxMsc_UpstreamChannelReceivingRate;
+
+/** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Enable\n
+ * Definition in Ifx_MSC.USCE.B.USTOEN
+ */
+typedef enum
+{
+ IfxMsc_UpstreamTimeoutInterrupt_disabled = 0, /**< \brief Upstream Timeout Interrupt Disabled */
+ IfxMsc_UpstreamTimeoutInterrupt_enabled = 1 /**< \brief Upstream Timeout Interrupt Enabled */
+} IfxMsc_UpstreamTimeoutInterrupt;
+
+/** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Interrupt Node Pointer\n
+ * Definition in Ifx_MSC.USCE.B.USTOIP
+ */
+typedef enum
+{
+ IfxMsc_UpstreamTimeoutInterruptNode_SR0 = 0, /**< \brief Service request output SR0 selected */
+ IfxMsc_UpstreamTimeoutInterruptNode_SR1, /**< \brief Service request output SR1 selected */
+ IfxMsc_UpstreamTimeoutInterruptNode_SR2, /**< \brief Service request output SR2 selected */
+ IfxMsc_UpstreamTimeoutInterruptNode_SR3, /**< \brief Service request output SR3 selected */
+ IfxMsc_UpstreamTimeoutInterruptNode_SR4 /**< \brief Service request output SR4 selected */
+} IfxMsc_UpstreamTimeoutInterruptNode;
+
+/** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Prescaler\n
+ * Definition in Ifx_MSC.USCE.B.USTOPRE
+ */
+typedef enum
+{
+ IfxMsc_UpstreamTimeoutPrescaler_1 = 0, /**< \brief Prescale value 1 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_2 = 1, /**< \brief Prescale value 2 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_4 = 2, /**< \brief Prescale value 4 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_8 = 3, /**< \brief Prescale value 8 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_16 = 4, /**< \brief Prescale value 16 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_32 = 5, /**< \brief Prescale value 32 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_64 = 6, /**< \brief Prescale value 64 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_128 = 7, /**< \brief Prescale value 128 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_256 = 8, /**< \brief Prescale value 256 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_512 = 9, /**< \brief Prescale value 512 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_1024 = 10, /**< \brief Prescale value 1024 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_2048 = 11, /**< \brief Prescale value 2048 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_4096 = 12, /**< \brief Prescale value 4096 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_8192 = 13, /**< \brief Prescale value 8192 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_16384 = 14, /**< \brief Prescale value 16384 for the upstream time-out limit */
+ IfxMsc_UpstreamTimeoutPrescaler_32768 = 15 /**< \brief Prescale value 32768 for the upstream time-out limit */
+} IfxMsc_UpstreamTimeoutPrescaler;
+
+/** \brief Upstream Control Enhanced Register 1 - Upstream Timeout Value\n
+ * Definition in Ifx_MSC.USCE.B.USTOVAL
+ */
+typedef enum
+{
+ IfxMsc_UpstreamTimeoutValue_1 = 0, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_2, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_3, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_4, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_5, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_6, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_7, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_8, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_9, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_10, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_11, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_12, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_13, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_14, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_15, /**< \brief Upstream timeout value for the N-Divider */
+ IfxMsc_UpstreamTimeoutValue_16 /**< \brief Upstream timeout value for the N-Divider */
+} IfxMsc_UpstreamTimeoutValue;
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_Config_Flags
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear ABRA overflow flag
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc);
+
+/** \brief Clear ABRA underflow flag
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc);
+
+/** \brief Clear Upstream timeout
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc);
+
+/** \brief Clear the valid flag
+ * \param msc pointer to the base of MSC registers
+ * \param upstreamIdx data register ID
+ * \return None
+ */
+IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx);
+
+/** \brief Get the status of the valid flag
+ * \param msc pointer to the base of MSC registers
+ * \param upstreamIdx data register ID
+ * \return Status TRUE or FALSE
+ */
+IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_Set_Command_Target
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Select the target for command phase
+ * \param msc pointer to the base of MSC registers
+ * \param enX Target to be selected
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_Set_Data
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Select the target for data high phase
+ * \param msc pointer to the base of MSC registers
+ * \param enX Target to be selected
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX);
+
+/** \brief Select the target for data low phase
+ * \param msc pointer to the base of MSC registers
+ * \param enX Target to be selected
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_Get_Data
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the upstream data from upstream data register
+ * \param msc pointer to the base of MSC registers
+ * \param upstreamIdx Upstream data register ID
+ * \return Recevived data
+ */
+IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx);
+
+/** \brief Get the selected target during high phase
+ * \param msc pointer to the base of MSC registers
+ * \return Selected target
+ */
+IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc);
+
+/** \brief Get the selected target during low phase
+ * \param msc pointer to the base of MSC registers
+ * \return Selected target
+ */
+IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_Enable_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable MSC kernel
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_disableModule(Ifx_MSC *msc);
+
+/** \brief Enable MSC kernel
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_enableModule(Ifx_MSC *msc);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_Reset_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear reset bit of MSC kernel
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_clearReset(Ifx_MSC *msc);
+
+/** \brief Reset MSC kernel
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_resetModule(Ifx_MSC *msc);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_Baud_Calculator
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the NDD value for the supplied baud rate when when ABRA block is enabled
+ * \param baud Required baud rate
+ * \return NDD value
+ */
+IFX_EXTERN uint32 IfxMsc_downstreamAbraBaudCalculator(uint32 baud);
+
+/** \brief Get the step value for the supplied baud rate when divider mode is fractional
+ * \param msc pointer to the base of MSC registers
+ * \param baud Required baud rate
+ * \return Step value
+ */
+IFX_EXTERN uint64 IfxMsc_upstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud);
+
+/** \brief Get the step value for the supplied baud rate when divider mode is normal
+ * \param msc pointer to the base of MSC registers
+ * \param baud Required baud rate
+ * \return Step value
+ */
+IFX_EXTERN uint32 IfxMsc_upstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_IO
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes a EN output
+ * \param en the EN Pin which should be configured
+ * \param pinMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a FCLN output
+ * \param fcln the FCLN Pin which should be configured
+ * \param pinMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a FCLP output
+ * \param fclp the FCLP Pin which should be configured
+ * \param pinMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a INJ input
+ * \param inj the INJ Pin which should be configured
+ * \param pinMode the pin input mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a SDI input
+ * \param sdi the SDI Pin which should be configured
+ * \param pinMode the pin input mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a SON output
+ * \param son the SON Pin which should be configured
+ * \param pinMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a SOP output
+ * \param sop the SOP Pin which should be configured
+ * \param pinMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver);
+
+/** \} */
+
+/** \addtogroup IfxLld_Msc_Std_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \param msc Resource index of the MSC
+ * \return MSC module register address
+ */
+IFX_EXTERN Ifx_MSC *IfxMsc_getAddress(IfxMsc_Index msc);
+
+/** \brief API to get the resource index of the MSC specified.
+ * \param msc Pointer to the MSC HW module (register memory map)
+ * \return Resource index of the ERAY
+ */
+IFX_EXTERN IfxMsc_Index IfxMsc_getIndex(Ifx_MSC *msc);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears The Recieve Data Interrupt Flag
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc);
+
+/** \brief Clears the Valid bit
+ * \param msc pointer to the base of MSC registers
+ * \param upstreamIdx upstream index
+ * \return None
+ */
+IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx);
+
+/** \brief Disables the Upstream Timeout Interrupt
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc);
+
+/** \brief Enables the Upstream Timeout Interrupt
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc);
+
+/** \brief Returns the value of Asynchronous clock Bypass bit.
+ * \param msc pointer to the base of MSC registers
+ * \return Get the value of Asynchronous clock bypass enable bit.
+ */
+IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc);
+
+/** \brief Returns the value of Down stream extension enable bit.
+ * \param msc pointer to the base of MSC registers
+ * \return Get the value of Down stream extension enable bit.
+ */
+IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc);
+
+/** \brief Returns the Recieve DataInterrupt Flag Status
+ * \param msc pointer to the base of MSC registers
+ * \return Status
+ */
+IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc);
+
+/** \brief Returns the Src pointer for the selected MSC interrupt node
+ * \param msc pointer to the base of MSC registers
+ * \param intRequest Interrupt Request
+ * \return Pointer to SRCR register
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest);
+
+/** \brief Returns the Upstream Data
+ * \param msc pointer to the base of MSC registers
+ * \param upstreamIdx upstream index
+ * \return Upstream Data
+ */
+IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx);
+
+/** \brief Returns the Upstream Parity Error Flag Status
+ * \param msc pointer to the base of MSC registers
+ * \param upstreamIdx upstream index
+ * \return Status
+ */
+IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx);
+
+/** \brief Returns Upstream Timeout Flag Status
+ * \param msc pointer to the base of MSC registers
+ * \return Status
+ */
+IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param msc Pointer to MSC module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc);
+
+/** \brief Set or reset the Asynchronous clock bypass bit.
+ * \param msc pointer to the base of MSC registers
+ * \param value Set / reset value.
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value);
+
+/** \brief Sets the Down stream data
+ * \param msc pointer to the base of MSC registers
+ * \param data Data
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data);
+
+/** \brief Set or reset the Down stream extension enable bit.
+ * \param msc pointer to the base of MSC registers
+ * \param value Set / reset value.
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value);
+
+/** \brief Sets the Down stream Extension data
+ * \param msc pointer to the base of MSC registers
+ * \param data Data
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data);
+
+/** \brief Sets The Fractional Divider Step
+ * \param msc pointer to the base of MSC registers
+ * \param value Value
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value);
+
+/** \brief Set the required N divider downstream value.
+ * \param msc pointer to the base of MSC registers
+ * \param divisionRatio select the required division ratio.
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio);
+
+/** \brief Sets The Serial Data Input Select
+ * \param msc pointer to the base of MSC registers
+ * \param select Serial Data Input Select
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param msc pointer to MSC registers
+ * \param mode mode selection (enable/disable)
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param msc Pointer to MSC module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode);
+
+/** \brief Sets the Transmission Mode
+ * \param msc pointer to the base of MSC registers
+ * \param mode mode
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode);
+
+/** \brief Sets The Upstream Channel Recieve Rate
+ * \param msc pointer to the base of MSC registers
+ * \param recieveRate Recieve Rate
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate);
+
+/** \brief Sets The Upstream Timeout
+ * \param msc pointer to the base of MSC registers
+ * \param timeoutVal Timeout Value
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal);
+
+/** \brief Sets The Upstream Timeout Prescalar
+ * \param msc pointer to the base of MSC registers
+ * \param prescalar prescalar
+ * \return None
+ */
+IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief clear data frame interrupt flag
+ * \param msc pointer to the base of MSC registers
+ * \return None
+ */
+IFX_EXTERN void IfxMsc_clearDataFrameInterruptFlag(Ifx_MSC *msc);
+
+/** \brief Get the step value for the supplied baud rate when divider mode is fractional for downstream
+ * \param msc pointer to the base of MSC registers
+ * \param baud Required baud rate
+ * \return Step Value
+ */
+IFX_EXTERN uint64 IfxMsc_downstreamFractionalBaudCalculator(Ifx_MSC *msc, uint32 baud);
+
+/** \brief Get the step value for the supplied baud rate when divider mode is normal for downstream
+ * \param msc Select DataType Ref
+ * \param baud Required baud rate
+ * \return Step value
+ */
+IFX_EXTERN uint32 IfxMsc_downstreamNormalBaudCalculator(Ifx_MSC *msc, uint32 baud);
+
+/** \brief get the status of the active data frame
+ * \param msc pointer to the base of MSC registers
+ * \return Status TRUE or FALSE
+ */
+IFX_EXTERN boolean IfxMsc_getActiveDataFrameStatus(Ifx_MSC *msc);
+
+/** \brief get the status of the data frame interrupt flag
+ * \param msc pointer to the base of MSC registers
+ * \return Status TRUE or FALSE
+ */
+IFX_EXTERN boolean IfxMsc_getDataFrameInterruptFlag(Ifx_MSC *msc);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxMsc_clearAbraOverflowFlag(Ifx_MSC *msc)
+{
+ /* Overflow Flag Clear */
+ msc->ABC.B.OFM = 2;
+}
+
+
+IFX_INLINE void IfxMsc_clearAbraUnderflowFlag(Ifx_MSC *msc)
+{
+ /* Underflow Flag Clear */
+ msc->ABC.B.UFM = 2;
+}
+
+
+IFX_INLINE void IfxMsc_clearRecieveDataInterruptFlag(Ifx_MSC *msc)
+{
+ msc->ISC.B.CURDI = 0x01U;
+}
+
+
+IFX_INLINE void IfxMsc_clearUpstreamTimeout(Ifx_MSC *msc)
+{
+ /* Upstream Timeout Clear */
+ msc->USCE.B.USTC = 1;
+}
+
+
+IFX_INLINE void IfxMsc_clearUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
+{
+ msc->UD[upstreamIdx].B.C = 1;
+}
+
+
+IFX_INLINE void IfxMsc_clearValidbit(Ifx_MSC *msc, uint8 upstreamIdx)
+{
+ msc->UD[upstreamIdx].B.C = 0x01U;
+}
+
+
+IFX_INLINE void IfxMsc_disableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
+{
+ msc->USCE.B.USTOEN = 0x0U;
+}
+
+
+IFX_INLINE void IfxMsc_enableUpstreamTimeoutInterrupt(Ifx_MSC *msc)
+{
+ msc->USCE.B.USTOEN = 0x1U;
+}
+
+
+IFX_INLINE boolean IfxMsc_getAsyncClockBypass(Ifx_MSC *msc)
+{
+ return msc->ABC.B.ABB;
+}
+
+
+IFX_INLINE uint16 IfxMsc_getData(Ifx_MSC *msc, uint8 upstreamIdx)
+{
+ uint16 data = 0;
+
+ data = msc->UD[upstreamIdx].B.DATA;
+
+ return data;
+}
+
+
+IFX_INLINE IfxMsc_Target IfxMsc_getDataHighTarget(Ifx_MSC *msc)
+{
+ /* get data high target - en0, en1, en2 or en3 */
+ return (IfxMsc_Target)msc->OCR.B.CSH;
+}
+
+
+IFX_INLINE IfxMsc_Target IfxMsc_getDataLowTarget(Ifx_MSC *msc)
+{
+ /* get data low target - en0, en1, en2 or en3 */
+ return (IfxMsc_Target)msc->OCR.B.CSL;
+}
+
+
+IFX_INLINE boolean IfxMsc_getDownStreamExtension(Ifx_MSC *msc)
+{
+ return msc->DSCE.B.EXEN;
+}
+
+
+IFX_INLINE boolean IfxMsc_getRecieveDataInterruptFlag(Ifx_MSC *msc)
+{
+ return msc->ISR.B.URDI;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxMsc_getSrcPointer(Ifx_MSC *msc, IfxMsc_InterruptServiceRequest intRequest)
+{
+ IfxMsc_Index mscIndex;
+ volatile Ifx_SRC_SRCR *src;
+ mscIndex = IfxMsc_getIndex(msc);
+
+ switch (intRequest)
+ {
+ case IfxMsc_InterruptServiceRequest_0:
+ src = &MODULE_SRC.MSC.MSC[mscIndex].SR0;
+ break;
+ case IfxMsc_InterruptServiceRequest_1:
+ src = &MODULE_SRC.MSC.MSC[mscIndex].SR1;
+ break;
+ case IfxMsc_InterruptServiceRequest_2:
+ src = &MODULE_SRC.MSC.MSC[mscIndex].SR2;
+ break;
+ case IfxMsc_InterruptServiceRequest_3:
+ src = &MODULE_SRC.MSC.MSC[mscIndex].SR3;
+ break;
+ case IfxMsc_InterruptServiceRequest_4:
+ src = &MODULE_SRC.MSC.MSC[mscIndex].SR4;
+ break;
+ default:
+ break;
+ }
+
+ return src;
+}
+
+
+IFX_INLINE uint32 IfxMsc_getUpstreamData(Ifx_MSC *msc, uint8 upstreamIdx)
+{
+ return msc->UD[upstreamIdx].U;
+}
+
+
+IFX_INLINE boolean IfxMsc_getUpstreamParityErrorFlag(Ifx_MSC *msc, uint8 upstreamIdx)
+{
+ return msc->UD[upstreamIdx].B.PERR;
+}
+
+
+IFX_INLINE boolean IfxMsc_getUpstreamTimeoutFlag(Ifx_MSC *msc)
+{
+ return msc->USCE.B.USTF;
+}
+
+
+IFX_INLINE boolean IfxMsc_getUpstreamValidFlag(Ifx_MSC *msc, uint8 upstreamIdx)
+{
+ boolean flag = 0;
+
+ flag = msc->UD[upstreamIdx].B.V;
+
+ return flag;
+}
+
+
+IFX_INLINE void IfxMsc_initEnPin(const IfxMsc_En_Out *en, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (en->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(en->pin.port, en->pin.pinIndex, pinMode, en->select);
+ IfxPort_setPinPadDriver(en->pin.port, en->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxMsc_initFclnPin(const IfxMsc_Fcln_Out *fcln, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (fcln->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(fcln->pin.port, fcln->pin.pinIndex, pinMode, fcln->select);
+ IfxPort_setPinPadDriver(fcln->pin.port, fcln->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxMsc_initFclpPin(const IfxMsc_Fclp_Out *fclp, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (fclp->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(fclp->pin.port, fclp->pin.pinIndex, pinMode, fclp->select);
+ IfxPort_setPinPadDriver(fclp->pin.port, fclp->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxMsc_initInjPin(const IfxMsc_Inj_In *inj, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (inj->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(inj->pin.port, inj->pin.pinIndex, pinMode);
+ IfxPort_setPinPadDriver(inj->pin.port, inj->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxMsc_initSdiPin(const IfxMsc_Sdi_In *sdi, IfxPort_InputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (sdi->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(sdi->pin.port, sdi->pin.pinIndex, pinMode);
+ IfxPort_setPinPadDriver(sdi->pin.port, sdi->pin.pinIndex, padDriver);
+ sdi->module->OCR.B.SDISEL = sdi->select;
+ }
+}
+
+
+IFX_INLINE void IfxMsc_initSonPin(const IfxMsc_Son_Out *son, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (son->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(son->pin.port, son->pin.pinIndex, pinMode, son->select);
+ IfxPort_setPinPadDriver(son->pin.port, son->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxMsc_initSopPin(const IfxMsc_Sop_Out *sop, IfxPort_OutputMode pinMode, IfxPort_PadDriver padDriver)
+{
+ if (sop->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(sop->pin.port, sop->pin.pinIndex, pinMode, sop->select);
+ IfxPort_setPinPadDriver(sop->pin.port, sop->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE boolean IfxMsc_isModuleSuspended(Ifx_MSC *msc)
+{
+ Ifx_MSC_OCS ocs;
+
+ // read the status
+ ocs.U = msc->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxMsc_setAsyncClockBypass(Ifx_MSC *msc, boolean value)
+{
+ msc->ABC.B.ABB = value;
+}
+
+
+IFX_INLINE void IfxMsc_setCommandTarget(Ifx_MSC *msc, IfxMsc_Target enX)
+{
+ /* Set command target - en0, en1, en2 or en3 */
+ msc->OCR.B.CSC = enX;
+}
+
+
+IFX_INLINE void IfxMsc_setDataHighTarget(Ifx_MSC *msc, IfxMsc_Target enX)
+{
+ /* Set data high target - en0, en1, en2 or en3 */
+ msc->OCR.B.CSH = enX;
+}
+
+
+IFX_INLINE void IfxMsc_setDataLowTarget(Ifx_MSC *msc, IfxMsc_Target enX)
+{
+ /* Set data low target - en0, en1, en2 or en3 */
+ msc->OCR.B.CSL = enX;
+}
+
+
+IFX_INLINE void IfxMsc_setDownStreamData(Ifx_MSC *msc, uint32 data)
+{
+ msc->DD.U = data;
+}
+
+
+IFX_INLINE void IfxMsc_setDownStreamExtension(Ifx_MSC *msc, boolean value)
+{
+ msc->DSCE.B.EXEN = value;
+}
+
+
+IFX_INLINE void IfxMsc_setDownStreamExtensionData(Ifx_MSC *msc, uint32 data)
+{
+ msc->DDE.U = data;
+}
+
+
+IFX_INLINE void IfxMsc_setFractionalDividerStep(Ifx_MSC *msc, uint16 value)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ msc->FDR.B.DISCLK = 1; /* Disable MSC clock*/
+
+ while (msc->FDR.B.DISCLK != 1)
+ {}
+
+ /* Configure the DIVIDER STEP */
+ msc->FDR.B.STEP = value;
+ msc->FDR.B.DISCLK = 0; /* Enable MSC clock */
+
+ while (msc->FDR.B.DISCLK != 0)
+ {}
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxMsc_setNdividerDownstream(Ifx_MSC *msc, IfxMsc_NDividerDownstream divisionRatio)
+{
+ msc->DSTE.B.NDD = divisionRatio;
+}
+
+
+IFX_INLINE void IfxMsc_setSerialDataInputSelect(Ifx_MSC *msc, IfxMsc_SerialDataInput select)
+{
+ msc->OCR.B.SDISEL = select;
+}
+
+
+IFX_INLINE void IfxMsc_setSleepMode(Ifx_MSC *msc, IfxMsc_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ msc->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxMsc_setSuspendMode(Ifx_MSC *msc, IfxMsc_SuspendMode mode)
+{
+ Ifx_MSC_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ msc->OCS.U = ocs.U;
+}
+
+
+IFX_INLINE void IfxMsc_setTransmissionMode(Ifx_MSC *msc, IfxMsc_TransmissionMode mode)
+{
+ msc->DSC.B.TM = mode;
+}
+
+
+IFX_INLINE void IfxMsc_setUpstreamChannelRecieveRate(Ifx_MSC *msc, IfxMsc_UpstreamChannelReceivingRate recieveRate)
+{
+ msc->USR.B.URR = recieveRate;
+}
+
+
+IFX_INLINE void IfxMsc_setUpstreamTimeout(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutValue timeoutVal)
+{
+ msc->USCE.B.USTOVAL = timeoutVal;
+}
+
+
+IFX_INLINE void IfxMsc_setUpstreamTimeoutPrescalar(Ifx_MSC *msc, IfxMsc_UpstreamTimeoutPrescaler prescalar)
+{
+ msc->USCE.B.USTOPRE = prescalar;
+}
+
+
+#endif /* IFXMSC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Mtu/Std/IfxMtu.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Mtu/Std/IfxMtu.c
new file mode 100644
index 0000000..4a9f19a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Mtu/Std/IfxMtu.c
@@ -0,0 +1,495 @@
+/**
+ * \file IfxMtu.c
+ * \brief MTU basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxMtu.h"
+
+/** \addtogroup IfxLld_Mtu_Std_Utility
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief API to wait for requested tower depth.
+ * \param towerDepth tower depth of MBIST Ram
+ * \param numInstructions number of instructions
+ * \param mbistSel Memory Selection
+ * \return None
+ */
+IFX_STATIC void IfxMtu_waitForMbistDone(uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxMtu_clearErrorTracking(IfxMtu_MbistSel mbistSel)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ mc->ECCD.U |= (1 << IFX_MC_ECCD_TRC_OFF);
+}
+
+
+void IfxMtu_clearSram(IfxMtu_MbistSel mbistSel)
+{
+ uint8 isEndInitEnabled = 0;
+ uint16 password = 0;
+
+ password = IfxScuWdt_getSafetyWatchdogPassword();
+
+ /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
+ if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
+ {
+ /* Clear EndInit */
+ IfxScuWdt_clearSafetyEndinit(password);
+ isEndInitEnabled = 1;
+ }
+
+ IfxMtu_clearSramStart(mbistSel);
+
+ /* Set EndInit Watchdog (to prevent Watchdog TO)*/
+ IfxScuWdt_setSafetyEndinit(password);
+
+ /* wait for the end of the fill operation */
+ IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 1, mbistSel);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (((Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel))->MSTATUS.B.DONE != 0));
+
+ while (!IfxMtu_isMbistDone(mbistSel))
+ {
+ __nop();
+ }
+
+ /* Clear EndInit */
+ IfxScuWdt_clearSafetyEndinit(password);
+
+ IfxMtu_clearSramContinue(mbistSel);
+
+ if (isEndInitEnabled == 1)
+ {
+ /* Set EndInit Watchdog (to prevent Watchdog TO)*/
+ IfxScuWdt_setSafetyEndinit(password);
+ }
+}
+
+
+void IfxMtu_clearSramContinue(IfxMtu_MbistSel mbistSel)
+{
+ /* Before clearing the ECC error flags we've to issue a dummy SRAM access to get a valid memory output */
+ IfxMtu_readSramAddress(mbistSel, 0x0000);
+ /* Note: a SMU alarm will be flagged HERE if the wrong ECC has been written! */
+ IfxMtu_disableMbistShell(mbistSel);
+
+ /* for auto-init memories: wait for the end of the clear operation */
+ while (IfxMtu_isAutoInitRunning(mbistSel))
+ {}
+}
+
+
+void IfxMtu_clearSramStart(IfxMtu_MbistSel mbistSel)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+
+ IfxMtu_enableMbistShell(mbistSel);
+
+ /* for auto-init memories: wait for the end of the clear operation */
+ while (IfxMtu_isAutoInitRunning(mbistSel))
+ {}
+
+ /* write valid ECC code for all-zero data into RDBFL registers */
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mbistSel < IFXMTU_NUM_MBIST_TABLE_ITEMS);
+ const IfxMtu_SramItem *item = (IfxMtu_SramItem *)&IfxMtu_sramTable[mbistSel];
+
+ uint8 numBlocks = item->numBlocks;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, numBlocks > 0);
+
+ uint16 dataSize = item->dataSize;
+ uint8 eccSize = item->eccSize;
+ uint32 eccInvPos0 = dataSize + item->eccInvPos0;
+ uint32 eccInvPos1 = dataSize + item->eccInvPos1;
+
+ uint32 memSize = dataSize + eccSize;
+
+ uint32 bitPos = 0;
+ uint32 wordIx = 0;
+ uint16 data = 0;
+ /* de-serialize data stream into 16bit packets */
+ uint32 mem;
+
+ for (mem = 0; mem < numBlocks; ++mem)
+ {
+ uint32 i;
+
+ for (i = 0; i < memSize; ++i)
+ {
+ if ((i == eccInvPos0) || (i == eccInvPos1))
+ {
+ data |= (1 << bitPos);
+ }
+
+ ++bitPos;
+
+ if (bitPos >= 16)
+ {
+ mc->RDBFL[wordIx++].U = data;
+ bitPos = 0;
+ data = 0;
+ }
+ }
+ }
+
+ /* final word? */
+ if (bitPos != 0)
+ {
+ mc->RDBFL[wordIx].U = data;
+ }
+ }
+
+ /* start fill operation */
+ uint16 mcontrolMask = 0x4000; /* set USERED flag */
+ mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DINIT_OFF) | (1 << IFX_MC_MCONTROL_START_OFF); /* START = DINIT = 1 */
+ mc->MCONTROL.U = mcontrolMask | (0 << IFX_MC_MCONTROL_DINIT_OFF) | (1 << IFX_MC_MCONTROL_DINIT_OFF); /* START = 0 */
+}
+
+
+void IfxMtu_enableErrorTracking(IfxMtu_MbistSel mbistSel, boolean enable)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+
+ if (enable == FALSE)
+ {
+ mc->ECCS.U &= ~(1 << IFX_MC_ECCS_TRE_OFF);
+ }
+ else
+ {
+ mc->ECCS.U |= (1 << IFX_MC_ECCS_TRE_OFF);
+ }
+}
+
+
+uint32 IfxMtu_getSystemAddress(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR trackedSramAddress)
+{
+ uint32 sramAddress = trackedSramAddress.B.ADDR;
+ uint32 mbi = trackedSramAddress.B.MBI;
+ uint32 systemAddress = 0;
+
+ switch (mbistSel)
+ {
+ case IfxMtu_MbistSel_cpu0Pspr:
+ systemAddress = 0x70100000 | ((sramAddress << 3) | ((mbi & 1) << 2));
+ break;
+
+ case IfxMtu_MbistSel_cpu0Dspr:
+ systemAddress = 0x70000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
+ break;
+
+ case IfxMtu_MbistSel_cpu1Pspr:
+ systemAddress = 0x60100000 | ((sramAddress << 4) | ((mbi & 1) << 3));
+ break;
+
+ case IfxMtu_MbistSel_cpu1Dspr:
+ systemAddress = 0x60000000 | ((sramAddress << 4) | ((mbi & 3) << 2));
+ break;
+
+ case IfxMtu_MbistSel_dma:
+ systemAddress = 0xf0012000 | ((sramAddress << 5) | ((mbi & 3) << 3));
+ break;
+
+ default:
+ systemAddress = 0; /* unsupported address descrambling */
+ }
+
+ return systemAddress;
+}
+
+
+uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ uint8 validFlags = (mc->ECCD.U >> IFX_MC_ECCD_VAL_OFF) & IFX_MC_ECCD_VAL_MSK;
+ uint8 numTrackedAddresses = 0;
+ int i;
+
+#if IFX_MC_ECCD_VAL_LEN > IFXMTU_MAX_TRACKED_ADDRESSES
+# error "Unexpected size of VAL mask"
+#endif
+
+ for (i = 0; i < IFXMTU_MAX_TRACKED_ADDRESSES; ++i)
+ {
+ if (validFlags & (1 << i))
+ {
+ trackedSramAddresses[numTrackedAddresses].U = mc->ETRR[i].U;
+ ++numTrackedAddresses;
+ }
+ }
+
+ return numTrackedAddresses;
+}
+
+
+void IfxMtu_readSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+
+ /* configure MBIST for single read opeation */
+ uint16 mcontrolMask = 0x4000; /* set USERED flag */
+ mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
+ mc->CONFIG0.U = (1 << IFX_MC_CONFIG0_NUMACCS_OFF) | (1 << IFX_MC_CONFIG0_ACCSTYPE_OFF); /* 1 read access */
+ mc->CONFIG1.U = 0; /* ensure that linear scrambling is used */
+
+ /* Set the address to be read (RAEN = 0) */
+ mc->RANGE.U = sramAddress;
+
+ /* Start operation */
+ mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF) | (1 << IFX_MC_MCONTROL_START_OFF);
+ mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
+
+ /* wait for the end of the fill operation */
+ IfxMtu_waitForMbistDone(256, 1, mbistSel);
+
+ while (!IfxMtu_isMbistDone(mbistSel))
+ {
+ __nop();
+ }
+}
+
+
+uint8 IfxMtu_runNonDestructiveInversionTest(IfxMtu_MbistSel mbistSel, uint8 rangeSel, uint8 rangeAddrUp, uint8 rangeAddrLow, uint16 *errorAddr)
+{
+ /* Select MBIST Memory Controller:
+ * Ifx_MC is a type describing structure of MBIST Memory Controller
+ * registers defined in IfxMc_regdef.h file - MC object */
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ uint16 password = 0;
+ uint8 retVal = 0U;
+ uint8 isEndInitEnabled = 0;
+ password = IfxScuWdt_getSafetyWatchdogPassword();
+
+ /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
+ if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
+ {
+ /* Clear EndInit */
+ IfxScuWdt_clearSafetyEndinit(password);
+ isEndInitEnabled = 1;
+ }
+
+ /* Enable MBIST Memory Controller */
+ IfxMtu_enableMbistShell(mbistSel);
+
+ /* for auto-init memories: wait for the end of the clear operation */
+ while (IfxMtu_isAutoInitRunning(mbistSel))
+ {}
+
+ /* Configure Non-destructive Inversion test */
+ mc->CONFIG0.U = 0x4005; //NUMACCS=4, ACCSTYPE=5
+ mc->CONFIG1.U = 0x5000; //AG_MOD=5
+ /* Set the range register */
+ mc->RANGE.U = (rangeSel << 15) | (rangeAddrUp << 7) | (rangeAddrLow << 0);
+ /* Run the tests */
+ /* As per AP32917 and Errata MTU_TC.007 DIR is set to 0 */
+ mc->MCONTROL.U = 0x4001;
+ mc->MCONTROL.B.START = 0;
+ /* Set EndInit Watchdog (to prevent Watchdog TO)*/
+ IfxScuWdt_setSafetyEndinit(password);
+
+ /* wait for the end of the fill operation */
+ IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 4, mbistSel);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mc->MSTATUS.B.DONE != 0);
+
+ while (!IfxMtu_isMbistDone(mbistSel))
+ {
+ __nop();
+ }
+
+ /* Clear EndInit Again */
+ IfxScuWdt_clearSafetyEndinit(password);
+
+ /* Check the Fail Status */
+ if (IfxMtu_checkErrorFlags(mbistSel))
+ {
+ /* Read the Error tracking register and return saying test failed */
+ *errorAddr = mc->ETRR[0].U;
+ retVal = 1U;
+ }
+
+ /* Disable Memory Controller */
+ IfxMtu_disableMbistShell(mbistSel);
+
+ /* for auto-init memories: wait for the end of the clear operation */
+ while (IfxMtu_isAutoInitRunning(mbistSel))
+ {}
+
+ /* Restore the endinit state */
+ if (isEndInitEnabled == 1)
+ {
+ /* Set EndInit Watchdog (to prevent Watchdog TO)*/
+ IfxScuWdt_setSafetyEndinit(password);
+ }
+
+ return retVal;
+}
+
+
+void IfxMtu_writeSramAddress(IfxMtu_MbistSel mbistSel, uint16 sramAddress)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ uint8 isEndInitEnabled = 0;
+ uint16 password = 0;
+ password = IfxScuWdt_getSafetyWatchdogPassword();
+
+ /* Check if the Endinit is cleared by application. If not, then handle it internally inside teh function.*/
+ if (IfxScuWdt_getSafetyWatchdogEndInit() == 1U)
+ {
+ /* Clear EndInit */
+ IfxScuWdt_clearSafetyEndinit(password);
+ isEndInitEnabled = 1;
+ }
+
+ /* configure MBIST for single write opeation */
+ uint16 mcontrolMask = 0x4000; /* set USERED flag */
+ mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
+ mc->CONFIG0.U = (1 << IFX_MC_CONFIG0_NUMACCS_OFF) | (0 << IFX_MC_CONFIG0_ACCSTYPE_OFF); /* 1 write access */
+ mc->CONFIG1.U = 0; /* ensure that linear scrambling is used */
+
+ /* Set the address to be written (RAEN = 0) */
+ mc->RANGE.U = sramAddress;
+
+ /* Start operation */
+ mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF) | (1 << IFX_MC_MCONTROL_START_OFF);
+ mc->MCONTROL.U = mcontrolMask | (1 << IFX_MC_MCONTROL_DIR_OFF);
+
+ if (isEndInitEnabled == 1)
+ {
+ /* Set EndInit Watchdog (to prevent Watchdog TO)*/
+ IfxScuWdt_setSafetyEndinit(password);
+ }
+
+ /* Wait for the end of the operation */
+ IfxMtu_waitForMbistDone(IfxMtu_sramTable[mbistSel].mbistDelay, 1, mbistSel);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, mc->MSTATUS.B.DONE != 0);
+
+ while (!IfxMtu_isMbistDone(mbistSel))
+ {
+ __nop();
+ }
+}
+
+
+IFX_STATIC void IfxMtu_waitForMbistDone(uint32 towerDepth, uint8 numInstructions, IfxMtu_MbistSel mbistSel)
+{
+ uint32 waitFact = (SCU_CCUCON0.B.SPBDIV / SCU_CCUCON0.B.SRIDIV) * numInstructions;
+ volatile uint32 waitTime;
+
+ switch (mbistSel)
+ {
+ case IfxMtu_MbistSel_gtmFifo:
+ case IfxMtu_MbistSel_gtmMcs0:
+ case IfxMtu_MbistSel_gtmMcs1:
+ case IfxMtu_MbistSel_gtmDpll1a:
+ case IfxMtu_MbistSel_gtmDpll1b:
+ case IfxMtu_MbistSel_gtmDpll2:
+ waitFact = waitFact * SCU_CCUCON1.B.GTMDIV;
+ break;
+ case IfxMtu_MbistSel_ethermac:
+ waitFact = waitFact * SCU_CCUCON1.B.GTMDIV;
+ break;
+
+ case IfxMtu_MbistSel_mcan:
+ case IfxMtu_MbistSel_psi5:
+ waitFact = waitFact * SCU_CCUCON0.B.BAUD1DIV;
+
+ break;
+
+ case IfxMtu_MbistSel_erayObf:
+ case IfxMtu_MbistSel_erayIbfTbf:
+ waitFact = (IfxScuCcu_getSriFrequency() / IfxScuCcu_getPll2ErayFrequency()) * numInstructions;
+ break;
+
+ case IfxMtu_MbistSel_erayMbf:
+ waitFact = (IfxScuCcu_getSriFrequency() / IfxScuCcu_getPll2ErayFrequency()) * numInstructions * 4;
+ break;
+
+ case IfxMtu_MbistSel_emem0:
+ case IfxMtu_MbistSel_emem1:
+ case IfxMtu_MbistSel_emem2:
+ case IfxMtu_MbistSel_emem3:
+ case IfxMtu_MbistSel_emem4:
+ case IfxMtu_MbistSel_emem5:
+ case IfxMtu_MbistSel_emem6:
+ case IfxMtu_MbistSel_emem7:
+ case IfxMtu_MbistSel_ememXtm0:
+ case IfxMtu_MbistSel_ememXtm1:
+ case IfxMtu_MbistSel_fft0:
+ case IfxMtu_MbistSel_fft1:
+ case IfxMtu_MbistSel_cifJpeg1_4:
+ case IfxMtu_MbistSel_cifJpeg3:
+ case IfxMtu_MbistSel_cifCif:
+ waitFact = waitFact * SCU_CCUCON2.B.BBBDIV;
+ break;
+ default:
+ break;
+ }
+
+ if (numInstructions == 4)
+ {
+ waitTime = (towerDepth * waitFact) + 30;
+ }
+ else
+ {
+ waitTime = ((towerDepth / 4) * waitFact) + 30;
+ }
+
+ waitTime = waitTime / 3;
+
+ while (waitTime--)
+ {
+ __nop();
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Mtu/Std/IfxMtu.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Mtu/Std/IfxMtu.h
new file mode 100644
index 0000000..706d02d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Mtu/Std/IfxMtu.h
@@ -0,0 +1,573 @@
+/**
+ * \file IfxMtu.h
+ * \brief MTU basic functionality
+ * \ingroup IfxLld_Mtu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Mtu_Usage How to use the Mtu driver?
+ * \ingroup IfxLld_Mtu
+ *
+ * The Memory Test Unit (MTU) controls and monitors the test, initialization and data integrity checking functions of the various internal memories in the device
+ *
+ * The Mtu driver provides set of routines for various Mbist operations
+ *
+ * In the following sections it will be described, how to integrate the Mtu driver into the application framework.
+ *
+ * \section IfxLld_Mtu_SramInit Sram Initialisation
+ * \subsection IfxLld_Mtu_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Mtu_ClearSram_SyncPolling Clear Sram (Synchronous polling mode)
+ *
+ * The Sram initialisation in synchronous polling mode (i.e wait till the complete operation is done) can be used as:
+ *
+ * \code
+ * clearSram(IfxMtu_MbistSel_cpu0Dspr);
+ * \endcode
+ *
+ * \subsection IfxLld_Mtu_ClearSram_ASyncPolling Clear Sram (Asynchronous polling mode)
+ *
+ * The Sram initialisation can be triggered by calling IfxMtu_clearSramStart() function, then can be queried for completion in a task using IfxMtu_isMbistDone. Once it's completed, then IfxMtu_clearSramContinue() has to be
+ * called.
+ * Note: The Safety Endinit watchdog has to be cleared before and set after for the IfxMtu_clearSramStart() and IfxMtu_clearSramContinue() functions.
+ *
+ * Following code triggers Sram initilisation.
+ * \code
+ *
+ * uint16 password = 0;
+ *
+ * password = IfxScuWdt_getSafetyWatchdogPassword();
+ *
+ * // Clear EndInit
+ * IfxScuWdt_clearSafetyEndinit(password);
+ *
+ * IfxMtu_clearSramStart(IfxMtu_MbistSel_cpu0Dspr);
+ *
+ * // Set EndInit Watchdog
+ * IfxScuWdt_setSafetyEndinit(password);
+ * \endcode
+ *
+ * Sram initialisation status can be queried in a task and once done complete the operation using:
+ * \code
+ * if (IfxMtu_isMbistDone(IfxMtu_MbistSel_cpu0Dspr))
+ * {
+ * // Sram Clear operation done
+ *
+ * // Clear EndInit
+ * IfxScuWdt_clearSafetyEndinit(password);
+ *
+ * IfxMtu_clearSramContinue(IfxMtu_MbistSel_cpu0Dspr);
+ *
+ * // Set EndInit Watchdog
+ * IfxScuWdt_setSafetyEndinit(password);
+ * }
+ * else
+ * {
+ * // Sram operation is still in progress
+ * }
+ * \endcode
+ *
+ *
+ * \section IfxLld_Mtu_SramError Sram Error tracking
+ * Example usage of Sram Error tracking
+ * \code
+ * IfxScuWdt_clearSafetyEndinit(password);
+ *
+ * IfxMtu_MbistSel mbistSel = IfxMtu_MbistSel_cpu1Dspr;
+ * Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ *
+ * IfxMtu_enableMbistShell(mbistSel);
+ *
+ * // for auto-init memories: wait for the end of the clear operation
+ * while (IfxMtu_isAutoInitRunning(mbistSel))
+ * {}
+ * IfxMtu_enableErrorTracking(mbistSel, TRUE);
+ * uint32 numEtrr = 5;
+ * // print tracked error address
+ * {
+ * Ifx_MC_ETRR trackedSramAddresses[IFXMTU_MAX_TRACKED_ADDRESSES];
+ * uint8 numTrackedAddresses = IfxMtu_getTrackedSramAddresses(mbistSel, trackedSramAddresses);
+ * for(uint32 i=0; i SystemAddress: 0x%08x\n",
+ * i,
+ * trackedSramAddresses[i].B.ADDR,
+ * trackedSramAddresses[i].B.MBI,
+ * IfxMtu_getSystemAddress(mbistSel, trackedSramAddresses[i]));
+ * }
+ * }
+ * \endcode
+ *
+ */
+IFX_EXTERN uint8 IfxMtu_getTrackedSramAddresses(IfxMtu_MbistSel mbistSel, Ifx_MC_ETRR *trackedSramAddresses);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxMtu_disableMbistShell(IfxMtu_MbistSel mbistSel)
+{
+ volatile uint32 *mtuMemtest = (volatile uint32 *)((uint32)&MTU_MEMTEST0 + 4 * (mbistSel >> 5));
+ uint32 mask = 1 << (mbistSel & 0x1f);
+ *mtuMemtest &= ~mask;
+}
+
+
+IFX_INLINE void IfxMtu_enableMbistShell(IfxMtu_MbistSel mbistSel)
+{
+ volatile uint32 *mtuMemtest = (volatile uint32 *)((uint32)&MTU_MEMTEST0 + 4 * (mbistSel >> 5));
+ uint32 mask = 1 << (mbistSel & 0x1f);
+ *mtuMemtest |= mask;
+}
+
+
+IFX_INLINE void IfxMtu_enableModule(void)
+{
+ uint8 isEndInitEnabled = 0;
+
+ if (IfxScuWdt_getCpuWatchdogEndInit() == 1U)
+ {
+ /* Clear EndInit */
+ IfxScuWdt_clearCpuEndinit(IfxScuWdt_getCpuWatchdogPassword());
+ isEndInitEnabled = 1;
+ }
+
+ /* MTU clock enable */
+ MTU_CLC.U = 0x0U;
+
+ if (isEndInitEnabled == 1U)
+ {
+ IfxScuWdt_setCpuEndinit(IfxScuWdt_getCpuWatchdogPassword());
+ }
+}
+
+
+IFX_INLINE boolean IfxMtu_isAutoInitRunning(IfxMtu_MbistSel mbistSel)
+{
+ volatile uint32 *mtuMemstat = (volatile uint32 *)((uint32)&MTU_MEMSTAT0 + 4 * (mbistSel >> 5));
+ uint32 mask = 1 << (mbistSel & 0x1f);
+ return (*mtuMemstat & mask) != 0;
+}
+
+
+IFX_INLINE boolean IfxMtu_isErrorTrackingEnabled(IfxMtu_MbistSel mbistSel)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ return mc->ECCS.B.TRE ? TRUE : FALSE;
+}
+
+
+IFX_INLINE boolean IfxMtu_isErrorTrackingOverflow(IfxMtu_MbistSel mbistSel)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ return mc->ECCD.B.EOV ? TRUE : FALSE;
+}
+
+
+IFX_INLINE boolean IfxMtu_isMbistDone(IfxMtu_MbistSel mbistSel)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ uint16 status;
+
+ status = mc->MSTATUS.U;
+ return (boolean)(status & 0x01);
+}
+
+
+IFX_INLINE boolean IfxMtu_isModuleEnabled(void)
+{
+ return MTU_CLC.B.DISS == 0;
+}
+
+
+IFX_INLINE boolean IfxMtu_checkErrorFlags(IfxMtu_MbistSel mbistSel)
+{
+ Ifx_MC *mc = (Ifx_MC *)(IFXMTU_MC_ADDRESS_BASE + 0x100 * mbistSel);
+ return (boolean)((mc->ECCD.U & IFXMTU_ERROR_FLAGS_MASK) > 0);
+}
+
+
+#endif /* IFXMTU_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Can/IfxMultican_Can.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Can/IfxMultican_Can.c
new file mode 100644
index 0000000..5dbcd8c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Can/IfxMultican_Can.c
@@ -0,0 +1,1075 @@
+/**
+ * \file IfxMultican_Can.c
+ * \brief MULTICAN CAN details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxMultican_Can.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+
+ Ifx_CAN_MO_AR ar;
+ Ifx_CAN_MO_AMR amr;
+ Ifx_CAN_MO_FCR fcr;
+
+ ar.U = hwObj->AR.U;
+ amr.U = hwObj->AMR.U;
+ fcr.U = hwObj->FCR.U;
+
+ config->frame = (hwObj->STAT.B.DIR != 0) ? IfxMultican_Frame_transmit : IfxMultican_Frame_receive;
+
+ config->control.singleDataTransfer = fcr.B.SDT;
+ config->control.messageLen = (IfxMultican_DataLengthCode)fcr.B.DLC;
+ config->control.extendedFrame = ar.B.IDE;
+ config->control.matchingId = amr.B.MIDE;
+
+ config->messageId = ar.B.ID >> ((config->control.extendedFrame != 0) ? 0 : 18);
+ config->priority = (IfxMultican_Priority)ar.B.PRI;
+ config->acceptanceMask = amr.B.AM >> ((config->control.extendedFrame != 0) ? 0 : 18);
+ config->control.singleTransmitTrial = fcr.B.STT;
+}
+
+
+IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config)
+{
+ msgObj->node = config->node;
+ msgObj->msgObjId = config->msgObjId;
+ msgObj->msgObjCount = config->msgObjCount;
+ msgObj->fifoPointer = 0;
+
+ Ifx_CAN *mcanSFR = msgObj->node->mcan;
+
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcanSFR, msgObj->msgObjId);
+
+ IfxMultican_Status status = IfxMultican_Status_ok;
+
+ boolean longFrame = (config->control.messageLen > IfxMultican_DataLengthCode_8) ? TRUE : FALSE;
+
+ /* check for the receive frame */
+ boolean receiveFrame = (config->frame == IfxMultican_Frame_receive) ||
+ (config->frame == IfxMultican_Frame_remoteAnswer) ||
+ (config->frame == IfxMultican_Frame_remoteRequest);
+
+ /* check for the transmit frame */
+ boolean transmitFrame = ((config->frame == IfxMultican_Frame_transmit) ||
+ (config->frame == IfxMultican_Frame_remoteAnswer) ||
+ (config->frame == IfxMultican_Frame_remoteRequest)) &&
+ (config->gatewayTransfers != 1);
+
+ /* check for gateway source object */
+ boolean gatewaySourceObj = (config->gatewayTransfers != 0) ? TRUE : FALSE;
+
+ /* check for the receive FIFO and trabsmit FIFO */
+ boolean receiveFifo = FALSE, transmitFifo = FALSE;
+
+ if (config->gatewayTransfers != 1)
+ {
+ receiveFifo = (config->msgObjCount > 1) && (receiveFrame);
+ transmitFifo = (config->msgObjCount > 1) && (transmitFrame);
+ }
+
+ /* check for the gateway FIFO */
+ boolean gatewayFifo = (config->msgObjCount > 1) && (gatewaySourceObj);
+
+ /* will be used for Fifo slave objects */
+ IfxMultican_MsgObjId objId, firstSlaveObjId, lastSlaveObjId, gatewayDstObjId = 0;
+
+ /* select the first slave object */
+ if (!config->firstSlaveObjId)
+ { // if not selected
+ firstSlaveObjId = config->msgObjId + 1;
+ }
+ else
+ {
+ firstSlaveObjId = config->firstSlaveObjId;
+ }
+
+ /* select the last slave object */
+ lastSlaveObjId = firstSlaveObjId + (config->msgObjCount - 1);
+
+ uint32 i;
+
+ /* for standard and FIFO (Tx & Rx) base objects */
+ {
+ /* MSGVAL: Set message as not valid */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
+
+ /* reset RXPND */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receivePending);
+
+ /* reset TXPND */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitPending);
+
+ /* reset RXUPD */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveUpdating);
+
+ /* reset NEWDAT */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
+
+ /* reset MSGLST */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
+
+ /* reset RTSEL */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
+
+ /* reset RXPND */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
+
+ /* Configuration of the CAN Message Object List Structure */
+ /* Allocate MO for the node associated list */
+ {
+ /* for standard, gateway and FIFO (Tx & Rx) base objects */
+ /* Append message object to the end of the list */
+ IfxMultican_setListCommand(mcanSFR, 0x2, msgObj->node->nodeId + 1, msgObj->msgObjId);
+
+ /* long frame CAN FD */
+ if (longFrame)
+ {
+ /* Allocate MO with extended Data fields slected by FGPR.B.TOP and FGPR.B.BOT, for the unallocated list (0) */
+ /* Append message object to the end of the list(0) */
+ IfxMultican_setListCommand(mcanSFR, 0x2, 0, config->control.topMsgObjId);
+ IfxMultican_setListCommand(mcanSFR, 0x2, 0, config->control.bottomMsgObjId);
+ }
+
+ /* for all standard FIFO (Tx and Rx) and gateway FIFO slave objects */
+ if (config->msgObjCount > 1)
+ {
+ for (i = 0; i < config->msgObjCount; i++)
+ {
+ objId = firstSlaveObjId + i;
+
+ IfxMultican_setListCommand(mcanSFR, 0x2, msgObj->node->nodeId + 1, objId);
+ }
+ }
+ }
+
+ if ((config->frame == IfxMultican_Frame_receive) || (config->frame == IfxMultican_Frame_remoteAnswer))
+ {
+ /* set RXEN, in case of recieve frame or remote answer*/
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveEnable);
+ }
+
+ /* in case of transmit frame */
+ if ((transmitFrame) && (config->gatewayTransfers != 1))
+ {
+ /* set TXEN0 */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
+
+ /* set TXEN1 */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
+
+ /* reset RTSEL */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
+
+ /* MSGVAL: Set message as valid */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
+ }
+
+ if (((config->frame == IfxMultican_Frame_transmit) || (config->frame == IfxMultican_Frame_remoteAnswer)) && (config->gatewayTransfers != 1))
+ {
+ /* set DIR, in case of transmit frame or remote answer*/
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageDirection);
+ }
+ else
+ {
+ /* clear DIR, in case of receive frame or gateway transfers*/
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageDirection);
+ }
+ }
+ {
+ /* for standard message object */
+ if (config->msgObjCount == 1)
+ {
+ /* gateway transfers */
+ if (gatewaySourceObj)
+ {
+ /* select Gateway Source mode for FCR.MMC */
+ IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_gatewaySource);
+
+ /* select the gateway destination object as the next object if not selected */
+ if (!config->gatewayConfig.gatewayDstObjId)
+ {
+ gatewayDstObjId = msgObj->msgObjId + 1;
+ }
+ else
+ {
+ gatewayDstObjId = config->gatewayConfig.gatewayDstObjId;
+ }
+ }
+ /* long frame CAN FD */
+ /* FDEN = 1, EDL = 1 and BRS = 0/1 */
+ else if (config->node->fastNode && longFrame)
+ {
+ /* select CAN FD object mode for FCR.MMC */
+ IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_canFD64);
+ }
+ /* standard frame */
+ /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
+ else
+ {
+ /* select standard object for FCR.MMC */
+ IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_standard);
+ }
+ }
+ /* for receive FIFO base object */
+ else if (receiveFifo)
+ {
+ /* select receive FIFO base object for FCR.MMC */
+ IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_receiveFifoBase);
+ }
+ /* for transmit FIFO base object */
+ else if (transmitFifo)
+ {
+ /* select transmit FIFO base object for FCR.MMC */
+ IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_transmitFifoBase);
+ }
+ /* for gateway FIFO source object */
+ else if (gatewayFifo)
+ {
+ /* select transmit Gateway Source for FCR.MMC */
+ IfxMultican_MsgObj_setMessageMode(hwObj, IfxMultican_MsgObjMode_gatewaySource);
+ }
+ else
+ {}
+
+ /* for standard and FIFO (Tx & Rx) base objects */
+ /* enable receive interrupt FCR.RXIE if choosen in case of receive frame */
+ boolean receiveInterruptEnabled = (config->rxInterrupt.enabled) && (receiveFrame);
+ IfxMultican_MsgObj_setReceiveInterrupt(hwObj, receiveInterruptEnabled);
+
+ /* enable transmit interrupt FCR.TXIE if choosen in case of transmit frame */
+ boolean transmitInterruptEnabled = (config->txInterrupt.enabled) && (transmitFrame);
+ IfxMultican_MsgObj_setTransmitInterrupt(hwObj, transmitInterruptEnabled);
+
+ /* set FCR.RMM in case of remote answer */
+ boolean remoteMonitoringEnabled = (config->frame == IfxMultican_Frame_remoteAnswer);
+ IfxMultican_MsgObj_setRemoteMonitoring(hwObj, remoteMonitoringEnabled);
+
+ /* long frame CAN FD */
+ /* FDEN = 1, EDL = 1 and BRS = 0/1 */
+ /* in case of recieve Msg Obj, it recieves long and long+fast frames */
+ if (config->node->fastNode && longFrame)
+ {
+ /* enable extended data length */
+ IfxMultican_MsgObj_setExtendedDataLength(hwObj, TRUE);
+
+ /* set data length code FCR.DLC */
+ IfxMultican_MsgObj_setDataLengthCode(hwObj, config->control.messageLen);
+
+ /* set bit rate switch (fast bit rate enable/disable) */
+ IfxMultican_MsgObj_setBitRateSwitch(hwObj, config->control.fastBitRate);
+ }
+ /* standard frame */
+ /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
+ /* in case of recieve Msg Obj, it recieves only standard frames */
+ else
+ {
+ /* set data length code FCR.DLC */
+ IfxMultican_MsgObj_setDataLengthCode(hwObj, config->control.messageLen);
+ }
+
+ /* only for standard message object */
+ if ((config->msgObjCount == 1) && (!gatewaySourceObj))
+ {
+ /* set single transmit trial FCR.STT if choosen */
+ IfxMultican_MsgObj_setSingleTransmitTrial(hwObj, config->control.singleTransmitTrial);
+
+ /* set single data transfer FCR.SDT if choosen */
+ IfxMultican_MsgObj_setSingleDataTransfer(hwObj, config->control.singleDataTransfer);
+ }
+ /* for FIFO (Tx or Rx) base object and gateway objects*/
+ else
+ {
+ /* clear single transmit trial FCR.STT */
+ IfxMultican_MsgObj_setSingleTransmitTrial(hwObj, FALSE);
+
+ /* clear single data transfer FCR.SDT */
+ IfxMultican_MsgObj_setSingleDataTransfer(hwObj, FALSE);
+ }
+ }
+
+ {
+ /* for standard message object */
+ if (config->msgObjCount == 1)
+ {
+ /* long frame CAN FD */
+ if (longFrame)
+ {
+ /* set bottom pointer FGPR.BOT */
+ IfxMultican_MsgObj_setBottomObjectPointer(hwObj, config->control.bottomMsgObjId);
+
+ /* set top pointer FGPR.TOP */
+ IfxMultican_MsgObj_setTopObjectPointer(hwObj, config->control.topMsgObjId);
+ }
+ /* standard gateway transfers */
+ else if (gatewaySourceObj)
+ {
+ /* set (current pointer) FGPR.CUR, to gateway destination object */
+ IfxMultican_MsgObj_setCurrentObjectPointer(hwObj, gatewayDstObjId);
+ }
+ /* standard frame */
+ else
+ {
+ /* clear all pointers */
+ IfxMultican_MsgObj_clearFifoGatewayPointers(hwObj);
+ }
+ }
+
+ /* for FIFO (Tx or Rx) base object and gateway FIFO object */
+ else
+ {
+ /* set bottom pointer FGPR.BOT, to the next message object (first FIFO slave object) */
+ IfxMultican_MsgObj_setBottomObjectPointer(hwObj, firstSlaveObjId);
+
+ /* store the first slave object Id as the fifoPointer in msgObj structure for FIFO transfers */
+ msgObj->fifoPointer = firstSlaveObjId;
+
+ /* set top pointer FGPR.TOP, to the last FIFO slave object */
+ IfxMultican_MsgObj_setTopObjectPointer(hwObj, lastSlaveObjId);
+
+ /* set start of FIFO (current pointer) FGPR.CUR, to first FIFO slave object (bottom pointer) */
+ IfxMultican_MsgObj_setCurrentObjectPointer(hwObj, firstSlaveObjId);
+
+ if (receiveFifo || transmitFifo)
+ {
+ /* set select object pointer FGPR.SEL to one object before last FIFO slave object */
+ IfxMultican_MsgObj_setSelectObjectPointer(hwObj, lastSlaveObjId - 1);
+ }
+ }
+ }
+
+ {
+ /* for standard, gateway and FIFO (Tx & Rx) base objects */
+ /* set the given acceptance mask */
+ IfxMultican_MsgObj_setAcceptanceMask(hwObj, config->acceptanceMask, config->control.extendedFrame);
+
+ /* enable matching ID if choosen */
+ IfxMultican_MsgObj_setMatchingId(hwObj, config->control.matchingId);
+ }
+
+ {
+ /* for standard, gateway and FIFO (Tx & Rx) base objects */
+ /* set message ID */
+ IfxMultican_MsgObj_setMessageId(hwObj, config->messageId, config->control.extendedFrame);
+
+ /* set identifier extension if extended frame is choosen */
+ IfxMultican_MsgObj_setIdentifierExtension(hwObj, config->control.extendedFrame);
+
+ /* set filtering priority */
+ IfxMultican_MsgObj_setPriorityClass(hwObj, config->priority);
+ }
+
+ /* for standard, gateway and FIFO (Tx & Rx) base objects */
+ /* clear both data registers DATAL and DATAH */
+ IfxMultican_MsgObj_clearDataRegisters(hwObj);
+
+ {
+ /* for standard, gateway and FIFO (Tx & Rx) base objects */
+ /* select IPR.RXINP */
+ IfxMultican_MsgObj_setReceiveInterruptNodePointer(hwObj, config->rxInterrupt.srcId);
+
+ /* select IPR.TXINP */
+ IfxMultican_MsgObj_setTransmitInterruptNodePointer(hwObj, config->txInterrupt.srcId);
+
+ /* set IPR.MNP */
+ IfxMultican_MsgObj_setMessagePendingNumber(hwObj, msgObj->msgObjId);
+ }
+
+ /* for each receive FIFO slave object */
+ if (receiveFifo)
+ {
+ for (i = 0; i < config->msgObjCount; i++)
+ {
+ objId = firstSlaveObjId + i; /* increment the message object ID */
+
+ Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
+
+ /* clear all RXEN flag */
+ IfxMultican_MsgObj_clearStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_receiveEnable);
+
+ /* set data length code */
+ IfxMultican_MsgObj_setDataLengthCode(hwSlaveObj, config->control.messageLen);
+
+ /* clear DATAL and DATAH registers */
+ IfxMultican_MsgObj_clearDataRegisters(hwSlaveObj);
+ }
+ }
+
+ /* for each transmit FIFO slave object */
+ if (transmitFifo)
+ {
+ /* configure each transmit FIFO slave object as an independent transmit object */
+ for (i = 0; i < config->msgObjCount; i++)
+ {
+ objId = firstSlaveObjId + i; /* increment the message object ID */
+
+ Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
+
+ /* set message mode as transmit FIFO slave mode */
+ IfxMultican_MsgObj_setMessageMode(hwSlaveObj, IfxMultican_MsgObjMode_transmitFifoSlave);
+
+ /* point current pointer(FGPR.CUR) back to the base FIFO object */
+ IfxMultican_MsgObj_setCurrentObjectPointer(hwSlaveObj, msgObj->msgObjId);
+
+ /* set data length code */
+ IfxMultican_MsgObj_setDataLengthCode(hwSlaveObj, config->control.messageLen);
+
+ /* clear DATAL and DATAH registers */
+ IfxMultican_MsgObj_clearDataRegisters(hwSlaveObj);
+
+ /* set the given acceptance mask */
+ IfxMultican_MsgObj_setAcceptanceMask(hwSlaveObj, config->acceptanceMask, config->control.extendedFrame);
+
+ /* enable matching ID if choosen */
+ IfxMultican_MsgObj_setMatchingId(hwSlaveObj, config->control.matchingId);
+
+ /* set message ID */
+ IfxMultican_MsgObj_setMessageId(hwSlaveObj, config->messageId, config->control.extendedFrame);
+
+ /* set identifier extension if extended frame is choosen */
+ IfxMultican_MsgObj_setIdentifierExtension(hwSlaveObj, config->control.extendedFrame);
+
+ /* set filtering priority */
+ IfxMultican_MsgObj_setPriorityClass(hwSlaveObj, config->priority);
+
+ /* set TXEN0 */
+ IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
+
+ /* MSGVAL: Set message as valid */
+ IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageValid);
+
+ /* clear all TXEN1 flags expect for the slave object in the FGPR.CUR of the base FIFO object */
+ if (objId == firstSlaveObjId)
+ {
+ IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
+ }
+ else
+ {
+ IfxMultican_MsgObj_clearStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_transmitEnable1);
+ }
+
+ /* set DIR, in case of transmit frame or remote answer*/
+ if ((config->frame == IfxMultican_Frame_transmit) || (config->frame == IfxMultican_Frame_remoteAnswer))
+ {
+ IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageDirection);
+ }
+ }
+ }
+
+ /* for standard and receive FIFO base objects */
+ if (config->frame == IfxMultican_Frame_receive)
+ {
+ /* set RTSEL */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
+
+ /* MSGVAL: Set message as valid */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
+ }
+
+ /* for each receive FIFO slave object */
+ if (config->msgObjCount > 1)
+ {
+ IfxMultican_MsgObjId nextFifoObj;
+
+ for (i = 0; i < config->msgObjCount; i++)
+ {
+ objId = firstSlaveObjId + i;
+
+ Ifx_CAN_MO *hwSlaveObj = IfxMultican_MsgObj_getPointer(mcanSFR, objId);
+
+ /* for receive FIFO and gateway FIFO */
+ if (!transmitFifo)
+ {
+ /* MSGVAL: Set message as valid */
+ IfxMultican_MsgObj_setStatusFlag(hwSlaveObj, IfxMultican_MsgObjStatusFlag_messageValid);
+ }
+
+ /* for transmit FIFO and receive FIFO */
+ if (!gatewayFifo)
+ {
+ /* store the next FIFO object number in the bottom pointer (FGPR.BOT) of the current FIFO object (for ease of use in transfers)*/
+ /* if it is the last FIFO object */
+ if (i == (config->msgObjCount - 1))
+ { /* wrap around the FIFO by making the next pointer of last object as the first FIFO object */
+ nextFifoObj = firstSlaveObjId;
+ }
+ else
+ {
+ nextFifoObj = objId + 1;
+ }
+
+ IfxMultican_MsgObj_setBottomObjectPointer(hwSlaveObj, nextFifoObj);
+ }
+ }
+ }
+
+ if (gatewaySourceObj)
+ {
+ /* set FCR.DLCC if chosen*/
+ IfxMultican_MsgObj_setDataLengthCodeCopy(hwObj, config->gatewayConfig.copyDataLengthCode);
+
+ /* set FCR.DATC if chosen*/
+ IfxMultican_MsgObj_setDataCopy(hwObj, config->gatewayConfig.copyData);
+
+ /* set FCR.IDC if chosen*/
+ IfxMultican_MsgObj_setIdentifierCopy(hwObj, config->gatewayConfig.copyId);
+
+ /* set FCR.GDFS if chosen*/
+ IfxMultican_MsgObj_setGatewayDataFrameSend(hwObj, config->gatewayConfig.enableTransmit);
+ }
+
+ return status;
+}
+
+
+void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node)
+{
+ // @$GENTABLE(MsgObjConfig,defaultConfig);
+
+ config->node = node;
+ config->msgObjId = 0;
+ config->msgObjCount = 1;
+
+ config->control.messageLen = IfxMultican_DataLengthCode_8;
+
+ config->control.topMsgObjId = 252;
+ config->control.bottomMsgObjId = 253;
+ config->control.fastBitRate = FALSE; /* fast bit rate enable/disable */
+
+ config->control.extendedFrame = FALSE;
+ config->control.matchingId = FALSE;
+ config->control.singleDataTransfer = FALSE;
+ config->control.singleTransmitTrial = FALSE;
+ config->acceptanceMask = 0x7FFFFFFFUL;
+ config->messageId = 0;
+
+ config->frame = IfxMultican_Frame_receive;
+ config->priority = IfxMultican_Priority_CAN_ID;
+ config->rxInterrupt.enabled = FALSE;
+ config->rxInterrupt.srcId = IfxMultican_SrcId_0;
+ config->txInterrupt.enabled = FALSE;
+ config->txInterrupt.srcId = IfxMultican_SrcId_0;
+
+ config->firstSlaveObjId = 0;
+
+ config->gatewayTransfers = FALSE;
+ config->gatewayConfig.copyDataLengthCode = TRUE;
+ config->gatewayConfig.copyData = TRUE;
+ config->gatewayConfig.copyId = TRUE;
+ config->gatewayConfig.enableTransmit = TRUE;
+ config->gatewayConfig.gatewayDstObjId = 0;
+}
+
+
+boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj)
+{
+ if (msgObj->msgObjCount > 1)
+ {
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
+ return IfxMultican_MsgObj_isRxPending(hwObj);
+ }
+ else
+ {
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+ return IfxMultican_MsgObj_isRxPending(hwObj);
+ }
+}
+
+
+boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj)
+{
+ if (msgObj->msgObjCount > 1)
+ {
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
+
+ return IfxMultican_MsgObj_isTransmitRequested(hwObj);
+ }
+ else
+ {
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+
+ return IfxMultican_MsgObj_isTransmitRequested(hwObj);
+ }
+}
+
+
+boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj)
+{
+ if (msgObj->msgObjCount > 1)
+ {
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->fifoPointer);
+
+ return IfxMultican_MsgObj_isTxPending(hwObj);
+ }
+ else
+ {
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+
+ return IfxMultican_MsgObj_isTxPending(hwObj);
+ }
+}
+
+
+IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg)
+{
+ IfxMultican_Status status = IfxMultican_Status_ok;
+ IfxMultican_MsgObjId objId;
+
+ if (msgObj->msgObjCount > 1)
+ {
+ /* for FIFO message Objects */
+ objId = msgObj->fifoPointer;
+ }
+ else
+ {
+ /* for standard message Objects */
+ objId = msgObj->msgObjId;
+ }
+
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, objId);
+
+ /* clear pending flag */
+ IfxMultican_MsgObj_clearRxPending(hwObj);
+
+ /* read the message object */
+ status = IfxMultican_MsgObj_readMessage(hwObj, msg);
+
+ /* if successfull: */
+ if (status & IfxMultican_Status_newData)
+ {
+ if (msgObj->msgObjCount > 1)
+ {
+ /* set next message object(MOSTAT.PNEXT) of the current object as the next txFIFO slave object */
+ msgObj->fifoPointer = IfxMultican_MsgObj_getBottomObjectPointer(hwObj);
+ }
+ else
+ {}
+ }
+
+ return status;
+}
+
+
+IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg)
+{
+ IfxMultican_Status status = IfxMultican_Status_ok;
+ IfxMultican_MsgObjId objId;
+
+ if (msgObj->msgObjCount > 1)
+ {
+ /* for FIFO message Objects */
+ objId = msgObj->fifoPointer;
+
+ Ifx_CAN_MO *hwBaseObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+
+ /* set message as valid, in case of FIFO MSGVAL of base object has to be set before setting it to each slave object */
+ IfxMultican_MsgObj_setStatusFlag(hwBaseObj, IfxMultican_MsgObjStatusFlag_messageValid);
+ }
+ else
+ {
+ /* for standard message Objects */
+ objId = msgObj->msgObjId;
+ }
+
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, objId);
+
+ if (msgObj->msgObjCount > 1)
+ {
+ /* send the message */
+ status = IfxMultican_MsgObj_writeTxfifo(hwObj, msg);
+ }
+ else
+ {
+ /* send the message */
+ status = IfxMultican_MsgObj_sendMessage(hwObj, msg);
+ }
+
+ /* if successfull: */
+ if (status == IfxMultican_Status_ok)
+ {
+ if (msgObj->msgObjCount > 1)
+ {
+ /* set next message object(MOSTAT.PNEXT) of the current object as the next txFIFO slave object */
+ msgObj->fifoPointer = IfxMultican_MsgObj_getBottomObjectPointer(hwObj);
+ }
+ else
+ {}
+ }
+
+ return status;
+}
+
+
+void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config)
+{
+ Ifx_CAN_N *hwNode = node->node;
+
+ IfxMultican_Can mcan;
+
+ mcan.mcan = node->mcan;
+
+ float32 fcan = IfxMultican_Can_getModuleFrequency(&mcan);
+
+ IfxMultican_calcTimingFromBTR(fcan, hwNode->BTR.U, &config->baudrate, &config->samplePoint, &config->synchJumpWidth);
+
+ config->loopBackMode = (hwNode->PCR.B.LBM != 0) ? TRUE : FALSE;
+ config->analyzerMode = (hwNode->CR.B.CALM != 0) ? TRUE : FALSE;
+}
+
+
+IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config)
+{
+ Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(config->module, config->nodeId);
+ IfxMultican_Status status = IfxMultican_Status_ok;
+
+ node->mcan = config->module;
+ node->node = hwNode;
+ node->nodeId = config->nodeId;
+ node->fastNode = FALSE;
+
+ { /* Configure node control */
+ IfxMultican_Node_resetControlRegister(hwNode); // default value 0x00000041
+ IfxMultican_Node_setTransferInterrupt(hwNode, config->transferInterrupt.enabled);
+ IfxMultican_Node_setLastErrorCodeInterrupt(hwNode, config->lastErrorCodeInterrupt.enabled);
+ IfxMultican_Node_setAlertInterrupt(hwNode, config->alertInterrupt.enabled);
+ IfxMultican_Node_setAnalyzerMode(hwNode, config->analyzerMode);
+ IfxMultican_Node_activate(hwNode);
+ }
+
+ { /* Configure the interrupt source to service request node */
+ IfxMultican_Node_resetInterruptPointers(hwNode); // default value 0x00000041
+ IfxMultican_Node_setTransferInterruptPointer(hwNode, config->transferInterrupt.srcId);
+ IfxMultican_Node_setLastErrorCodeInterruptPointer(hwNode, config->lastErrorCodeInterrupt.srcId);
+ IfxMultican_Node_setAlertInterruptPointer(hwNode, config->alertInterrupt.srcId);
+ IfxMultican_Node_setFrameCounterInterruptPointer(hwNode, config->frameCounterInterrupt.srcId);
+ IfxMultican_Node_setTimerEventInterruptPointer(hwNode, config->timerInterrupt.srcId);
+ }
+
+ { /* NECNT write enabled only of NCR.CCE set */
+ IfxMultican_Node_resetErrorCounters(hwNode);
+ IfxMultican_Node_setReceiveErrorCounter(hwNode, 0);
+ IfxMultican_Node_setTransmitErrorCounter(hwNode, 0);
+ IfxMultican_Node_setErrorWarningLevel(hwNode, config->errorWarningLevel);
+ }
+
+ { /* NPCR write enabled only of NCR.CCE set */
+ IfxMultican_Node_setLoopBackMode(hwNode, config->loopBackMode);
+
+ if (config->txPin != NULL_PTR)
+ {
+ status |= (IfxMultican_Node_initTxPin(hwNode, config->txPin, config->txPinMode, config->pinDriver) ? IfxMultican_Status_ok : IfxMultican_Status_wrongPin);
+ }
+
+ if (config->rxPin != NULL_PTR)
+ {
+ status |= (IfxMultican_Node_initRxPin(hwNode, config->rxPin, config->rxPinMode, config->pinDriver) ? IfxMultican_Status_ok : IfxMultican_Status_wrongPin);
+ }
+ }
+
+ {
+ IfxMultican_Can mcan;
+ mcan.mcan = node->mcan;
+
+ float32 fcan = IfxMultican_Can_getModuleFrequency(&mcan);
+
+ if (!config->flexibleDataRate)
+ {
+ IfxMultican_Node_setBitTiming(hwNode, fcan, config->baudrate, config->samplePoint, config->synchJumpWidth);
+ }
+ else
+ {
+ IfxMultican_Node_setFastNode(hwNode, TRUE);
+ node->fastNode = TRUE;
+
+ IfxMultican_Node_setNominalBitTiming(hwNode, fcan, config->fdConfig.nominalBaudrate, config->fdConfig.nominalSamplePoint, config->fdConfig.nominalSynchJumpWidth);
+ IfxMultican_Node_setFastBitTiming(hwNode, fcan, config->fdConfig.fastBaudrate, config->fdConfig.fastSamplePoint, config->fdConfig.fastSynchJumpWidth);
+
+ if (config->fdConfig.loopDelayOffset)
+ {
+ IfxMultican_Node_setTransceiverDelayCompensationOffset(hwNode, config->fdConfig.loopDelayOffset);
+ IfxMultican_Node_setTransceiverDelayCompensation(hwNode, TRUE);
+ }
+ }
+ }
+
+ { /* Configuration of the Frame Counter */
+ IfxMultican_Node_setFrameCounterMode(hwNode, IfxMultican_FrameCounterMode_timeStampMode);
+ IfxMultican_Node_setFrameCounterInterrupt(hwNode, config->frameCounterInterrupt.enabled);
+ }
+
+ IfxMultican_Node_disableConfigurationChange(hwNode);
+ /* Configuration of the TTCAN Functionality: Not implemented */
+
+ return status;
+}
+
+
+void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan)
+{
+ config->module = mcan->mcan;
+
+ config->nodeId = IfxMultican_NodeId_0;
+
+ config->loopBackMode = FALSE;
+ config->analyzerMode = FALSE;
+
+ config->baudrate = 500000;
+ config->samplePoint = 8000;
+ config->synchJumpWidth = 2000;
+
+ config->flexibleDataRate = FALSE;
+
+ config->fdConfig.nominalBaudrate = 500000;
+ config->fdConfig.nominalSynchJumpWidth = 2000;
+ config->fdConfig.nominalSamplePoint = 8000;
+ config->fdConfig.fastBaudrate = 1000000;
+ config->fdConfig.fastSynchJumpWidth = 2000;
+ config->fdConfig.fastSamplePoint = 8000;
+ config->fdConfig.loopDelayOffset = 0;
+
+ config->rxPin = NULL_PTR;
+ config->rxPinMode = IfxPort_InputMode_pullUp;
+ config->txPin = NULL_PTR;
+ config->txPinMode = IfxPort_OutputMode_pushPull;
+ config->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed2; //previously hardcoded as this value for Tx pins.Now pad driver option is being given in IfxMultican_Node_initRxPin() and IfxMultican_Node_initTxPin()
+
+ config->transferInterrupt.enabled = FALSE;
+ config->transferInterrupt.srcId = IfxMultican_SrcId_0;
+
+ config->lastErrorCodeInterrupt.enabled = FALSE;
+ config->lastErrorCodeInterrupt.srcId = IfxMultican_SrcId_0;
+
+ config->alertInterrupt.enabled = FALSE;
+ config->alertInterrupt.srcId = IfxMultican_SrcId_0;
+
+ config->frameCounterInterrupt.enabled = FALSE;
+ config->frameCounterInterrupt.srcId = IfxMultican_SrcId_0;
+
+ config->timerInterrupt.enabled = FALSE;
+ config->timerInterrupt.srcId = IfxMultican_SrcId_0;
+
+ config->errorWarningLevel = 96;
+}
+
+
+void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node)
+{
+ uint32 i, counter;
+
+ for (counter = 1; counter < 256; counter = counter * 2)
+ {
+ node->node->ECNT.B.TEC = counter;
+ }
+
+ for (i = 0; i < 10; ++i)
+ {
+ node->node->ECNT.B.TEC = ++counter;
+ }
+}
+
+
+void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config)
+{
+ config->clockSelect = IfxMultican_getInputClock(mcan->mcan);
+
+ if (config->clockSelect == IfxMultican_ClockSelect_fclc)
+ {
+ float32 fcan = IfxScuCcu_getCanFrequency();
+
+ uint16 dividerMode = IfxMultican_getFractionalDividerMode(mcan->mcan);
+ uint16 stepValue = IfxMultican_getFractionalDividerStepValue(mcan->mcan);
+
+ if (dividerMode == 1)
+ {
+ config->moduleFreq = fcan / (1024 - stepValue);
+ }
+ else if (dividerMode == 2)
+ {
+ config->moduleFreq = (fcan * stepValue) / 1024;
+ }
+ else
+ {
+ config->moduleFreq = 0;
+ }
+ }
+ else if (config->clockSelect == IfxMultican_ClockSelect_fosc0)
+ {
+ config->moduleFreq = IfxScuCcu_getOsc0Frequency();
+ }
+ else if (config->clockSelect == IfxMultican_ClockSelect_fErayPll)
+ {
+ config->moduleFreq = IfxScuCcu_getPllErayFrequency();
+ }
+ else
+ {
+ config->moduleFreq = 0.0;
+ }
+}
+
+
+float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan)
+{
+ IfxMultican_Can_Config config;
+
+ IfxMultican_Can_getConfig(mcan, &config);
+
+ return config.moduleFreq;
+}
+
+
+IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config)
+{
+ Ifx_CAN *mcanSFR = config->module;
+
+ mcan->mcan = mcanSFR;
+
+ uint16 stepValue, dividerMode, i;
+
+ /* currently supports only fclc */
+ if (config->clockSelect == IfxMultican_ClockSelect_fclc)
+ {
+ {
+ uint16 stepN, stepF;
+ boolean normalDiv;
+ float32 freqN, freqF;
+
+ float32 fsys = IfxScuCcu_getSpbFrequency();
+
+ /* Normal divider mode */
+ stepN = (uint16)__minf(__maxf(0, 1024.0 - (fsys / config->moduleFreq)), 1023);
+ freqN = fsys / (1024 - stepN);
+
+ /* Fractional divider mode */
+ stepF = (uint16)__minf(((config->moduleFreq * 1024) / fsys), 1023);
+ freqF = (fsys * stepF) / 1024;
+
+ normalDiv = (__absf(config->moduleFreq - freqN) <= __absf(config->moduleFreq - freqF));
+
+ stepValue = (normalDiv != 0) ? stepN : stepF;
+ dividerMode = (normalDiv != 0) ? 1 : 2;
+ }
+
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ /* Enable module, disregard Sleep Mode request */
+ IfxMultican_enableModule(mcanSFR);
+ IfxMultican_disableSleepMode(mcanSFR);
+
+ /* Wait until module is enabled */
+ while (IfxMultican_isModuleEnabled(mcanSFR) == FALSE)
+ {}
+
+ /* Select the clock input, two writes to the CLKSEL are always necessary */
+ IfxMultican_setInputClock(mcanSFR, IfxMultican_ClockSelect_noClock);
+ IfxMultican_setInputClock(mcanSFR, IfxMultican_ClockSelect_fclc); /* Selects Fclc = Fspb */
+
+ IfxMultican_setFractionalDividerStepValue(mcanSFR, stepValue);
+ IfxMultican_setFractionalDividerMode(mcanSFR, dividerMode);
+ IfxScuWdt_setCpuEndinit(passwd);
+ }
+ else
+ {}
+
+ IfxMultican_waitListReady(mcan->mcan);
+
+ /* deinitialise all pending bits */
+ for (i = 0; i < 8; i++)
+ {
+ IfxMultican_clearPendingMessageNotification(mcanSFR, i);
+ }
+
+ /* The position is simply given by the message pending number MPN */
+ IfxMultican_clearMessagePendingSeletor(mcanSFR);
+
+ /* All MO contribute to the calculation of the Message index */
+ IfxMultican_setMessageIndexMask(mcanSFR, 0xFFFFFFFF);
+
+ /* Configure interrupt node pointers */
+ IfxMultican_SrcId srcId;
+
+ for (srcId = IfxMultican_SrcId_0; srcId < IFXMULTICAN_NUM_SRC; srcId++)
+ {
+ volatile Ifx_SRC_SRCR *srcPointer = IfxMultican_getSrcPointer(mcanSFR, srcId);
+ IfxSrc_init(srcPointer, config->nodePointer[srcId].typeOfService, config->nodePointer[srcId].priority);
+
+ if (config->nodePointer[srcId].priority)
+ {
+ IfxSrc_enable(srcPointer);
+ }
+ else
+ {
+ IfxSrc_disable(srcPointer);
+ }
+ }
+
+ return IfxMultican_Status_ok;
+}
+
+
+void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan)
+{
+ IfxMultican_SrcId srcId;
+ /** - take over module pointer */
+ config->module = mcan;
+
+ /** - Selected input clock is from CLC */
+ config->clockSelect = IfxMultican_ClockSelect_fclc;
+
+ /** - Module frequency is fSPB */
+ config->moduleFreq = IfxScuCcu_getSpbFrequency();
+
+ for (srcId = IfxMultican_SrcId_0; srcId < IFXMULTICAN_NUM_SRC; srcId++)
+ {
+ config->nodePointer[srcId].priority = 0;
+ config->nodePointer[srcId].typeOfService = IfxSrc_Tos_cpu0;
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Can/IfxMultican_Can.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Can/IfxMultican_Can.h
new file mode 100644
index 0000000..d7e65c8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Can/IfxMultican_Can.h
@@ -0,0 +1,1317 @@
+/**
+ * \file IfxMultican_Can.h
+ * \brief MULTICAN CAN details
+ * \ingroup IfxLld_Multican
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Multican_Can_Usage How to use the CAN Interface driver?
+ * \ingroup IfxLld_Multican
+ *
+ * The CAN interface driver provides a default configuration for various modes.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Multican_Can_Preparation Preparation
+ * \subsection IfxLld_Multican_Can_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Multican_Can_Variables Variables
+ *
+ * Declare the CAN handles as global variables in your C code:
+ * \code
+ * // CAN handle
+ * IfxMultican_Can can;
+ *
+ * // Nodes handles
+ * IfxMultican_Can_Node canSrcNode;
+ * IfxMultican_Can_Node canDstNode;
+ *
+ * // Message Object handles
+ * IfxMultican_Can_MsgObj canSrcMsgObj;
+ * IfxMultican_Can_MsgObj canDstMsgObj;
+ *
+ * const unsigned id = 0x100;
+ * \endcode
+ *
+ * \subsection IfxLld_Multican_Can_Init Module Initialisation
+ *
+ * The module initialisation can be done as followed:
+ * only module clock is supported for clock selection as of now
+ * \code
+ * // create configuration
+ * IfxMultican_Can_Config canConfig;
+ * IfxMultican_Can_initModuleConfig(&canConfig, &MODULE_CAN);
+ *
+ * // initialize module
+ * // IfxMultican_Can can; // defined globally
+ * IfxMultican_Can_initModule(&can, &canConfig);
+ * \endcode
+ *
+ * Note: Application should explicitly configure the system DMA, if system DMA is selected as the service provider for the interrupt.
+ *
+ * \subsection IfxLld_Multican_Can_InitNode Node Initialisation
+ *
+ * The Can nodes initialisation can be done as followed:
+ *
+ * \code
+ * // create CAN node config
+ * IfxMultican_Can_NodeConfig canNodeConfig;
+ * IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
+ *
+ * canNodeConfig.baudrate = 1000000; // 1 MBaud
+ *
+ * // Source Node
+ * // IfxMultican_Can_Node canSrcNode; // defined globally
+ * {
+ * canNodeConfig.nodeId = IfxMultican_NodeId_0;
+ * canNodeConfig.rxPin = &IIfxMultican_RXD0B_P20_7_IN;
+ * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
+ * canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
+ * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
+ *
+ * // initialise the node
+ * IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
+ * }
+ *
+ * // Destination Node
+ * // IfxMultican_Can_Node canDstNode; // defined globally
+ * {
+ * canNodeConfig.nodeId = IfxMultican_NodeId_1;
+ * canNodeConfig.rxPin = &IfxMultican_RXD1B_P14_1_IN;
+ * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
+ * canNodeConfig.txPin = &IfxMultican_TXD1_P14_0_OUT;
+ * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
+ *
+ * // initialise the node
+ * IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Multican_Can_InitMessageObject Message Object Initialisation
+ *
+ * The Can message objects initialisation can be done as followed:
+ *
+ * \code
+ * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
+ *
+ * // assigned message object:
+ * canMsgObjConfig.msgObjId = 0;
+ *
+ * canMsgObjConfig.messageId = id; // 'id' is defined globally
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
+ * }
+ *
+ * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
+ *
+ * // assigned message object:
+ * canMsgObjConfig.msgObjId = 1;
+ *
+ * canMsgObjConfig.messageId = id;
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_receive;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
+ * }
+ * \endcode
+ *
+ * The MULTICAN is ready for use now!
+ *
+ *
+ * \section IfxLld_Multican_Can_StandardDataTransfers Single Data Transfers
+ *
+ * The CAN driver provides simple to use transfer functions
+ *
+ * Data can be sent by the following way:
+ * \code
+ * const unsigned dataLow = 0xC0CAC01A;
+ * const unsigned dataHigh = 0xBA5EBA11;
+ *
+ * // Initialise the message strcture
+ * IfxMultican_Message txMsg;
+ * IfxMultican_Message_init(&txMsg, id, dataLow, dataHigh, IfxMultican_DataLengthCode_8);
+ *
+ * // Transmit Data
+ * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
+ * \endcode
+ *
+ * Data can be received by the following way:
+ * \code
+ * // Receiving Data
+ *
+ * // Initialise the message structure with dummy values, will be replaced by the received values
+ * IfxMultican_Message rxMsg;
+ * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
+ *
+ * // wait until Multican received a new message
+ * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
+ *
+ * // read message
+ * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
+ *
+ * // if no new data is been received report an error
+ * if( !( readStatus & IfxMultican_Status_newData ) ) {
+ * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
+ * }
+ * // if a new data is been received but one lost, report the status
+ * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
+ * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
+ * }
+ *
+ * // data now available at rxMsg.data[0] and rxMsg.data[1]
+ * \endcode
+ *
+ *
+ * \section IfxLld_Multican_Can_FIFOBasedTransfers FIFO based Transfers
+ *
+ * A transmit and receive FIFO can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item.
+ * and specifying the message object number of first slave object with the canMsgObjConfig.firstSlaveObjId item.
+ *
+ * Message objects will be allocated to the FIFO in ascending order.
+ *
+ * Here a configuration example:
+ * \code
+ * //add the following defines to your code globally
+ * #define FIFO_SIZE 16
+ * #define FIFO_SIZE 8
+ *
+ *
+ * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
+ *
+ * // FIFO MsgObj allocation:
+ * canMsgObjConfig.msgObjId = 0; // will allocate MsgObj 0
+ * canMsgObjConfig.msgObjCount = FIFO_SIZE/2;
+ * canMsgObjConfig.firstSlaveObjId = 1;
+ *
+ * canMsgObjConfig.messageId = id; // 'id' defined gloabally
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
+ * }
+ *
+ * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
+ *
+ * // FIFO MsgObj allocation:
+ * canMsgObjConfig.msgObjId = FIFO_SIZE + 1; // avoid clashing with transmit FIFO message objects
+ * canMsgObjConfig.msgObjCount = FIFO_SIZE;
+ *
+ * canMsgObjConfig.firstSlaveObjId = FIFO_SIZE + 2;
+ *
+ * canMsgObjConfig.messageId = id; // 'id' defined gloabally
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_receive;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
+ * }
+ * \endcode
+ *
+ * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
+ *
+ * here is a transmit example
+ * \code
+ * IfxMultican_Message txMsg;
+ * for (i = 0; i < FIFO_SIZE; ++i)
+ * {
+ * // Transmit Data from the source message object //
+ *
+ * IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
+ *
+ * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
+ * }
+ * \endcode
+ *
+ * data can be read by the following way
+ * \code
+ * IfxMultican_Message rxMsg;
+ * for (i = 0; i < FIFO_SIZE; ++i)
+ * {
+ * // Receiving Data, read the data from the destination receive Fifo //
+ * // wait until MCAN received the frame
+ * // wait until Multican received a new message
+ * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
+ *
+ *
+ * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
+ *
+ * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
+ * }
+ * \endcode
+ *
+ *
+ * \section IfxLld_Multican_Can_FDDataTransfers CAN FD Data Transfers
+ *
+ * The CAN driver provides simple to use FD transfer functions
+ * After initialising the module, choose the node initialisation as the following
+ * Node configuration:
+ * \code
+ * // create CAN node config
+ * IfxMultican_Can_NodeConfig canNodeConfig;
+ * IfxMultican_Can_Node_initConfig(&canNodeConfig, &can);
+ *
+ * canNodeConfig.baudrate = 1000000; // 1 MBaud
+ *
+ * // Source Node
+ * // IfxMultican_Can_Node canSrcNode; // defined globally
+ * {
+ * canNodeConfig.nodeId = IfxMultican_NodeId_0;
+ * canNodeConfig.rxPin = &IfxMultican_RXD0B_P20_7_IN;
+ * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
+ * canNodeConfig.txPin = &IfxMultican_TXD0_P20_8_OUT;
+ * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
+ *
+ * // choose CAN FD transfer enable or disable //
+ * canNodeConfig.flexibleDataRate = TRUE;
+ *
+ * // if CAN FD enabled choose the FD configuration //
+ * canNodeConfig.fdConfig.nominalBaudrate = 500000;
+ * canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
+ * canNodeConfig.fdConfig.nominalSamplePoint = 2000;
+ * canNodeConfig.fdConfig.fastBaudrate = 1000000;
+ * canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
+ * canNodeConfig.fdConfig.fastSamplePoint = 2000;
+ * canNodeConfig.fdConfig.loopDelayOffset = 0;
+ *
+ * // initialise the node
+ * IfxMultican_Can_Node_init(&canSrcNode, &canNodeConfig);
+ * }
+ *
+ * // Destination Node
+ * // IfxMultican_Can_Node canDstNode; // defined globally
+ * {
+ * canNodeConfig.nodeId = IfxMultican_NodeId_1;
+ * canNodeConfig.rxPin = IfxMultican_RXD1B_P14_1_IN;
+ * canNodeConfig.rxPinMode = IfxPort_InputMode_pullUp;
+ * canNodeConfig.txPin = IfxMultican_TXD1_P14_0_OUT;
+ * canNodeConfig.txPinMode = IfxPort_OutputMode_pushPull;
+ *
+ * // choose CAN FD transfer enable or disable //
+ * config->flexibleDataRate = TRUE;
+ *
+ * // if CAN FD enabled choose the FD configuration //
+ * canNodeConfig.fdConfig.nominalBaudrate = 500000;
+ * canNodeConfig.fdConfig.nominalSynchJumpWidth = 8000;
+ * canNodeConfig.fdConfig.nominalSamplePoint = 2000;
+ * canNodeConfig.fdConfig.fastBaudrate = 1000000;
+ * canNodeConfig.fdConfig.fastSynchJumpWidth = 8000;
+ * canNodeConfig.fdConfig.fastSamplePoint = 2000;
+ * canNodeConfig.fdConfig.loopDelayOffset = 0;
+ *
+ * // initialise the node
+ * IfxMultican_Can_Node_init(&canDstNode, &canNodeConfig);
+ * }
+ * \endcode
+ *
+ * The CAN FD message objects initialisation can be done as followed:
+ *
+ * \code
+ * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
+ *
+ * // assigned message object:
+ * canMsgObjConfig.msgObjId = 0;
+ *
+ * canMsgObjConfig.messageId = id; // 'id' defined gloabally
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ *
+ * canMsgObjConfig.control.topMsgObjId = 250;
+ * canMsgObjConfig.control.bottomMsgObjId = 251;
+ * canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
+ * }
+ *
+ * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
+ *
+ * // assigned message object:
+ * canMsgObjConfig.msgObjId = 1;
+ *
+ * canMsgObjConfig.messageId = id;
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_receive;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_64;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ *
+ * canMsgObjConfig.control.topMsgObjId = 252;
+ * canMsgObjConfig.control.bottomMsgObjId = 253;
+ * canMsgObjConfig.control.fastBitRate = FALSE; // fast bit rate enable/disable
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
+ * }
+ * \endcode
+ *
+ *
+ * In case of standard messages, data can be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
+ *
+ * In case of long frames of length more than 8 bytes
+ * the data can be sent in the following way
+ *
+ * \code
+ * // load txData buffer with the data that needs to be send
+ * // txData is assumed to be declared globally
+ * int i;
+ * for (i = 0; i < 16; ++i)
+ * {
+ * // uint32 txData[16]; // defined globally
+ * txData[i] = (0x11110000 + i);
+ * }
+ *
+ * // Initialise the message strcture
+ * IfxMultican_Message txMsg;
+ * IfxMultican_Message_longFrameInit(&txMsg, id, IfxMultican_DataLengthCode_64, FALSE);
+ *
+ * // Transmit Data
+ * while( IfxMultican_Can_MsgObj_sendlongFrame(&canSrcMsgObj, &txMsg, txData) == IfxMultican_Status_notSentBusy );
+ * \endcode
+ *
+ * You can recieve the data by the following way
+ *
+ * \code
+ * // Receiving Data
+ *
+ * // Initialise the message strcture with dummy values, will be replaced by the received values
+ * IfxMultican_Message rxMsg;
+ * IfxMultican_Message_longFrameInit(&rxMsg, 0xdead, IfxMultican_DataLengthCode_64, FALSE); // start with invalid values
+ *
+ * // wait until Multican received a new message
+ * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
+ *
+ *
+ * // read the message
+ * //uint32 rxData[16]; //defined globally
+ * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readLongFrame(&canDstMsgObj, &rxMsg, rxData);
+ *
+ * // if no new data is been received report an error
+ * if( !( readStatus & IfxMultican_Status_newData ) ) {
+ * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
+ * }
+ * // if a new data is been received but one lost, report the status
+ * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
+ * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
+ * }
+ *
+ * // clear pending flag
+ * IfxMultican_Can_MsgObj_clearRxPending(&canDstMsgObj);
+ *
+ * // data will be available at rxData
+ * \endcode
+ *
+ *
+ * \section IfxLld_Multican_Can_GatewayTransfers Gateway Transfers
+ * After initialising th emodule and nodes, the gateway message objects can be initialised in the following way
+ *
+ * A Gateway transfers can be enabled during the message object configuration by specifing with the canMsgObjConfig.gatewayTransfersEnable item.
+ *
+ * Here a configuration example:
+ * \code
+ * // source message object
+ * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
+ *
+ * canMsgObjConfig.msgObjId = 0;
+ * canMsgObjConfig.messageId = id; // 'id' defined globally
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ * canMsgObjConfig.gatewayTransfers = FALSE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
+ * }
+ *
+ * // gateway source message object //
+ * // data will be received into this object from SrcObj, and then copied into gateway destination object //
+ * IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
+ *
+ * canMsgObjConfig.msgObjId = 1;
+ * canMsgObjConfig.messageId = id;
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_receive;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ * canMsgObjConfig.gatewayTransfers = TRUE;
+ * canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
+ * canMsgObjConfig.gatewayConfig.copyData = TRUE;
+ * canMsgObjConfig.gatewayConfig.copyId = FALSE;
+ * canMsgObjConfig.gatewayConfig.enableTransmit = TRUE; // if this is not choosen, then no need to initialise canDstMsgObj to read the final data
+ * canMsgObjConfig.gatewayConfig.gatewayDstObjId = 3; // specify the destination object number
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
+ * }
+ *
+ * // gateway destination object //
+ * // data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
+ * // and then sent onto the bus for sending the message to destination message object //
+ * IfxMultican_Can_MsgObj canGatewayDstMsgObj;
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
+ *
+ * canMsgObjConfig.msgObjId = 3;
+ * canMsgObjConfig.messageId = 0x200;
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ * canMsgObjConfig.gatewayTransfers = FALSE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
+ * }
+ *
+ * // destination message object, not needed if enableTransmit is not chosen in gateway source object, or you don't want to read the data//
+ * // data will be received from GatewayDstObj into this obj //
+ * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
+ *
+ * canMsgObjConfig.msgObjId = 10;
+ * canMsgObjConfig.messageId = 0x200;
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_receive;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = FALSE;
+ * canMsgObjConfig.gatewayTransfers = FALSE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
+ * }
+ * \endcode
+ *
+ * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
+ *
+ * The data flow is as followed,
+ *
+ * Data will be sent from the source object (canSrcMsgObj), it will be received by the gateway source object (canGatewaySrcMsgObj).
+ * and then gets copied into the gateway destination object (canGatewayDstMsgObj) without CPU intervention,
+ *
+ * If GDFS is selected in gateway source object (canGatewaySrcMsgObj)then,
+ * the data will be transmitted from gateway destination object(canGatewayDstMsgObj) to the destination object (canDstMsgObj)
+ *
+ * \section IfxLld_Multican_Can_Gateway_Fifo_Transfers Gateway FIFO based Transfers
+ * After initialising the module and nodes,
+ *
+ * A gateway FIFO transfers can be enabled during the node configuration by specifing the number of allocated message objects with the canMsgObjConfig.msgObjCount item.
+ * and enbling the gateway transfers with the canMsgObjConfig.gatewayTransfersEnable item. and also by selecting the start object of the FIFO with the
+ * canMsgObjConfig.firstSlaveObjId item.
+ *
+ * Message objects will be allocated to the gateway FIFO in ascending order.
+ * Here a configuration example:
+ * \code
+ * // source message object, you can even make it as a Tx FIFO
+ * // IfxMultican_Can_MsgObj canSrcMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
+ *
+ * canMsgObjConfig.msgObjId = 0;
+ * canMsgObjConfig.messageId = id;
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ * canMsgObjConfig.gatewayTransfers = FALSE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canSrcMsgObj, &canMsgObjConfig);
+ * }
+ *
+ * // gateway source Fifo //
+ * // data will be received into this object from SrcObj, and then copied into gateway Fifo objects //
+ * IfxMultican_Can_MsgObj canGatewaySrcMsgObj;
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
+ *
+ * canMsgObjConfig.msgObjId = 1;
+ * canMsgObjConfig.messageId = id;
+ * canMsgObjConfig.msgObjCount = 4; // FIFO
+ * canMsgObjConfig.firstSlaveObjId = 2; // will allocate MsgObj 2..5 for the gateway FIFO
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_receive;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = TRUE;
+ * canMsgObjConfig.gatewayTransfers = TRUE; // gateway FIFO
+ * canMsgObjConfig.gatewayConfig.copyDataLengthCode = TRUE;
+ * canMsgObjConfig.gatewayConfig.copyData = TRUE;
+ * canMsgObjConfig.gatewayConfig.copyId = FALSE;
+ * canMsgObjConfig.gatewayConfig.enableTransmit = TRUE;
+ *
+ *
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canGatewaySrcMsgObj, &canMsgObjConfig);
+ * }
+ *
+ * int i = 0;
+ * for (i = 0; i < 4 ; ++i)
+ * {
+ * // gateway destination objects //
+ * // data, id , datlength code will be copied from GatewaySrcObj into this object through gateway transfers //
+ * // and then sent onto the bus for sending the message to destination receive Fifo message objects //
+ * IfxMultican_Can_MsgObj canGatewayDstMsgObj;
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canSrcNode);
+ *
+ * canMsgObjConfig.msgObjId = 2 + i;
+ * canMsgObjConfig.messageId = 0x200;
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_transmit;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = FALSE;
+ * canMsgObjConfig.gatewayTransfers = FALSE;
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canGatewayDstMsgObj, &canMsgObjConfig);
+ * }
+ * }
+ * // destination receive Fifo,
+ * // data will be received from GatewayDstObj into this Fifo //
+ * // IfxMultican_Can_MsgObj canDstMsgObj; // defined globally
+ * {
+ * // create message object config
+ * IfxMultican_Can_MsgObjConfig canMsgObjConfig;
+ * IfxMultican_Can_MsgObj_initConfig(&canMsgObjConfig, &canDstNode);
+ *
+ * canMsgObjConfig.msgObjId = 10;
+ * canMsgObjConfig.messageId = 0x200;
+ * canMsgObjConfig.msgObjCount = 4; // receive FIFO
+ * canMsgObjConfig.firstSlaveObjId = 11; // will allocate MsgObj 11..14 for the receive FIFO
+ * canMsgObjConfig.acceptanceMask = 0x7FFFFFFFUL;
+ * canMsgObjConfig.frame = IfxMultican_Frame_receive;
+ * canMsgObjConfig.control.messageLen = IfxMultican_DataLengthCode_8;
+ * canMsgObjConfig.control.extendedFrame = FALSE;
+ * canMsgObjConfig.control.matchingId = FALSE;
+ * canMsgObjConfig.gatewayTransfers = FALSE;
+ * canMsgObjConfig.firstSlaveObjId = 11;
+ *
+ *
+ * // initialize message object
+ * IfxMultican_Can_MsgObj_init(&canDstMsgObj, &canMsgObjConfig);
+ * }
+ * \endcode
+ *
+ * Data can now be sent and received with the IfxMultican_Can_MsgObj_sendMessage and IfxMultican_Can_MsgObj_readMessage functions as usual (see above).
+ * here is a transmit example
+ * \code
+ * for (i = 0; i < 4; ++i)
+ * {
+ * // Transmit Data from the source message object //
+ * IfxMultican_Message txMsg;
+ * IfxMultican_Message_init(&txMsg, id, dataLow + i, dataHigh + i, IfxMultican_DataLengthCode_8);
+ *
+ * while( IfxMultican_Can_MsgObj_sendMessage(&canSrcMsgObj, &txMsg) == IfxMultican_Status_notSentBusy );
+ * }
+ * \endcode
+ *
+ * The data flow is as followed,
+ *
+ * data will be sent from the source object (canSrcMsgObj) or source TX FIFO, it will be received by the gateway source FIFO (canGatewaySrcMsgObj).
+ * and then gets copied into the gateway destination objects (canGatewayDstMsgObj) without CPU intervention,
+ *
+ * If GDFS is selected in gateway source object (FIFO) (canGatewaySrcMsgObj)then,
+ * the data will be transmitted from gateway destination objects (canGatewayDstMsgObj) to the destination objects or receive FIFO (canDstMsgObj)
+ *
+ * data can be read by the following way
+ * \code
+ * for (i = 0; i < 4; ++i)
+ * {
+ * // Receiving Data, read the data from the destination receive Fifo //
+ * // wait until MCAN received the frame
+ * // wait until Multican received a new message
+ * while( !IfxMultican_Can_MsgObj_isRxPending(&canDstMsgObj) );
+ *
+ * IfxMultican_Message rxMsg;
+ * IfxMultican_Message_init(&rxMsg, 0xdead, 0xdeadbeef, 0xdeadbeef, IfxMultican_DataLengthCode_8); // start with invalid values
+ *
+ * IfxMultican_Status readStatus = IfxMultican_Can_MsgObj_readMessage(&canDstMsgObj, &rxMsg);
+ *
+ * // if no new data is been received report an error
+ * if( !( readStatus & IfxMultican_Status_newData ) ) {
+ * clib_ver_printf("ERROR: IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
+ * }
+ * // if a new data is been received but one lost, report the status
+ * if( readStatus == IfxMultican_Status_newDataButOneLost ) {
+ * clib_ver_printf(" IfxMultican_Can_MsgObj_readMessage returned 0x%04x\n", readStatus);
+ * }
+ * }
+ * \endcode
+ *
+ * \defgroup IfxLld_Multican_Can CAN
+ * \ingroup IfxLld_Multican
+ * \defgroup IfxLld_Multican_Can_Data_Structures Data structures
+ * \ingroup IfxLld_Multican_Can
+ * \defgroup IfxLld_Multican_Can_General General functions
+ * \ingroup IfxLld_Multican_Can
+ * \defgroup IfxLld_Multican_Can_Node CAN Nodes
+ * \ingroup IfxLld_Multican_Can
+ * \defgroup IfxLld_Multican_Can_Message_Objects Message Objects
+ * \ingroup IfxLld_Multican_Can
+ * \defgroup IfxLld_Multican_Can_Interrupts Interrupts
+ * \ingroup IfxLld_Multican_Can
+ */
+
+#ifndef IFXMULTICAN_CAN_H
+#define IFXMULTICAN_CAN_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Multican/Std/IfxMultican.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "IfxScu_regdef.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Multican_Can_Data_Structures
+ * \{ */
+/** \brief Structure for CAN FD configuration
+ */
+typedef struct
+{
+ uint32 nominalBaudrate; /**< \brief Specifies the FD nominal baudrate (Nominal Bit Rate) */
+ uint16 nominalSynchJumpWidth; /**< \brief Specifies the FD nominal resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total nominal bit time */
+ uint16 nominalSamplePoint; /**< \brief Specifies the FD nominal sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
+ uint32 fastBaudrate; /**< \brief Specifies the FD fast baudrate (Data Bit rate) */
+ uint16 fastSynchJumpWidth; /**< \brief Specifies the FD fast resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total fast bit time */
+ uint16 fastSamplePoint; /**< \brief Specifies the FD fast sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
+ uint16 loopDelayOffset; /**< \brief Specifies the transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15] */
+} IfxMultican_Can_FdConfig;
+
+/** \brief Structure for gateway configuration
+ */
+typedef struct
+{
+ uint32 copyDataLengthCode : 1; /**< \brief Specifies the choice for copying data length code */
+ uint32 copyData : 1; /**< \brief Specifies the choice for copying data (data low and data high) */
+ uint32 copyId : 1; /**< \brief Specifies the choice for copying id of the message */
+ uint32 enableTransmit : 1; /**< \brief Specifies the enable choice of TXRQ in the destination gateway object (GDFS of source gateway object) */
+ IfxMultican_MsgObjId gatewayDstObjId; /**< \brief Message object number of first slave object (bottom pointer) */
+} IfxMultican_Can_GatewayConfig;
+
+/** \brief Structure for interrupt configuration
+ */
+typedef struct
+{
+ uint16 priority; /**< \brief interrupt priority */
+ IfxSrc_Tos typeOfService; /**< \brief type of interrupt service */
+} IfxMultican_Can_InterruptConfig;
+
+/** \brief Structure for interrupt source
+ */
+typedef struct
+{
+ boolean enabled; /**< \brief If true, enables the interrupt generation */
+ IfxMultican_SrcId srcId; /**< \brief interrupt node pointer used */
+} IfxMultican_Can_InterruptSource;
+
+/** \brief Message object control
+ */
+typedef struct
+{
+ uint32 singleDataTransfer : 1; /**< \brief Specifies the single data transfer option. If 1, single data transfer is selected */
+ uint32 singleTransmitTrial : 1; /**< \brief Specifies the single transmit trial option. If 1, single transmit trial is selected */
+ IfxMultican_DataLengthCode messageLen; /**< \brief Specifies the length of the transmited data (number of bytes). This value is ignored for receive object */
+ uint32 extendedFrame : 1; /**< \brief Specifies the standard / extended frame mode. 0: standard frame 11 bit ID; 1: extended frame 29 bit ID */
+ uint32 matchingId : 1; /**< \brief Specifies the acceptance mask. 0: standard & extended frame (11 & 29 bit); 1: only frames with maching IDE */
+ IfxMultican_MsgObjId topMsgObjId; /**< \brief Specifies the ID of the message object with data byte 8 to 35. (CAN FD) */
+ IfxMultican_MsgObjId bottomMsgObjId; /**< \brief Specifies the ID of the message object with data byte 36 to 63. (CAN FD) */
+ uint32 fastBitRate : 1; /**< \brief Specifies the bit rate switch. 0: nominal bit rate ; 1: fast bit rate */
+} IfxMultican_Can_MsgObjControl;
+
+/** \brief CAN node handle data structure
+ */
+typedef struct
+{
+ Ifx_CAN *mcan; /**< \brief Specifies the pointer to the MULTICAN module registers */
+ Ifx_CAN_N *node; /**< \brief Specifies the pointer to the MULTICAN node registers */
+ IfxMultican_NodeId nodeId; /**< \brief Specifies the node Id */
+ boolean fastNode; /**< \brief CAN FD fast node enable/disable */
+} IfxMultican_Can_Node;
+
+/** \} */
+
+/** \addtogroup IfxLld_Multican_Can_Data_Structures
+ * \{ */
+/** \brief CAN handle data structure
+ */
+typedef struct
+{
+ Ifx_CAN *mcan; /**< \brief Specifies the pointer to the MULTICAN module registers */
+} IfxMultican_Can;
+
+/** \brief CAN module configuration
+ */
+typedef struct
+{
+ Ifx_CAN *module; /**< \brief pointer to MULTICAN module */
+ IfxMultican_ClockSelect clockSelect; /**< \brief Selected module input clock */
+ float32 moduleFreq; /**< \brief Required module frequency in Hertz */
+ IfxMultican_Can_InterruptConfig nodePointer[IFXMULTICAN_NUM_SRC]; /**< \brief Node pointer configuration */
+} IfxMultican_Can_Config;
+
+/** \brief CAN message object handle data structure
+ */
+typedef struct
+{
+ IfxMultican_Can_Node *node; /**< \brief Specifies the pointer to the node handle */
+ IfxMultican_MsgObjId msgObjId; /**< \brief Specifies the message object ID */
+ uint16 msgObjCount; /**< \brief Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers) */
+ IfxMultican_MsgObjId fifoPointer; /**< \brief Pointer for FIFO based transfers */
+} IfxMultican_Can_MsgObj;
+
+/** \brief CAN message object configuration
+ */
+typedef struct
+{
+ IfxMultican_Can_Node *node; /**< \brief Specifies the pointer to the node handle */
+ IfxMultican_MsgObjId msgObjId; /**< \brief Specifies the message object ID */
+ uint16 msgObjCount; /**< \brief Number of message object sto be initialised (1 for standard Msg Obj and no. of objects including base object for FIFO transfers) */
+ IfxMultican_Can_MsgObjControl control; /**< \brief Message object control */
+ IfxMultican_Frame frame; /**< \brief Specifies the frame type */
+ uint32 acceptanceMask; /**< \brief Specifies the acceptance mask */
+ uint32 messageId; /**< \brief Specifies the message ID */
+ IfxMultican_Priority priority; /**< \brief Specifies the message object priority */
+ IfxMultican_Can_InterruptSource rxInterrupt; /**< \brief Rx Interrupt configuration */
+ IfxMultican_Can_InterruptSource txInterrupt; /**< \brief Tx Interrupt configuration */
+ uint32 gatewayTransfers : 1; /**< \brief Specifies the gateway source object (gateway transfres enable / disable choice) */
+ IfxMultican_Can_GatewayConfig gatewayConfig; /**< \brief Structure for gateway configuration */
+ IfxMultican_MsgObjId firstSlaveObjId; /**< \brief Message object number of first slave object (bottom pointer) */
+} IfxMultican_Can_MsgObjConfig;
+
+/** \brief CAN Node configuration
+ */
+typedef struct
+{
+ Ifx_CAN *module; /**< \brief pointer to MULTICAN module */
+ IfxMultican_NodeId nodeId; /**< \brief Specifies the node Id */
+ boolean analyzerMode; /**< \brief Specifies the analizer mode. If TRUE then the CAN Node works in analizer mode */
+ boolean loopBackMode; /**< \brief Specifies the loop back mode. If TRUE then the CAN Node works in loop back mode */
+ uint32 baudrate; /**< \brief Specifies the baudrate */
+ uint16 samplePoint; /**< \brief Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
+ uint16 synchJumpWidth; /**< \brief Specifies the resynchronisation jump width. Range = [0, 10000] resp. [0%, 100%] of the total bit time */
+ boolean flexibleDataRate; /**< \brief CANFD enable/disable */
+ IfxMultican_Can_FdConfig fdConfig; /**< \brief Specifies CAN FD configuration */
+ IfxMultican_Rxd_In *rxPin; /**< \brief Specifies the receive pin */
+ IfxPort_InputMode rxPinMode; /**< \brief Specifies the receive pin as input mode */
+ IfxMultican_Txd_Out *txPin; /**< \brief Specifies the transmit pin */
+ IfxPort_OutputMode txPinMode; /**< \brief Specifies the transmit pin output mode */
+ uint8 errorWarningLevel; /**< \brief Specifies the error warinig level */
+ IfxMultican_Can_InterruptSource transferInterrupt; /**< \brief Transfer interrupt */
+ IfxMultican_Can_InterruptSource lastErrorCodeInterrupt; /**< \brief Last error code interrupt */
+ IfxMultican_Can_InterruptSource alertInterrupt; /**< \brief Alert interrupt */
+ IfxMultican_Can_InterruptSource frameCounterInterrupt; /**< \brief Frame counter interrupt */
+ IfxMultican_Can_InterruptSource timerInterrupt; /**< \brief Timer Interrupt */
+ IfxPort_PadDriver pinDriver;
+} IfxMultican_Can_NodeConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Multican_Can_General
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reset the CAN module.\n
+ * Reset and disable the CAN module, inclusive message object and node registers.
+ * \param mcan pointer to the CAN handle
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Can_deinit(IfxMultican_Can *mcan);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Return the actual CAN module configuration
+ * \param mcan pointer to the CAN handle
+ * \param config Pointer to the configuration structure, will be filled by this function
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_Can_getConfig(IfxMultican_Can *mcan, IfxMultican_Can_Config *config);
+
+/** \brief Get the module frequency
+ * \param mcan pointer to the CAN handle
+ * \return Frequency Value
+ */
+IFX_EXTERN float32 IfxMultican_Can_getModuleFrequency(IfxMultican_Can *mcan);
+
+/** \brief Initialize the CAN module\n
+ * The following configuration is used:\n
+ * - The CAN module is stopped during sleep mode\n
+ * - The normal divider mode is selected\n
+ * - The CAN module clock is the system clock
+ * \param mcan pointer to the CAN handle
+ * \param config Specifies pointer to the CAN module configuration
+ * \return Status,: Returns IfxMultican_Status_ok if the operation was successful\n
+ * Returns IfxMultican_Status_notInitialised if the operation was errorneous
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_Can_initModule(IfxMultican_Can *mcan, const IfxMultican_Can_Config *config);
+
+/** \brief Return the default MULTICAN configuration
+ * \param config Default configuration filled by this function
+ * \param mcan base address of the MULTICAN register space
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_EXTERN void IfxMultican_Can_initModuleConfig(IfxMultican_Can_Config *config, Ifx_CAN *mcan);
+
+/** \} */
+
+/** \addtogroup IfxLld_Multican_Can_Node
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Activate the CAN Node. Participate in the CAN bus activities
+ * \param node Specifies the CAN node handle to be configured
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Can_Node_activate(IfxMultican_Can_Node *node);
+
+/** \brief Deactivate the CAN Node. Take out from participation in the CAN bus activities
+ * \param node Specifies the CAN node handle to be configured
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Can_Node_deactivate(IfxMultican_Can_Node *node);
+
+/** \brief Reset the CAN node
+ * \param node Specifies the CAN node handle to be configured
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Can_Node_deinit(IfxMultican_Can_Node *node);
+
+/** \brief Recovers the CAN node from bus off
+ * \param node Specifies the CAN node handle to be configured
+ * \return Status
+ *
+ * IfxMultican_Status status = IfxMultican_Status_busOff;
+ *
+ * while (status != IfxMultican_Status_ok)
+ * {
+ * status = IfxMultican_Can_Node_recoverBusOff(&canNode);
+ * }
+ *
+ */
+IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff(IfxMultican_Can_Node *node);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the actual message object configuration
+ * \param node Specifies the CAN node handle to be configured
+ * \param config Specifies the CAN node configuration
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_Can_Node_getConfig(IfxMultican_Can_Node *node, IfxMultican_Can_NodeConfig *config);
+
+/** \brief Initialize the CAN node
+ * \param node Specifies the CAN node handle to be configured
+ * \param config Specifies the CAN node configuration
+ * \return Status
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_Can_Node_init(IfxMultican_Can_Node *node, const IfxMultican_Can_NodeConfig *config);
+
+/** \brief Get default CAN node configuration
+ * \param config Specifies the CAN node configuration
+ * \param mcan pointer to the CAN handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_EXTERN void IfxMultican_Can_Node_initConfig(IfxMultican_Can_NodeConfig *config, IfxMultican_Can *mcan);
+
+/** \brief Sends the CAN node into bus off
+ * \param node Specifies the CAN node handle to be configured
+ * \return None
+ *
+ * IfxMultican_Can_Node_sendToBusOff(&canNode);
+ *
+ */
+IFX_EXTERN void IfxMultican_Can_Node_sendToBusOff(IfxMultican_Can_Node *node);
+
+/** \} */
+
+/** \addtogroup IfxLld_Multican_Can_Message_Objects
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Cancel pending TX request by invalidating the request\n
+ * Only when frame transmission has not been started
+ * \param msgObj pointer to the CAN message object handle
+ * \return TRUE if cancellation was successfully executed
+ */
+IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend(IfxMultican_Can_MsgObj *msgObj);
+
+/** \brief Clear the RX pending flag of a message object
+ * \param msgObj pointer to the CAN message object handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending(IfxMultican_Can_MsgObj *msgObj);
+
+/** \brief Clear the TX pending flag of a message object
+ * \param msgObj pointer to the CAN message object handle
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending(IfxMultican_Can_MsgObj *msgObj);
+
+/** \brief Reset the message object\n
+ * Append the message object to the end of idle list and reset message object registers
+ * \param msgObj pointer to the CAN message object handle
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Can_MsgObj_deinit(IfxMultican_Can_MsgObj *msgObj);
+
+/** \brief Get message object ID which has TX/RX pending flag from a message object group
+ * \param msgObj pointer to the CAN message object handle
+ * \param msgObjGroup Message object group
+ * \return Message Object Id
+ */
+IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId(IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup);
+
+/** \brief Get the message object status
+ * \param msgObj pointer to the CAN message object handle
+ * \return \ref IfxMultican_MsgObjStat bitfield
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus(IfxMultican_Can_MsgObj *msgObj);
+
+/** \brief Read a received CAN message
+ * \param msgObj pointer to the CAN message object handle
+ * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
+ * \param data Pointer to data (in words)
+ * \return IfxMultican_Status_newData: if the operation was successful\n
+ * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
+ * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
+ * IfxMultican_Status_receiveEmpty: if no message is been received
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data);
+
+/** \brief Read a received CAN message
+ * \param msgObj pointer to the CAN message object handle
+ * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
+ * \param data Pointer to data (in words)
+ * \return IfxMultican_Status_ok: if the operation was successful
+ * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the actual message object configuration
+ * \param msgObj pointer to the CAN message object handle
+ * \param config Pointer to the RAM buffer. Filled by this function
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_Can_MsgObj_getConfig(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Can_MsgObjConfig *config);
+
+/** \brief Initialize the message object
+ * \param msgObj pointer to the CAN message object handle
+ * \param config pointer to the CAN message object configuration
+ * \return Status
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_init(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Can_MsgObjConfig *config);
+
+/** \brief Initialise message config with default values and the given parameters
+ * \param config pointer to the CAN message object configuration
+ * \param node pointer to the CAN node handle to which the message object should be assigned
+ * \return None
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_EXTERN void IfxMultican_Can_MsgObj_initConfig(IfxMultican_Can_MsgObjConfig *config, IfxMultican_Can_Node *node);
+
+/** \brief Returns the RX pending flag of a message object.
+ * \param msgObj pointer to the CAN message object handle
+ * \return TRUE of the RX pending flag of a message object is set
+ */
+IFX_EXTERN boolean IfxMultican_Can_MsgObj_isRxPending(IfxMultican_Can_MsgObj *msgObj);
+
+/** \brief Returns the TX Request flag of a message object.
+ * \param msgObj pointer to the CAN message object handle
+ * \return TRUE of the TX Request flag of a message object is set
+ */
+IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTransmitRequested(IfxMultican_Can_MsgObj *msgObj);
+
+/** \brief Returns the TX pending flag of a message object.
+ * \param msgObj pointer to the CAN message object handle
+ * \return TRUE of the TX pending flag of a message object is set
+ */
+IFX_EXTERN boolean IfxMultican_Can_MsgObj_isTxPending(IfxMultican_Can_MsgObj *msgObj);
+
+/** \brief Read a received CAN message
+ * \param msgObj pointer to the CAN message object handle
+ * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful
+ * \return IfxMultican_Status_newData: if the operation was successful\n
+ * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
+ * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
+ * IfxMultican_Status_receiveEmpty: if no message is been received
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_readMessage(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg);
+
+/** \brief Send a CAN message
+ * \param msgObj pointer to the CAN message object handle
+ * \param msg Specifies the msg to be send
+ * \return IfxMultican_Status_ok: if the operation was successful\n
+ * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
+ *
+ * A coding example can be found in \ref IfxLld_Multican_Can_Usage
+ *
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_Can_MsgObj_sendMessage(IfxMultican_Can_MsgObj *msgObj, const IfxMultican_Message *msg);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE boolean IfxMultican_Can_MsgObj_cancelSend(IfxMultican_Can_MsgObj *msgObj)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+
+ return IfxMultican_MsgObj_cancelSend(hwObj);
+}
+
+
+IFX_INLINE void IfxMultican_Can_MsgObj_clearRxPending(IfxMultican_Can_MsgObj *msgObj)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+
+ IfxMultican_MsgObj_clearRxPending(hwObj);
+}
+
+
+IFX_INLINE void IfxMultican_Can_MsgObj_clearTxPending(IfxMultican_Can_MsgObj *msgObj)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+
+ IfxMultican_MsgObj_clearTxPending(hwObj);
+}
+
+
+IFX_INLINE void IfxMultican_Can_MsgObj_deinit(IfxMultican_Can_MsgObj *msgObj)
+{
+ IfxMultican_MsgObj_deinit(msgObj->node->mcan, msgObj->msgObjId);
+}
+
+
+IFX_INLINE IfxMultican_MsgObjId IfxMultican_Can_MsgObj_getPendingId(IfxMultican_Can_MsgObj *msgObj, IfxMultican_MsgObjGroup msgObjGroup)
+{
+ return IfxMultican_MsgObj_getPendingId(msgObj->node->mcan, msgObjGroup);
+}
+
+
+IFX_INLINE IfxMultican_MsgObjStat IfxMultican_Can_MsgObj_getStatus(IfxMultican_Can_MsgObj *msgObj)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(msgObj->node->mcan, msgObj->msgObjId);
+
+ return IfxMultican_MsgObj_getStatus(hwObj);
+}
+
+
+IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_readLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
+{
+ return IfxMultican_MsgObj_readLongFrame(msgObj->node->mcan, msgObj->msgObjId, msg, data);
+}
+
+
+IFX_INLINE IfxMultican_Status IfxMultican_Can_MsgObj_sendLongFrame(IfxMultican_Can_MsgObj *msgObj, IfxMultican_Message *msg, uint32 *data)
+{
+ return IfxMultican_MsgObj_sendLongFrame(msgObj->node->mcan, msgObj->msgObjId, msg, data);
+}
+
+
+IFX_INLINE void IfxMultican_Can_Node_activate(IfxMultican_Can_Node *node)
+{
+ Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
+
+ IfxMultican_Node_activate(hwNode);
+}
+
+
+IFX_INLINE void IfxMultican_Can_Node_deactivate(IfxMultican_Can_Node *node)
+{
+ Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
+ IfxMultican_Node_deactivate(hwNode);
+}
+
+
+IFX_INLINE void IfxMultican_Can_Node_deinit(IfxMultican_Can_Node *node)
+{
+ Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
+
+ IfxMultican_Node_deinit(hwNode);
+}
+
+
+IFX_INLINE IfxMultican_Status IfxMultican_Can_Node_recoverBusOff(IfxMultican_Can_Node *node)
+{
+ Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(node->mcan, node->nodeId);
+
+ return IfxMultican_Node_recoverBusOff(hwNode);
+}
+
+
+IFX_INLINE void IfxMultican_Can_deinit(IfxMultican_Can *mcan)
+{
+ IfxMultican_deinit(mcan->mcan);
+}
+
+
+#endif /* IFXMULTICAN_CAN_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Std/IfxMultican.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Std/IfxMultican.c
new file mode 100644
index 0000000..4cf2110
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Std/IfxMultican.c
@@ -0,0 +1,1297 @@
+/**
+ * \file IfxMultican.c
+ * \brief MULTICAN basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxMultican.h"
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Do actual long frame reading from the message object
+ * \param mcan Specifies the CAN module
+ * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
+ * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
+ * \param data Pointer to data (in words)
+ * \return None
+ */
+IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
+
+/** \brief Do actual message reading from the message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
+ * \return None
+ */
+IFX_STATIC void IfxMultican_MsgObj_doReadMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg);
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj)
+{
+ boolean result = FALSE;
+ Ifx_CAN_MO_CTR ctr;
+ Ifx_CAN_MO_STAT stat;
+
+ stat.U = hwObj->STAT.U;
+
+ if ((stat.B.TXRQ != 0) && (stat.B.NEWDAT != 0))
+ {
+ ctr.U = 0;
+ ctr.B.RESRTSEL = 1; /* take out from transmission */
+ hwObj->CTR.U = ctr.U;
+ result = TRUE;
+ }
+
+ return result;
+}
+
+
+void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
+{
+ Ifx_CAN_MO_CTR ctr;
+ ctr.U = 0;
+ ctr.U = 1U << flag;
+
+ hwObj->CTR.U = ctr.U;
+}
+
+
+void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
+ /* Remove the message object from any node */
+ /* Append message object to the end of the list */
+ IfxMultican_setListCommand(mcan, 0x2, 0, msgObjId);
+
+ hwObj->CTR.U = 0x0000FFFFUL; /* to be written first */
+
+ hwObj->FCR.U = 0x00000000UL;
+ hwObj->FGPR.U = 0x00000000UL;
+ hwObj->IPR.U = 0x00000000UL;
+ hwObj->AMR.U = 0x3FFFFFFFUL;
+ hwObj->DATAL.U = 0x00000000UL;
+ hwObj->DATAH.U = 0x00000000UL;
+ hwObj->AR.U = 0x00000000UL;
+}
+
+
+IFX_STATIC void IfxMultican_MsgObj_doReadLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
+
+ IfxMultican_MsgObjId botMsgObjId = hwObj->FGPR.B.BOT;
+ Ifx_CAN_MO *hwBotObj = IfxMultican_MsgObj_getPointer(mcan, botMsgObjId);
+
+ IfxMultican_MsgObjId topMsgObjId = hwObj->FGPR.B.TOP;
+ Ifx_CAN_MO *hwTopObj = IfxMultican_MsgObj_getPointer(mcan, topMsgObjId);
+
+ /* for standard message object and FIFO message objects*/
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
+
+ /* copy the length code from hardware */
+ IfxMultican_DataLengthCode lengthCode = IfxMultican_MsgObj_getDataLengthCode(hwObj);
+
+ /* read the data from the data registers */
+ if (lengthCode > IfxMultican_DataLengthCode_0) /* no.of bytes 0 to 8 */
+ {
+ *data++ = hwObj->DATAL.U;
+ *data++ = hwObj->DATAH.U;
+ }
+
+ /* read from bottom message object extended data registers */
+ if (lengthCode > IfxMultican_DataLengthCode_8)
+ {
+ *data++ = hwBotObj->EDATA0.U;
+ }
+
+ if (lengthCode > IfxMultican_DataLengthCode_12)
+ {
+ *data++ = hwBotObj->EDATA1.U;
+ }
+
+ if (lengthCode > IfxMultican_DataLengthCode_16)
+ {
+ *data++ = hwBotObj->EDATA2.U;
+ }
+
+ if (lengthCode > IfxMultican_DataLengthCode_20)
+ {
+ *data++ = hwBotObj->EDATA3.U;
+ }
+
+ if (lengthCode > IfxMultican_DataLengthCode_24)
+ {
+ *data++ = hwBotObj->EDATA4.U;
+ *data++ = hwBotObj->EDATA5.U;
+ }
+
+ if (lengthCode > IfxMultican_DataLengthCode_32)
+ {
+ *data++ = hwBotObj->EDATA6.U;
+ /* read from top message object extended data registers */
+ *data++ = hwTopObj->EDATA0.U;
+ *data++ = hwTopObj->EDATA1.U;
+ *data++ = hwTopObj->EDATA2.U;
+ }
+
+ if (lengthCode > IfxMultican_DataLengthCode_48)
+ {
+ *data++ = hwTopObj->EDATA3.U;
+ *data++ = hwTopObj->EDATA4.U;
+ *data++ = hwTopObj->EDATA5.U;
+ *data = hwTopObj->EDATA6.U;
+ }
+
+ msg->fastBitRate = hwObj->FCR.B.BRS;
+
+ msg->lengthCode = lengthCode;
+
+ /* copy the ID from the hardware */
+ msg->id = IfxMultican_MsgObj_getMessageId(hwObj);
+}
+
+
+IFX_STATIC void IfxMultican_MsgObj_doReadMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
+{
+ /* for standard message object and FIFO message objects*/
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
+
+ /* read the data from the data registers */
+ msg->data[0] = hwObj->DATAL.U;
+ msg->data[1] = hwObj->DATAH.U;
+
+ /* copy the length code from hardware */
+ msg->lengthCode = IfxMultican_MsgObj_getDataLengthCode(hwObj);
+
+ /* copy the ID from the hardware */
+ msg->id = IfxMultican_MsgObj_getMessageId(hwObj);
+}
+
+
+IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup)
+{
+ uint32 index = mcan->MSID[msgObjGroup].U;
+ IfxMultican_MsgObjId msgObjId = -1;
+
+ if (index != 0x20U)
+ {
+ mcan->MSPND[msgObjGroup].U = ~(1UL << index);
+ msgObjId = index + (msgObjGroup << 5);
+ }
+
+ return msgObjId;
+}
+
+
+IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj)
+{
+ IfxMultican_MsgObjStat status;
+
+ status.U = hwObj->STAT.U;
+
+ return status;
+}
+
+
+boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
+{
+ uint32 shift = (1U << flag);
+
+ return (hwObj->STAT.U & shift) ? TRUE : FALSE;
+}
+
+
+IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
+ IfxMultican_Status status = IfxMultican_Status_ok;
+
+ boolean longFrame = (hwObj->FCR.B.FDF != 0) ? TRUE : FALSE;
+
+ if (longFrame)
+ {
+ /* if new data available in the message object */
+ if (hwObj->STAT.B.NEWDAT != 0)
+ {
+ Ifx_CAN_MO_STAT stat;
+ IfxMultican_MsgObj_doReadLongFrame(mcan, msgObjId, msg, data);
+ stat = hwObj->STAT; /* Cache the status after reading to reduce message lost propability */
+
+ if (stat.B.RXUPD != 0)
+ { /* Data might be inconsistent (update while reading), declare as message lost, data will be read next time the API is called */
+ status = IfxMultican_Status_messageLost;
+ }
+ else if (stat.B.NEWDAT != 0)
+ { /* Data might be inconsistent (update while reading), force massage lost flag, read new incoming data */
+ Ifx_CAN_MO_STAT stat2;
+ status = IfxMultican_Status_messageLost;
+ /* perform read from the hardware */
+ IfxMultican_MsgObj_doReadLongFrame(mcan, msgObjId, msg, data);
+
+ stat2 = hwObj->STAT; /* Cache the status after reading */
+
+ if ((stat2.B.NEWDAT == 0) && (stat2.B.RXUPD == 0))
+ {
+ status |= IfxMultican_Status_newData;
+ }
+ else
+ { /* Return message lost at 2nd read attempt, data will be read next time the API is called*/
+ }
+ }
+ else
+ {
+ status = IfxMultican_Status_newData;
+ }
+
+ if (stat.B.MSGLST != 0)
+ { /* At least on message has been lost */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
+ status |= IfxMultican_Status_messageLost;
+ }
+ }
+ else
+ {
+ status = IfxMultican_Status_receiveEmpty;
+ }
+ }
+ else
+ {
+ /* use normal read message API */
+ }
+
+ return status;
+}
+
+
+IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg)
+{
+ IfxMultican_Status status = IfxMultican_Status_ok;
+
+ /* if new data available in the message object */
+ if (hwObj->STAT.B.NEWDAT != 0)
+ {
+ Ifx_CAN_MO_STAT stat;
+ IfxMultican_MsgObj_doReadMessage(hwObj, msg);
+ stat = hwObj->STAT; /* Cache the status after reading to reduce message lost propability */
+
+ if (stat.B.RXUPD != 0)
+ { /* Data might be inconsistent (update while reading), declare as message lost, data will be read next time the API is called */
+ status = IfxMultican_Status_messageLost;
+ }
+ else if (stat.B.NEWDAT != 0)
+ { /* Data might be inconsistent (update while reading), force massage lost flag, read new incoming data */
+ Ifx_CAN_MO_STAT stat2;
+ status = IfxMultican_Status_messageLost;
+ /* perform read from the hardware */
+ IfxMultican_MsgObj_doReadMessage(hwObj, msg);
+
+ stat2 = hwObj->STAT; /* Cache the status after reading */
+
+ if ((stat2.B.NEWDAT == 0) && (stat2.B.RXUPD == 0))
+ {
+ status |= IfxMultican_Status_newData;
+ }
+ else
+ { /* Return message lost at 2nd read attempt, data will be read next time the API is called*/
+ }
+ }
+ else
+ {
+ status = IfxMultican_Status_newData;
+ }
+
+ if (stat.B.MSGLST != 0)
+ { /* At least on message has been lost */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageLost);
+ status |= IfxMultican_Status_messageLost;
+ }
+ }
+ else
+ {
+ status = IfxMultican_Status_receiveEmpty;
+ }
+
+ return status;
+}
+
+
+IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data)
+{
+ Ifx_CAN_MO *hwObj = IfxMultican_MsgObj_getPointer(mcan, msgObjId);
+ IfxMultican_Status status = IfxMultican_Status_ok;
+
+ /* get the base address of top and bottom message objects */
+ IfxMultican_MsgObjId botMsgObjId = hwObj->FGPR.B.BOT;
+ Ifx_CAN_MO *hwBotObj = IfxMultican_MsgObj_getPointer(mcan, botMsgObjId);
+
+ IfxMultican_MsgObjId topMsgObjId = hwObj->FGPR.B.TOP;
+ Ifx_CAN_MO *hwTopObj = IfxMultican_MsgObj_getPointer(mcan, topMsgObjId);
+
+ boolean longFrame = (hwObj->FCR.B.FDF != 0) ? TRUE : FALSE;
+
+ /* in either of the below cases, the two conditions FDEN = 0, EDl = 1 and BRS = 0/1 will not reach */
+ /* long frame CAN FD */
+ /* FDEN = 1, EDL = 1 and BRS = 0/1 */
+ if (longFrame)
+ {
+ if (hwObj->STAT.B.TXRQ)
+ { /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
+ status = IfxMultican_Status_notSentBusy;
+ }
+ else
+ {
+ /* MSGVAL: Set message as not valid */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
+
+ if (msg->lengthCode > IfxMultican_DataLengthCode_0) /* no.of bytes 0 to 8 */
+ {
+ hwObj->DATAL.U = *data++;
+ hwObj->DATAH.U = *data++;
+ }
+
+ /* load bottom message object extended data registers */
+ if (msg->lengthCode > IfxMultican_DataLengthCode_8)
+ {
+ hwBotObj->EDATA0.U = *data++;
+ }
+
+ if (msg->lengthCode > IfxMultican_DataLengthCode_12)
+ {
+ hwBotObj->EDATA1.U = *data++;
+ }
+
+ if (msg->lengthCode > IfxMultican_DataLengthCode_16)
+ {
+ hwBotObj->EDATA2.U = *data++;
+ }
+
+ if (msg->lengthCode > IfxMultican_DataLengthCode_20)
+ {
+ hwBotObj->EDATA3.U = *data++;
+ }
+
+ if (msg->lengthCode > IfxMultican_DataLengthCode_24)
+ {
+ hwBotObj->EDATA4.U = *data++;
+ hwBotObj->EDATA5.U = *data++;
+ }
+
+ if (msg->lengthCode > IfxMultican_DataLengthCode_32)
+ {
+ hwBotObj->EDATA6.U = *data++;
+ /* load bottom message object extended data registers */
+ hwTopObj->EDATA0.U = *data++;
+ hwTopObj->EDATA1.U = *data++;
+ hwTopObj->EDATA2.U = *data++;
+ }
+
+ if (msg->lengthCode > IfxMultican_DataLengthCode_48)
+ {
+ hwTopObj->EDATA3.U = *data++;
+ hwTopObj->EDATA4.U = *data++;
+ hwTopObj->EDATA5.U = *data++;
+ hwTopObj->EDATA6.U = *data;
+ }
+
+ /* for long message */
+ {
+ /* set ID */
+ boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
+ IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
+
+ /* set data length code */
+ IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
+
+ /* set bit rate switch (fast bit rate enable/disable) */
+ IfxMultican_MsgObj_setBitRateSwitch(hwObj, msg->fastBitRate);
+ }
+
+ /* --- flags configuration --- */
+ {
+ /* set new data flag */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
+
+ /* set message as valid */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
+
+ /* set RTSEL */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receiveTransmitSelected);
+
+ /* set TXRQ */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
+ }
+ }
+ }
+
+ /* standard frame */
+ /* FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
+ else
+ {
+ /* use normal send message API */
+ status = IfxMultican_Status_notInitialised;
+ }
+
+ return status;
+}
+
+
+IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
+{
+ IfxMultican_Status status = IfxMultican_Status_ok;
+
+ if (hwObj->STAT.B.TXRQ)
+ { /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
+ status = IfxMultican_Status_notSentBusy;
+ }
+ else
+ {
+ /* MSGVAL: Set message as not valid */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
+
+ /* for standard and FIFO message object */
+ hwObj->DATAL.U = msg->data[0]; /* Set the new data */
+ hwObj->DATAH.U = msg->data[1]; /* Set the new data */
+
+ /* for standard and FIFO message object */
+ {
+ /* set ID */
+ boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
+ IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
+
+ /* standard frame */
+ /* in case of FD standard frame, FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
+ /* set data length code */
+ IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
+ }
+
+ /* --- flags configuration --- */
+
+ /* for standard and FIFO message object */
+ {
+ /* set new data flag */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
+
+ /* set message as valid, in case of FIFO mSGVAL has to be set before setting it to each slave object */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
+
+ /* set TXRQ, should not be set for FIFO base object */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
+ }
+ }
+
+ return status;
+}
+
+
+IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg)
+{
+ IfxMultican_Status status = IfxMultican_Status_ok;
+
+ if (hwObj->STAT.B.TXRQ)
+ {
+ /* previous message was not transferred, e.g. due to busy bus, BUS-OFF or others */
+ status = IfxMultican_Status_notSentBusy;
+ }
+ else
+ {
+ /* Clear TXEN0 to update the data FIFO message object */
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
+
+ /* for standard and FIFO message object */
+ hwObj->DATAL.U = msg->data[0]; /* Set the new data */
+ hwObj->DATAH.U = msg->data[1]; /* Set the new data */
+
+ /* set TXEN0, to enable transmission of the updated object */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitEnable0);
+
+ /* for standard and FIFO message object */
+ {
+ /* set ID */
+ boolean extendedFrame = IfxMultican_MsgObj_isExtendedFrame(hwObj);
+ IfxMultican_MsgObj_setMessageId(hwObj, msg->id, extendedFrame);
+
+ /* standard frame */
+ /* in case of FD standard frame, FDEN = 0/1, EDL = 0 and BRS = 0 (BRS = 1 also has no effect here) */
+ /* set data length code */
+ IfxMultican_MsgObj_setDataLengthCode(hwObj, msg->lengthCode);
+ }
+
+ /* --- flags configuration --- */
+
+ /* for standard and FIFO message object */
+ {
+ /* set new data flag */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_newData);
+
+ /* set message as valid, in case of FIFO mSGVAL has to be set before setting it to each slave object */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_messageValid);
+
+ /* set TXRQ, should not be set for FIFO base object */
+ IfxMultican_MsgObj_setStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitRequest);
+ }
+ }
+
+ return status;
+}
+
+
+void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask)
+{
+ Ifx_CAN_MO_CTR ctr;
+
+ ctr.U = 0;
+ ctr.B.RESMSGVAL = 1; /* MSGVAL: Set message as not valid */
+ hwObj->CTR.U = ctr.U;
+
+ hwObj->AMR.B.AM = accMask << ((extend != 0) ? 0 : 18);
+ hwObj->AR.B.IDE = (id << ((extend != 0) ? 0 : 18)) | (extend << 29);
+
+ ctr.U = 0;
+ ctr.B.SETMSGVAL = 1; /* MSGVAL: Set message as valid */
+ hwObj->CTR.U = ctr.U;
+}
+
+
+void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag)
+{
+ Ifx_CAN_MO_CTR ctr;
+ ctr.U = 0;
+
+ ctr.U = 1U << (flag + 16);
+
+ hwObj->CTR.U = ctr.U;
+}
+
+
+void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode)
+{
+ hwNode->CR.U = 0x00000001;
+ hwNode->SR.U = 0x00000000;
+ hwNode->IPR.U = 0x00000000;
+ hwNode->PCR.U = 0x00000000;
+ hwNode->BTEVR.U = 0x00000000;
+ hwNode->ECNT.U = 0x00600000;
+ hwNode->FCR.U = 0x00000000;
+}
+
+
+boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(rxd->pin.port, rxd->pin.pinIndex, mode);
+ IfxPort_setPinPadDriver(rxd->pin.port, rxd->pin.pinIndex, padDriver);
+ hwNode->PCR.B.RXSEL = rxd->select;
+
+ return TRUE;
+}
+
+
+boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(txd->pin.port, txd->pin.pinIndex, mode, txd->select);
+ IfxPort_setPinPadDriver(txd->pin.port, txd->pin.pinIndex, padDriver);
+
+ return TRUE;
+}
+
+
+IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode)
+{
+ IfxMultican_Status status = IfxMultican_Status_busOff;
+
+ boolean busOffState = hwNode->SR.B.BOFF;
+ boolean errorWarningStatus = hwNode->SR.B.EWRN;
+
+ /* if the node is in bus off state, initiaite the recovery process */
+ if ((busOffState != 0) && (hwNode->ECNT.B.TEC > 254))
+ {
+ status = IfxMultican_Status_busOff;
+
+ /* reset error counters */
+ hwNode->ECNT.B.TEC = 0x01;
+ hwNode->ECNT.B.REC = 0x01;
+
+ /* clear error warning status */
+ hwNode->SR.B.EWRN = 0;
+
+ /* clear ALERT status */
+ hwNode->SR.B.ALERT = 0;
+
+ /* disable node INIT = 1 */
+ IfxMultican_Node_deactivate(hwNode);
+ }
+
+ /* during recovery process, if REC counter reaches 0x60 */
+ else if ((busOffState != 0) && (errorWarningStatus != 0))
+ {
+ status = IfxMultican_Status_notInitialised;
+ }
+
+ /* if the recovery process is been finished or not in Bus off mode */
+ else if ((busOffState == 0) && (errorWarningStatus == 0))
+ {
+ /* enable node INIT = 0 */
+ IfxMultican_Node_activate(hwNode);
+
+ status = IfxMultican_Status_ok;
+ }
+
+ return status;
+}
+
+
+void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
+{
+ sint32 maxBRP = IFX_CAN_N_BTR_BRP_MSK + 1;
+ sint32 minBRP = 1;
+ sint32 maxTSEG1 = IFX_CAN_N_BTR_TSEG1_MSK + 1;
+ sint32 minTSEG1 = 3;
+ sint32 maxTSEG2 = IFX_CAN_N_BTR_TSEG2_MSK + 1;
+ sint32 minTSEG2 = 2;
+ sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
+ sint32 minTBAUD = 8;
+
+ sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
+ sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
+ float32 bestError = 10000.0;
+
+ /*
+ * Bit timing & sampling
+ * Tq = (BRP+1)/Fcan if DIV8 = 0
+ * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
+ * TSync = 1.Tq
+ * TSeg1 = (TSEG1+1)*Tq >= 3Tq
+ * TSeg2 = (TSEG2+1)*Tq >= 2Tq
+ * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
+ *
+ * Resynchronization:
+ *
+ * Tsjw = (SJW + 1)*Tq
+ * TSeg1 >= Tsjw + Tprop
+ * TSeg2 >= Tsjw
+ */
+
+ /* search for best baudrate */
+ bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
+
+ for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
+ {
+ float32 Fquanta = moduleFreq / tempBRP;
+ tempTBAUD = Fquanta / baudrate;
+
+ if (tempTBAUD == 0)
+ {
+ break; /* to avoid division by 0 */
+ }
+
+ float32 tempBaudrate = Fquanta / tempTBAUD;
+ float32 error = __absf(tempBaudrate - baudrate);
+
+ if (tempTBAUD < minTBAUD)
+ {
+ break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
+ }
+
+ if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
+ {
+ bestBRP = tempBRP;
+ bestTBAUD = tempTBAUD;
+ bestError = error;
+
+ if ((tempTBAUD <= 20) && (error < 0.1))
+ {
+ break; /* optimal condition */
+ }
+ }
+ }
+
+ if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
+ {
+ bestBRP = maxBRP;
+ bestTBAUD = tempTBAUD;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
+ {
+ bestBRP = minBRP;
+ bestTBAUD = tempTBAUD;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ /* search for best sample point */
+ bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
+
+ bestTSEG1 = maxTSEG1;
+
+ for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
+ {
+ sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
+ sint32 error = __abs(tempSamplePoint - samplePoint);
+
+ if (bestError > (float)error)
+ {
+ bestTSEG1 = tempTSEG1;
+ bestError = (float)error;
+ }
+
+ if (tempSamplePoint < samplePoint)
+ {
+ if (tempTSEG1 == maxTSEG1)
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+ else
+ {
+ /*least possible error */
+ }
+
+ break; /* least possible error has already occured */
+ }
+ }
+
+ if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
+ {
+ bestTSEG1 = minTSEG1;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
+
+ if (bestTSEG2 > maxTSEG2)
+ {
+ bestTSEG2 = maxTSEG2;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ if (bestTSEG2 < minTSEG2)
+ {
+ bestTSEG2 = minTSEG2;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ /* search for best SJW */
+ bestError = 10000;
+
+ for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
+ {
+ sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
+ sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
+
+ if (bestError > error)
+ {
+ bestSJW = tempSJW;
+ bestError = (float)error;
+ }
+ }
+
+ {
+ Ifx_CAN_N_BTR nbtr;
+ nbtr.U = 0;
+ nbtr.B.BRP = bestBRP - 1;
+ nbtr.B.SJW = bestSJW - 1;
+ nbtr.B.TSEG1 = bestTSEG1 - 1;
+ nbtr.B.TSEG2 = bestTSEG2 - 1;
+ nbtr.B.DIV8 = 0;
+ //nbtr.B.FTX = 0; /* TTCAN only */
+
+ hwNode->BTR.U = nbtr.U;
+ }
+}
+
+
+void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
+{
+ sint32 maxBRP = IFX_CAN_N_FBTR_FBRP_MSK + 1;
+ sint32 minBRP = 1;
+ sint32 maxTSEG1 = IFX_CAN_N_FBTR_FTSEG1_MSK + 1;
+ sint32 minTSEG1 = 3;
+ sint32 maxTSEG2 = IFX_CAN_N_FBTR_FTSEG2_MSK + 1;
+ sint32 minTSEG2 = 2;
+ sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
+ sint32 minTBAUD = 8;
+
+ sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
+ sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
+ float32 bestError = 10000.0;
+ /*
+ * Bit timing & sampling
+ * Tq = (BRP+1)/Fcan if DIV8 = 0
+ * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
+ * TSync = 1.Tq
+ * TSeg1 = (TSEG1+1)*Tq >= 3Tq
+ * TSeg2 = (TSEG2+1)*Tq >= 2Tq
+ * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
+ *
+ * Resynchronization:
+ *
+ * Tsjw = (SJW + 1)*Tq
+ * TSeg1 >= Tsjw + Tprop
+ * TSeg2 >= Tsjw
+ */
+
+ /* search for best baudrate */
+ bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
+
+ for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
+ {
+ float32 Fquanta = moduleFreq / tempBRP;
+ tempTBAUD = Fquanta / baudrate;
+
+ if (tempTBAUD == 0)
+ {
+ break; /* to avoid division by 0 */
+ }
+
+ float32 tempBaudrate = Fquanta / tempTBAUD;
+ float32 error = __absf(tempBaudrate - baudrate);
+
+ if (tempTBAUD < minTBAUD)
+ {
+ break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
+ }
+
+ if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
+ {
+ bestBRP = tempBRP;
+ bestTBAUD = tempTBAUD;
+ bestError = (float)error;
+
+ if ((tempTBAUD <= 20) && (error < 0.1))
+ {
+ break; /* optimal condition */
+ }
+ }
+ }
+
+ if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
+ {
+ bestBRP = maxBRP;
+ bestTBAUD = tempTBAUD;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
+ {
+ bestBRP = minBRP;
+ bestTBAUD = tempTBAUD;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ /* search for best sample point */
+ bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
+
+ bestTSEG1 = maxTSEG1;
+
+ for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
+ {
+ sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
+ sint32 error = __abs(tempSamplePoint - samplePoint);
+
+ if (bestError > error)
+ {
+ bestTSEG1 = tempTSEG1;
+ bestError = (float)error;
+ }
+
+ if (tempSamplePoint < samplePoint)
+ {
+ if (tempTSEG1 == maxTSEG1)
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+ else
+ {
+ /*least possible error */
+ }
+
+ break; /* least possible error has already occured */
+ }
+ }
+
+ if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
+ {
+ bestTSEG1 = minTSEG1;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
+
+ if (bestTSEG2 > maxTSEG2)
+ {
+ bestTSEG2 = maxTSEG2;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ if (bestTSEG2 < minTSEG2)
+ {
+ bestTSEG2 = minTSEG2;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ /* search for best SJW */
+ bestError = 10000;
+
+ for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
+ {
+ sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
+ sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
+
+ if (bestError > error)
+ {
+ bestSJW = tempSJW;
+ bestError = (float)error;
+ }
+ }
+
+ {
+ Ifx_CAN_N_FBTR nfbtr;
+ nfbtr.U = 0;
+ nfbtr.B.FBRP = bestBRP - 1;
+ nfbtr.B.FSJW = bestSJW - 1;
+ nfbtr.B.FTSEG1 = bestTSEG1 - 1;
+ nfbtr.B.FTSEG2 = bestTSEG2 - 1;
+
+ hwNode->FBTR.U = nfbtr.U;
+ }
+}
+
+
+void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth)
+{
+ sint32 maxBRP = IFX_CAN_N_BTEVR_BRP_MSK + 1;
+ sint32 minBRP = 1;
+ sint32 maxTSEG1 = IFX_CAN_N_BTEVR_TSEG1_MSK + 1;
+ sint32 minTSEG1 = 3;
+ sint32 maxTSEG2 = IFX_CAN_N_BTEVR_TSEG2_MSK + 1;
+ sint32 minTSEG2 = 2;
+ sint32 maxTBAUD = maxTSEG1 + maxTSEG2 + 1;
+ sint32 minTBAUD = 8;
+
+ sint32 tempBRP, tempSJW, tempTSEG1, tempTBAUD;
+ sint32 bestBRP = 0, bestSJW = 1, bestTBAUD = 8, bestTSEG1 = 3, bestTSEG2 = 2;
+ float32 bestError = 10000.0;
+ /*
+ * Bit timing & sampling
+ * Tq = (BRP+1)/Fcan if DIV8 = 0
+ * Tq = 8*(BRP+1)/Fcan if DIV8 = 1
+ * TSync = 1.Tq
+ * TSeg1 = (TSEG1+1)*Tq >= 3Tq
+ * TSeg2 = (TSEG2+1)*Tq >= 2Tq
+ * Bit Time = TSync + TSeg1 + TSeg2 >= 8Tq
+ *
+ * Resynchronization:
+ *
+ * Tsjw = (SJW + 1)*Tq
+ * TSeg1 >= Tsjw + Tprop
+ * TSeg2 >= Tsjw
+ */
+
+ /* search for best baudrate */
+ bestError = baudrate * 0.05; /* 5% tolerance in baudrate as max error */
+
+ for (tempBRP = 1; tempBRP <= maxBRP; tempBRP++)
+ {
+ float32 Fquanta = moduleFreq / tempBRP;
+ tempTBAUD = Fquanta / baudrate;
+
+ if (tempTBAUD == 0)
+ {
+ break; /* to avoid division by 0 */
+ }
+
+ float32 tempBaudrate = Fquanta / tempTBAUD;
+ float32 error = __absf(tempBaudrate - baudrate);
+
+ if (tempTBAUD < minTBAUD)
+ {
+ break; /* below the minimum allowed limits, break is required otherwise TSEG1 and TSEG2 may result in negitive values */
+ }
+
+ if ((tempTBAUD <= maxTBAUD) && (bestError >= error))
+ {
+ bestBRP = tempBRP;
+ bestTBAUD = tempTBAUD;
+ bestError = (float)error;
+
+ if ((tempTBAUD <= 20) && (error < 0.1))
+ {
+ break; /* optimal condition */
+ }
+ }
+ }
+
+ if ((bestBRP == 0) && (tempBRP == (maxBRP + 1)))
+ {
+ bestBRP = maxBRP;
+ bestTBAUD = tempTBAUD;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ if ((bestBRP == 0) && (tempTBAUD < minTBAUD))
+ {
+ bestBRP = minBRP;
+ bestTBAUD = tempTBAUD;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ /* search for best sample point */
+ bestError = samplePoint * 0.15; /* 15% tolerance in sample point as max error */
+
+ bestTSEG1 = maxTSEG1;
+
+ for (tempTSEG1 = maxTSEG1; tempTSEG1 >= minTSEG1; tempTSEG1--)
+ {
+ sint32 tempSamplePoint = ((tempTSEG1 + 1) * 10000) / bestTBAUD;
+ sint32 error = __abs(tempSamplePoint - samplePoint);
+
+ if (bestError > error)
+ {
+ bestTSEG1 = tempTSEG1;
+ bestError = (float)error;
+ }
+
+ if (tempSamplePoint < samplePoint)
+ {
+ if (tempTSEG1 == maxTSEG1)
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+ else
+ {
+ /*least possible error */
+ }
+
+ break; /* least possible error has already occured */
+ }
+ }
+
+ if ((tempTSEG1 == (minTSEG1 - 1)) && (bestTSEG1 == maxTSEG1))
+ {
+ bestTSEG1 = minTSEG1;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ bestTSEG2 = bestTBAUD - bestTSEG1 - 1;
+
+ if (bestTSEG2 > maxTSEG2)
+ {
+ bestTSEG2 = maxTSEG2;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ if (bestTSEG2 < minTSEG2)
+ {
+ bestTSEG2 = minTSEG2;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+
+ /* search for best SJW */
+ bestError = 10000;
+
+ for (tempSJW = 1; tempSJW <= bestTSEG2; tempSJW++)
+ {
+ sint32 tempSynchJumpWidth = (tempSJW * 10000) / bestTBAUD;
+ sint32 error = __abs(tempSynchJumpWidth - synchJumpWidth);
+
+ if (bestError > error)
+ {
+ bestSJW = tempSJW;
+ bestError = (float)error;
+ }
+ }
+
+ {
+ Ifx_CAN_N_BTEVR nbtevr;
+ nbtevr.U = 0;
+ nbtevr.B.BRP = bestBRP - 1;
+ nbtevr.B.SJW = bestSJW - 1;
+ nbtevr.B.TSEG1 = bestTSEG1 - 1;
+ nbtevr.B.TSEG2 = bestTSEG2 - 1;
+ nbtevr.B.DIV8 = 0;
+ //nbtr.B.FTX = 0; /* TTCAN only */
+
+ hwNode->BTEVR.U = nbtevr.U;
+ }
+}
+
+
+void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth)
+{
+ Ifx_CAN_N_BTR nbtr = {.U = btr};
+ uint32 tempBRP = 1U + nbtr.B.BRP;
+ uint32 tempSJW = 1U + nbtr.B.SJW;
+ uint32 tempTSEG1 = 1U + nbtr.B.TSEG1;
+ uint32 tempTSEG2 = 1U + nbtr.B.TSEG2;
+ uint32 tempDIV8 = (nbtr.B.DIV8 != 0) ? 8U : 1U;
+
+ uint32 tempTSEG = 1 + tempTSEG1 + tempTSEG2;
+
+ *baudrate = (uint32)(moduleFreq / (float32)(tempDIV8 * tempBRP * tempTSEG));
+ *samplePoint = (uint16)(((float32)tempTSEG1) * 10000 / ((float32)(tempTSEG)));
+ *synchJumpWidth = (uint16)(((float32)tempSJW) * 10000 / ((float32)(tempTSEG)));
+}
+
+
+void IfxMultican_deinit(Ifx_CAN *mcan)
+{
+ // should use kernel reset functionality!
+ uint16 i;
+
+ /* Ifx_CAN.CLC is reset last */
+ for (i = 0; i < IFXMULTICAN_NUM_MESSAGE_OBJECTS; i++)
+ {
+ IfxMultican_MsgObj_deinit(mcan, i);
+ }
+
+ for (i = 0; i < IFXMULTICAN_NUM_NODES; i++)
+ {
+ Ifx_CAN_N *hwNode = IfxMultican_Node_getPointer(mcan, IfxMultican_NodeId_0 + i);
+
+ IfxMultican_Node_deinit(hwNode);
+ }
+
+ for (i = 0; i < IFXMULTICAN_NUM_SRC; i++)
+ {
+ MODULE_SRC.CAN.CAN[0].INT[i].U = 0x00000000;
+ }
+
+ for (i = 0; i < 8; i++)
+ {
+ mcan->MSPND[i].U = 0x00000000;
+ }
+
+ mcan->MSIMASK.U = 0x00000000;
+ mcan->MCR.U = 0x00000000;
+ {
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ mcan->FDR.U = 0x00000000;
+ IfxScuWdt_setCpuEndinit(passwd);
+ IfxScuWdt_clearCpuEndinit(passwd);
+ mcan->CLC.U = 0x00000001;
+ IfxScuWdt_setCpuEndinit(passwd);
+ }
+}
+
+
+volatile Ifx_SRC_SRCR *IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId)
+{
+ return &(MODULE_SRC.CAN.CAN[0].INT[srcId]);
+}
+
+
+void IfxMultican_resetModule(Ifx_CAN *can)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ can->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ can->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == can->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ can->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1)
+{
+ Ifx_CAN_PANCTR panctr;
+
+ panctr.B.PANAR1 = arg1;
+ panctr.B.PANAR2 = arg2;
+ panctr.B.PANCMD = cmd;
+
+ /** - write to CAN_PANCTR */
+ mcan->PANCTR.U = panctr.U;
+
+ IfxMultican_waitListReady(mcan);
+}
+
+
+IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican)
+{
+ uint32 index;
+ IfxMultican_Index result;
+
+ result = IfxMultican_Index_none;
+
+ for (index = 0; index < IFXMULTICAN_NUM_MODULES; index++)
+ {
+ if (IfxMultican_cfg_indexMap[index].module == multican)
+ {
+ result = (IfxMultican_Index)IfxMultican_cfg_indexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+Ifx_CAN *IfxMultican_getAddress(IfxMultican_Index multican)
+{
+ Ifx_CAN *module;
+
+ if (multican < IFXMULTICAN_NUM_MODULES)
+ {
+ module = (Ifx_CAN *)IfxMultican_cfg_indexMap[multican].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Std/IfxMultican.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Std/IfxMultican.h
new file mode 100644
index 0000000..c7e3272
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Std/IfxMultican.h
@@ -0,0 +1,1721 @@
+/**
+ * \file IfxMultican.h
+ * \brief MULTICAN basic functionality
+ * \ingroup IfxLld_Multican
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Multican_Std_Enum Enumerations
+ * \ingroup IfxLld_Multican_Std
+ * \defgroup IfxLld_Multican_Std_General General functions
+ * \ingroup IfxLld_Multican_Std
+ * \defgroup IfxLld_Multican_Std_Node CAN Nodes
+ * \ingroup IfxLld_Multican_Std
+ * \defgroup IfxLld_Multican_Std_Message Message
+ * \ingroup IfxLld_Multican_Std
+ * \defgroup IfxLld_Multican_Std_Message_Objects Message Objects
+ * \ingroup IfxLld_Multican_Std
+ * \defgroup IfxLld_Multican_Std_Interrupts Interrupts
+ * \ingroup IfxLld_Multican_Std
+ */
+
+#ifndef IFXMULTICAN_H
+#define IFXMULTICAN_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxMultican_cfg.h"
+#include "Src/Std/IfxSrc.h"
+#include "_PinMap/IfxMultican_PinMap.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxCan_bf.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "_Utilities/Ifx_Assert.h"
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+/** \brief Message object ID, 0 .. \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS
+ */
+typedef sint32 IfxMultican_MsgObjId;
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Multican_Std_Enum
+ * \{ */
+/** \brief CAN input clock selection
+ */
+typedef enum
+{
+ IfxMultican_ClockSelect_noClock = 0, /**< \brief No clock supplied */
+ IfxMultican_ClockSelect_fclc = 1, /**< \brief fMULTICAN */
+ IfxMultican_ClockSelect_fosc0 = 2, /**< \brief Oscillator Clock */
+ IfxMultican_ClockSelect_fErayPll = 4 /**< \brief E-Ray clock */
+} IfxMultican_ClockSelect;
+
+/** \brief CAN frame data length code
+ * Definition in Ifx_CAN.MOFCRx.DLC
+ */
+typedef enum
+{
+ IfxMultican_DataLengthCode_0 = 0, /**< \brief 0 data bytes */
+ IfxMultican_DataLengthCode_1, /**< \brief 1 data bytes */
+ IfxMultican_DataLengthCode_2, /**< \brief 2 data bytes */
+ IfxMultican_DataLengthCode_3, /**< \brief 3 data bytes */
+ IfxMultican_DataLengthCode_4, /**< \brief 4 data bytes */
+ IfxMultican_DataLengthCode_5, /**< \brief 5 data bytes */
+ IfxMultican_DataLengthCode_6, /**< \brief 6 data bytes */
+ IfxMultican_DataLengthCode_7, /**< \brief 7 data bytes */
+ IfxMultican_DataLengthCode_8, /**< \brief 8 data bytes */
+ IfxMultican_DataLengthCode_12 = 9, /**< \brief 12 data bytes */
+ IfxMultican_DataLengthCode_16 = 10, /**< \brief 16 data bytes */
+ IfxMultican_DataLengthCode_20 = 11, /**< \brief 20 data bytes */
+ IfxMultican_DataLengthCode_24 = 12, /**< \brief 24 data bytes */
+ IfxMultican_DataLengthCode_32 = 13, /**< \brief 32 data bytes */
+ IfxMultican_DataLengthCode_48 = 14, /**< \brief 48 data bytes */
+ IfxMultican_DataLengthCode_64 = 15 /**< \brief 64 data bytes */
+} IfxMultican_DataLengthCode;
+
+/** \brief CAN frame type
+ */
+typedef enum
+{
+ IfxMultican_Frame_receive, /**< \brief Data frame is received */
+ IfxMultican_Frame_transmit, /**< \brief Data frame is generated */
+ IfxMultican_Frame_remoteRequest, /**< \brief Remote request frame is generated */
+ IfxMultican_Frame_remoteAnswer /**< \brief Answer frame is generated on reception of the corresponding remote request */
+} IfxMultican_Frame;
+
+/** \brief Determines the operation mode of the frame counter\n
+ * Definition in Ifx_CAN.NFCRx.B.CFMOD, (x= node Id)
+ */
+typedef enum
+{
+ IfxMultican_FrameCounterMode_frameCountMode = 0, /**< \brief The frame counter is incremented
+ * upon the reception and transmission of frames */
+ IfxMultican_FrameCounterMode_timeStampMode = 1, /**< \brief The frame counter is used to count
+ * bit times. */
+ IfxMultican_FrameCounterMode_bitTimingMode = 2, /**< \brief The frame counter is used for
+ * analysis of the bit timing. */
+ IfxMultican_FrameCounterMode_errorCountMode = 3 /**< \brief The frame counter is used for
+ * counting when an error frame is received or an error is
+ * detected by the node. */
+} IfxMultican_FrameCounterMode;
+
+/** \brief CAN message object group\n
+ * Each group consists of 32 consecutive message objects
+ */
+typedef enum
+{
+ IfxMultican_MsgObjGroup_0 = 0,
+ IfxMultican_MsgObjGroup_1,
+ IfxMultican_MsgObjGroup_2,
+ IfxMultican_MsgObjGroup_3,
+ IfxMultican_MsgObjGroup_4,
+ IfxMultican_MsgObjGroup_5,
+ IfxMultican_MsgObjGroup_6,
+ IfxMultican_MsgObjGroup_7
+} IfxMultican_MsgObjGroup;
+
+/** \brief CAN Message Object Mode
+ */
+typedef enum
+{
+ IfxMultican_MsgObjMode_standard = 0, /**< \brief Standard Message Object */
+ IfxMultican_MsgObjMode_receiveFifoBase = 1, /**< \brief Receive FIFO Base Object */
+ IfxMultican_MsgObjMode_transmitFifoBase = 2, /**< \brief Transmit FIFO Base Object */
+ IfxMultican_MsgObjMode_transmitFifoSlave = 3, /**< \brief Transmit FIFO Slave Object */
+ IfxMultican_MsgObjMode_gatewaySource = 4, /**< \brief Gateway Source Object */
+ IfxMultican_MsgObjMode_canFD64 = 5 /**< \brief CANFD 64 bytes Message Mode */
+} IfxMultican_MsgObjMode;
+
+/** \brief CAN Message Object status flag
+ * Definition in Ifx_CAN.MOSTATx (x: 0 to max number of msg objs)
+ */
+typedef enum
+{
+ IfxMultican_MsgObjStatusFlag_receivePending = IFX_CAN_MO_STAT_RXPND_OFF, /**< \brief Receive pending status flag */
+ IfxMultican_MsgObjStatusFlag_transmitPending = IFX_CAN_MO_STAT_TXPND_OFF, /**< \brief Transmit pending status flag */
+ IfxMultican_MsgObjStatusFlag_receiveUpdating = IFX_CAN_MO_STAT_RXUPD_OFF, /**< \brief Receive updating status flag */
+ IfxMultican_MsgObjStatusFlag_newData = IFX_CAN_MO_STAT_NEWDAT_OFF, /**< \brief New data status flag */
+ IfxMultican_MsgObjStatusFlag_messageLost = IFX_CAN_MO_STAT_MSGLST_OFF, /**< \brief Message lost status flag */
+ IfxMultican_MsgObjStatusFlag_messageValid = IFX_CAN_MO_STAT_MSGVAL_OFF, /**< \brief Message valid status flag */
+ IfxMultican_MsgObjStatusFlag_receiveTransmitSelected = IFX_CAN_MO_STAT_RTSEL_OFF, /**< \brief Receive transmit selected status flag */
+ IfxMultican_MsgObjStatusFlag_receiveEnable = IFX_CAN_MO_STAT_RXEN_OFF, /**< \brief Receive enable status flag */
+ IfxMultican_MsgObjStatusFlag_transmitRequest = IFX_CAN_MO_STAT_TXRQ_OFF, /**< \brief Transmit request status flag */
+ IfxMultican_MsgObjStatusFlag_transmitEnable0 = IFX_CAN_MO_STAT_TXEN0_OFF, /**< \brief Transmit enable 0 status flag */
+ IfxMultican_MsgObjStatusFlag_transmitEnable1 = IFX_CAN_MO_STAT_TXEN1_OFF, /**< \brief Transmit enable 1 status flag */
+ IfxMultican_MsgObjStatusFlag_messageDirection = IFX_CAN_MO_STAT_DIR_OFF /**< \brief Message direction status flag */
+} IfxMultican_MsgObjStatusFlag;
+
+/** \brief CAN priorities
+ */
+typedef enum
+{
+ IfxMultican_Priority_ListOrder = 1, /**< \brief List order */
+ IfxMultican_Priority_CAN_ID = 2 /**< \brief CAN ID */
+} IfxMultican_Priority;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_CAN.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxMultican_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxMultican_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxMultican_SleepMode;
+
+/** \brief CAN API status definition
+ */
+typedef enum
+{
+ IfxMultican_Status_ok = 0x00000000,
+ IfxMultican_Status_notInitialised = 0x00000001,
+ IfxMultican_Status_wrongParam = 0x00000002,
+ IfxMultican_Status_wrongPin = 0x00000004,
+ IfxMultican_Status_busHeavy = 0x00000008,
+ IfxMultican_Status_busOff = 0x00000010,
+ IfxMultican_Status_notSentBusy = 0x00000020,
+ IfxMultican_Status_receiveEmpty = 0x00000040,
+ IfxMultican_Status_messageLost = 0x00000080,
+ IfxMultican_Status_newData = 0x00000100,
+ IfxMultican_Status_newDataButOneLost = IfxMultican_Status_messageLost | IfxMultican_Status_newData
+} IfxMultican_Status;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxMultican_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxMultican_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxMultican_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxMultican_SuspendMode;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \brief CAN message definition
+ */
+typedef struct
+{
+ uint32 id; /**< \brief CAN message ID */
+ IfxMultican_DataLengthCode lengthCode; /**< \brief CAN message data length code */
+ uint32 data[2]; /**< \brief CAN message data */
+ boolean fastBitRate; /**< \brief CAN FD fast bit rate enable/disable */
+} IfxMultican_Message;
+
+/** \brief Message object status bit-fields
+ */
+typedef union
+{
+ Ifx_CAN_MO_STAT_Bits B;
+ unsigned int U;
+} IfxMultican_MsgObjStat;
+
+/** \addtogroup IfxLld_Multican_Std_General
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief clears the message pending interrupt notification of a given list
+ * \param mcan mcan Specifies the CAN module
+ * \return None
+ */
+IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan);
+
+/** \brief clears the message pending interrupt notification of a given list
+ * \param mcan mcan Specifies the CAN module
+ * \param list List number
+ * \return None
+ */
+IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list);
+
+/** \brief Disables the module (sets the disable request)
+ * \param mcan mcan Specifies the CAN module
+ * \return None
+ */
+IFX_INLINE void IfxMultican_disableModule(Ifx_CAN *mcan);
+
+/** \brief Disregards the sleep mode of the module
+ * \param mcan mcan Specifies the CAN module
+ * \return None
+ */
+IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan);
+
+/** \brief Enables the module (clears the disable request)
+ * \param mcan mcan Specifies the CAN module
+ * \return None
+ */
+IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan);
+
+/** \brief Enables the sleep mode of the module
+ * \param mcan mcan Specifies the CAN module
+ * \return None
+ */
+IFX_INLINE void IfxMultican_enableSleepMode(Ifx_CAN *mcan);
+
+/** \brief Returns the selected fractional divider mode
+ * \param mcan mcan Specifies the CAN module
+ * \return Divider mode
+ */
+IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan);
+
+/** \brief Returns the reload or addition value for the result.
+ * \param mcan mcan Specifies the CAN module
+ * \return Step Value
+ */
+IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan);
+
+/** \brief Returns the selected input clock source
+ * \param mcan mcan Specifies the CAN module
+ * \return Clock selection
+ */
+IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan);
+
+/** \brief Returns the status of module enabled or disabled
+ * \param mcan mcan Specifies the CAN module
+ * \return Status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan);
+
+/** \brief sets the fractional divider mode
+ * \param mcan mcan Specifies the CAN module
+ * \param mode Divider mode
+ * \return None
+ */
+IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode);
+
+/** \brief sets reload or addition value for the result.
+ * \param mcan mcan Specifies the CAN module
+ * \param stepValue Step Value
+ * \return None
+ */
+IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue);
+
+/** \brief Sets the input clock source
+ * \param mcan mcan Specifies the CAN module
+ * \param clockSelect Clock selection
+ * \return None
+ */
+IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect);
+
+/** \brief clears the message pending interrupt notification of a given list
+ * \param mcan mcan Specifies the CAN module
+ * \param mask Message Index mask
+ * \return None
+ */
+IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param can pointer to CAN registers
+ * \param mode mode selection (enable / disable)
+ * \return None
+ */
+IFX_INLINE void IfxMultican_setSleepMode(Ifx_CAN *can, IfxMultican_SleepMode mode);
+
+/** \brief Wait until the list panel is ready
+ * \param mcan mcan Specifies the CAN module
+ * \return None
+ */
+IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param mcan Pointer to MULTICAN module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxMultican_isModuleSuspended(Ifx_CAN *mcan);
+
+/** \brief Set the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param mcan Pointer to MULTICAN module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxMultican_setSuspendMode(Ifx_CAN *mcan, IfxMultican_SuspendMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Calculates the best posible values and configures FBTR register
+ * \param hwNode Pointer to CAN Node registers
+ * \param moduleFreq Specifies the CAN module frequency
+ * \param baudrate Specifies the node baud rate. Unit: baud
+ * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
+ * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
+ * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_Node_setFastBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
+
+/** \brief Calculates the best posible values and configures BTEVR register
+ * \param hwNode Pointer to CAN Node registers
+ * \param moduleFreq Specifies the CAN module frequency
+ * \param baudrate Specifies the node baud rate. Unit: baud
+ * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
+ * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
+ * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_Node_setNominalBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
+
+/** \brief Reset the CAN module\n
+ * Reset and disable the CAN module, inclusive message object and node registers.
+ * \param mcan Specifies the CAN module
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_deinit(Ifx_CAN *mcan);
+
+/** \brief resets Multican kernel
+ * \param can pointer to CAN registers
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_resetModule(Ifx_CAN *can);
+
+/** \brief Execute a command from the command panel
+ * \param mcan Specifies the CAN module
+ * \param cmd Specifies the command
+ * \param arg2 Specifies the second argument
+ * \param arg1 Specifies the first argument
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_setListCommand(Ifx_CAN *mcan, uint32 cmd, uint32 arg2, uint32 arg1);
+
+/** \brief API to get the resource index of the CAN specified.
+ * \return multican resource index
+ */
+IFX_EXTERN IfxMultican_Index IfxMultican_getIndex(Ifx_CAN *multican);
+
+/**
+ * \param multican Module index of the MULTICAN
+ * \return MULTICAN module register address
+ */
+IFX_EXTERN Ifx_CAN *IfxMultican_getAddress(IfxMultican_Index multican);
+
+/** \} */
+
+/** \addtogroup IfxLld_Multican_Std_Node
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Activate the CAN Node. Participate in the CAN bus activities
+ * \param hwNode Pointer to CAN Node registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode);
+
+/** \brief Deactivate the CAN Node. Take out from participation in the CAN bus activities
+ * \param hwNode Pointer to CAN Node registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode);
+
+/** \brief Disables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
+ * \param hwNode Pointer to CAN Node registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode);
+
+/** \brief Enables the configuration changes for the Bit Timing Register, the Port Control Register, and the Error Counter Register of a CAN Node.
+ * \param hwNode Pointer to CAN Node registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_enableConfigurationChange(Ifx_CAN_N *hwNode);
+
+/** \brief Returns the base address to a given CAN node number
+ * \param mcan Specifies the CAN module
+ * \param node Specifies the CAN node
+ * \return base pointer to CAN node
+ */
+IFX_INLINE Ifx_CAN_N *IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node);
+
+/** \brief Resets the control register of CAN Node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode);
+
+/** \brief Resets the error counters of CAN Node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode);
+
+/** \brief Resets the interrupt pointers of CAN Node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode);
+
+/** \brief Enables / Disables the alert interrupt of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
+
+/** \brief Selects the interrupt output line INT_Om
+ * (m = 0-15) for an alert interrupt of CAN Node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param srcId Service request ID
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
+
+/** \brief Enables / Disables the analyzer mode of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param mode Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode);
+
+/** \brief Determines the threshold value (warning level, default 96) to be reached\n
+ * in order to set the corresponding error warning bit EWRN.
+ * \param hwNode Pointer to CAN Node registers
+ * \param level Error warning level
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level);
+
+/** \brief Enables / Disables the flexible data rate of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled);
+
+/** \brief Enables / Disables the CAN frame counter overflow interrupt of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
+
+/** \brief Selects the interrupt output line INT_Om
+ * (m = 0-15) for a frame counter overflow interrupt of CAN Node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param srcId Service request ID
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
+
+/** \brief Sets the operation mode of the frame counter of the CAN Node x
+ * \param hwNode Pointer to CAN Node registers
+ * \param mode Determines the operation mode of the frame counter
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode);
+
+/** \brief Enables / Disables the last error code interrupt of CAN node x. \n
+ * This interrupt is generated with each hardware update of bit field NSRx.LEC with LEC > 0 (CAN protocol error).
+ * \param hwNode Pointer to CAN Node registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
+
+/** \brief Selects the interrupt output line INT_Om
+ * (m = 0-15) for an LEC interrupt of CAN Node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param srcId Service request ID
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
+
+/** \brief Enables / Disables the loopback mode of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param mode Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode);
+
+/** \brief Sets the value of the receive error counter of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param value Receive error counter value
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value);
+
+/** \brief Selects the interrupt output line INT_Om
+ * (m = 0-15) for a timer event interrupt of CAN Node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param srcId Service request ID
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
+
+/** \brief Enables / Disables the transceiver delay compensation of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled);
+
+/** \brief Sets transceiver delay ompensation offset of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param value transceiver delay ompensation offset that is added to the measured transceiver delay. Range = [0, 15]
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value);
+
+/** \brief Enables / Disables the transfer interrupt of CAN node x. \n
+ * This interrupt is generated after the successful reception or transmission of a CAN frame in node x
+ * \param hwNode Pointer to CAN Node registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled);
+
+/** \brief Selects the interrupt output line INT_Om
+ * (m = 0-15) for a transfer OK interrupt of CAN Node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param srcId Service request ID
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId);
+
+/** \brief Sets the value of the transmit error counter of CAN node x.
+ * \param hwNode Pointer to CAN Node registers
+ * \param value Transmit error counter value
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value);
+
+/** \brief Return the DLC code corresponding to the data length in byte
+ * \param dataLength Data length in bytes
+ * \return Data length code
+ */
+IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength(uint32 dataLength);
+
+/** \brief Get the datalength in bytes from DLC
+ * \param code Data length code
+ * \return Datalength in bytes
+ */
+IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode(IfxMultican_DataLengthCode code);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reset the CAN node
+ * \param hwNode Pointer to CAN Node registers
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_Node_deinit(Ifx_CAN_N *hwNode);
+
+/** \brief Select and initialise the CAN node receive pin
+ * \param hwNode Pointer to CAN Node registers
+ * \param rxd Rx pin
+ * \param mode Input mode
+ * \return TRUE: Returns TRUE if the operation was successful\n
+ * FALSE: Returns FALSE if the operation was errorneous
+ */
+IFX_EXTERN boolean IfxMultican_Node_initRxPin(Ifx_CAN_N *hwNode, IfxMultican_Rxd_In *rxd, IfxPort_InputMode mode, IfxPort_PadDriver padDriver);
+
+/** \brief Select and initialise the CAN node transmit pin
+ * \param hwNode Pointer to CAN Node registers
+ * \param txd Tx pin
+ * \param mode Output mode
+ * \return TRUE: Returns TRUE if the operation was successful\n
+ * FALSE: Returns FALSE if the operation was errorneous
+ */
+IFX_EXTERN boolean IfxMultican_Node_initTxPin(Ifx_CAN_N *hwNode, IfxMultican_Txd_Out *txd, IfxPort_OutputMode mode, IfxPort_PadDriver padDriver);
+
+/** \brief Recovers the CAN node from bus off
+ * \param hwNode Pointer to CAN Node registers
+ * \return Status
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_Node_recoverBusOff(Ifx_CAN_N *hwNode);
+
+/** \brief Calculates the best posible values and configures BTR register
+ * \param hwNode Pointer to CAN Node registers
+ * \param moduleFreq Specifies the CAN module frequency
+ * \param baudrate Specifies the node baud rate. Unit: baud
+ * \param samplePoint Specifies the sample point. Range = [0, 10000] resp. [0%, 100%] of the total bit time.
+ * \param synchJumpWidth synchJumpWidth Specifies the re-synchronization jump width.\n
+ * Range = [0, 10000] resp. [0%, 100%] of the total bit time.
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_Node_setBitTiming(Ifx_CAN_N *hwNode, float32 moduleFreq, uint32 baudrate, uint16 samplePoint, uint16 synchJumpWidth);
+
+/** \brief Returns the CAN node timing
+ * \param moduleFreq Specifies the CAN module frequency
+ * \param btr BTR
+ * \param baudrate Baudrate
+ * \param samplePoint Sample point
+ * \param synchJumpWidth Sync Jump Width
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_calcTimingFromBTR(float32 moduleFreq, uint32 btr, uint32 *baudrate, uint16 *samplePoint, uint16 *synchJumpWidth);
+
+/** \} */
+
+/** \addtogroup IfxLld_Multican_Std_Message
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes a CAN message
+ * \param msg The message which should be initialized
+ * \param id The message ID
+ * \param dataLow The lower part of the 64bit data value
+ * \param dataHigh The upper part of the 64bit data value
+ * \param lengthCode number of bytes (data length code) which should be transmitted (0..8)
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Message_init(IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode);
+
+/** \brief Initializes a CAN message long frame
+ * \param msg The message which should be initialized
+ * \param id The message ID
+ * \param lengthCode number of bytes (data length code) which should be transmitted (0..8)
+ * \param fastBitRate Fast bit rate (FCR.BRS) enable/ disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_Message_longFrameInit(IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate);
+
+/** \} */
+
+/** \addtogroup IfxLld_Multican_Std_Message_Objects
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Sets priority class of message object
+ * \param hwObj Pointer to CAN message object registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj);
+
+/** \brief Clears the FIFO/GateWay pointers of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj);
+
+/** \brief Clear the RX pending flag of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj);
+
+/** \brief Clear the TX pending flag of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj);
+
+/** \brief Gets bottom object pointer of the base message object
+ * \param hwObj Pointer to CAN message object registers
+ * \return Bottom message object number
+ */
+IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj);
+
+/** \brief Gets data length code of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \return CAN frame data length code
+ */
+IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj);
+
+/** \brief Gets message identifier of message object
+ * \param hwObj Pointer to CAN message object registers
+ * \return messageId
+ */
+IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj);
+
+/** \brief Returns next object pointer (PNEXT) of the current message object
+ * \param hwObj Pointer to CAN message object registers
+ * \return Next message object number
+ */
+IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer(Ifx_CAN_MO *hwObj);
+
+/** \brief Get base address of a message object register
+ * \param mcan Specifies the CAN module
+ * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
+ * \return Pointer to Message Object registers
+ */
+IFX_INLINE Ifx_CAN_MO *IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId);
+
+/** \brief Get the message object status
+ * \param hwObj Pointer to CAN message object registers
+ * \return Extended frame: True
+ * Standard frame: False
+ */
+IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj);
+
+/** \brief Returns the RX pending flag of a message object.
+ * \param hwObj Pointer to CAN message object registers
+ * \return TRUE of the RX pending flag of a message object is set
+ */
+IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj);
+
+/** \brief Returns the TX Request flag of a message object.
+ * \param hwObj Pointer to CAN message object registers
+ * \return TRUE of the TX Request flag of a message object is set
+ */
+IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj);
+
+/** \brief Returns the TX pending flag of a message object.
+ * \param hwObj Pointer to CAN message object registers
+ * \return TRUE of the TX pending flag of a message object is set
+ */
+IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj);
+
+/** \brief Sets acceptance mask for the message identifier
+ * \param hwObj Pointer to CAN message object registers
+ * \param mask Acceptance Mask for the message identifier
+ * \param extendedFrame Extended frame enabled / disabled
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame);
+
+/** \brief Enable / Disable bit rate switch of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Sets bottom object pointer of the base message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param objNumber Bottom message object number
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
+
+/** \brief Sets bottom current pointer of the base message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param objNumber Current message object number
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
+
+/** \brief Enable / Disable data copy of a gateway source message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Sets data length code of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param code CAN frame data length code
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code);
+
+/** \brief Enable / Disable data length code copy of a gateway source message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Enable / Disable extended data length of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Enable / Disable gateway data frame send of a gateway source message object
+ * which in turn sets the TXRQ of the gateway deatination object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Enable / Disable identifier copy of a gateway source message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Sets identifier extension of message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param extension Acceptance Mask for the message IDE bit
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension);
+
+/** \brief Sets acceptance mask for the message IDE bit
+ * \param hwObj Pointer to CAN message object registers
+ * \param matchingId Acceptance Mask for the message IDE bit
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId);
+
+/** \brief Sets message identifier of message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param messageId CAN Identifier of message object
+ * \param extendedFrame Extended frame enabled / disabled
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame);
+
+/** \brief Sets the message mode of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param mode CAN Message Object Mode
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode);
+
+/** \brief Sets message pending number that selects the bit position of the bit in the Message Pending Register\n
+ * that is set upon a message object n receive/transmit interrupt
+ * \param hwObj Pointer to CAN message object registers
+ * \param messageNumber Message pending number
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber);
+
+/** \brief Enable / Disable overflow interrupt of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Sets priority class of message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param priority One of the priority classes 0, 1, 2, 3 to message object n
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority);
+
+/** \brief Enable / Disable receive interrupt of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Sets receive interrupt node pointer of message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param srcId Service request ID
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId);
+
+/** \brief Enable / Disable transmit object remote monitoring of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Sets bottom object select pointer of the base message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param objNumber Select message object number
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
+
+/** \brief Enable / Disable single data transfer of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Enable / Disable single transmit trial of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Sets top object pointer of the base message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param objNumber Top message object number
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber);
+
+/** \brief Enable / Disable transmit interrupt of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param enabled Enable / disable choice
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled);
+
+/** \brief Sets transmit interrupt node pointer of message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param srcId Service request ID
+ * \return None
+ */
+IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Cancel pending TX request by invalidating the request, only when frame transmission has not been started.
+ * \param hwObj Pointer to CAN message object registers
+ * \return TRUE if cancellation was successfully executed
+ */
+IFX_EXTERN boolean IfxMultican_MsgObj_cancelSend(Ifx_CAN_MO *hwObj);
+
+/** \brief Clears the selected status flag of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param flag Message Object status flag
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_MsgObj_clearStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
+
+/** \brief Reset the message object\n
+ * Append the message object to the end of idle list and reset message object registers
+ * \param mcan Specifies the CAN module
+ * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_MsgObj_deinit(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId);
+
+/** \brief Get message object ID which has TX/RX pending flag from a message object group
+ * \param mcan Specifies the CAN module
+ * \param msgObjGroup Message object group
+ * \return Message object index
+ */
+IFX_EXTERN IfxMultican_MsgObjId IfxMultican_MsgObj_getPendingId(Ifx_CAN *mcan, IfxMultican_MsgObjGroup msgObjGroup);
+
+/** \brief Get the message object status
+ * \param hwObj Pointer to CAN message object registers
+ * \return \ref IfxMultican_MsgObjStat bitfield
+ */
+IFX_EXTERN IfxMultican_MsgObjStat IfxMultican_MsgObj_getStatus(Ifx_CAN_MO *hwObj);
+
+/** \brief Gets the status of the selected status flag of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param flag Message Object status flag
+ * \return Status (TRUE / FALSE)
+ */
+IFX_EXTERN boolean IfxMultican_MsgObj_getStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
+
+/** \brief Read a received CAN long frame
+ * \param mcan Specifies the CAN module
+ * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
+ * \param msg The message which should be initialized
+ * \param data Pointer to data (in words)
+ * \return IfxMultican_Status_newData: if the operation was successful\n
+ * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
+ * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
+ * IfxMultican_Status_receiveEmpty: if no message is been received
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
+
+/** \brief Read a received CAN message
+ * \param hwObj Pointer to CAN message object registers
+ * \param msg This parameter is filled in by the function with the received message. Also when reading is not successful.
+ * \return IfxMultican_Status_newData: if the operation was successful\n
+ * IfxMultican_Status_newDataButMessageLost: if the one message lost and last new data is retrieved successfully\n
+ * IfxMultican_Status_messageLost: if the message lost and new data is not yet ready\n
+ * IfxMultican_Status_receiveEmpty: if no message is been received
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_readMessage(Ifx_CAN_MO *hwObj, IfxMultican_Message *msg);
+
+/** \brief Send a CAN Long frame message
+ * \param mcan Specifies the CAN module
+ * \param msgObjId Specifies the message object index. Range = [0, \ref IFXMULTICAN_NUM_MESSAGE_OBJECTS - 1]
+ * \param msg The message which should be initialized
+ * \param data Pointer to data (in words)
+ * \return IfxMultican_Status_ok: if the operation was successful
+ * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendLongFrame(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId, IfxMultican_Message *msg, uint32 *data);
+
+/** \brief Send a CAN message
+ * \param hwObj Pointer to CAN message object registers
+ * \param msg Specifies the message to be send
+ * \return IfxMultican_Status_ok: if the operation was successful
+ * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_sendMessage(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg);
+
+/** \brief Send a CAN message
+ * \param hwObj Pointer to CAN message object registers
+ * \param msg Specifies the message to be send
+ * \return IfxMultican_Status_ok: if the operation was successful
+ * IfxMultican_Status_notSentBusy: if the operation was unsuccessful due to hardware is busy
+ */
+IFX_EXTERN IfxMultican_Status IfxMultican_MsgObj_writeTxfifo(Ifx_CAN_MO *hwObj, const IfxMultican_Message *msg);
+
+/** \brief Set message object filter
+ * \param hwObj Pointer to CAN message object registers
+ * \param extend TRUE/FALSE : extended ID
+ * \param id ID
+ * \param accMask acceptance mask
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_MsgObj_setFilter(Ifx_CAN_MO *hwObj, boolean extend, uint32 id, uint32 accMask);
+
+/** \brief Sets the selected status flag of a message object
+ * \param hwObj Pointer to CAN message object registers
+ * \param flag Message Object status flag
+ * \return None
+ */
+IFX_EXTERN void IfxMultican_MsgObj_setStatusFlag(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjStatusFlag flag);
+
+/** \} */
+
+/** \addtogroup IfxLld_Multican_Std_Interrupts
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the interrupt source register
+ * \param mcan Specifies the CAN module
+ * \param srcId Specifies the service request ID
+ * \return Address of the interrupt source register\n
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxMultican_getSrcPointer(Ifx_CAN *mcan, IfxMultican_SrcId srcId);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxMultican_Message_init(IfxMultican_Message *msg, uint32 id, uint32 dataLow, uint32 dataHigh, IfxMultican_DataLengthCode lengthCode)
+{
+ msg->id = id;
+ msg->data[0] = dataLow;
+ msg->data[1] = dataHigh;
+ msg->lengthCode = lengthCode;
+
+ msg->fastBitRate = FALSE;
+}
+
+
+IFX_INLINE void IfxMultican_Message_longFrameInit(IfxMultican_Message *msg, uint32 id, IfxMultican_DataLengthCode lengthCode, boolean fastBitRate)
+{
+ msg->id = id;
+ msg->data[0] = 0; /* not being used */
+ msg->data[1] = 0; /* not being used */
+ msg->lengthCode = lengthCode;
+ msg->fastBitRate = fastBitRate;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_clearDataRegisters(Ifx_CAN_MO *hwObj)
+{
+ hwObj->DATAL.U = 0;
+ hwObj->DATAH.U = 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_clearFifoGatewayPointers(Ifx_CAN_MO *hwObj)
+{
+ hwObj->FGPR.U = 0x0000000U;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_clearRxPending(Ifx_CAN_MO *hwObj)
+{
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_receivePending);
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_clearTxPending(Ifx_CAN_MO *hwObj)
+{
+ IfxMultican_MsgObj_clearStatusFlag(hwObj, IfxMultican_MsgObjStatusFlag_transmitPending);
+}
+
+
+IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getBottomObjectPointer(Ifx_CAN_MO *hwObj)
+{
+ return (IfxMultican_MsgObjId)(hwObj->FGPR.B.BOT);
+}
+
+
+IFX_INLINE IfxMultican_DataLengthCode IfxMultican_MsgObj_getDataLengthCode(Ifx_CAN_MO *hwObj)
+{
+ return (IfxMultican_DataLengthCode)(hwObj->FCR.B.DLC);
+}
+
+
+IFX_INLINE uint32 IfxMultican_MsgObj_getMessageId(Ifx_CAN_MO *hwObj)
+{
+ Ifx_CAN_MO_AR ar;
+ ar.U = hwObj->AR.U;
+ return ar.B.ID >> ((ar.B.IDE != 0) ? 0 : 18);
+}
+
+
+IFX_INLINE IfxMultican_MsgObjId IfxMultican_MsgObj_getNextObjectPointer(Ifx_CAN_MO *hwObj)
+{
+ return (IfxMultican_MsgObjId)(hwObj->STAT.B.PNEXT);
+}
+
+
+IFX_INLINE Ifx_CAN_MO *IfxMultican_MsgObj_getPointer(Ifx_CAN *mcan, IfxMultican_MsgObjId msgObjId)
+{
+ return &(mcan->MO[msgObjId]);
+}
+
+
+IFX_INLINE boolean IfxMultican_MsgObj_isExtendedFrame(Ifx_CAN_MO *hwObj)
+{
+ return hwObj->AR.B.IDE != 0;
+}
+
+
+IFX_INLINE boolean IfxMultican_MsgObj_isRxPending(Ifx_CAN_MO *hwObj)
+{
+ IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
+ return msgStatus.B.RXPND ? TRUE : FALSE;
+}
+
+
+IFX_INLINE boolean IfxMultican_MsgObj_isTransmitRequested(Ifx_CAN_MO *hwObj)
+{
+ IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
+ return msgStatus.B.TXRQ ? TRUE : FALSE;
+}
+
+
+IFX_INLINE boolean IfxMultican_MsgObj_isTxPending(Ifx_CAN_MO *hwObj)
+{
+ IfxMultican_MsgObjStat msgStatus = IfxMultican_MsgObj_getStatus(hwObj);
+ return msgStatus.B.TXPND ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setAcceptanceMask(Ifx_CAN_MO *hwObj, uint32 mask, boolean extendedFrame)
+{
+ hwObj->AMR.B.AM = mask << ((extendedFrame != 0) ? 0 : 18);
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setBitRateSwitch(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.BRS = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setBottomObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
+{
+ hwObj->FGPR.B.BOT = objNumber;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setCurrentObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
+{
+ hwObj->FGPR.B.CUR = objNumber;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setDataCopy(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.DATC = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setDataLengthCode(Ifx_CAN_MO *hwObj, IfxMultican_DataLengthCode code)
+{
+ hwObj->FCR.B.DLC = code;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setDataLengthCodeCopy(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.DLCC = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setExtendedDataLength(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.FDF = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setGatewayDataFrameSend(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.GDFS = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setIdentifierCopy(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.IDC = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setIdentifierExtension(Ifx_CAN_MO *hwObj, boolean extension)
+{
+ hwObj->AR.B.IDE = extension;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setMatchingId(Ifx_CAN_MO *hwObj, boolean matchingId)
+{
+ hwObj->AMR.B.MIDE = matchingId;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setMessageId(Ifx_CAN_MO *hwObj, uint32 messageId, boolean extendedFrame)
+{
+ hwObj->AR.B.ID = messageId << ((extendedFrame != 0) ? 0 : 18);
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setMessageMode(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjMode mode)
+{
+ hwObj->FCR.B.MMC = mode;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setMessagePendingNumber(Ifx_CAN_MO *hwObj, IfxMultican_MsgObjId messageNumber)
+{
+ hwObj->IPR.B.MPN = messageNumber;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setOverflowInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.OVIE = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setPriorityClass(Ifx_CAN_MO *hwObj, IfxMultican_Priority priority)
+{
+ hwObj->AR.B.PRI = priority;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setReceiveInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.RXIE = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setReceiveInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
+{
+ hwObj->IPR.B.RXINP = srcId;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setRemoteMonitoring(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.RMM = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setSelectObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
+{
+ hwObj->FGPR.B.SEL = objNumber;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setSingleDataTransfer(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.SDT = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setSingleTransmitTrial(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.STT = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setTopObjectPointer(Ifx_CAN_MO *hwObj, sint32 objNumber)
+{
+ hwObj->FGPR.B.TOP = objNumber;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setTransmitInterrupt(Ifx_CAN_MO *hwObj, boolean enabled)
+{
+ hwObj->FCR.B.TXIE = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_MsgObj_setTransmitInterruptNodePointer(Ifx_CAN_MO *hwObj, IfxMultican_SrcId srcId)
+{
+ hwObj->IPR.B.TXINP = srcId;
+}
+
+
+IFX_INLINE void IfxMultican_Node_activate(Ifx_CAN_N *hwNode)
+{
+ hwNode->CR.B.INIT = 0;
+}
+
+
+IFX_INLINE void IfxMultican_Node_deactivate(Ifx_CAN_N *hwNode)
+{
+ hwNode->CR.B.INIT = 1;
+}
+
+
+IFX_INLINE void IfxMultican_Node_disableConfigurationChange(Ifx_CAN_N *hwNode)
+{
+ hwNode->CR.B.CCE = 0U;
+}
+
+
+IFX_INLINE void IfxMultican_Node_enableConfigurationChange(Ifx_CAN_N *hwNode)
+{
+ hwNode->CR.B.CCE = 1U;
+}
+
+
+IFX_INLINE Ifx_CAN_N *IfxMultican_Node_getPointer(Ifx_CAN *mcan, IfxMultican_NodeId node)
+{
+ return &(mcan->N[node]);
+}
+
+
+IFX_INLINE void IfxMultican_Node_resetControlRegister(Ifx_CAN_N *hwNode)
+{
+ hwNode->CR.U = 0x00000041U;
+}
+
+
+IFX_INLINE void IfxMultican_Node_resetErrorCounters(Ifx_CAN_N *hwNode)
+{
+ hwNode->ECNT.U = 0x00600000U;
+}
+
+
+IFX_INLINE void IfxMultican_Node_resetInterruptPointers(Ifx_CAN_N *hwNode)
+{
+ hwNode->IPR.U = 0x00000000U;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setAlertInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
+{
+ hwNode->CR.B.ALIE = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setAlertInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
+{
+ hwNode->IPR.B.ALINP = srcId;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setAnalyzerMode(Ifx_CAN_N *hwNode, boolean mode)
+{
+ hwNode->CR.B.CALM = mode != FALSE;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setErrorWarningLevel(Ifx_CAN_N *hwNode, uint8 level)
+{
+ hwNode->ECNT.B.EWRNLVL = level;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setFastNode(Ifx_CAN_N *hwNode, boolean enabled)
+{
+ hwNode->CR.B.INIT = 1;
+ hwNode->CR.B.FDEN = enabled ? 1 : 0;
+ hwNode->CR.B.INIT = 0;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setFrameCounterInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
+{
+ hwNode->FCR.B.CFCIE = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setFrameCounterInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
+{
+ hwNode->IPR.B.CFCINP = srcId;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setFrameCounterMode(Ifx_CAN_N *hwNode, IfxMultican_FrameCounterMode mode)
+{
+ hwNode->FCR.B.CFMOD = mode;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
+{
+ hwNode->CR.B.LECIE = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setLastErrorCodeInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
+{
+ hwNode->IPR.B.LECINP = srcId;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setLoopBackMode(Ifx_CAN_N *hwNode, boolean mode)
+{
+ hwNode->PCR.B.LBM = mode != FALSE;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setReceiveErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
+{
+ hwNode->ECNT.B.REC = value;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setTimerEventInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
+{
+ hwNode->IPR.B.TEINP = srcId;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensation(Ifx_CAN_N *hwNode, boolean enabled)
+{
+ hwNode->TDCR.B.TDC = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setTransceiverDelayCompensationOffset(Ifx_CAN_N *hwNode, uint16 value)
+{
+ hwNode->TDCR.B.TDCO = value;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setTransferInterrupt(Ifx_CAN_N *hwNode, boolean enabled)
+{
+ hwNode->CR.B.TRIE = enabled ? 1 : 0;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setTransferInterruptPointer(Ifx_CAN_N *hwNode, IfxMultican_SrcId srcId)
+{
+ hwNode->IPR.B.TRINP = srcId;
+}
+
+
+IFX_INLINE void IfxMultican_Node_setTransmitErrorCounter(Ifx_CAN_N *hwNode, uint8 value)
+{
+ hwNode->ECNT.B.TEC = value;
+}
+
+
+IFX_INLINE void IfxMultican_clearMessagePendingSeletor(Ifx_CAN *mcan)
+{
+ mcan->MCR.B.MPSEL = 0x0U;
+}
+
+
+IFX_INLINE void IfxMultican_clearPendingMessageNotification(Ifx_CAN *mcan, uint16 list)
+{
+ mcan->MSPND[list].U = 0x0;
+}
+
+
+IFX_INLINE void IfxMultican_disableModule(Ifx_CAN *mcan)
+{
+ mcan->CLC.B.DISR = 1U;
+}
+
+
+IFX_INLINE void IfxMultican_disableSleepMode(Ifx_CAN *mcan)
+{
+ mcan->CLC.B.EDIS = 1U;
+}
+
+
+IFX_INLINE void IfxMultican_enableModule(Ifx_CAN *mcan)
+{
+ mcan->CLC.B.DISR = 0U;
+}
+
+
+IFX_INLINE void IfxMultican_enableSleepMode(Ifx_CAN *mcan)
+{
+ mcan->CLC.B.EDIS = 0U;
+}
+
+
+IFX_INLINE uint16 IfxMultican_getFractionalDividerMode(Ifx_CAN *mcan)
+{
+ return mcan->FDR.B.DM;
+}
+
+
+IFX_INLINE uint16 IfxMultican_getFractionalDividerStepValue(Ifx_CAN *mcan)
+{
+ return mcan->FDR.B.STEP;
+}
+
+
+IFX_INLINE IfxMultican_ClockSelect IfxMultican_getInputClock(Ifx_CAN *mcan)
+{
+ return (IfxMultican_ClockSelect)mcan->MCR.B.CLKSEL;
+}
+
+
+IFX_INLINE boolean IfxMultican_isModuleEnabled(Ifx_CAN *mcan)
+{
+ return mcan->CLC.B.DISS == 0;
+}
+
+
+IFX_INLINE void IfxMultican_setFractionalDividerMode(Ifx_CAN *mcan, uint16 mode)
+{
+ mcan->FDR.B.DM = mode;
+}
+
+
+IFX_INLINE void IfxMultican_setFractionalDividerStepValue(Ifx_CAN *mcan, uint16 stepValue)
+{
+ mcan->FDR.B.STEP = stepValue;
+}
+
+
+IFX_INLINE void IfxMultican_setInputClock(Ifx_CAN *mcan, IfxMultican_ClockSelect clockSelect)
+{
+ mcan->MCR.B.CLKSEL = clockSelect;
+}
+
+
+IFX_INLINE void IfxMultican_setMessageIndexMask(Ifx_CAN *mcan, uint32 mask)
+{
+ mcan->MSIMASK.U = mask;
+}
+
+
+IFX_INLINE void IfxMultican_setSleepMode(Ifx_CAN *can, IfxMultican_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ can->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxMultican_waitListReady(Ifx_CAN *mcan)
+{
+ while (mcan->PANCTR.B.BUSY != 0)
+ {}
+}
+
+
+IFX_INLINE boolean IfxMultican_isModuleSuspended(Ifx_CAN *mcan)
+{
+ Ifx_CAN_OCS ocs;
+
+ // read the status
+ ocs.U = mcan->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxMultican_setSuspendMode(Ifx_CAN *mcan, IfxMultican_SuspendMode mode)
+{
+ Ifx_CAN_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ mcan->OCS.U = ocs.U;
+}
+
+
+IFX_INLINE IfxMultican_DataLengthCode IfxMultican_Node_getCodeFromDataLength(uint32 dataLength)
+{
+ uint32 code;
+
+ if (dataLength <= 8)
+ {
+ code = dataLength;
+ }
+ else if (dataLength <= 24)
+ {
+ code = (dataLength >> 2) + 6;
+ }
+ else
+ {
+ code = (dataLength >> 4) + 11;
+ }
+
+ return (IfxMultican_DataLengthCode)code;
+}
+
+
+IFX_INLINE uint32 IfxMultican_Node_getDataLengthFromCode(IfxMultican_DataLengthCode code)
+{
+ uint32 numBytes;
+
+ if (code <= IfxMultican_DataLengthCode_8)
+ {
+ numBytes = (uint32)code;
+ }
+ else if (code <= IfxMultican_DataLengthCode_24)
+ {
+ numBytes = ((uint32)code - 6) << 2;
+ }
+ else
+ {
+ numBytes = ((uint32)code - 11) << 4;
+ }
+
+ return numBytes;
+}
+
+
+#endif /* IFXMULTICAN_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Io/IfxPort_Io.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Io/IfxPort_Io.c
new file mode 100644
index 0000000..939c141
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Io/IfxPort_Io.c
@@ -0,0 +1,67 @@
+/**
+ * \file IfxPort_Io.c
+ * \brief PORT IO details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxPort_Io.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxPort_Io_initModule(const IfxPort_Io_Config *config)
+{
+ IfxPort_Io_ConfigPin *pinTable = (IfxPort_Io_ConfigPin *)&config->pinTable[0];
+
+ uint32 i;
+
+ for (i = 0; i < config->size; i++, ++pinTable)
+ {
+ IfxPort_Pin *pin = (IfxPort_Pin *)pinTable->pin;
+ IfxPort_setPinMode(pin->port, pin->pinIndex, pinTable->mode);
+ IfxPort_setPinPadDriver(pin->port, pin->pinIndex, pinTable->padDriver);
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Io/IfxPort_Io.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Io/IfxPort_Io.h
new file mode 100644
index 0000000..f55e55c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Io/IfxPort_Io.h
@@ -0,0 +1,212 @@
+/**
+ * \file IfxPort_Io.h
+ * \brief PORT IO details
+ * \ingroup IfxLld_Port
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Port_Io_Usage How to use the PORT I/O driver?
+ * \ingroup IfxLld_Port
+ *
+ * The PORT I/O driver provides several functions to easily configure and read pins.
+ * The configuration includes input/output, mode, pad driver strength and state. For referencing the pins and their ports a IfxPort_PinMap is available as well.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Port_Io_Preparation Preparation
+ * \subsection IfxLld_Port_Io_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Port_Io_Variables Conifguration Table
+ *
+ * Specify the used pins, their modes and (for outputs) the pad driver strength:
+ *
Note: For inputs the pad driver strength is only a dummy.
+ * \code
+ * const IfxPort_Io_ConfigPin configPin[] = {
+ * {&IfxPort_P00_0, IfxPort_Mode_inputPullDown, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P00.0
+ * {&IfxPort_P33_0, IfxPort_Mode_outputPushPullGeneral, IfxPort_PadDriver_cmosAutomotiveSpeed1}, // P33.0
+ * };
+ * \endcode
+ *
+ * Note: the IfxPort_* pins are defined in IfxPort_PinMap
+ *
+ * \subsection IfxLld_Port_Io_Init Port Initialisation
+ *
+ * Assemble the final configuration structure:
+ *
+ * \code
+ * const IfxPort_Io_Config conf = {
+ * sizeof(configPin)/sizeof(IfxPort_Io_ConfigPin),
+ * (IfxPort_Io_ConfigPin *)configPin
+ * };
+ * \endcode
+ *
+ * Call the initialisation function:
+ *
+ * \code
+ * IfxPort_Io_initModule(&conf);
+ * \endcode
+ *
+ * Now the pins are configured as specified.
+ *
+ * \section IfxLld_Port_Io_MiscFunctions Misc. Functions of the Standard Layer
+ *
+ * \subsection IfxLld_Port_Io_Mode Pin Mode Configuration
+ *
+ * Generally, you can use one function for both inputs and outputs to set the desired mode.
+ *
+ * \code
+ * // configure P33.0 as general output
+ * IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);
+ * \endcode
+ *
+ * For inputs use the IfxPort_setPinModeInput function:
+ *
+ * \code
+ * // configure P33.0 as input with pullUp
+ * IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);
+ * \endcode
+ *
+ * For outputs use the IfxPort_setModeOutput function:
+ *
+ * \code
+ * // configure P33.0 as output in general pushPull mode
+ * IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
+ * \endcode
+ *
+ * If the pin is an output, the pad driver should be configured as well:
+ *
+ * \code
+ * IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+ * \endcode
+ *
+ * \subsection IfxLld_Port_Io_Input Reading Input State
+ * Read the state of a single pin:
+ * \code
+ * uint8 state = IfxPort_getPinState(&MODULE_P33, 0); // read P33.0
+ * \endcode
+ *
+ * \subsection IfxLld_Port_Io_Output Setting Output State
+ *
+ * Generally, you can use one function to set an output pin high or low or to toggle it.
+ *
+ * \code
+ * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled); // toggle P33.0
+ * \endcode
+ *
+ * An output pin can be set high as following:
+ * \code
+ * IfxPort_setPinHigh(&MODULE_P33, 0); // P33.0 = 1
+ * \endcode
+ *
+ * An output pin can be set low as following:
+ * \code
+ * IfxPort_setPinLow(&MODULE_P33, 0); // P33.0 = 0
+ * \endcode
+ *
+ * \subsection IfxLld_Port_Io_Emergency Configure Emergency Function
+ *
+ * Enable emergency stop for P33.0:
+ * \code
+ * IfxPort_enableEmergencyStop(&MODULE_P33, 0);
+ * \endcode
+ *
+ * The driver also provides a function to disable this feature.
+ *
+ * \defgroup IfxLld_Port_Io Interface Driver
+ * \ingroup IfxLld_Port
+ * \defgroup IfxLld_Port_Io_DataStructures Data Structures
+ * \ingroup IfxLld_Port_Io
+ * \defgroup IfxLld_Port_Io_ModuleFunctions Module Functions
+ * \ingroup IfxLld_Port_Io
+ */
+
+#ifndef IFXPORT_IO_H
+#define IFXPORT_IO_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Port/Std/IfxPort.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Port_Io_DataStructures
+ * \{ */
+typedef struct
+{
+ IFX_CONST IfxPort_Pin *pin;
+ IfxPort_Mode mode;
+ IfxPort_PadDriver padDriver;
+} IfxPort_Io_ConfigPin;
+
+/** \} */
+
+/** \addtogroup IfxLld_Port_Io_DataStructures
+ * \{ */
+typedef struct
+{
+ uint32 size;
+ IfxPort_Io_ConfigPin *pinTable;
+} IfxPort_Io_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Port_Io_ModuleFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \return None
+ */
+IFX_EXTERN void IfxPort_Io_initModule(const IfxPort_Io_Config *config);
+
+/** \} */
+
+#endif /* IFXPORT_IO_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Std/IfxPort.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Std/IfxPort.c
new file mode 100644
index 0000000..09450f8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Std/IfxPort.c
@@ -0,0 +1,355 @@
+/**
+ * \file IfxPort.c
+ * \brief PORT basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxPort.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex)
+{
+ sint32 portIndex;
+ boolean result = FALSE;
+
+ for (portIndex = 0; portIndex < IFXPORT_NUM_MODULES; portIndex++)
+ {
+ if (port == IfxPort_cfg_esrMasks[portIndex].port)
+ {
+ if ((1U << pinIndex) & IfxPort_cfg_esrMasks[portIndex].masks)
+ {
+ IfxPort_resetESR(port, pinIndex);
+ result = TRUE;
+ }
+
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex)
+{
+ sint32 portIndex;
+ boolean result = FALSE;
+
+ for (portIndex = 0; portIndex < IFXPORT_NUM_MODULES; portIndex++)
+ {
+ if (port == IfxPort_cfg_esrMasks[portIndex].port)
+ {
+ if ((1U << pinIndex) & IfxPort_cfg_esrMasks[portIndex].masks)
+ {
+ IfxPort_setESR(port, pinIndex);
+ result = TRUE;
+ }
+ }
+ }
+
+ return result;
+}
+
+
+Ifx_P *IfxPort_getAddress(IfxPort_Index port)
+{
+ Ifx_P *module = NULL_PTR;
+ uint8 i = 0;
+
+ while ((i < IFXPORT_NUM_MODULES) && (module == NULL_PTR))
+ {
+ if (IfxPort_cfg_indexMap[i].index == port)
+ {
+ module = IfxPort_cfg_indexMap[i].module;
+ }
+
+ i++;
+ }
+
+ return module;
+}
+
+
+IfxPort_Index IfxPort_getIndex(Ifx_P *port)
+{
+ uint32 index;
+ IfxPort_Index result;
+
+ result = IfxPort_Index_none;
+
+ for (index = 0; index < IFXPORT_NUM_MODULES; index++)
+ {
+ if (IfxPort_cfg_indexMap[index].module == port)
+ {
+ result = (IfxPort_Index)IfxPort_cfg_indexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ __ldmst(&port->ESR.U, 1U << pinIndex, 0);
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPort_setESR(Ifx_P *port, uint8 pinIndex)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ __ldmst(&port->ESR.U, 1U << pinIndex, 1U << pinIndex);
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode)
+{
+ uint32 i;
+ uint32 iocrVal[4];
+ uint32 iocrMask[4];
+
+ /* initialise */
+ for (i = 0; i < 4; i++)
+ {
+ iocrVal[i] = 0;
+ iocrMask[i] = 0;
+ }
+
+ /* calculate IOCRx values and masks */
+ uint32 imask = (uint32)mask << pinIndex;
+
+ for (i = pinIndex; i < 16; i++)
+ {
+ if ((imask & (1U << i)) != 0)
+ {
+ uint32 index = i / 4;
+ uint32 shift = (i & 0x3U) * 8;
+ iocrMask[index] |= (0x1FU << 3) << shift;
+ iocrVal[index] |= (mode) << shift;
+ }
+ }
+
+ /* write IOCRx */
+ for (i = 0; i < 4; i++)
+ {
+ if (iocrMask[i] != 0)
+ {
+ __ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
+ }
+ }
+}
+
+
+void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
+{
+ uint32 i;
+ uint32 iocrVal[4];
+ uint32 iocrMask[4];
+
+ IFX_UNUSED_PARAMETER(index == IfxPort_OutputIdx_general);
+
+ /* initialise */
+ for (i = 0; i < 4; i++)
+ {
+ iocrVal[i] = 0;
+ iocrMask[i] = 0;
+ }
+
+ /* calculate IOCRx values and masks */
+ uint32 imask = (uint32)mask << pinIndex;
+
+ for (i = pinIndex; i < 16; i++)
+ {
+ if ((imask & (1U << i)) != 0)
+ {
+ uint32 index = i / 4;
+ uint32 shift = (i & 0x3U) * 8;
+ iocrMask[index] |= (0x1FU << 3) << shift;
+ iocrVal[index] |= (mode | index) << shift;
+ }
+ }
+
+ /* write IOCRx */
+ for (i = 0; i < 4; i++)
+ {
+ if (iocrMask[i] != 0)
+ {
+ __ldmst(&((&(port->IOCR0.U))[i]), iocrMask[i], iocrVal[i]);
+ }
+ }
+}
+
+
+void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ {
+ uint32 i;
+ uint32 pdrVal[2];
+ uint32 pdrMask[2];
+
+ /* initialise */
+ for (i = 0; i < 2; i++)
+ {
+ pdrVal[i] = 0;
+ pdrMask[i] = 0;
+ }
+
+ /* calculate PDRx values and masks */
+ uint32 imask = (uint32)mask << pinIndex;
+
+ for (i = pinIndex; i < 16; i++)
+ {
+ if ((imask & (1U << i)) != 0)
+ {
+ uint32 index = i / 8;
+ uint32 shift = (i & 0x7U) * 4;
+ pdrMask[index] |= (0xFUL << shift);
+ pdrVal[index] |= (padDriver << shift);
+ }
+ }
+
+ /* write PDRx */
+ for (i = 0; i < 2; i++)
+ {
+ if (pdrMask[i] != 0)
+ {
+ __ldmst(&((&(port->PDR0.U))[i]), pdrMask[i], pdrVal[i]);
+ }
+ }
+ }
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode)
+{
+ volatile Ifx_P_IOCR0 *iocr = &(port->IOCR0);
+ uint8 iocrIndex = (pinIndex / 4);
+ uint8 shift = (pinIndex & 0x3U) * 8;
+
+ if (port == &MODULE_P40)
+ {
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ port->PDISC.U &= ~(1 << pinIndex);
+ IfxScuWdt_setCpuEndinit(passwd);
+ }
+
+ __ldmst(&iocr[iocrIndex].U, (0xFFUL << shift), (mode << shift));
+}
+
+
+void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ if (mode < IfxPort_Mode_outputPushPullGeneral)
+ {
+ if (pinIndex < 2)
+ {}
+ else
+ {
+ port->LPCR1.B_P21.RDIS_CTRL = enablePortControlled;
+ port->LPCR1.B_P21.RX_DIS = 0;
+ }
+ }
+ else
+ {
+ port->LPCR2.B.TDIS_CTRL = enablePortControlled;
+ port->LPCR2.B.TX_DIS = 0;
+ port->LPCR2.B.TX_PD = 0;
+ }
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply)
+{
+ uint32 pdrOffset = (pinIndex / 8);
+ uint32 shift = ((pinIndex / 2) * 8);
+ uint32 lpcrOffset = (pinIndex / 2);
+ volatile Ifx_P_PDR0 *pdr = &(port->PDR0);
+ volatile Ifx_P_LPCR0 *lpcr = &(port->LPCR0);
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ {
+ pdr[pdrOffset].U = (lvdsPadDriver << shift); /* configuring LVDS mode */
+ lpcr[lpcrOffset].B.PS1 = padSupply;
+ }
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ {
+ volatile uint32 *pdr = (volatile uint32 *)&(port->PDR0.U);
+ uint8 pdrIndex = (pinIndex / 8);
+ uint8 shift = (pinIndex & 0x7U) * 4;
+ __ldmst(&(pdr[pdrIndex]), (0xFUL << shift), (padDriver << shift));
+ }
+ IfxScuWdt_setCpuEndinit(passwd);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Std/IfxPort.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Std/IfxPort.h
new file mode 100644
index 0000000..0f8c769
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Std/IfxPort.h
@@ -0,0 +1,604 @@
+/**
+ * \file IfxPort.h
+ * \brief PORT basic functionality
+ * \ingroup IfxLld_Port
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ *
+ * \defgroup IfxLld_Port_Std_Enum Enumerations
+ * \ingroup IfxLld_Port_Std
+ * \defgroup IfxLld_Port_Std_DataStructures Data structures
+ * \ingroup IfxLld_Port_Std
+ * \defgroup IfxLld_Port_Std_SinglePin Single Pin Functions
+ * \ingroup IfxLld_Port_Std
+ * \defgroup IfxLld_Port_Std_PortGroup Group Access Functions
+ * \ingroup IfxLld_Port_Std
+ */
+
+#ifndef IFXPORT_H
+#define IFXPORT_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxPort_cfg.h"
+#include "Scu/Std/IfxScuWdt.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Port_Std_Enum
+ * \{ */
+/** \brief The LVDS RX_DIS control function can be selected from the Port (default) or
+ * HSCT module.declared in MODULE_PORTx.LPCRx
+ */
+typedef enum
+{
+ IfxPort_ControlledBy_port = 0, /**< \brief port controlled by PORT Module */
+ IfxPort_ControlledBy_hsct = 1 /**< \brief Port controlled by HSCT Module */
+} IfxPort_ControlledBy;
+
+/** \brief Ifx_P output modification modes definition.
+ */
+typedef enum
+{
+ IfxPort_InputMode_undefined = -1,
+ IfxPort_InputMode_noPullDevice = 0 << 3,
+ IfxPort_InputMode_pullDown = 1U << 3,
+ IfxPort_InputMode_pullUp = 2U << 3 /**< \brief */
+} IfxPort_InputMode;
+
+/** \brief Ifx_P input / output mode definition.
+ *
+ * \see Ifx_P.IOCR, IfxPort_setPinMode()
+ */
+typedef enum
+{
+ IfxPort_Mode_inputNoPullDevice = 0, /**< \brief Input, No pull device connected. */
+ IfxPort_Mode_inputPullDown = 8U, /**< \brief Input, pull-down device connected. */
+ IfxPort_Mode_inputPullUp = 0x10U, /**< \brief Input, pull-up device connected. */
+ IfxPort_Mode_outputPushPullGeneral = 0x80U, /**< \brief Push-pull, General-purpose output */
+ IfxPort_Mode_outputPushPullAlt1 = 0x88U, /**< \brief Push-pull, Alternate output function 1. */
+ IfxPort_Mode_outputPushPullAlt2 = 0x90U, /**< \brief Push-pull, Alternate output function 2. */
+ IfxPort_Mode_outputPushPullAlt3 = 0x98U, /**< \brief Push-pull, Alternate output function 3. */
+ IfxPort_Mode_outputPushPullAlt4 = 0xA0U, /**< \brief Push-pull, Alternate output function 4. */
+ IfxPort_Mode_outputPushPullAlt5 = 0xA8U, /**< \brief Push-pull, Alternate output function 5. */
+ IfxPort_Mode_outputPushPullAlt6 = 0xB0U, /**< \brief Push-pull, Alternate output function 6. */
+ IfxPort_Mode_outputPushPullAlt7 = 0xB8U, /**< \brief Push-pull, Alternate output function 7. */
+ IfxPort_Mode_outputOpenDrainGeneral = 0xC0U, /**< \brief Open-drain, General-purpose output. */
+ IfxPort_Mode_outputOpenDrainAlt1 = 0xC8U, /**< \brief Open-drain, Alternate output function 1. */
+ IfxPort_Mode_outputOpenDrainAlt2 = 0xD0U, /**< \brief Open-drain, Alternate output function 2. */
+ IfxPort_Mode_outputOpenDrainAlt3 = 0xD8U, /**< \brief Open-drain, Alternate output function 3. */
+ IfxPort_Mode_outputOpenDrainAlt4 = 0xE0U, /**< \brief Open-drain, Alternate output function 4. */
+ IfxPort_Mode_outputOpenDrainAlt5 = 0xE8U, /**< \brief Open-drain, Alternate output function 5. */
+ IfxPort_Mode_outputOpenDrainAlt6 = 0xF0U, /**< \brief Open-drain, Alternate output function 6. */
+ IfxPort_Mode_outputOpenDrainAlt7 = 0xF8U /**< \brief Open-drain, Alternate output function 7. */
+} IfxPort_Mode;
+
+/** \brief Pin output alternate index
+ */
+typedef enum
+{
+ IfxPort_OutputIdx_general = 0x10U << 3,
+ IfxPort_OutputIdx_alt1 = 0x11U << 3,
+ IfxPort_OutputIdx_alt2 = 0x12U << 3,
+ IfxPort_OutputIdx_alt3 = 0x13U << 3,
+ IfxPort_OutputIdx_alt4 = 0x14U << 3,
+ IfxPort_OutputIdx_alt5 = 0x15U << 3,
+ IfxPort_OutputIdx_alt6 = 0x16U << 3,
+ IfxPort_OutputIdx_alt7 = 0x17U << 3
+} IfxPort_OutputIdx;
+
+/** \brief Pin output mode definition
+ */
+typedef enum
+{
+ IfxPort_OutputMode_pushPull = 0x10U << 3,
+ IfxPort_OutputMode_openDrain = 0x18U << 3
+} IfxPort_OutputMode;
+
+/** \brief Pad driver mode definition (strength and slew rate).
+ *
+ * \see Ifx_P.PDR, IfxPort_setPinPadDriver()
+ */
+typedef enum
+{
+ IfxPort_PadDriver_cmosAutomotiveSpeed1 = 0, /**< \brief Speed grade 1. */
+ IfxPort_PadDriver_cmosAutomotiveSpeed2 = 1, /**< \brief Speed grade 2. */
+ IfxPort_PadDriver_cmosAutomotiveSpeed3 = 2, /**< \brief Speed grade 3. */
+ IfxPort_PadDriver_cmosAutomotiveSpeed4 = 3, /**< \brief Speed grade 4. */
+ IfxPort_PadDriver_lvdsSpeed1 = 4, /**< \brief Lvds Speed grade 1 */
+ IfxPort_PadDriver_lvdsSpeed2 = 5, /**< \brief Lvds Speed grade 2 */
+ IfxPort_PadDriver_lvdsSpeed3 = 6, /**< \brief Lvds Speed grade 3 */
+ IfxPort_PadDriver_lvdsSpeed4 = 7, /**< \brief Lvds Speed grade 4 */
+ IfxPort_PadDriver_ttlSpeed1 = 8, /**< \brief Speed grade 1. */
+ IfxPort_PadDriver_ttlSpeed2 = 9, /**< \brief Speed grade 2. */
+ IfxPort_PadDriver_ttlSpeed3 = 10, /**< \brief Speed grade 3. */
+ IfxPort_PadDriver_ttlSpeed4 = 11 /**< \brief Speed grade 4. */
+} IfxPort_PadDriver;
+
+/** \brief MODULE_PORTx.LPCRx.B.PS1.Selects between 5v and 3.3v on Vext supply for the LVDSM pair
+ */
+typedef enum
+{
+ IfxPort_PadSupply_5v = 0, /**< \brief select, 5V supply */
+ IfxPort_PadSupply_3v = 1 /**< \brief select, 3V supply */
+} IfxPort_PadSupply;
+
+/** \brief Ifx_P output modification modes definition.
+ *
+ * \see Ifx_P.OMR, IfxPort_setPinState()
+ */
+typedef enum
+{
+ IfxPort_State_notChanged = (0 << 16) | (0 << 0), /**< \brief Ifx_P pin is left unchanged. */
+ IfxPort_State_high = (0 << 16) | (1U << 0), /**< \brief Ifx_P pin is set to high. */
+ IfxPort_State_low = (1U << 16) | (0 << 0), /**< \brief Ifx_P pin is set to low. */
+ IfxPort_State_toggled = (1U << 16) | (1U << 0) /**< \brief Ifx_P pin is toggled. */
+} IfxPort_State;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Port_Std_DataStructures
+ * \{ */
+/** \brief Defines a pin
+ */
+typedef struct
+{
+ Ifx_P *port;
+ uint8 pinIndex;
+} IfxPort_Pin;
+
+/** \brief To configure pins
+ */
+typedef struct
+{
+ Ifx_P *port;
+ uint8 pinIndex;
+ IfxPort_OutputIdx mode;
+ IfxPort_PadDriver padDriver;
+} IfxPort_Pin_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Port_Std_SinglePin
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Return the port state.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin for which the state should be returned.
+ * \return Returns TRUE the pin is high; FALSE the pin is low
+ *
+ * Coding example:
+ * \code
+ * if( IfxPort_getPinState(&MODULE_P33, 0) ) {
+ * // ...
+ * }
+ * \endcode
+ *
+ */
+IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex);
+
+/** \brief Set the port output.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin to be set.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * IfxPort_setPinHigh(&MODULE_P33, 0);
+ * \endcode
+ *
+ * \see IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_togglePin()
+ *
+ */
+IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex);
+
+/** \brief Reset the port output.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin to be reset.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * IfxPort_setPinLow(&MODULE_P33, 0);
+ * \endcode
+ *
+ * \see IfxPort_setPinState(), IfxPort_setPinHigh(), IfxPort_togglePin()
+ *
+ */
+IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex);
+
+/** \brief Configure the port input / output mode.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin to be configured.
+ * \param mode Specifies the port pin mode.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * IfxPort_setPinModeInput(&MODULE_P33, 0, IfxPort_InputMode_pullUp);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode);
+
+/** \brief Configure the port input / output mode.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin to be configured.
+ * \param mode Specifies the port pin mode.
+ * \param index Specifies the alternate (or general purpose) output channel.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * IfxPort_setPinModeOutput(&MODULE_P33, 0, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index);
+
+/** \brief Set / Resets / Toggle the port output.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin to modify.
+ * \param action Specifies the action: set, reset, toggle.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
+ * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
+ * IfxPort_setPinState(&MODULE_P33, 0, IfxPort_State_toggled);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action);
+
+/** \brief Toggle the port output.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin to be toggled.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * IfxPort_togglePin(&MODULE_P33, 0);
+ * \endcode
+ *
+ * \see IfxPort_setPinState(), IfxPort_setPinLow(), IfxPort_setPinHigh()
+ *
+ */
+IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable the emergency stop function.
+ * This function disables the emergency stop function. A check is done on port functionality.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin for which the emergency stop function should be disabled.
+ * \return Returns TRUE if the emergency stop function has been disabled; FALSE if the emergency stop function could not be disabled
+ *
+ * Coding example:
+ * /code
+ * if( !IfxPort_disableEmergencyStop(&MODULE_P33, 0) )
+ * {
+ * // failed to disable emergency stop for P33.0
+ * }
+ * /endcode
+ *
+ * \see IfxPort_disableEmergencyStop(), IfxPort_resetESR()
+ *
+ */
+IFX_EXTERN boolean IfxPort_disableEmergencyStop(Ifx_P *port, uint8 pinIndex);
+
+/** \brief Enable the emergency stop function.
+ * This function enables the emergency stop function. A check is done on port functionality.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin for which the emergency stop function should be enabled.
+ * \return Returns TRUE if the emergency stop function has been enabled; FALSE if the emergency stop function could not be enabled
+ *
+ * Coding example:
+ * \code
+ * if( !IfxPort_enableEmergencyStop(&MODULE_P33, 0) ) {
+ * // failed to enable emergency stop for P33.0
+ * }
+ * \endcode
+ *
+ * \see IfxPort_disableEmergencyStop(), IfxPort_setESR()
+ *
+ */
+IFX_EXTERN boolean IfxPort_enableEmergencyStop(Ifx_P *port, uint8 pinIndex);
+
+/** \brief Configure the port input / output mode.
+ * Also Configures the P40/P41 Port for digital functionality
+ * which bydefault support analog functionality.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin to be configured.
+ * \param mode Specifies the port pin mode.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * IfxPort_setPinMode(&MODULE_P33, 0, IfxPort_Mode_outputPushPullGeneral);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxPort_setPinMode(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode);
+
+/** \brief Configure the pad driver mode.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin for which the mode will be set.
+ * \param padDriver Specifies the driver mode.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * // enable strong 3.3V driver
+ * IfxPort_setPinPadDriver(&MODULE_P33, 0, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxPort_setPinPadDriver(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver padDriver);
+
+/** \} */
+
+/** \addtogroup IfxLld_Port_Std_PortGroup
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Return the port group state
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex start at the given pin
+ * \param mask selects the pins which should be read (starting from pinIndex)
+ * \return Returns the selected pin values
+ *
+ * Coding example:
+ * \code
+ * // read the current value of P33[7:0]
+ * uint16 value = IfxPort_getGroupState(&MODULE_P33, 0, 0xff);
+ * \endcode
+ *
+ */
+IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask);
+
+/** \brief Set the port group state.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex start at the given pin
+ * \param mask selects the pins which should be modified (starting from pinIndex)
+ * \param data specifies the value which should be set
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * // configure P33.[7:0] as GPIO outputs
+ * IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
+ *
+ * // set initial value
+ * IfxPort_setGroupState(&MODULE_P33, 0, 0xff, 0x42);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the module address of the selected Port module
+ * \param port Pointer to PORT module registers
+ * \return PORT module register address
+ */
+IFX_EXTERN Ifx_P *IfxPort_getAddress(IfxPort_Index port);
+
+/** \brief Return port index within IfxModule_IndexMap (defined in IfxPort_cfg.c)
+ * \param port Pointer to the port for which the index number in IfxModule_IndexMap should be retrieved.
+ * \return port index of IfxModule_IndexMap. return -1 in case of unknown port index.
+ */
+IFX_EXTERN IfxPort_Index IfxPort_getIndex(Ifx_P *port);
+
+/** \brief Set pin modes to input at the pin location specified by '1' by the mask
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex start at the given pin
+ * \param mask selects the pins which should be modified (starting from pinIndex)
+ * \param mode Specifies the port pin mode.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * // configure P33.[7:0] as GPIO inputs with Pull-Down enabled
+ * IfxPort_setGroupModeInput(&MODULE_P33, 0, 0xff, IfxPort_InputMode_pullDown);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxPort_setGroupModeInput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_InputMode mode);
+
+/** \brief Set pin modes to output at the pin location specified by '1' by the mask starting at pinIndex
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex start at the given pin
+ * \param mask selects the pins which should be modified (starting from pinIndex)
+ * \param mode Specifies the port pin mode.
+ * \param index Specifies the alternate (or general purpose) output channel.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * // configure P33.[7:0] as GPIO outputs
+ * IfxPort_setGroupModeOutput(&MODULE_P33, 0, 0xff, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxPort_setGroupModeOutput(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_OutputMode mode, IfxPort_OutputIdx index);
+
+/** \brief Set pad driver strength at the pin location specified by '1' by the mask
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex start at the given pin
+ * \param mask selects the pins which should be modified (starting from pinIndex)
+ * \param padDriver Specifies the pad driver strength.
+ * \return None
+ *
+ * Coding example:
+ * \code
+ * // configure P33.[7:0] to use CMOS pad driver with speed 1
+ * IfxPort_setGroupPadDriver(&MODULE_P33, 0, 0xff, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxPort_setGroupPadDriver(Ifx_P *port, uint8 pinIndex, uint16 mask, IfxPort_PadDriver padDriver);
+
+/** \brief set LVDSH mode (configured for Port21)
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex specifies pin to be modified
+ * \param mode specifes the mode of pin
+ * \param enablePortControlled specifies whether it is controlled by port or HSCT
+ * \return None
+ */
+IFX_EXTERN void IfxPort_setPinModeLvdsHigh(Ifx_P *port, uint8 pinIndex, IfxPort_Mode mode, IfxPort_ControlledBy enablePortControlled);
+
+/** \brief set LVDSM mode
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex specifies pin to be modified
+ * \param lvdsPadDriver select speed grade of LVDS Pad
+ * \param padSupply select the PAD supply (5/3.3V)
+ * \return None
+ */
+IFX_EXTERN void IfxPort_setPinModeLvdsMedium(Ifx_P *port, uint8 pinIndex, IfxPort_PadDriver lvdsPadDriver, IfxPort_PadSupply padSupply);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable the emergency stop function.
+ * This function disables the emergency stop function. No check is done on port functionality.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin for which the emergency stop function should be disabled.
+ * \return None
+ *
+ * \see IfxPort_disableEmergencyStop()
+ *
+ */
+IFX_EXTERN void IfxPort_resetESR(Ifx_P *port, uint8 pinIndex);
+
+/** \brief Enable the emergency stop function.
+ * This function enables the emergency stop function. No check is done on port functionality.
+ * \param port Pointer to the port which should be accessed.
+ * \param pinIndex Specifies the pin for which the emergency stop function should be enabled.
+ * \return None
+ *
+ * \see IfxPort_enableEmergencyStop()
+ *
+ */
+IFX_EXTERN void IfxPort_setESR(Ifx_P *port, uint8 pinIndex);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE uint32 IfxPort_getGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask)
+{
+ return (uint32)((port->IN.U) >> (pinIndex)) & mask;
+}
+
+
+IFX_INLINE boolean IfxPort_getPinState(Ifx_P *port, uint8 pinIndex)
+{
+ return (__getbit(&port->IN.U, pinIndex) != 0) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxPort_setGroupState(Ifx_P *port, uint8 pinIndex, uint16 mask, uint16 data)
+{
+ port->OUT.U = (port->OUT.U & ~((uint32)(mask)) << pinIndex) | (data << pinIndex);
+}
+
+
+IFX_INLINE void IfxPort_setPinHigh(Ifx_P *port, uint8 pinIndex)
+{
+ IfxPort_setPinState(port, pinIndex, IfxPort_State_high);
+}
+
+
+IFX_INLINE void IfxPort_setPinLow(Ifx_P *port, uint8 pinIndex)
+{
+ IfxPort_setPinState(port, pinIndex, IfxPort_State_low);
+}
+
+
+IFX_INLINE void IfxPort_setPinModeInput(Ifx_P *port, uint8 pinIndex, IfxPort_InputMode mode)
+{
+ IfxPort_setPinMode(port, pinIndex, (IfxPort_Mode)mode);
+}
+
+
+IFX_INLINE void IfxPort_setPinModeOutput(Ifx_P *port, uint8 pinIndex, IfxPort_OutputMode mode, IfxPort_OutputIdx index)
+{
+ IfxPort_setPinMode(port, pinIndex, (IfxPort_Mode)(index | mode));
+}
+
+
+IFX_INLINE void IfxPort_setPinState(Ifx_P *port, uint8 pinIndex, IfxPort_State action)
+{
+ port->OMR.U = action << pinIndex;
+}
+
+
+IFX_INLINE void IfxPort_togglePin(Ifx_P *port, uint8 pinIndex)
+{
+ IfxPort_setPinState(port, pinIndex, IfxPort_State_toggled);
+}
+
+
+#endif /* IFXPORT_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Psi5/IfxPsi5_Psi5.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Psi5/IfxPsi5_Psi5.c
new file mode 100644
index 0000000..5007395
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Psi5/IfxPsi5_Psi5.c
@@ -0,0 +1,574 @@
+/**
+ * \file IfxPsi5_Psi5.c
+ * \brief PSI5 PSI5 details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxPsi5_Psi5.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxPsi5_Psi5_deInitModule(IfxPsi5_Psi5 *psi5)
+{
+ Ifx_PSI5 *psi5SFR = psi5->psi5;
+
+ IfxPsi5_Psi5_resetModule(psi5SFR);
+}
+
+
+void IfxPsi5_Psi5_enableModule(Ifx_PSI5 *psi5)
+{
+ psi5->CLC.U = 0x00000000;
+}
+
+
+uint32 IfxPsi5_Psi5_getFracDivClock(Ifx_PSI5 *psi5)
+{
+ uint32 result;
+ uint32 fPsi5 = IfxScuCcu_getSpbFrequency();
+
+ switch (psi5->FDR.B.DM)
+ {
+ case IfxPsi5_DividerMode_spb:
+ result = fPsi5;
+ break;
+ case IfxPsi5_DividerMode_normal:
+ result = fPsi5 / (IFXPSI5_STEP_RANGE - psi5->FDR.B.STEP);
+ break;
+ case IfxPsi5_DividerMode_fractional:
+ result = (fPsi5 * IFXPSI5_STEP_RANGE) / psi5->FDR.B.STEP;
+ break;
+ case IfxPsi5_DividerMode_off:
+ result = 0;
+ break;
+ default:
+ result = 0;
+ }
+
+ return result;
+}
+
+
+boolean IfxPsi5_Psi5_initChannel(IfxPsi5_Psi5_Channel *channel, const IfxPsi5_Psi5_ChannelConfig *config)
+{
+ uint32 wdtIdx;
+ boolean status = TRUE;
+
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ Ifx_PSI5 *psi5 = config->module->psi5;
+ Ifx_PSI5_CH *psi5Ch = &psi5->CH[config->channelId];
+ channel->channel = psi5Ch;
+ channel->module = (IfxPsi5_Psi5 *)config->module;
+ channel->channelId = config->channelId;
+
+ Ifx_PSI5_CH_PGC tempPGC;
+ tempPGC.B.PLEN = config->pulseGeneration.pulseLength;
+ tempPGC.B.DEL = config->pulseGeneration.delayLength;
+ tempPGC.B.TBS = config->pulseGeneration.timeBaseSelect;
+ tempPGC.B.ETB = config->pulseGeneration.externalTimeBaseSelect;
+ tempPGC.B.ETS = config->pulseGeneration.externalTriggerSelect;
+ tempPGC.B.BOT = config->pulseGeneration.blankoutTime;
+
+ switch (config->pulseGeneration.periodicOrExternalOrBypass)
+ {
+ case IfxPsi5_TriggerType_periodic:
+ tempPGC.B.PTE = TRUE;
+ tempPGC.B.ETE = FALSE;
+ tempPGC.B.BYP = FALSE;
+ break;
+
+ case IfxPsi5_TriggerType_external:
+ tempPGC.B.PTE = FALSE;
+ tempPGC.B.ETE = TRUE;
+ tempPGC.B.BYP = FALSE;
+ break;
+
+ case IfxPsi5_TriggerType_bypass:
+ tempPGC.B.PTE = FALSE;
+ tempPGC.B.ETE = FALSE;
+ tempPGC.B.BYP = TRUE;
+ break;
+ }
+
+ psi5Ch->PGC.U = tempPGC.U;
+
+ Ifx_PSI5_CH_CTV tempCTV;
+ tempCTV.B.CTV = config->channelTrigger.channelTriggerValue;
+ tempCTV.B.CTC = config->channelTrigger.channelTriggerCounter;
+ psi5Ch->CTV.U = tempCTV.U;
+
+ for (wdtIdx = 0; wdtIdx < IFXPSI5_NUM_WDTS; wdtIdx++)
+ {
+ psi5Ch->WDT[wdtIdx].U = config->watchdogTimerLimit[wdtIdx];
+ }
+
+ Ifx_PSI5_CH_RCRA tempRCRA;
+ tempRCRA.B.PDL0 = config->receiveControl.payloadLength[0];
+ tempRCRA.B.PDL1 = config->receiveControl.payloadLength[1];
+ tempRCRA.B.PDL2 = config->receiveControl.payloadLength[2];
+ tempRCRA.B.PDL3 = config->receiveControl.payloadLength[3];
+ tempRCRA.B.PDL4 = config->receiveControl.payloadLength[4];
+ tempRCRA.B.PDL5 = config->receiveControl.payloadLength[5];
+ tempRCRA.B.ASYN = config->receiveControl.asynchronousModeSelected;
+ tempRCRA.B.AVBS = config->receiveControl.verboseForAsynchronousMode;
+ psi5Ch->RCRA.U = tempRCRA.U;
+
+ Ifx_PSI5_CH_RCRB tempRCRB;
+ tempRCRB.B.MSG0 = config->receiveControl.messagingBitsPresence[0];
+ tempRCRB.B.MSG1 = config->receiveControl.messagingBitsPresence[1];
+ tempRCRB.B.MSG2 = config->receiveControl.messagingBitsPresence[2];
+ tempRCRB.B.MSG3 = config->receiveControl.messagingBitsPresence[3];
+ tempRCRB.B.MSG4 = config->receiveControl.messagingBitsPresence[4];
+ tempRCRB.B.MSG5 = config->receiveControl.messagingBitsPresence[5];
+ tempRCRB.B.CRC0 = config->receiveControl.crcOrParity[0];
+ tempRCRB.B.CRC1 = config->receiveControl.crcOrParity[1];
+ tempRCRB.B.CRC2 = config->receiveControl.crcOrParity[2];
+ tempRCRB.B.CRC3 = config->receiveControl.crcOrParity[3];
+ tempRCRB.B.CRC4 = config->receiveControl.crcOrParity[4];
+ tempRCRB.B.CRC5 = config->receiveControl.crcOrParity[5];
+ tempRCRB.B.FEC0 = config->receiveControl.frameExpectation[0];
+ tempRCRB.B.FEC1 = config->receiveControl.frameExpectation[1];
+ tempRCRB.B.FEC2 = config->receiveControl.frameExpectation[2];
+ tempRCRB.B.FEC3 = config->receiveControl.frameExpectation[3];
+ tempRCRB.B.FEC4 = config->receiveControl.frameExpectation[4];
+ tempRCRB.B.FEC5 = config->receiveControl.frameExpectation[5];
+ tempRCRB.B.VBS0 = config->receiveControl.verbose[0];
+ tempRCRB.B.VBS1 = config->receiveControl.verbose[1];
+ tempRCRB.B.VBS2 = config->receiveControl.verbose[2];
+ tempRCRB.B.VBS3 = config->receiveControl.verbose[3];
+ tempRCRB.B.VBS4 = config->receiveControl.verbose[4];
+ tempRCRB.B.VBS5 = config->receiveControl.verbose[5];
+ psi5Ch->RCRB.U = tempRCRB.U;
+
+ Ifx_PSI5_CH_RCRC tempRCRC;
+ tempRCRC.B.BRS = config->receiveControl.baudrateSelect;
+ tempRCRC.B.TSP = config->receiveControl.pulseTimestampSelect;
+ tempRCRC.B.TSF = config->receiveControl.frameTimestampSelect;
+ tempRCRC.B.TSR = config->receiveControl.receiveDataRegisterTimestamp;
+ psi5Ch->RCRC.U = tempRCRC.U;
+
+ Ifx_PSI5_RFC tempRFC;
+ tempRFC.B.FWL = config->receiveControl.fifoWarningLevel;
+ psi5->RFC[config->channelId].U = tempRFC.U;
+
+ Ifx_PSI5_CH_SCR tempSCR;
+ tempSCR.B.PLL = config->sendControl.payloadLength;
+ tempSCR.B.EPS = config->sendControl.enhancedProtocolSelected;
+ tempSCR.B.BSC = config->sendControl.bitStuffingEnabled;
+ tempSCR.B.SSL = config->sendControl.ssrPayloadLength;
+ tempSCR.B.SOL = config->sendControl.sorPayloadLength;
+ tempSCR.B.CRC = config->sendControl.crcGenerationEnabled;
+ tempSCR.B.STA = config->sendControl.startSequenceGenerationEnabled;
+ tempSCR.B.INH = config->sendControl.inhibitingAutomaticTransferEnabled;
+ psi5Ch->SCR.U = tempSCR.U;
+
+ Ifx_PSI5_CH_IOCR tempIOCR;
+ tempIOCR.B.DEPTH = config->inputOutputControl.digitalInputFilterDepth;
+ tempIOCR.B.OIE = config->inputOutputControl.outputInverterEnabled;
+ tempIOCR.B.IIE = config->inputOutputControl.inputInverterEnabled;
+ psi5Ch->IOCR.U = tempIOCR.U;
+
+ psi5->GCR.U |=
+ ((IFXPSI5_ENABLE_CHANNELTRIGGER << config->channelId) | (IFXPSI5_ENABLE_CHANNEL << config->channelId));
+
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ const IfxPsi5_Psi5_PinsConfig *pins = config->pinsConfig;
+
+ if (pins != NULL_PTR)
+ {
+ const IfxPsi5_Rx_In *rx = pins->in;
+
+ if (rx != NULL_PTR)
+ {
+ IfxPsi5_initRxPin(rx, pins->inMode, pins->pinDriver);
+ }
+
+ const IfxPsi5_Tx_Out *tx = pins->out;
+
+ if (tx != NULL_PTR)
+ {
+ IfxPsi5_initTxPin(tx, pins->outMode, pins->pinDriver);
+ }
+ }
+
+ return status;
+}
+
+
+void IfxPsi5_Psi5_initChannelConfig(IfxPsi5_Psi5_ChannelConfig *config, IfxPsi5_Psi5 *psi5)
+{
+ IfxPsi5_Psi5_ChannelConfig IfxPsi5_Psi5_defaultChannelConfig = {
+ .channelId = IfxPsi5_ChannelId_0,
+ .module = NULL_PTR,
+ .pulseGeneration = {
+ .pulseLength = 5,
+ .delayLength = 1,
+ .timeBaseSelect = IfxPsi5_TimeBase_internal,
+ .externalTimeBaseSelect = IfxPsi5_Trigger_0,
+ .periodicOrExternalOrBypass = IfxPsi5_TriggerType_periodic,
+ .externalTriggerSelect = IfxPsi5_Trigger_0,
+ .blankoutTime = 5
+ },
+ .channelTrigger = {
+ .channelTriggerValue = 0x150,
+ .channelTriggerCounter = 0x130
+ },
+ .watchdogTimerLimit[0] = 0x0,
+ .watchdogTimerLimit[1] = 0x0,
+ .watchdogTimerLimit[2] = 0x0,
+ .watchdogTimerLimit[3] = 0x0,
+ .watchdogTimerLimit[4] = 0x0,
+ .watchdogTimerLimit[5] = 0x0,
+ .watchdogTimerLimit[6] = 0x0,
+ .receiveControl = {
+ .payloadLength[0] = 8,
+ .payloadLength[1] = 8,
+ .payloadLength[2] = 8,
+ .payloadLength[3] = 8,
+ .payloadLength[4] = 8,
+ .payloadLength[5] = 8,
+ .asynchronousModeSelected = FALSE,
+ .verboseForAsynchronousMode = IfxPsi5_Verbose_off,
+ .messagingBitsPresence[0] = IfxPsi5_MessagingBits_absent,
+ .messagingBitsPresence[1] = IfxPsi5_MessagingBits_absent,
+ .messagingBitsPresence[2] = IfxPsi5_MessagingBits_absent,
+ .messagingBitsPresence[3] = IfxPsi5_MessagingBits_absent,
+ .messagingBitsPresence[4] = IfxPsi5_MessagingBits_absent,
+ .messagingBitsPresence[5] = IfxPsi5_MessagingBits_absent,
+ .crcOrParity[0] = IfxPsi5_CRCorParity_parity,
+ .crcOrParity[1] = IfxPsi5_CRCorParity_parity,
+ .crcOrParity[2] = IfxPsi5_CRCorParity_parity,
+ .crcOrParity[3] = IfxPsi5_CRCorParity_parity,
+ .crcOrParity[4] = IfxPsi5_CRCorParity_parity,
+ .crcOrParity[5] = IfxPsi5_CRCorParity_parity,
+ .frameExpectation[0] = IfxPsi5_FrameExpectation_notExpected,
+ .frameExpectation[1] = IfxPsi5_FrameExpectation_notExpected,
+ .frameExpectation[2] = IfxPsi5_FrameExpectation_notExpected,
+ .frameExpectation[3] = IfxPsi5_FrameExpectation_notExpected,
+ .frameExpectation[4] = IfxPsi5_FrameExpectation_notExpected,
+ .frameExpectation[5] = IfxPsi5_FrameExpectation_notExpected,
+ .verbose[0] = IfxPsi5_Verbose_off,
+ .verbose[1] = IfxPsi5_Verbose_off,
+ .verbose[2] = IfxPsi5_Verbose_off,
+ .verbose[3] = IfxPsi5_Verbose_off,
+ .verbose[4] = IfxPsi5_Verbose_off,
+ .verbose[5] = IfxPsi5_Verbose_off,
+ .baudrateSelect = IfxPsi5_BaudRate_125,
+ .pulseTimestampSelect = IfxPsi5_TimestampRegister_a,
+ .frameTimestampSelect = IfxPsi5_TimestampRegister_a,
+ .receiveDataRegisterTimestamp = IfxPsi5_ReceiveDataRegisterTimestamp_pulse,
+ .fifoWarningLevel = 16
+ },
+ .sendControl = {
+ .payloadLength = 32,
+ .enhancedProtocolSelected = FALSE,
+ .bitStuffingEnabled = FALSE,
+ .ssrPayloadLength = 32,
+ .sorPayloadLength = 32,
+ .crcGenerationEnabled = FALSE,
+ .startSequenceGenerationEnabled = FALSE,
+ .inhibitingAutomaticTransferEnabled = FALSE
+ },
+ .inputOutputControl = {
+ .digitalInputFilterDepth = IfxPsi5_DigitalInputFilterDepth_0,
+ .outputInverterEnabled = FALSE,
+ .inputInverterEnabled = FALSE
+ }
+ };
+ *config = IfxPsi5_Psi5_defaultChannelConfig;
+ config->module = psi5;
+}
+
+
+boolean IfxPsi5_Psi5_initModule(IfxPsi5_Psi5 *psi5, const IfxPsi5_Psi5_Config *config)
+{
+ boolean status = TRUE;
+ Ifx_PSI5 *psi5SFR = config->psi5;
+
+ psi5->psi5 = psi5SFR;
+
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ IfxPsi5_Psi5_enableModule(psi5SFR);
+
+ if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->fracDiv) == 0)
+ {
+ status = FALSE;
+
+ return status;
+ }
+ else
+ {}
+
+ if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->slowClock) == 0)
+ {
+ status = FALSE;
+
+ return status;
+ }
+ else
+ {}
+
+ if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->fastClock) == 0)
+ {
+ status = FALSE;
+
+ return status;
+ }
+ else
+ {}
+
+ if (IfxPsi5_Psi5_initializeClock(psi5SFR, &config->timestampClock) == 0)
+ {
+ status = FALSE;
+
+ return status;
+ }
+ else
+ {}
+
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ return status;
+}
+
+
+void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5)
+{
+ uint32 spbFrequency = IfxScuCcu_getSpbFrequency();
+
+ config->psi5 = psi5;
+ config->fracDiv.frequency = spbFrequency;
+ config->fracDiv.mode = IfxPsi5_DividerMode_normal;
+ config->fracDiv.type = IfxPsi5_ClockType_fracDiv;
+ config->slowClock.frequency = IFXPSI5_DEFAULT_SLOWCLOCK_FREQ;
+ config->slowClock.mode = IfxPsi5_DividerMode_fractional;
+ config->slowClock.type = IfxPsi5_ClockType_slowClock_125;
+ config->fastClock.frequency = IFXPSI5_DEFAULT_FASTCLOCK_FREQ;
+ config->fastClock.mode = IfxPsi5_DividerMode_fractional;
+ config->fastClock.type = IfxPsi5_ClockType_fastClock_189;
+ config->timestampClock.frequency = IFXPSI5_DEFAULT_TIMESTAMP_FREQ;
+ config->timestampClock.mode = IfxPsi5_DividerMode_normal;
+ config->timestampClock.type = IfxPsi5_ClockType_timeStamp;
+ config->timestampCounterA.externalTimeBaseSelect = IfxPsi5_Trigger_0;
+ config->timestampCounterA.timeBaseSelect = IfxPsi5_TimeBase_internal;
+ config->timestampCounterB.externalTimeBaseSelect = IfxPsi5_Trigger_0;
+ config->timestampCounterB.timeBaseSelect = IfxPsi5_TimeBase_internal;
+ config->timestampCounterC.externalTimeBaseSelect = IfxPsi5_Trigger_0;
+ config->timestampCounterC.timeBaseSelect = IfxPsi5_TimeBase_internal;
+}
+
+
+uint32 IfxPsi5_Psi5_initializeClock(Ifx_PSI5 *psi5, const IfxPsi5_Psi5_Clock *clock)
+{
+ uint64 step = 0;
+ uint32 result = 0;
+ IfxPsi5_DividerMode divMode = clock->mode;
+ IfxPsi5_ClockType clockType = clock->type;
+ uint32 clockFrequency = clock->frequency;
+ uint32 fInput;
+ Ifx_PSI5_FDR tempFDR, tempFDRL, tempFDRH, tempFDRT;
+
+ if (clockType == IfxPsi5_ClockType_fracDiv)
+ {
+ fInput = IfxScuCcu_getSpbFrequency();
+ }
+ else
+ {
+ fInput = IfxPsi5_Psi5_getFracDivClock(psi5);
+
+ if (fInput == 0)
+ {
+ result = 0;
+
+ return result;
+ }
+ else
+ {}
+ }
+
+ switch (divMode)
+ {
+ case IfxPsi5_DividerMode_normal:
+ step = IFXPSI5_STEP_RANGE - (fInput / clockFrequency);
+
+ if (step > (IFXPSI5_STEP_RANGE - 1))
+ {
+ step = IFXPSI5_STEP_RANGE - 1;
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ result = (uint32)(fInput / (IFXPSI5_STEP_RANGE - step));
+ break;
+
+ case IfxPsi5_DividerMode_fractional:
+ step = (uint64)((uint64)clockFrequency * IFXPSI5_STEP_RANGE) / fInput;
+
+ if (step > (IFXPSI5_STEP_RANGE - 1))
+ {
+ step = IFXPSI5_STEP_RANGE - 1;
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ result = (uint32)((uint64)((uint64)fInput * step)) / IFXPSI5_STEP_RANGE;
+ break;
+
+ case IfxPsi5_DividerMode_off:
+ default:
+ step = 0;
+ result = 0;
+ break;
+ }
+
+ if (result != 0)
+ {
+ switch (clockType)
+ {
+ case IfxPsi5_ClockType_fracDiv:
+ tempFDR.U = 0;
+ tempFDR.B.DM = divMode;
+ tempFDR.B.STEP = (uint32)step;
+ psi5->FDR.U = tempFDR.U;
+ break;
+
+ case IfxPsi5_ClockType_slowClock_125:
+ tempFDRL.U = 0;
+ tempFDRL.B.DM = divMode;
+ tempFDRL.B.STEP = (uint32)step;
+ psi5->FDRL.U = tempFDRL.U;
+ break;
+
+ case IfxPsi5_ClockType_fastClock_189:
+ tempFDRH.U = 0;
+ tempFDRH.B.DM = divMode;
+ tempFDRH.B.STEP = (uint32)step;
+ psi5->FDRH.U = tempFDRH.U;
+ break;
+
+ case IfxPsi5_ClockType_timeStamp:
+ tempFDRT.U = 0;
+ tempFDRT.B.DM = divMode;
+ tempFDRT.B.STEP = (uint32)step;
+ psi5->FDRT.U = tempFDRT.U;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+boolean IfxPsi5_Psi5_readChannelFrame(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Psi5_Frame *frame)
+{
+ if (channel->module->psi5->INTSTATA[channel->channelId].B.RDI == TRUE)
+ {
+ frame->rdm.lowWord = channel->channel->RDRL.U;
+ frame->rdm.highWord = channel->channel->RDRH.U;
+
+ channel->module->psi5->INTCLRA[channel->channelId].U |= (IFX_PSI5_INTCLRA_RDI_MSK << IFX_PSI5_INTCLRA_RDI_OFF) | (IFX_PSI5_INTCLRA_RSI_MSK << IFX_PSI5_INTCLRA_RSI_OFF);
+
+ return TRUE;
+ }
+ else
+ {
+ return FALSE;
+ }
+}
+
+
+boolean IfxPsi5_Psi5_readChannelSerialMessage(IfxPsi5_Psi5_Channel *channel, IfxPsi5_Slot slot, IfxPsi5_Psi5_SerialMessage *message)
+{
+ message->rds.value = channel->channel->SDS[slot].U;
+
+ return TRUE;
+}
+
+
+void IfxPsi5_Psi5_resetModule(Ifx_PSI5 *psi5)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearSafetyEndinit(passwd);
+ psi5->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ psi5->KRST0.B.RST = 1;
+
+ while (psi5->KRST0.B.RSTSTAT == 0)
+ {
+ /* Wait until reset is executed */
+ }
+
+ psi5->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setSafetyEndinit(passwd);
+}
+
+
+boolean IfxPsi5_Psi5_sendChannelData(IfxPsi5_Psi5_Channel *channel, uint64 data)
+{
+ uint32 dataLowWord = (uint32)(data & 0xFFFFFFFF);
+ uint32 dataHighWord = (uint32)((data >> 32) & 0xFFFFFFFF);
+ channel->channel->SDRL.U = dataLowWord;
+ channel->channel->SDRH.U = dataHighWord;
+
+ if (channel->module->psi5->INTSTATA[channel->channelId].B.TPOI)
+ {
+ return FALSE;
+ }
+ else
+ {
+ return TRUE;
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Psi5/IfxPsi5_Psi5.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Psi5/IfxPsi5_Psi5.h
new file mode 100644
index 0000000..ce97c66
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Psi5/IfxPsi5_Psi5.h
@@ -0,0 +1,521 @@
+/**
+ * \file IfxPsi5_Psi5.h
+ * \brief PSI5 PSI5 details
+ * \ingroup IfxLld_Psi5
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Psi5_Psi5_Usage How to use the PSI5 PSI5 Interface driver?
+ * \ingroup IfxLld_Psi5
+ *
+ * PSI5 communicates with the external world via one input/output line for each channel.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Psi5_Psi5_Preparation Preparation
+ * \subsection IfxLld_Psi5_Psi5_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Psi5_Psi5_Variables Variables
+ * //used globally
+ * \code
+ * IfxPsi5_Psi5_Channel psi5Channel[IFXPSI5_PINMAP_NUM_CHANNELS];
+ * \endcode
+ *
+ * \subsection IfxLld_Psi5_Psi5_Module Module Initialisation
+ * \code
+ * // create module config
+ * IfxPsi5_Psi5_Config psi5Config;
+ * IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
+ *
+ * // initialize module
+ * IfxPsi5_Psi5 psi5;
+ * IfxPsi5_Psi5_initModule(&psi5, &psi5Config);
+ * \endcode
+ *
+ * \subsection IfxLld_Psi5_Psi5_Channel Channel Initialisation
+ * \code
+ * // create channel config
+ * IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
+ * IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
+ *
+ * psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
+ * psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
+ * psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
+ * psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
+ * psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
+ * psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
+ * psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
+ *
+ * for(int slot=0; slot<6; ++slot) {
+ * psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
+ * if( slot == 0 )
+ * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_expected;
+ * else
+ * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_notExpected;
+ * }
+ *
+ * // initialize channels
+ * for(int chn=0; chnCLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPsi5_resetModule(Ifx_PSI5 *psi5)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ psi5->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ psi5->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == psi5->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ psi5->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPsi5_enableModule(Ifx_PSI5 *psi5)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ psi5->CLC.B.DISR = 0;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ if (psi5->CLC.U)
+ {}
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Std/IfxPsi5.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Std/IfxPsi5.h
new file mode 100644
index 0000000..5032c06
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Std/IfxPsi5.h
@@ -0,0 +1,603 @@
+/**
+ * \file IfxPsi5.h
+ * \brief PSI5 basic functionality
+ * \ingroup IfxLld_Psi5
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Psi5_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Psi5_Std
+ * \defgroup IfxLld_Psi5_Std_Channel Channel Status Functions
+ * \ingroup IfxLld_Psi5_Std
+ * \defgroup IfxLld_Psi5_Std_IO IO Pin Configuration Functions
+ * \ingroup IfxLld_Psi5_Std
+ * \defgroup IfxLld_Psi5_Std_Interrupt Interrupt configuration function
+ * \ingroup IfxLld_Psi5_Std
+ * \defgroup IfxLld_Psi5_Std_Operative Operative functions
+ * \ingroup IfxLld_Psi5_Std
+ */
+
+#ifndef IFXPSI5_H
+#define IFXPSI5_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxPsi5_cfg.h"
+#include "_PinMap/IfxPsi5_PinMap.h"
+#include "IfxPsi5_reg.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "Src/Std/IfxSrc.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Psi5_Std_Enumerations
+ * \{ */
+/** \brief MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection
+ */
+typedef enum
+{
+ IfxPsi5_AlternateInput_0 = 0, /**< \brief Alternate Input 0 */
+ IfxPsi5_AlternateInput_1, /**< \brief Alternate Input 1 */
+ IfxPsi5_AlternateInput_2, /**< \brief Alternate Input 2 */
+ IfxPsi5_AlternateInput_3 /**< \brief Alternate Input 3 */
+} IfxPsi5_AlternateInput;
+
+/** \brief MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection
+ */
+typedef enum
+{
+ IfxPsi5_BaudRate_125 = 0, /**< \brief Slow 125 kHz clock */
+ IfxPsi5_BaudRate_189 = 1 /**< \brief Fast 189 kHz clock */
+} IfxPsi5_BaudRate;
+
+/** \brief MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection
+ */
+typedef enum
+{
+ IfxPsi5_CRCorParity_parity = 0, /**< \brief parity selection */
+ IfxPsi5_CRCorParity_crc = 1 /**< \brief CRC selection */
+} IfxPsi5_CRCorParity;
+
+/** \brief Clock type
+ */
+typedef enum
+{
+ IfxPsi5_ClockType_fracDiv = 0, /**< \brief Fractional Divide clock */
+ IfxPsi5_ClockType_slowClock_125 = 1, /**< \brief Slow 125 kHz clock */
+ IfxPsi5_ClockType_fastClock_189 = 2, /**< \brief Fast 189 kHz clock */
+ IfxPsi5_ClockType_timeStamp = 3 /**< \brief Timestamp clock */
+} IfxPsi5_ClockType;
+
+/** \brief MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth
+ */
+typedef enum
+{
+ IfxPsi5_DigitalInputFilterDepth_0 = 0, /**< \brief Digital input filter depth is 0 */
+ IfxPsi5_DigitalInputFilterDepth_1, /**< \brief Digital input filter depth is 1 */
+ IfxPsi5_DigitalInputFilterDepth_2, /**< \brief Digital input filter depth is 2 */
+ IfxPsi5_DigitalInputFilterDepth_3, /**< \brief Digital input filter depth is 3 */
+ IfxPsi5_DigitalInputFilterDepth_4, /**< \brief Digital input filter depth is 4 */
+ IfxPsi5_DigitalInputFilterDepth_5, /**< \brief Digital input filter depth is 5 */
+ IfxPsi5_DigitalInputFilterDepth_6, /**< \brief Digital input filter depth is 6 */
+ IfxPsi5_DigitalInputFilterDepth_7, /**< \brief Digital input filter depth is 7 */
+ IfxPsi5_DigitalInputFilterDepth_8, /**< \brief Digital input filter depth is 8 */
+ IfxPsi5_DigitalInputFilterDepth_9, /**< \brief Digital input filter depth is 9 */
+ IfxPsi5_DigitalInputFilterDepth_10, /**< \brief Digital input filter depth is 10 */
+ IfxPsi5_DigitalInputFilterDepth_11, /**< \brief Digital input filter depth is 11 */
+ IfxPsi5_DigitalInputFilterDepth_12, /**< \brief Digital input filter depth is 12 */
+ IfxPsi5_DigitalInputFilterDepth_13, /**< \brief Digital input filter depth is 13 */
+ IfxPsi5_DigitalInputFilterDepth_14, /**< \brief Digital input filter depth is 14 */
+ IfxPsi5_DigitalInputFilterDepth_15 /**< \brief Digital input filter depth is 15 */
+} IfxPsi5_DigitalInputFilterDepth;
+
+/** \brief MODULE_PSI5.FDR.DM,Divider mode
+ */
+typedef enum
+{
+ IfxPsi5_DividerMode_spb = 0, /**< \brief divider mode is off */
+ IfxPsi5_DividerMode_normal = 1, /**< \brief divider mode is normal */
+ IfxPsi5_DividerMode_fractional = 2, /**< \brief divider mode is fractional */
+ IfxPsi5_DividerMode_off = 3 /**< \brief divider mode is off */
+} IfxPsi5_DividerMode;
+
+/** \brief MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control
+ */
+typedef enum
+{
+ IfxPsi5_FrameExpectation_notExpected = 0, /**< \brief No frame is expected */
+ IfxPsi5_FrameExpectation_expected = 1 /**< \brief Frame is expected */
+} IfxPsi5_FrameExpectation;
+
+/** \brief MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence
+ */
+typedef enum
+{
+ IfxPsi5_MessagingBits_absent = 0, /**< \brief No messaging bits */
+ IfxPsi5_MessagingBits_present = 1 /**< \brief 2 messaging bits */
+} IfxPsi5_MessagingBits;
+
+/** \brief MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers
+ */
+typedef enum
+{
+ IfxPsi5_ReceiveDataRegisterTimestamp_pulse = 0, /**< \brief Pulse based timestamp SPTSC to be stored in RDRHC */
+ IfxPsi5_ReceiveDataRegisterTimestamp_frame = 1 /**< \brief Start of frame based timestamp SPTSC to be stored in RDRHC */
+} IfxPsi5_ReceiveDataRegisterTimestamp;
+
+/** \brief MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id
+ */
+typedef enum
+{
+ IfxPsi5_Slot_0 = 0, /**< \brief slot 0 */
+ IfxPsi5_Slot_1, /**< \brief slot 1 */
+ IfxPsi5_Slot_2, /**< \brief slot 2 */
+ IfxPsi5_Slot_3, /**< \brief slot 3 */
+ IfxPsi5_Slot_4, /**< \brief slot 4 */
+ IfxPsi5_Slot_5 /**< \brief slot 5 */
+} IfxPsi5_Slot;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxPsi5_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxPsi5_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxPsi5_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxPsi5_SuspendMode;
+
+/** \brief MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base
+ */
+typedef enum
+{
+ IfxPsi5_TimeBase_internal = 0, /**< \brief Internal time stamp clock */
+ IfxPsi5_TimeBase_external = 1 /**< \brief External GTM inputs */
+} IfxPsi5_TimeBase;
+
+/** \brief MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type
+ */
+typedef enum
+{
+ IfxPsi5_TimestampRegister_a = 0, /**< \brief Timestamp register A */
+ IfxPsi5_TimestampRegister_b = 1, /**< \brief Timestamp register B */
+ IfxPsi5_TimestampRegister_c = 2 /**< \brief Timestamp register C */
+} IfxPsi5_TimestampRegister;
+
+/** \brief MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id
+ */
+typedef enum
+{
+ IfxPsi5_Trigger_0 = 0, /**< \brief trigger 0 */
+ IfxPsi5_Trigger_1, /**< \brief trigger 1 */
+ IfxPsi5_Trigger_2, /**< \brief trigger 2 */
+ IfxPsi5_Trigger_3, /**< \brief trigger 3 */
+ IfxPsi5_Trigger_4, /**< \brief trigger 4 */
+ IfxPsi5_Trigger_5 /**< \brief trigger 5 */
+} IfxPsi5_Trigger;
+
+/** \brief Trigger type
+ */
+typedef enum
+{
+ IfxPsi5_TriggerType_periodic = 0, /**< \brief Periodic trigger */
+ IfxPsi5_TriggerType_external = 1, /**< \brief External trigger */
+ IfxPsi5_TriggerType_bypass = 2 /**< \brief Bypassed trigger */
+} IfxPsi5_TriggerType;
+
+/** \brief MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode
+ */
+typedef enum
+{
+ IfxPsi5_Verbose_off = 0, /**< \brief Verbose mode is turned off */
+ IfxPsi5_Verbose_on = 1 /**< \brief Verbose mode is turned on */
+} IfxPsi5_Verbose;
+
+/** \} */
+
+/** \brief Options for choosing different Fractional Divider Registers
+ */
+typedef enum
+{
+ IfxPsi5_FractionalDividerRegister_normal = 0, /**< \brief The Fractional Divider Register controls the input clock f_fracdiv. */
+ IfxPsi5_FractionalDividerRegister_lowbitrate = 1, /**< \brief The Fractional Divider Register for lower Bit Rate contains the pre-divider that defines the time resolution of the
+ * f_125.It divides f_fracdiv by a factor and provides f_125 to all channels. */
+ IfxPsi5_FractionalDividerRegister_highbitrate = 2, /**< \brief The Fractional Divider Register for Higher Bit Rate contains the pre-divider that defines the time resolution of f_189.
+ * It divides f_fracdiv by a factor and provides f_189 to all channels. */
+ IfxPsi5_FractionalDividerRegister_timestamp = 3 /**< \brief The PSI5 Module Time Stamp Predivider Register contains the pre-divider that defines the time resolution of the
+ * Time Stamp Registers TSRA/B/C and the Sync Pulse Time Base Counter SBC. It divides fPSI5 by a factor. It contains as well the bits for reset control of the time stamp counters. */
+} IfxPsi5_FractionalDividerRegister;
+
+typedef enum
+{
+ IfxPsi5_InterruptServiceRequest_0 = 0,
+ IfxPsi5_InterruptServiceRequest_1 = 1,
+ IfxPsi5_InterruptServiceRequest_2 = 2,
+ IfxPsi5_InterruptServiceRequest_3 = 3,
+ IfxPsi5_InterruptServiceRequest_4 = 4,
+ IfxPsi5_InterruptServiceRequest_5 = 5,
+ IfxPsi5_InterruptServiceRequest_6 = 6,
+ IfxPsi5_InterruptServiceRequest_7 = 7
+} IfxPsi5_InterruptServiceRequest;
+
+typedef enum
+{
+ IfxPsi5_InterruptStatusRegister_a = 0,
+ IfxPsi5_InterruptStatusRegister_b = 1
+} IfxPsi5_InterruptStatusRegister;
+
+/** \brief Optiond for different Receive Control Registers(RCRA,RCRB,RCRC)
+ */
+typedef enum
+{
+ IfxPsi5_ReceiverControlRegister_a = 0, /**< \brief Receiver Control Register A configures the payload length of the up to 6 frames in the up to 6 slots. */
+ IfxPsi5_ReceiverControlRegister_b = 1, /**< \brief Receiver Control Register B configures up to 6 frame types in the up to 6 slots */
+ IfxPsi5_ReceiverControlRegister_c = 2 /**< \brief Receiver Control Register C configures bit rate and time stamp sources */
+} IfxPsi5_ReceiverControlRegister;
+
+/** \addtogroup IfxLld_Psi5_Std_Channel
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief access function to get the CRCI status register contents for a channel
+ * \param psi5 pointer to the PSI5 register space
+ * \param channel channel Id
+ * \return Crci status register contents
+ */
+IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
+
+/** \brief access function to get the MEI status register contents for a channel
+ * \param psi5 pointer to the PSI5 register space
+ * \param channel channel Id
+ * \return Mei status register contents
+ */
+IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
+
+/** \brief access function to get the NBI status register contents for a channel
+ * \param psi5 pointer to the PSI5 register space
+ * \param channel channel Id
+ * \return Nbi status register contents
+ */
+IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
+
+/** \brief access function to get the NFI status register contents for a channel
+ * \param psi5 pointer to the PSI5 register space
+ * \param channel channel Id
+ * \return Nfi status register contents
+ */
+IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
+
+/** \brief access function to get the RDI status register contents for a channel
+ * \param psi5 pointer to the PSI5 register space
+ * \param channel channel Id
+ * \return Rdi status register contents
+ */
+IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
+
+/** \brief access function to get the RMI status register contents for a channel
+ * \param psi5 pointer to the PSI5 register space
+ * \param channel channel Id
+ * \return Rmi status register contents
+ */
+IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
+
+/** \brief access function to get the RSI status register contents for a channel
+ * \param psi5 pointer to the PSI5 register space
+ * \param channel channel Id
+ * \return Rsi status register contents
+ */
+IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
+
+/** \brief access function to get the TEI status register contents for a channel
+ * \param psi5 pointer to the PSI5 register space
+ * \param channel channel Id
+ * \return Tei status register contents
+ */
+IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief resets PSI5 kernel
+ * \param psi5 pointer to PSI5 registers
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5_resetModule(Ifx_PSI5 *psi5);
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5_Std_IO
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes a RX input
+ * \param rx the RX Pin which should be configured
+ * \param inputMode pin input mode which should be configured
+ * \param padDriver Pad Driver Configuration
+ * \return None
+ */
+IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a TX output
+ * \param tx the TX Pin which should be configured
+ * \param outputMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Sets the alternate RX input
+ * \param psi5Ch pointer to the PSI5 channel register space
+ * \param alternateInput Alternate RX input selection
+ * \return None
+ */
+IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput);
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5_Std_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param psi5 Pointer to PSI5 module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param psi5 Pointer to PSI5 module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable PSI5 kernel
+ * \param psi5 pointer to the base of PSI5 registers
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5_disableModule(Ifx_PSI5 *psi5);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gives the pointer to the SRC register for respective PSI5 interrupt source
+ * \param psi5 Pointer to PSI5 SFR base register
+ * \param intRequest Interrupt Source
+ * \return Address of the required SRC register
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest);
+
+/** \brief Enabling all channels and error flags
+ * \param psi5 Pointer to PSI5 SFR base register
+ * \return None
+ */
+IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5);
+
+/**
+ * \param psi5 Pointer to PSI5 SFR base register
+ * \param fcd Select the appropriate divider register(see IfxPsi5_FractionalDividerRegister enum) for required functionality.
+ * \param value Contains value including divider values for different divider registers(FDR,FDRL,FDRH,FDRT)
+ * \return None
+ */
+IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5_enableModule(Ifx_PSI5 *psi5);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE uint32 IfxPsi5_getStatusCrci(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
+{
+ return psi5->CRCIOV[channel].U;
+}
+
+
+IFX_INLINE uint32 IfxPsi5_getStatusMei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
+{
+ return psi5->MEIOV[channel].U;
+}
+
+
+IFX_INLINE uint32 IfxPsi5_getStatusNbi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
+{
+ return psi5->NBIOV[channel].U;
+}
+
+
+IFX_INLINE uint32 IfxPsi5_getStatusNfi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
+{
+ return psi5->NFIOV[channel].U;
+}
+
+
+IFX_INLINE uint32 IfxPsi5_getStatusRdi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
+{
+ return psi5->RDIOV[channel].U;
+}
+
+
+IFX_INLINE uint32 IfxPsi5_getStatusRmi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
+{
+ return psi5->RMIOV[channel].U;
+}
+
+
+IFX_INLINE uint32 IfxPsi5_getStatusRsi(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
+{
+ return psi5->RSIOV[channel].U;
+}
+
+
+IFX_INLINE uint32 IfxPsi5_getStatusTei(Ifx_PSI5 *psi5, IfxPsi5_ChannelId channel)
+{
+ return psi5->TEIOV[channel].U;
+}
+
+
+IFX_INLINE void IfxPsi5_initRxPin(const IfxPsi5_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
+{
+ if (rx->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
+ IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
+ Ifx_PSI5 *psi5 = rx->module;
+ Ifx_PSI5_CH *psi5Ch = &psi5->CH[rx->channelId];
+ IfxPsi5_setRxInput(psi5Ch, (IfxPsi5_AlternateInput)rx->select);
+ }
+}
+
+
+IFX_INLINE void IfxPsi5_initTxPin(const IfxPsi5_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
+{
+ if (tx->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
+ IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxPsi5_setRxInput(Ifx_PSI5_CH *psi5Ch, IfxPsi5_AlternateInput alternateInput)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ psi5Ch->IOCR.B.ALTI = alternateInput;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE boolean IfxPsi5_isModuleSuspended(Ifx_PSI5 *psi5)
+{
+ Ifx_PSI5_OCS ocs;
+
+ // read the status
+ ocs.U = psi5->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxPsi5_setSuspendMode(Ifx_PSI5 *psi5, IfxPsi5_SuspendMode mode)
+{
+ Ifx_PSI5_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ psi5->OCS.U = ocs.U;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxPsi5_getSrcPointer(Ifx_PSI5 *psi5, IfxPsi5_InterruptServiceRequest intRequest)
+{
+ IFX_UNUSED_PARAMETER(psi5);
+ return &MODULE_SRC.PSI5.PSI5[0].SR[intRequest];
+}
+
+
+IFX_INLINE void IfxPsi5_enableAllChannels(Ifx_PSI5 *psi5)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ psi5->GCR.U = psi5->GCR.U | 0x000F001FU;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxPsi5_setFractionalDivider(Ifx_PSI5 *psi5, IfxPsi5_FractionalDividerRegister fcd, uint32 value)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ switch (fcd)
+ {
+ case IfxPsi5_FractionalDividerRegister_normal:
+ psi5->FDR.I = value;
+ break;
+ case IfxPsi5_FractionalDividerRegister_lowbitrate:
+ psi5->FDRL.I = value;
+ break;
+ case IfxPsi5_FractionalDividerRegister_highbitrate:
+ psi5->FDRH.I = value;
+ break;
+ case IfxPsi5_FractionalDividerRegister_timestamp:
+ psi5->FDRT.I = value;
+ break;
+ default:
+ break;
+ }
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+#endif /* IFXPSI5_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Psi5s/IfxPsi5s_Psi5s.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Psi5s/IfxPsi5s_Psi5s.c
new file mode 100644
index 0000000..0d8283a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Psi5s/IfxPsi5s_Psi5s.c
@@ -0,0 +1,657 @@
+/**
+ * \file IfxPsi5s_Psi5s.c
+ * \brief PSI5S PSI5S details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxPsi5s_Psi5s.h"
+
+/** \addtogroup IfxLld_Psi5s_Psi5s_Utility
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief get the fracDiv clock frequency
+ * \param psi5s Pointer to the base of PSI5S register space
+ * \return Returns the configured fracDiv psi5s clock frequency in Hz.
+ */
+IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s);
+
+/** \brief Configure the fracDiv clock.
+ * \param psi5s Pointer to the base of PSI5S register space
+ * \param clock Specifies the required clock frequency in Hz.
+ * \return Returns the configured clock frequency in Hz.
+ */
+IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock);
+
+/** \brief Configure the baudrate at the ASC interface.
+ * \param psi5s Pointer to the base of PSI5S register space
+ * \param baudrate Frequency Specifies the required baudrate frequency in Hz.
+ * \param ascConfig pointer to the configuration structure for ASC
+ * \return Returns the configured baudrate frequency in Hz.
+ */
+IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s)
+{
+ Ifx_PSI5S *psi5sSFR = psi5s->psi5s;
+ IfxPsi5s_Psi5s_resetModule(psi5sSFR);
+}
+
+
+void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s)
+{
+ psi5s->CLC.U = 0x00000000;
+}
+
+
+IFX_STATIC uint32 IfxPsi5s_Psi5s_getFracDivClock(Ifx_PSI5S *psi5s)
+{
+ uint32 result;
+ uint32 fPsi5s = IfxScuCcu_getSpbFrequency();
+
+ switch (psi5s->FDR.B.DM)
+ {
+ case IfxPsi5s_DividerMode_spb:
+ result = fPsi5s;
+ break;
+ case IfxPsi5s_DividerMode_normal:
+ result = fPsi5s / (IFXPSI5S_STEP_RANGE - psi5s->FDR.B.STEP);
+ break;
+ case IfxPsi5s_DividerMode_fractional:
+ result = (fPsi5s * IFXPSI5S_STEP_RANGE) / psi5s->FDR.B.STEP;
+ break;
+ case IfxPsi5s_DividerMode_off:
+ result = 0;
+ break;
+ default:
+ result = 0;
+ }
+
+ return result;
+}
+
+
+boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config)
+{
+ boolean status = TRUE;
+
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ Ifx_PSI5S *psi5s = config->module->psi5s;
+ channel->module = (IfxPsi5s_Psi5s *)config->module;
+ channel->channelId = config->channelId;
+
+ Ifx_PSI5S_PGC tempPGC;
+ tempPGC.U = psi5s->PGC[config->channelId].U;
+ tempPGC.B.TXCMD = config->pulseGeneration.codeforZero;
+ tempPGC.B.ATXCMD = config->pulseGeneration.codeforOne;
+ tempPGC.B.TBS = config->pulseGeneration.timeBaseSelect;
+ tempPGC.B.ETB = config->pulseGeneration.externalTimeBaseSelect;
+ tempPGC.B.ETS = config->pulseGeneration.externalTriggerSelect;
+
+ switch (config->pulseGeneration.periodicOrExternal)
+ {
+ case IfxPsi5s_TriggerType_periodic:
+ tempPGC.B.PTE = TRUE;
+ tempPGC.B.ETE = FALSE;
+ break;
+
+ case IfxPsi5s_TriggerType_external:
+ tempPGC.B.PTE = FALSE;
+ tempPGC.B.ETE = TRUE;
+ break;
+ }
+
+ psi5s->PGC[config->channelId].U = tempPGC.U;
+
+ Ifx_PSI5S_CTV tempCTV;
+ tempCTV.U = psi5s->CTV[config->channelId].U;
+ tempCTV.B.CTV = config->channelTrigger.channelTriggerValue;
+ tempCTV.B.CTC = config->channelTrigger.channelTriggerCounter;
+ psi5s->CTV[config->channelId].U = tempCTV.U;
+
+ psi5s->WDT[config->channelId].U = config->watchdogTimerLimit;
+
+ Ifx_PSI5S_RCRA tempRCRA;
+ tempRCRA.U = psi5s->RCRA[config->channelId].U;
+ tempRCRA.B.CRC0 = config->receiveControl.crcOrParity[0];
+ tempRCRA.B.CRC1 = config->receiveControl.crcOrParity[1];
+ tempRCRA.B.CRC2 = config->receiveControl.crcOrParity[2];
+ tempRCRA.B.CRC3 = config->receiveControl.crcOrParity[3];
+ tempRCRA.B.CRC4 = config->receiveControl.crcOrParity[4];
+ tempRCRA.B.CRC5 = config->receiveControl.crcOrParity[5];
+ tempRCRA.B.TSEN = config->receiveControl.timestampEnabled;
+ tempRCRA.B.TSP = config->receiveControl.timestampSelect;
+ tempRCRA.B.TSTS = config->receiveControl.timestampTriggerSelect;
+ tempRCRA.B.FIDS = config->receiveControl.frameIdSelect;
+ tempRCRA.B.WDMS = config->receiveControl.watchdogTimerModeSelect;
+ tempRCRA.B.UFC0 = config->receiveControl.uartFrameCount[0];
+ tempRCRA.B.UFC1 = config->receiveControl.uartFrameCount[1];
+ tempRCRA.B.UFC2 = config->receiveControl.uartFrameCount[2];
+ tempRCRA.B.UFC3 = config->receiveControl.uartFrameCount[3];
+ tempRCRA.B.UFC4 = config->receiveControl.uartFrameCount[4];
+ tempRCRA.B.UFC5 = config->receiveControl.uartFrameCount[5];
+ psi5s->RCRA[config->channelId].U = tempRCRA.U;
+
+ Ifx_PSI5S_RCRB tempRCRB;
+ tempRCRB.U = psi5s->RCRB[config->channelId].U;
+ tempRCRB.B.PDL0 = config->receiveControl.payloadLength[0];
+ tempRCRB.B.PDL1 = config->receiveControl.payloadLength[1];
+ tempRCRB.B.PDL2 = config->receiveControl.payloadLength[2];
+ tempRCRB.B.PDL3 = config->receiveControl.payloadLength[3];
+ tempRCRB.B.PDL4 = config->receiveControl.payloadLength[4];
+ tempRCRB.B.PDL5 = config->receiveControl.payloadLength[5];
+ psi5s->RCRB[config->channelId].U = tempRCRB.U;
+
+ psi5s->NFC.U = (config->receiveControl.numberOfFramesExpected << (config->channelId * 3));
+
+ Ifx_PSI5S_SCR tempSCR;
+ tempSCR.U = psi5s->SCR[config->channelId].U;
+ tempSCR.B.PLL = config->sendControl.payloadLength;
+ tempSCR.B.EPS = config->sendControl.enhancedProtocolSelection;
+ tempSCR.B.BSC = config->sendControl.bitStuffControl;
+ tempSCR.B.CRC = config->sendControl.crcGenerationControl;
+ tempSCR.B.STA = config->sendControl.startSequenceGenerationControl;
+ psi5s->SCR[config->channelId].U = tempSCR.U;
+
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ return status;
+}
+
+
+void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s)
+{
+ IfxPsi5s_Psi5s_ChannelConfig IfxPsi5s_Psi5s_defaultChannelConfig = {
+ .channelId = IfxPsi5s_ChannelId_0,
+ .module = NULL_PTR,
+ .pulseGeneration = {
+ .codeforZero = 0,
+ .codeforOne = 1,
+ .timeBaseSelect = IfxPsi5s_TimeBase_internal,
+ .externalTimeBaseSelect = IfxPsi5s_Trigger_0,
+ .periodicOrExternal = IfxPsi5s_TriggerType_periodic,
+ .externalTriggerSelect = IfxPsi5s_Trigger_0,
+ },
+ .channelTrigger = {
+ .channelTriggerValue = 0x20,
+ .channelTriggerCounter = 0x0
+ },
+ .watchdogTimerLimit = 0x0,
+ .receiveControl = {
+ .crcOrParity[0] = IfxPsi5s_CrcOrParity_parity,
+ .crcOrParity[1] = IfxPsi5s_CrcOrParity_parity,
+ .crcOrParity[2] = IfxPsi5s_CrcOrParity_parity,
+ .crcOrParity[3] = IfxPsi5s_CrcOrParity_parity,
+ .crcOrParity[4] = IfxPsi5s_CrcOrParity_parity,
+ .crcOrParity[5] = IfxPsi5s_CrcOrParity_parity,
+ .timestampEnabled = FALSE,
+ .timestampSelect = IfxPsi5s_TimestampRegister_a,
+ .timestampTriggerSelect = IfxPsi5s_TimestampTrigger_syncPulse,
+ .frameIdSelect = IfxPsi5s_FrameId_frameHeader,
+ .watchdogTimerModeSelect = IfxPsi5s_WatchdogTimerMode_frame,
+ .uartFrameCount[0] = IfxPsi5s_UartFrameCount_3,
+ .uartFrameCount[1] = IfxPsi5s_UartFrameCount_3,
+ .uartFrameCount[2] = IfxPsi5s_UartFrameCount_3,
+ .uartFrameCount[3] = IfxPsi5s_UartFrameCount_3,
+ .uartFrameCount[4] = IfxPsi5s_UartFrameCount_3,
+ .uartFrameCount[5] = IfxPsi5s_UartFrameCount_3,
+ .payloadLength[0] = 0,
+ .payloadLength[1] = 0,
+ .payloadLength[2] = 0,
+ .payloadLength[3] = 0,
+ .payloadLength[4] = 0,
+ .payloadLength[5] = 0,
+ .numberOfFramesExpected = IfxPsi5s_NumberExpectedFrames_1,
+ },
+ .sendControl = {
+ .payloadLength = 6,
+ .enhancedProtocolSelection = IfxPsi5s_EnhancedProtocol_toothGapMethod,
+ .bitStuffControl = FALSE,
+ .crcGenerationControl = FALSE,
+ .startSequenceGenerationControl = FALSE
+ }
+ };
+ *config = IfxPsi5s_Psi5s_defaultChannelConfig;
+ config->module = psi5s;
+}
+
+
+boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config)
+{
+ boolean status = TRUE;
+
+ Ifx_PSI5S *psi5sSFR = config->module;
+ psi5s->psi5s = psi5sSFR;
+
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ IfxPsi5s_Psi5s_enableModule(psi5sSFR);
+
+ if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->fracDiv) == 0)
+ {
+ status = FALSE;
+ return status;
+ }
+ else
+ {}
+
+ if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->timestampClock) == 0)
+ {
+ status = FALSE;
+ return status;
+ }
+ else
+ {}
+
+ Ifx_PSI5S_CON tempCON;
+ tempCON.U = psi5sSFR->CON.U;
+ tempCON.B.M = config->ascConfig.receiveMode;
+ tempCON.B.STP = config->ascConfig.stopBits;
+ tempCON.B.PEN = config->ascConfig.parityCheckEnabled;
+ tempCON.B.FEN = config->ascConfig.framingCheckEnabled;
+ tempCON.B.OEN = config->ascConfig.overrunCheckEnabled;
+ tempCON.B.FDE = config->ascConfig.fractionalDividerEnabled;
+ tempCON.B.ODD = config->ascConfig.receiverOddParityEnabled;
+ tempCON.B.BRS = config->ascConfig.baudrateSelection;
+ tempCON.B.LB = config->ascConfig.loopbackEnabled;
+ tempCON.B.MTX = config->ascConfig.transmitMode;
+ tempCON.B.ODDTX = config->ascConfig.transmitterOddParityEnabled;
+ psi5sSFR->CON.U = tempCON.U;
+
+ if (IfxPsi5s_Psi5s_setBaudrate(psi5sSFR, config->ascConfig.baudrateFrequency, (IfxPsi5s_Psi5s_AscConfig *)&(config->ascConfig))
+ == 0)
+ {
+ status = FALSE;
+ return status;
+ }
+ else
+ {}
+
+ if (IfxPsi5s_Psi5s_initializeClock(psi5sSFR, &config->ascConfig.clockOutput) == 0)
+ {
+ status = FALSE;
+ return status;
+ }
+ else
+ {}
+
+ Ifx_PSI5S_TSCNTA tempTSCNTA;
+ tempTSCNTA.U = psi5sSFR->TSCNTA.U;
+ tempTSCNTA.B.ETB = config->timestampCounterA.externalTimeBaseSelect;
+ tempTSCNTA.B.TBS = config->timestampCounterA.timeBaseSelect;
+ psi5sSFR->TSCNTA.U = tempTSCNTA.U;
+
+ Ifx_PSI5S_TSCNTB tempTSCNTB;
+ tempTSCNTB.U = psi5sSFR->TSCNTB.U;
+ tempTSCNTB.B.ETB = config->timestampCounterB.externalTimeBaseSelect;
+ tempTSCNTB.B.TBS = config->timestampCounterB.timeBaseSelect;
+ psi5sSFR->TSCNTB.U = tempTSCNTB.U;
+
+ Ifx_PSI5S_GCR tempGCR;
+ tempGCR.U = psi5sSFR->GCR.U;
+ tempGCR.B.CRCI = config->globalControlConfig.crcErrorConsideredForRSI;
+ tempGCR.B.XCRCI = config->globalControlConfig.xcrcErrorConsideredForRSI;
+ tempGCR.B.TEI = config->globalControlConfig.transmitErrorConsideredForRSI;
+ tempGCR.B.PE = config->globalControlConfig.parityErrorConsideredForRSI;
+ tempGCR.B.FE = config->globalControlConfig.framingErrorConsideredForRSI;
+ tempGCR.B.OE = config->globalControlConfig.overrunErrorConsideredForRSI;
+ tempGCR.B.RBI = config->globalControlConfig.receiveBufferErrorConsideredForRSI;
+ tempGCR.B.HDI = config->globalControlConfig.headerErrorConsideredForRSI;
+ tempGCR.B.IDT = config->globalControlConfig.idleTime;
+ tempGCR.B.ASC = config->globalControlConfig.ascOnlyMode;
+ psi5sSFR->GCR.U = tempGCR.U;
+
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ // Pin mapping //
+ const IfxPsi5s_Psi5s_Pins *pins = config->pins;
+
+ if (pins != NULL_PTR)
+ {
+ const IfxPsi5s_Rx_In *rx = pins->rx;
+
+ if (rx != NULL_PTR)
+ {
+ IfxPsi5s_initRxPin(rx, pins->rxMode, pins->pinDriver);
+ }
+
+ const IfxPsi5s_Tx_Out *tx = pins->tx;
+
+ if (tx != NULL_PTR)
+ {
+ IfxPsi5s_initTxPin(tx, pins->txMode, pins->pinDriver);
+ }
+
+ const IfxPsi5s_Clk_Out *clk = pins->clk;
+
+ if (clk != NULL_PTR)
+ {
+ IfxPsi5s_initClkPin(clk, pins->clkMode, pins->pinDriver);
+ }
+ }
+
+ return status;
+}
+
+
+void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s)
+{
+ uint32 spbFrequency = IfxScuCcu_getSpbFrequency();
+ config->module = psi5s;
+ config->fracDiv.frequency = spbFrequency;
+ config->fracDiv.mode = IfxPsi5s_DividerMode_normal;
+ config->fracDiv.type = IfxPsi5s_ClockType_fracDiv;
+ config->timestampClock.frequency = spbFrequency;
+ config->timestampClock.mode = IfxPsi5s_DividerMode_normal;
+ config->timestampClock.type = IfxPsi5s_ClockType_timeStamp;
+ config->timestampCounterA.externalTimeBaseSelect = IfxPsi5s_Trigger_0;
+ config->timestampCounterA.timeBaseSelect = IfxPsi5s_TimeBase_internal;
+ config->timestampCounterB.externalTimeBaseSelect = IfxPsi5s_Trigger_0;
+ config->timestampCounterB.timeBaseSelect = IfxPsi5s_TimeBase_internal;
+ config->ascConfig.baudrateFrequency = IFXPSI5S_BAUDRATE_1562500;
+ config->ascConfig.clockOutput.frequency = spbFrequency;
+ config->ascConfig.clockOutput.mode = IfxPsi5s_DividerMode_normal;
+ config->ascConfig.clockOutput.type = IfxPsi5s_ClockType_ascOutput;
+ config->ascConfig.receiveMode = IfxPsi5s_AscMode_sync;
+ config->ascConfig.stopBits = IfxPsi5s_AscStopBits_1;
+ config->ascConfig.parityCheckEnabled = FALSE;
+ config->ascConfig.framingCheckEnabled = FALSE;
+ config->ascConfig.overrunCheckEnabled = FALSE;
+ config->ascConfig.fractionalDividerEnabled = FALSE;
+ config->ascConfig.receiverOddParityEnabled = FALSE;
+ config->ascConfig.baudrateSelection = IfxPsi5s_AscBaudratePrescalar_divideBy2;
+ config->ascConfig.loopbackEnabled = IfxPsi5s_LoopBackMode_disable;
+ config->ascConfig.transmitMode = IfxPsi5s_AscMode_sync;
+ config->ascConfig.transmitterOddParityEnabled = FALSE;
+ config->globalControlConfig.crcErrorConsideredForRSI = TRUE;
+ config->globalControlConfig.xcrcErrorConsideredForRSI = TRUE;
+ config->globalControlConfig.transmitErrorConsideredForRSI = TRUE;
+ config->globalControlConfig.parityErrorConsideredForRSI = TRUE;
+ config->globalControlConfig.framingErrorConsideredForRSI = TRUE;
+ config->globalControlConfig.overrunErrorConsideredForRSI = FALSE;
+ config->globalControlConfig.receiveBufferErrorConsideredForRSI = FALSE;
+ config->globalControlConfig.headerErrorConsideredForRSI = FALSE;
+ config->globalControlConfig.idleTime = IfxPsi5s_IdleTime_1;
+ config->globalControlConfig.ascOnlyMode = FALSE;
+ config->pins = NULL_PTR;
+}
+
+
+IFX_STATIC uint32 IfxPsi5s_Psi5s_initializeClock(Ifx_PSI5S *psi5s, const IfxPsi5s_Psi5s_Clock *clock)
+{
+ uint64 step = 0;
+ uint32 stepRange = IFXPSI5S_STEP_RANGE;
+ uint32 result = 0;
+ IfxPsi5s_DividerMode divMode = clock->mode;
+ IfxPsi5s_ClockType clockType = clock->type;
+ uint32 clockFrequency = clock->frequency;
+ uint32 fInput;
+ Ifx_PSI5S_FDR tempFDR;
+ Ifx_PSI5S_FDRT tempFDRT;
+ Ifx_PSI5S_FDO tempFDO;
+
+ if (clockType == IfxPsi5s_ClockType_fracDiv)
+ {
+ fInput = IfxScuCcu_getSpbFrequency();
+ }
+ else if (clockType == IfxPsi5s_ClockType_ascOutput)
+ {
+ fInput = IfxScuCcu_getSpbFrequency(); // assumption here is that fBaud2 is equal to fSPB
+ stepRange = 2 * IFXPSI5S_STEP_RANGE;
+ }
+ else
+ {
+ fInput = IfxPsi5s_Psi5s_getFracDivClock(psi5s);
+
+ if (fInput == 0)
+ {
+ result = 0;
+ return result;
+ }
+ else
+ {}
+ }
+
+ switch (divMode)
+ {
+ case IfxPsi5s_DividerMode_normal:
+ step = stepRange - (fInput / clockFrequency);
+
+ if (step > (stepRange - 1))
+ {
+ step = stepRange - 1;
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ result = (uint32)(fInput / (stepRange - step));
+ break;
+
+ case IfxPsi5s_DividerMode_fractional:
+ step = (uint64)((uint64)clockFrequency * stepRange) / fInput;
+
+ if (step > (stepRange - 1))
+ {
+ step = stepRange - 1;
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ result = (uint32)((uint64)((uint64)fInput * step)) / stepRange;
+ break;
+
+ case IfxPsi5s_DividerMode_off:
+ default:
+ step = 0;
+ result = 0;
+ break;
+ }
+
+ if (result != 0)
+ {
+ switch (clockType)
+ {
+ case IfxPsi5s_ClockType_fracDiv:
+ tempFDR.U = 0;
+ tempFDR.B.DM = divMode;
+ tempFDR.B.STEP = (uint32)step;
+ psi5s->FDR.U = tempFDR.U;
+ break;
+
+ case IfxPsi5s_ClockType_timeStamp:
+ tempFDRT.U = 0;
+ tempFDRT.B.DM = divMode;
+ tempFDRT.B.STEP = (uint32)step;
+ psi5s->FDRT.U = tempFDRT.U;
+ break;
+
+ case IfxPsi5s_ClockType_ascOutput:
+ tempFDO.U = 0;
+ tempFDO.B.DM = divMode;
+ tempFDO.B.STEP = (uint32)step;
+ psi5s->FDO.U = tempFDO.U;
+ break;
+ default:
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame)
+{
+ frame->data.rdr = channel->module->psi5s->RDR.U;
+ frame->status.rds = channel->module->psi5s->RDS.U;
+ frame->timestamp.tsm = channel->module->psi5s->TSM.U;
+
+ channel->module->psi5s->INTCLR[channel->channelId].U |= (IFX_PSI5S_INTCLR_RDI_MSK << IFX_PSI5S_INTCLR_RDI_OFF) | (IFX_PSI5S_INTCLR_RSI_MSK << IFX_PSI5S_INTCLR_RSI_OFF);
+}
+
+
+void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(passwd);
+ psi5s->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ psi5s->KRST0.B.RST = 1;
+
+ while (psi5s->KRST0.B.RSTSTAT == 0)
+ {
+ /* Wait until reset is executed */
+ }
+
+ psi5s->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setSafetyEndinit(passwd);
+}
+
+
+boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data)
+{
+ channel->module->psi5s->SDR[channel->channelId].U = data & 0x00FFFFFF;
+
+ if (channel->module->psi5s->INTSTAT[channel->channelId].B.TPOI)
+ {
+ return FALSE;
+ }
+ else
+ {
+ return TRUE;
+ }
+}
+
+
+IFX_STATIC uint32 IfxPsi5s_Psi5s_setBaudrate(Ifx_PSI5S *psi5s, uint32 baudrate, IfxPsi5s_Psi5s_AscConfig *ascConfig)
+{
+ uint32 bgValue = 0;
+ uint32 fdValue = 0;
+ uint32 result = 0;
+ uint32 fInput;
+
+ if (ascConfig->receiveMode == IfxPsi5s_AscMode_sync)
+ {
+ if (ascConfig->transmitMode != IfxPsi5s_AscMode_sync)
+ {
+ // sync modes must be set for both receive and transmit
+ }
+
+ fInput = IfxScuCcu_getBaud2Frequency();
+ bgValue = (uint32)(fInput / ((ascConfig->baudrateSelection + 2) * 4 * (uint64)baudrate) - 1);
+
+ if (bgValue > (IFXPSI5S_BG_RANGE - 1))
+ {
+ bgValue = IFXPSI5S_BG_RANGE - 1;
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ result = fInput / ((ascConfig->baudrateSelection + 2) * 4 * (bgValue + 1));
+ }
+ else if (ascConfig->fractionalDividerEnabled == FALSE)
+ {
+ fInput = IfxScuCcu_getBaud2Frequency();
+ bgValue = (uint32)(fInput / ((ascConfig->baudrateSelection + 2) * 16 * (uint64)baudrate) - 1);
+
+ if (bgValue > (IFXPSI5S_BG_RANGE - 1))
+ {
+ bgValue = IFXPSI5S_BG_RANGE - 1;
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ result = fInput / ((ascConfig->baudrateSelection + 2) * 16 * (bgValue + 1));
+ }
+ else
+ {
+ fInput = IfxScuCcu_getBaud2Frequency();
+ fdValue = (((uint64)baudrate * IFXPSI5S_FDV_RANGE * 16)) / (float)fInput;
+
+ if (fdValue > (IFXPSI5S_FDV_RANGE - 1))
+ {
+ fdValue = IFXPSI5S_FDV_RANGE - 1;
+ bgValue = ((float)fdValue / IFXPSI5S_FDV_RANGE) * (fInput / (16 * baudrate)) - 1;
+
+ if (bgValue > (IFXPSI5S_BG_RANGE - 1))
+ {
+ bgValue = IFXPSI5S_BG_RANGE - 1;
+ }
+ else
+ {
+ /* do nothing */
+ }
+ }
+ else
+ {
+ bgValue = 0;
+ }
+
+ result = ((float)fdValue / IFXPSI5S_FDV_RANGE) * (fInput / (16 * (bgValue + 1)));
+ }
+
+ psi5s->FDV.U = fdValue;
+ psi5s->BG.U = bgValue;
+
+ return result;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Psi5s/IfxPsi5s_Psi5s.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Psi5s/IfxPsi5s_Psi5s.h
new file mode 100644
index 0000000..64c98a8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Psi5s/IfxPsi5s_Psi5s.h
@@ -0,0 +1,608 @@
+/**
+ * \file IfxPsi5s_Psi5s.h
+ * \brief PSI5S PSI5S details
+ * \ingroup IfxLld_Psi5s
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Psi5s_Psi5s_Usage How to use the PSI5S PSI5S Interface driver?
+ * \ingroup IfxLld_Psi5s
+ *
+ * PSI5S defines a current loop based serial communication link typically used to connect airbag sensors or other peripheral devices.Data transmission and configuration of the sensor can be done by modulation of the Sync Pulses.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Psi5s_Psi5s_Preparation Preparation
+ * \subsection IfxLld_Psi5s_Psi5s_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ *
+ * #include
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Psi5s_Psi5s_Variables Variables
+ *
+ * \code
+ *
+ * // PSI5S handle
+ * IfxPsi5s_Psi5s psi5s;
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Psi5s_Psi5s_initModule Module Initialisation
+ * \code
+ *
+ * // create module config
+ * IfxPsi5s_Psi5s_Config psi5sModuleConfig;
+ * IfxPsi5s_Psi5s_initModuleConfig(&psi5sModuleConfig, &MODULE_PSI5S);
+ * IfxPsi5s_Psi5s_initModule(&psi5s, &psi5sModuleConfig);
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Psi5s_Psi5s_initChannel Channel Initialisation
+ * \code
+ *
+ * // create channel config
+ * IfxPsi5s_Psi5s_ChannelConfig psi5sChannelConfig;
+ * IfxPsi5s_Psi5s_initChannelConfig(&psi5sChannelConfig, &psi5s);
+ * // change channel (default is channel 0, change to channel 4)
+ * psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
+ *
+ * // change payloadlength (default is 0, i.e., no frame expecte; change to 8)
+ * for(int slot=0; slot<6; ++slot)
+ * {
+ * psi5sChannelConfig.receiveControl.payloadLength[slot] = 8;
+ * }
+ * // change channel (default is channel 0, change to channel 4)
+ * psi5sChannelConfig.channelId = IfxPsi5s_ChannelId_4;
+ *
+ * // initialize the channel
+ * IfxPsi5s_Psi5s_Channel psi5sChannel;
+ * IfxPsi5s_Psi5s_initChannel(&psi5sChannel, &psi5sChannelConfig);
+ *
+ * \endcode
+ *
+ * Now, PSI5S is ready. Then, call the below APIs to do operation.
+ *
+ * \subsection IfxLld_Psi5s_Psi5s_sendChannelData Send Channel Data
+ * \code
+ * uint32 channels = (1 << IfxPsi5s_ChannelId_4); // enable channel 4
+ * uint32 mask = (1 << IfxPsi5s_ChannelId_4); // modify the selection for channel 4
+ *
+ * // enable the channel trigger counter
+ * IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(&psi5s, channels, mask);
+ *
+ * // enable the channel
+ * IfxPsi5s_Psi5s_enableDisableChannels(&psi5s, channels, mask);
+ *
+ * // start ASC interface
+ * IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
+ *
+ * uint32 data = 0x5;
+ * // send data
+ * if(IfxPsi5s_Psi5s_sendChannelData(&psi5sChannel, data))
+ * {
+ * // wait till data transfer is completed
+ * while(psi5s.psi5s->INTSTAT[IfxPsi5s_ChannelId_4].B.TPI == 0);
+ * }
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Psi5s_Psi5s_readFrame Read Channel Frame
+ * \code
+ * // enable ASC receiver
+ * IfxPsi5s_Psi5s_enableAscReceiver(&psi5s);
+ *
+ * // start ASC interface
+ * IfxPsi5s_Psi5s_startAscTransactions(&psi5s);
+ *
+ * // add the code below to initiate the sensor to transmit frames
+ * // end of code to initiate the sensor to transmit frames
+ *
+ * IfxPsi5s_Psi5s_Frame frame;
+ *
+ * while(!IfxPsi5s_Psi5s_getReadFrameStatus(psi5,IfxPsi5s_ChannelId_4));
+ *
+ * IfxPsi5s_Psi5s_readFrame(&psi5sChannel, &frame))
+ *
+ * \endcode
+ *
+ * \defgroup IfxLld_Psi5s_Psi5s PSI5S
+ * \ingroup IfxLld_Psi5s
+ * \defgroup IfxLld_Psi5s_Psi5s_Structures Data Structures
+ * \ingroup IfxLld_Psi5s_Psi5s
+ * \defgroup IfxLld_Psi5s_Psi5s_Module Module Initialise Functions
+ * \ingroup IfxLld_Psi5s_Psi5s
+ * \defgroup IfxLld_Psi5s_Psi5s_Channel Channel Functions
+ * \ingroup IfxLld_Psi5s_Psi5s
+ * \defgroup IfxLld_Psi5s_Psi5s_Utility Utility Functions
+ * \ingroup IfxLld_Psi5s_Psi5s
+ * \defgroup IfxLld_Psi5s_Psi5s_Interrupt Interrupt configuration Function
+ * \ingroup IfxLld_Psi5s_Psi5s
+ */
+
+#ifndef IFXPSI5S_PSI5S_H
+#define IFXPSI5S_PSI5S_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Psi5s/Std/IfxPsi5s.h"
+#include "Scu/Std/IfxScuWdt.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Psi5s_Psi5s_Structures
+ * \{ */
+/** \brief Clock configuration data structure
+ */
+typedef struct
+{
+ uint32 frequency; /**< \brief Specifies the frequency for the clock */
+ IfxPsi5s_DividerMode mode; /**< \brief Specifies the mode of division for the clock */
+ IfxPsi5s_ClockType type; /**< \brief Specifies the type of clock (fracDiv / timestamp) */
+} IfxPsi5s_Psi5s_Clock;
+
+/** \brief Received individual bits
+ */
+typedef struct
+{
+ uint8 xcrc : 6; /**< \brief Received XCRC */
+ uint8 xcrcError : 1; /**< \brief XCRC error flag */
+ uint8 crc : 3; /**< \brief Received CRC */
+ uint8 crcError : 1; /**< \brief CRC error flag */
+ uint8 errorFlag0 : 1; /**< \brief Error signalling flag 0 */
+ uint8 errorFlag1 : 1; /**< \brief Error signalling flag 1 */
+ uint8 headerErrorFlag : 1; /**< \brief Header error signalling flag */
+ uint8 ascParityErrorFlag : 1; /**< \brief ASC parity error flag */
+ uint8 ascFramingErrorFlag : 1; /**< \brief ASC framing error flag */
+ uint8 ascOverrunErrorFlag : 1; /**< \brief ASC overrun error flag */
+ uint8 watchdogTimeoutErrorFlag : 1; /**< \brief Watchdog timeout error flag */
+ uint8 receiveBufferOverflowFlag : 1; /**< \brief Receive buffer overflow flag */
+ uint8 frameId : 3; /**< \brief Frame ID */
+ uint8 channelId : 3; /**< \brief Channel ID */
+ uint8 actualUartFrameCount : 3; /**< \brief UART frames actually received */
+ uint8 packetFrameCount : 4; /**< \brief Packet frame count */
+} IfxPsi5s_Psi5s_ReceivedBits;
+
+/** \brief Receive data structure with different segments of data
+ */
+typedef struct
+{
+ uint32 readData : 28; /**< \brief Received data */
+ uint8 packetFrameCount; /**< \brief Packet frame count */
+} IfxPsi5s_Psi5s_ReceivedData;
+
+/** \brief Received timestamp contents structure
+ */
+typedef struct
+{
+ uint8 packetFrameCount : 4; /**< \brief Packet frame count */
+ uint32 timestamp : 24; /**< \brief Received data */
+} IfxPsi5s_Psi5s_Timestamp;
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5s_Psi5s_Structures
+ * \{ */
+/** \brief PSI5S handle data structure
+ */
+typedef struct
+{
+ Ifx_PSI5S *psi5s; /**< \brief Specifies the pointer to the PSI5S module registers */
+} IfxPsi5s_Psi5s;
+
+/** \brief PSI5S module configuration structure
+ */
+typedef struct
+{
+ boolean parityCheckEnabled; /**< \brief Specifies whether parity check is enabled or not */
+ boolean framingCheckEnabled; /**< \brief Specifies whether framing check is enabled or not */
+ boolean overrunCheckEnabled; /**< \brief Specifies whether overrun check is enabled or not */
+ boolean fractionalDividerEnabled; /**< \brief Specifies whether fractional divider is enabled or not */
+ boolean receiverOddParityEnabled; /**< \brief Specifies whether receiver parity check should be for even or odd */
+ boolean loopbackEnabled; /**< \brief Specifies whether loopback is enabled or not */
+ boolean transmitterOddParityEnabled; /**< \brief Specifies whether transmit parity generation should be even or odd */
+ uint32 baudrateFrequency; /**< \brief Specifies the baudrate frequency */
+ IfxPsi5s_AscStopBits stopBits; /**< \brief Specifies the number of stop bits */
+ IfxPsi5s_AscMode receiveMode; /**< \brief Specifies the mode of operation for ASC receiver */
+ IfxPsi5s_AscBaudratePrescalar baudrateSelection; /**< \brief Specifies whether divide-by-2 or divide-by-3 is selected for baudrate prescalar */
+ IfxPsi5s_AscMode transmitMode; /**< \brief Specifies the mode of operation for ASC transmitter */
+ IfxPsi5s_Psi5s_Clock clockOutput; /**< \brief Specifies the output clock properties */
+} IfxPsi5s_Psi5s_AscConfig;
+
+/** \brief channel trigger configuration structure
+ */
+typedef struct
+{
+ uint32 channelTriggerValue; /**< \brief Specifies the channel trigger value CTV */
+ uint32 channelTriggerCounter; /**< \brief Specifies the channel trigger counter */
+} IfxPsi5s_Psi5s_ChannelTrigger;
+
+/** \brief PSI5S global control configuration structure
+ */
+typedef struct
+{
+ boolean ascOnlyMode; /**< \brief Specifies if the module is in ASC only mode */
+ boolean crcErrorConsideredForRSI; /**< \brief Specifies whether CRCI is considered for RSI assertion */
+ boolean xcrcErrorConsideredForRSI; /**< \brief Specifies whether XCRCI is considered for RSI assertion */
+ boolean transmitErrorConsideredForRSI; /**< \brief Specifies whether TEI is considered for RSI assertion */
+ boolean parityErrorConsideredForRSI; /**< \brief Specifies whether PE is considered for RSI assertion */
+ boolean framingErrorConsideredForRSI; /**< \brief Specifies whether FE is considered for RSI assertion */
+ boolean overrunErrorConsideredForRSI; /**< \brief Specifies whether OE is considered for RSI assertion */
+ boolean receiveBufferErrorConsideredForRSI; /**< \brief Specifies whether RBI is considered for RSI assertion */
+ boolean headerErrorConsideredForRSI; /**< \brief Specifies whether HDI is considered for RSI assertion */
+ uint32 idleTime; /**< \brief Specifies the number of stop bits in addition to last UART frame that is required for start of frame detection */
+} IfxPsi5s_Psi5s_GlobalControlConfig;
+
+/** \brief Structure for PSI5S pin configuration
+ */
+typedef struct
+{
+ IFX_CONST IfxPsi5s_Rx_In *rx; /**< \brief PSI5S Rx pin */
+ IfxPort_InputMode rxMode; /**< \brief Rx pin as input */
+ IFX_CONST IfxPsi5s_Tx_Out *tx; /**< \brief PSI5S Tx pin */
+ IfxPort_OutputMode txMode; /**< \brief Tx as output */
+ IFX_CONST IfxPsi5s_Clk_Out *clk; /**< \brief PSI5S Clk Pin */
+ IfxPort_OutputMode clkMode; /**< \brief Clk as output */
+ IfxPort_PadDriver pinDriver; /**< \brief pad driver */
+} IfxPsi5s_Psi5s_Pins;
+
+/** \brief Sync pulse generation configuration structure
+ */
+typedef struct
+{
+ uint32 codeforZero; /**< \brief Specifies the code used to represent '0' - referred as TXCMD */
+ uint32 codeforOne; /**< \brief Specifies the code used to represent '1' - referred as ATXCMD */
+ IfxPsi5s_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTV as internal or external */
+ IfxPsi5s_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock source for CTV in the case of external */
+ IfxPsi5s_TriggerType periodicOrExternal; /**< \brief Specifies whether periodic trigger or external trigger or bypass is selected */
+ IfxPsi5s_Trigger externalTriggerSelect; /**< \brief Specifies the trigger source in case of external triggerring */
+} IfxPsi5s_Psi5s_PulseGeneration;
+
+/** \brief Receive control configuration structure - covers control fields from RCRA, RCRB and NFC registers
+ */
+typedef struct
+{
+ boolean timestampEnabled; /**< \brief Specifies whether the timestamp is enabled or not */
+ uint32 payloadLength[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the payload length to be received for each slot */
+ IfxPsi5s_CrcOrParity crcOrParity[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the crc or parity selection for the slots 0 to 5 */
+ IfxPsi5s_TimestampRegister timestampSelect; /**< \brief Specifies the timestamp register selection for pulses */
+ IfxPsi5s_TimestampTrigger timestampTriggerSelect; /**< \brief Specifies the timestamp register selection for pulses */
+ IfxPsi5s_FrameId frameIdSelect; /**< \brief Specifies if frame ID is updated from frame header or is a rolling number 0..5 copied from FCNT */
+ IfxPsi5s_WatchdogTimerMode watchdogTimerModeSelect; /**< \brief Specifies the watchdog timer restart is wrt frame or sync pulse reception */
+ IfxPsi5s_UartFrameCount uartFrameCount[IFXPSI5S_NUM_SLOTS]; /**< \brief Specifies the expected number of UART frames per packet frame for each slot */
+ IfxPsi5s_NumberExpectedFrames numberOfFramesExpected; /**< \brief Specifies the number of psi5s frames expected */
+} IfxPsi5s_Psi5s_ReceiveControl;
+
+/** \brief "Received data" data structure
+ */
+typedef union
+{
+ uint32 rdr; /**< \brief received data with frame count */
+ IfxPsi5s_Psi5s_ReceivedData receivedData; /**< \brief Receive data structure with different segments of data */
+} IfxPsi5s_Psi5s_ReceiveData;
+
+/** \brief Receiver status data structure
+ */
+typedef union
+{
+ uint32 rds; /**< \brief received status data. */
+ IfxPsi5s_Psi5s_ReceivedBits receivedBits; /**< \brief Received individual bits */
+} IfxPsi5s_Psi5s_ReceiveStatus;
+
+/** \brief Receiver timestamp data structure
+ */
+typedef union
+{
+ uint32 tsm; /**< \brief received timestamp along with frame count */
+ IfxPsi5s_Psi5s_Timestamp timeStamp; /**< \brief Received timestamp contents structure */
+} IfxPsi5s_Psi5s_ReceiveTimestamp;
+
+/** \brief Timestamp configuration data structure
+ */
+typedef struct
+{
+ IfxPsi5s_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock base for counter CTS in the case of external */
+ IfxPsi5s_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTS as internal or external */
+} IfxPsi5s_Psi5s_TimeStampConfig;
+
+/** \brief Transmit control configuration structure
+ */
+typedef struct
+{
+ boolean bitStuffControl; /**< \brief Specifies whether the bit stuffing is turned on or not */
+ boolean crcGenerationControl; /**< \brief Specifies whether the crc generation is turned on or not */
+ boolean startSequenceGenerationControl; /**< \brief Specifies whether the start sequence generation is turned on or not */
+ uint32 payloadLength; /**< \brief Specifies the payload length to be sent */
+ IfxPsi5s_EnhancedProtocol enhancedProtocolSelection; /**< \brief Specifies whether the enhanced protocol is selected or not */
+} IfxPsi5s_Psi5s_TransmitControl;
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5s_Psi5s_Structures
+ * \{ */
+/** \brief Channel handle data structure
+ */
+typedef struct
+{
+ IfxPsi5s_Psi5s *module; /**< \brief The PSI5S handle structure */
+ IfxPsi5s_ChannelId channelId; /**< \brief Specifies the channel index */
+} IfxPsi5s_Psi5s_Channel;
+
+/** \brief Channel configuration structure
+ */
+typedef struct
+{
+ IFX_CONST IfxPsi5s_Psi5s *module; /**< \brief Specifies pointer to the IfxPsi5s_Psi5s module handle */
+ uint32 watchdogTimerLimit; /**< \brief Specifies the watchdog timer limit for each of the slots 0 to 6 */
+ IfxPsi5s_ChannelId channelId; /**< \brief Specifies the channel index */
+ IfxPsi5s_Psi5s_PulseGeneration pulseGeneration; /**< \brief Specifies the configuration for sync pulse generation */
+ IfxPsi5s_Psi5s_ChannelTrigger channelTrigger; /**< \brief Specifies the configuration for channel trigger */
+ IfxPsi5s_Psi5s_ReceiveControl receiveControl; /**< \brief Specifies the configuration for reception */
+ IfxPsi5s_Psi5s_TransmitControl sendControl; /**< \brief Specifies the configuration for transmission */
+} IfxPsi5s_Psi5s_ChannelConfig;
+
+/** \brief PSI5S module configuration structure
+ */
+typedef struct
+{
+ Ifx_PSI5S *module; /**< \brief Specifies the pointer to the PSI5S module registers */
+ IfxPsi5s_Psi5s_Clock fracDiv; /**< \brief Specifies fractionally divided clock properties */
+ IfxPsi5s_Psi5s_Clock timestampClock; /**< \brief Specifies the time stamp clock properties */
+ IfxPsi5s_Psi5s_TimeStampConfig timestampCounterA; /**< \brief Specifies the time stamp counter A properties */
+ IfxPsi5s_Psi5s_TimeStampConfig timestampCounterB; /**< \brief Specifies the time stamp counter B properties */
+ IfxPsi5s_Psi5s_AscConfig ascConfig; /**< \brief Specifies the configuration for ASC */
+ IfxPsi5s_Psi5s_GlobalControlConfig globalControlConfig; /**< \brief Specifies the global control configuration */
+ IFX_CONST IfxPsi5s_Psi5s_Pins *pins; /**< \brief structure for PSI5S pin configuration */
+} IfxPsi5s_Psi5s_Config;
+
+/** \brief Psi5s frame data structure
+ */
+typedef struct
+{
+ IfxPsi5s_Psi5s_ReceiveData data; /**< \brief Received data */
+ IfxPsi5s_Psi5s_ReceiveStatus status; /**< \brief Receiver status */
+ IfxPsi5s_Psi5s_ReceiveTimestamp timestamp; /**< \brief Receiver timestamp */
+} IfxPsi5s_Psi5s_Frame;
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5s_Psi5s_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief De-initialise the PSI5S module
+ * \param psi5s pointer to the PSI5S module
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_Psi5s_deInitModule(IfxPsi5s_Psi5s *psi5s);
+
+/** \brief Initialise the PSI5S with the supplied configureation
+ * \param psi5s pointer to the PSI5S module
+ * \param config pointer to the PSI5S configuration
+ * \return TRUE if valid otherwise FALSE
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_EXTERN boolean IfxPsi5s_Psi5s_initModule(IfxPsi5s_Psi5s *psi5s, const IfxPsi5s_Psi5s_Config *config);
+
+/** \brief Initialise buffer with default PSI5S configuration
+ * \param config pointer to the PSI5S module configuration buffer
+ * \param psi5s pointer to the PSI5S register space
+ * \return None
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_EXTERN void IfxPsi5s_Psi5s_initModuleConfig(IfxPsi5s_Psi5s_Config *config, Ifx_PSI5S *psi5s);
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5s_Psi5s_Channel
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Enable ASC interface receiver
+ * \param psi5s pointer to the PSI5S module
+ * \return None
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s);
+
+/** \brief Access function to enable/disable any combination of channel trigger counters selected by mask parameter
+ * \param psi5s pointer to the PSI5S module
+ * \param channels specifies the channel trigger counters which should be enabled/disabled
+ * \param mask specifies the channel trigger counters which should be modified
+ * \return None
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask);
+
+/** \brief Access function to enable/disable any combination of channels selected by mask parameter
+ * \param psi5s pointer to the PSI5S module
+ * \param channels specifies the channels which should be enabled/disabled
+ * \param mask specifies the channels which should be modified
+ * \return None
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask);
+
+/** \brief Start ASC transactions
+ * \param psi5s pointer to the PSI5S module
+ * \return None
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialize the channel with the supplied configuration
+ * \param channel pointer to the PSI5S channel
+ * \param config pointer to the PSI5S channel configuration
+ * \return TRUE on success & FALSE if configuration not valid (e.g. missing resource)
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_EXTERN boolean IfxPsi5s_Psi5s_initChannel(IfxPsi5s_Psi5s_Channel *channel, const IfxPsi5s_Psi5s_ChannelConfig *config);
+
+/** \brief Initialise buffer with default channel configuration
+ * \param config pointer to the PSI5S channel configuration
+ * \param psi5s pointer to the PSI5S module
+ * \return None
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_EXTERN void IfxPsi5s_Psi5s_initChannelConfig(IfxPsi5s_Psi5s_ChannelConfig *config, IfxPsi5s_Psi5s *psi5s);
+
+/** \brief Get the received psi5s frame for the channel
+ * \param channel pointer to the PSI5S module
+ * \param frame pointer to the PSI5S frame buffer
+ * \return None
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_EXTERN void IfxPsi5s_Psi5s_readFrame(IfxPsi5s_Psi5s_Channel *channel, IfxPsi5s_Psi5s_Frame *frame);
+
+/** \brief Transmit the data through the channel
+ * \param channel pointer to the PSI5S channel
+ * \param data data to be sent
+ * \return TRUE if Sends data otherwise FALSE
+ *
+ * Usage Example: \ref IfxLld_Psi5s_Psi5s_Usage
+ *
+ */
+IFX_EXTERN boolean IfxPsi5s_Psi5s_sendChannelData(IfxPsi5s_Psi5s_Channel *channel, uint32 data);
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5s_Psi5s_Utility
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Enable PSI5S kernel
+ * \param psi5s pointer to the base of PSI5S register space
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_Psi5s_enableModule(Ifx_PSI5S *psi5s);
+
+/** \brief Reset PSI5S kernel
+ * \param psi5s pointer to the base of PSI5S registers
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_Psi5s_resetModule(Ifx_PSI5S *psi5s);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the received psi5s frame for the channel
+ * \param psi5s pointer to the PSI5S module
+ * \param channelId specifies channelID
+ * \return return the status of Frame
+ */
+IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxPsi5s_Psi5s_enableAscReceiver(IfxPsi5s_Psi5s *psi5s)
+{
+ IfxPsi5s_enableAscReceiver(psi5s->psi5s);
+}
+
+
+IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannelTriggerCounters(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
+{
+ IfxPsi5s_enableDisableChannelTriggerCounters(psi5s->psi5s, channels, mask);
+}
+
+
+IFX_INLINE void IfxPsi5s_Psi5s_enableDisableChannels(IfxPsi5s_Psi5s *psi5s, uint32 channels, uint32 mask)
+{
+ IfxPsi5s_enableDisableChannels(psi5s->psi5s, channels, mask);
+}
+
+
+IFX_INLINE void IfxPsi5s_Psi5s_startAscTransactions(IfxPsi5s_Psi5s *psi5s)
+{
+ IfxPsi5s_startAscTransactions(psi5s->psi5s);
+}
+
+
+IFX_INLINE boolean IfxPsi5s_Psi5s_getReadFrameStatus(IfxPsi5s_Psi5s *psi5s, IfxPsi5s_ChannelId channelId)
+{
+ boolean flag = 0;
+ flag = IfxPsi5s_getReadFrameStatus(psi5s->psi5s, channelId);
+ return flag;
+}
+
+
+#endif /* IFXPSI5S_PSI5S_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Std/IfxPsi5s.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Std/IfxPsi5s.c
new file mode 100644
index 0000000..dca2cf4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Std/IfxPsi5s.c
@@ -0,0 +1,132 @@
+/**
+ * \file IfxPsi5s.c
+ * \brief PSI5S basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxPsi5s.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s)
+{
+ psi5s->WHBCON.B.CLRREN = 1;
+}
+
+
+void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ psi5s->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s)
+{
+ psi5s->WHBCON.B.SETREN = 1;
+}
+
+
+void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
+{
+ uint32 enableChannels = ((((psi5s->GCR.U >> IFX_PSI5S_GCR_ETC0_OFF) & ~mask) | channels) << IFX_PSI5S_GCR_ETC0_OFF);
+
+ psi5s->GCR.U = (psi5s->GCR.U & ~(IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK)) | enableChannels;
+}
+
+
+void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask)
+{
+ uint32 enableChannels = ((((psi5s->GCR.U >> IFX_PSI5S_GCR_CEN0_OFF) & ~mask) | channels) << IFX_PSI5S_GCR_CEN0_OFF);
+
+ psi5s->GCR.U = (psi5s->GCR.U & ~(IFXPSI5S_GCR_CHANNELS_ENABLE_MASK)) | enableChannels;
+}
+
+
+boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
+{
+ return psi5s->INTSTAT[channelId].B.RDI;
+}
+
+
+boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId)
+{
+ return psi5s->INTSTAT[channelId].B.RSI;
+}
+
+
+void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ psi5s->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ psi5s->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == psi5s->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ psi5s->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s)
+{
+ psi5s->CON.B.R = 1;
+}
+
+
+void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s)
+{
+ psi5s->CON.B.R = 0;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Std/IfxPsi5s.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Std/IfxPsi5s.h
new file mode 100644
index 0000000..59c8182
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Std/IfxPsi5s.h
@@ -0,0 +1,532 @@
+/**
+ * \file IfxPsi5s.h
+ * \brief PSI5S basic functionality
+ * \ingroup IfxLld_Psi5s
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Psi5s_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Psi5s_Std
+ * \defgroup IfxLld_Psi5s_Std_Channel Channel Operative Functions
+ * \ingroup IfxLld_Psi5s_Std
+ * \defgroup IfxLld_Psi5s_Std_IO IO Pin Configuration Functions
+ * \ingroup IfxLld_Psi5s_Std
+ * \defgroup IfxLld_Psi5s_Std_Interrupt Interrupt configuration functions
+ * \ingroup IfxLld_Psi5s_Std
+ * \defgroup IfxLld_Psi5s_Std_Module Module Functions
+ * \ingroup IfxLld_Psi5s_Std
+ */
+
+#ifndef IFXPSI5S_H
+#define IFXPSI5S_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxPsi5s_cfg.h"
+#include "_PinMap/IfxPsi5s_PinMap.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxPsi5s_bf.h"
+#include "IfxPsi5s_reg.h"
+#include "Src/Std/IfxSrc.h"
+#include "Scu/Std/IfxScuCcu.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Psi5s_Std_Enumerations
+ * \{ */
+/** \brief MODULE_PSI5S.IOCR.ALTI:Alternate input
+ */
+typedef enum
+{
+ IfxPsi5s_AlternateInput_0 = 0, /**< \brief Alternate Input 0 */
+ IfxPsi5s_AlternateInput_1, /**< \brief Alternate Input 1 */
+ IfxPsi5s_AlternateInput_2, /**< \brief Alternate Input 2 */
+ IfxPsi5s_AlternateInput_3 /**< \brief Alternate Input 3 */
+} IfxPsi5s_AlternateInput;
+
+/** \brief MODULE_PSI5S.BG.BR_VALUE:Baudrate prescalar select
+ */
+typedef enum
+{
+ IfxPsi5s_AscBaudratePrescalar_divideBy2 = 0, /**< \brief Divide by 2 is selected for baudrate timer prescalar */
+ IfxPsi5s_AscBaudratePrescalar_divideBy3 = 1 /**< \brief Divide by 3 is selected for baudrate timer prescalar */
+} IfxPsi5s_AscBaudratePrescalar;
+
+/** \brief MODULE_PSI5S.CON.M:ASC mode of operation
+ */
+typedef enum
+{
+ IfxPsi5s_AscMode_sync = 0, /**< \brief Synchronous mode */
+ IfxPsi5s_AscMode_async_8bitData = 1, /**< \brief Asynchronous mode with 8 bit data */
+ IfxPsi5s_AscMode_async_7bitDataWithParity = 3, /**< \brief Asynchronous mode with 7 bit data with parity */
+ IfxPsi5s_AscMode_async_9bitData = 4, /**< \brief Asynchronous mode with 9 bit data */
+ IfxPsi5s_AscMode_async_8bitDataWithWakeup = 5, /**< \brief Asynchronous mode with 8 bit data with wakeup */
+ IfxPsi5s_AscMode_async_8bitDataWithParity = 7 /**< \brief Asynchronous mode with 8 bit data with parity */
+} IfxPsi5s_AscMode;
+
+/** \brief MODULE_PSI5S.CON.STP: Number of stop bits
+ */
+typedef enum
+{
+ IfxPsi5s_AscStopBits_1 = 0, /**< \brief 1 stop bit */
+ IfxPsi5s_AscStopBits_2 /**< \brief 2 stop bit */
+} IfxPsi5s_AscStopBits;
+
+/** \brief PSI5S Channel Id defined in MODULE_PSI5S.RDS.B.CID.
+ */
+typedef enum
+{
+ IfxPsi5s_ChannelId_0 = 0, /**< \brief Ifx_PSI5S Channel 0 */
+ IfxPsi5s_ChannelId_1, /**< \brief Ifx_PSI5S Channel 1 */
+ IfxPsi5s_ChannelId_2, /**< \brief Ifx_PSI5S Channel 2 */
+ IfxPsi5s_ChannelId_3, /**< \brief Ifx_PSI5S Channel 3 */
+ IfxPsi5s_ChannelId_4, /**< \brief Ifx_PSI5S Channel 4 */
+ IfxPsi5s_ChannelId_5, /**< \brief Ifx_PSI5S Channel 5 */
+ IfxPsi5s_ChannelId_6, /**< \brief Ifx_PSI5S Channel 6 */
+ IfxPsi5s_ChannelId_7, /**< \brief Ifx_PSI5S Channel 7 */
+ IfxPsi5s_ChannelId_none = -1 /**< \brief None of the Ifx_PSI5S Channels */
+} IfxPsi5s_ChannelId;
+
+/** \brief Clock Selection
+ */
+typedef enum
+{
+ IfxPsi5s_ClockType_fracDiv = 0, /**< \brief Fractional Divide clock */
+ IfxPsi5s_ClockType_timeStamp = 1, /**< \brief Timestamp clock */
+ IfxPsi5s_ClockType_ascFracDiv = 2, /**< \brief Asc Fractional divider clock */
+ IfxPsi5s_ClockType_ascOutput = 3 /**< \brief Asc output clock */
+} IfxPsi5s_ClockType;
+
+/** \brief MODULE_PSI5S.RCRAx.CRCy(x= 0,1,..7:y=0,1,..,5),MODULE_PSI5S.RCRBx.CRCy(x= 0,1,..7:y=0,1,..,5)CRC or parity
+ */
+typedef enum
+{
+ IfxPsi5s_CrcOrParity_parity = 0, /**< \brief parity selection */
+ IfxPsi5s_CrcOrParity_crc = 1 /**< \brief CRC selection */
+} IfxPsi5s_CrcOrParity;
+
+/** \brief MODULE_PSI5S.FDR.DM;MODULE_PSI5S.FDRT.B.DM:Divider mode
+ */
+typedef enum
+{
+ IfxPsi5s_DividerMode_spb = 0, /**< \brief divider mode is off */
+ IfxPsi5s_DividerMode_normal = 1, /**< \brief divider mode is normal */
+ IfxPsi5s_DividerMode_fractional = 2, /**< \brief divider mode is fractional */
+ IfxPsi5s_DividerMode_off = 3 /**< \brief divider mode is off */
+} IfxPsi5s_DividerMode;
+
+/** \brief MODULE_PSI5S.SCRx.EPS(x=0,1,...,7):Enhanced protocol types
+ */
+typedef enum
+{
+ IfxPsi5s_EnhancedProtocol_toothGapMethod = 0, /**< \brief toothGapMethod Enhanced protocol type */
+ IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_1to3 = 1, /**< \brief pulseWidth_frameFormat_1to3 Enhanced protocol type */
+ IfxPsi5s_EnhancedProtocol_pulseWidth_frameFormat_4 = 3 /**< \brief pulseWidth_frameFormat_4 Enhanced protocol type */
+} IfxPsi5s_EnhancedProtocol;
+
+/** \brief MODULE_PSI5S.RCRAx.FIDS(x=0,1,....,7):.Frame ID updation
+ */
+typedef enum
+{
+ IfxPsi5s_FrameId_frameHeader = 0, /**< \brief Frame ID is updated from packet frame header (Sync mode) */
+ IfxPsi5s_FrameId_rollingNumber = 1 /**< \brief Frame ID is a rolling number 0 .. 5 copied from FCNT */
+} IfxPsi5s_FrameId;
+
+/** \brief MODULE_PSI5S.GCR.IDT:Idle time bit count
+ */
+typedef enum
+{
+ IfxPsi5s_IdleTime_1 = 0, /**< \brief 1 bit Idle time */
+ IfxPsi5s_IdleTime_2, /**< \brief 2 bit Idle time */
+ IfxPsi5s_IdleTime_3, /**< \brief 3 bit Idle time */
+ IfxPsi5s_IdleTime_4, /**< \brief 4 bit Idle time */
+ IfxPsi5s_IdleTime_5, /**< \brief 5 bit Idle time */
+ IfxPsi5s_IdleTime_6, /**< \brief 6 bit Idle time */
+ IfxPsi5s_IdleTime_7, /**< \brief 7 bit Idle time */
+ IfxPsi5s_IdleTime_8, /**< \brief 8 bit Idle time */
+ IfxPsi5s_IdleTime_9, /**< \brief 9 bit Idle time */
+ IfxPsi5s_IdleTime_10, /**< \brief 10 bit Idle time */
+ IfxPsi5s_IdleTime_11, /**< \brief 11 bit Idle time */
+ IfxPsi5s_IdleTime_12, /**< \brief 12 bit Idle time */
+ IfxPsi5s_IdleTime_13, /**< \brief 13 bit Idle time */
+ IfxPsi5s_IdleTime_14, /**< \brief 14 bit Idle time */
+ IfxPsi5s_IdleTime_15, /**< \brief 15 bit Idle time */
+ IfxPsi5s_IdleTime_16 /**< \brief 16 bit Idle time */
+} IfxPsi5s_IdleTime;
+
+/** \brief Enable/Disable Loop back Mode
+ */
+typedef enum
+{
+ IfxPsi5s_LoopBackMode_disable = 0, /**< \brief loop-back mode disabled */
+ IfxPsi5s_LoopBackMode_enable = 1 /**< \brief loop-back mode enabled */
+} IfxPsi5s_LoopBackMode;
+
+/** \brief Messaging bits presence
+ */
+typedef enum
+{
+ IfxPsi5s_MessagingBits_absent = 0, /**< \brief No messaging bits */
+ IfxPsi5s_MessagingBits_present = 1 /**< \brief 2 messaging bits */
+} IfxPsi5s_MessagingBits;
+
+/** \brief MODULE_PSI5S.NFC.NFx:Expected Psi5s frames
+ */
+typedef enum
+{
+ IfxPsi5s_NumberExpectedFrames_1 = 1, /**< \brief 1 psi5s frame expected */
+ IfxPsi5s_NumberExpectedFrames_2, /**< \brief 2 psi5s frame expected */
+ IfxPsi5s_NumberExpectedFrames_3, /**< \brief 3 psi5s frame expected */
+ IfxPsi5s_NumberExpectedFrames_4, /**< \brief 4 psi5s frame expected */
+ IfxPsi5s_NumberExpectedFrames_5, /**< \brief 5 psi5s frame expected */
+ IfxPsi5s_NumberExpectedFrames_6 /**< \brief 6 psi5s frame expected */
+} IfxPsi5s_NumberExpectedFrames;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_PSI5S.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxPsi5s_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxPsi5s_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxPsi5s_SleepMode;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxPsi5s_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxPsi5s_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxPsi5s_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxPsi5s_SuspendMode;
+
+/** \brief MODULE_PSI5S.TSCNTA.B.TBS;MODULE_PSI5S.TSCNTB.B.TBS:Time base
+ */
+typedef enum
+{
+ IfxPsi5s_TimeBase_internal = 0, /**< \brief Internal time stamp clock */
+ IfxPsi5s_TimeBase_external = 1 /**< \brief External GTM inputs */
+} IfxPsi5s_TimeBase;
+
+/** \brief MODULE_PSI5S.TSCNTx(x= A,B):Timestamp register
+ */
+typedef enum
+{
+ IfxPsi5s_TimestampRegister_a = 0, /**< \brief Timestamp register A */
+ IfxPsi5s_TimestampRegister_b = 1 /**< \brief Timestamp register B */
+} IfxPsi5s_TimestampRegister;
+
+/** \brief MODULE_PSI5S.RCRAx.TSTS:Timestamp trigger
+ */
+typedef enum
+{
+ IfxPsi5s_TimestampTrigger_syncPulse = 0, /**< \brief Timestamp trigger on sync pulse */
+ IfxPsi5s_TimestampTrigger_frame = 1 /**< \brief Timestamp trigger on any frame */
+} IfxPsi5s_TimestampTrigger;
+
+/** \brief MODULE_PSI5S.TSCNTA.B.ETB;MODULE_PSI5S.TSCNTB.B.ETB:Trigger Id
+ */
+typedef enum
+{
+ IfxPsi5s_Trigger_0 = 0, /**< \brief Trigger 0 */
+ IfxPsi5s_Trigger_1, /**< \brief Trigger 1 */
+ IfxPsi5s_Trigger_2, /**< \brief Trigger 2 */
+ IfxPsi5s_Trigger_3, /**< \brief Trigger 3 */
+ IfxPsi5s_Trigger_4, /**< \brief Trigger 4 */
+ IfxPsi5s_Trigger_5, /**< \brief Trigger 5 */
+ IfxPsi5s_Trigger_6, /**< \brief Trigger 6 */
+ IfxPsi5s_Trigger_7 /**< \brief Trigger 7 */
+} IfxPsi5s_Trigger;
+
+/** \brief Trigger type defined in
+ */
+typedef enum
+{
+ IfxPsi5s_TriggerType_periodic = 0, /**< \brief Periodic trigger */
+ IfxPsi5s_TriggerType_external = 1 /**< \brief External trigger */
+} IfxPsi5s_TriggerType;
+
+/** \brief MODULE_PSI5S.RCRAx.UFCY(x=0,1,...7;y=0,1...5):UART frame count
+ */
+typedef enum
+{
+ IfxPsi5s_UartFrameCount_3 = 0, /**< \brief 3 UART frames */
+ IfxPsi5s_UartFrameCount_4, /**< \brief 4 UART frames */
+ IfxPsi5s_UartFrameCount_5, /**< \brief 5 UART frames */
+ IfxPsi5s_UartFrameCount_6 /**< \brief 6 UART frames */
+} IfxPsi5s_UartFrameCount;
+
+/** \brief MODULE_PSI5S.RCRAx.WDMS:Watchdog timer mode
+ */
+typedef enum
+{
+ IfxPsi5s_WatchdogTimerMode_frame = 0, /**< \brief Watch Dog Timer is restarted on reception of each recoverable frame (async mode) */
+ IfxPsi5s_WatchdogTimerMode_syncPulse = 1 /**< \brief Watch Dog Timer is restarted on Sync Pulse and stopped at reception of the last frame configured in NFC.NFx.(sync mode) */
+} IfxPsi5s_WatchdogTimerMode;
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5s_Std_Channel
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Asc receiver is disabled
+ * \param psi5s Pointer to PSI5S module registers
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_disableAscReceiver(Ifx_PSI5S *psi5s);
+
+/** \brief Enable ASC receiver
+ * \param psi5s pointer to the PSI5S register space
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_enableAscReceiver(Ifx_PSI5S *psi5s);
+
+/** \brief Enable/disable any combination of channel trigger counters selected by mask parameter
+ * \param psi5s pointer to the PSI5S register space
+ * \param channels specifies the channel trigger counters which should be enabled/disabled
+ * \param mask specifies the channel trigger counters which should be modified
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_enableDisableChannelTriggerCounters(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask);
+
+/** \brief Enable/disable any combination of channels selected by mask parameter
+ * \param psi5s pointer to the PSI5S register space
+ * \param channels specifies the channels which should be enabled/disabled
+ * \param mask specifies the channels which should be modified
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_enableDisableChannels(Ifx_PSI5S *psi5s, uint32 channels, uint32 mask);
+
+/** \brief Start ASC transactions
+ * \param psi5s pointer to the PSI5S register space
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_startAscTransactions(Ifx_PSI5S *psi5s);
+
+/**
+ * \param psi5s Pointer to PSI5S module registers
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_stopAscTransactions(Ifx_PSI5S *psi5s);
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5s_Std_IO
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes a CLK output
+ * \param clk the CLK Pin which should be configured
+ * \param outputMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a RX input
+ * \param rx the RX Pin which should be configured
+ * \param inputMode the pin input mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a TX output
+ * \param tx the TX Pin which should be configured
+ * \param outputMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Selects the alternate input for Rx signal
+ * \param psi5s pointer to PSI5S registers
+ * \param alti alternate input selection of Rx signal
+ * \return None
+ */
+IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti);
+
+/** \} */
+
+/** \addtogroup IfxLld_Psi5s_Std_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param psi5s Pointer to PSI5S module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s);
+
+/** \brief enable / disable sleep mode
+ * \param psi5s Pointer to PSI5S register
+ * \param mode sleep mode (enable/disable)
+ * \return None
+ */
+IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param psi5s Pointer to PSI5S module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable PSI5S kernel
+ * \param psi5s pointer to the base of PSI5S register space
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_disableModule(Ifx_PSI5S *psi5s);
+
+/** \brief Get the received psi5s frame for the channel
+ * \param psi5s Pointer to PSI5S Module
+ * \param channelId channel ID
+ * \return Frame Status
+ */
+IFX_EXTERN boolean IfxPsi5s_getReadFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId);
+
+/** \brief Indicates the successful reception of a frame.
+ * \param psi5s Pointer to PSI5S module registers
+ * \param channelId Channel Number
+ */
+IFX_EXTERN boolean IfxPsi5s_getSuccessfullyReceivedFrameStatus(Ifx_PSI5S *psi5s, IfxPsi5s_ChannelId channelId);
+
+/** \brief resets PSI5S kernel
+ * \param psi5s pointer to PSI5S registers
+ * \return None
+ */
+IFX_EXTERN void IfxPsi5s_resetModule(Ifx_PSI5S *psi5s);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxPsi5s_initClkPin(const IfxPsi5s_Clk_Out *clk, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
+{
+ if (clk->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(clk->pin.port, clk->pin.pinIndex, outputMode, clk->select);
+ IfxPort_setPinPadDriver(clk->pin.port, clk->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE void IfxPsi5s_initRxPin(const IfxPsi5s_Rx_In *rx, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
+{
+ if (rx->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(rx->pin.port, rx->pin.pinIndex, inputMode);
+ IfxPort_setPinPadDriver(rx->pin.port, rx->pin.pinIndex, padDriver);
+ IfxPsi5s_setRxInput(rx->module, (IfxPsi5s_AlternateInput)rx->select);
+ }
+}
+
+
+IFX_INLINE void IfxPsi5s_initTxPin(const IfxPsi5s_Tx_Out *tx, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
+{
+ if (tx->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(tx->pin.port, tx->pin.pinIndex, outputMode, tx->select);
+ IfxPort_setPinPadDriver(tx->pin.port, tx->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE boolean IfxPsi5s_isModuleSuspended(Ifx_PSI5S *psi5s)
+{
+ Ifx_PSI5S_OCS ocs;
+
+ // read the status
+ ocs.U = psi5s->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxPsi5s_setRxInput(Ifx_PSI5S *psi5s, IfxPsi5s_AlternateInput alti)
+{
+ psi5s->IOCR.B.ALTI = alti;
+}
+
+
+IFX_INLINE void IfxPsi5s_setSleepMode(Ifx_PSI5S *psi5s, IfxPsi5s_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ psi5s->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxPsi5s_setSuspendMode(Ifx_PSI5S *psi5s, IfxPsi5s_SuspendMode mode)
+{
+ Ifx_PSI5S_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ psi5s->OCS.U = ocs.U;
+}
+
+
+#endif /* IFXPSI5S_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiMaster/IfxQspi_SpiMaster.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiMaster/IfxQspi_SpiMaster.c
new file mode 100644
index 0000000..bf550fc
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiMaster/IfxQspi_SpiMaster.c
@@ -0,0 +1,1337 @@
+/**
+ * \file IfxQspi_SpiMaster.c
+ * \brief QSPI SPIMASTER details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxQspi_SpiMaster.h"
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_Channel
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Gets current active channel
+ * \param handle Module handle
+ * \return current active channel
+ */
+IFX_STATIC IfxQspi_SpiMaster_Channel *IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_Support
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Active the SLSO pin.
+ * \param chHandle Module Channel handle
+ * \return None
+ */
+IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle);
+
+/** \brief Deactive the SLSO pin.
+ * \param chHandle Module Channel handle
+ * \return None
+ */
+IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle);
+
+/** \brief Locks the transfer and gets the current status of it.
+ * \param handle Module handle
+ * \return SpiIf_Status_ok if sending is done otherwise SpiIf_Status_busy.
+ */
+IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle);
+
+/** \brief Reads data from the Rx FIFO
+ * \param chHandle Module Channel handle
+ * \return None
+ */
+IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle);
+
+/** \brief Unlocks the transfers
+ * \param handle Module handle
+ * \return None
+ */
+IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle);
+
+/** \brief Writes data into the Tx FIFO
+ * \param chHandle Module Channel handle
+ * \return None
+ */
+IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle);
+
+/** \brief Writes Long/xxl data into the Tx FIFO
+ * \param chHandle Module Channel handle
+ * \return None
+ */
+IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+IFX_STATIC void IfxQspi_SpiMaster_activateSlso(IfxQspi_SpiMaster_Channel *chHandle)
+{
+ IfxPort_State action = (chHandle->slsoActiveState == Ifx_ActiveState_low) ? IfxPort_State_low : IfxPort_State_high;
+ IfxPort_setPinState(chHandle->slso.port, chHandle->slso.pinIndex, action);
+}
+
+
+IFX_STATIC IfxQspi_SpiMaster_Channel *IfxQspi_SpiMaster_activeChannel(IfxQspi_SpiMaster *handle)
+{
+ return (IfxQspi_SpiMaster_Channel *)handle->base.activeChannel;
+}
+
+
+IFX_STATIC void IfxQspi_SpiMaster_deactivateSlso(IfxQspi_SpiMaster_Channel *chHandle)
+{
+ IfxPort_State action = (chHandle->slsoActiveState == Ifx_ActiveState_low) ? IfxPort_State_high : IfxPort_State_low;
+ IfxPort_setPinState(chHandle->slso.port, chHandle->slso.pinIndex, action);
+}
+
+
+SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count)
+{
+ IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
+ SpiIf_Status status = IfxQspi_SpiMaster_lock(handle);
+
+ if (status == SpiIf_Status_ok)
+ {
+ /* initiate transfer when resource is free */
+ handle->base.activeChannel = &chHandle->base;
+ chHandle->base.flags.onTransfer = 1;
+ chHandle->base.tx.data = (void *)src;
+ chHandle->base.tx.remaining = count;
+ chHandle->firstWrite = TRUE;
+ chHandle->base.rx.data = dest;
+ chHandle->base.rx.remaining = count;
+
+ if (chHandle->activateSlso != NULL_PTR)
+ {
+ chHandle->activateSlso(chHandle);
+ }
+
+ if ((chHandle->mode == IfxQspi_SpiMaster_Mode_long) ||
+ (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous))
+ {
+ IfxQspi_SpiMaster_writeLong((IfxQspi_SpiMaster_Channel *)chHandle);
+ }
+ else if (chHandle->mode == IfxQspi_SpiMaster_Mode_xxl)
+ {
+ handle->qspi->XXLCON.B.XDL = count - 1;
+ IfxQspi_SpiMaster_writeLong((IfxQspi_SpiMaster_Channel *)chHandle);
+ }
+ else
+ {
+ /* chHandle->mode == IfxQspi_SpiMaster_Mode_ShortCont*/
+ chHandle->base.txHandler(handle->base.activeChannel);
+ }
+ }
+
+ return status;
+}
+
+
+SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle)
+{
+ {
+ SpiIf_ChConfig chConfig;
+ IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver->driver;
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ Ifx_QSPI_ECON econ;
+ econ.U = qspiSFR->ECON[chHandle->channelId % 8].U;
+
+ chConfig.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, (IfxQspi_ChannelId)(chHandle->channelId % 8));
+ chConfig.driver = chHandle->base.driver;
+ chConfig.errorChecks.baudrate = 0;
+ chConfig.errorChecks.phase = 0;
+ chConfig.errorChecks.receive = 0;
+ chConfig.errorChecks.reserved = 0;
+ chConfig.errorChecks.transmit = 0;
+ chConfig.mode.autoCS = (chHandle->activateSlso == NULL_PTR) && (chHandle->deactivateSlso == NULL_PTR);
+ chConfig.mode.clockPolarity = econ.B.CPOL == 0 ? SpiIf_ClockPolarity_idleLow : SpiIf_ClockPolarity_idleHigh;
+ chConfig.mode.csActiveLevel = chHandle->slsoActiveState;
+ chConfig.mode.csInactiveDelay = chHandle->bacon.B.IDLE;
+ chConfig.mode.csLeadDelay = chHandle->bacon.B.LEAD;
+ chConfig.mode.csTrailDelay = chHandle->bacon.B.TRAIL;
+ chConfig.mode.dataHeading = chHandle->bacon.B.MSB == 0 ? SpiIf_DataHeading_lsbFirst : SpiIf_DataHeading_msbFirst;
+ chConfig.mode.dataWidth = chHandle->bacon.B.DL + 1;
+ chConfig.mode.enabled = 0;
+ chConfig.mode.loopback = qspiSFR->GLOBALCON.B.LB;
+ chConfig.mode.parityCheck = econ.B.PAREN;
+ chConfig.mode.parityMode = chHandle->bacon.B.PARTYP == 0 ? Ifx_ParityMode_even : Ifx_ParityMode_odd;
+ chConfig.mode.shiftClock = econ.B.CPH == 1 ? SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge : SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge;
+
+ return chConfig;
+ }
+}
+
+
+SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle)
+{
+ SpiIf_Status status = SpiIf_Status_ok;
+
+ if ((chHandle->base.flags.onTransfer != 0) || (chHandle->base.driver->sending != 0))
+ {
+ status = SpiIf_Status_busy;
+ }
+
+ return status;
+}
+
+
+SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig)
+{
+ IfxQspi_SpiMaster *handle = chConfig->base.driver->driver;
+ Ifx_QSPI *qspiSFR = handle->qspi;
+
+ chHandle->base.driver = chConfig->base.driver;
+ chHandle->base.flags.onTransfer = FALSE;
+ chHandle->channelBasedCs = chConfig->channelBasedCs;
+ chHandle->mode = chConfig->mode;
+
+ chHandle->dummyTxValue = chConfig->dummyTxValue;
+ chHandle->dummyRxValue = chConfig->dummyRxValue;
+
+ //Loop back configuration.
+ uint32 loopback = chConfig->base.mode.loopback;
+ qspiSFR->GLOBALCON.B.LB = loopback;
+
+ /* chip-select output pin */
+ const IfxQspi_SpiMaster_Output *slso = &(chConfig->sls.output);
+
+ if ((loopback == 1) && (slso->pin == NULL_PTR)) /* if loopback is enabled && no pin is specified */
+ {
+ chHandle->channelId = (IfxQspi_ChannelId)0; /* select 0 as default, if not specified */
+ }
+ else /* not loop back - pin must be configured */
+ {
+ chHandle->channelId = (IfxQspi_ChannelId)chConfig->sls.output.pin->slsoNr;
+ }
+
+ uint8 cs = chHandle->channelId % 8;
+
+ {
+ /* assert warning if desired baud rate is more than max baud rate */
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, handle->maximumBaudrate > chConfig->base.baudrate);
+
+ qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, cs, &chConfig->base);
+ chHandle->bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, chHandle->channelId, &chConfig->base.mode, chConfig->base.baudrate);
+
+ { /* QSPI chip-select line */
+ uint32 mask = 1U << chHandle->channelId;
+ uint32 oen = mask << 16;
+ uint32 aol = (((chConfig->base.mode.csActiveLevel == Ifx_ActiveState_low) ? 0 : 1) << chHandle->channelId);
+ __ldmst(&qspiSFR->SSOC.U, (mask | (mask << 16)), (aol | oen));
+ }
+ }
+ chHandle->base.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, (IfxQspi_ChannelId)(chHandle->bacon.B.CS & 0x7U));
+
+ /* Select the chip select activate and de-activate functions */
+ if (slso->pin == NULL_PTR)
+ {
+ chHandle->activateSlso = NULL_PTR;
+ chHandle->deactivateSlso = NULL_PTR;
+ }
+ else
+ {
+ chHandle->slso = slso->pin->pin;
+ chHandle->slsoActiveState = (Ifx_ActiveState)chConfig->base.mode.csActiveLevel;
+
+ if (!chConfig->base.mode.autoCS)
+ {
+ chHandle->activateSlso = &IfxQspi_SpiMaster_activateSlso;
+ chHandle->deactivateSlso = &IfxQspi_SpiMaster_deactivateSlso;
+
+ /** - Override the SLSO manually as general-purpose output */
+ chHandle->deactivateSlso(chHandle);
+ IfxQspi_initSlso(slso->pin, chConfig->sls.output.mode, chConfig->sls.output.driver, IfxPort_OutputIdx_general);
+ }
+ else
+ {
+ chHandle->activateSlso = NULL_PTR;
+ chHandle->deactivateSlso = NULL_PTR;
+ IfxQspi_initSlso(slso->pin, chConfig->sls.output.mode, chConfig->sls.output.driver, slso->pin->select);
+ }
+ }
+
+ chHandle->dataWidth = chConfig->base.mode.dataWidth;
+ chHandle->base.txHandler = (TxRxHandler) & IfxQspi_SpiMaster_write;
+ chHandle->base.rxHandler = (TxRxHandler) & IfxQspi_SpiMaster_read;
+
+ if (handle->dma.useDma)
+ {
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+ IfxDma_setChannelDestinationAddress(dmaSFR, handle->dma.txDmaChannelId, (uint32 *)&qspiSFR->DATAENTRY[cs].U);
+ }
+
+ return SpiIf_Status_ok;
+}
+
+
+void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle)
+{
+ SpiIf_initChannelConfig(&chConfig->base, &handle->base);
+ chConfig->sls.output.pin = NULL_PTR;
+ chConfig->sls.output.mode = IfxPort_OutputMode_pushPull;
+ chConfig->sls.output.driver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+ chConfig->sls.input.pin = NULL_PTR;
+ chConfig->sls.input.mode = IfxPort_InputMode_noPullDevice;
+ chConfig->channelBasedCs = IfxQspi_SpiMaster_ChannelBasedCs_disabled;
+ chConfig->mode = IfxQspi_SpiMaster_Mode_shortContinuous;
+ chConfig->dummyTxValue = (uint32)~0;
+ chConfig->dummyRxValue = (uint32)0;
+}
+
+
+void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config)
+{
+ Ifx_QSPI *qspiSFR = config->qspi;
+
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+
+ /* handle.base must be at offset 0 to be compatible with the standard interface SscIf */
+ {
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(password);
+ IfxQspi_setEnableModuleRequest(qspiSFR);
+ IfxQspi_setSleepMode(qspiSFR, (config->allowSleepMode != FALSE) ? IfxQspi_SleepMode_enable : IfxQspi_SleepMode_disable);
+ IfxScuWdt_setCpuEndinit(password);
+ }
+
+ { /* Configure GLOBAL, Note: at the moment default values for GLOBAL */
+ Ifx_QSPI_GLOBALCON globalcon;
+ globalcon.U = 0;
+ globalcon.B.TQ = IfxQspi_calculateTimeQuantumLength(qspiSFR, config->base.maximumBaudrate);
+ globalcon.B.EXPECT = IfxQspi_ExpectTimeout_2097152; /* 2^(EXPECT+6) : timeout for expect phase in Tqspi */
+ //globalcon.B.LB = 0 ; /* 0 : disable loop-back w*/
+ //globalcon.B.DEL0 = 0; /* 0 : disable delayed mode for SLSO 0 */
+ //globalcon.B.STROBE = 0; /* (STROBE+1) : strobe delay for SLSO 0 in Tq */
+ //globalcon.B.SRF = 0; /* 0 : disable stop-on-RXFIFO full feature */
+ //globalcon.B.STIP = 0; /* 0 : MRST = 0 when QSPI is deselected in slave mode */
+ //globalcon.B.EN = 0; /* 0 : PAUSE requested, 1 : RUN requested */
+ globalcon.B.MS = IfxQspi_Mode_master; /* select master mode */
+ globalcon.B.AREN = (config->pauseOnBaudrateSpikeErrors != FALSE) ? 1U : 0U;
+ globalcon.B.RESETS = 1;
+ qspiSFR->GLOBALCON.U = globalcon.U;
+ }
+
+ /* Read maximum baud rate into the handle */
+ handle->maximumBaudrate = config->base.maximumBaudrate;
+
+ { /* Configure interrupt requests */
+ Ifx_QSPI_GLOBALCON1 globalcon1;
+ globalcon1.U = 0;
+ globalcon1.B.ERRORENS = (config->base.erPriority > 0) ? IFXQSPI_ERRORENABLEMASK : 0;
+ globalcon1.B.TXEN = (config->base.txPriority > 0) || (config->dma.useDma);
+ globalcon1.B.RXEN = (config->base.rxPriority > 0) || (config->dma.useDma);
+ globalcon1.B.TXFIFOINT = config->txFifoThreshold;
+ globalcon1.B.RXFIFOINT = config->rxFifoThreshold;
+ globalcon1.B.TXFM = config->txFifoMode;
+ globalcon1.B.RXFM = config->rxFifoMode;
+
+ qspiSFR->GLOBALCON1.U = globalcon1.U;
+ }
+
+ /* Configure I/O pins for master mode */
+ const IfxQspi_SpiMaster_Pins *pins = config->pins;
+
+ if (pins != NULL_PTR)
+ {
+ const IfxQspi_Sclk_Out *sclkOut = pins->sclk;
+
+ if (sclkOut != NULL_PTR)
+ {
+ IfxQspi_initSclkOutPin(sclkOut, pins->sclkMode, pins->pinDriver);
+ }
+
+ const IfxQspi_Mtsr_Out *mtsrOut = pins->mtsr;
+
+ if (mtsrOut != NULL_PTR)
+ {
+ IfxQspi_initMtsrOutPin(mtsrOut, pins->mtsrMode, pins->pinDriver);
+ }
+
+ const IfxQspi_Mrst_In *mrstIn = pins->mrst;
+
+ if (mrstIn != NULL_PTR)
+ {
+ IfxQspi_initMrstInPinWithPadLevel(mrstIn, pins->mrstMode, pins->pinDriver);
+ }
+ }
+
+ handle->qspi = qspiSFR;
+ handle->base.driver = handle;
+ handle->base.sending = 0U;
+ handle->base.activeChannel = NULL_PTR;
+
+ handle->base.functions.exchange = (SpiIf_Exchange) & IfxQspi_SpiMaster_exchange;
+ handle->base.functions.getStatus = (SpiIf_GetStatus) & IfxQspi_SpiMaster_getStatus;
+
+ if (config->dma.useDma)
+ {
+ handle->base.functions.onTx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrDmaTransmit;
+ handle->base.functions.onRx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrDmaReceive;
+ }
+ else
+ {
+ handle->base.functions.onTx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrTransmit;
+ handle->base.functions.onRx = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrReceive;
+ }
+
+ handle->base.functions.onError = (SpiIf_OnEvent) & IfxQspi_SpiMaster_isrError;
+
+ if (config->dma.useDma)
+ {
+ handle->dma.useDma = TRUE;
+ IfxDma_Dma dma;
+ IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
+
+ IfxDma_Dma_ChannelConfig dmaCfg;
+ IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
+
+ {
+ handle->dma.txDmaChannelId = config->dma.txDmaChannelId;
+ dmaCfg.channelId = handle->dma.txDmaChannelId;
+ dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from FFT service request
+ dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
+
+ // source address and transfer count will be configured during runtime
+ dmaCfg.sourceAddress = 0;
+ dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.sourceCircularBufferEnabled = FALSE;
+ dmaCfg.transferCount = 0;
+ dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
+
+ // destination address is fixed; use circular mode to stay at this address for each move
+ dmaCfg.destinationAddress = (uint32)&qspiSFR->DATAENTRY[0].U;
+ dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.destinationCircularBufferEnabled = TRUE;
+
+ dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
+ dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
+ dmaCfg.blockMode = IfxDma_ChannelMove_1;
+
+ // initialize interrupt for tx
+ dmaCfg.channelInterruptTypeOfService = config->base.isrProvider;
+ dmaCfg.channelInterruptPriority = config->base.txPriority;
+
+ IfxDma_Dma_initChannel(&handle->dma.txDmaChannel, &dmaCfg);
+ }
+
+ {
+ handle->dma.rxDmaChannelId = config->dma.rxDmaChannelId;
+ dmaCfg.channelId = handle->dma.rxDmaChannelId;
+ dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
+ dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
+
+ // source address is fixed; use circular mode to stay at this address for each move
+ dmaCfg.sourceAddress = (uint32)&qspiSFR->RXEXIT.U;
+ dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.sourceCircularBufferEnabled = TRUE;
+
+ // destination address and transfer count will be configured during runtime
+ dmaCfg.destinationAddress = 0;
+ dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.destinationCircularBufferEnabled = FALSE;
+ dmaCfg.transferCount = 0;
+
+ dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
+ dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
+ dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
+ dmaCfg.blockMode = IfxDma_ChannelMove_1;
+
+ // initialize interrupt for rx
+ dmaCfg.channelInterruptTypeOfService = config->base.isrProvider;
+ dmaCfg.channelInterruptPriority = config->base.rxPriority;
+
+ IfxDma_Dma_initChannel(&handle->dma.rxDmaChannel, &dmaCfg);
+ }
+ }
+ else /* Don't use DMA */
+ {
+ handle->dma.useDma = FALSE;
+ }
+
+ /* Qspi interrupt configuration */
+ {
+ IfxQspi_clearAllEventFlags(qspiSFR);
+
+ if (handle->dma.useDma)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
+ IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.txDmaChannelId);
+ IfxSrc_enable(src);
+
+ src = IfxQspi_getReceiveSrc(qspiSFR);
+ IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.rxDmaChannelId);
+ IfxSrc_enable(src);
+ }
+ else
+ {
+ if (config->base.txPriority != 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
+ IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (config->base.rxPriority != 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getReceiveSrc(qspiSFR);
+ IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (config->base.erPriority != 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getErrorSrc(qspiSFR);
+ IfxSrc_init(src, config->base.isrProvider, config->base.erPriority);
+ IfxSrc_enable(src);
+ }
+ }
+ }
+
+ IfxQspi_run(qspiSFR);
+}
+
+
+void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi)
+{
+ SpiIf_initConfig(&config->base);
+ config->qspi = qspi;
+ config->allowSleepMode = FALSE;
+ config->pauseOnBaudrateSpikeErrors = FALSE,
+ config->pauseRunTransition = IfxQspi_PauseRunTransition_pause;
+ config->txFifoThreshold = IfxQspi_TxFifoInt_1;
+ config->rxFifoThreshold = IfxQspi_RxFifoInt_0;
+ config->txFifoMode = IfxQspi_FifoMode_combinedMove;
+ config->rxFifoMode = IfxQspi_FifoMode_combinedMove;
+ config->pins = NULL_PTR;
+ config->dma.rxDmaChannelId = IfxDma_ChannelId_none;
+ config->dma.txDmaChannelId = IfxDma_ChannelId_none;
+ config->dma.useDma = FALSE;
+ config->base.maximumBaudrate = 50000000;
+}
+
+
+void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle)
+{
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+ IfxDma_ChannelId rxDmaChannelId = qspiHandle->dma.rxDmaChannelId;
+ IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(qspiHandle);
+
+ if (IfxDma_getAndClearChannelInterrupt(dmaSFR, rxDmaChannelId))
+ {
+ if (chHandle->deactivateSlso != NULL_PTR)
+ {
+ chHandle->deactivateSlso(chHandle);
+ }
+
+ chHandle->base.flags.onTransfer = 0;
+ IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
+ }
+
+ IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, rxDmaChannelId);
+}
+
+
+void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle)
+{
+ IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(qspiHandle);
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+ IfxDma_ChannelId txDmaChannelId = qspiHandle->dma.txDmaChannelId;
+ Ifx_QSPI *qspiSFR = qspiHandle->qspi;
+ SpiIf_Job *job = &chHandle->base.tx;
+
+ if (IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, txDmaChannelId))
+ {
+ // DMA_TC.031 workaround ..
+ IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
+ }
+ else if ((chHandle->mode == IfxQspi_SpiMaster_Mode_long) ||
+ (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous))
+ {
+ IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
+ IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
+ }
+ else if (chHandle->mode == IfxQspi_SpiMaster_Mode_xxl)
+ {
+ IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
+ IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
+ }
+ else if (IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId) && (job->remaining > 1))
+ {
+ IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
+ IfxDma_disableChannelTransaction(dmaSFR, txDmaChannelId);
+
+ if (job->data == NULL_PTR)
+ {
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+ IfxQspi_writeTransmitFifo(qspiSFR, chHandle->dummyTxValue);
+ }
+ else
+ {
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+
+ if (chHandle->dataWidth <= 8)
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[job->remaining - 1]);
+ }
+ else if (chHandle->dataWidth <= 16)
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[job->remaining - 1]);
+ }
+ else
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[job->remaining - 1]);
+ }
+ }
+ }
+}
+
+
+void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ uint16 errorFlags = IfxQspi_getErrorFlags(qspiSFR);
+ IfxQspi_clearAllEventFlags(qspiSFR);
+ IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+
+ /* store all the flags in the variable */
+
+ if ((errorFlags & IfxQspi_Error_parity))
+ {
+ chHandle->errorFlags.parityError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_configuration))
+ {
+ chHandle->errorFlags.configurationError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_baudrate))
+ {
+ chHandle->errorFlags.baudrateError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_expectTimeout))
+ {
+ chHandle->errorFlags.expectTimeoutError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_txfifoOverflow))
+ {
+ chHandle->errorFlags.txFifoOverflowError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_txfifoUnderflow))
+ {
+ chHandle->errorFlags.txFifoUnderflowError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_rxfifoOverflow))
+ {
+ chHandle->errorFlags.rxFifoOverflowError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_rxfifoUnderflow))
+ {
+ chHandle->errorFlags.rxFifoUnderflowError = 1;
+ }
+
+ if (errorFlags)
+ {
+ if (chHandle->deactivateSlso != NULL_PTR)
+ {
+ chHandle->deactivateSlso(chHandle);
+ }
+
+ chHandle->base.flags.onTransfer = 0;
+ IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
+ }
+
+ if (handle->dma.useDma)
+ {
+ IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.rxDmaChannelId);
+ IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.txDmaChannelId);
+ }
+}
+
+
+IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ IfxQspi_PhaseTransitionEvent ptEvent = IfxQspi_PhaseTransitionEvent_endOfWait; /* default to 0 */
+
+ if (qspiSFR->STATUS.B.PT1F)
+ {
+ qspiSFR->FLAGSCLEAR.B.PT1C = 1;
+ ptEvent = (IfxQspi_PhaseTransitionEvent)(qspiSFR->GLOBALCON1.B.PT1);
+ }
+ else if (qspiSFR->STATUS.B.PT2F)
+ {
+ qspiSFR->FLAGSCLEAR.B.PT2C = 1;
+ ptEvent = (IfxQspi_PhaseTransitionEvent)(qspiSFR->GLOBALCON1.B.PT2);
+ }
+
+ return ptEvent;
+}
+
+
+void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle)
+{
+ IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
+ chHandle->base.rxHandler(&chHandle->base);
+ handle->base.rxCount++;
+}
+
+
+void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle)
+{
+ IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(handle);
+ chHandle->base.txHandler(&chHandle->base);
+ handle->base.txCount++;
+}
+
+
+IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ IfxQspi_PhaseTransitionEvent ptEvent = IfxQspi_PhaseTransitionEvent_endOfWait; /* default to 0 */
+
+ if (qspiSFR->STATUS.B.USRF)
+ {
+ qspiSFR->FLAGSCLEAR.B.USRC = 1;
+ ptEvent = (IfxQspi_PhaseTransitionEvent)qspiSFR->GLOBALCON1.B.PT1; //
+ }
+
+ return ptEvent;
+}
+
+
+IFX_STATIC SpiIf_Status IfxQspi_SpiMaster_lock(IfxQspi_SpiMaster *handle)
+{
+ sint32 sending = __swap((void *)&handle->base.sending, 1UL);
+ return (sending == 0) ? SpiIf_Status_ok : SpiIf_Status_busy;
+}
+
+
+void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength)
+{
+ boolean isFirst = 0;
+ uint8 *src = (uint8 *)data;
+ uint32 i, baconDL;
+
+ baconDL = 16;
+
+ if (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous)
+ {
+ chHandle->bacon.B.BYTE = 1;
+ chHandle->bacon.B.LAST = 0;
+ }
+ else if (chHandle->mode == IfxQspi_SpiMaster_Mode_long)
+ {
+ chHandle->bacon.B.BYTE = 1;
+ chHandle->bacon.B.LAST = 1;
+ }
+ else
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFX_ASSERT_FEATURE_NOT_IMPLEMENTED);
+ }
+
+ while (dataLength > 0)
+ {
+ if (dataLength <= 16)
+ {
+ baconDL = dataLength;
+ chHandle->bacon.B.LAST = 1;
+ }
+
+ dataLength -= (Ifx_SizeT)baconDL;
+
+ /* FILL BACON */
+ if (isFirst == 0)
+ {
+ isFirst = 1;
+ }
+ else
+ {
+ chHandle->bacon.B.DL = baconDL - 1;
+ *longFifoBuffer = chHandle->bacon.U;
+ longFifoBuffer++;
+ }
+
+ for (i = 0; i < baconDL / 4; i++)
+ {
+ *longFifoBuffer = *((uint32 *)src);
+ longFifoBuffer++;
+ src += 4;
+ }
+
+ /* Copy Last bytes */
+ switch (baconDL % 4)
+ {
+ case 1:
+ *longFifoBuffer = *src;
+ break;
+ case 2:
+ *longFifoBuffer = *src | (*(src + 1) << 8);
+ break;
+ case 3:
+ *longFifoBuffer = *src | (*(src + 1) << 8) | (*(src + 2) << 16);
+ break;
+ }
+ }
+}
+
+
+IFX_STATIC void IfxQspi_SpiMaster_read(IfxQspi_SpiMaster_Channel *chHandle)
+{
+ IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ SpiIf_Job *job = &chHandle->base.rx;
+
+ Ifx_SizeT count = (Ifx_SizeT)IfxQspi_getReceiveFifoLevel(qspiSFR);
+ count = __min(job->remaining, count);
+
+ if (job->data == NULL_PTR)
+ {
+ // no data should be buffered: do dummy reads
+ int i;
+
+ for (i = 0; i < count; ++i)
+ {
+ IfxQspi_readReceiveFifo(qspiSFR);
+ }
+ }
+ else
+ {
+ if (chHandle->dataWidth <= 8)
+ {
+ IfxQspi_read8(qspiSFR, job->data, count);
+ job->data = &(((uint8 *)job->data)[count]);
+ }
+ else if (chHandle->dataWidth <= 16)
+ {
+ IfxQspi_read16(qspiSFR, job->data, count);
+ job->data = &(((uint16 *)job->data)[count]);
+ }
+ else
+ {
+ IfxQspi_read32(qspiSFR, job->data, count);
+ job->data = &(((uint32 *)job->data)[count]);
+ }
+ }
+
+ job->remaining = job->remaining - count;
+
+ if (job->remaining == 0)
+ {
+ if (chHandle->deactivateSlso != NULL_PTR)
+ {
+ chHandle->deactivateSlso(chHandle);
+ }
+
+ chHandle->base.flags.onTransfer = 0;
+ IfxQspi_SpiMaster_unlock((IfxQspi_SpiMaster *)chHandle->base.driver);
+ }
+}
+
+
+SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate)
+{
+ IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver->driver;
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ SpiIf_ChConfig chConfig;
+ chConfig = IfxQspi_SpiMaster_getChannelConfig(chHandle);
+ chConfig.baudrate = baudrate;
+ IfxQspi_ChannelId cs = (IfxQspi_ChannelId)(chHandle->channelId % 8);
+ qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, (uint8)cs, &chConfig);
+ chHandle->bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, chHandle->channelId, &chConfig.mode, chConfig.baudrate);
+ chHandle->base.baudrate = IfxQspi_calcRealBaudrate(qspiSFR, cs);
+ return SpiIf_Status_ok;
+}
+
+
+IFX_STATIC void IfxQspi_SpiMaster_unlock(IfxQspi_SpiMaster *handle)
+{
+ handle->base.sending = 0UL;
+}
+
+
+IFX_STATIC void IfxQspi_SpiMaster_write(IfxQspi_SpiMaster_Channel *chHandle)
+{
+ SpiIf_Job *job = &chHandle->base.tx;
+ IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
+
+ if (handle->dma.useDma)
+ {
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
+
+ IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
+ IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
+
+ boolean interruptState = IfxCpu_disableInterrupts();
+
+ if (job->remaining > 1)
+ {
+ IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, job->remaining - 1);
+
+ if (chHandle->dataWidth <= 8)
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_8bit);
+ }
+ else if (chHandle->dataWidth <= 16)
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_16bit);
+ }
+ else
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
+ }
+
+ if (job->data == NULL_PTR)
+ {
+ IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyTxValue)));
+ IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
+ /* need to enable circular buffering to avoid increment higher than 4 bytes */
+ /* we must do this direct why we don't have function for this */
+ dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = TRUE;
+ }
+ else
+ {
+ IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
+ IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
+ /* maybe circular buffering was enabled by other call, we disable the circular buffering */
+ /* we must do this direct why we don't have function for this */
+ dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = FALSE;
+ }
+
+ IfxDma_setChannelDestinationAddress(dmaSFR, txDmaChannelId, (void *)&qspiSFR->DATAENTRY[0].U);
+ IfxDma_setChannelDestinationIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
+
+ IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
+ }
+
+ /* Receive config */
+ IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, job->remaining);
+
+ if (chHandle->dataWidth <= 8)
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_8bit);
+ }
+ else if (chHandle->dataWidth <= 16)
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_16bit);
+ }
+ else
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
+ }
+
+ if (chHandle->base.rx.data == NULL_PTR)
+ {
+ IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyRxValue)));
+ IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
+ /* need to enable circular buffering to avoid increment higher than 4 bytes */
+ /* we must do this direct why we don't have function for this */
+ dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = TRUE;
+ }
+ else
+ {
+ IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), chHandle->base.rx.data));
+ IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
+ /* maybe circular buffering was enabled by other call, we disable the circular buffering */
+ /* we must do this direct why we don't have function for this */
+ dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = FALSE;
+ }
+
+ IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
+ IfxQspi_clearAllEventFlags(qspiSFR);
+ src = IfxQspi_getTransmitSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+ src = IfxQspi_getReceiveSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+ src = IfxQspi_getErrorSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+ IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
+ IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
+
+ if (job->remaining > 1)
+ {
+ IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
+ IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
+
+ if (chHandle->channelBasedCs == IfxQspi_SpiMaster_ChannelBasedCs_disabled)
+ {
+ IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, chHandle->bacon.U);
+ }
+ else
+ {
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+ }
+ }
+ else
+ {
+ if (job->data == NULL_PTR)
+ {
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+ IfxQspi_writeTransmitFifo(qspiSFR, chHandle->dummyTxValue);
+ }
+ else
+ {
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+
+ if (chHandle->dataWidth <= 8)
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[job->remaining - 1]);
+ }
+ else if (chHandle->dataWidth <= 16)
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[job->remaining - 1]);
+ }
+ else
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[job->remaining - 1]);
+ }
+ }
+ }
+
+ IfxCpu_restoreInterrupts(interruptState);
+ }
+
+ else
+ {
+ if (job->remaining > 0)
+ {
+ IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ IfxQspi_ChannelId cs = (IfxQspi_ChannelId)(chHandle->bacon.B.CS);
+
+ Ifx_SizeT count = (Ifx_SizeT)(IFXQSPI_HWFIFO_DEPTH - IfxQspi_getTransmitFifoLevel(qspiSFR));
+
+ if (chHandle->firstWrite == TRUE)
+ {
+ // -1, since BACON allocates one FIFO entry
+ count--;
+ }
+
+ if (job->remaining == count)
+ {
+ // Need to write BACON next time
+ count--;
+ }
+
+ count = __min(job->remaining, count);
+
+ if (count > 0)
+ {
+ job->remaining = job->remaining - count;
+
+ // we have to push another BACON into FIFO before the last data word
+ boolean lastWrite = (job->remaining == 0) ? TRUE : FALSE;
+ boolean interruptState;
+
+ /*Disable interrupts only if conditions a, b and c are satisfied.
+ * a.)first write is true(i.e call from exchange only and not from transmit ISR) and
+ * b.)on multi-byte write(no need to disable for single byte write) and
+ * c.)this is not last write(Condition needed for 2 byte write from exchange in firstwrite)
+ *
+ * 1.Call from ISR no need to disable.
+ * 2.Call from exchange and write_count(here write_count=count) is 1 or 2, no need to disable,
+ * because when ISR call happens job->remaining=0.
+ * 3.Call from exchange and write_count=3,(count=2, job->remaining=1), disable interrupt.
+ * 4.Multi-byte write call from exchange disable interrupt.*/
+ if ((chHandle->firstWrite == TRUE) && (count > 1) && (job->remaining != 0))
+ {
+ interruptState = IfxCpu_disableInterrupts();
+ }
+ else
+ {
+ interruptState = IfxCpu_areInterruptsEnabled();
+ }
+
+ // push BACON into FIFO before first data word
+ if (chHandle->firstWrite == TRUE)
+ {
+ chHandle->firstWrite = FALSE;
+
+ if (chHandle->channelBasedCs == IfxQspi_SpiMaster_ChannelBasedCs_disabled)
+ {
+ IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, chHandle->bacon.U);
+ }
+ else
+ {
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+ }
+ }
+
+ if (job->data == NULL_PTR)
+ {
+ // no data should be sent (only received): send all-1
+ int i;
+ uint32 writeVal = chHandle->dummyTxValue;
+
+ if (lastWrite)
+ {
+ for (i = 0; i < count - 1; ++i)
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
+ }
+
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+ IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
+ }
+ else
+ {
+ for (i = 0; i < count; ++i)
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, writeVal);
+ }
+ }
+ }
+ else
+ {
+ if (chHandle->dataWidth <= 8)
+ {
+ if (lastWrite)
+ {
+ if (count > 1)
+ {
+ IfxQspi_write8(qspiSFR, cs, job->data, count - 1);
+ }
+
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint8 *)job->data)[count - 1]);
+ }
+ else
+ {
+ IfxQspi_write8(qspiSFR, cs, job->data, count);
+ }
+
+ job->data = &(((uint8 *)job->data)[count]);
+ }
+ else if (chHandle->dataWidth <= 16)
+ {
+ if (lastWrite)
+ {
+ if (count > 1)
+ {
+ IfxQspi_write16(qspiSFR, cs, job->data, count - 1);
+ }
+
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint16 *)job->data)[count - 1]);
+ }
+ else
+ {
+ IfxQspi_write16(qspiSFR, cs, job->data, count);
+ job->data = &(((uint16 *)job->data)[count]);
+ }
+ }
+ else
+ {
+ if (lastWrite)
+ {
+ if (count > 1)
+ {
+ IfxQspi_write32(qspiSFR, cs, job->data, count - 1);
+ }
+
+ IfxQspi_writeBasicConfigurationEndStream(qspiSFR, chHandle->bacon.U);
+ IfxQspi_writeTransmitFifo(qspiSFR, ((uint32 *)job->data)[count - 1]);
+ }
+ else
+ {
+ IfxQspi_write32(qspiSFR, cs, job->data, count);
+ job->data = &(((uint32 *)job->data)[count]);
+ }
+ }
+ }
+
+ IfxCpu_restoreInterrupts(interruptState);
+ }
+ }
+ }
+}
+
+
+IFX_STATIC void IfxQspi_SpiMaster_writeLong(IfxQspi_SpiMaster_Channel *chHandle)
+{
+ SpiIf_Job *job = &chHandle->base.tx;
+ IfxQspi_SpiMaster *handle = chHandle->base.driver->driver;
+ uint8 fifosize = IFXQSPI_FIFO32BITSIZE(job->remaining);
+
+ if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
+ {
+ fifosize = fifosize + IFXQSPI_BACONSIZE(job->remaining) - 1; // combining this line and above doesn't work
+ }
+
+ if (handle->dma.useDma)
+ {
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
+
+ IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
+ IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
+
+ boolean interruptState = IfxCpu_disableInterrupts();
+
+ {
+ IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, fifosize);
+
+ IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
+
+ {
+ IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
+ IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
+ /* maybe circular buffering was enabled by other call, we disable the circular buffering */
+ /* we must do this direct why we don't have function for this */
+ dmaSFR->CH[txDmaChannelId].ADICR.B.SCBE = FALSE;
+
+ if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
+ {
+ IfxDma_setChannelDestinationAddress(dmaSFR, txDmaChannelId, (uint32 *)&qspiSFR->MIXENTRY.U);
+ IfxDma_setChannelDestinationIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
+ }
+ }
+
+ IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
+ }
+
+ /* Receive config */
+ IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, IFXQSPI_FIFO32BITSIZE(job->remaining));
+ IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
+
+ if (chHandle->base.rx.data == NULL_PTR)
+ {
+ IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &(chHandle->dummyRxValue)));
+ IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
+ /* need to enable circular buffering to avoid increment higher than 4 bytes */
+ /* we must do this direct why we don't have function for this */
+ dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = TRUE;
+ }
+ else
+ {
+ IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), chHandle->base.rx.data));
+ IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
+ /* maybe circular buffering was enabled by other call, we disable the circular buffering */
+ /* we must do this direct why we don't have function for this */
+ dmaSFR->CH[rxDmaChannelId].ADICR.B.DCBE = FALSE;
+ }
+
+ IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
+ IfxQspi_clearAllEventFlags(qspiSFR);
+ src = IfxQspi_getTransmitSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+ src = IfxQspi_getReceiveSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+ src = IfxQspi_getErrorSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+ IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
+ IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
+
+ if (chHandle->mode == IfxQspi_SpiMaster_Mode_longContinuous)
+ {
+ (job->remaining >= 16) ? (chHandle->bacon.B.DL = 16 - 1) : (chHandle->bacon.B.DL = job->remaining - 1);
+ (job->remaining >= 16) ? (chHandle->bacon.B.LAST = 0) : (chHandle->bacon.B.LAST = 1);
+ chHandle->bacon.B.BYTE = 1;
+ }
+ else if (chHandle->mode == IfxQspi_SpiMaster_Mode_long)
+ {
+ (job->remaining >= 16) ? (chHandle->bacon.B.DL = 16 - 1) : (chHandle->bacon.B.DL = job->remaining - 1);
+ chHandle->bacon.B.LAST = 1;
+ chHandle->bacon.B.BYTE = 1;
+ }
+ else
+ {
+ chHandle->bacon.B.LAST = 1;
+ chHandle->bacon.B.BYTE = 1;
+ chHandle->bacon.B.DL = 0;
+ }
+
+ {
+ IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
+ IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
+ }
+
+ if (chHandle->mode != IfxQspi_SpiMaster_Mode_xxl)
+ {
+ qspiSFR->MIXENTRY.U = chHandle->bacon.U;
+ }
+ else
+ {
+ qspiSFR->BACONENTRY.U = chHandle->bacon.U;
+ }
+
+ IfxCpu_restoreInterrupts(interruptState);
+ }
+ else
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, IFX_ASSERT_FEATURE_NOT_IMPLEMENTED);
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiMaster/IfxQspi_SpiMaster.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiMaster/IfxQspi_SpiMaster.h
new file mode 100644
index 0000000..179b698
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiMaster/IfxQspi_SpiMaster.h
@@ -0,0 +1,946 @@
+/**
+ * \file IfxQspi_SpiMaster.h
+ * \brief QSPI SPIMASTER details
+ * \ingroup IfxLld_Qspi
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Qspi_SpiMaster_Usage How to use the SPI Master Interface driver?
+ * \ingroup IfxLld_Qspi
+ *
+ * The SPI Master interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
+ *
+ * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
+ * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Qspi_SpiMaster_Preparation Preparation
+ * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
+ *
+ * Declare QSPI module and channel handles:
+ *
+ * \code
+ * IfxQspi_SpiMaster spi;
+ * IfxQspi_SpiMaster_Channel spiChannel;
+ * \endcode
+ *
+ * In addition, declare global transmit and receive buffers for the data transfers:
+ * \code
+ * #define SPI_BUFFER_SIZE 8
+ * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
+ * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_Interrupt Interrupt Handler Installation (without dma use)
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define IFX_INTPRIO_QSPI0_TX 1
+ * #define IFX_INTPRIO_QSPI0_RX 2
+ * #define IFX_INTPRIO_QSPI0_ER 5
+ * \endcode
+ *
+ * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
+ * \code
+ * IFX_INTERRUPT(qspi0TxISR, 0, IFX_INTPRIO_QSPI0_TX)
+ * {
+ * IfxQspi_SpiMaster_isrTransmit(&spi);
+ * }
+ *
+ * IFX_INTERRUPT(qspi0RxISR, 0, IFX_INTPRIO_QSPI0_RX)
+ * {
+ * IfxQspi_SpiMaster_isrReceive(&spi);
+ * }
+ *
+ * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
+ * {
+ * IfxQspi_SpiMaster_isrError(&spi);
+ *
+ * // Process errors. Eg: parity Error is checked below
+ * IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
+ * if( chHandle->errorFlags.parityError == 1)
+ * {
+ * // Parity Error
+ * }
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler(&qspi0TxISR, IFX_INTPRIO_QSPI0_TX);
+ * IfxCpu_Irq_installInterruptHandler(&qspi0RxISR, IFX_INTPRIO_QSPI0_RX);
+ * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_Interrupt_dma Interrupt Handler Installation (with dma use)
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // qspi priorities
+ * #define IFX_INTPRIO_QSPI0_TX 1 // DMA channel 1
+ * #define IFX_INTPRIO_QSPI0_RX 2 // DMA channel 2
+ * #define IFX_INTPRIO_QSPI0_ER 0x30
+ *
+ * // dma priorities
+ * #define IFX_INTPRIO_DMA_CH1 10
+ * #define IFX_INTPRIO_DMA_CH2 11
+ * \endcode
+ *
+ * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
+ * \code
+ * IFX_INTERRUPT(qspi0DmaTxISR, 0, IFX_INTPRIO_DMA_CH1 )
+ * {
+ * IfxQspi_SpiMaster_isrDmaTransmit(&spi);
+ * }
+ *
+ * IFX_INTERRUPT(qspi0DmaRxISR, 0, IFX_INTPRIO_DMA_CH2)
+ * {
+ * IfxQspi_SpiMaster_isrDmaReceive(&spi);
+ * }
+ *
+ * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
+ * {
+ * IfxQspi_SpiMaster_isrError(&spi);
+ *
+ * // Process errors. Eg: parity Error is checked below
+ * IfxQspi_SpiMaster_Channel *chHandle = IfxQspi_SpiMaster_activeChannel(&spi);
+ * if( chHandle->errorFlags.parityError == 1)
+ * {
+ * // Parity Error
+ * }
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler(&qspi0DmaTxISR, IFX_INTPRIO_DMA_CH1);
+ * IfxCpu_Irq_installInterruptHandler(&qspi0DmaRxISR, IFX_INTPRIO_DMA_CH2);
+ * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_Init Module Initialisation (without dma use)
+ *
+ * The module initialisation can be done in the same function.
+ *
+ * Here an example for master mode:
+ * \code
+ * // create module config
+ * IfxQspi_SpiMaster_Config spiMasterConfig;
+ * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
+ *
+ * // set the desired mode and maximum baudrate
+ * spiMasterConfig.base.mode = SpiIf_Mode_master;
+ * spiMasterConfig.base.maximumBaudrate = 10000000;
+ *
+ * // ISR priorities and interrupt target
+ * spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
+ * spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
+ * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
+ * spiMasterConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
+ *
+ * // pin configuration
+ * const IfxQspi_SpiMaster_Pins pins = {
+ * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
+ * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
+ * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
+ * };
+ * spiMasterConfig.pins = &pins;
+ *
+ * // initialize module
+ * //IfxQspi_SpiMaster spi; // defined globally
+ * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
+ *
+ * The module initialisation can be done in the same function.
+ *
+ * Here an example for master mode:
+ * \code
+ * // create module config
+ * IfxQspi_SpiMaster_Config spiMasterConfig;
+ * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
+ *
+ * // set the desired mode and maximum baudrate
+ * spiMasterConfig.base.mode = SpiIf_Mode_master;
+ * spiMasterConfig.base.maximumBaudrate = 10000000;
+ *
+ * // ISR priorities and interrupt target (with Dma usage)
+ * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
+ * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
+ * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
+ *
+ * // dma configuration.
+ * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
+ * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
+ * spiMasterConfig.dma.useDma = 1;
+ *
+ * // pin configuration
+ * const IfxQspi_SpiMaster_Pins pins = {
+ * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
+ * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
+ * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
+ * };
+ * spiMasterConfig.pins = &Pins;
+ *
+ *
+ * // initialize module
+ * //IfxQspi_SpiMaster spi; // defined globally
+ * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
+ *
+ * After the module has been initialized, one or more SPI channels can be configured.
+ * Each channel has a dedicated select line.
+ *
+ * Here an example for a SPI channel in master mode:
+ * \code
+ * // create channel config
+ * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
+ * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
+ *
+ * // set the baudrate for this channel
+ * spiMasterChannelConfig.base.baudrate = 5000000;
+ *
+ * // select pin configuration
+ * const IfxQspi_SpiMaster_Output slsOutput = {
+ * &IfxQspi0_SLSO7_P33_5_OUT,
+ * IfxPort_OutputMode_pushPull,
+ * IfxPort_PadDriver_cmosAutomotiveSpeed1
+ * };
+ * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
+ *
+ * // initialize channel
+ * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
+ * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
+ * \endcode
+ *
+ * The QSPI is ready for use now!
+ *
+ *
+ * \section IfxLld_Qspi_SpiMaster_DataTransfers Data Transfers
+ *
+ * In following examples we assume, that following buffers are declared globally:
+ * \code
+ * // declared somewhere globally
+ * #define SPI_BUFFER_SIZE 8
+ * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
+ * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
+ * \endcode
+ *
+ * Sending and Receiving a data stream:
+ * \code
+ * int i=0;
+ * // wait until transfer of previous data stream is finished
+ * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
+ *
+ * // send/receive new stream
+ * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
+ * \endcode
+ *
+ * Send only, discard received data:
+ * \code
+ *
+ * // wait until transfer of previous data stream is finished
+ * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
+ *
+ * // send new stream
+ * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
+ * \endcode
+ *
+ * Receive only, send all-1
+ * \code
+ * // wait until transfer of previous data stream is finished
+ * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
+ *
+ * // receive new stream
+ * IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
+ * \endcode
+ *
+ * \section IfxLld_Qspi_SpiMaster_PhaseTransition Phase transition and User Interrupt usage
+ *
+ * Phase transition and user defined interrupts are not configured internal to Driver.
+ *
+ * Example usage of Phase transition interrupt is given below
+ * \code
+ * IfxCpu_Irq_installInterruptHandler(&qspi0PtISR, IFX_INTPRIO_QSPI0_PT);
+ * IfxQspi_pause(&MODULE_QSPI0);
+ * IfxQspi_configPT1Event(&MODULE_QSPI0, IfxQspi_PhaseTransitionEvent_startOfFrame); // Configured for PT1 SOF event
+ * IfxQspi_enablePT1Event(&MODULE_QSPI0,TRUE);
+ * IfxQspi_run(&MODULE_QSPI0);
+ * \endcode
+ *
+ * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
+ * \code
+ * IFX_INTERRUPT(qspi0PtISR, 0, IFX_INTPRIO_QSPI0_PT )
+ * {
+ * IfxQspi_PhaseTransitionEvent event;
+ * event = IfxQspi_SpiMaster_isrPhaseTransition(&spiMaster);
+ * // process event
+ * switch (event)
+ * {
+ * case IfxQspi_PhaseTransitionEvent_startOfFrame:
+ * // SOF event
+ * break;
+ * // add other events if needed.
+ * }
+ * }
+ * \endcode
+ *
+ * \section IfxLld_Qspi_SpiMaster_XXLMode How to use XXL Mode with Dma
+ *
+ * The Qspi XXL mode is similar to Short mode with the exception to configure mode to xxl before calling IfxQspi_SpiMaster_initChannel() function. The remaining usage is similar to Short / ShortContinuous Mode (default one) with Dma
+ *
+ * \code
+ * spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_xxl;
+ * \endcode
+ *
+ *
+ * \section IfxLld_Qspi_SpiMaster_LongMode How to use Long / Long Continuous Mode with Dma
+ *
+ * The qspi Long mode is similar to short mode Except for below additional changes.
+ * 1. Transmit buffer need to be defined (this is in addition to source/TX data buffer. This buffer is used to store the DATA + CONFIG for dma usage).
+ * 2. Configure the Spi Channel configuration mode (new one) to long or longContinuous mode
+ * 3. Preparing Transmit buffer content for long/long Continuous mode
+ *
+ * Example Code is provided below.
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
+ *
+ * Declare QSPI module and channel handles:
+ *
+ * \code
+ * IfxQspi_SpiMaster spi;
+ * IfxQspi_SpiMaster_Channel spiChannel;
+ * \endcode
+ *
+ * In addition, declare global transmit and receive buffers for the data transfers:
+ * \code
+ * #define SPI_BUFFER_SIZE 50
+ * #define BACON_SIZE IFXQSPI_BACONSIZE(SPI_BUFFER_SIZE)
+ * #define FIFO_SIZE IFXQSPI_FIFO32BITSIZE(SPI_BUFFER_SIZE)
+ * // This should be 32 bit ; use addition of macros as shown
+ * __attribute__ ((aligned(64))) uint32 spi0TxLongBuffer[BACON_SIZE + FIFO_SIZE];
+ *
+ * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
+ * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
+ *
+ * The module initialisation can be done in the same function.
+ *
+ * Here an example for master mode:
+ * \code
+ * // create module config
+ * IfxQspi_SpiMaster_Config spiMasterConfig;
+ * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
+ *
+ * // set the desired mode and maximum baudrate
+ * spiMasterConfig.base.mode = SpiIf_Mode_master;
+ * spiMasterConfig.base.maximumBaudrate = 10000000;
+ *
+ * // ISR priorities and interrupt target (with Dma usage)
+ * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
+ * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
+ * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
+ *
+ * // dma configuration.
+ * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
+ * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
+ * spiMasterConfig.dma.useDma = 1;
+ *
+ * // pin configuration
+ * const IfxQspi_SpiMaster_Pins pins = {
+ * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
+ * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
+ * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
+ * };
+ * spiMasterConfig.pins = &Pins;
+ *
+ *
+ * // initialize module
+ * //IfxQspi_SpiMaster spi; // defined globally
+ * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
+ *
+ * After the module has been initialized, one or more SPI channels can be configured.
+ * Each channel has a dedicated select line.
+ *
+ * Here an example for a SPI channel in master mode:
+ * \code
+ * // create channel config
+ * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
+ * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
+ *
+ * // set the baudrate for this channel
+ * spiMasterChannelConfig.base.baudrate = 5000000;
+ *
+ * // select pin configuration
+ * const IfxQspi_SpiMaster_Output slsOutput = {
+ * &IfxQspi0_SLSO7_P33_5_OUT,
+ * IfxPort_OutputMode_pushPull,
+ * IfxPort_PadDriver_cmosAutomotiveSpeed1
+ * };
+ * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
+ *
+ * spiMasterChannelConfig.mode = IfxQspi_SpiMaster_Mode_longContinuous; // Select Long Continuous Mode
+ *
+ * // initialize channel
+ * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
+ * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
+ * \endcode
+ *
+ * Sending and Receiving a Long data stream:
+ * \code
+ * int i=0;
+ * // Pack data and Configuration to Transmit buffer (Only for Long / Long Continuous Mode(s))
+ * IfxQspi_SpiMaster_packLongModeBuffer(&spiMasterChannel, spi0TxBuffer, spi0TxLongBuffer, SPI_BUFFER_SIZE);
+ *
+ * // wait until transfer of previous data stream is finished
+ * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
+ *
+ * // send/receive new stream
+ * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
+ * \endcode
+ *
+ * ** NOTE for loopback mode **
+ * In case you want to configure and test a SPI channel in loopback, you have to
+ * select:
+ * spiMasterChannelConfig.base.mode.loopback = 1
+ *
+ * If an output pin is configured in loopback mode, the SPI channel number will be extracted from the pin map configuration.
+ *
+ * If an output pin is not configured in loopback, the default SPI channel selected
+ * will be 0.
+ *
+ * \defgroup IfxLld_Qspi_SpiMaster SPI Master Driver
+ * \ingroup IfxLld_Qspi
+ * \defgroup IfxLld_Qspi_SpiMaster_DataStructures Data Structures
+ * \ingroup IfxLld_Qspi_SpiMaster
+ * \defgroup IfxLld_Qspi_SpiMaster_Module Module Functions
+ * \ingroup IfxLld_Qspi_SpiMaster
+ * \defgroup IfxLld_Qspi_SpiMaster_Channel Channel Functions
+ * \ingroup IfxLld_Qspi_SpiMaster
+ * \defgroup IfxLld_Qspi_SpiMaster_Support Support Functions
+ * \ingroup IfxLld_Qspi_SpiMaster
+ * \defgroup IfxLld_Qspi_SpiMaster_Com Communication
+ * \ingroup IfxLld_Qspi_SpiMaster
+ * \defgroup IfxLld_Qspi_SpiMaster_InterruptFunctions Interrupt Functions
+ * \ingroup IfxLld_Qspi_SpiMaster
+ * \defgroup IfxLld_Qspi_SpiMaster_DirectFifo Direct FIFO Access
+ * \ingroup IfxLld_Qspi_SpiMaster
+ */
+
+#ifndef IFXQSPI_SPIMASTER_H
+#define IFXQSPI_SPIMASTER_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Irq/IfxCpu_Irq.h"
+#include "Dma/Dma/IfxDma_Dma.h"
+#include "Qspi/Std/IfxQspi.h"
+#include "Scu/Std/IfxScuWdt.h"
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+typedef struct IfxQspi_SpiMaster_Channel_s IfxQspi_SpiMaster_Channel;
+
+typedef void (*IfxQspi_SpiMaster_AutoSlso)(IfxQspi_SpiMaster_Channel *chHandle);
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
+ * \{ */
+typedef enum
+{
+ IfxQspi_SpiMaster_ChannelBasedCs_disabled = 0, /**< \brief Slso will be low for complete frame */
+ IfxQspi_SpiMaster_ChannelBasedCs_enabled = 1 /**< \brief Slso will toggle with every byte */
+} IfxQspi_SpiMaster_ChannelBasedCs;
+
+typedef enum
+{
+ IfxQspi_SpiMaster_Mode_short = 0, /**< \brief Short Mode */
+ IfxQspi_SpiMaster_Mode_long = 1, /**< \brief Long Mode */
+ IfxQspi_SpiMaster_Mode_shortContinuous = 2, /**< \brief Short Continous Mode */
+ IfxQspi_SpiMaster_Mode_longContinuous = 3, /**< \brief Long Continous Mode */
+ IfxQspi_SpiMaster_Mode_xxl = 4 /**< \brief XXL Mode */
+} IfxQspi_SpiMaster_Mode;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
+ * \{ */
+/** \brief SLSI pin configuration structure
+ */
+typedef struct
+{
+ IFX_CONST IfxQspi_Slsi_In *pin; /**< \brief Pointer to SLSI in pin */
+ IfxPort_InputMode mode; /**< \brief The SLSI pin input mode */
+} IfxQspi_SpiMaster_Input;
+
+/** \brief SLSO pin configuration structure
+ */
+typedef struct
+{
+ IFX_CONST IfxQspi_Slso_Out *pin; /**< \brief Pointer to SLSO out pin */
+ IfxPort_OutputMode mode; /**< \brief The SLSO pin output mode */
+ IfxPort_PadDriver driver; /**< \brief The pad driver mode which should be configured */
+} IfxQspi_SpiMaster_Output;
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
+ * \{ */
+/** \brief Dma handle
+ */
+typedef struct
+{
+ IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
+ IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
+ IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
+ IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
+ boolean useDma; /**< \brief use Dma for Data transfer/s */
+} IfxQspi_SpiMaster_Dma;
+
+/** \brief Dma configuration
+ */
+typedef struct
+{
+ IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
+ IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
+ boolean useDma; /**< \brief use Dma for Data transfer/s */
+} IfxQspi_SpiMaster_DmaConfig;
+
+/** \brief Qspi Master Mode Error Flags
+ */
+typedef struct
+{
+ uint16 parityError : 1; /**< \brief [0:0] Parity Error */
+ uint16 configurationError : 1; /**< \brief [1:1] Configuration Error */
+ uint16 baudrateError : 1; /**< \brief [2:2] baudrate Error */
+ uint16 txFifoOverflowError : 1; /**< \brief [3:3] TxFifo Overflow Error */
+ uint16 txFifoUnderflowError : 1; /**< \brief [4:4] TxFifo underflow Error */
+ uint16 rxFifoOverflowError : 1; /**< \brief [5:5] RxFifo Overflow Error */
+ uint16 rxFifoUnderflowError : 1; /**< \brief [6:6] RxFifo underflow Error */
+ uint16 expectTimeoutError : 1; /**< \brief [7:7] Expect Timeout Error */
+} IfxQspi_SpiMaster_ErrorFlags;
+
+/** \brief Union of Slave Select pins
+ */
+typedef union
+{
+ IfxQspi_SpiMaster_Input input; /**< \brief SLSI pin configuration structure */
+ IfxQspi_SpiMaster_Output output; /**< \brief SLSO pin configuration structure */
+} IfxQspi_SpiMaster_InputOutput;
+
+/** \brief Master pin IO configuration structure
+ */
+typedef struct
+{
+ IFX_CONST IfxQspi_Sclk_Out *sclk; /**< \brief Pointer to SLCK out pin */
+ IfxPort_OutputMode sclkMode; /**< \brief The SCLK pin output mode */
+ IFX_CONST IfxQspi_Mtsr_Out *mtsr; /**< \brief Pointer to MTSR out pin */
+ IfxPort_OutputMode mtsrMode; /**< \brief The MTSR pin output mode */
+ IFX_CONST IfxQspi_Mrst_In *mrst; /**< \brief Pointer to MRST in pin */
+ IfxPort_InputMode mrstMode; /**< \brief The MRST pin input mode */
+ IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
+} IfxQspi_SpiMaster_Pins;
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
+ * \{ */
+/** \brief Module handle data structure
+ */
+typedef struct
+{
+ SpiIf base; /**< \brief Module SPI interface handle */
+ Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
+ IfxQspi_SpiMaster_Dma dma; /**< \brief dma handle */
+ float32 maximumBaudrate; /**< \brief Maximum Baud Rate for the SPI Module. */
+} IfxQspi_SpiMaster;
+
+/** \brief Module Channel configuration structure
+ */
+typedef struct
+{
+ SpiIf_ChConfig base; /**< \brief SPI interface channel configuration structure */
+ IfxQspi_SpiMaster_InputOutput sls; /**< \brief Union of Slave Select pins */
+ IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs; /**< \brief define the slso behaviour */
+ IfxQspi_SpiMaster_Mode mode; /**< \brief Qspi Operating Mode */
+ uint32 dummyTxValue; /**< \brief Dummy TX value to be sent for "recieve only" modes */
+ uint32 dummyRxValue; /**< \brief Dummy RX value for transmit only modes */
+} IfxQspi_SpiMaster_ChannelConfig;
+
+/** \brief Module Channel handle structure
+ */
+struct IfxQspi_SpiMaster_Channel_s
+{
+ SpiIf_Ch base; /**< \brief SPI interface channel handle structure */
+ Ifx_QSPI_BACON bacon; /**< \brief basic configuration register */
+ IfxPort_Pin slso; /**< \brief Defines SLSO pin */
+ IfxQspi_SpiMaster_AutoSlso activateSlso; /**< \brief Specifies function for Auto SLSO activation */
+ IfxQspi_SpiMaster_AutoSlso deactivateSlso; /**< \brief Specifies function for Auto SLSO deactivation */
+ IfxQspi_ChannelId channelId; /**< \brief QSPI channel Number */
+ Ifx_ActiveState slsoActiveState; /**< \brief Specifies the current state of SLSO */
+ uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
+ boolean firstWrite; /**< \brief Specifies whether the data id first write or not. */
+ IfxQspi_SpiMaster_ChannelBasedCs channelBasedCs; /**< \brief define the slso behaviour */
+ IfxQspi_SpiMaster_Mode mode; /**< \brief Qspi Operating Mode */
+ IfxQspi_SpiMaster_ErrorFlags errorFlags; /**< \brief Spi Master Error Flags */
+ uint32 dummyTxValue; /**< \brief Dummy TX value, which will be sent for "recieve only" mode. */
+ uint32 dummyRxValue; /**< \brief Dummy Rx value, for "transmit only" modes */
+};
+
+/** \brief Module configuration structure
+ */
+typedef struct
+{
+ SpiIf_Config base; /**< \brief SPI interface configuration structure */
+ Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
+ boolean allowSleepMode; /**< \brief Specifies module sleep mode */
+ boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
+ IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
+ IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
+ IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
+ IFX_CONST IfxQspi_SpiMaster_Pins *pins; /**< \brief structure for QSPI Master pins */
+ IfxQspi_SpiMaster_DmaConfig dma; /**< \brief Dma configuration */
+ IfxQspi_FifoMode txFifoMode; /**< \brief Specifies the transmit FIFO mode */
+ IfxQspi_FifoMode rxFifoMode; /**< \brief Specifies the Receive FIFO mode */
+} IfxQspi_SpiMaster_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the module
+ * \param handle Module handle
+ * \param config Predefined configuration structure of the module
+ * \return None
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
+ *
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_initModule(IfxQspi_SpiMaster *handle, const IfxQspi_SpiMaster_Config *config);
+
+/** \brief Fills the config structure with default values
+ * \param config Configuration structure which should be initialized.
+ * \param qspi pointer to QSPI registers
+ * \return None
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
+ *
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_initModuleConfig(IfxQspi_SpiMaster_Config *config, Ifx_QSPI *qspi);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_Channel
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes the channel
+ * \param chHandle Module Channel handle
+ * \param chConfig Channel configuration structure
+ * \return Status of Channel (busy or ok or failure)
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
+ *
+ */
+IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_initChannel(IfxQspi_SpiMaster_Channel *chHandle, const IfxQspi_SpiMaster_ChannelConfig *chConfig);
+
+/** \brief Fills the config structure with default values
+ * \param chConfig Configuration structure which should be initialized.
+ * \param handle Module handle
+ * \return None
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
+ *
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_initChannelConfig(IfxQspi_SpiMaster_ChannelConfig *chConfig, IfxQspi_SpiMaster *handle);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_Com
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Exchanges data between source and data
+ * \param chHandle Module Channel handle
+ * \param src Source of data. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
+ * \param dest Destination to which to be sent.Can be set to NULL_PTR if nothing to receive(transmit only).
+ * \param count Number of data in pending
+ * \return Status of exchange of data
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
+ *
+ */
+IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count);
+
+/** \brief Gets the transmission status
+ * \param chHandle Module Channel handle
+ * \return Transmission status
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiMaster_Usage
+ *
+ */
+IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_getStatus(IfxQspi_SpiMaster_Channel *chHandle);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_InterruptFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Transmit interrupt handler
+ * \param qspiHandle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_isrDmaReceive(IfxQspi_SpiMaster *qspiHandle);
+
+/** \brief Transmit interrupt handler
+ * \param qspiHandle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_isrDmaTransmit(IfxQspi_SpiMaster *qspiHandle);
+
+/** \brief Error Interrupt handler
+ * \param handle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_isrError(IfxQspi_SpiMaster *handle);
+
+/** \brief Phase Transition interrupt handler
+ * \param handle Module handle
+ * \return Phase Transition Event
+ */
+IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrPhaseTransition(IfxQspi_SpiMaster *handle);
+
+/** \brief Receive Interrupt handler
+ * \param handle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_isrReceive(IfxQspi_SpiMaster *handle);
+
+/** \brief Transmit interrupt handler
+ * \param handle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_isrTransmit(IfxQspi_SpiMaster *handle);
+
+/** \brief User defined interrupt handler
+ * \param handle Module handle
+ * \return User Event
+ */
+IFX_EXTERN IfxQspi_PhaseTransitionEvent IfxQspi_SpiMaster_isrUserDefined(IfxQspi_SpiMaster *handle);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiMaster_DirectFifo
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reads data or status in RxFIFO
+ * \param handle Module handle
+ * \return Data or Status in RxFIFO
+ */
+IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle);
+
+/** \brief Writes Basic configuration value to Tx FIFO
+ * \param handle Module handle
+ * \param baconVal Basic configuration value to be entered in TxFIFO
+ * \return None
+ */
+IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal);
+
+/** \brief Writes extended configuration of the channel
+ * \param chHandle Module Channel handle
+ * \param econVal Channel Timing configuration value
+ * \return None
+ */
+IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal);
+
+/** \brief Writes data and configuration mixed value to Tx FIFO
+ * \param handle Module handle
+ * \param mixEntryVal Mixed of Data and configuration
+ * \return None
+ */
+IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal);
+
+/** \brief Writes the data to TxFIFO
+ * \param chHandle Module Channel handle
+ * \param data Data to be entered in Tx FIFO
+ * \return None
+ */
+IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief pack data to Long mode buffer
+ * \param chHandle Module Channel handle
+ * \param data source Data buffer to be packed
+ * \param longFifoBuffer destination buffer for data and configuration
+ * \param dataLength size of data in source buffer (in bytes)
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiMaster_packLongModeBuffer(IfxQspi_SpiMaster_Channel *chHandle, void *data, uint32 *longFifoBuffer, Ifx_SizeT dataLength);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the channel configuration
+ * \param chHandle Module Channel handle
+ * \return Channel configuration
+ */
+IFX_EXTERN SpiIf_ChConfig IfxQspi_SpiMaster_getChannelConfig(IfxQspi_SpiMaster_Channel *chHandle);
+
+/** \brief Set the channel baudrate
+ * \param chHandle Module Channel handle
+ * \param baudrate Baudrate to be configured (in Baud)
+ * \return Status of Channel (busy or ok or failure)
+ */
+IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_setChannelBaudrate(IfxQspi_SpiMaster_Channel *chHandle, float32 baudrate);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE uint32 IfxQspi_SpiMaster_readReceiveFifo(IfxQspi_SpiMaster *handle)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
+ return data;
+}
+
+
+IFX_INLINE void IfxQspi_SpiMaster_writeBasicConfiguration(IfxQspi_SpiMaster *handle, uint32 baconVal)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ IfxQspi_writeBasicConfiguration(qspiSFR, baconVal);
+}
+
+
+IFX_INLINE void IfxQspi_SpiMaster_writeExtendedConfiguration(IfxQspi_SpiMaster_Channel *chHandle, uint32 econVal)
+{
+ IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
+ IfxQspi_writeExtendedConfiguration(handle->qspi, chHandle->channelId, econVal);
+}
+
+
+IFX_INLINE void IfxQspi_SpiMaster_writeMixedDataConfiguration(IfxQspi_SpiMaster *handle, uint32 mixEntryVal)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ IfxQspi_writeMixedDataTransmitFifo(qspiSFR, mixEntryVal);
+}
+
+
+IFX_INLINE void IfxQspi_SpiMaster_writeTransmitFifo(IfxQspi_SpiMaster_Channel *chHandle, uint32 data)
+{
+ IfxQspi_SpiMaster *handle = (IfxQspi_SpiMaster *)chHandle->base.driver;
+ IfxQspi_writeTransmitFifo(handle->qspi, data);
+}
+
+
+#endif /* IFXQSPI_SPIMASTER_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiSlave/IfxQspi_SpiSlave.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiSlave/IfxQspi_SpiSlave.c
new file mode 100644
index 0000000..bbae736
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiSlave/IfxQspi_SpiSlave.c
@@ -0,0 +1,672 @@
+/**
+ * \file IfxQspi_SpiSlave.c
+ * \brief QSPI SPISLAVE details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxQspi_SpiSlave.h"
+
+/** \addtogroup IfxLld_Qspi_SpiSlave_Support
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Reads data from the Rx FIFO
+ * \param handle Module handle
+ * \return None
+ */
+IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle);
+
+/** \brief Writes data into the Tx FIFO
+ * \param handle Module handle
+ * \return None
+ */
+IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
+ * \{ */
+
+/******************************************************************************/
+/*------------------------Private Variables/Constants-------------------------*/
+/******************************************************************************/
+
+/** \brief dummy variable where recived data is placed
+ */
+IFX_STATIC uint32 IfxQspi_SpiSlave_dummyRxValue = 0;
+
+/** \brief dummy value to be transmitted
+ */
+IFX_STATIC IFX_CONST uint32 IfxQspi_SpiSlave_dummyTxValue = ~0;
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count)
+{
+ SpiIf_Status status = SpiIf_Status_busy;
+
+ /* initiate transfer when resource is free */
+ if (handle->onTransfer == FALSE)
+ {
+ status = SpiIf_Status_ok;
+
+ handle->onTransfer = TRUE;
+ handle->txJob.data = (void *)src;
+ handle->txJob.remaining = count;
+ handle->rxJob.data = dest;
+ handle->rxJob.remaining = count;
+ IfxQspi_SpiSlave_write(handle);
+ }
+
+ return status;
+}
+
+
+SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle)
+{
+ SpiIf_Status status = SpiIf_Status_ok;
+
+ if (handle->onTransfer != 0)
+ {
+ status = SpiIf_Status_busy;
+ }
+
+ return status;
+}
+
+
+void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config)
+{
+ Ifx_QSPI *qspiSFR = config->qspi;
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+
+ /* handle.base must be at offset 0 to be compatible with the standard interface SscIf */
+ {
+ uint16 password = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(password);
+ IfxQspi_setEnableModuleRequest(qspiSFR);
+ IfxQspi_setSleepMode(qspiSFR, (config->allowSleepMode != FALSE) ? IfxQspi_SleepMode_enable : IfxQspi_SleepMode_disable);
+ IfxScuWdt_setCpuEndinit(password);
+ }
+
+ { /* Configure GLOBAL, Note: at the moment default values for GLOBAL */
+ Ifx_QSPI_GLOBALCON globalcon;
+ globalcon.U = 0;
+ globalcon.B.TQ = IfxQspi_calculateTimeQuantumLength(qspiSFR, config->base.maximumBaudrate);
+ globalcon.B.EXPECT = IfxQspi_ExpectTimeout_2097152; /* 2^(EXPECT+6) : timeout for expect phase in Tqspi */
+ //globalcon.B.LB = 0; /* 0 : disable loop-back w*/
+ //globalcon.B.DEL0 = 0; /* 0 : disable delayed mode for SLSO 0 */
+ //globalcon.B.STROBE = 0; /* (STROBE+1) : strobe delay for SLSO 0 in Tq */
+ //globalcon.B.SRF = 0; /* 0 : disable stop-on-RXFIFO full feature */
+ //globalcon.B.STIP = 0; /* 0 : MRST = 0 when QSPI is deselected in slave mode */
+ //globalcon.B.EN = 0; /* 0 : PAUSE requested, 1 : RUN requested */
+ globalcon.B.MS = IfxQspi_Mode_master; /* select master mode during configuration - we will switch to slave mode at the end of this function */
+ globalcon.B.AREN = (config->pauseOnBaudrateSpikeErrors != FALSE) ? 1U : 0U;
+ globalcon.B.RESETS = 1; /* Reset SM and FIFOs */
+ qspiSFR->GLOBALCON.U = globalcon.U;
+ }
+
+ { /* Configure interrupt requests */
+ Ifx_QSPI_GLOBALCON1 globalcon1;
+ globalcon1.U = 0;
+ globalcon1.B.ERRORENS = (config->base.erPriority > 0) ? IFXQSPI_ERRORENABLEMASK : 0;
+ globalcon1.B.TXEN = (config->base.txPriority > 0) || (config->dma.useDma);
+ globalcon1.B.RXEN = (config->base.rxPriority > 0) || (config->dma.useDma);
+ globalcon1.B.TXFIFOINT = config->txFifoThreshold;
+ globalcon1.B.RXFIFOINT = config->rxFifoThreshold;
+ globalcon1.B.TXFM = config->txFifoMode;
+ globalcon1.B.RXFM = config->rxFifoMode;
+
+ qspiSFR->GLOBALCON1.U = globalcon1.U;
+ }
+
+ handle->qspi = qspiSFR;
+ handle->base.driver = handle;
+ handle->base.sending = 0U;
+ handle->base.activeChannel = NULL_PTR;
+
+ /* Protocol Configuration */
+ {
+ IfxQspi_SpiSlave_Protocol *protocol = (IfxQspi_SpiSlave_Protocol *)&config->protocol;
+
+ SpiIf_ChConfig chConfig;
+ SpiIf_initChannelConfig(&chConfig, NULL_PTR);
+ chConfig.mode.clockPolarity = protocol->clockPolarity;
+ chConfig.mode.shiftClock = protocol->shiftClock;
+ chConfig.mode.dataHeading = protocol->dataHeading;
+ chConfig.mode.dataWidth = protocol->dataWidth;
+ chConfig.mode.parityMode = protocol->parityMode;
+
+ {
+ Ifx_QSPI_BACON bacon;
+ uint8 cs = 0; // not relevant for slave
+
+ qspiSFR->ECON[cs].U = IfxQspi_calculateExtendedConfigurationValue(qspiSFR, cs, &chConfig);
+ bacon.U = IfxQspi_calculateBasicConfigurationValue(qspiSFR, IfxQspi_ChannelId_0, &chConfig.mode, config->base.maximumBaudrate);
+ IfxQspi_writeBasicConfigurationBeginStream(qspiSFR, bacon.U);
+ }
+ handle->dataWidth = protocol->dataWidth;
+ }
+
+ handle->rxJob.data = NULL_PTR;
+ handle->rxJob.remaining = 0;
+ handle->txJob.data = NULL_PTR;
+ handle->txJob.remaining = 0;
+ handle->onTransfer = FALSE;
+
+ /* Configure I/O pins for slave mode */
+ const IfxQspi_SpiSlave_Pins *pins = config->pins;
+
+ if (pins != NULL_PTR)
+ {
+ const IfxQspi_Sclk_In *sclkIn = pins->sclk;
+
+ if (sclkIn != NULL_PTR)
+ {
+ IfxQspi_initSclkInPinWithPadLevel(sclkIn, pins->sclkMode, pins->pinDriver);
+ }
+
+ const IfxQspi_Mtsr_In *mtsrIn = pins->mtsr;
+
+ if (mtsrIn != NULL_PTR)
+ {
+ IfxQspi_initMtsrInPinWithPadLevel(mtsrIn, pins->mtsrMode, pins->pinDriver);
+ }
+
+ const IfxQspi_Mrst_Out *mrstOut = pins->mrst;
+
+ if (mrstOut != NULL_PTR)
+ {
+ IfxQspi_initMrstOutPin(mrstOut, pins->mrstMode, pins->pinDriver);
+ }
+
+ const IfxQspi_Slsi_In *slsiIn = pins->slsi;
+
+ if (slsiIn != NULL_PTR)
+ {
+ IfxQspi_initSlsiWithPadLevel(slsiIn, pins->slsiMode, pins->pinDriver);
+ }
+ }
+
+ if (config->dma.useDma)
+ {
+ IfxDma_Dma dma;
+ IfxDma_Dma_createModuleHandle(&dma, dmaSFR);
+
+ IfxDma_Dma_ChannelConfig dmaCfg;
+ IfxDma_Dma_initChannelConfig(&dmaCfg, &dma);
+ handle->dma.useDma = TRUE;
+ {
+ handle->dma.txDmaChannelId = config->dma.txDmaChannelId;
+ dmaCfg.channelId = handle->dma.txDmaChannelId;
+ dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
+ dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
+
+ // source address and transfer count will be configured during runtime
+ dmaCfg.sourceAddress = 0;
+ dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.sourceCircularBufferEnabled = FALSE;
+ dmaCfg.transferCount = 0;
+ dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
+
+ // destination address is fixed; use circular mode to stay at this address for each move
+ dmaCfg.destinationAddress = (uint32)&qspiSFR->DATAENTRY[0].U;
+ dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.destinationCircularBufferEnabled = TRUE;
+
+ dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
+ dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
+ dmaCfg.blockMode = IfxDma_ChannelMove_1;
+
+ IfxDma_Dma_initChannel(&handle->dma.txDmaChannel, &dmaCfg);
+ }
+
+ {
+ handle->dma.rxDmaChannelId = config->dma.rxDmaChannelId;
+ dmaCfg.channelId = handle->dma.rxDmaChannelId;
+ dmaCfg.hardwareRequestEnabled = FALSE; // will be triggered from qspi service request
+ dmaCfg.channelInterruptEnabled = TRUE; // trigger interrupt after transaction
+
+ // source address is fixed; use circular mode to stay at this address for each move
+ dmaCfg.sourceAddress = (uint32)&qspiSFR->RXEXIT.U;
+ dmaCfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.sourceCircularBufferEnabled = TRUE;
+
+ // destination address and transfer count will be configured during runtime
+ dmaCfg.destinationAddress = 0;
+ dmaCfg.destinationAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ dmaCfg.destinationCircularBufferEnabled = FALSE;
+ dmaCfg.transferCount = 0;
+
+ dmaCfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
+ dmaCfg.operationMode = IfxDma_ChannelOperationMode_single;
+ dmaCfg.moveSize = IfxDma_ChannelMoveSize_8bit;
+ dmaCfg.blockMode = IfxDma_ChannelMove_1;
+
+ IfxDma_Dma_initChannel(&handle->dma.rxDmaChannel, &dmaCfg);
+ }
+ /* Dma channel interrupt configuration */
+ {
+ volatile Ifx_SRC_SRCR *src = IfxDma_getSrcPointer(dmaSFR, (IfxDma_ChannelId)config->dma.txDmaChannelId);
+ IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
+ IfxSrc_enable(src);
+
+ src = IfxDma_getSrcPointer(dmaSFR, (IfxDma_ChannelId)config->dma.rxDmaChannelId);
+ IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
+ IfxSrc_enable(src);
+ }
+ }
+
+ /* interrupt configuration */
+ {
+ IfxQspi_clearAllEventFlags(qspiSFR);
+
+ if (handle->dma.useDma)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
+ IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.txDmaChannelId);
+ IfxSrc_enable(src);
+
+ src = IfxQspi_getReceiveSrc(qspiSFR);
+ IfxSrc_init(src, IfxSrc_Tos_dma, (Ifx_Priority)config->dma.rxDmaChannelId);
+ IfxSrc_enable(src);
+ }
+ else
+ {
+ if (config->base.txPriority != 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
+ IfxSrc_init(src, config->base.isrProvider, config->base.txPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (config->base.rxPriority != 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getReceiveSrc(qspiSFR);
+ IfxSrc_init(src, config->base.isrProvider, config->base.rxPriority);
+ IfxSrc_enable(src);
+ }
+
+ if (config->base.erPriority != 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getErrorSrc(qspiSFR);
+ IfxSrc_init(src, config->base.isrProvider, config->base.erPriority);
+ IfxSrc_enable(src);
+ }
+ }
+ }
+ /* finally switch to slave mode */
+ qspiSFR->GLOBALCON.B.MS = IfxQspi_Mode_slave;
+ IfxQspi_run(qspiSFR);
+}
+
+
+void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi)
+{
+ const IfxQspi_SpiSlave_Protocol defaultProtocol = {
+ .clockPolarity = SpiIf_ClockPolarity_idleLow,
+ .shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge,
+ .dataHeading = SpiIf_DataHeading_msbFirst,
+ .dataWidth = 8,
+ .parityMode = Ifx_ParityMode_even
+ };
+
+ SpiIf_initConfig(&config->base);
+
+ config->qspi = qspi;
+ config->allowSleepMode = FALSE;
+ config->pauseOnBaudrateSpikeErrors = FALSE,
+ config->pauseRunTransition = IfxQspi_PauseRunTransition_pause;
+ config->txFifoThreshold = IfxQspi_TxFifoInt_1;
+ config->rxFifoThreshold = IfxQspi_RxFifoInt_0;
+ config->txFifoMode = IfxQspi_FifoMode_combinedMove;
+ config->rxFifoMode = IfxQspi_FifoMode_combinedMove;
+ config->pins = NULL_PTR;
+ config->protocol = defaultProtocol;
+
+ config->dma.rxDmaChannelId = IfxDma_ChannelId_none;
+ config->dma.txDmaChannelId = IfxDma_ChannelId_none;
+ config->dma.useDma = FALSE;
+}
+
+
+void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle)
+{
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+ IfxDma_ChannelId rxDmaChannelId = qspiHandle->dma.rxDmaChannelId;
+
+ if (IfxDma_getAndClearChannelInterrupt(dmaSFR, rxDmaChannelId))
+ {
+ qspiHandle->onTransfer = FALSE;
+ }
+
+ IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, rxDmaChannelId);
+}
+
+
+void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle)
+{
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+ IfxDma_ChannelId txDmaChannelId = qspiHandle->dma.txDmaChannelId;
+ // TODO
+ IfxDma_getAndClearChannelPatternDetectionInterrupt(dmaSFR, txDmaChannelId);
+ IfxDma_getAndClearChannelInterrupt(dmaSFR, txDmaChannelId);
+}
+
+
+void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ uint16 errorFlags = IfxQspi_getErrorFlags(qspiSFR);
+ IfxQspi_clearAllEventFlags(qspiSFR);
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+
+ /* store all the flags in the variable */
+
+ if ((errorFlags & IfxQspi_Error_parity))
+ {
+ handle->errorFlags.parityError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_configuration))
+ {
+ handle->errorFlags.configurationError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_baudrate))
+ {
+ handle->errorFlags.baudrateError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_expectTimeout))
+ {
+ handle->errorFlags.expectTimeoutError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_txfifoOverflow))
+ {
+ handle->errorFlags.txFifoOverflowError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_txfifoUnderflow))
+ {
+ handle->errorFlags.txFifoUnderflowError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_rxfifoOverflow))
+ {
+ handle->errorFlags.rxFifoOverflowError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_rxfifoUnderflow))
+ {
+ handle->errorFlags.rxFifoUnderflowError = 1;
+ }
+
+ if ((errorFlags & IfxQspi_Error_slsiMisplacedInactivation))
+ {
+ handle->errorFlags.slsiMisplacedInactivation = 1;
+ }
+
+ if (errorFlags)
+ {
+ handle->onTransfer = FALSE;
+ }
+
+ if (handle->dma.useDma)
+ {
+ IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.rxDmaChannelId);
+ IfxDma_getAndClearChannelInterrupt(dmaSFR, handle->dma.txDmaChannelId);
+ }
+}
+
+
+void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle)
+{
+ IfxQspi_SpiSlave_read(handle);
+}
+
+
+void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle)
+{
+ IfxQspi_SpiSlave_write(handle);
+}
+
+
+IFX_STATIC void IfxQspi_SpiSlave_read(IfxQspi_SpiSlave *handle)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ SpiIf_Job *job = &handle->rxJob;
+ Ifx_SizeT count = (Ifx_SizeT)IfxQspi_getReceiveFifoLevel(qspiSFR);
+ count = __min(job->remaining, count);
+
+ if (job->data == NULL_PTR)
+ {
+ // no data should be buffered: do dummy reads
+ int i;
+
+ for (i = 0; i < count; ++i)
+ {
+ IfxQspi_readReceiveFifo(qspiSFR);
+ }
+ }
+ else
+ {
+ if (handle->dataWidth <= 8)
+ {
+ IfxQspi_read8(qspiSFR, job->data, count);
+ job->data = &(((uint8 *)job->data)[count]);
+ }
+ else if (handle->dataWidth <= 16)
+ {
+ IfxQspi_read16(qspiSFR, job->data, count);
+ job->data = &(((uint16 *)job->data)[count]);
+ }
+ else
+ {
+ IfxQspi_read32(qspiSFR, job->data, count);
+ job->data = &(((uint32 *)job->data)[count]);
+ }
+ }
+
+ job->remaining = job->remaining - count;
+
+ if (job->remaining == 0)
+ {
+ handle->onTransfer = FALSE;
+ }
+}
+
+
+IFX_STATIC void IfxQspi_SpiSlave_write(IfxQspi_SpiSlave *handle)
+{
+ SpiIf_Job *job = &handle->txJob;
+
+ if (handle->dma.useDma)
+ {
+ Ifx_DMA *dmaSFR = &MODULE_DMA;
+ SpiIf_Job *jobrx = &handle->rxJob;
+
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ volatile Ifx_SRC_SRCR *src = IfxQspi_getTransmitSrc(qspiSFR);
+
+ IfxDma_ChannelId txDmaChannelId = handle->dma.txDmaChannelId;
+ IfxDma_ChannelId rxDmaChannelId = handle->dma.rxDmaChannelId;
+
+ boolean interruptState = IfxCpu_disableInterrupts();
+ IfxDma_setChannelTransferCount(dmaSFR, txDmaChannelId, job->remaining);
+
+ if (handle->dataWidth <= 8)
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_8bit);
+ }
+ else if (handle->dataWidth <= 16)
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_16bit);
+ }
+ else
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, txDmaChannelId, IfxDma_ChannelMoveSize_32bit);
+ }
+
+ if (job->data == NULL_PTR)
+ {
+ IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &IfxQspi_SpiSlave_dummyTxValue));
+ IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
+ }
+ else
+ {
+ IfxDma_setChannelSourceAddress(dmaSFR, txDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), job->data));
+ IfxDma_setChannelSourceIncrementStep(dmaSFR, txDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
+ }
+
+ IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
+
+ /* Receive config */
+ IfxDma_setChannelTransferCount(dmaSFR, rxDmaChannelId, job->remaining);
+
+ if (handle->dataWidth <= 8)
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_8bit);
+ }
+ else if (handle->dataWidth <= 16)
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_16bit);
+ }
+ else
+ {
+ IfxDma_setChannelMoveSize(dmaSFR, rxDmaChannelId, IfxDma_ChannelMoveSize_32bit);
+ }
+
+ if (jobrx->data == NULL_PTR)
+ {
+ IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), &IfxQspi_SpiSlave_dummyRxValue));
+ IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_4);
+ }
+ else
+ {
+ IfxDma_setChannelDestinationAddress(dmaSFR, rxDmaChannelId, (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), jobrx->data));
+ IfxDma_setChannelDestinationIncrementStep(dmaSFR, rxDmaChannelId, IfxDma_ChannelIncrementStep_1,
+ IfxDma_ChannelIncrementDirection_positive, IfxDma_ChannelIncrementCircular_none);
+ }
+
+ IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
+ IfxQspi_clearAllEventFlags(qspiSFR);
+ src = IfxQspi_getTransmitSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+ src = IfxQspi_getReceiveSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+ src = IfxQspi_getErrorSrc(qspiSFR);
+ IfxSrc_clearRequest(src);
+
+ IfxDma_clearChannelInterrupt(dmaSFR, rxDmaChannelId);
+ IfxDma_clearChannelInterrupt(dmaSFR, txDmaChannelId);
+ IfxDma_setChannelInterruptServiceRequest(dmaSFR, txDmaChannelId);
+ IfxDma_setChannelInterruptServiceRequest(dmaSFR, rxDmaChannelId);
+ IfxDma_enableChannelTransaction(dmaSFR, rxDmaChannelId);
+ IfxDma_enableChannelTransaction(dmaSFR, txDmaChannelId);
+ IfxDma_startChannelTransaction(dmaSFR, txDmaChannelId);
+
+ IfxCpu_restoreInterrupts(interruptState);
+ }
+ else
+ {
+ IfxQspi_ChannelId cs = IfxQspi_ChannelId_0;
+
+ if (job->remaining > 0)
+ {
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ boolean interruptState = IfxCpu_disableInterrupts();
+ Ifx_SizeT count = (Ifx_SizeT)(IFXQSPI_HWFIFO_DEPTH - 1 - IfxQspi_getTransmitFifoLevel(qspiSFR)); // -1, since BACON allocates one FIFO entry
+ count = __min(job->remaining, count);
+
+ if (count > 0)
+ {
+ job->remaining = job->remaining - count;
+
+ if (job->data == NULL_PTR)
+ {
+ // no data should be sent (only received): send all
+ int i;
+
+ for (i = 0; i < count; ++i)
+ {
+ IfxQspi_writeTransmitFifo(qspiSFR, ~0);
+ }
+ }
+ else
+ {
+ if (handle->dataWidth <= 8)
+ {
+ IfxQspi_write8(qspiSFR, cs, job->data, count);
+ job->data = &(((uint8 *)job->data)[count]);
+ }
+ else if (handle->dataWidth <= 16)
+ {
+ IfxQspi_write16(qspiSFR, cs, job->data, count);
+ job->data = &(((uint16 *)job->data)[count]);
+ }
+ else
+ {
+ IfxQspi_write32(qspiSFR, cs, job->data, count);
+ job->data = &(((uint32 *)job->data)[count]);
+ }
+ }
+ }
+
+ IfxCpu_restoreInterrupts(interruptState);
+ }
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiSlave/IfxQspi_SpiSlave.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiSlave/IfxQspi_SpiSlave.h
new file mode 100644
index 0000000..9e8ba6f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiSlave/IfxQspi_SpiSlave.h
@@ -0,0 +1,555 @@
+/**
+ * \file IfxQspi_SpiSlave.h
+ * \brief QSPI SPISLAVE details
+ * \ingroup IfxLld_Qspi
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Qspi_SpiSlave_Usage How to use the SPI Slave Interface driver?
+ * \ingroup IfxLld_Qspi
+ *
+ * The SPI Slave interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
+ *
+ * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
+ * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Qspi_SpiSlave_Preparation Preparation
+ * \subsection IfxLld_Qspi_SpiSlave_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiSlave_Variables Variables
+ *
+ * Declare QSPI module handle:
+ *
+ * \code
+ * IfxQspi_SpiSlave spi;
+ * \endcode
+ *
+ * In addition, declare global transmit and receive buffers for the data transfers:
+ * \code
+ * #define SPI_BUFFER_SIZE 8
+ * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
+ * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiSlave_Interrupt Interrupt Handler Installation (without dma use)
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define IFX_INTPRIO_QSPI2_TX 1
+ * #define IFX_INTPRIO_QSPI2_RX 2
+ * #define IFX_INTPRIO_QSPI2_ER 5
+ * \endcode
+ *
+ * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
+ * \code
+ * IFX_INTERRUPT(qspi2TxISR, 0, IFX_INTPRIO_QSPI2_TX)
+ * {
+ * IfxQspi_SpiSlave_isrTransmit(&spi);
+ * }
+ *
+ * IFX_INTERRUPT(qspi2RxISR, 0, IFX_INTPRIO_QSPI2_RX)
+ * {
+ * IfxQspi_SpiSlave_isrReceive(&spi);
+ * }
+ *
+ * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
+ * {
+ * IfxQspi_SpiSlave_isrError(&spi);
+ * // Process errors. Eg: parity Error is checked below
+ * if( spi.errorFlags.parityError == 1)
+ * {
+ * // Parity Error
+ * }
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler(&qspi2TxISR, IFX_INTPRIO_QSPI2_TX);
+ * IfxCpu_Irq_installInterruptHandler(&qspi2RxISR, IFX_INTPRIO_QSPI2_RX);
+ * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiSlave_Interrupt_dma Interrupt Handler Installation (with dma use)
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * // qspi priorities
+ * #define IFX_INTPRIO_QSPI2_TX 3 // DMA channel 3
+ * #define IFX_INTPRIO_QSPI2_RX 4 // DMA channel 4
+ * #define IFX_INTPRIO_QSPI2_ER 0x31
+ * // dma priorities
+ * #define IFX_INTPRIO_DMA_CH3 12
+ * #define IFX_INTPRIO_DMA_CH4 13
+ * \endcode
+ *
+ * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
+ * \code
+ * IFX_INTERRUPT(qspi2DmaTxISR, 0, IFX_INTPRIO_DMA_CH3)
+ * {
+ * IfxQspi_SpiSlave_isrDmaTransmit(&spi);
+ *
+ * }
+ *
+ * IFX_INTERRUPT(qspi2DmaRxISR, 0, IFX_INTPRIO_DMA_CH4)
+ * {
+ * IfxQspi_SpiSlave_isrDmaReceive(&spi);
+ * }
+ *
+ * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
+ * {
+ * IfxQspi_SpiSlave_isrError(&spi);
+ * // Process errors. Eg: parity Error is checked below
+ * if( spi.errorFlags.parityError == 1)
+ * {
+ * // Parity Error
+ * }
+ *
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler(&qspi2DmaTxISR, IFX_INTPRIO_DMA_CH3);
+ * IfxCpu_Irq_installInterruptHandler(&qspi2DmaRxISR, IFX_INTPRIO_DMA_CH4);
+ * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiSlave_Init Module Initialisation (without dma use)
+ *
+ * The module initialisation can be done in the same function.
+ *
+ * Here an example for slave mode:
+ * \code
+ * // create module config
+ * IfxQspi_SpiSlave_Config spiSlaveConfig;
+ * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
+ *
+ * // set the maximum baudrate
+ * spiSlaveConfig.base.maximumBaudrate = 10000000;
+ *
+ * // ISR priorities and interrupt target
+ * spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
+ * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
+ * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
+ * spiSlaveConfig.base.isrProvider = IfxCpu_Irq_getTos(IfxCpu_getCoreIndex());
+ *
+ * // pin configuration
+ * const IfxQspi_SpiSlave_Pins slavePins = {
+ * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
+ * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
+ * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
+ * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
+ * };
+ * spiSlaveConfig.pins = &slavePins;
+ *
+ * // initialize module
+ * //IfxQspi_Spi spi; // defined globally
+ * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
+ * \endcode
+ *
+ * \subsection IfxLld_Qspi_SpiSlave_Init_dma Module Initialisation (with dma use)
+ *
+ * The module initialisation can be done in the same function.
+ *
+ * Here an example for slave mode:
+ * \code
+ * // create module config
+ * IfxQspi_SpiSlave_Config spiSlaveConfig;
+ * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
+ *
+ * // set the maximum baudrate
+ * spiSlaveConfig.base.maximumBaudrate = 10000000;
+ *
+ * // ISR priorities and interrupt target (with dma usage)
+ * spiSlaveConfig.base.txPriority = IFX_INTPRIO_DMA_CH3;
+ * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_DMA_CH4;
+ * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
+ *
+ * spiSlaveConfig.dma.txDmaChannelId = IfxDma_ChannelId_3;
+ * spiSlaveConfig.dma.rxDmaChannelId = IfxDma_ChannelId_4;
+ * spiSlaveConfig.dma.useDma = 1;
+ *
+ * // pin configuration
+ * const IfxQspi_SpiSlave_Pins slavePins = {
+ * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
+ * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
+ * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
+ * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
+ * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
+ * };
+ * spiSlaveConfig.pins = &slavePins;
+ *
+ * // initialize module
+ * //IfxQspi_Spi spi; // defined globally
+ * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
+ * \endcode
+ *
+ * The QSPI is ready for use now!
+ *
+ *
+ * \section IfxLld_Qspi_SpiSlave_DataTransfers Data Transfers
+ *
+ * In following examples we assume, that following buffers are declared globally:
+ * \code
+ * // declared somewhere globally
+ * #define SPI_BUFFER_SIZE 8
+ * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
+ * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
+ * \endcode
+ *
+ * Sending and Receiving a data stream:
+ * \code
+ * int i = 0;
+ * // wait until transfer of previous data stream is finished
+ * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
+ *
+ * // send/receive new stream
+ * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
+ * \endcode
+ *
+ * Send only, discard received data:
+ * \code
+ *
+ * // wait until transfer of previous data stream is finished
+ * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
+ *
+ * // send new stream
+ * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
+ * \endcode
+ *
+ * Receive only, send all-1
+ * \code
+ * // wait until transfer of previous data stream is finished
+ * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
+ *
+ * // receive new stream
+ * IfxQspi_SpiSlave_exchange(&spi, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
+ * \endcode
+ *
+ * \defgroup IfxLld_Qspi_SpiSlave SPI Slave Driver
+ * \ingroup IfxLld_Qspi
+ * \defgroup IfxLld_Qspi_SpiSlave_DataStructures Data Structures
+ * \ingroup IfxLld_Qspi_SpiSlave
+ * \defgroup IfxLld_Qspi_SpiSlave_Module Module Functions
+ * \ingroup IfxLld_Qspi_SpiSlave
+ * \defgroup IfxLld_Qspi_SpiSlave_Support Support Functions
+ * \ingroup IfxLld_Qspi_SpiSlave
+ * \defgroup IfxLld_Qspi_SpiSlave_Com Communication
+ * \ingroup IfxLld_Qspi_SpiSlave
+ * \defgroup IfxLld_Qspi_SpiSlave_InterruptFunctions Interrupt Functions
+ * \ingroup IfxLld_Qspi_SpiSlave
+ * \defgroup IfxLld_Qspi_SpiSlave_DirectFifo Direct FIFO Access
+ * \ingroup IfxLld_Qspi_SpiSlave
+ */
+
+#ifndef IFXQSPI_SPISLAVE_H
+#define IFXQSPI_SPISLAVE_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Irq/IfxCpu_Irq.h"
+#include "Dma/Dma/IfxDma_Dma.h"
+#include "Qspi/Std/IfxQspi.h"
+#include "Scu/Std/IfxScuWdt.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
+ * \{ */
+/** \brief Dma handle
+ */
+typedef struct
+{
+ IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
+ IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
+ IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
+ IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
+ boolean useDma; /**< \brief use Dma for Data transfers */
+} IfxQspi_SpiSlave_Dma;
+
+/** \brief Dma configuration
+ */
+typedef struct
+{
+ IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi receive */
+ IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
+ boolean useDma; /**< \brief use Dma for Data transfers */
+} IfxQspi_SpiSlave_DmaConfig;
+
+/** \brief Qspi Slave Mode Error Flags
+ */
+typedef struct
+{
+ uint16 parityError : 1; /**< \brief [0:0] Parity Error */
+ uint16 configurationError : 1; /**< \brief [1:1] Configuration Error */
+ uint16 baudrateError : 1; /**< \brief [2:2] baudrate Error */
+ uint16 txFifoOverflowError : 1; /**< \brief [3:3] TxFifo Overflow Error */
+ uint16 txFifoUnderflowError : 1; /**< \brief [4:4] TxFifo underflow Error */
+ uint16 rxFifoOverflowError : 1; /**< \brief [5:5] RxFifo Overflow Error */
+ uint16 rxFifoUnderflowError : 1; /**< \brief [6:6] RxFifo underflow Error */
+ uint16 expectTimeoutError : 1; /**< \brief [7:7] Expect Timeout Error */
+ uint16 slsiMisplacedInactivation : 1; /**< \brief [8:8] SLSI misplaced inactivation (slave mode) */
+} IfxQspi_SpiSlave_ErrorFlags;
+
+/** \brief Slave pin IO configuration structure
+ */
+typedef struct
+{
+ IFX_CONST IfxQspi_Sclk_In *sclk; /**< \brief Pointer to SLCK in pin */
+ IfxPort_InputMode sclkMode; /**< \brief The SCLK pin input mode */
+ IFX_CONST IfxQspi_Mtsr_In *mtsr; /**< \brief Pointer to MTSR in pin */
+ IfxPort_InputMode mtsrMode; /**< \brief The MTSR pin input mode */
+ IFX_CONST IfxQspi_Mrst_Out *mrst; /**< \brief Pointer to MRST out pin */
+ IfxPort_OutputMode mrstMode; /**< \brief The MRST pin output mode */
+ IFX_CONST IfxQspi_Slsi_In *slsi; /**< \brief Pointer to SLSI in pin */
+ IfxPort_InputMode slsiMode; /**< \brief The SLSI pin input mode */
+ IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
+} IfxQspi_SpiSlave_Pins;
+
+/** \brief Configures the SPI Protocol
+ */
+typedef struct
+{
+ SpiIf_ClockPolarity clockPolarity; /**< \brief Specifies the clock polarity */
+ SpiIf_ShiftClock shiftClock; /**< \brief Specifies the clock phase */
+ SpiIf_DataHeading dataHeading; /**< \brief Specifies MSB or LSB first */
+ uint8 dataWidth; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
+ Ifx_ParityMode parityMode; /**< \brief Specifies the parity mode */
+} IfxQspi_SpiSlave_Protocol;
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
+ * \{ */
+/** \brief Module handle data structure
+ */
+typedef struct
+{
+ SpiIf base; /**< \brief Module SPI interface handle */
+ Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
+ uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
+ SpiIf_Job rxJob; /**< \brief Rx Stream which has been received */
+ SpiIf_Job txJob; /**< \brief Tx Stream which should be sent */
+ boolean onTransfer; /**< \brief set to TRUE during ongoing transfer */
+ IfxQspi_SpiSlave_Dma dma; /**< \brief Dma handle */
+ IfxQspi_SpiSlave_ErrorFlags errorFlags; /**< \brief Spi Slave Error Flags */
+} IfxQspi_SpiSlave;
+
+/** \brief Module configuration structure
+ */
+typedef struct
+{
+ SpiIf_Config base; /**< \brief SPI interface configuration structure */
+ Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
+ boolean allowSleepMode; /**< \brief Specifies module sleep mode */
+ boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
+ IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
+ IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
+ IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
+ IFX_CONST IfxQspi_SpiSlave_Pins *pins; /**< \brief structure for QSPI Slave pins */
+ IfxQspi_SpiSlave_Protocol protocol;
+ IfxQspi_SpiSlave_DmaConfig dma; /**< \brief Dma configuration */
+ IfxQspi_FifoMode txFifoMode; /**< \brief Specifies the transfer FIFO mode. */
+ IfxQspi_FifoMode rxFifoMode; /**< \brief Specifies the receive FIFO mode */
+} IfxQspi_SpiSlave_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiSlave_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the module
+ * \param handle Module handle
+ * \param config Predefined configuration structure of the module
+ * \return None
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
+ *
+ */
+IFX_EXTERN void IfxQspi_SpiSlave_initModule(IfxQspi_SpiSlave *handle, const IfxQspi_SpiSlave_Config *config);
+
+/** \brief Fills the config structure with default values
+ * \param config Configuration structure which should be initialized.
+ * \param qspi pointer to QSPI registers
+ * \return None
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
+ *
+ */
+IFX_EXTERN void IfxQspi_SpiSlave_initModuleConfig(IfxQspi_SpiSlave_Config *config, Ifx_QSPI *qspi);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiSlave_Com
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Exchanges data between source and data
+ * \param handle Module handle
+ * \param src Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
+ * \param dest Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
+ * \param count Number of data in pending
+ * \return Status of exchange of data
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
+ *
+ */
+IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count);
+
+/** \brief Gets the transmission status
+ * \param handle Module handle
+ * \return Transmission status
+ *
+ * Usage example: see \ref IfxLld_Qspi_SpiSlave_Usage
+ *
+ */
+IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_getStatus(IfxQspi_SpiSlave *handle);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiSlave_InterruptFunctions
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Dma receive interrupt handler
+ * \param qspiHandle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiSlave_isrDmaReceive(IfxQspi_SpiSlave *qspiHandle);
+
+/** \brief Transmit interrupt handler
+ * \param qspiHandle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiSlave_isrDmaTransmit(IfxQspi_SpiSlave *qspiHandle);
+
+/** \brief Error Interrupt handler
+ * \param handle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiSlave_isrError(IfxQspi_SpiSlave *handle);
+
+/** \brief Receive Interrupt handler
+ * \param handle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiSlave_isrReceive(IfxQspi_SpiSlave *handle);
+
+/** \brief Transmit interrupt handler
+ * \param handle Module handle
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_SpiSlave_isrTransmit(IfxQspi_SpiSlave *handle);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_SpiSlave_DirectFifo
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reads data or status in RxFIFO
+ * \param handle QSpi Slave handle
+ * \return Data or Status in RxFIFO
+ */
+IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle);
+
+/** \brief Writes the data to TxFIFO
+ * \param handle QSpi slave handle
+ * \param data Data to be entered in Tx FIFO
+ * \return None
+ */
+IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE uint32 IfxQspi_SpiSlave_readReceiveFifo(IfxQspi_SpiSlave *handle)
+{
+ Ifx_QSPI *qspiSFR = handle->qspi;
+ uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
+ return data;
+}
+
+
+IFX_INLINE void IfxQspi_SpiSlave_writeTransmitFifo(IfxQspi_SpiSlave *handle, uint32 data)
+{
+ IfxQspi_writeTransmitFifo(handle->qspi, data);
+}
+
+
+#endif /* IFXQSPI_SPISLAVE_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/Std/IfxQspi.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/Std/IfxQspi.c
new file mode 100644
index 0000000..e74c646
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/Std/IfxQspi.c
@@ -0,0 +1,518 @@
+/**
+ * \file IfxQspi.c
+ * \brief QSPI basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxQspi.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId)
+{
+ int cs = channelId % 8;
+ float fQspi = IfxScuCcu_getMaxFrequency();
+ Ifx_QSPI_ECON econ[8];
+ econ[cs].U = qspi->ECON[cs].U;
+ fQspi = fQspi / (qspi->GLOBALCON.B.TQ + 1);
+ fQspi = fQspi / (econ[cs].B.Q + 1);
+ fQspi = fQspi / ((econ[cs].B.A + 1) + econ[cs].B.B + econ[cs].B.C);
+ return fQspi;
+}
+
+
+uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate)
+{
+ IFX_UNUSED_PARAMETER(baudrate);
+
+ Ifx_QSPI_BACON bacon;
+ IfxQspi_DelayConst delayConst[3];
+ bacon.U = 0;
+
+ IfxQspi_calculateDelayConstants(qspi, channelId, chMode, delayConst);
+
+ bacon.B.LAST = 0; /* 1-bits Last Word in a Frame, will be set via recalcBasicConfiguration before transfer */
+
+ bacon.B.IPRE = delayConst[0].pre; /* 3-bits Prescaler for the Idle Delay */
+ bacon.B.IDLE = delayConst[0].delay; /* 3-bits Idle Delay Length */
+ bacon.B.LPRE = delayConst[1].pre; /* 3-bits Prescaler for the Leading Delay */
+ bacon.B.LEAD = delayConst[1].delay; /* 3-bits Leading Delay Length */
+ bacon.B.TPRE = delayConst[2].pre; /* 3-bits Prescaler for the Trailing Delay */
+ bacon.B.TRAIL = delayConst[2].delay; /* 2-bits Trailing Delay Length */
+ bacon.B.PARTYP = (chMode->parityMode == Ifx_ParityMode_even) ? 0 : 1;
+ bacon.B.UINT = 0; /* 1-bits User Interrupt at the PT1 Event in the Subsequent Frames */
+ bacon.B.MSB = (chMode->dataHeading == SpiIf_DataHeading_lsbFirst) ? 0 : 1;
+ bacon.B.BYTE = 0; /* only support bitwise selection in B.DL */
+ bacon.B.DL = chMode->dataWidth - 1;
+ bacon.B.CS = channelId;
+
+ return bacon.U;
+}
+
+
+uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig)
+{
+ IFX_UNUSED_PARAMETER(cs);
+
+ Ifx_QSPI_ECON econ;
+ econ.U = 0;
+
+ const int maxB = 3;
+ float32 tQspi = 1.0 / IfxQspi_getTimeQuantaFrequency(qspi);
+ float32 fBaud = (chConfig->baudrate);
+ int abcMin = (2);
+ int abcMax = (4 + 0 + 4);
+ int q, bestQ = 1, abc, bestAbc = abcMax, halfBaud = 0;
+ sint8 diffB = 0;
+ float32 error, bestError;
+ float32 tTmp, tBaudTmp;
+ boolean done = FALSE;
+
+ if (fBaud == 0.0)
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_WARNING, FALSE); /* chosen baud rate is 0 */
+ fBaud = 1.0;
+ }
+
+ float32 tBaud = 1.0 / fBaud;
+
+ bestError = 1e6;
+
+ for (abc = abcMax; abc >= abcMin; abc--)
+ {
+ tTmp = tQspi * abc;
+ q = (int)((tBaud / tTmp) + 0.5);
+
+ if (q > 64)
+ {
+ q = 64;
+ }
+
+ else if ((q * abc) < 4)
+ {
+ q = 2;
+ }
+
+ else if (q < 1)
+ {
+ q = 1;
+ }
+
+ tBaudTmp = tTmp * q;
+ error = __absf(tBaudTmp - tBaud);
+
+ if (__leqf(error, bestError)) /* we have a equal/better error case */
+ {
+ /* process this case only if lesser error / or if ABC is even */
+ if (__neqf(error, bestError) || (((uint32)bestAbc & (uint32)0x1) == 0))
+ {
+ bestError = error;
+ bestAbc = abc;
+ bestQ = q;
+ }
+
+ /* break out if ABC is even and error = 0 */
+ if (((uint32)bestAbc & (uint32)0x1) == 0)
+ {
+ done = (__neqf(error, 0.0)) ? FALSE : TRUE;
+
+ if (done != FALSE)
+ {
+ break;
+ }
+ }
+ }
+ }
+
+ /* Exchange Q and ABC, if ABC is odd and Q is even.
+ * This is because: A+1+B+C is ideally even for
+ * achieving 50% duty cycle of the clock.
+ */
+ if ((bestQ <= abcMax)
+ && (((uint32)bestAbc & (uint32)0x1) != 0)
+ && (((uint32)bestQ & (uint32)0x1) == 0))
+ {
+ q = bestQ;
+ bestQ = bestAbc;
+ bestAbc = q;
+ }
+
+ /* NOTE: In assigning values to A,B,C:
+ * the "sampling point" (which is A+B) has to be as far as possible
+ * from the "shifting point" (end of A+B+C).
+ * The duty cycle is calculated as the ratio of A : B+C
+ * Therefore, to keep 50% duty cycle: A = B+C
+ * Thus, we cannot influence the value of A, once A+B+C is found out
+ * (A+1 is always (A+B+C)/2).
+ * However, in between B and C - we should try to maximize B (and minimize C).
+ * The goal will be to do this - keep max value of B always and keep only any remaining value for C .
+ */
+ halfBaud = bestAbc / 2;
+ diffB = halfBaud - maxB;
+
+ econ.B.Q = bestQ - 1;
+ econ.B.A = halfBaud + (bestAbc % 2) - 1; /* A + 1 = Half of Baud count */
+ econ.B.C = (diffB > 0) ? diffB : 0;
+ econ.B.B = (diffB > 0) ? maxB : halfBaud;
+
+ econ.B.CPH = (chConfig->mode.shiftClock == SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge) ? 1 : 0;
+ econ.B.CPOL = (chConfig->mode.clockPolarity == SpiIf_ClockPolarity_idleLow) ? 0 : 1;
+ econ.B.PAREN = chConfig->mode.parityCheck;
+
+ return econ.U;
+}
+
+
+uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate)
+{
+ float error, bestError;
+ float halfBaud = baudrate / 2;
+ float fQspiIn = IfxQspi_getModuleFrequency(qspi);
+ bestError = 10e6;
+ uint32 i, bestPre = 0;
+
+ for (i = 0; i < 8; i++)
+ {
+ float tempHalfBaud = fQspiIn / (1U << (4 * i));
+ error = __absf(tempHalfBaud - halfBaud);
+
+ if (__leqf(error, bestError))
+ {
+ bestError = error;
+ bestPre = i;
+ }
+ }
+
+ return bestPre;
+}
+
+
+uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate)
+{
+#define ABCQMIN (4)
+#define ABCQMAX (8 * 63)
+
+ IFX_UNUSED_PARAMETER(qspi);
+
+ uint32 abcq = ABCQMIN, tq, bestTq;
+ float realTQ, deltaMax, bestDelta, achievedMax;
+ float fQspi = IfxScuCcu_getMaxFrequency();
+
+ if (__leqf(maxBaudrate, 0.0))
+ {
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE); /* Max baud rate is 0!! */
+ }
+
+ realTQ = fQspi / (4.0 * maxBaudrate);
+ bestTq = __max((uint32)__roundf(realTQ), 1);
+ bestDelta = __absf(maxBaudrate - (fQspi / bestTq));
+
+ for (abcq = ABCQMIN; abcq <= ABCQMAX; abcq++)
+ {
+ realTQ = fQspi / (maxBaudrate * abcq);
+ tq = (uint32)(realTQ + 0.5);
+ achievedMax = fQspi / (tq * abcq);
+ deltaMax = __absf(maxBaudrate - achievedMax);
+
+ if (__leqf(deltaMax, bestDelta) && (tq >= 1))
+ {
+ bestDelta = deltaMax;
+ bestTq = tq;
+ }
+
+ if ((bestDelta == 0) || (tq < 1))
+ {
+ break; //exit the for loop
+ }
+ }
+
+ return __max(bestTq - 1, 0);
+}
+
+
+Ifx_QSPI *IfxQspi_getAddress(IfxQspi_Index qspi)
+{
+ Ifx_QSPI *module;
+
+ if (qspi < IFXQSPI_NUM_MODULES)
+ {
+ module = (Ifx_QSPI *)IfxQspi_cfg_indexMap[qspi].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
+
+
+IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi)
+{
+ uint32 index;
+ IfxQspi_Index result;
+
+ result = IfxQspi_Index_none;
+
+ for (index = 0; index < IFXQSPI_NUM_MODULES; index++)
+ {
+ if (IfxQspi_cfg_indexMap[index].module == qspi)
+ {
+ result = (IfxQspi_Index)IfxQspi_cfg_indexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count)
+{
+ volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
+
+ while (count > 0)
+ {
+ *(data++) = (uint16)rxFifo->U;
+ count--;
+ }
+}
+
+
+void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count)
+{
+ volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
+
+ while (count > 0)
+ {
+ *(data++) = rxFifo->U;
+ count--;
+ }
+}
+
+
+void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count)
+{
+ volatile Ifx_QSPI_RXEXIT *rxFifo = &qspi->RXEXIT;
+
+ while (count > 0)
+ {
+ *(data++) = (uint8)rxFifo->U;
+ count--;
+ }
+}
+
+
+uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData)
+{
+ Ifx_QSPI_BACON bacon;
+ bacon.U = oldBACON;
+
+ if (shortData == FALSE)
+ {
+ bacon.B.DL = numOfData;
+ bacon.B.BYTE = 1;
+ }
+
+ bacon.B.LAST = lastData;
+ return bacon.U;
+}
+
+
+void IfxQspi_resetModule(Ifx_QSPI *qspi)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ qspi->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ qspi->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == qspi->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ qspi->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel)
+{
+ uint16 mask = 1 << channelId;
+
+ Ifx_QSPI_SSOC ssoc;
+ ssoc.U = qspi->SSOC.U;
+
+ if (outputEnable)
+ {
+ ssoc.B.OEN |= mask;
+ }
+ else
+ {
+ ssoc.B.OEN &= ~mask;
+ }
+
+ if (activeLevel)
+ {
+ ssoc.B.AOL |= mask;
+ }
+ else
+ {
+ ssoc.B.AOL &= ~mask;
+ }
+
+ qspi->SSOC.U = ssoc.U;
+}
+
+
+void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count)
+{
+ int cs = channelId % 8;
+ volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
+
+ while (count > 0)
+ {
+ dataEntry->U = *(data++);
+ count--;
+ }
+}
+
+
+void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count)
+{
+ int cs = channelId % 8;
+ volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
+
+ while (count > 0)
+ {
+ dataEntry->U = *(data++);
+ count--;
+ }
+}
+
+
+void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count)
+{
+ int cs = channelId % 8;
+ volatile Ifx_QSPI_DATAENTRY *dataEntry = &qspi->DATAENTRY[cs];
+
+ while (count > 0)
+ {
+ dataEntry->U = *(data++);
+ count--;
+ }
+}
+
+
+void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst)
+{
+ uint32 divFactor;
+ const SpiIf_SlsoTiming_HalfTsclk *dlyFactorPtr;
+ float32 scaleTemp;
+ uint8 preTemp;
+ uint8 preFinal = 0U;
+ uint8 delayTemp;
+ uint8 delayFinal = 0U;
+ boolean matchFound;
+ uint8 index;
+ uint8 cs = channelId % 8;
+
+ /* obtain the peripheral frequency / sclk frequency multiplication factor */
+ divFactor = (qspi->GLOBALCON.B.TQ + 1) * (qspi->ECON[cs].B.Q + 1) * (qspi->ECON[cs].B.A + 1 + qspi->ECON[cs].B.B + qspi->ECON[cs].B.C);
+
+ /* The user defined delay factor is here - point to it */
+ dlyFactorPtr = &(chMode->csInactiveDelay);
+
+ for (index = 0; index < 3; index++)
+ {
+ /* multiply the div_factor and delay_factor and divide by 2 - this is product of (4^pre)*(delay_mult) */
+ scaleTemp = (dlyFactorPtr[index] * divFactor) / (float32)2.0;
+
+ /* loop through the possible pre values to find pre and delay */
+ matchFound = FALSE;
+
+ for (preTemp = 0; preTemp < 8; preTemp++)
+ {
+ delayTemp = (uint8)((scaleTemp / (1 << (2 * preTemp))) + 0.5); /* divide the scale_temp by ( 4 ^ pre_temp) to find delay_temp */
+
+ if (delayTemp <= 8) /* if delay_temp is <= 8; we can get a good value pair */
+ {
+ if ((float32)(delayTemp << (2 * preTemp)) >= scaleTemp) /* greater delays are tolerated. less is not */
+ {
+ delayFinal = __max(delayTemp - 1, 0); /* subtract 1 to set to register */
+ preFinal = preTemp;
+ matchFound = TRUE;
+ break;
+ }
+ else if (delayTemp < (uint8)8) /* delay is less than 8 - add 1 and finalize parameters */
+ {
+ delayTemp += 1;
+ delayFinal = __max(delayTemp - 1, 0); /* subtract 1 to set to register */
+ preFinal = preTemp;
+ matchFound = TRUE;
+ break;
+ }
+ else
+ {
+ /* do nothing - proceed to next pre_temp value */
+ }
+ }
+ }
+
+ if (matchFound == FALSE)
+ {
+ /* max limit reached. set max values for pre and delay and exit */
+ delayFinal = 7;
+ preFinal = 7;
+ }
+
+ /* write back to delay const structure before looping to next factor */
+ delayConst[index].delay = delayFinal;
+ delayConst[index].pre = preFinal;
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/Std/IfxQspi.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/Std/IfxQspi.h
new file mode 100644
index 0000000..e7afd62
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/Std/IfxQspi.h
@@ -0,0 +1,1305 @@
+/**
+ * \file IfxQspi.h
+ * \brief QSPI basic functionality
+ * \ingroup IfxLld_Qspi
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Qspi_Std_Enum Enumerations
+ * \ingroup IfxLld_Qspi_Std
+ * \defgroup IfxLld_Qspi_Std_Operative Operative Functions
+ * \ingroup IfxLld_Qspi_Std
+ * \defgroup IfxLld_Qspi_Std_Support Support Functions
+ * \ingroup IfxLld_Qspi_Std
+ * \defgroup IfxLld_Qspi_Std_Interrupt Interrupt Functions
+ * \ingroup IfxLld_Qspi_Std
+ * \defgroup IfxLld_Qspi_Std_IO IO Pin Configuration Functions
+ * \ingroup IfxLld_Qspi_Std
+ */
+
+#ifndef IFXQSPI_H
+#define IFXQSPI_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxQspi_cfg.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "If/SpiIf.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "Src/Std/IfxSrc.h"
+#include "_PinMap/IfxQspi_PinMap.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Get Fifo size required for Long / Long continous mode interms 32-bit
+ * LONG MODE FIFO size (data size in bytes) = (size for Bacon) + (Datasize converted to 32-bit)
+ */
+#define IFXQSPI_BACONSIZE(Datasize) (((((Datasize) % 16) == 0) ? ((uint8)((Datasize) / 16)) : ((uint8)((Datasize) / 16) + 1)))
+
+#define IFXQSPI_FIFO32BITSIZE(Datasize) ((((Datasize) % 4) == 0) ? ((uint8)((Datasize) / 4)) : ((uint8)((Datasize) / 4) + 1))
+
+#define IFXQSPI_GETLONGMODEFIFOSIZE(Datasize) (IFXQSPI_BACONSIZE(Datasize) + IFXQSPI_FIFO32BITSIZE(Datasize))
+
+/** \brief Errors enable mask for ERRORENS
+ */
+#define IFXQSPI_ERRORENABLEMASK ((uint32)0x1FF)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Qspi_Std_Enum
+ * \{ */
+/** \brief QSPI channel Number (BACON.CS)
+ */
+typedef enum
+{
+ IfxQspi_ChannelId_0, /**< \brief Channel #0 */
+ IfxQspi_ChannelId_1, /**< \brief Channel #1 */
+ IfxQspi_ChannelId_2, /**< \brief Channel #2 */
+ IfxQspi_ChannelId_3, /**< \brief Channel #3 */
+ IfxQspi_ChannelId_4, /**< \brief Channel #4 */
+ IfxQspi_ChannelId_5, /**< \brief Channel #5 */
+ IfxQspi_ChannelId_6, /**< \brief Channel #6 */
+ IfxQspi_ChannelId_7, /**< \brief Channel #7 */
+ IfxQspi_ChannelId_8, /**< \brief Channel #8 */
+ IfxQspi_ChannelId_9, /**< \brief Channel #9 */
+ IfxQspi_ChannelId_10, /**< \brief Channel #10 */
+ IfxQspi_ChannelId_11, /**< \brief Channel #11 */
+ IfxQspi_ChannelId_12, /**< \brief Channel #12 */
+ IfxQspi_ChannelId_13, /**< \brief Channel #13 */
+ IfxQspi_ChannelId_14 /**< \brief Channel #14 */
+} IfxQspi_ChannelId;
+
+/** \brief Data length unit of a frame (BACON.BYTE)
+ */
+typedef enum
+{
+ IfxQspi_DataLengthUnit_bit = 0, /**< \brief Data Length in Bits */
+ IfxQspi_DataLengthUnit_byte = 1 /**< \brief Data length in Bytes */
+} IfxQspi_DataLengthUnit;
+
+/** \brief QSPI Error Flags (STATUS.ERRORFLAGS)
+ */
+typedef enum
+{
+ IfxQspi_Error_none = 0, /**< \brief No Error */
+ IfxQspi_Error_parity = 1, /**< \brief Parity Error */
+ IfxQspi_Error_configuration = 2, /**< \brief Configuration Error */
+ IfxQspi_Error_baudrate = 4, /**< \brief BaudRate Error */
+ IfxQspi_Error_txfifoOverflow = 8, /**< \brief TX FIFO Overflow Error */
+ IfxQspi_Error_txfifoUnderflow = 16, /**< \brief TX FIFO Underflow Error */
+ IfxQspi_Error_rxfifoOverflow = 32, /**< \brief RX FIFO Overflow Error */
+ IfxQspi_Error_rxfifoUnderflow = 64, /**< \brief RX FIFO Underflow Error */
+ IfxQspi_Error_expectTimeout = 128, /**< \brief EXPECT Timeout Error */
+ IfxQspi_Error_slsiMisplacedInactivation = 256 /**< \brief SLSI misplaced inactivation (slave mode) */
+} IfxQspi_Error;
+
+/** \brief Frame Expect phase time out value
+ */
+typedef enum
+{
+ IfxQspi_ExpectTimeout_64 = 0, /**< \brief Expect phse time out 64 */
+ IfxQspi_ExpectTimeout_128 = 1, /**< \brief Expect phse time out 128 */
+ IfxQspi_ExpectTimeout_256 = 2, /**< \brief Expect phse time out 256 */
+ IfxQspi_ExpectTimeout_512 = 3, /**< \brief Expect phse time out 512 */
+ IfxQspi_ExpectTimeout_1024 = 4, /**< \brief Expect phse time out 1024 */
+ IfxQspi_ExpectTimeout_2048 = 5, /**< \brief Expect phse time out 2048 */
+ IfxQspi_ExpectTimeout_4096 = 6, /**< \brief Expect phse time out 4096 */
+ IfxQspi_ExpectTimeout_8192 = 7, /**< \brief Expect phse time out 8192 */
+ IfxQspi_ExpectTimeout_16384 = 8, /**< \brief Expect phse time out 16384 */
+ IfxQspi_ExpectTimeout_32768 = 9, /**< \brief Expect phse time out 32768 */
+ IfxQspi_ExpectTimeout_65536 = 10, /**< \brief Expect phse time out 65536 */
+ IfxQspi_ExpectTimeout_131072 = 11, /**< \brief Expect phse time out 131072 */
+ IfxQspi_ExpectTimeout_262144 = 12, /**< \brief Expect phse time out 262144 */
+ IfxQspi_ExpectTimeout_524288 = 13, /**< \brief Expect phse time out 524288 */
+ IfxQspi_ExpectTimeout_1048576 = 14, /**< \brief Expect phse time out 1048576 */
+ IfxQspi_ExpectTimeout_2097152 = 15 /**< \brief Expect phse time out 2097152 */
+} IfxQspi_ExpectTimeout;
+
+/** \brief QSPI controller mode (GLOBALCON.MODE)
+ */
+typedef enum
+{
+ IfxQspi_Mode_master = 0, /**< \brief QSPI in "master" mode */
+ IfxQspi_Mode_pwmOverQspi = 1, /**< \brief QSPI in "PWM over QSPI" mode */
+ IfxQspi_Mode_slave = 2 /**< \brief QSPI in "slave" mode */
+} IfxQspi_Mode;
+
+/** \brief Request between pause and Run transition
+ */
+typedef enum
+{
+ IfxQspi_PauseRunTransition_pause = 0, /**< \brief Request value for pause */
+ IfxQspi_PauseRunTransition_run = 1 /**< \brief Request value for Run */
+} IfxQspi_PauseRunTransition;
+
+/** \brief QSPI frame phase (STATUS.PHASE)
+ */
+typedef enum
+{
+ IfxQspi_Phase_wait = 0, /**< \brief Frame wait phase */
+ IfxQspi_Phase_idleA = 1, /**< \brief Frame idleA phase */
+ IfxQspi_Phase_idleB = 2, /**< \brief frame idleB phase */
+ IfxQspi_Phase_lead = 3, /**< \brief Frame lead phase */
+ IfxQspi_Phase_data = 4, /**< \brief Frame data phase */
+ IfxQspi_Phase_trail = 5, /**< \brief Frame trail phase */
+ IfxQspi_Phase_expect = 6, /**< \brief Frame expect phase */
+ IfxQspi_Phase_leadStrobe = 7, /**< \brief Frame leadstrobe phase */
+ IfxQspi_Phase_trailStrobe = 8 /**< \brief Frame trailstrobe phase */
+} IfxQspi_Phase;
+
+/** \brief Phase Transition Event
+ */
+typedef enum
+{
+ IfxQspi_PhaseTransitionEvent_endOfWait = 0, /**< \brief BUSY (end of WAIT phase) */
+ IfxQspi_PhaseTransitionEvent_serialClockPolarityChange = 1, /**< \brief SCLKPC (serial clock polarity change) */
+ IfxQspi_PhaseTransitionEvent_startOfFrame = 2, /**< \brief SOF (Start Of Frame ) */
+ IfxQspi_PhaseTransitionEvent_transmitBufferEmptied = 3, /**< \brief TBE (Transmit Buffer Emptied) */
+ IfxQspi_PhaseTransitionEvent_receiveBufferFilled = 4, /**< \brief RBF (Receive Buffer Filled) */
+ IfxQspi_PhaseTransitionEvent_endOfFrame = 5, /**< \brief EOF (End of Frame) */
+ IfxQspi_PhaseTransitionEvent_dataNotAvailable = 6, /**< \brief DNA (Data not Available = Start of Expect) */
+ IfxQspi_PhaseTransitionEvent_endOfExpect = 7 /**< \brief CONT (End of EXPECT phase) */
+} IfxQspi_PhaseTransitionEvent;
+
+/** \brief Reset Request (GLOBALCON.RESETS)
+ */
+typedef enum
+{
+ IfxQspi_Reset_none = 0, /**< \brief No Reset */
+ IfxQspi_Reset_stateMachineAndFifo = 7, /**< \brief State Machine, TXFIFO and RXFIFO reset, registers not reseted */
+ IfxQspi_Reset_kernel = 15 /**< \brief Kernel / Module Reset */
+} IfxQspi_Reset;
+
+/** \brief Receive Fifo Interrupt Threshold
+ */
+typedef enum
+{
+ IfxQspi_RxFifoInt_0, /**< \brief RxFifo Interrupt Threshold #0 */
+ IfxQspi_RxFifoInt_1, /**< \brief RxFifo Interrupt Threshold #1 */
+ IfxQspi_RxFifoInt_2, /**< \brief RxFifo Interrupt Threshold #2 */
+ IfxQspi_RxFifoInt_3 /**< \brief RxFifo Interrupt Threshold #3 */
+} IfxQspi_RxFifoInt;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_QSPI.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxQspi_SleepMode_enable = 0, /**< \brief Sleep Mode enabled */
+ IfxQspi_SleepMode_disable = 1 /**< \brief Sleep Mode disabled */
+} IfxQspi_SleepMode;
+
+/** \brief STROBE delay for SLSO in delayed mode (GLOBALCON.STROBE)
+ */
+typedef enum
+{
+ IfxQspi_StrobeDelay_1, /**< \brief SLSO delay 1 cycle(s) */
+ IfxQspi_StrobeDelay_2, /**< \brief SLSO delay 2 cycle(s) */
+ IfxQspi_StrobeDelay_3, /**< \brief SLSO delay 3 cycle(s) */
+ IfxQspi_StrobeDelay_4, /**< \brief SLSO delay 4 cycle(s) */
+ IfxQspi_StrobeDelay_5, /**< \brief SLSO delay 5 cycle(s) */
+ IfxQspi_StrobeDelay_6, /**< \brief SLSO delay 6 cycle(s) */
+ IfxQspi_StrobeDelay_7, /**< \brief SLSO delay 7 cycle(s) */
+ IfxQspi_StrobeDelay_8, /**< \brief SLSO delay 8 cycle(s) */
+ IfxQspi_StrobeDelay_9, /**< \brief SLSO delay 9 cycle(s) */
+ IfxQspi_StrobeDelay_10, /**< \brief SLSO delay 10 cycle(s) */
+ IfxQspi_StrobeDelay_11, /**< \brief SLSO delay 11 cycle(s) */
+ IfxQspi_StrobeDelay_12, /**< \brief SLSO delay 12 cycle(s) */
+ IfxQspi_StrobeDelay_13, /**< \brief SLSO delay 13 cycle(s) */
+ IfxQspi_StrobeDelay_14, /**< \brief SLSO delay 14 cycle(s) */
+ IfxQspi_StrobeDelay_15, /**< \brief SLSO delay 15 cycle(s) */
+ IfxQspi_StrobeDelay_16, /**< \brief SLSO delay 16 cycle(s) */
+ IfxQspi_StrobeDelay_17, /**< \brief SLSO delay 17 cycle(s) */
+ IfxQspi_StrobeDelay_18, /**< \brief SLSO delay 18 cycle(s) */
+ IfxQspi_StrobeDelay_19, /**< \brief SLSO delay 19 cycle(s) */
+ IfxQspi_StrobeDelay_20, /**< \brief SLSO delay 20 cycle(s) */
+ IfxQspi_StrobeDelay_21, /**< \brief SLSO delay 21 cycle(s) */
+ IfxQspi_StrobeDelay_22, /**< \brief SLSO delay 22 cycle(s) */
+ IfxQspi_StrobeDelay_23, /**< \brief SLSO delay 23 cycle(s) */
+ IfxQspi_StrobeDelay_24, /**< \brief SLSO delay 24 cycle(s) */
+ IfxQspi_StrobeDelay_25, /**< \brief SLSO delay 25 cycle(s) */
+ IfxQspi_StrobeDelay_26, /**< \brief SLSO delay 26 cycle(s) */
+ IfxQspi_StrobeDelay_27, /**< \brief SLSO delay 27 cycle(s) */
+ IfxQspi_StrobeDelay_28, /**< \brief SLSO delay 28 cycle(s) */
+ IfxQspi_StrobeDelay_29, /**< \brief SLSO delay 29 cycle(s) */
+ IfxQspi_StrobeDelay_30, /**< \brief SLSO delay 30 cycle(s) */
+ IfxQspi_StrobeDelay_31, /**< \brief SLSO delay 31 cycle(s) */
+ IfxQspi_StrobeDelay_32 /**< \brief SLSO delay 32 cycle(s) */
+} IfxQspi_StrobeDelay;
+
+/** \brief Transmit Fifo Interrupt Threshold
+ */
+typedef enum
+{
+ IfxQspi_TxFifoInt_1, /**< \brief TxFifo Interrupt Threshold #1 */
+ IfxQspi_TxFifoInt_2, /**< \brief TxFifo Interrupt Threshold #2 */
+ IfxQspi_TxFifoInt_3, /**< \brief TxFifo Interrupt Threshold #3 */
+ IfxQspi_TxFifoInt_4 /**< \brief TxFifo Interrupt Threshold #4 */
+} IfxQspi_TxFifoInt;
+
+/** \} */
+
+/** \brief Transmit FIFO mode.
+ */
+typedef enum
+{
+ IfxQspi_FifoMode_combinedMove = 0, /**< \brief Combined Move Mode */
+ IfxQspi_FifoMode_singleMove = 1, /**< \brief Single Move Mode */
+ IfxQspi_FifoMode_batchMove = 2 /**< \brief Batch Move Mode */
+} IfxQspi_FifoMode;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxQspi_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxQspi_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxQspi_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxQspi_SuspendMode;
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \brief Structure holding the "pre" and "delay" values.
+ * To be populated into BACON register after delay calculation.
+ */
+typedef struct
+{
+ uint8 pre; /**< \brief specifies the prescalar value */
+ uint8 delay; /**< \brief delay multiplier */
+} IfxQspi_DelayConst;
+
+/** \addtogroup IfxLld_Qspi_Std_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear ALL service requests
+ * \param qspi Pointer to QSPI module registers
+ * \return None
+ */
+IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi);
+
+/** \brief Clear RX service requests
+ * \param qspi Pointer to QSPI module registers
+ * \return None
+ */
+IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi);
+
+/** \brief Clear TX service requests
+ * \param qspi Pointer to QSPI module registers
+ * \return None
+ */
+IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi);
+
+/** \brief Configure PT1 event (also USR event depending if USREN=1 )
+ * \param qspi Pointer to QSPI module registers
+ * \param pt1Config Phase Transition1 Event Config
+ * \return None
+ */
+IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config);
+
+/** \brief Configure PT2 event
+ * \param qspi Pointer to QSPI module registers
+ * \param pt2Config Phase Transition2 Event Config
+ * \return None
+ */
+IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config);
+
+/** \brief Enable/Disable Loopback mode.
+ * \param qspi Pointer to QSPI module registers
+ * \param enable Enable / Disable loopback
+ * \return None
+ */
+IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable);
+
+/** \brief enable Phase Transition1 Event
+ * \param qspi Pointer to QSPI module registers
+ * \param enable Enable (1) / Disable (0)
+ * \return None
+ */
+IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable);
+
+/** \brief enable Phase Transition2 Event
+ * \param qspi Pointer to QSPI module registers
+ * \param enable Enable (1) / Disable (0)
+ * \return None
+ */
+IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable);
+
+/** \brief enable User Event (Event selected by PT1)
+ * \param qspi Pointer to QSPI module registers
+ * \param enable Enable (1) / Disable (0)
+ * \return None
+ */
+IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable);
+
+/**
+ * \param qspi Pointer to QSPI module registers
+ * \return Error Flags
+ */
+IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi);
+
+/** \brief Request for Module in Pause state
+ * no interrupts
+ * no communication
+ * \param qspi Pointer to QSPI module registers
+ * \return None
+ */
+IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi);
+
+/** \brief Read the oldest data from RXFIFO
+ * \param qspi Pointer to QSPI module registers
+ */
+IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi);
+
+/** \brief Request reset (State Machine & FIFO / Register / Module)
+ * \param qspi Pointer to QSPI module registers
+ * \param reset reset type (GLOBALCON.RESETS)
+ * \return None
+ */
+IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset);
+
+/** \brief Request for QSPI in Run state
+ * \param qspi Pointer to QSPI module registers
+ * \return None
+ */
+IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi);
+
+/** \brief Set the threshold of RXFIFO for service request generation
+ * \param qspi Pointer to QSPI module registers
+ * \param rxFifoInt RxFIFO Interrupt threshold to set
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt);
+
+/** \brief Write Data into DATAENTRY register
+ * \param qspi Pointer to QSPI module registers
+ * \param data Data to be entered into TxFIFO
+ * \return None
+ */
+IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param qspi Pointer to QSPI module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param qspi Pointer to QSPI module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reads 16bit data from the Rx FIFO
+ * \param qspi Pointer to QSPI module registers
+ * \param data Received data will be copied into this array
+ * \param count Number of items to be received
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_read16(Ifx_QSPI *qspi, uint16 *data, Ifx_SizeT count);
+
+/** \brief Reads 32bit data from the Rx FIFO
+ * \param qspi Pointer to QSPI module registers
+ * \param data Received data will be copied into this array
+ * \param count Number of items to be received
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_read32(Ifx_QSPI *qspi, uint32 *data, Ifx_SizeT count);
+
+/** \brief Reads 8bit data from the Rx FIFO
+ * \param qspi Pointer to QSPI module registers
+ * \param data Received data will be copied into this array
+ * \param count Number of items to be received
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_read8(Ifx_QSPI *qspi, uint8 *data, Ifx_SizeT count);
+
+/** \brief resets QSPI kernel
+ * \param qspi pointer to QSPI registers
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_resetModule(Ifx_QSPI *qspi);
+
+/** \brief Writes 16bit data into the Tx FIFO
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param data Array of data to be sent
+ * \param count Number of items to be sent
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_write16(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint16 *data, Ifx_SizeT count);
+
+/** \brief Writes 32bit data into the Tx FIFO
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param data Array of data to be sent
+ * \param count Number of items to be sent
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_write32(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 *data, Ifx_SizeT count);
+
+/** \brief Writes 8bit data into the Tx FIFO
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param data Array of data to be sent
+ * \param count Number of items to be sent
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_write8(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 *data, Ifx_SizeT count);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_Std_Support
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the current mode of QSPI
+ * \param qspi Pointer to QSPI module registers
+ * \return The current mode
+ */
+IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi);
+
+/** \brief Specifies function to get module frequency
+ * \param qspi Pointer to QSPI module registers
+ * \return Module frequency in Float value
+ */
+IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi);
+
+/** \brief Gets actual transmission phase
+ * \param qspi Pointer to QSPI module registers
+ * \return Actual transmission phase
+ */
+IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi);
+
+/** \brief Gets the filling level of RXFIFO
+ * \param qspi Pointer to QSPI module registers
+ * \return RxFIFO level
+ */
+IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi);
+
+/** \brief Gets Time Quanta frequency
+ * \param qspi Pointer to QSPI module registers
+ * \return TQ frequency in float
+ */
+IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi);
+
+/** \brief Gets the filling level of TXFIFO
+ * \param qspi Pointer to QSPI module registers
+ * \return TxFIFO level
+ */
+IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi);
+
+/** \brief Specifies the Module enable or disable status
+ * \param qspi Pointer to QSPI module registers
+ * \return TRUE if module is enabled otherwise FALSE
+ */
+IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi);
+
+/** \brief Sets the disable module request
+ * \param qspi Pointer to QSPI module registers
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi);
+
+/** \brief Sets the enable module request
+ * \param qspi Pointer to QSPI module registers
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi);
+
+/** \brief Sets the disable module request
+ * \param qspi Pointer to QSPI module registers
+ * \param mode Sleep mode selection
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode);
+
+/** \brief Set the threshold of TXFIFO for service request generation
+ * \param qspi Pointer to QSPI module registers
+ * \param txFifoInt TxFifo Interrupt threshold to set
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt);
+
+/** \brief Write configuration into BACON register
+ * \param qspi Pointer to QSPI module registers
+ * \param baconVal baconVal Value to be entered in BACON register
+ * \return None
+ */
+IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal);
+
+/** \brief Write configuration into BACON register with .LAST flag set to 0
+ * \param qspi Pointer to QSPI module registers
+ * \param baconVal baconVal Value to be entered in BACON register
+ * \return None
+ */
+IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal);
+
+/** \brief Write configuration into BACON register with .LAST flag set to 1
+ * \param qspi Pointer to QSPI module registers
+ * \param baconVal baconVal Value to be entered in BACON register
+ * \return None
+ */
+IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal);
+
+/** \brief Writes channel timing configuration into ECON register
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param econVal Extended configuration value
+ * \return None
+ */
+IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal);
+
+/** \brief Writes Data and Configuration into MIXEDENTRY register
+ * \param qspi Pointer to QSPI module registers
+ * \param mixEntryVal Data and configuration in mixed
+ * \return None
+ */
+IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Function to calculate baudrate of specified channel
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId QSPI channel number
+ * \return Actual baudrate in float
+ */
+IFX_EXTERN float IfxQspi_calcRealBaudrate(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId);
+
+/** \brief Function to calculate BACON register values
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId QSPI Channel Number
+ * \param chMode Frame configuration
+ * \param baudrate The desired baudrate
+ * \return Calculated BACON value
+ */
+IFX_EXTERN uint32 IfxQspi_calculateBasicConfigurationValue(Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, const float baudrate);
+
+/** \brief Function to calculate ECON register values
+ * \param qspi Pointer to QSPI module registers
+ * \param cs QSPI channel Number : 8->0,9->1,.......
+ * \param chConfig SPI Channel Configuration
+ * \return Calculated ECON[CS] value
+ */
+IFX_EXTERN uint32 IfxQspi_calculateExtendedConfigurationValue(Ifx_QSPI *qspi, const uint8 cs, const SpiIf_ChConfig *chConfig);
+
+/** \brief Function to calculate prescaler
+ * \param qspi Pointer to QSPI module registers
+ * \param baudrate Maximum baudrate in Float
+ * \return Prescaler in integer
+ */
+IFX_EXTERN uint32 IfxQspi_calculatePrescaler(Ifx_QSPI *qspi, float baudrate);
+
+/** \brief Specifies the function to calculate Time quantum length
+ * \param qspi Pointer to QSPI module registers
+ * \param maxBaudrate Maximum baudrate in Float
+ * \return Time quantum length in integer
+ */
+IFX_EXTERN uint32 IfxQspi_calculateTimeQuantumLength(Ifx_QSPI *qspi, float maxBaudrate);
+
+/** \brief
+ * \param qspi Pointer to QSPI module registers
+ * \return QSPI module register address
+ */
+IFX_EXTERN Ifx_QSPI *IfxQspi_getAddress(IfxQspi_Index qspi);
+
+/** \brief Specifies the function to get Index
+ * \param qspi Pointer to QSPI module registers
+ * \return Index in Integer
+ */
+IFX_EXTERN IfxQspi_Index IfxQspi_getIndex(Ifx_QSPI *qspi);
+
+/** \brief Re-calculated BACON from the oldBACON
+ * \param oldBACON Old BACON value
+ * \param numOfData numOfData in LONG or CONTINUOUS mode
+ * \param shortData Specifies SHORT mode (TRUE) or other modes (FALSE)
+ * \param lastData Specifies last data in LONG or CONTINUOUS
+ * \return Re-calculated BACON
+ */
+IFX_EXTERN uint32 IfxQspi_recalcBasicConfiguration(uint32 oldBACON, Ifx_SizeT numOfData, boolean shortData, boolean lastData);
+
+/** \brief Configures a Slave Select Output
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param outputEnable chip select output will be enabled during transaction
+ * \param activeLevel TRUE: active-high, FALSE: active-low
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_setSlaveSelectOutputControl(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, boolean outputEnable, boolean activeLevel);
+
+/** \brief Calculates the Delay constants (pre and delay) from the user specified CS delays.
+ * \param qspi pointer to QSPI SFR
+ * \param channelId Channel ID no.
+ * \param chMode Pointer to Channel Mode
+ * \param delayConst Pointer to the Delay Consant Array
+ * \return None
+ */
+IFX_EXTERN void IfxQspi_calculateDelayConstants(const Ifx_QSPI *qspi, const IfxQspi_ChannelId channelId, const SpiIf_ChMode *chMode, IfxQspi_DelayConst *delayConst);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_Std_Interrupt
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the Error request value
+ * \param qspi Pointer to QSPI module registers
+ * \return Error request value
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getErrorSrc(Ifx_QSPI *qspi);
+
+/** \brief Gets the RXFIFO service request
+ * \param qspi Pointer to QSPI module registers
+ * \return Receive service request value
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getReceiveSrc(Ifx_QSPI *qspi);
+
+/** \brief Gets the TXFIFO service request
+ * \param qspi Pointer to QSPI module registers
+ * \return Transmission service request value
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getTransmitSrc(Ifx_QSPI *qspi);
+
+/** \} */
+
+/** \addtogroup IfxLld_Qspi_Std_IO
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes a MRST input
+ * \param mrstIn the MRST Pin which should be configured
+ * \param mrstInMode the pin input mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode);
+
+/** \brief Initializes a MRST output
+ * \param mrstOut the MRST Pin which should be configured
+ * \param mrstOutMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a MTSR input
+ * \param mtsrIn the MTSR Pin which should be configured
+ * \param mtsrInMode the pin input mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode);
+
+/** \brief Initializes a MTSR output
+ * \param mtsrOut the MTSR Pin which should be configured
+ * \param mtsrOutMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a SCLK input
+ * \param sclkIn the SCLK Pin which should be configured
+ * \param sclkInMode the pin input mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode);
+
+/** \brief Initializes a SCLK output
+ * \param sclkOut the SCLK Pin which should be configured
+ * \param sclkOutMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a SLSI input
+ * \param slsi the SLSI Pin which should be configured
+ * \param slsiMode the pin input mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode);
+
+/** \brief Initializes a SLSO output
+ * \param slso the SLSO Pin which should be configured
+ * \param slsoMode the pin output mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \param outIndex Pin Pad driver index
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the Receive FIFO mode
+ * \param qspi Pointer to QSPI module registers
+ * \return Receive FIFO mode
+ */
+IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi);
+
+/** \brief Get the Transfer FIFO mode
+ * \param qspi Pointer to QSPI module registers
+ * \return Transfer FIFO mode
+ */
+IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi);
+
+/** \brief Permutate bytes to / from Big Endian
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param bigEndian specifies to Permutate bytes to / from Big Endian
+ * \return None
+ */
+IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian);
+
+/** \brief Set the value of bit segment1 (A).
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param bitSegment1 Length expressed in time quantums of ECONz.Q.
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1);
+
+/** \brief Set the value of bit segment2 (B).
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param bitSegment2 Length expressed in time quantums of ECONz.Q.
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2);
+
+/** \brief Set the value of bit segment3 (C).
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param bitSegment3 Length expressed in time quantums of ECONz.Q.
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3);
+
+/**
+ * \param qspi Pointer to QSPI module registers
+ * \param mode select the transfer fifo mode
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode);
+
+/** \brief Set the value of Time Quantum.
+ * \param qspi Pointer to QSPI module registers
+ * \param channelId Channel number to which econ val belongs
+ * \param timeQuantum specifies the value of Time Quantum.
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum);
+
+/** \brief Set the transfer FIFO mode
+ * \param qspi Pointer to QSPI module registers
+ * \param mode select the transfer fifo mode
+ * \return None
+ */
+IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode);
+
+/** \brief Provides functionality for both setting of MRSTIN pin direction as input and configuring pad driver
+ * \param mrstIn the MRST Pin which should be configured
+ * \param mrstInMode the pin input mode which should be configured
+ * \param padDriver Pad Driver
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver);
+
+/** \brief Provides functionality for both setting of MTSRIN pin direction as input and configuring pad driver
+ * \param mtsrIn the MTSR Pin which should be configured
+ * \param mtsrInMode the pin input mode which should be configured
+ * \param padDriver Pad Driver
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver);
+
+/** \brief Provides functionality for both setting of SCLKIN pin direction as input and configuring pad driver
+ * \param sclkIn the SCLK Pin which should be configured
+ * \param sclkInMode the pin input mode which should be configured
+ * \param padDriver Pad Driver
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver);
+
+/** \brief Provides functionality for both setting of SLSI pin direction as input and configuring pad driver
+ * \param slsi the SLSI Pin which should be configured
+ * \param slsiMode the pin input mode which should be configured
+ * \param padDriver Pad Driver
+ * \return None
+ */
+IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxQspi_clearAllEventFlags(Ifx_QSPI *qspi)
+{
+ qspi->FLAGSCLEAR.U = 0xFFFFU;
+}
+
+
+IFX_INLINE void IfxQspi_clearRxReq(Ifx_QSPI *qspi)
+{
+ qspi->FLAGSCLEAR.B.RXC = 1U;
+}
+
+
+IFX_INLINE void IfxQspi_clearTxReq(Ifx_QSPI *qspi)
+{
+ qspi->FLAGSCLEAR.B.TXC = 1U;
+}
+
+
+IFX_INLINE void IfxQspi_configPT1Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt1Config)
+{
+ qspi->GLOBALCON1.B.PT1 = pt1Config;
+}
+
+
+IFX_INLINE void IfxQspi_configPT2Event(Ifx_QSPI *qspi, IfxQspi_PhaseTransitionEvent pt2Config)
+{
+ qspi->GLOBALCON1.B.PT2 = pt2Config;
+}
+
+
+IFX_INLINE void IfxQspi_enableLoopbackMode(Ifx_QSPI *qspi, boolean enable)
+{
+ IFX_UNUSED_PARAMETER(enable);
+
+ qspi->GLOBALCON.B.LB = 1;
+}
+
+
+IFX_INLINE void IfxQspi_enablePT1Event(Ifx_QSPI *qspi, boolean enable)
+{
+ qspi->GLOBALCON1.B.PT1EN = enable;
+}
+
+
+IFX_INLINE void IfxQspi_enablePT2Event(Ifx_QSPI *qspi, boolean enable)
+{
+ qspi->GLOBALCON1.B.PT2EN = enable;
+}
+
+
+IFX_INLINE void IfxQspi_enableUsrEvent(Ifx_QSPI *qspi, boolean enable)
+{
+ qspi->GLOBALCON1.B.USREN = enable;
+}
+
+
+IFX_INLINE uint16 IfxQspi_getErrorFlags(Ifx_QSPI *qspi)
+{
+ return qspi->STATUS.B.ERRORFLAGS;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getErrorSrc(Ifx_QSPI *qspi)
+{
+ uint32 index = IfxQspi_getIndex(qspi);
+ return &MODULE_SRC.QSPI.QSPI[index].ERR;
+}
+
+
+IFX_INLINE IfxQspi_Mode IfxQspi_getMode(Ifx_QSPI *qspi)
+{
+ return (IfxQspi_Mode)qspi->GLOBALCON.B.MS;
+}
+
+
+IFX_INLINE float IfxQspi_getModuleFrequency(Ifx_QSPI *qspi)
+{
+ IFX_UNUSED_PARAMETER(qspi->CLC.U != 0);
+
+ return IfxScuCcu_getMaxFrequency();
+}
+
+
+IFX_INLINE IfxQspi_Phase IfxQspi_getPhase(Ifx_QSPI *qspi)
+{
+ return (IfxQspi_Phase)qspi->STATUS.B.PHASE;
+}
+
+
+IFX_INLINE uint8 IfxQspi_getReceiveFifoLevel(Ifx_QSPI *qspi)
+{
+ return qspi->STATUS.B.RXFIFOLEVEL;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getReceiveSrc(Ifx_QSPI *qspi)
+{
+ uint32 index = IfxQspi_getIndex(qspi);
+ return &MODULE_SRC.QSPI.QSPI[index].RX;
+}
+
+
+IFX_INLINE IfxQspi_FifoMode IfxQspi_getRxFifoMode(Ifx_QSPI *qspi)
+{
+ return (IfxQspi_FifoMode)qspi->GLOBALCON1.B.RXFM;
+}
+
+
+IFX_INLINE float IfxQspi_getTimeQuantaFrequency(Ifx_QSPI *qspi)
+{
+ return IfxQspi_getModuleFrequency(qspi) / (qspi->GLOBALCON.B.TQ + 1);
+}
+
+
+IFX_INLINE uint8 IfxQspi_getTransmitFifoLevel(Ifx_QSPI *qspi)
+{
+ return qspi->STATUS.B.TXFIFOLEVEL;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxQspi_getTransmitSrc(Ifx_QSPI *qspi)
+{
+ uint32 index = IfxQspi_getIndex(qspi);
+ return &MODULE_SRC.QSPI.QSPI[index].TX;
+}
+
+
+IFX_INLINE IfxQspi_FifoMode IfxQspi_getTxFifoMode(Ifx_QSPI *qspi)
+{
+ return (IfxQspi_FifoMode)qspi->GLOBALCON1.B.TXFM;
+}
+
+
+IFX_INLINE void IfxQspi_initMrstInPin(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode)
+{
+ IfxPort_setPinModeInput(mrstIn->pin.port, mrstIn->pin.pinIndex, mrstInMode);
+ mrstIn->module->PISEL.B.MRIS = mrstIn->select;
+}
+
+
+IFX_INLINE void IfxQspi_initMrstOutPin(const IfxQspi_Mrst_Out *mrstOut, IfxPort_OutputMode mrstOutMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(mrstOut->pin.port, mrstOut->pin.pinIndex, mrstOutMode, mrstOut->select);
+ IfxPort_setPinPadDriver(mrstOut->pin.port, mrstOut->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE void IfxQspi_initMtsrInPin(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode)
+{
+ IfxPort_setPinModeInput(mtsrIn->pin.port, mtsrIn->pin.pinIndex, mtsrInMode);
+ mtsrIn->module->PISEL.B.SRIS = mtsrIn->select;
+}
+
+
+IFX_INLINE void IfxQspi_initMtsrOutPin(const IfxQspi_Mtsr_Out *mtsrOut, IfxPort_OutputMode mtsrOutMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(mtsrOut->pin.port, mtsrOut->pin.pinIndex, mtsrOutMode, mtsrOut->select);
+ IfxPort_setPinPadDriver(mtsrOut->pin.port, mtsrOut->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE void IfxQspi_initSclkInPin(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode)
+{
+ IfxPort_setPinModeInput(sclkIn->pin.port, sclkIn->pin.pinIndex, sclkInMode);
+ sclkIn->module->PISEL.B.SCIS = sclkIn->select;
+}
+
+
+IFX_INLINE void IfxQspi_initSclkOutPin(const IfxQspi_Sclk_Out *sclkOut, IfxPort_OutputMode sclkOutMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(sclkOut->pin.port, sclkOut->pin.pinIndex, sclkOutMode, sclkOut->select);
+ IfxPort_setPinPadDriver(sclkOut->pin.port, sclkOut->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE void IfxQspi_initSlsi(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode)
+{
+ IfxPort_setPinModeInput(slsi->pin.port, slsi->pin.pinIndex, slsiMode);
+ /* PISEL */
+ slsi->module->PISEL.B.SLSIS = slsi->select + 1;
+}
+
+
+IFX_INLINE void IfxQspi_initSlso(const IfxQspi_Slso_Out *slso, IfxPort_OutputMode slsoMode, IfxPort_PadDriver padDriver, IfxPort_OutputIdx outIndex)
+{
+ IfxPort_setPinModeOutput(slso->pin.port, slso->pin.pinIndex, slsoMode, outIndex);
+ IfxPort_setPinPadDriver(slso->pin.port, slso->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE boolean IfxQspi_isModuleEnabled(Ifx_QSPI *qspi)
+{
+ return (qspi->CLC.B.DISS == 0) ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxQspi_pause(Ifx_QSPI *qspi)
+{
+ qspi->GLOBALCON.B.EN = 0;
+
+ while (IfxQspi_getPhase(qspi) != IfxQspi_Phase_wait)
+ {}
+}
+
+
+IFX_INLINE void IfxQspi_permutateBigEndian(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bigEndian)
+{
+ int cs = channelId % 8;
+ qspi->ECON[cs].B.BE = bigEndian;
+}
+
+
+IFX_INLINE uint32 IfxQspi_readReceiveFifo(Ifx_QSPI *qspi)
+{
+ return qspi->RXEXIT.U;
+}
+
+
+IFX_INLINE void IfxQspi_requestReset(Ifx_QSPI *qspi, IfxQspi_Reset reset)
+{
+ qspi->GLOBALCON.B.RESETS = reset;
+}
+
+
+IFX_INLINE void IfxQspi_run(Ifx_QSPI *qspi)
+{
+ qspi->GLOBALCON.B.EN = 1;
+}
+
+
+IFX_INLINE void IfxQspi_setBitsegment1(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment1)
+{
+ int cs = channelId % 8;
+ qspi->ECON[cs].B.A = bitSegment1;
+}
+
+
+IFX_INLINE void IfxQspi_setBitsegment2(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment2)
+{
+ int cs = channelId % 8;
+ qspi->ECON[cs].B.B = bitSegment2;
+}
+
+
+IFX_INLINE void IfxQspi_setBitsegment3(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint8 bitSegment3)
+{
+ int cs = channelId % 8;
+ qspi->ECON[cs].B.C = bitSegment3;
+}
+
+
+IFX_INLINE void IfxQspi_setDisableModuleRequest(Ifx_QSPI *qspi)
+{
+ qspi->CLC.B.DISR = 1;
+}
+
+
+IFX_INLINE void IfxQspi_setEnableModuleRequest(Ifx_QSPI *qspi)
+{
+ qspi->CLC.B.DISR = 0;
+}
+
+
+IFX_INLINE void IfxQspi_setReceiveFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_RxFifoInt rxFifoInt)
+{
+ qspi->GLOBALCON1.B.RXFIFOINT = rxFifoInt;
+}
+
+
+IFX_INLINE void IfxQspi_setRxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
+{
+ qspi->GLOBALCON1.B.RXFM = mode;
+}
+
+
+IFX_INLINE void IfxQspi_setSleepMode(Ifx_QSPI *qspi, IfxQspi_SleepMode mode)
+{
+ qspi->CLC.B.EDIS = mode;
+}
+
+
+IFX_INLINE void IfxQspi_setTimeQuantum(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 timeQuantum)
+{
+ int cs = channelId % 8;
+ qspi->ECON[cs].B.Q = timeQuantum;
+}
+
+
+IFX_INLINE void IfxQspi_setTransmitFifoInterrruptThreshold(Ifx_QSPI *qspi, IfxQspi_TxFifoInt txFifoInt)
+{
+ qspi->GLOBALCON1.B.TXFIFOINT = txFifoInt;
+}
+
+
+IFX_INLINE void IfxQspi_setTxFifoMode(Ifx_QSPI *qspi, IfxQspi_FifoMode mode)
+{
+ qspi->GLOBALCON1.B.TXFM = mode;
+}
+
+
+IFX_INLINE void IfxQspi_writeBasicConfiguration(Ifx_QSPI *qspi, uint32 baconVal)
+{
+ qspi->BACONENTRY.U = baconVal;
+}
+
+
+IFX_INLINE void IfxQspi_writeBasicConfigurationBeginStream(Ifx_QSPI *qspi, uint32 baconVal)
+{
+ Ifx_QSPI_BACON bacon;
+ bacon.U = baconVal;
+ bacon.B.LAST = 0;
+
+ qspi->BACONENTRY.U = bacon.U;
+}
+
+
+IFX_INLINE void IfxQspi_writeBasicConfigurationEndStream(Ifx_QSPI *qspi, uint32 baconVal)
+{
+ Ifx_QSPI_BACON bacon;
+ bacon.U = baconVal;
+ bacon.B.LAST = 1;
+
+ qspi->BACONENTRY.U = bacon.U;
+}
+
+
+IFX_INLINE void IfxQspi_writeExtendedConfiguration(Ifx_QSPI *qspi, IfxQspi_ChannelId channelId, uint32 econVal)
+{
+ int cs = channelId % 8;
+ qspi->ECON[cs].U = econVal;
+}
+
+
+IFX_INLINE void IfxQspi_writeMixedDataTransmitFifo(Ifx_QSPI *qspi, uint32 mixEntryVal)
+{
+ qspi->MIXENTRY.U = mixEntryVal;
+}
+
+
+IFX_INLINE void IfxQspi_writeTransmitFifo(Ifx_QSPI *qspi, uint32 data)
+{
+ qspi->DATAENTRY[0].U = data;
+}
+
+
+IFX_INLINE boolean IfxQspi_isModuleSuspended(Ifx_QSPI *qspi)
+{
+ Ifx_QSPI_OCS ocs;
+
+ // read the status
+ ocs.U = qspi->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxQspi_setSuspendMode(Ifx_QSPI *qspi, IfxQspi_SuspendMode mode)
+{
+ Ifx_QSPI_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ qspi->OCS.U = ocs.U;
+}
+
+
+IFX_INLINE void IfxQspi_initMrstInPinWithPadLevel(const IfxQspi_Mrst_In *mrstIn, IfxPort_InputMode mrstInMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(mrstIn->pin.port, mrstIn->pin.pinIndex, mrstInMode);
+ IfxPort_setPinPadDriver(mrstIn->pin.port, mrstIn->pin.pinIndex, padDriver);
+ mrstIn->module->PISEL.B.MRIS = mrstIn->select;
+}
+
+
+IFX_INLINE void IfxQspi_initMtsrInPinWithPadLevel(const IfxQspi_Mtsr_In *mtsrIn, IfxPort_InputMode mtsrInMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(mtsrIn->pin.port, mtsrIn->pin.pinIndex, mtsrInMode);
+ IfxPort_setPinPadDriver(mtsrIn->pin.port, mtsrIn->pin.pinIndex, padDriver);
+ mtsrIn->module->PISEL.B.SRIS = mtsrIn->select;
+}
+
+
+IFX_INLINE void IfxQspi_initSclkInPinWithPadLevel(const IfxQspi_Sclk_In *sclkIn, IfxPort_InputMode sclkInMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(sclkIn->pin.port, sclkIn->pin.pinIndex, sclkInMode);
+ IfxPort_setPinPadDriver(sclkIn->pin.port, sclkIn->pin.pinIndex, padDriver);
+ sclkIn->module->PISEL.B.SCIS = sclkIn->select;
+}
+
+
+IFX_INLINE void IfxQspi_initSlsiWithPadLevel(const IfxQspi_Slsi_In *slsi, IfxPort_InputMode slsiMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeInput(slsi->pin.port, slsi->pin.pinIndex, slsiMode);
+ /* PISEL */
+ IfxPort_setPinPadDriver(slsi->pin.port, slsi->pin.pinIndex, padDriver);
+ slsi->module->PISEL.B.SLSIS = slsi->select + 1;
+}
+
+
+#endif /* IFXQSPI_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuCcu.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuCcu.c
new file mode 100644
index 0000000..ee90d6f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuCcu.c
@@ -0,0 +1,1364 @@
+/**
+ * \file IfxScuCcu.c
+ * \brief SCU basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxScuCcu.h"
+
+/** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
+ * \{ */
+
+/******************************************************************************/
+/*-----------------------Private Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Check if oscillator is stable.
+ * \return Status of oscillator stability
+ * \retval TRUE: Oscillator is unstable
+ * \retval FALSE: Oscillator is stable
+ */
+IFX_STATIC boolean IfxScuCcu_isOscillatorStable(void);
+
+/** \brief API to wait for requested duration.
+ * Note: IfxScuCcu_wait shall not use STM in future, because we can guarantee that STM is enabled after reset but If PLL init is called for changing the frequency during runtime, there is no guarantee that STM is enabled
+ * \return None
+ */
+IFX_STATIC void IfxScuCcu_wait(float32 timeSec);
+
+/** \} */
+
+/******************************************************************************/
+/*------------------------Private Variables/Constants-------------------------*/
+/******************************************************************************/
+
+/** \brief Default configuration for the PLL initial steps
+ * This is a structure array and the values are defined at the Scu implementation as a macro
+ */
+IFX_STATIC IFX_CONST IfxScuCcu_PllStepsConfig IfxScuCcu_aDefaultPllConfigSteps[] = {
+ IFXSCU_CFG_PLL_STEPS
+};
+
+/** \brief Crystal Frequency
+ */
+IFX_STATIC uint32 IfxScuCcu_xtalFrequency = IFX_CFG_SCU_XTAL_FREQUENCY;
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig = {
+ {
+ sizeof(IfxScuCcu_aDefaultPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
+ (IfxScuCcu_PllStepsConfig *)IfxScuCcu_aDefaultPllConfigSteps,
+ IFXSCU_CFG_PLL_INITIAL_STEP,
+ },
+ IFXSCU_CFG_CLK_DISTRIBUTION,
+ IFXSCU_CFG_FLASH_WAITSTATE,
+ IFX_CFG_SCU_XTAL_FREQUENCY,
+};
+
+IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig = {
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/
+ {(1 - 1), (24 - 1), (6 - 1), 0}
+};
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll)
+{
+ boolean retVal = 0;
+ uint8 deviationAllowed = 2;
+ uint32 fOsc = cfg->xtalFrequency;
+
+ // Dynamic PLL calculation Alg
+ /*
+ *
+ * fPLL = (N /( P * K2)) * fOSC
+ * */
+ {
+ const uint32 fPllMax = 200000000;
+ const uint32 fRefMax = 24000000;
+ const uint32 fRefMin = 8000000;
+ const uint32 fVcoMin = 400000000;
+ const uint32 fVcoMax = 800000000;
+ const uint8 pMin = 1;
+ const uint8 pMax = 16; // '4 bits
+ const uint8 k2Min = 1;
+ const uint8 k2Max = 128; // '7bits
+ const uint8 nMin = 1;
+ const uint8 nMax = 128; // '7bits
+
+ uint32 p;
+ uint32 n;
+ uint32 k2;
+ uint32 k2Steps;
+ uint32 bestK2 = 0, bestN = 0, bestP = 0;
+
+ uint64 fRef, fVco;
+ uint64 fPllLeastError;
+
+ fPllLeastError = fPllMax;
+
+ //' K2+1 div should be even for 50% duty cycle
+ k2Steps = 2;
+
+ if (fPll > 240000000)
+ {
+ k2Steps = 1;
+ }
+
+ for (p = pMax; p >= pMin; p--)
+ {
+ fRef = (fOsc / p);
+
+ if ((fRef >= fRefMin) && (fRef <= fRefMax))
+ {
+ for (k2 = k2Min; k2 <= k2Max; k2 += k2Steps)
+ {
+ fVco = ((uint64)fPll) * k2;
+
+ if ((fVco >= fVcoMin) && (fVco <= fVcoMax))
+ {
+ for (n = nMin; n <= nMax; n++)
+ {
+ uint64 fPllError;
+ fPllError = ((((n) / (p * k2)) * fOsc) - fPll);
+
+ if (fPllError == 0)
+ {
+ fPllLeastError = fPllError;
+ bestK2 = k2;
+ bestN = n;
+ bestP = p;
+
+ goto EXITCALC_LOOP;
+ }
+
+ if (fPllLeastError > fPllError)
+ {
+ fPllLeastError = fPllError;
+ bestK2 = k2;
+ bestN = n;
+ bestP = p;
+ }
+ }
+ }
+ }
+ }
+ }
+
+EXITCALC_LOOP:
+
+ if ((fPllLeastError) < ((fPll * deviationAllowed) / 100)) // percent ALLOWED_DEVIATION error allowed
+ {
+ cfg->sysPll.pllInitialStep.nDivider = (uint8)(bestN - 1);
+ cfg->sysPll.pllInitialStep.pDivider = (uint8)(bestP - 1);
+ cfg->sysPll.pllInitialStep.k2Initial = (uint8)(bestK2 - 1);
+ cfg->sysPll.pllInitialStep.waitTime = 0; // wait time = 0
+ cfg->sysPll.numOfPllDividerSteps = 0; // no step clock incr
+ }
+ else
+ {
+ retVal = 1;
+ }
+ }
+ return retVal;
+}
+
+
+float32 IfxScuCcu_getBaud1Frequency(void)
+{
+ float32 frequency;
+ Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
+
+ if (ccucon0.B.BAUD1DIV == 0)
+ {
+ frequency = 0;
+ }
+ else
+ {
+ frequency = IfxScuCcu_getMaxFrequency() / ccucon0.B.BAUD1DIV;
+ }
+
+ return frequency;
+}
+
+
+float32 IfxScuCcu_getBaud2Frequency(void)
+{
+ float32 frequency;
+ Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
+
+ if (ccucon0.B.BAUD2DIV == 0)
+ {
+ frequency = 0;
+ }
+ else
+ {
+ frequency = IfxScuCcu_getMaxFrequency() / ccucon0.B.BAUD2DIV;
+ }
+
+ return frequency;
+}
+
+
+float32 IfxScuCcu_getBbbFrequency(void)
+{
+ float32 bbbFrequency;
+ float32 sourceFrequency;
+
+ sourceFrequency = IfxScuCcu_getSourceFrequency();
+
+ switch (SCU_CCUCON0.B.LPDIV)
+ {
+ case 0: /*Not in low power mode */
+
+ if (SCU_CCUCON2.B.BBBDIV == 0)
+ {
+ bbbFrequency = 0.0;
+ }
+ else
+ {
+ bbbFrequency = sourceFrequency / SCU_CCUCON2.B.BBBDIV;
+ }
+
+ break;
+ case 1:
+ bbbFrequency = sourceFrequency / 30;
+ break;
+ case 2:
+ bbbFrequency = sourceFrequency / 60;
+ break;
+ case 3:
+ bbbFrequency = sourceFrequency / 120;
+ break;
+ case 4:
+ bbbFrequency = sourceFrequency / 240;
+ break;
+ default:
+ bbbFrequency = 0.0;
+ break;
+ }
+
+ return bbbFrequency;
+}
+
+
+float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu)
+{
+ float32 frequency = IfxScuCcu_getSriFrequency();
+ uint32 cpuDiv = 0;
+
+ switch (cpu)
+ {
+ case IfxCpu_ResourceCpu_0:
+ cpuDiv = SCU_CCUCON6.U;
+ break;
+ case IfxCpu_ResourceCpu_1:
+ cpuDiv = SCU_CCUCON7.U;
+ break;
+ default:
+ frequency = 0.0;
+ break;
+ }
+
+ if (cpuDiv != 0)
+ {
+ frequency = frequency * (cpuDiv / 64.0f);
+ }
+
+ return frequency;
+}
+
+
+float32 IfxScuCcu_getFsi2Frequency(void)
+{
+ float32 frequency;
+ Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
+
+ if (ccucon0.B.FSI2DIV == 0)
+ {
+ frequency = 0;
+ }
+ else
+ {
+ frequency = IfxScuCcu_getSriFrequency();
+
+ if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
+ {
+ frequency = frequency / ccucon0.B.FSI2DIV;
+ }
+ }
+
+ return frequency;
+}
+
+
+float32 IfxScuCcu_getFsiFrequency(void)
+{
+ float32 frequency;
+ Ifx_SCU_CCUCON0 ccucon0 = SCU_CCUCON0;
+
+ if (ccucon0.B.FSIDIV == 0)
+ {
+ frequency = 0;
+ }
+ else
+ {
+ frequency = IfxScuCcu_getSriFrequency();
+
+ if ((ccucon0.B.SRIDIV == 1) || (ccucon0.B.SRIDIV == 2))
+ {
+ frequency = frequency / ccucon0.B.FSIDIV;
+ }
+ }
+
+ return frequency;
+}
+
+
+float32 IfxScuCcu_getMaxFrequency(void)
+{
+ float32 maxFrequency;
+ float32 sourceFrequency;
+ sourceFrequency = IfxScuCcu_getSourceFrequency();
+
+ switch (SCU_CCUCON0.B.LPDIV)
+ {
+ case 0: /*Not in low power mode */
+
+ if (SCU_CCUCON5.B.MAXDIV == 0)
+ {
+ maxFrequency = sourceFrequency;
+ }
+ else
+ {
+ maxFrequency = sourceFrequency / SCU_CCUCON5.B.MAXDIV;
+ }
+
+ break;
+ case 1:
+ maxFrequency = sourceFrequency / 15;
+ break;
+ case 2:
+ maxFrequency = sourceFrequency / 30;
+ break;
+ case 3:
+ maxFrequency = sourceFrequency / 60;
+ break;
+ case 4:
+ maxFrequency = sourceFrequency / 120;
+ break;
+ default:
+ maxFrequency = 0.0;
+ break;
+ }
+
+ return maxFrequency;
+}
+
+
+float32 IfxScuCcu_getModuleFrequency(void)
+{
+ float32 spbFreq;
+ float32 moduleFreq;
+ Ifx_SCU_FDR scuFdr;
+ scuFdr = SCU_FDR;
+ spbFreq = IfxScuCcu_getSpbFrequency();
+
+ if (scuFdr.B.DM == 1)
+ {
+ moduleFreq = spbFreq / (1024 - scuFdr.B.STEP);
+ }
+ else if (scuFdr.B.DM == 2)
+ {
+ moduleFreq = (spbFreq * scuFdr.B.STEP) / 1024;
+ }
+ else
+ {
+ moduleFreq = 0;
+ }
+
+ return moduleFreq;
+}
+
+
+float32 IfxScuCcu_getOsc0Frequency(void)
+{
+ return (float32)IfxScuCcu_xtalFrequency;
+}
+
+
+float32 IfxScuCcu_getOscFrequency(void)
+{
+ float32 freq;
+
+ if (SCU_CCUCON1.B.INSEL == IfxScu_CCUCON1_INSEL_fOsc1)
+ {
+ freq = IFXSCU_EVR_OSC_FREQUENCY;
+ }
+ else if (SCU_CCUCON1.B.INSEL == IfxScu_CCUCON1_INSEL_fOsc0)
+ {
+ freq = (float32)IfxScuCcu_xtalFrequency;
+ }
+ else
+ {
+ /* Reserved values, this */
+ freq = 0.0;
+ }
+
+ return freq;
+}
+
+
+float32 IfxScuCcu_getPllErayFrequency(void)
+{
+ Ifx_SCU *scu = &MODULE_SCU;
+ float32 oscFreq;
+ float32 freq;
+
+ oscFreq = IfxScuCcu_getOscFrequency();
+
+ if (scu->PLLERAYSTAT.B.VCOBYST == 1)
+ {
+ /* Prescaler mode */
+ freq = oscFreq / (scu->PLLERAYCON1.B.K1DIV + 1);
+ }
+ else if (scu->PLLERAYSTAT.B.FINDIS == 1)
+ {
+ /* Free running mode */
+ freq = IFXSCU_VCO_BASE_FREQUENCY / (scu->PLLERAYCON1.B.K2DIV + 1);
+ }
+ else
+ {
+ /* Normal mode */
+ freq = (oscFreq * (scu->PLLERAYCON0.B.NDIV + 1)) / (scu->PLLERAYCON1.B.K2DIV + 1);
+ }
+
+ return freq;
+}
+
+
+float32 IfxScuCcu_getPllErayVcoFrequency(void)
+{
+ float32 vcoFreq;
+
+ if (SCU_PLLERAYSTAT.B.FINDIS == 1)
+ {
+ /* Free running mode */
+ vcoFreq = IFXSCU_VCO_BASE_FREQUENCY;
+ }
+ else
+ {
+ /* Normal mode */
+ vcoFreq = (IfxScuCcu_getOscFrequency() * (SCU_PLLERAYCON0.B.NDIV + 1)) / (SCU_PLLERAYCON0.B.PDIV + 1);
+ }
+
+ return vcoFreq;
+}
+
+
+float32 IfxScuCcu_getPllFrequency(void)
+{
+ Ifx_SCU *scu = &MODULE_SCU;
+ float32 oscFreq;
+ float32 freq;
+
+ oscFreq = IfxScuCcu_getOscFrequency();
+
+ if (scu->PLLSTAT.B.VCOBYST == 1)
+ {
+ /* Prescaler mode */
+ freq = oscFreq / (scu->PLLCON1.B.K1DIV + 1);
+ }
+ else if (scu->PLLSTAT.B.FINDIS == 1)
+ {
+ /* Free running mode */
+ freq = IFXSCU_VCO_BASE_FREQUENCY / (scu->PLLCON1.B.K2DIV + 1);
+ }
+ else
+ {
+ /* Normal mode */
+ freq = (oscFreq * (scu->PLLCON0.B.NDIV + 1)) / ((scu->PLLCON1.B.K2DIV + 1) * (scu->PLLCON0.B.PDIV + 1));
+ }
+
+ return freq;
+}
+
+
+float32 IfxScuCcu_getPllVcoFrequency(void)
+{
+ float32 vcoFreq;
+
+ if (SCU_PLLSTAT.B.FINDIS == 1)
+ {
+ /* Free running mode */
+ vcoFreq = IFXSCU_VCO_BASE_FREQUENCY;
+ }
+ else
+ {
+ /* Normal mode */
+ vcoFreq = (IfxScuCcu_getOscFrequency() * (SCU_PLLCON0.B.NDIV + 1)) / (SCU_PLLCON0.B.PDIV + 1);
+ }
+
+ return vcoFreq;
+}
+
+
+float32 IfxScuCcu_getSourceFrequency(void)
+{
+ float32 sourcefreq;
+
+ switch (SCU_CCUCON0.B.CLKSEL)
+ {
+ case IfxScu_CCUCON0_CLKSEL_fBack:
+ sourcefreq = IfxScuCcu_getEvrFrequency();
+ break;
+ case IfxScu_CCUCON0_CLKSEL_fPll:
+ sourcefreq = IfxScuCcu_getPllFrequency();
+ break;
+ default:
+ sourcefreq = 0;
+ break;
+ }
+
+ return sourcefreq;
+}
+
+
+float32 IfxScuCcu_getSpbFrequency(void)
+{
+ float32 spbFrequency;
+ float32 sourceFrequency;
+
+ sourceFrequency = IfxScuCcu_getSourceFrequency();
+
+ switch (SCU_CCUCON0.B.LPDIV)
+ {
+ case 0: /*Not in low power mode */
+
+ if (SCU_CCUCON0.B.SPBDIV == 0)
+ {
+ spbFrequency = 0.0;
+ }
+ else
+ {
+ spbFrequency = sourceFrequency / SCU_CCUCON0.B.SPBDIV;
+ }
+
+ break;
+ case 1:
+ spbFrequency = sourceFrequency / 30;
+ break;
+ case 2:
+ spbFrequency = sourceFrequency / 60;
+ break;
+ case 3:
+ spbFrequency = sourceFrequency / 120;
+ break;
+ case 4:
+ spbFrequency = sourceFrequency / 240;
+ break;
+ default:
+ spbFrequency = 0.0;
+ break;
+ }
+
+ return spbFrequency;
+}
+
+
+float32 IfxScuCcu_getSriFrequency(void)
+{
+ float32 sriFrequency;
+ float32 sourceFrequency;
+
+ sourceFrequency = IfxScuCcu_getSourceFrequency();
+
+ switch (SCU_CCUCON0.B.LPDIV)
+ {
+ case 0: /*Not in low power mode */
+
+ if (SCU_CCUCON0.B.SRIDIV == 0)
+ {
+ sriFrequency = 0.0;
+ }
+ else
+ {
+ sriFrequency = sourceFrequency / SCU_CCUCON0.B.SRIDIV;
+ }
+
+ break;
+ case 1:
+ sriFrequency = sourceFrequency / 30;
+ break;
+ case 2:
+ sriFrequency = sourceFrequency / 60;
+ break;
+ case 3:
+ sriFrequency = sourceFrequency / 120;
+ break;
+ case 4:
+ sriFrequency = sourceFrequency / 240;
+ break;
+ default:
+ sriFrequency = 0.0;
+ break;
+ }
+
+ return sriFrequency;
+}
+
+
+boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg)
+{
+ uint8 smuTrapEnable;
+ uint16 endinit_pw, endinitSfty_pw;
+ boolean status = 0;
+ /* Store the crystal frequency */
+ IfxScuCcu_xtalFrequency = cfg->xtalFrequency;
+
+ endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ {
+ /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
+ IfxScuWdt_clearCpuEndinit(endinit_pw);
+ smuTrapEnable = SCU_TRAPDIS.B.SMUT;
+ SCU_TRAPDIS.B.SMUT = 1U;
+ IfxScuWdt_setCpuEndinit(endinit_pw);
+ }
+
+ {
+ /* Select fback (fosc-evr) as CCU input clock */
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {
+ /*Wait till ccucon0 lock is set */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ SCU_CCUCON0.B.CLKSEL = 0; /*Select the EVR as fOSC for the clock distribution */
+ SCU_CCUCON0.B.UP = 1; /*Update the ccucon0 register */
+
+ /* Disconnet PLL (SETFINDIS=1): oscillator clock is disconnected from PLL */
+ SCU_PLLCON0.B.SETFINDIS = 1;
+ /* Now PLL is in free running mode */
+
+ /* Select Clock Source as PLL input clock */
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {
+ /*Wait till ccucon0 lock is set */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ SCU_CCUCON1.B.INSEL = 1; /*Select oscillator OSC0 as clock to PLL */
+ SCU_CCUCON1.B.UP = 1; /*Update the ccucon0 register */
+
+ status |= IfxScuCcu_isOscillatorStable();
+
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ }
+
+ if (status == 0)
+ {
+ /*Start the PLL configuration sequence */
+ uint8 pllStepsCount;
+
+ /*Setting up P N and K2 values equate pll to evr osc freq */
+ {
+ {
+ /*Set the K2 divider value for the step corresponding to step count */
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+
+ while (SCU_PLLSTAT.B.K2RDY == 0U)
+ {
+ /*Wait until K2 divider is ready */
+ /*No "timeout" required because Safety Endinit will give a trap */
+ }
+
+ SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllInitialStep.k2Initial;
+
+ {
+ /*change P and N divider values */
+ SCU_PLLCON0.B.PDIV = cfg->sysPll.pllInitialStep.pDivider;
+ SCU_PLLCON0.B.NDIV = cfg->sysPll.pllInitialStep.nDivider;
+
+ /* Disable oscillator disconnect feature
+ * in case of PLL unlock, PLL stays connected to fref */
+ SCU_PLLCON0.B.OSCDISCDIS = 1;
+ // workaround for Errata: PLL TC 005
+ SCU_PLLCON0.B.PLLPWD = 0; // set PLL to power down
+ /* Connect PLL to fREF as oscillator clock is connected to PLL */
+ SCU_PLLCON0.B.CLRFINDIS = 1;
+ SCU_PLLCON0.B.PLLPWD = 1; // set PLL to normal
+
+ /* Restart PLL lock detection (RESLD = 1) */
+ SCU_PLLCON0.B.RESLD = 1;
+
+ IfxScuCcu_wait(0.000050F); /*Wait for 50us */
+
+ while (SCU_PLLSTAT.B.VCOLOCK == 0U)
+ {
+ /* Wait for PLL lock */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ SCU_PLLCON0.B.VCOBYP = 0; /*VCO bypass disabled */
+
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {
+ /*Wait till ccucon registers can be written with new value */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ SCU_CCUCON0.B.CLKSEL = 0x01;
+
+ /*Configure the clock distribution */
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {
+ /*Wait till ccucon registers can be written with new value */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ /*Wait until the initial clock configurations take in to effect for the PLL*/
+ IfxScuCcu_wait(cfg->sysPll.pllInitialStep.waitTime); /*Wait for configured initial time */
+
+ { /*Write CCUCON0 configuration */
+ Ifx_SCU_CCUCON0 ccucon0;
+ ccucon0.U = SCU_CCUCON0.U & ~cfg->clockDistribution.ccucon0.mask;
+ /*update with configured value */
+ ccucon0.U |= (cfg->clockDistribution.ccucon0.mask & cfg->clockDistribution.ccucon0.value);
+ ccucon0.B.CLKSEL = 0x01; /* Select fpll as CCU input clock, even if this was not selected by configuration */
+ ccucon0.B.UP = 1;
+ SCU_CCUCON0 = ccucon0; /*Set update bit explicitly to make above configurations effective */
+ }
+
+ while (SCU_CCUCON1.B.LCK != 0U)
+ {
+ /*Wait till ccucon registers can be written with new value */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ {
+ /*Write CCUCON1 configuration */
+ Ifx_SCU_CCUCON1 ccucon1;
+ ccucon1.U = SCU_CCUCON1.U & ~cfg->clockDistribution.ccucon1.mask;
+ /*update with configured value */
+ ccucon1.U |= (cfg->clockDistribution.ccucon1.mask & cfg->clockDistribution.ccucon1.value);
+ ccucon1.B.INSEL = 1;
+ ccucon1.B.UP = 1;
+ SCU_CCUCON1 = ccucon1;
+ }
+
+ while (SCU_CCUCON2.B.LCK != 0U)
+ {
+ /*Wait till ccucon registers can be written with new value */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ {
+ /*Write CCUCON2 configuration */
+ Ifx_SCU_CCUCON2 ccucon2;
+ ccucon2.U = SCU_CCUCON2.U & ~cfg->clockDistribution.ccucon2.mask;
+ /*update with configured value */
+ ccucon2.U |= (cfg->clockDistribution.ccucon2.mask & cfg->clockDistribution.ccucon2.value);
+ ccucon2.B.UP = 1;
+ SCU_CCUCON2 = ccucon2;
+ }
+
+ while (SCU_CCUCON5.B.LCK != 0U)
+ { /*Wait till ccucon registers can be written with new value */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ { /*Write CCUCON5 configuration */
+ Ifx_SCU_CCUCON5 ccucon5;
+ ccucon5.U = SCU_CCUCON5.U & ~cfg->clockDistribution.ccucon5.mask;
+ /*update with configured value */
+ ccucon5.U |= (cfg->clockDistribution.ccucon5.mask & cfg->clockDistribution.ccucon5.value);
+ ccucon5.B.UP = 1;
+ SCU_CCUCON5 = ccucon5;
+ }
+
+ { /*Write CCUCON6 configuration */
+ Ifx_SCU_CCUCON6 ccucon6;
+ ccucon6.U = SCU_CCUCON6.U & ~cfg->clockDistribution.ccucon6.mask;
+ /*update with configured value */
+ ccucon6.U |= (cfg->clockDistribution.ccucon6.mask & cfg->clockDistribution.ccucon6.value);
+ SCU_CCUCON6 = ccucon6;
+ }
+
+ {
+ /*Write CCUCON7 configuration */
+ Ifx_SCU_CCUCON7 ccucon7;
+ ccucon7.U = SCU_CCUCON7.U & ~cfg->clockDistribution.ccucon7.mask;
+ /*update with configured value */
+ ccucon7.U |= (cfg->clockDistribution.ccucon7.mask & cfg->clockDistribution.ccucon7.value);
+ SCU_CCUCON7 = ccucon7;
+ }
+ }
+
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ }
+ }
+
+ { /*Write Flash waitstate configuration */
+ Ifx_FLASH_FCON fcon;
+ fcon.U = FLASH0_FCON.U & ~cfg->flashFconWaitStateConfig.mask;
+
+ /*update with configured value */
+ fcon.U &= ~cfg->flashFconWaitStateConfig.mask;
+ fcon.U |= (cfg->flashFconWaitStateConfig.mask & cfg->flashFconWaitStateConfig.value);
+ {
+ IfxScuWdt_clearCpuEndinit(endinit_pw);
+ FLASH0_FCON = fcon;
+ IfxScuWdt_setCpuEndinit(endinit_pw);
+ }
+ }
+
+ /*Start Pll ramp up sequence */
+ for (pllStepsCount = 0; pllStepsCount < cfg->sysPll.numOfPllDividerSteps; pllStepsCount++)
+ { /*iterate through number of pll steps */
+ {
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+
+ /*Configure K2 divider */
+ while (SCU_PLLSTAT.B.K2RDY == 0U)
+ {
+ /*Wait until K2 divider is ready */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ /*Now set the K2 divider value for the step corresponding to step count */
+ SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllDividerStep[pllStepsCount].k2Step;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ }
+
+ /*call the hook function if configured */
+ if (cfg->sysPll.pllDividerStep[pllStepsCount].hookFunction != (IfxScuCcu_PllStepsFunctionHook)0)
+ {
+ cfg->sysPll.pllDividerStep[pllStepsCount].hookFunction();
+ }
+
+ /*Wait for waitCounter corresponding to the pll step */
+ IfxScuCcu_wait(cfg->sysPll.pllDividerStep[pllStepsCount].waitTime);
+ }
+ }
+
+ { /* Enable oscillator disconnect feature */
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ SCU_PLLCON0.B.OSCDISCDIS = 0U;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ }
+ {
+ /* Enable VCO unlock Trap if it was disabled before */
+ IfxScuWdt_clearCpuEndinit(endinit_pw);
+ SCU_TRAPCLR.B.SMUT = 1U;
+ SCU_TRAPDIS.B.SMUT = smuTrapEnable;
+ IfxScuWdt_setCpuEndinit(endinit_pw);
+ }
+ return status;
+}
+
+
+void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg)
+{
+ *cfg = IfxScuCcu_defaultClockConfig;
+}
+
+
+boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg)
+{
+ uint8 smuTrapEnable;
+ uint16 endinit_pw, endinitSfty_pw;
+ boolean status = 0;
+
+ endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ { /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
+ IfxScuWdt_clearCpuEndinit(endinit_pw);
+ smuTrapEnable = SCU_TRAPDIS.B.SMUT;
+ SCU_TRAPDIS.B.SMUT = 1U;
+ IfxScuWdt_setCpuEndinit(endinit_pw);
+ }
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+
+ // ensure that PLL enabled
+ if (!SCU_PLLERAYCON0.B.PLLPWD || SCU_PLLERAYCON0.B.VCOPWD || SCU_PLLERAYSTAT.B.PWDSTAT)
+ { // PLLPWD=0 or VCOPWD=1 or PWDSTAT=1?
+ // enable PLL and leave power saving mode
+ SCU_PLLERAYCON0.B.PLLPWD = 1;
+ SCU_PLLERAYCON0.B.VCOPWD = 0;
+
+ while (SCU_PLLERAYSTAT.B.PWDSTAT) // poll PWDSTAT
+ {}
+
+ /*Wait for waitCounter corresponding to the pll step */
+ IfxScuCcu_wait(cfg->pllInitialStep.waitTime);
+ }
+
+ /* Enter Prescalar mode */
+ /* Update K and N dividers */
+ if (!SCU_PLLERAYSTAT.B.VCOBYST) // checking PLLERAYBYPST flag
+ { // select "secure" K1 value - please check @silicon if K1=4 is ok
+ while (!SCU_PLLERAYSTAT.B.K1RDY) // poll K1RDY before changing K
+ {}
+
+ SCU_PLLERAYCON1.B.K1DIV = 3;
+
+ // activate VCO bypass (bit 0: VCOBYP=1)
+ SCU_PLLERAYCON0.B.VCOBYP = 1;
+ }
+
+ while (!SCU_PLLERAYSTAT.B.K2RDY) // poll K1RDY before changing K
+ {}
+
+ SCU_PLLERAYCON1.B.K2DIV = cfg->pllInitialStep.k2Initial;
+ SCU_PLLERAYCON0.B.PDIV = cfg->pllInitialStep.pDivider;
+ SCU_PLLERAYCON0.B.NDIV = cfg->pllInitialStep.nDivider;
+ /*
+ * RESLD = 1 ==> Restart VCO lock detection
+ * CLRFINDIS = 1 ==> Connect OSC to PLL
+ * PLLPWD = 1 ==> PLL Power Saving Mode : Normal behaviour
+ * NDIV = NDIV
+ */
+
+ SCU_PLLERAYCON0.B.RESLD = 1U;
+ SCU_PLLERAYCON0.B.CLRFINDIS = 1U;
+
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+
+ // Wait until VCO LOCK bit is set
+ uint32 time_out_ctr = 50000; // higher time out value as for clib_pll, since system is clocked much faster while polling the lock flag
+
+ while (--time_out_ctr && !SCU_PLLERAYSTAT.B.VCOLOCK)
+ {}
+
+ // check for timeout, exit immediately (don't disable VCO bypass) of not locked
+ if (!time_out_ctr)
+ {
+ status = TRUE;
+ }
+
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ /*Bypass VCO*/
+ SCU_PLLERAYCON0.B.VCOBYP = 0U;
+
+ // wait until bypass has been deactivated
+ while (SCU_PLLERAYSTAT.B.VCOBYST) // poll VCOBYST
+ {}
+
+ if (!SCU_PLLERAYSTAT.B.VCOLOCK)
+ {
+ status = TRUE;
+ }
+
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+
+ { /* Enable VCO unlock Trap if it was disabled before */
+ IfxScuWdt_clearCpuEndinit(endinit_pw);
+ SCU_TRAPCLR.B.SMUT = 1U;
+ SCU_TRAPDIS.B.SMUT = smuTrapEnable;
+ IfxScuWdt_setCpuEndinit(endinit_pw);
+ }
+ return status;
+}
+
+
+void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg)
+{
+ *cfg = IfxScuCcu_defaultErayPllConfig;
+}
+
+
+IFX_STATIC boolean IfxScuCcu_isOscillatorStable(void)
+{
+ sint32 TimeoutCtr = IFXSCUCCU_OSC_STABLECHK_TIME;
+ boolean status = 0;
+
+ uint16 endinitPw = IfxScuWdt_getCpuWatchdogPassword();
+
+ /* Mode External Crystal / Ceramic Resonator Mode and External Input Clock.
+ * The oscillator Power-Saving Mode is not entered
+ */
+ SCU_OSCCON.B.MODE = 0U;
+
+ /* OSCVAL defines the divider value that generates the reference clock
+ * that is supervised by the oscillator watchdog.
+ * fOSC / (OSCVAL + 1) ~ 2.5Mhz => OSCVAL = (fOSC / 2.5Mhz) - 1 */
+
+ SCU_OSCCON.B.OSCVAL = ((uint32)IfxScuCcu_xtalFrequency / 2500000) - 1;
+
+ /* The Oscillator Watchdog of the PLL is cleared and restarted */
+ SCU_OSCCON.B.OSCRES = 1U;
+
+ /* wait until PLLLV and PLLHV flags are set */
+ while ((SCU_OSCCON.B.PLLLV == 0) || (SCU_OSCCON.B.PLLHV == 0))
+ {
+ TimeoutCtr--;
+
+ if (TimeoutCtr == 0)
+ {
+ status = 1;
+ break;
+ }
+ }
+
+ {
+ /* clear and then set SMU trap (oscillator watchdog and unlock detection) */
+ IfxScuWdt_clearCpuEndinit(endinitPw);
+ SCU_TRAPCLR.B.SMUT = 1U; /* TODO Can this be removed? */
+ SCU_TRAPDIS.B.SMUT = 1U; /* TODO Can this be removed? */
+ IfxScuWdt_setCpuEndinit(endinitPw);
+ }
+
+ return status;
+}
+
+
+float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq)
+{
+ uint16 endinitSfty_pw;
+ float32 sriFreq;
+ uint32 cpuDiv;
+
+ sriFreq = IfxScuCcu_getSriFrequency();
+
+ if (cpuFreq >= sriFreq)
+ {
+ cpuDiv = 0;
+ }
+ else
+ {
+ cpuDiv = (uint32)((cpuFreq * 64) / sriFreq);
+ }
+
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ {
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+
+ switch (cpu)
+ {
+ case IfxCpu_ResourceCpu_0:
+ SCU_CCUCON6.U = cpuDiv;
+ break;
+ case IfxCpu_ResourceCpu_1:
+ SCU_CCUCON7.U = cpuDiv;
+ break;
+
+ default:
+ break;
+ }
+
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ }
+
+ if (cpuDiv != 0)
+ {
+ sriFreq = sriFreq * (cpuDiv / 64.0f);
+ }
+
+ return sriFreq;
+}
+
+
+float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq)
+{
+ uint16 l_SEndInitPW;
+ Ifx_SCU_CCUCON1 ccucon1 = SCU_CCUCON1;
+
+ float32 inputFreq = IfxScuCcu_getSourceFrequency();
+ uint32 gtmDiv = (uint32)__roundf(inputFreq / gtmFreq);
+ gtmDiv = __maxu(gtmDiv, 1);
+
+ /*gtmDiv = gtmDiv & 0x2U;*//* only even dividers */
+ if ((gtmDiv >= 7) && (gtmDiv < 14) && ((gtmDiv & 1) == 1))
+ {
+ gtmDiv = gtmDiv - 1;
+ }
+
+ if (gtmDiv == 14)
+ {
+ gtmDiv = 12;
+ }
+
+ l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
+
+ while (SCU_CCUCON1.B.LCK != 0U)
+ {}
+
+ ccucon1.B.GTMDIV = gtmDiv;
+ ccucon1.B.UP = 1U;
+ SCU_CCUCON1.U = ccucon1.U;
+
+ IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
+
+ return IfxScuCcu_getGtmFrequency();
+}
+
+
+float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq)
+{
+ uint16 password = IfxScuWdt_getSafetyWatchdogPassword();
+ uint32 pll2Div = (uint32)((IfxScuCcu_getPllErayVcoFrequency() / pll2ErayFreq) - 1);
+ {
+ IfxScuWdt_clearSafetyEndinit(password);
+ SCU_PLLERAYCON1.B.K3DIV = pll2Div;
+ IfxScuWdt_setSafetyEndinit(password);
+ }
+ return IfxScuCcu_getPll2ErayFrequency();
+}
+
+
+float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq)
+{
+ uint16 endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+ uint32 pll2Div = (uint32)((IfxScuCcu_getPllVcoFrequency() / pll2Freq) - 1);
+ {
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ SCU_PLLCON1.B.K3DIV = pll2Div;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ }
+ return IfxScuCcu_getPll2Frequency();
+}
+
+
+float32 IfxScuCcu_setSpbFrequency(float32 spbFreq)
+{
+ /* TODO: check whether it is necessary to disable trap and/or the safety */
+ uint16 l_EndInitPW;
+ uint16 l_SEndInitPW;
+ Ifx_SCU_CCUCON0 ccucon0;
+ float32 inputFreq = IfxScuCcu_getSourceFrequency();
+ uint32 spbDiv = (uint32)(inputFreq / spbFreq);
+ spbDiv = __maxu(spbDiv, 2);
+
+ if ((spbDiv >= 7) && (spbDiv < 14) && ((spbDiv & 1) == 1))
+ {
+ spbDiv = spbDiv - 1;
+ }
+
+ if (spbDiv == 14)
+ {
+ spbDiv = 12;
+ }
+
+ l_EndInitPW = IfxScuWdt_getCpuWatchdogPassword();
+ l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(l_EndInitPW);
+ SCU_TRAPDIS.U = SCU_TRAPDIS.U | 0x3E0U;
+ IfxScuWdt_setCpuEndinit(l_EndInitPW);
+
+ IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
+
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {}
+
+ ccucon0.U = SCU_CCUCON0.U;
+ ccucon0.B.SPBDIV = spbDiv;
+ ccucon0.B.UP = 1;
+ SCU_CCUCON0.U = ccucon0.U;
+ IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
+
+ IfxScuWdt_clearCpuEndinit(l_EndInitPW);
+ SCU_TRAPDIS.U = SCU_TRAPDIS.U & (uint32)~0x3E0UL;
+ IfxScuWdt_setCpuEndinit(l_EndInitPW);
+
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {}
+
+ return IfxScuCcu_getSpbFrequency();
+}
+
+
+float32 IfxScuCcu_setSriFrequency(float32 sriFreq)
+{
+ float32 freq = 0;
+ float32 source = IfxScuCcu_getSourceFrequency();
+ Ifx_SCU_CCUCON0 ccucon0;
+ uint16 l_SEndInitPW;
+ uint32 sriDiv = (uint32)__roundf(source / sriFreq);
+ sriDiv = __maxu(sriDiv, 1);
+
+ if ((sriDiv >= 7) && (sriDiv < 14) && ((sriDiv & 1) == 1))
+ {
+ sriDiv = sriDiv - 1;
+ }
+
+ if (sriDiv == 14)
+ {
+ sriDiv = 12;
+ }
+
+ l_SEndInitPW = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(l_SEndInitPW);
+
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {}
+
+ ccucon0.U = SCU_CCUCON0.U;
+ ccucon0.B.SRIDIV = sriDiv;
+ ccucon0.B.UP = 1;
+ SCU_CCUCON0.U = ccucon0.U;
+
+ IfxScuWdt_setSafetyEndinit(l_SEndInitPW);
+
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {}
+
+ freq = IfxScuCcu_getSriFrequency();
+ return freq;
+}
+
+
+void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg)
+{
+ uint16 endinit_pw, endinitSfty_pw;
+ int pllStepsCount;
+ uint8 smuTrapEnable;
+
+ if (SCU_CCUCON0.B.CLKSEL == 0) /* Already source is backup clock */
+ {
+ return;
+ }
+
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+ endinit_pw = IfxScuWdt_getCpuWatchdogPassword();
+
+ /*Start Pll ramp down sequence */
+ for (pllStepsCount = cfg->sysPll.numOfPllDividerSteps; pllStepsCount > 0; pllStepsCount--)
+ { /*iterate through number of pll steps */
+ {
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+
+ /*Configure K2 divider */
+ while (SCU_PLLSTAT.B.K2RDY == 0U)
+ {
+ /*Wait until K2 divider is ready */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ /*Now set the K2 divider value for the step corresponding to step count */
+ SCU_PLLCON1.B.K2DIV = cfg->sysPll.pllDividerStep[pllStepsCount - 1].k2Step;
+
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+
+ /*Wait for waitCounter corresponding to the pll step */
+ IfxScuCcu_wait(cfg->sysPll.pllDividerStep[pllStepsCount - 1].waitTime);
+ }
+ }
+
+ {
+ /* Disable TRAP for SMU (oscillator watchdog and unlock detection) */
+ IfxScuWdt_clearCpuEndinit(endinit_pw);
+
+ smuTrapEnable = SCU_TRAPDIS.B.SMUT;
+ SCU_TRAPDIS.B.SMUT = 1U;
+
+ IfxScuWdt_setCpuEndinit(endinit_pw);
+ }
+
+ {
+ /* Select fback (fosc-evr) as CCU input clock */
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {
+ /*Wait till ccucon0 lock is set */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ SCU_CCUCON0.B.CLKSEL = 0; /*Select the EVR as fOSC for the clock distribution */
+ SCU_CCUCON0.B.UP = 1; /*Update the ccucon0 register */
+
+ while (SCU_CCUCON0.B.LCK != 0U)
+ {
+ /*Wait till ccucon0 lock is set */
+ /*No "timeout" required, because if it hangs, Safety Endinit will give a trap */
+ }
+
+ /* Disconnet PLL (SETFINDIS=1): oscillator clock is disconnected from PLL */
+ SCU_PLLCON0.B.SETFINDIS = 1;
+
+ /* Enable oscillator disconnect feature */
+ SCU_PLLCON0.B.OSCDISCDIS = 0U;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ }
+ {
+ /* Enable VCO unlock Trap if it was disabled before */
+ IfxScuWdt_clearCpuEndinit(endinit_pw);
+ SCU_TRAPCLR.B.SMUT = 1U;
+
+ SCU_TRAPDIS.B.SMUT = smuTrapEnable;
+ IfxScuWdt_setCpuEndinit(endinit_pw);
+ }
+}
+
+
+IFX_STATIC void IfxScuCcu_wait(float32 timeSec)
+{
+ uint32 stmCount = (uint32)(IfxScuCcu_getStmFrequency() * timeSec);
+ uint32 stmCountBegin = STM0_TIM0.U;
+
+ while ((uint32)(STM0_TIM0.U - stmCountBegin) < stmCount)
+ {
+ /* There is no need to check overflow of the STM timer.
+ * When counter after overflow subtracted with counter before overflow,
+ * the subtraction result will be as expected, as long as both are unsigned 32 bits
+ * eg: stmCountBegin= 0xFFFFFFFE (before overflow)
+ * stmCountNow = 0x00000002 (before overflow)
+ * diff= stmCountNow - stmCountBegin = 4 as expected.*/
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuCcu.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuCcu.h
new file mode 100644
index 0000000..5073c78
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuCcu.h
@@ -0,0 +1,1148 @@
+/**
+ * \file IfxScuCcu.h
+ * \brief SCU basic functionality
+ * \ingroup IfxLld_Scu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Scu SCU
+ * \addtogroup IfxLld_Scu
+ * \{
+ * \defgroup IfxLld_ScuCcu How to use the Scu Clock driver?
+ * \addtogroup IfxLld_ScuCcu
+ * \{
+ *
+ * The Scu Clock control unit driver provides a default configuration for pll and Clock initialisation and set of peripheral clock configuration functions.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_ScuCcu_Std_Preparation Preparation
+ * \subsection IfxLld_ScuCcu_Std_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_ScuCcu_Std_Variables Variables
+ *
+ * Declare the Clock Configuration variables in your C code:
+ *
+ * \code
+ * // used globally
+ *
+ * // configuration for the PLL steps
+ * static IfxScuCcu_PllStepsConfig IfxScuCcu_testPllConfigSteps[] = {
+ * IFXSCU_CFG_PLL_STEPS
+ * };
+ *
+ *
+ * // Default configuration for the Clock Configuration
+ * IfxScuCcu_Config IfxScuCcu_testClockConfig = {
+ * {
+ * sizeof(IfxScuCcu_testPllConfigSteps) / sizeof(IfxScuCcu_PllStepsConfig),
+ * (IfxScuCcu_PllStepsConfig *)IfxScuCcu_testPllConfigSteps,
+ * IFXSCU_CFG_PLL_INITIAL_STEP,
+ * },
+ * IFXSCU_CFG_CLK_DISTRIBUTION,
+ * IFXSCU_CFG_FLASH_WAITSTATE,
+ * IFX_CFG_SCU_XTAL_FREQUENCY
+ * };
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_ScuCcu_Std_Init Module Initialisation
+ *
+ * The module initialisation can be done in the same function. Here an example:
+ * \code
+ *
+ * // standard PLL & clock initialisation
+ * IfxScuCcu_init(&IfxScuCcu_testClockConfig);
+ *
+ * \endcode
+ *
+ * The PLL and clocks are now initialised based on the IFXSCU_CFG_XTAL_FREQ and IFXSCU_CFG_PLL_FREQ values configured in Ifx_Cfg.h.
+ *
+ * \}
+ * \}
+ *
+ * \defgroup IfxLld_Scu_Std_Ccu Ccu Basic Functionality
+ * \ingroup IfxLld_Scu_Std
+ * \defgroup IfxLld_Scu_Std_Ccu_Ccu Clock Control Functions
+ * \ingroup IfxLld_Scu_Std_Ccu
+ * \defgroup IfxLld_Scu_Std_Ccu_Ccu_Operative Clock Control Operative Functions
+ * \ingroup IfxLld_Scu_Std_Ccu
+ * \defgroup IfxLld_Scu_Std_Ccu_Ccu_Configuration Clock Control Configuration Functions
+ * \ingroup IfxLld_Scu_Std_Ccu
+ * \defgroup IfxLld_Scu_Std_Ccu_Enum Enumerations
+ * \ingroup IfxLld_Scu_Std_Ccu
+ */
+
+#ifndef IFXSCUCCU_H
+#define IFXSCUCCU_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxScu_cfg.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "IfxStm_reg.h"
+#include "IfxScu_reg.h"
+#include "IfxFlash_reg.h"
+#include "_PinMap/IfxScu_PinMap.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Oscillator stability check timeout count
+ */
+#define IFXSCUCCU_OSC_STABLECHK_TIME (640)
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+/** \brief Function pointer type for the hooks
+ * \return None
+ */
+typedef void (*IfxScuCcu_PllStepsFunctionHook)(void);
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Scu_Std_Ccu_Enum
+ * \{ */
+/** \brief MODULE_SCU.PLLCON1.B.K1DIV, specifies the K1-Divider
+ */
+typedef enum
+{
+ IfxScuCcu_K1divider_1 = 0, /**< \brief K1-Divider 1 */
+ IfxScuCcu_K1divider_2, /**< \brief K1-Divider 2 */
+ IfxScuCcu_K1divider_3, /**< \brief K1-Divider 3 */
+ IfxScuCcu_K1divider_4, /**< \brief K1-Divider 4 */
+ IfxScuCcu_K1divider_5, /**< \brief K1-Divider 5 */
+ IfxScuCcu_K1divider_6, /**< \brief K1-Divider 6 */
+ IfxScuCcu_K1divider_7, /**< \brief K1-Divider 7 */
+ IfxScuCcu_K1divider_8, /**< \brief K1-Divider 8 */
+ IfxScuCcu_K1divider_9, /**< \brief K1-Divider 9 */
+ IfxScuCcu_K1divider_10, /**< \brief K1-Divider 10 */
+ IfxScuCcu_K1divider_11, /**< \brief K1-Divider 11 */
+ IfxScuCcu_K1divider_12, /**< \brief K1-Divider 12 */
+ IfxScuCcu_K1divider_13, /**< \brief K1-Divider 13 */
+ IfxScuCcu_K1divider_14, /**< \brief K1-Divider 14 */
+ IfxScuCcu_K1divider_15, /**< \brief K1-Divider 15 */
+ IfxScuCcu_K1divider_16, /**< \brief K1-Divider 16 */
+ IfxScuCcu_K1divider_17, /**< \brief K1-Divider 17 */
+ IfxScuCcu_K1divider_18, /**< \brief K1-Divider 18 */
+ IfxScuCcu_K1divider_19, /**< \brief K1-Divider 19 */
+ IfxScuCcu_K1divider_20, /**< \brief K1-Divider 20 */
+ IfxScuCcu_K1divider_21, /**< \brief K1-Divider 21 */
+ IfxScuCcu_K1divider_22, /**< \brief K1-Divider 22 */
+ IfxScuCcu_K1divider_23, /**< \brief K1-Divider 23 */
+ IfxScuCcu_K1divider_24, /**< \brief K1-Divider 24 */
+ IfxScuCcu_K1divider_25, /**< \brief K1-Divider 25 */
+ IfxScuCcu_K1divider_26, /**< \brief K1-Divider 26 */
+ IfxScuCcu_K1divider_27, /**< \brief K1-Divider 27 */
+ IfxScuCcu_K1divider_28, /**< \brief K1-Divider 28 */
+ IfxScuCcu_K1divider_29, /**< \brief K1-Divider 29 */
+ IfxScuCcu_K1divider_30, /**< \brief K1-Divider 30 */
+ IfxScuCcu_K1divider_31, /**< \brief K1-Divider 31 */
+ IfxScuCcu_K1divider_32, /**< \brief K1-Divider 32 */
+ IfxScuCcu_K1divider_33, /**< \brief K1-Divider 33 */
+ IfxScuCcu_K1divider_34, /**< \brief K1-Divider 34 */
+ IfxScuCcu_K1divider_35, /**< \brief K1-Divider 35 */
+ IfxScuCcu_K1divider_36, /**< \brief K1-Divider 36 */
+ IfxScuCcu_K1divider_37, /**< \brief K1-Divider 37 */
+ IfxScuCcu_K1divider_38, /**< \brief K1-Divider 38 */
+ IfxScuCcu_K1divider_39, /**< \brief K1-Divider 39 */
+ IfxScuCcu_K1divider_40, /**< \brief K1-Divider 40 */
+ IfxScuCcu_K1divider_41, /**< \brief K1-Divider 41 */
+ IfxScuCcu_K1divider_42, /**< \brief K1-Divider 42 */
+ IfxScuCcu_K1divider_43, /**< \brief K1-Divider 43 */
+ IfxScuCcu_K1divider_44, /**< \brief K1-Divider 44 */
+ IfxScuCcu_K1divider_45, /**< \brief K1-Divider 45 */
+ IfxScuCcu_K1divider_46, /**< \brief K1-Divider 46 */
+ IfxScuCcu_K1divider_47, /**< \brief K1-Divider 47 */
+ IfxScuCcu_K1divider_48, /**< \brief K1-Divider 48 */
+ IfxScuCcu_K1divider_49, /**< \brief K1-Divider 49 */
+ IfxScuCcu_K1divider_50, /**< \brief K1-Divider 50 */
+ IfxScuCcu_K1divider_51, /**< \brief K1-Divider 51 */
+ IfxScuCcu_K1divider_52, /**< \brief K1-Divider 52 */
+ IfxScuCcu_K1divider_53, /**< \brief K1-Divider 53 */
+ IfxScuCcu_K1divider_54, /**< \brief K1-Divider 54 */
+ IfxScuCcu_K1divider_55, /**< \brief K1-Divider 55 */
+ IfxScuCcu_K1divider_56, /**< \brief K1-Divider 56 */
+ IfxScuCcu_K1divider_57, /**< \brief K1-Divider 57 */
+ IfxScuCcu_K1divider_58, /**< \brief K1-Divider 58 */
+ IfxScuCcu_K1divider_59, /**< \brief K1-Divider 59 */
+ IfxScuCcu_K1divider_60, /**< \brief K1-Divider 60 */
+ IfxScuCcu_K1divider_61, /**< \brief K1-Divider 61 */
+ IfxScuCcu_K1divider_62, /**< \brief K1-Divider 62 */
+ IfxScuCcu_K1divider_63, /**< \brief K1-Divider 63 */
+ IfxScuCcu_K1divider_64, /**< \brief K1-Divider 64 */
+ IfxScuCcu_K1divider_65, /**< \brief K1-Divider 65 */
+ IfxScuCcu_K1divider_66, /**< \brief K1-Divider 66 */
+ IfxScuCcu_K1divider_67, /**< \brief K1-Divider 67 */
+ IfxScuCcu_K1divider_68, /**< \brief K1-Divider 68 */
+ IfxScuCcu_K1divider_69, /**< \brief K1-Divider 69 */
+ IfxScuCcu_K1divider_70, /**< \brief K1-Divider 70 */
+ IfxScuCcu_K1divider_71, /**< \brief K1-Divider 71 */
+ IfxScuCcu_K1divider_72, /**< \brief K1-Divider 72 */
+ IfxScuCcu_K1divider_73, /**< \brief K1-Divider 73 */
+ IfxScuCcu_K1divider_74, /**< \brief K1-Divider 74 */
+ IfxScuCcu_K1divider_75, /**< \brief K1-Divider 75 */
+ IfxScuCcu_K1divider_76, /**< \brief K1-Divider 76 */
+ IfxScuCcu_K1divider_77, /**< \brief K1-Divider 77 */
+ IfxScuCcu_K1divider_78, /**< \brief K1-Divider 78 */
+ IfxScuCcu_K1divider_79, /**< \brief K1-Divider 79 */
+ IfxScuCcu_K1divider_80, /**< \brief K1-Divider 80 */
+ IfxScuCcu_K1divider_81, /**< \brief K1-Divider 81 */
+ IfxScuCcu_K1divider_82, /**< \brief K1-Divider 82 */
+ IfxScuCcu_K1divider_83, /**< \brief K1-Divider 83 */
+ IfxScuCcu_K1divider_84, /**< \brief K1-Divider 84 */
+ IfxScuCcu_K1divider_85, /**< \brief K1-Divider 85 */
+ IfxScuCcu_K1divider_86, /**< \brief K1-Divider 86 */
+ IfxScuCcu_K1divider_87, /**< \brief K1-Divider 87 */
+ IfxScuCcu_K1divider_88, /**< \brief K1-Divider 88 */
+ IfxScuCcu_K1divider_89, /**< \brief K1-Divider 89 */
+ IfxScuCcu_K1divider_90, /**< \brief K1-Divider 90 */
+ IfxScuCcu_K1divider_91, /**< \brief K1-Divider 91 */
+ IfxScuCcu_K1divider_92, /**< \brief K1-Divider 92 */
+ IfxScuCcu_K1divider_93, /**< \brief K1-Divider 93 */
+ IfxScuCcu_K1divider_94, /**< \brief K1-Divider 94 */
+ IfxScuCcu_K1divider_95, /**< \brief K1-Divider 95 */
+ IfxScuCcu_K1divider_96, /**< \brief K1-Divider 96 */
+ IfxScuCcu_K1divider_97, /**< \brief K1-Divider 97 */
+ IfxScuCcu_K1divider_98, /**< \brief K1-Divider 98 */
+ IfxScuCcu_K1divider_99, /**< \brief K1-Divider 99 */
+ IfxScuCcu_K1divider_100, /**< \brief K1-Divider 100 */
+ IfxScuCcu_K1divider_101, /**< \brief K1-Divider 101 */
+ IfxScuCcu_K1divider_102, /**< \brief K1-Divider 102 */
+ IfxScuCcu_K1divider_103, /**< \brief K1-Divider 103 */
+ IfxScuCcu_K1divider_104, /**< \brief K1-Divider 104 */
+ IfxScuCcu_K1divider_105, /**< \brief K1-Divider 105 */
+ IfxScuCcu_K1divider_106, /**< \brief K1-Divider 106 */
+ IfxScuCcu_K1divider_107, /**< \brief K1-Divider 107 */
+ IfxScuCcu_K1divider_108, /**< \brief K1-Divider 108 */
+ IfxScuCcu_K1divider_109, /**< \brief K1-Divider 109 */
+ IfxScuCcu_K1divider_110, /**< \brief K1-Divider 110 */
+ IfxScuCcu_K1divider_111, /**< \brief K1-Divider 111 */
+ IfxScuCcu_K1divider_112, /**< \brief K1-Divider 112 */
+ IfxScuCcu_K1divider_113, /**< \brief K1-Divider 113 */
+ IfxScuCcu_K1divider_114, /**< \brief K1-Divider 114 */
+ IfxScuCcu_K1divider_115, /**< \brief K1-Divider 115 */
+ IfxScuCcu_K1divider_116, /**< \brief K1-Divider 116 */
+ IfxScuCcu_K1divider_117, /**< \brief K1-Divider 117 */
+ IfxScuCcu_K1divider_118, /**< \brief K1-Divider 118 */
+ IfxScuCcu_K1divider_119, /**< \brief K1-Divider 119 */
+ IfxScuCcu_K1divider_120, /**< \brief K1-Divider 120 */
+ IfxScuCcu_K1divider_121, /**< \brief K1-Divider 121 */
+ IfxScuCcu_K1divider_122, /**< \brief K1-Divider 122 */
+ IfxScuCcu_K1divider_123, /**< \brief K1-Divider 123 */
+ IfxScuCcu_K1divider_124, /**< \brief K1-Divider 124 */
+ IfxScuCcu_K1divider_125, /**< \brief K1-Divider 125 */
+ IfxScuCcu_K1divider_126, /**< \brief K1-Divider 126 */
+ IfxScuCcu_K1divider_127, /**< \brief K1-Divider 127 */
+ IfxScuCcu_K1divider_128 /**< \brief K1-Divider 128 */
+} IfxScuCcu_K1divider;
+
+/** \brief MODULE_SCU.PLLCON1.B.K2DIV, specifies the K2-Divider
+ */
+typedef enum
+{
+ IfxScuCcu_K2divider_1 = 0, /**< \brief K2-Divider 1 */
+ IfxScuCcu_K2divider_2, /**< \brief K2-Divider 2 */
+ IfxScuCcu_K2divider_3, /**< \brief K2-Divider 3 */
+ IfxScuCcu_K2divider_4, /**< \brief K2-Divider 4 */
+ IfxScuCcu_K2divider_5, /**< \brief K2-Divider 5 */
+ IfxScuCcu_K2divider_6, /**< \brief K2-Divider 6 */
+ IfxScuCcu_K2divider_7, /**< \brief K2-Divider 7 */
+ IfxScuCcu_K2divider_8, /**< \brief K2-Divider 8 */
+ IfxScuCcu_K2divider_9, /**< \brief K2-Divider 9 */
+ IfxScuCcu_K2divider_10, /**< \brief K2-Divider 10 */
+ IfxScuCcu_K2divider_11, /**< \brief K2-Divider 11 */
+ IfxScuCcu_K2divider_12, /**< \brief K2-Divider 12 */
+ IfxScuCcu_K2divider_13, /**< \brief K2-Divider 13 */
+ IfxScuCcu_K2divider_14, /**< \brief K2-Divider 14 */
+ IfxScuCcu_K2divider_15, /**< \brief K2-Divider 15 */
+ IfxScuCcu_K2divider_16, /**< \brief K2-Divider 16 */
+ IfxScuCcu_K2divider_17, /**< \brief K2-Divider 17 */
+ IfxScuCcu_K2divider_18, /**< \brief K2-Divider 18 */
+ IfxScuCcu_K2divider_19, /**< \brief K2-Divider 19 */
+ IfxScuCcu_K2divider_20, /**< \brief K2-Divider 20 */
+ IfxScuCcu_K2divider_21, /**< \brief K2-Divider 21 */
+ IfxScuCcu_K2divider_22, /**< \brief K2-Divider 22 */
+ IfxScuCcu_K2divider_23, /**< \brief K2-Divider 23 */
+ IfxScuCcu_K2divider_24, /**< \brief K2-Divider 24 */
+ IfxScuCcu_K2divider_25, /**< \brief K2-Divider 25 */
+ IfxScuCcu_K2divider_26, /**< \brief K2-Divider 26 */
+ IfxScuCcu_K2divider_27, /**< \brief K2-Divider 27 */
+ IfxScuCcu_K2divider_28, /**< \brief K2-Divider 28 */
+ IfxScuCcu_K2divider_29, /**< \brief K2-Divider 29 */
+ IfxScuCcu_K2divider_30, /**< \brief K2-Divider 30 */
+ IfxScuCcu_K2divider_31, /**< \brief K2-Divider 31 */
+ IfxScuCcu_K2divider_32, /**< \brief K2-Divider 32 */
+ IfxScuCcu_K2divider_33, /**< \brief K2-Divider 33 */
+ IfxScuCcu_K2divider_34, /**< \brief K2-Divider 34 */
+ IfxScuCcu_K2divider_35, /**< \brief K2-Divider 35 */
+ IfxScuCcu_K2divider_36, /**< \brief K2-Divider 36 */
+ IfxScuCcu_K2divider_37, /**< \brief K2-Divider 37 */
+ IfxScuCcu_K2divider_38, /**< \brief K2-Divider 38 */
+ IfxScuCcu_K2divider_39, /**< \brief K2-Divider 39 */
+ IfxScuCcu_K2divider_40, /**< \brief K2-Divider 40 */
+ IfxScuCcu_K2divider_41, /**< \brief K2-Divider 41 */
+ IfxScuCcu_K2divider_42, /**< \brief K2-Divider 42 */
+ IfxScuCcu_K2divider_43, /**< \brief K2-Divider 43 */
+ IfxScuCcu_K2divider_44, /**< \brief K2-Divider 44 */
+ IfxScuCcu_K2divider_45, /**< \brief K2-Divider 45 */
+ IfxScuCcu_K2divider_46, /**< \brief K2-Divider 46 */
+ IfxScuCcu_K2divider_47, /**< \brief K2-Divider 47 */
+ IfxScuCcu_K2divider_48, /**< \brief K2-Divider 48 */
+ IfxScuCcu_K2divider_49, /**< \brief K2-Divider 49 */
+ IfxScuCcu_K2divider_50, /**< \brief K2-Divider 50 */
+ IfxScuCcu_K2divider_51, /**< \brief K2-Divider 51 */
+ IfxScuCcu_K2divider_52, /**< \brief K2-Divider 52 */
+ IfxScuCcu_K2divider_53, /**< \brief K2-Divider 53 */
+ IfxScuCcu_K2divider_54, /**< \brief K2-Divider 54 */
+ IfxScuCcu_K2divider_55, /**< \brief K2-Divider 55 */
+ IfxScuCcu_K2divider_56, /**< \brief K2-Divider 56 */
+ IfxScuCcu_K2divider_57, /**< \brief K2-Divider 57 */
+ IfxScuCcu_K2divider_58, /**< \brief K2-Divider 58 */
+ IfxScuCcu_K2divider_59, /**< \brief K2-Divider 59 */
+ IfxScuCcu_K2divider_60, /**< \brief K2-Divider 60 */
+ IfxScuCcu_K2divider_61, /**< \brief K2-Divider 61 */
+ IfxScuCcu_K2divider_62, /**< \brief K2-Divider 62 */
+ IfxScuCcu_K2divider_63, /**< \brief K2-Divider 63 */
+ IfxScuCcu_K2divider_64, /**< \brief K2-Divider 64 */
+ IfxScuCcu_K2divider_65, /**< \brief K2-Divider 65 */
+ IfxScuCcu_K2divider_66, /**< \brief K2-Divider 66 */
+ IfxScuCcu_K2divider_67, /**< \brief K2-Divider 67 */
+ IfxScuCcu_K2divider_68, /**< \brief K2-Divider 68 */
+ IfxScuCcu_K2divider_69, /**< \brief K2-Divider 69 */
+ IfxScuCcu_K2divider_70, /**< \brief K2-Divider 70 */
+ IfxScuCcu_K2divider_71, /**< \brief K2-Divider 71 */
+ IfxScuCcu_K2divider_72, /**< \brief K2-Divider 72 */
+ IfxScuCcu_K2divider_73, /**< \brief K2-Divider 73 */
+ IfxScuCcu_K2divider_74, /**< \brief K2-Divider 74 */
+ IfxScuCcu_K2divider_75, /**< \brief K2-Divider 75 */
+ IfxScuCcu_K2divider_76, /**< \brief K2-Divider 76 */
+ IfxScuCcu_K2divider_77, /**< \brief K2-Divider 77 */
+ IfxScuCcu_K2divider_78, /**< \brief K2-Divider 78 */
+ IfxScuCcu_K2divider_79, /**< \brief K2-Divider 79 */
+ IfxScuCcu_K2divider_80, /**< \brief K2-Divider 80 */
+ IfxScuCcu_K2divider_81, /**< \brief K2-Divider 81 */
+ IfxScuCcu_K2divider_82, /**< \brief K2-Divider 82 */
+ IfxScuCcu_K2divider_83, /**< \brief K2-Divider 83 */
+ IfxScuCcu_K2divider_84, /**< \brief K2-Divider 84 */
+ IfxScuCcu_K2divider_85, /**< \brief K2-Divider 85 */
+ IfxScuCcu_K2divider_86, /**< \brief K2-Divider 86 */
+ IfxScuCcu_K2divider_87, /**< \brief K2-Divider 87 */
+ IfxScuCcu_K2divider_88, /**< \brief K2-Divider 88 */
+ IfxScuCcu_K2divider_89, /**< \brief K2-Divider 89 */
+ IfxScuCcu_K2divider_90, /**< \brief K2-Divider 90 */
+ IfxScuCcu_K2divider_91, /**< \brief K2-Divider 91 */
+ IfxScuCcu_K2divider_92, /**< \brief K2-Divider 92 */
+ IfxScuCcu_K2divider_93, /**< \brief K2-Divider 93 */
+ IfxScuCcu_K2divider_94, /**< \brief K2-Divider 94 */
+ IfxScuCcu_K2divider_95, /**< \brief K2-Divider 95 */
+ IfxScuCcu_K2divider_96, /**< \brief K2-Divider 96 */
+ IfxScuCcu_K2divider_97, /**< \brief K2-Divider 97 */
+ IfxScuCcu_K2divider_98, /**< \brief K2-Divider 98 */
+ IfxScuCcu_K2divider_99, /**< \brief K2-Divider 99 */
+ IfxScuCcu_K2divider_100, /**< \brief K2-Divider 100 */
+ IfxScuCcu_K2divider_101, /**< \brief K2-Divider 101 */
+ IfxScuCcu_K2divider_102, /**< \brief K2-Divider 102 */
+ IfxScuCcu_K2divider_103, /**< \brief K2-Divider 103 */
+ IfxScuCcu_K2divider_104, /**< \brief K2-Divider 104 */
+ IfxScuCcu_K2divider_105, /**< \brief K2-Divider 105 */
+ IfxScuCcu_K2divider_106, /**< \brief K2-Divider 106 */
+ IfxScuCcu_K2divider_107, /**< \brief K2-Divider 107 */
+ IfxScuCcu_K2divider_108, /**< \brief K2-Divider 108 */
+ IfxScuCcu_K2divider_109, /**< \brief K2-Divider 109 */
+ IfxScuCcu_K2divider_110, /**< \brief K2-Divider 110 */
+ IfxScuCcu_K2divider_111, /**< \brief K2-Divider 111 */
+ IfxScuCcu_K2divider_112, /**< \brief K2-Divider 112 */
+ IfxScuCcu_K2divider_113, /**< \brief K2-Divider 113 */
+ IfxScuCcu_K2divider_114, /**< \brief K2-Divider 114 */
+ IfxScuCcu_K2divider_115, /**< \brief K2-Divider 115 */
+ IfxScuCcu_K2divider_116, /**< \brief K2-Divider 116 */
+ IfxScuCcu_K2divider_117, /**< \brief K2-Divider 117 */
+ IfxScuCcu_K2divider_118, /**< \brief K2-Divider 118 */
+ IfxScuCcu_K2divider_119, /**< \brief K2-Divider 119 */
+ IfxScuCcu_K2divider_120, /**< \brief K2-Divider 120 */
+ IfxScuCcu_K2divider_121, /**< \brief K2-Divider 121 */
+ IfxScuCcu_K2divider_122, /**< \brief K2-Divider 122 */
+ IfxScuCcu_K2divider_123, /**< \brief K2-Divider 123 */
+ IfxScuCcu_K2divider_124, /**< \brief K2-Divider 124 */
+ IfxScuCcu_K2divider_125, /**< \brief K2-Divider 125 */
+ IfxScuCcu_K2divider_126, /**< \brief K2-Divider 126 */
+ IfxScuCcu_K2divider_127, /**< \brief K2-Divider 127 */
+ IfxScuCcu_K2divider_128 /**< \brief K2-Divider 128 */
+} IfxScuCcu_K2divider;
+
+/** \brief MODULE_SCU.PLLCON1.B.K3DIV, specifies the K3-Divider
+ */
+typedef enum
+{
+ IfxScuCcu_K3divider_1 = 0, /**< \brief K3-Divider 1 */
+ IfxScuCcu_K3divider_2, /**< \brief K3-Divider 2 */
+ IfxScuCcu_K3divider_3, /**< \brief K3-Divider 3 */
+ IfxScuCcu_K3divider_4, /**< \brief K3-Divider 4 */
+ IfxScuCcu_K3divider_5, /**< \brief K3-Divider 5 */
+ IfxScuCcu_K3divider_6, /**< \brief K3-Divider 6 */
+ IfxScuCcu_K3divider_7, /**< \brief K3-Divider 7 */
+ IfxScuCcu_K3divider_8, /**< \brief K3-Divider 8 */
+ IfxScuCcu_K3divider_9, /**< \brief K3-Divider 9 */
+ IfxScuCcu_K3divider_10, /**< \brief K3-Divider 10 */
+ IfxScuCcu_K3divider_11, /**< \brief K3-Divider 11 */
+ IfxScuCcu_K3divider_12, /**< \brief K3-Divider 12 */
+ IfxScuCcu_K3divider_13, /**< \brief K3-Divider 13 */
+ IfxScuCcu_K3divider_14, /**< \brief K3-Divider 14 */
+ IfxScuCcu_K3divider_15, /**< \brief K3-Divider 15 */
+ IfxScuCcu_K3divider_16, /**< \brief K3-Divider 16 */
+ IfxScuCcu_K3divider_17, /**< \brief K3-Divider 17 */
+ IfxScuCcu_K3divider_18, /**< \brief K3-Divider 18 */
+ IfxScuCcu_K3divider_19, /**< \brief K3-Divider 19 */
+ IfxScuCcu_K3divider_20, /**< \brief K3-Divider 20 */
+ IfxScuCcu_K3divider_21, /**< \brief K3-Divider 21 */
+ IfxScuCcu_K3divider_22, /**< \brief K3-Divider 22 */
+ IfxScuCcu_K3divider_23, /**< \brief K3-Divider 23 */
+ IfxScuCcu_K3divider_24, /**< \brief K3-Divider 24 */
+ IfxScuCcu_K3divider_25, /**< \brief K3-Divider 25 */
+ IfxScuCcu_K3divider_26, /**< \brief K3-Divider 26 */
+ IfxScuCcu_K3divider_27, /**< \brief K3-Divider 27 */
+ IfxScuCcu_K3divider_28, /**< \brief K3-Divider 28 */
+ IfxScuCcu_K3divider_29, /**< \brief K3-Divider 29 */
+ IfxScuCcu_K3divider_30, /**< \brief K3-Divider 30 */
+ IfxScuCcu_K3divider_31, /**< \brief K3-Divider 31 */
+ IfxScuCcu_K3divider_32, /**< \brief K3-Divider 32 */
+ IfxScuCcu_K3divider_33, /**< \brief K3-Divider 33 */
+ IfxScuCcu_K3divider_34, /**< \brief K3-Divider 34 */
+ IfxScuCcu_K3divider_35, /**< \brief K3-Divider 35 */
+ IfxScuCcu_K3divider_36, /**< \brief K3-Divider 36 */
+ IfxScuCcu_K3divider_37, /**< \brief K3-Divider 37 */
+ IfxScuCcu_K3divider_38, /**< \brief K3-Divider 38 */
+ IfxScuCcu_K3divider_39, /**< \brief K3-Divider 39 */
+ IfxScuCcu_K3divider_40, /**< \brief K3-Divider 40 */
+ IfxScuCcu_K3divider_41, /**< \brief K3-Divider 41 */
+ IfxScuCcu_K3divider_42, /**< \brief K3-Divider 42 */
+ IfxScuCcu_K3divider_43, /**< \brief K3-Divider 43 */
+ IfxScuCcu_K3divider_44, /**< \brief K3-Divider 44 */
+ IfxScuCcu_K3divider_45, /**< \brief K3-Divider 45 */
+ IfxScuCcu_K3divider_46, /**< \brief K3-Divider 46 */
+ IfxScuCcu_K3divider_47, /**< \brief K3-Divider 47 */
+ IfxScuCcu_K3divider_48, /**< \brief K3-Divider 48 */
+ IfxScuCcu_K3divider_49, /**< \brief K3-Divider 49 */
+ IfxScuCcu_K3divider_50, /**< \brief K3-Divider 50 */
+ IfxScuCcu_K3divider_51, /**< \brief K3-Divider 51 */
+ IfxScuCcu_K3divider_52, /**< \brief K3-Divider 52 */
+ IfxScuCcu_K3divider_53, /**< \brief K3-Divider 53 */
+ IfxScuCcu_K3divider_54, /**< \brief K3-Divider 54 */
+ IfxScuCcu_K3divider_55, /**< \brief K3-Divider 55 */
+ IfxScuCcu_K3divider_56, /**< \brief K3-Divider 56 */
+ IfxScuCcu_K3divider_57, /**< \brief K3-Divider 57 */
+ IfxScuCcu_K3divider_58, /**< \brief K3-Divider 58 */
+ IfxScuCcu_K3divider_59, /**< \brief K3-Divider 59 */
+ IfxScuCcu_K3divider_60, /**< \brief K3-Divider 60 */
+ IfxScuCcu_K3divider_61, /**< \brief K3-Divider 61 */
+ IfxScuCcu_K3divider_62, /**< \brief K3-Divider 62 */
+ IfxScuCcu_K3divider_63, /**< \brief K3-Divider 63 */
+ IfxScuCcu_K3divider_64, /**< \brief K3-Divider 64 */
+ IfxScuCcu_K3divider_65, /**< \brief K3-Divider 65 */
+ IfxScuCcu_K3divider_66, /**< \brief K3-Divider 66 */
+ IfxScuCcu_K3divider_67, /**< \brief K3-Divider 67 */
+ IfxScuCcu_K3divider_68, /**< \brief K3-Divider 68 */
+ IfxScuCcu_K3divider_69, /**< \brief K3-Divider 69 */
+ IfxScuCcu_K3divider_70, /**< \brief K3-Divider 70 */
+ IfxScuCcu_K3divider_71, /**< \brief K3-Divider 71 */
+ IfxScuCcu_K3divider_72, /**< \brief K3-Divider 72 */
+ IfxScuCcu_K3divider_73, /**< \brief K3-Divider 73 */
+ IfxScuCcu_K3divider_74, /**< \brief K3-Divider 74 */
+ IfxScuCcu_K3divider_75, /**< \brief K3-Divider 75 */
+ IfxScuCcu_K3divider_76, /**< \brief K3-Divider 76 */
+ IfxScuCcu_K3divider_77, /**< \brief K3-Divider 77 */
+ IfxScuCcu_K3divider_78, /**< \brief K3-Divider 78 */
+ IfxScuCcu_K3divider_79, /**< \brief K3-Divider 79 */
+ IfxScuCcu_K3divider_80, /**< \brief K3-Divider 80 */
+ IfxScuCcu_K3divider_81, /**< \brief K3-Divider 81 */
+ IfxScuCcu_K3divider_82, /**< \brief K3-Divider 82 */
+ IfxScuCcu_K3divider_83, /**< \brief K3-Divider 83 */
+ IfxScuCcu_K3divider_84, /**< \brief K3-Divider 84 */
+ IfxScuCcu_K3divider_85, /**< \brief K3-Divider 85 */
+ IfxScuCcu_K3divider_86, /**< \brief K3-Divider 86 */
+ IfxScuCcu_K3divider_87, /**< \brief K3-Divider 87 */
+ IfxScuCcu_K3divider_88, /**< \brief K3-Divider 88 */
+ IfxScuCcu_K3divider_89, /**< \brief K3-Divider 89 */
+ IfxScuCcu_K3divider_90, /**< \brief K3-Divider 90 */
+ IfxScuCcu_K3divider_91, /**< \brief K3-Divider 91 */
+ IfxScuCcu_K3divider_92, /**< \brief K3-Divider 92 */
+ IfxScuCcu_K3divider_93, /**< \brief K3-Divider 93 */
+ IfxScuCcu_K3divider_94, /**< \brief K3-Divider 94 */
+ IfxScuCcu_K3divider_95, /**< \brief K3-Divider 95 */
+ IfxScuCcu_K3divider_96, /**< \brief K3-Divider 96 */
+ IfxScuCcu_K3divider_97, /**< \brief K3-Divider 97 */
+ IfxScuCcu_K3divider_98, /**< \brief K3-Divider 98 */
+ IfxScuCcu_K3divider_99, /**< \brief K3-Divider 99 */
+ IfxScuCcu_K3divider_100, /**< \brief K3-Divider 100 */
+ IfxScuCcu_K3divider_101, /**< \brief K3-Divider 101 */
+ IfxScuCcu_K3divider_102, /**< \brief K3-Divider 102 */
+ IfxScuCcu_K3divider_103, /**< \brief K3-Divider 103 */
+ IfxScuCcu_K3divider_104, /**< \brief K3-Divider 104 */
+ IfxScuCcu_K3divider_105, /**< \brief K3-Divider 105 */
+ IfxScuCcu_K3divider_106, /**< \brief K3-Divider 106 */
+ IfxScuCcu_K3divider_107, /**< \brief K3-Divider 107 */
+ IfxScuCcu_K3divider_108, /**< \brief K3-Divider 108 */
+ IfxScuCcu_K3divider_109, /**< \brief K3-Divider 109 */
+ IfxScuCcu_K3divider_110, /**< \brief K3-Divider 110 */
+ IfxScuCcu_K3divider_111, /**< \brief K3-Divider 111 */
+ IfxScuCcu_K3divider_112, /**< \brief K3-Divider 112 */
+ IfxScuCcu_K3divider_113, /**< \brief K3-Divider 113 */
+ IfxScuCcu_K3divider_114, /**< \brief K3-Divider 114 */
+ IfxScuCcu_K3divider_115, /**< \brief K3-Divider 115 */
+ IfxScuCcu_K3divider_116, /**< \brief K3-Divider 116 */
+ IfxScuCcu_K3divider_117, /**< \brief K3-Divider 117 */
+ IfxScuCcu_K3divider_118, /**< \brief K3-Divider 118 */
+ IfxScuCcu_K3divider_119, /**< \brief K3-Divider 119 */
+ IfxScuCcu_K3divider_120, /**< \brief K3-Divider 120 */
+ IfxScuCcu_K3divider_121, /**< \brief K3-Divider 121 */
+ IfxScuCcu_K3divider_122, /**< \brief K3-Divider 122 */
+ IfxScuCcu_K3divider_123, /**< \brief K3-Divider 123 */
+ IfxScuCcu_K3divider_124, /**< \brief K3-Divider 124 */
+ IfxScuCcu_K3divider_125, /**< \brief K3-Divider 125 */
+ IfxScuCcu_K3divider_126, /**< \brief K3-Divider 126 */
+ IfxScuCcu_K3divider_127, /**< \brief K3-Divider 127 */
+ IfxScuCcu_K3divider_128 /**< \brief K3-Divider 128 */
+} IfxScuCcu_K3divider;
+
+/** \brief MODULE_SCU.PLLCON0.B.NDIV, specifies the N-Divider
+ */
+typedef enum
+{
+ IfxScuCcu_Ndivider_1 = 0, /**< \brief N-divider 1 */
+ IfxScuCcu_Ndivider_2, /**< \brief N-divider 2 */
+ IfxScuCcu_Ndivider_3, /**< \brief N-divider 3 */
+ IfxScuCcu_Ndivider_4, /**< \brief N-divider 4 */
+ IfxScuCcu_Ndivider_5, /**< \brief N-divider 5 */
+ IfxScuCcu_Ndivider_6, /**< \brief N-divider 6 */
+ IfxScuCcu_Ndivider_7, /**< \brief N-divider 7 */
+ IfxScuCcu_Ndivider_8, /**< \brief N-divider 8 */
+ IfxScuCcu_Ndivider_9, /**< \brief N-divider 9 */
+ IfxScuCcu_Ndivider_10, /**< \brief N-divider 10 */
+ IfxScuCcu_Ndivider_11, /**< \brief N-divider 11 */
+ IfxScuCcu_Ndivider_12, /**< \brief N-divider 12 */
+ IfxScuCcu_Ndivider_13, /**< \brief N-divider 13 */
+ IfxScuCcu_Ndivider_14, /**< \brief N-divider 14 */
+ IfxScuCcu_Ndivider_15, /**< \brief N-divider 15 */
+ IfxScuCcu_Ndivider_16, /**< \brief N-divider 16 */
+ IfxScuCcu_Ndivider_17, /**< \brief N-divider 17 */
+ IfxScuCcu_Ndivider_18, /**< \brief N-divider 18 */
+ IfxScuCcu_Ndivider_19, /**< \brief N-divider 19 */
+ IfxScuCcu_Ndivider_20, /**< \brief N-divider 20 */
+ IfxScuCcu_Ndivider_21, /**< \brief N-divider 21 */
+ IfxScuCcu_Ndivider_22, /**< \brief N-divider 22 */
+ IfxScuCcu_Ndivider_23, /**< \brief N-divider 23 */
+ IfxScuCcu_Ndivider_24, /**< \brief N-divider 24 */
+ IfxScuCcu_Ndivider_25, /**< \brief N-divider 25 */
+ IfxScuCcu_Ndivider_26, /**< \brief N-divider 26 */
+ IfxScuCcu_Ndivider_27, /**< \brief N-divider 27 */
+ IfxScuCcu_Ndivider_28, /**< \brief N-divider 28 */
+ IfxScuCcu_Ndivider_29, /**< \brief N-divider 29 */
+ IfxScuCcu_Ndivider_30, /**< \brief N-divider 30 */
+ IfxScuCcu_Ndivider_31, /**< \brief N-divider 31 */
+ IfxScuCcu_Ndivider_32, /**< \brief N-divider 32 */
+ IfxScuCcu_Ndivider_33, /**< \brief N-divider 33 */
+ IfxScuCcu_Ndivider_34, /**< \brief N-divider 34 */
+ IfxScuCcu_Ndivider_35, /**< \brief N-divider 35 */
+ IfxScuCcu_Ndivider_36, /**< \brief N-divider 36 */
+ IfxScuCcu_Ndivider_37, /**< \brief N-divider 37 */
+ IfxScuCcu_Ndivider_38, /**< \brief N-divider 38 */
+ IfxScuCcu_Ndivider_39, /**< \brief N-divider 39 */
+ IfxScuCcu_Ndivider_40, /**< \brief N-divider 40 */
+ IfxScuCcu_Ndivider_41, /**< \brief N-divider 41 */
+ IfxScuCcu_Ndivider_42, /**< \brief N-divider 42 */
+ IfxScuCcu_Ndivider_43, /**< \brief N-divider 43 */
+ IfxScuCcu_Ndivider_44, /**< \brief N-divider 44 */
+ IfxScuCcu_Ndivider_45, /**< \brief N-divider 45 */
+ IfxScuCcu_Ndivider_46, /**< \brief N-divider 46 */
+ IfxScuCcu_Ndivider_47, /**< \brief N-divider 47 */
+ IfxScuCcu_Ndivider_48, /**< \brief N-divider 48 */
+ IfxScuCcu_Ndivider_49, /**< \brief N-divider 49 */
+ IfxScuCcu_Ndivider_50, /**< \brief N-divider 50 */
+ IfxScuCcu_Ndivider_51, /**< \brief N-divider 51 */
+ IfxScuCcu_Ndivider_52, /**< \brief N-divider 52 */
+ IfxScuCcu_Ndivider_53, /**< \brief N-divider 53 */
+ IfxScuCcu_Ndivider_54, /**< \brief N-divider 54 */
+ IfxScuCcu_Ndivider_55, /**< \brief N-divider 55 */
+ IfxScuCcu_Ndivider_56, /**< \brief N-divider 56 */
+ IfxScuCcu_Ndivider_57, /**< \brief N-divider 57 */
+ IfxScuCcu_Ndivider_58, /**< \brief N-divider 58 */
+ IfxScuCcu_Ndivider_59, /**< \brief N-divider 59 */
+ IfxScuCcu_Ndivider_60, /**< \brief N-divider 60 */
+ IfxScuCcu_Ndivider_61, /**< \brief N-divider 61 */
+ IfxScuCcu_Ndivider_62, /**< \brief N-divider 62 */
+ IfxScuCcu_Ndivider_63, /**< \brief N-divider 63 */
+ IfxScuCcu_Ndivider_64, /**< \brief N-divider 64 */
+ IfxScuCcu_Ndivider_65, /**< \brief N-divider 65 */
+ IfxScuCcu_Ndivider_66, /**< \brief N-divider 66 */
+ IfxScuCcu_Ndivider_67, /**< \brief N-divider 67 */
+ IfxScuCcu_Ndivider_68, /**< \brief N-divider 68 */
+ IfxScuCcu_Ndivider_69, /**< \brief N-divider 69 */
+ IfxScuCcu_Ndivider_70, /**< \brief N-divider 70 */
+ IfxScuCcu_Ndivider_71, /**< \brief N-divider 71 */
+ IfxScuCcu_Ndivider_72, /**< \brief N-divider 72 */
+ IfxScuCcu_Ndivider_73, /**< \brief N-divider 73 */
+ IfxScuCcu_Ndivider_74, /**< \brief N-divider 74 */
+ IfxScuCcu_Ndivider_75, /**< \brief N-divider 75 */
+ IfxScuCcu_Ndivider_76, /**< \brief N-divider 76 */
+ IfxScuCcu_Ndivider_77, /**< \brief N-divider 77 */
+ IfxScuCcu_Ndivider_78, /**< \brief N-divider 78 */
+ IfxScuCcu_Ndivider_79, /**< \brief N-divider 79 */
+ IfxScuCcu_Ndivider_80, /**< \brief N-divider 80 */
+ IfxScuCcu_Ndivider_81, /**< \brief N-divider 81 */
+ IfxScuCcu_Ndivider_82, /**< \brief N-divider 82 */
+ IfxScuCcu_Ndivider_83, /**< \brief N-divider 83 */
+ IfxScuCcu_Ndivider_84, /**< \brief N-divider 84 */
+ IfxScuCcu_Ndivider_85, /**< \brief N-divider 85 */
+ IfxScuCcu_Ndivider_86, /**< \brief N-divider 86 */
+ IfxScuCcu_Ndivider_87, /**< \brief N-divider 87 */
+ IfxScuCcu_Ndivider_88, /**< \brief N-divider 88 */
+ IfxScuCcu_Ndivider_89, /**< \brief N-divider 89 */
+ IfxScuCcu_Ndivider_90, /**< \brief N-divider 90 */
+ IfxScuCcu_Ndivider_91, /**< \brief N-divider 91 */
+ IfxScuCcu_Ndivider_92, /**< \brief N-divider 92 */
+ IfxScuCcu_Ndivider_93, /**< \brief N-divider 93 */
+ IfxScuCcu_Ndivider_94, /**< \brief N-divider 94 */
+ IfxScuCcu_Ndivider_95, /**< \brief N-divider 95 */
+ IfxScuCcu_Ndivider_96, /**< \brief N-divider 96 */
+ IfxScuCcu_Ndivider_97, /**< \brief N-divider 97 */
+ IfxScuCcu_Ndivider_98, /**< \brief N-divider 98 */
+ IfxScuCcu_Ndivider_99, /**< \brief N-divider 99 */
+ IfxScuCcu_Ndivider_100, /**< \brief N-divider 100 */
+ IfxScuCcu_Ndivider_101, /**< \brief N-divider 101 */
+ IfxScuCcu_Ndivider_102, /**< \brief N-divider 102 */
+ IfxScuCcu_Ndivider_103, /**< \brief N-divider 103 */
+ IfxScuCcu_Ndivider_104, /**< \brief N-divider 104 */
+ IfxScuCcu_Ndivider_105, /**< \brief N-divider 105 */
+ IfxScuCcu_Ndivider_106, /**< \brief N-divider 106 */
+ IfxScuCcu_Ndivider_107, /**< \brief N-divider 107 */
+ IfxScuCcu_Ndivider_108, /**< \brief N-divider 108 */
+ IfxScuCcu_Ndivider_109, /**< \brief N-divider 109 */
+ IfxScuCcu_Ndivider_110, /**< \brief N-divider 110 */
+ IfxScuCcu_Ndivider_111, /**< \brief N-divider 111 */
+ IfxScuCcu_Ndivider_112, /**< \brief N-divider 112 */
+ IfxScuCcu_Ndivider_113, /**< \brief N-divider 113 */
+ IfxScuCcu_Ndivider_114, /**< \brief N-divider 114 */
+ IfxScuCcu_Ndivider_115, /**< \brief N-divider 115 */
+ IfxScuCcu_Ndivider_116, /**< \brief N-divider 116 */
+ IfxScuCcu_Ndivider_117, /**< \brief N-divider 117 */
+ IfxScuCcu_Ndivider_118, /**< \brief N-divider 118 */
+ IfxScuCcu_Ndivider_119, /**< \brief N-divider 119 */
+ IfxScuCcu_Ndivider_120, /**< \brief N-divider 120 */
+ IfxScuCcu_Ndivider_121, /**< \brief N-divider 121 */
+ IfxScuCcu_Ndivider_122, /**< \brief N-divider 122 */
+ IfxScuCcu_Ndivider_123, /**< \brief N-divider 123 */
+ IfxScuCcu_Ndivider_124, /**< \brief N-divider 124 */
+ IfxScuCcu_Ndivider_125, /**< \brief N-divider 125 */
+ IfxScuCcu_Ndivider_126, /**< \brief N-divider 126 */
+ IfxScuCcu_Ndivider_127, /**< \brief N-divider 127 */
+ IfxScuCcu_Ndivider_128 /**< \brief N-divider 128 */
+} IfxScuCcu_Ndivider;
+
+/** \brief MODULE_SCU.PLLCON0.B.PDIV, specifies the P-Divider
+ */
+typedef enum
+{
+ IfxScuCcu_Pdivider_1 = 0, /**< \brief P-divider 1 */
+ IfxScuCcu_Pdivider_2, /**< \brief P-divider 2 */
+ IfxScuCcu_Pdivider_3, /**< \brief P-divider 3 */
+ IfxScuCcu_Pdivider_4, /**< \brief P-divider 4 */
+ IfxScuCcu_Pdivider_5, /**< \brief P-divider 5 */
+ IfxScuCcu_Pdivider_6, /**< \brief P-divider 6 */
+ IfxScuCcu_Pdivider_7, /**< \brief P-divider 7 */
+ IfxScuCcu_Pdivider_8, /**< \brief P-divider 8 */
+ IfxScuCcu_Pdivider_9, /**< \brief P-divider 9 */
+ IfxScuCcu_Pdivider_10, /**< \brief P-divider 10 */
+ IfxScuCcu_Pdivider_11, /**< \brief P-divider 11 */
+ IfxScuCcu_Pdivider_12, /**< \brief P-divider 12 */
+ IfxScuCcu_Pdivider_13, /**< \brief P-divider 13 */
+ IfxScuCcu_Pdivider_14, /**< \brief P-divider 14 */
+ IfxScuCcu_Pdivider_15, /**< \brief P-divider 15 */
+ IfxScuCcu_Pdivider_16 /**< \brief P-divider 16 */
+} IfxScuCcu_Pdivider;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
+ * \{ */
+/** \brief Configuration structure type for CCUCON registers.
+ */
+typedef struct
+{
+ uint32 value; /**< \brief CCUCON Register value to be updated. */
+ uint32 mask; /**< \brief CCUCON Mask to select the bit fields to be updated. */
+} IfxScuCcu_CcuconRegConfig;
+
+/** \brief Configuration structure type for the Pll initial step.
+ * This structure must be used to configure the P, N and K2 dividers for initial step.
+ */
+typedef struct
+{
+ uint8 pDivider; /**< \brief P divider value for basic (initial) step */
+ uint8 nDivider; /**< \brief N divider value for basic (initial) step */
+ uint8 k2Initial; /**< \brief K2 divider value for basic (initial) step */
+ float32 waitTime; /**< \brief Wait time for for basic (initial) step */
+} IfxScuCcu_InitialStepConfig;
+
+/** \brief Configuration structure type for the Pll Steps for current jump control.
+ */
+typedef struct
+{
+ uint8 k2Step; /**< \brief K2 divider value for this step. */
+ float32 waitTime; /**< \brief Wait time for for this step. */
+ IfxScuCcu_PllStepsFunctionHook hookFunction; /**< \brief Hook function called at the end of this step. */
+} IfxScuCcu_PllStepsConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
+ * \{ */
+/** \brief Configuration structure type for all the CCUCON registers to configure clock distribution.
+ */
+typedef struct
+{
+ IfxScuCcu_CcuconRegConfig ccucon0; /**< \brief CCUCON0 Register configuration */
+ IfxScuCcu_CcuconRegConfig ccucon1; /**< \brief CCUCON1 Register configuration */
+ IfxScuCcu_CcuconRegConfig ccucon2; /**< \brief CCUCON2 Register configuration */
+ IfxScuCcu_CcuconRegConfig ccucon5; /**< \brief CCUCON5 Register configuration */
+ IfxScuCcu_CcuconRegConfig ccucon6; /**< \brief CCUCON6 Register configuration */
+ IfxScuCcu_CcuconRegConfig ccucon7; /**< \brief CCUCON7 Register configuration */
+} IfxScuCcu_ClockDistributionConfig;
+
+/** \brief Configuration structure type for the Flash waitstate configuration.
+ */
+typedef struct
+{
+ uint32 value; /**< \brief FLASH.FCON Register value to be updated. */
+ uint32 mask; /**< \brief FLASH.FCON Mask to select the bit fields to be updated. */
+} IfxScuCcu_FlashWaitstateConfig;
+
+/** \brief Configuration structure type for the System Pll step.
+ * This structure must be used to configure the P, N and K1 dividers .
+ */
+typedef struct
+{
+ uint8 numOfPllDividerSteps; /**< \brief Number of PLL divider steps during clock throttling. */
+ IfxScuCcu_PllStepsConfig *pllDividerStep; /**< \brief Pointer to the array of Pll divider step configuration. */
+ IfxScuCcu_InitialStepConfig pllInitialStep; /**< \brief Configuration of first step which is same as internal osc frequency. */
+} IfxScuCcu_SysPllConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Ccu_Ccu
+ * \{ */
+/** \brief Configuration structure SCU module
+ */
+typedef struct
+{
+ IfxScuCcu_SysPllConfig sysPll; /**< \brief System PLL configuration */
+ IfxScuCcu_ClockDistributionConfig clockDistribution; /**< \brief Configuration of of bus clocks and other module clock distribution. */
+ IfxScuCcu_FlashWaitstateConfig flashFconWaitStateConfig; /**< \brief Configuration of flash waitstate */
+ uint32 xtalFrequency; /**< \brief Xtal Frequency */
+} IfxScuCcu_Config;
+
+/** \brief Configuration structure for E-ray PLL
+ */
+typedef struct
+{
+ IfxScuCcu_InitialStepConfig pllInitialStep; /**< \brief Configuration of first step which is same as internal osc frequency. */
+} IfxScuCcu_ErayPllConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to get EVR Oscillator frequency.
+ * This API returns the constant which is specific to the ScuCcu of the controller.
+ * \return EVR Oscillator frequency (fBACK or fEVR) in Hz.
+ */
+IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void);
+
+/** \brief API to get actual PLL2 (K3 Divider for ADC clock) frequency
+ * This API returns the PLL2ERAY frequency based on the K3 divider value in PLLERAYCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.
+ * \return PLL2ERAY (K3 Divider for ADC clock) frequency in Hz
+ */
+IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void);
+
+/** \brief API to get actual PLL2 (K3 Divider for ADC clock) frequency
+ * This API returns the PLL2 frequency based on the K3 divider value in PLLCON and the VCO frequency. This frequency is one of the configurable inputs to ADC clock.
+ * \return PLL2 (K3 Divider for ADC clock) frequency in Hz
+ */
+IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void);
+
+/** \brief Returns the clock source selection
+ * \return Clock source selection
+ */
+IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection(void);
+
+/** \brief API to get STM divider frequency.
+ * This API returns the based on the divider value in CCUCON register and fSOURCE.
+ * \return STM frequency (fSTM) in Hz
+ */
+IFX_INLINE float32 IfxScuCcu_getStmFrequency(void);
+
+/** \brief API to get CAN divider frequency.
+ * This API returns the fCAN frequency based on the divider value in CCUCON register and fSOURCE.
+ * \return STM frequency (fSTM) in Hz
+ */
+IFX_INLINE float32 IfxScuCcu_getCanFrequency(void);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to get BAUD1 divider frequency.
+ * This API returns the based on the divider value in CCUCON register and the input oscillator.
+ * \return Baud1 frequency in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getBaud1Frequency(void);
+
+/** \brief API to get BAUD2 divider frequency.
+ * This API returns the Baud2 frequency based on the divider value in CCUCON register and the fMAX.
+ * \return Baud2 frequency in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getBaud2Frequency(void);
+
+/** \brief API to get BBB divider frequency.
+ * This API returns the BBBDivider frequency based on the divider value in CCUCON register and the input oscillator.
+ * \return BBB frequency (fBBB) in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getBbbFrequency(void);
+
+/** \brief This API returns the Cpu frequency based on the divider value in CCUCON register and fSource frequency
+ * \param cpu CPU number for which effective fCPU is sought
+ * \return Cpu[x] frequency in Hz, where x is cpu number passed as parameter
+ */
+IFX_EXTERN float32 IfxScuCcu_getCpuFrequency(const IfxCpu_ResourceCpu cpu);
+
+/** \brief API to get FSI2 divider frequency in Hz.
+ * This API returns the fFSI2 frequency based on the divider value in CCUCON register and the input oscillator.
+ * \return FSI2 frequency (fFSI2) in Hz.
+ */
+IFX_EXTERN float32 IfxScuCcu_getFsi2Frequency(void);
+
+/** \brief API to get FSI divider frequency in Hz.
+ * This API returns the fFSI based on the divider value in CCUCON register and the input oscillator.
+ * \return FSI frequency (fFSI) in Hz.
+ */
+IFX_EXTERN float32 IfxScuCcu_getFsiFrequency(void);
+
+/** \brief API to get FMAX divider frequency.
+ * This API returns the fMax frequency based on the divider value in CCUCON register and the input oscillator.
+ * \return Max frequency (fMAX) in Hz.
+ */
+IFX_EXTERN float32 IfxScuCcu_getMaxFrequency(void);
+
+/** \brief get source frequency fSOURCE.
+ * This API returns the source frequency based on the configurations with CCUCON register configuration.
+ * \return Module frequency in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getModuleFrequency(void);
+
+/** \brief API to get Oscillator 0 frequency.
+ * This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.
+ * \return Osc0 frequency (fOSC0) in Hz.
+ */
+IFX_EXTERN float32 IfxScuCcu_getOsc0Frequency(void);
+
+/** \brief API to get Oscillator 0 frequency.
+ * This API returns the fOsc0 frequency based on the divider value in CCUCON register and the input oscillator.
+ * \return Osc frequency (fOSC) in Hz.
+ */
+IFX_EXTERN float32 IfxScuCcu_getOscFrequency(void);
+
+/** \brief API to get actual PLL (Eray) frequency.
+ * This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.
+ * \return frequency of Pll Eray (fPLLERAY) in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getPllErayFrequency(void);
+
+/** \brief API to get actual ERAY PLL Voltage Controlled Oscillator frequency.
+ * This API returns the based on the divider values in PLLERAYCON registers and the input oscillator.
+ * \return Pll (Eray) VCO frequency
+ */
+IFX_EXTERN float32 IfxScuCcu_getPllErayVcoFrequency(void);
+
+/** \brief API to get actual PLL output frequency.
+ * This API returns the based on the divider values in CCUCON, PLLCON registers and the input oscillator.
+ * \return Pll (fPLL) frequency in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getPllFrequency(void);
+
+/** \brief API to get actual PLL Voltage Controlled Oscillator frequency.
+ * This API returns the based on the divider values in PLLCON registers and the input oscillator.
+ * \return Pll VCO frequency
+ */
+IFX_EXTERN float32 IfxScuCcu_getPllVcoFrequency(void);
+
+/** \brief get source frequency fSOURCE.
+ * This API returns the source frequency based on the configurations with CCUCON register configuration.
+ * \return Effective fSOURCE in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getSourceFrequency(void);
+
+/** \brief API to get SPB divider frequency.
+ * This API returns the based on fSOURCE and also on Low power divider mode and/or SPBDIV divider value in CCUCON registers.
+ * \return SPB frequency (fSPB) in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getSpbFrequency(void);
+
+/** \brief API to get SRI divider frequency.
+ * This API returns the Sri frequency based on the divider values in CCUCON registers and fSOURCE.
+ * \return Sri frequency (fSRI) in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_getSriFrequency(void);
+
+/** \brief API to set CPU frequency (with CPU divider)
+ * This API configure CPU divider values in CCUCON registers. The actual frequency is always depends on the feasibility with the divider value
+ * \param cpu CPU number for which fCPU to be configured
+ * \param cpuFreq Desired CPU frequency in Hz
+ * \return Actual CPU[x] frequency in Hz, where x is the cpu number passed as parameter
+ */
+IFX_EXTERN float32 IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu cpu, float32 cpuFreq);
+
+/** \brief API to configure PLL2ERAY (K3 Divider for ADC clock) for desired frequency.
+ * This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value
+ * \param pll2ErayFreq PLL2ERAY (K3 Divider for ADC clock) frequency in Hz
+ * \return Actual PLL2 (K3 Divider for ADC clock) frequency in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_setPll2ErayFrequency(float32 pll2ErayFreq);
+
+/** \brief API to configure PLL2 (K3 Divider for ADC clock) for desired frequency.
+ * This API configure K3 divider value in CCUCON. The actual frequency always depends on the feasibility with the divider value
+ * \param pll2Freq PLL2 (K3 Divider for ADC clock) frequency in Hz
+ * \return Actual PLL2 (K3 Divider for ADC clock) frequency in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_setPll2Frequency(float32 pll2Freq);
+
+/** \brief API to set SPB frequency (with SPB divider)
+ * This API configure SPB divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
+ * \param spbFreq Desired SPB frequency in Hz
+ * \return Actual SPB frequency in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_setSpbFrequency(float32 spbFreq);
+
+/** \brief API to set SRI frequency (with SRI divider)
+ * This API configure Sri divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
+ * \param sriFreq Sri frequency (fSRI) in Hz
+ * \return Actual Sri frequency (fSRI) in Hz
+ */
+IFX_EXTERN float32 IfxScuCcu_setSriFrequency(float32 sriFreq);
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Ccu_Ccu_Configuration
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief The api calculates the system PLL divider values P, N, K based on given xtal frequency and PLL frequency.
+ * \param cfg Pointer to the configuration structure of the ScuCcu
+ * \param fPll Desired PLL frequency.
+ * \return 0- Success, 1 - Failure
+ */
+IFX_EXTERN boolean IfxScuCcu_calculateSysPllDividers(IfxScuCcu_Config *cfg, uint32 fPll);
+
+/** \brief API to initialize the SCU Clock Control Unit.
+ * This API initialize the PLL with ramp steps, BUS dividers for the configuration provided by the configuration structure.
+ * \param cfg Pointer to the configuration structure of the ScuCcu
+ * \return Error status of the ScuCcu initialization process.
+ * \retval TRUE: If an error occurred during initialization.
+ * \retval FALSE: If initialization was successful.
+ */
+IFX_EXTERN boolean IfxScuCcu_init(const IfxScuCcu_Config *cfg);
+
+/** \brief Initializes the clock configuration with default values
+ * \param cfg Pointer to the configuration structure of the ScuCcu
+ * \return None
+ */
+IFX_EXTERN void IfxScuCcu_initConfig(IfxScuCcu_Config *cfg);
+
+/** \brief API to initialize the SCU Eray Pll
+ * This API initialize the Eray PLL for the configuration provided by the configuration structure.
+ * \param cfg Pointer to the configuration structure of the Eray Pll
+ * \return Error status of the ScuCcu Eray Pll initialization process.
+ * \retval TRUE: If an error occurred during initialization.
+ * \retval FALSE: If initialization was successful.
+ */
+IFX_EXTERN boolean IfxScuCcu_initErayPll(const IfxScuCcu_ErayPllConfig *cfg);
+
+/** \brief Initializes the clock configuration with default values
+ * \param cfg Pointer to the configuration structure of the ScuCcuEray Pll
+ * \return None
+ */
+IFX_EXTERN void IfxScuCcu_initErayPllConfig(IfxScuCcu_ErayPllConfig *cfg);
+
+/** \brief API to switch to Backup clock from the current PLL frequency.
+ * \param cfg Pointer to the configuration structure of the ScuCcu
+ * \return None
+ */
+IFX_EXTERN void IfxScuCcu_switchToBackupClock(const IfxScuCcu_Config *cfg);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to get GTMdivider frequency
+ * This API returns the based on the divider value in CCUCON register and fSOURCE.
+ * return GTM frequency (fGTM) in Hz
+ * \return Gtm Frequency
+ */
+IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief API to set GTM frequency (with GTM divider)
+ * This API configure GTM divider values in CCUCON registers. The actual frequency always depends on the feasibility with the divider value
+ * \param gtmFreq Desired GTM frequency in Hz
+ * \return Actual GTM frequency in HZ
+ */
+IFX_EXTERN float32 IfxScuCcu_setGtmFrequency(float32 gtmFreq);
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+/** \brief Configuration structure for SCU CCU driver.
+ * The values of this structure are defined as # defined macros in the implementation of Scu
+ */
+IFX_EXTERN IFX_CONST IfxScuCcu_Config IfxScuCcu_defaultClockConfig;
+
+/** \brief Configuration structure for SCU CCU driver.
+ * The values of this structure are defined as # defined macros in the implementation of Scu
+ */
+IFX_EXTERN IFX_CONST IfxScuCcu_ErayPllConfig IfxScuCcu_defaultErayPllConfig;
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE float32 IfxScuCcu_getEvrFrequency(void)
+{
+ return IFXSCU_EVR_OSC_FREQUENCY;
+}
+
+
+IFX_INLINE float32 IfxScuCcu_getGtmFrequency(void)
+{
+ return IfxScuCcu_getSourceFrequency() / SCU_CCUCON1.B.GTMDIV;
+}
+
+
+IFX_INLINE float32 IfxScuCcu_getPll2ErayFrequency(void)
+{
+ float32 pll2ErayFrequency;
+
+ pll2ErayFrequency = IfxScuCcu_getPllErayVcoFrequency() / (SCU_PLLERAYCON1.B.K3DIV + 1);
+
+ return pll2ErayFrequency;
+}
+
+
+IFX_INLINE float32 IfxScuCcu_getPll2Frequency(void)
+{
+ float32 pll2Frequency;
+ pll2Frequency = IfxScuCcu_getPllVcoFrequency() / (SCU_PLLCON1.B.K3DIV + 1);
+
+ return pll2Frequency;
+}
+
+
+IFX_INLINE IfxScu_CCUCON0_CLKSEL IfxScuCcu_getSourceSelection(void)
+{
+ return (IfxScu_CCUCON0_CLKSEL)SCU_CCUCON0.B.CLKSEL;
+}
+
+
+IFX_INLINE float32 IfxScuCcu_getStmFrequency(void)
+{
+ return IfxScuCcu_getSourceFrequency() / SCU_CCUCON1.B.STMDIV;
+}
+
+
+IFX_INLINE float32 IfxScuCcu_getCanFrequency(void)
+{
+ float32 canFrequency;
+ float32 sourceFrequency;
+
+ sourceFrequency = IfxScuCcu_getSourceFrequency();
+
+ if (SCU_CCUCON1.B.CANDIV == 0)
+ {
+ canFrequency = 0.0;
+ }
+ else
+ {
+ canFrequency = sourceFrequency / SCU_CCUCON1.B.CANDIV;
+ }
+
+ return canFrequency;
+}
+
+
+#endif /* IFXSCUCCU_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuEru.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuEru.c
new file mode 100644
index 0000000..f3d0a4d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuEru.c
@@ -0,0 +1,415 @@
+/**
+ * \file IfxScuEru.c
+ * \brief SCU basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxScuEru.h"
+
+/******************************************************************************/
+/*----------------------------------Macros------------------------------------*/
+/******************************************************************************/
+
+#define IFXSCUERU_CHANNEL_NUMBER_ODD 1
+
+#define IFXSCUERU_TO_REGISTER_BASE 1
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxScuEru_clearAllEventFlags(void)
+{
+ uint32 mask = (0xFF << 16);
+ MODULE_SCU.FMR.U = mask;
+}
+
+
+void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel)
+{
+ uint32 mask = 1 << (inputChannel + 16);
+ SCU_FMR.U = mask;
+}
+
+
+void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+ uint32 mask = 0xFFFF;
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].U = (MODULE_SCU.EICR[index].U & mask);
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ mask = (mask << 16);
+ MODULE_SCU.EICR[index].U = (MODULE_SCU.EICR[index].U & mask);
+ }
+}
+
+
+void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
+{
+ // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
+ uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+ uint32 mask = 0xFFFF;
+
+ if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & mask);
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ mask = (mask << 16);
+ MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & mask);
+ }
+}
+
+
+void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.INP1 = triggerSelect;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.INP0 = triggerSelect;
+ }
+}
+
+
+void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.LDEN1 = FALSE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.LDEN0 = FALSE;
+ }
+}
+
+
+void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.FEN1 = FALSE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.FEN0 = FALSE;
+ }
+}
+
+
+void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
+{
+ // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
+ uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.IGCR[index].B.GEEN1 = FALSE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.IGCR[index].B.GEEN0 = FALSE;
+ }
+}
+
+
+void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.REN1 = FALSE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.REN0 = FALSE;
+ }
+}
+
+
+void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.EIEN1 = FALSE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.EIEN0 = FALSE;
+ }
+}
+
+
+void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.LDEN1 = TRUE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.LDEN0 = TRUE;
+ }
+}
+
+
+void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.FEN1 = TRUE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.FEN0 = TRUE;
+ }
+}
+
+
+void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel)
+{
+ // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
+ uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.IGCR[index].B.GEEN1 = TRUE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.IGCR[index].B.GEEN0 = TRUE;
+ }
+}
+
+
+void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.REN1 = TRUE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.REN0 = TRUE;
+ }
+}
+
+
+void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.EIEN1 = TRUE;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.EIEN0 = TRUE;
+ }
+}
+
+
+uint32 IfxScuEru_getAllEventFlagsStatus(void)
+{
+ return MODULE_SCU.EIFR.U;
+}
+
+
+boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel)
+{
+ uint32 mask = (1U << inputChannel);
+ return (MODULE_SCU.EIFR.U & mask) ? TRUE : FALSE;
+}
+
+
+uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+ uint32 status, mask = 0xFFFF;
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ mask = (mask << 16);
+ status = (MODULE_SCU.EICR[index].U & mask);
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ status = (MODULE_SCU.EICR[index].U & mask);
+ }
+
+ return status;
+}
+
+
+uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel)
+{
+ // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
+ uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+ uint32 status, mask = 0xFFFF;
+
+ if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ mask = (mask << 16);
+ status = (MODULE_SCU.IGCR[index].U & mask);
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ status = (MODULE_SCU.IGCR[index].U & mask);
+ }
+
+ return status;
+}
+
+
+boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel)
+{
+ uint32 mask = (1U << outputChannel);
+ return (MODULE_SCU.PDRR.U & mask) ? TRUE : FALSE;
+}
+
+
+uint32 IfxScuEru_getWholePatternDetectionResult(void)
+{
+ return MODULE_SCU.PDRR.U;
+}
+
+
+void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal)
+{
+ // select appropriate EICRi register for the given input channel X ( i = 0,1,2,3 and X = 0 to 7 )
+ uint32 index = (inputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (inputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.EICR[index].B.EXIS1 = inputSignal;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.EICR[index].B.EXIS0 = inputSignal;
+ }
+}
+
+
+void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel)
+{
+ uint32 mask = 1 << inputChannel;
+ SCU_FMR.U = mask;
+}
+
+
+void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state)
+{
+ uint32 shift, mask;
+
+ if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ shift = (inputChannel + 16); // offset at location IPEN10
+ mask = (1 << shift);
+ // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
+ uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+ MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & ~mask) | ((uint32)state << shift);
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ shift = inputChannel;
+ mask = (1 << shift);
+ // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
+ uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+ MODULE_SCU.IGCR[index].U = (MODULE_SCU.IGCR[index].U & ~mask) | ((uint32)state << shift);
+ }
+}
+
+
+void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern)
+{
+ // select appropriate IGCRj register for the given output channel Y ( j = 0,1,2,3 and Y = 0 to 7 )
+ uint32 index = (outputChannel >> IFXSCUERU_TO_REGISTER_BASE);
+
+ if (outputChannel & IFXSCUERU_CHANNEL_NUMBER_ODD) // for channels 1, 3 ,5 and 7
+ {
+ MODULE_SCU.IGCR[index].B.IGP1 = gatingPattern;
+ }
+ else // for channels 0, 2, 4 and 6
+ {
+ MODULE_SCU.IGCR[index].B.IGP0 = gatingPattern;
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuEru.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuEru.h
new file mode 100644
index 0000000..1106418
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuEru.h
@@ -0,0 +1,357 @@
+/**
+ * \file IfxScuEru.h
+ * \brief SCU basic functionality
+ * \ingroup IfxLld_Scu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Scu_Std_Eru Eru Basic Functionality
+ * \ingroup IfxLld_Scu_Std
+ * \defgroup IfxLld_Scu_Std_Eru_Enum ERU: Enumerations
+ * \ingroup IfxLld_Scu_Std_Eru
+ * \defgroup IfxLld_Scu_Std_Eru_External_Request_Selection ERU: External Request Selection
+ * \ingroup IfxLld_Scu_Std_Eru
+ * \defgroup IfxLld_Scu_Std_Eru_Event_Trigger_Logic ERU: Event Trigger Logic
+ * \ingroup IfxLld_Scu_Std_Eru
+ * \defgroup IfxLld_Scu_Std_Eru_Connecting_Matrix ERU: Connecting Matrix
+ * \ingroup IfxLld_Scu_Std_Eru
+ * \defgroup IfxLld_Scu_Std_Eru_Output_Gating_Unit ERU: Output Gating Unit
+ * \ingroup IfxLld_Scu_Std_Eru
+ * \defgroup IfxLld_Scu_Std_Eru_Data_Structures ERU: Data Structures
+ * \ingroup IfxLld_Scu_Std_Eru
+ */
+
+#ifndef IFXSCUERU_H
+#define IFXSCUERU_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxScu_cfg.h"
+#include "IfxScu_reg.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "_PinMap/IfxScu_PinMap.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Scu_Std_Eru_Enum
+ * \{ */
+/** \brief Input line selection for input channel\n
+ * Definition in Ifx_SCU.EICR[i].B.EXIS(j) (i = 0,1,2,3 and j = 0,1)
+ */
+typedef enum
+{
+ IfxScuEru_ExternalInputSelection_0 = 0, /**< \brief External input 0 is selected */
+ IfxScuEru_ExternalInputSelection_1, /**< \brief External input 1 is selected */
+ IfxScuEru_ExternalInputSelection_2, /**< \brief External input 2 is selected */
+ IfxScuEru_ExternalInputSelection_3 /**< \brief External input 3 is selected */
+} IfxScuEru_ExternalInputSelection;
+
+/** \brief Input channel for input selection and conditioning of trigger or gating functions
+ */
+typedef enum
+{
+ IfxScuEru_InputChannel_0 = 0, /**< \brief External Input channel 0 */
+ IfxScuEru_InputChannel_1, /**< \brief External Input channel 1 */
+ IfxScuEru_InputChannel_2, /**< \brief External Input channel 2 */
+ IfxScuEru_InputChannel_3, /**< \brief External Input channel 3 */
+ IfxScuEru_InputChannel_4, /**< \brief External Input channel 4 */
+ IfxScuEru_InputChannel_5, /**< \brief External Input channel 5 */
+ IfxScuEru_InputChannel_6, /**< \brief External Input channel 6 */
+ IfxScuEru_InputChannel_7 /**< \brief External Input channel 7 */
+} IfxScuEru_InputChannel;
+
+/** \brief Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j)).\n
+ * Definition in Ifx_SCU.EICR[i].B.INP(j) (i = 0,1,2,3 and j = 0,1)
+ */
+typedef enum
+{
+ IfxScuEru_InputNodePointer_0 = 0, /**< \brief Event from input ETLx triggers output OGU0 (signal TRx0) */
+ IfxScuEru_InputNodePointer_1, /**< \brief Event from input ETLx triggers output OGU1 (signal TRx1) */
+ IfxScuEru_InputNodePointer_2, /**< \brief Event from input ETLx triggers output OGU2 (signal TRx2) */
+ IfxScuEru_InputNodePointer_3, /**< \brief Event from input ETLx triggers output OGU3 (signal TRx3) */
+ IfxScuEru_InputNodePointer_4, /**< \brief Event from input ETLx triggers output OGU4 (signal TRx4) */
+ IfxScuEru_InputNodePointer_5, /**< \brief Event from input ETLx triggers output OGU5 (signal TRx5) */
+ IfxScuEru_InputNodePointer_6, /**< \brief Event from input ETLx triggers output OGU6 (signal TRx6) */
+ IfxScuEru_InputNodePointer_7 /**< \brief Event from input ETLx triggers output OGU7 (signal TRx7) */
+} IfxScuEru_InputNodePointer;
+
+/** \brief Determines the pattern detection influence on the ouput lines ERU_GOUTy and ERU_IOUTy\n
+ * Definition in Ifx_SCU.IGCR[i].B.IGP(j) (i = 0,1,2,3 and j = 0,1)
+ */
+typedef enum
+{
+ IfxScuEru_InterruptGatingPattern_none = 0, /**< \brief IOUTy is inactive, (the pattern is not considered) */
+ IfxScuEru_InterruptGatingPattern_alwaysActive = 1, /**< \brief IOUTy is activated in response to a trigger event, (the pattern is not considered) */
+ IfxScuEru_InterruptGatingPattern_patternMatch = 2, /**< \brief IOUTy is activated if a trigger event occures while the pattern is present, (the pattern is considered) */
+ IfxScuEru_InterruptGatingPattern_patternMiss = 3 /**< \brief IOUTy is activated if a trigger event occures while the pattern is not present, (the pattern is not considered) */
+} IfxScuEru_InterruptGatingPattern;
+
+/** \brief Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
+ */
+typedef enum
+{
+ IfxScuEru_OutputChannel_0 = 0, /**< \brief Output channel 0 */
+ IfxScuEru_OutputChannel_1, /**< \brief Output channel 1 */
+ IfxScuEru_OutputChannel_2, /**< \brief Output channel 2 */
+ IfxScuEru_OutputChannel_3, /**< \brief Output channel 3 */
+ IfxScuEru_OutputChannel_4, /**< \brief Output channel 4 */
+ IfxScuEru_OutputChannel_5, /**< \brief Output channel 5 */
+ IfxScuEru_OutputChannel_6, /**< \brief Output channel 6 */
+ IfxScuEru_OutputChannel_7 /**< \brief Output channel 7 */
+} IfxScuEru_OutputChannel;
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Eru_External_Request_Selection
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialises the External request Pin
+ * \param req External request pin
+ * \param inputMode Port Input mode
+ * \return None
+ */
+IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Determines which input line is selcted for input channel x
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \param inputSignal Input line selection for input channel
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_selectExternalInput(IfxScuEru_InputChannel inputChannel, IfxScuEru_ExternalInputSelection inputSignal);
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Eru_Event_Trigger_Logic
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears the external event flag of input channel x (INTFx)
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_clearAllEventFlags(void);
+
+/** \brief Clears the external event flag of input channel x (INTFx)
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_clearEventFlag(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Clears all the configuration for the given input channel x
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_clearInputChannelConfiguration(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Disables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_disableAutoClear(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Disables the falling edge of input channel to set the bit INTF x
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_disableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Disables the rising edge of input channel to set the bit INTF x
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_disableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Enables the automatic clearing of INTFx when the edge of input channel which has not been selected, is detected
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_enableAutoClear(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Enables the falling edge of input channel to set the bit INTF x
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_enableFallingEdgeDetection(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Enables the rising edge of input channel to set the bit INTF x
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_enableRisingEdgeDetection(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Returns the status of the flags of all input channels
+ * \return All flags Status
+ */
+IFX_EXTERN uint32 IfxScuEru_getAllEventFlagsStatus(void);
+
+/** \brief Returns the status of the external event flag of input channel x (INTFx)
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return Status (TRUE / FALSE)
+ */
+IFX_EXTERN boolean IfxScuEru_getEventFlagStatus(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Returns all the configuration for the given input channel x
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return Input channel configuration
+ */
+IFX_EXTERN uint32 IfxScuEru_getInputChannelConfiguration(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Sets the external event flag of input channel x (INTFx)
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_setEventFlag(IfxScuEru_InputChannel inputChannel);
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Eru_Connecting_Matrix
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Determines the destination (output channel) for trigger event (if enabled by Ifx_SCU.EICR[i].B.EIEN(j), i = 0,1,2,3 and j = 0,1).
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \param triggerSelect Trigger event selection
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_connectTrigger(IfxScuEru_InputChannel inputChannel, IfxScuEru_InputNodePointer triggerSelect);
+
+/** \brief Disables the generation of a trigger event for input channel x when the selected edge is detected
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_disableTriggerPulse(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Enables the generation of a trigger event for input channel x when the selected edge is detected
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_enableTriggerPulse(IfxScuEru_InputChannel inputChannel);
+
+/** \brief Enables the flag INTFx to take part in the pattern detection for output gating
+ * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
+ * \param inputChannel Input channel for input selection and conditioning of trigger or gating functions
+ * \param state FALSE: the bit INTFx does not take part in the pattern detection IPENjy = 0\n
+ * TRUE : the bit INTFx is taken into consideration for the pattern detection IPENjy = 1
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_setFlagPatternDetection(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InputChannel inputChannel, boolean state);
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Eru_Output_Gating_Unit
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clears all the configuration for the given input channel y
+ * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_clearOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel);
+
+/** \brief Disables the generation of a trigger event for output channel y when the result of the pattern detection changes
+ * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_disablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel);
+
+/** \brief Enables the generation of a trigger event for output channel y when the result of the pattern detection changes
+ * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_enablePatternDetectionTrigger(IfxScuEru_OutputChannel outputChannel);
+
+/** \brief Clears all the configuration for the given input channel y
+ * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
+ * \return Output channel configuration
+ */
+IFX_EXTERN uint32 IfxScuEru_getOutputChannelConfiguration(IfxScuEru_OutputChannel outputChannel);
+
+/** \brief Returns the status of the pattern detection result of output channel y (PDRy)
+ * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
+ * \return Status (TRUE / FALSE)
+ */
+IFX_EXTERN boolean IfxScuEru_getPatternDetectionResult(IfxScuEru_OutputChannel outputChannel);
+
+/** \brief Returns the whole pattern detection result of all the selcted output channels
+ * \return Detected pattern
+ */
+IFX_EXTERN uint32 IfxScuEru_getWholePatternDetectionResult(void);
+
+/** \brief Sets the gating pattern of a ouput channel y to determine how the pattern detection influences the output lines GOUT and IOUT
+ * \param outputChannel Output channel for combination of events, definition of their effects and distribution to the system (interrupt generation, ...)
+ * \param gatingPattern Interrupt gating pattern to determine how the pattern detection influences the ouput lines GOUT and IOUT
+ * \return None
+ */
+IFX_EXTERN void IfxScuEru_setInterruptGatingPattern(IfxScuEru_OutputChannel outputChannel, IfxScuEru_InterruptGatingPattern gatingPattern);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxScuEru_initReqPin(IfxScu_Req_In *req, IfxPort_InputMode inputMode)
+{
+ IfxPort_setPinModeInput(req->pin.port, req->pin.pinIndex, inputMode);
+ IfxScuEru_selectExternalInput((IfxScuEru_InputChannel)req->channelId, (IfxScuEru_ExternalInputSelection)req->select);
+}
+
+
+#endif /* IFXSCUERU_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.asm.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.asm.h
new file mode 100644
index 0000000..ba07e47
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.asm.h
@@ -0,0 +1,135 @@
+/**
+ * \file IfxScuWdt.asm.h
+ * \brief SCU basic functionality
+ * \ingroup IfxLld_Scu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Scu_Std_Wdt_Operative Wdt Operative Functionality
+ * \ingroup IfxLld_Scu_Std_Wdt
+ */
+#ifndef IFXSCUWDT_ASM_H
+#define IFXSCUWDT_ASM_H 1
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxScu_reg.h"
+
+/** \addtogroup IfxLld_Scu_Std_Wdt_Operative
+ * \{ */
+#define IFXSCUWDT_CALCULATELFSR(pwd) ((((((pwd) >> 13) ^ ((pwd) >> 12) ^ ((pwd) >> 11) ^ ((pwd) >> 1 )) & 1)) | (((pwd)<<1) & 0x3FFF))
+/**
+ * \brief SCUWDT Inline API utility to Calculte new 14-bit LFSR.
+ *
+ * This API will Calculte new 14-bit LFSR (Linear Feedback Shift Register) with characteristic polynomial
+ * x14+x13+x12+x2+1.
+ *
+ * \param password Password for which LFSR value to be calculated.
+ * \return New LFSR.
+ */
+IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 password);
+/** \} */
+
+/**
+ * \brief SCUWDT Inline API utility to Calculte new 14-bit LFSR.
+ */
+#if defined(__HIGHTEC__)
+IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
+{
+ /* *INDENT-OFF* */
+ uint32 temp = pwd;
+ uint16 res;
+
+ __asm("xor.t %0,%1,13,%1,12 \n\
+ xor.t %0,%0,0,%1,11 \n\
+ sh.xor.t %1,%0,0,%1,1 \n\
+ extr.u %0,%1,0,14 \n" : "=&d" (res) : "d" (temp));
+ return res;
+ /* *INDENT-ON* */
+}
+#endif
+#if defined(__TASKING__)
+IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
+{
+ /* *INDENT-OFF* */
+ uint32 temp = pwd;
+ uint16 res;
+
+ __asm("xor.t %0,%1,13,%1,12 \n\
+ xor.t %0,%0,0,%1,11 \n\
+ sh.xor.t %1,%0,0,%1,1 \n\
+ mov d4,#0 \n\
+ mov d5,#14 \n\
+ extr.u %0,%1,e4 \n" : "=&d" (res) : "d" (temp));
+ return res;
+ /* *INDENT-ON* */
+}
+#endif
+#if defined(__DCC__)
+/* *INDENT-OFF* */
+asm uint16 IfxScuWdt_calculateLfsr_asm(uint16 password)
+{
+%reg password
+!"%d2"
+ xor.t %d2, password, 13, password, 12
+ xor.t %d2, %d2, 0, password, 11
+ sh.xor.t password,%d2,0,password,1
+ extr.u %d2,password,0,14
+}
+/* *INDENT-ON* */
+IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
+{
+ return IfxScuWdt_calculateLfsr_asm(pwd);
+}
+#endif
+#if defined(__ghs__)
+IFX_INLINE uint16 IfxScuWdt_calculateLfsr(uint16 pwd)
+{
+ /* *INDENT-OFF* */
+ uint32 temp = pwd;
+ uint16 res;
+
+ __asm("xor.t %0,%1,13,%1,12 \n\
+ xor.t %0,%0,0,%1,11 \n\
+ sh.xor.t %1,%0,0,%1,1 \n\
+ extr.u %0,%1,0,14 \n" : "=&d" (res) : "d" (temp));
+ return res;
+ /* *INDENT-ON* */
+}
+#endif
+#endif
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.c
new file mode 100644
index 0000000..167658f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.c
@@ -0,0 +1,484 @@
+/**
+ * \file IfxScuWdt.c
+ * \brief SCU basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxScuWdt.h"
+#include "Cpu/Std/IfxCpu.h"
+
+/******************************************************************************/
+/*----------------------------------Macros------------------------------------*/
+/******************************************************************************/
+
+/** \brief Reset password of watchdog module.
+ */
+#define IFXSCUWDT_RESET_PASSWORD (0x3CU)
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword)
+{
+ Ifx_SCU_WDTCPU *watchdog = &MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()];
+
+ /* Read Config_0 register */
+ Ifx_SCU_WDTCPU_CON0 wdt_con0;
+ wdt_con0.U = watchdog->CON0.U;
+
+ if (wdt_con0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 0;
+ wdt_con0.B.PW = password;
+
+ /* Password ready. Store it to WDT_CON0 to unprotect the register */
+ watchdog->CON0.U = wdt_con0.U;
+ }
+
+ /* Set new Password, ENDINT and LCK bit in Config_0 register */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 1;
+ wdt_con0.B.PW = newPassword;
+ watchdog->CON0.U = wdt_con0.U;
+
+ /* read back ENDINIT and wait until it has been set */
+ while (watchdog->CON0.B.ENDINIT == 0)
+ {}
+}
+
+
+void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload)
+{
+ /* Select CPU Watchdog based on Core Id */
+ uint32 coreId = IfxCpu_getCoreIndex();
+ Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
+
+ /* Read Config_0 register */
+ Ifx_SCU_WDTCPU_CON0 wdt_con0;
+ wdt_con0.U = wdt->CON0.U;
+
+ if (wdt_con0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 0;
+ wdt_con0.B.PW = password;
+
+ /* Password ready. Store it to WDT_CON0 to unprotect the register */
+ wdt->CON0.U = wdt_con0.U;
+ }
+
+ /* Set new Reload value, set ENDINT and LCK bit in Config_0 register */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 1;
+ wdt_con0.B.REL = reload;
+ wdt->CON0.U = wdt_con0.U;
+
+ /* read back ENDINIT and wait until it has been set */
+ while (wdt->CON0.B.ENDINIT == 0)
+ {}
+}
+
+
+void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword)
+{
+ Ifx_SCU_WDTS *watchdog = &MODULE_SCU.WDTS;
+
+ /* Read Config_0 register */
+ Ifx_SCU_WDTS_CON0 wdt_con0;
+ wdt_con0.U = watchdog->CON0.U;
+
+ if (wdt_con0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 0;
+ wdt_con0.B.PW = password;
+
+ /* Password ready. Store it to WDT_CON0 to unprotect the register */
+ watchdog->CON0.U = wdt_con0.U;
+ }
+
+ /* Set new Password, ENDINT and LCK bit in Config_0 register */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 1;
+ wdt_con0.B.PW = newPassword;
+ watchdog->CON0.U = wdt_con0.U;
+
+ /* read back ENDINIT and wait until it has been set */
+ while (watchdog->CON0.B.ENDINIT == 0)
+ {}
+}
+
+
+void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload)
+{
+ /* Initialize pointer to Safety Watchdog */
+ Ifx_SCU_WDTS *wdt = &MODULE_SCU.WDTS;
+
+ /* Read Config_0 register */
+ Ifx_SCU_WDTS_CON0 wdt_con0;
+ wdt_con0.U = wdt->CON0.U;
+
+ if (wdt_con0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 0;
+ wdt_con0.B.PW = password;
+
+ /* Password ready. Store it to WDT_CON0 to unprotect the register */
+ wdt->CON0.U = wdt_con0.U;
+ }
+
+ /* Set new Reload value, set ENDINT and LCK bit in Config_0 register */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 1;
+ wdt_con0.B.REL = reload;
+ wdt->CON0.U = wdt_con0.U;
+
+ /* read back ENDINIT and wait until it has been set */
+ while (wdt->CON0.B.ENDINIT == 0)
+ {}
+}
+
+
+void IfxScuWdt_clearCpuEndinit(uint16 password)
+{
+ IfxScuWdt_clearCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
+}
+
+
+void IfxScuWdt_clearSafetyEndinit(uint16 password)
+{
+ IfxScuWdt_clearSafetyEndinitInline(password);
+}
+
+
+void IfxScuWdt_disableCpuWatchdog(uint16 password)
+{
+ /* Select CPU Watchdog based on Core Id */
+ uint32 coreId = (uint32)IfxCpu_getCoreIndex();
+ Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
+
+ IfxScuWdt_clearCpuEndinitInline(wdt, password);
+ wdt->CON1.B.DR = 1; //Set DR bit in Config_1 register
+ IfxScuWdt_setCpuEndinitInline(wdt, password);
+}
+
+
+void IfxScuWdt_disableSafetyWatchdog(uint16 password)
+{
+ IfxScuWdt_clearSafetyEndinitInline(password);
+ SCU_WDTS_CON1.B.DR = 1; //Set DR bit in Config_1 register
+ IfxScuWdt_setSafetyEndinitInline(password);
+}
+
+
+void IfxScuWdt_enableCpuWatchdog(uint16 password)
+{
+ /* Select CPU Watchdog based on Core Id */
+ uint32 coreId = (uint32)IfxCpu_getCoreIndex();
+ Ifx_SCU_WDTCPU *wdt = &MODULE_SCU.WDTCPU[coreId];
+
+ IfxScuWdt_clearCpuEndinitInline(wdt, password);
+ wdt->CON1.B.DR = 0; //Clear DR bit in Config_1 register
+ IfxScuWdt_setCpuEndinitInline(wdt, password);
+}
+
+
+void IfxScuWdt_enableSafetyWatchdog(uint16 password)
+{
+ IfxScuWdt_clearSafetyEndinitInline(password);
+ SCU_WDTS_CON1.B.DR = 0; //Clear DR bit in Config_1 register
+ IfxScuWdt_setSafetyEndinitInline(password);
+}
+
+
+uint16 IfxScuWdt_getCpuWatchdogPassword(void)
+{
+ return IfxScuWdt_getCpuWatchdogPasswordInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
+}
+
+
+boolean IfxScuWdt_getCpuWatchdogEndInit(void)
+{
+ return (boolean)IfxScuWdt_getCpuWatchdogEndInitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()]);
+}
+
+
+uint16 IfxScuWdt_getSafetyWatchdogPassword(void)
+{
+ return IfxScuWdt_getSafetyWatchdogPasswordInline();
+}
+
+
+void IfxScuWdt_initConfig(IfxScuWdt_Config *config)
+{
+ config->password = IFXSCUWDT_RESET_PASSWORD;
+ config->reload = 0xFFFC;
+ config->inputFrequency = IfxScu_WDTCON1_IR_divBy16384;
+ config->disableWatchdog = FALSE;
+ config->enableSmuRestriction = FALSE;
+ config->enableAutomaticPasswordChange = FALSE;
+ config->enableTimerCheck = FALSE;
+ config->enableTimerCheckTolerance = FALSE;
+ config->clrInternalResetFlag = FALSE;
+}
+
+
+void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config)
+{
+ Ifx_SCU_WDTCPU_CON0 wdt_con0;
+ Ifx_SCU_WDTCPU_CON1 wdt_con1;
+
+ /* Read Config_0 register and clear wdt_con1 variable */
+ wdt_con0.U = wdt->CON0.U;
+ wdt_con1.U = 0;
+
+ if (wdt_con0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 0;
+ wdt_con0.B.PW ^= 0x003F;
+
+ /* Password ready. Store it to WDT_CON0 to unprotect the register */
+ wdt->CON0.U = wdt_con0.U;
+ }
+
+ /* Initialize CON0 register, with modify access, with user defined parameters
+ * Clear ENDINT bit to unprotect CON1 register for initialization
+ * see Table 3 (Modify Access Bit Pattern Requirements) */
+ wdt_con0.B.ENDINIT = 0;
+ wdt_con0.B.LCK = 1;
+ wdt_con0.B.PW = config->password; //user defined password
+ wdt_con0.B.REL = config->reload; //user defined reload value
+
+ /* Modify access ready - write WDT_CON0 register */
+ wdt->CON0.U = wdt_con0.U;
+
+ /* read back ENDINIT and wait until it has been cleared */
+ while (wdt->CON0.B.ENDINIT == 1)
+ {}
+
+ /* Initialize CON1 register */
+ switch (config->inputFrequency)
+ {
+ case IfxScu_WDTCON1_IR_divBy16384:
+ wdt_con1.B.IR0 = 0;
+ wdt_con1.B.IR1 = 0;
+ break;
+ case IfxScu_WDTCON1_IR_divBy256:
+ wdt_con1.B.IR0 = 1;
+ wdt_con1.B.IR1 = 0;
+ break;
+ case IfxScu_WDTCON1_IR_divBy64:
+ wdt_con1.B.IR0 = 0;
+ wdt_con1.B.IR1 = 1;
+ break;
+ }
+
+ wdt_con1.B.DR = config->disableWatchdog ? 1 : 0;
+ wdt_con1.B.UR = config->enableSmuRestriction ? 1 : 0;
+ wdt_con1.B.PAR = config->enableAutomaticPasswordChange ? 1 : 0;
+ wdt_con1.B.TCR = config->enableTimerCheck ? 1 : 0;
+ wdt_con1.B.TCTR = config->enableTimerCheckTolerance ? 1 : 0;
+
+ /* Finally write CON1 with user defined configuration */
+ wdt->CON1.U = wdt_con1.U;
+
+ /* Initialization finished - set CPU ENDINIT protection */
+ IfxScuWdt_setCpuEndinit(config->password);
+}
+
+
+void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config)
+{
+ Ifx_SCU_WDTS_CON0 wdt_con0;
+ Ifx_SCU_WDTS_CON1 wdt_con1;
+
+ /* Read Config_0 register and clear wdt_con1 variable */
+ wdt_con0.U = wdt->CON0.U;
+ wdt_con1.U = 0;
+
+ if (wdt_con0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ wdt_con0.B.ENDINIT = 1;
+ wdt_con0.B.LCK = 0;
+ wdt_con0.B.PW ^= 0x003F;
+
+ /* Password ready. Store it to WDT_CON0 to unprotect the register */
+ wdt->CON0.U = wdt_con0.U;
+ }
+
+ /* Initialize CON0 register, with modify access, with user defined parameters
+ * Clear ENDINT bit to unprotect CON1 register for initialization
+ * see Table 3 (Modify Access Bit Pattern Requirements) */
+ wdt_con0.B.ENDINIT = 0;
+ wdt_con0.B.LCK = 1;
+ wdt_con0.B.PW = config->password; //user defined password
+ wdt_con0.B.REL = config->reload; //user defined reload value
+
+ /* Modify access ready - write WDT_CON0 register */
+ wdt->CON0.U = wdt_con0.U;
+
+ /* read back ENDINIT and wait until it has been cleared */
+ while (wdt->CON0.B.ENDINIT == 1)
+ {}
+
+ /* Initialize CON1 register */
+ switch (config->inputFrequency)
+ {
+ case IfxScu_WDTCON1_IR_divBy16384:
+ wdt_con1.B.IR0 = 0;
+ wdt_con1.B.IR1 = 0;
+ break;
+ case IfxScu_WDTCON1_IR_divBy256:
+ wdt_con1.B.IR0 = 1;
+ wdt_con1.B.IR1 = 0;
+ break;
+ case IfxScu_WDTCON1_IR_divBy64:
+ wdt_con1.B.IR0 = 0;
+ wdt_con1.B.IR1 = 1;
+ break;
+ }
+
+ wdt_con1.B.DR = config->disableWatchdog ? 1 : 0;
+ wdt_con1.B.UR = config->enableSmuRestriction ? 1 : 0;
+ wdt_con1.B.PAR = config->enableAutomaticPasswordChange ? 1 : 0;
+ wdt_con1.B.TCR = config->enableTimerCheck ? 1 : 0;
+ wdt_con1.B.TCTR = config->enableTimerCheckTolerance ? 1 : 0;
+ wdt_con1.B.CLRIRF = config->clrInternalResetFlag ? 0 : 1;
+
+ /* Finally write CON1 with user defined configuration */
+ wdt->CON1.U = wdt_con1.U;
+
+ /* Initialization finished - set Safety ENDINIT protection */
+ IfxScuWdt_setSafetyEndinit(config->password);
+}
+
+
+void IfxScuWdt_serviceCpuWatchdog(uint16 password)
+{
+ IfxScuWdt_setCpuEndinit(password);
+}
+
+
+void IfxScuWdt_serviceSafetyWatchdog(uint16 password)
+{
+ IfxScuWdt_setSafetyEndinit(password);
+}
+
+
+void IfxScuWdt_setCpuEndinit(uint16 password)
+{
+ IfxScuWdt_setCpuEndinitInline(&MODULE_SCU.WDTCPU[IfxCpu_getCoreIndex()], password);
+}
+
+
+void IfxScuWdt_setSafetyEndinit(uint16 password)
+{
+ IfxScuWdt_setSafetyEndinitInline(password);
+}
+
+
+boolean IfxScuWdt_enableWatchdogWithDebugger(void)
+{
+ boolean status = 0, oenEnabled = 0, watchdogEnabled = 0;
+ uint32 ostateValue;
+
+ volatile uint32 *oecPtr = (volatile uint32 *)0xF0000478;
+ volatile uint32 *ostatePtr = (volatile uint32 *)0xF0000480;
+ volatile uint32 *ocntrlPtr = (volatile uint32 *)0xF000047C;
+
+ /* read OSTATE.OEN */
+ ostateValue = *ostatePtr;
+ oenEnabled = (ostateValue & 0x00000001);
+
+ if (!oenEnabled)
+ {
+ /* enable the debug interface (OSTATE.OEN )if it is not already enabled */
+ /* pattern for enabling OSTATE.OEN */
+ *oecPtr = 0xA1;
+ *oecPtr = 0x5E;
+ *oecPtr = 0xA1;
+ *oecPtr = 0x5E;
+
+ /* read OSTATE.OEN again*/
+ ostateValue = *ostatePtr;
+ oenEnabled = (ostateValue & 0x00000001);
+ }
+
+ if (oenEnabled)
+ {
+ /* set watchdog suspend bit in OSTATE reg, by writing OCNTRL.WDTSUS and OCNTRL.WDTSUS_P together */
+ *ocntrlPtr = 0x00003000;
+ }
+ else
+ {
+ status = 1;
+ }
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, oenEnabled == 1);
+
+ /* read OSTATE.WDTSUS */
+ ostateValue = *ostatePtr;
+ watchdogEnabled = (ostateValue & 0x00000080);
+
+ if (!watchdogEnabled)
+ {
+ status = 1;
+ }
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, watchdogEnabled == 1);
+
+ return status;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.h
new file mode 100644
index 0000000..4aeb14a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Scu/Std/IfxScuWdt.h
@@ -0,0 +1,570 @@
+/**
+ * \file IfxScuWdt.h
+ * \brief SCU basic functionality
+ * \ingroup IfxLld_Scu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * This file contains the APIs for SCU Watchdog and Endinit related functions.
+ *
+ * \defgroup IfxLld_Scu_Std_Wdt Wdt Basic Functionality
+ * \ingroup IfxLld_Scu_Std
+ * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Configuration Watchdog Configuration functions
+ * \ingroup IfxLld_Scu_Std_Wdt
+ * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Endinit Watchdog Endinit functions
+ * \ingroup IfxLld_Scu_Std_Wdt
+ * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Operative Watchdog Operative functions
+ * \ingroup IfxLld_Scu_Std_Wdt
+ * \defgroup IfxLld_Scu_Std_Wdt_Wdt_Endinit_Usage How to use Endinit APIs?
+ * \ingroup IfxLld_Scu_Std_Wdt
+ */
+
+#ifndef IFXSCUWDT_H
+#define IFXSCUWDT_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxScu_cfg.h"
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxScu_reg.h"
+#include "IfxScu_bf.h"
+#include "IfxScuWdt.asm.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Endinit operation Timeout counter
+ */
+#define IFXSCUWDT_ENDINIT_WAIT_TIMEOUTCOUNT (0x100)
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \brief Configuration structure for Scu Watchdog.
+ * IfxScuWdt_Config is a type describing configuration structure of CPU and
+ * Safety WDT registers defined in IfxScuWdt.h file.
+ */
+typedef struct
+{
+ uint16 password; /**< \brief password for access to WDTxCON0 reg */
+ uint16 reload; /**< \brief WDT reload value */
+ IfxScu_WDTCON1_IR inputFrequency; /**< \brief input frequency of the WDT */
+ boolean disableWatchdog; /**< \brief Disable Request Control Bit */
+ boolean enableSmuRestriction; /**< \brief Unlock Restriction Request Control Bit */
+ boolean enableAutomaticPasswordChange; /**< \brief Password Auto-sequence Request Bit */
+ boolean enableTimerCheck; /**< \brief Counter Check Request Bit */
+ boolean enableTimerCheckTolerance; /**< \brief Timer Check Tolerance Request */
+ boolean clrInternalResetFlag; /**< \brief Clear Internal Reset Flag */
+} IfxScuWdt_Config;
+
+/** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Configuration
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief SCUWDT API to initialize WDT configuration structure - Constructor
+ * This API initialize the ScuWdt configuration structure to default values, these default
+ * values are for software specific, not necessarily hardware reset values.
+ * User must use this API call before IfxScuWdt_Init API call
+ * \param config ScuWdt configuration structure to be initialized
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_initConfig(IfxScuWdt_Config *config);
+
+/** \brief SCUWDT API to initialize an instance of WDT Driver which corresponds to CPU WDT Hardware module.
+ *
+ * This API initialize the ScuWdt software driver and corresponding CPU WDT hardware module.
+ * User can configure project specific Watchdog password, Watchdog timer period and other settings
+ * with this interface.
+ * API corresponds to one instance of the hardware module.
+ * User must use this API call for each instance of the WDT hardware module used.
+ * \param wdt reference to register map of CPU WDT hardware instance
+ * \param config ScuWdt configuration structure
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_initCpuWatchdog(Ifx_SCU_WDTCPU *wdt, const IfxScuWdt_Config *config);
+
+/** \brief SCUWDT API to initialize an instance of WDT Driver which corresponds to Safety WDT Hardware module.
+ *
+ * This API initialize the ScuWdt software driver and corresponding safety WDT hardware module.
+ * User can configure project specific Watchdog password, Watchdog timer period and other settings
+ * with this interface.
+ * API corresponds to one instance of the hardware module.
+ * User must use this API call for each instance of the WDT hardware module used.
+ * \param wdt reference to register map of Safety WDT hardware instance
+ * \param config ScuWdt configuration structure
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_initSafetyWatchdog(Ifx_SCU_WDTS *wdt, const IfxScuWdt_Config *config);
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Endinit
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief SCUWDT Inline API to Clear ENDINIT bit provided by CPU WDT Hardware module.
+ *
+ * This Inline API will disable ENDINIT functionality provided by CPU WDT Hardware module.
+ * This API is only meant to be used with startup routines where function call is not possible.
+ * User need to use this API call before modifying any ENDINIT protected register. User must
+ * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
+ * ENDINIT shall not be interrupted by another interrupt/call.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
+ * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password);
+
+/** \brief SCUWDT Inline API to Clear ENDINIT bit provided by Safety WDT Hardware module.
+ *
+ * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
+ * This API is only meant to be used with startup routines where function call is not possible.
+ * User need to use this API call before modifying any ENDINIT protected register. User must
+ * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
+ * ENDINIT shall not be interrupted by another interrupt/call.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password);
+
+/** \brief SCUWDT Inline API to Set ENDINIT bit provided by CPU WDT Hardware module.
+ *
+ * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
+ * This API is only meant to be used with startup routines where function call is not possible.
+ * User need to use this API call after modifying any ENDINIT protected register.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
+ * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password);
+
+/** \brief SCUWDT Inline API to Set ENDINIT bit provided by Safety WDT Hardware module.
+ *
+ * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
+ * This API is only meant to be used with startup routines where function call is not possible.
+ * User need to use this API call after modifying any ENDINIT protected register.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief SCUWDT API to Clear ENDINIT bit provided by CPU WDT Hardware module.
+ *
+ * This API will disable ENDINIT functionality provided by CPU WDT Hardware module.
+ * User need to use this API call before modifying any ENDINIT protected register. User must
+ * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
+ * ENDINIT shall not be interrupted by another interrupt/call.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_clearCpuEndinit(uint16 password);
+
+/** \brief SCUWDT API to Clear ENDINIT bit provided by Safety WDT Hardware module.
+ *
+ * This API will disable ENDINIT functionality provided by Safety WDT Hardware module.
+ * User need to use this API call before modifying any ENDINIT protected register. User must
+ * always set the ENDINIT bit using other API IfxScuWdt_setCpuEndinit. The sequence clear and set
+ * ENDINIT shall not be interrupted by another interrupt/call.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_clearSafetyEndinit(uint16 password);
+
+/** \brief SCUWDT API to set ENDINIT bit provided by CPU WDT Hardware module.
+ *
+ * This API will enable ENDINIT functionality provided by CPU WDT Hardware module.
+ * User need to use this API call after modifying any ENDINIT protected register.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword)
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_setCpuEndinit(uint16 password);
+
+/** \brief SCUWDT API to Set ENDINIT bit provided by Safety WDT Hardware module.
+ *
+ * This API will enable ENDINIT functionality provided by Safety WDT Hardware module.
+ * User need to use this API call after modifying any ENDINIT protected register.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_setSafetyEndinit(uint16 password);
+
+/** \} */
+
+/** \addtogroup IfxLld_Scu_Std_Wdt_Wdt_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief SCUWDT Inline API to fetch current password of CPU Watchdog module.
+ *
+ * This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed
+ * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
+ * or store the password globally in a global variable at the application memory.
+ * This API is only meant to be used with startup routines where function call is not possible.
+ * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
+ * \return password Existing (Application specific) password for the Watchdog module.
+ */
+IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog);
+
+/** \brief SCUWDT API to fetch current endinit of CPU Watchdog module.
+ * \param watchdog pointer to the watchdog register map of CPU WDT hardware instance
+ * \return Endinit status for the CPU Watchdog module.
+ */
+IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog);
+
+/** \brief SCUWDT API to fetch current endinit of Safety/System Watchdog module.
+ * \return Endinit status for the Safety Watchdog module.
+ */
+IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void);
+
+/** \brief SCUWDT Inline API to fetch current password of Safety Watchdog module.
+ *
+ * This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed
+ * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
+ * or store the password globally in a global variable at the application memory.
+ * This API is only meant to be used with startup routines where function call is not possible.
+ * \return password Existing (Application specific) password for the Watchdog module.
+ */
+IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief SCUWDT API to change CPU Watchdog password.
+ *
+ * This API will change password to new one for the corresponding to CPU WDT Hardware module.
+ * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \param newPassword Application specific new password to be changed for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_changeCpuWatchdogPassword(uint16 password, uint16 newPassword);
+
+/** \brief SCUWDT API to change CPU Watchdog timer reload value.
+ *
+ * This API will change Watchdog timer reload value to new one for CPU WDT Hardware module.
+ * The Watchdog timers will be reloaded with this value after every serice of Watchdog.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \param reload Reload value for the timer.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_changeCpuWatchdogReload(uint16 password, uint16 reload);
+
+/** \brief SCUWDT API to change Safety Watchdog password.
+ *
+ * This API will change password to new one for the corresponding to Safety WDT Hardware module.
+ * User need to have the old password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \param newPassword Application specific new password to be changed for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogPassword(uint16 password, uint16 newPassword);
+
+/** \brief SCUWDT API to change Safety Watchdog timer reload value.
+ *
+ * This API will change Watchdog timer reload value to new one for Safety WDT Hardware module.
+ * The Watchdog timers will be reloaded with this value after every serice of Watchdog.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \param reload Reload value for the timer.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_changeSafetyWatchdogReload(uint16 password, uint16 reload);
+
+/** \brief SCUWDT API to disable CPU Watchdog functionality.
+ *
+ * This API will disable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers will stop counting
+ * after this API call.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_disableCpuWatchdog(uint16 password);
+
+/** \brief SCUWDT API to disable Safety Watchdog functionality.
+ *
+ * This API will disable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers will stop counting
+ * after this API call.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_disableSafetyWatchdog(uint16 password);
+
+/** \brief SCUWDT API to enable CPU Watchdog functionality.
+ *
+ * This API will enable Watchdog functionality of CPU WDT Hardware module. The Watchdog timers need to be serviced
+ * periodically after this API call.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_enableCpuWatchdog(uint16 password);
+
+/** \brief SCUWDT API to enable Safety Watchdog functionality.
+ *
+ * This API will enable Watchdog functionality of Safety WDT Hardware module. The Watchdog timers need to be serviced
+ * periodically after this API call.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_enableSafetyWatchdog(uint16 password);
+
+/** \brief SCUWDT API to fetch current password of CPU Watchdog module.
+ *
+ * This API will fetch current Watchdog password for CPU WDT Hardware module. password is needed to be passed
+ * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
+ * or store the password globally in a global variable at the application memory.
+ * \return password Existing (Application specific) password for the Watchdog module.
+ */
+IFX_EXTERN uint16 IfxScuWdt_getCpuWatchdogPassword(void);
+
+/** \brief SCUWDT API to fetch current endinit of CPU Watchdog module.
+ * \return Endinit status for the CPU Watchdog module.
+ */
+IFX_EXTERN boolean IfxScuWdt_getCpuWatchdogEndInit(void);
+
+/** \brief SCUWDT API to fetch current password of Safety Watchdog module.
+ *
+ * This API will fetch current Watchdog password for Safety WDT Hardware module. password is needed to be passed
+ * with most of the WDT APIs. Normally this API can be used to store the password locally in the caller function
+ * or store the password globally in a global variable at the application memory.
+ * \return password Existing (Application specific) password for the Watchdog module.
+ */
+IFX_EXTERN uint16 IfxScuWdt_getSafetyWatchdogPassword(void);
+
+/** \brief SCUWDT API to service CPU Watchdog functionality.
+ *
+ * This API will service Watchdog functionality corresponding to CPU WDT Hardware module.
+ * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getCpuWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_serviceCpuWatchdog(uint16 password);
+
+/** \brief SCUWDT API to service Safety Watchdog functionality.
+ *
+ * This API will service Watchdog functionality corresponding to Safety WDT Hardware module.
+ * User need to use this API call periodically. This API results in reloading of the Watchdog Timer.
+ * User need to have the password stored locally in the caller function, (use IfxScuWdt_getSafetyWatchdogPassword).
+ * \param password Existing (Application specific) password for the Watchdog module.
+ * \return None
+ */
+IFX_EXTERN void IfxScuWdt_serviceSafetyWatchdog(uint16 password);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Enables the watchdog functionality with debugger connected,\n
+ * debug interface will also be enabled, if not enabled already.
+ * \return Status, Success = 0, Failure = 1.
+ */
+IFX_EXTERN boolean IfxScuWdt_enableWatchdogWithDebugger(void);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxScuWdt_clearCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
+{
+ if (watchdog->CON0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
+ (0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
+ (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
+ (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
+ }
+
+ /* Clear ENDINT and set LCK bit in Config_0 register */
+ watchdog->CON0.U = (0 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
+ (1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
+ (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
+ (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
+
+ /* read back ENDINIT and wait until it has been cleared */
+ while (watchdog->CON0.B.ENDINIT == 1)
+ {}
+}
+
+
+IFX_INLINE void IfxScuWdt_clearSafetyEndinitInline(uint16 password)
+{
+ if (SCU_WDTS_CON0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
+ (0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
+ (password << IFX_SCU_WDTS_CON0_PW_OFF) |
+ (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
+ }
+
+ /* Clear ENDINT and set LCK bit in Config_0 register */
+ SCU_WDTS_CON0.U = (0 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
+ (1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
+ (password << IFX_SCU_WDTS_CON0_PW_OFF) |
+ (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
+
+ /* read back ENDINIT and wait until it has been cleared */
+ while (SCU_WDTS_CON0.B.ENDINIT == 1)
+ {}
+}
+
+
+IFX_INLINE uint16 IfxScuWdt_getCpuWatchdogPasswordInline(Ifx_SCU_WDTCPU *watchdog)
+{
+ uint16 password;
+
+ /* Read Password from CON0 register
+ * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
+ * to toggle them before returning password */
+ password = watchdog->CON0.B.PW;
+ password ^= 0x003F;
+
+ return password;
+}
+
+
+IFX_INLINE boolean IfxScuWdt_getCpuWatchdogEndInitInline(Ifx_SCU_WDTCPU *watchdog)
+{
+ return (boolean)watchdog->CON0.B.ENDINIT;
+}
+
+
+IFX_INLINE boolean IfxScuWdt_getSafetyWatchdogEndInit(void)
+{
+ return (boolean)MODULE_SCU.WDTS.CON0.B.ENDINIT;
+}
+
+
+IFX_INLINE uint16 IfxScuWdt_getSafetyWatchdogPasswordInline(void)
+{
+ uint16 password;
+ Ifx_SCU_WDTS *watchdog = &MODULE_SCU.WDTS;
+
+ /* Read Password from Safety WDT CON0 register
+ * !!! NOTE: !!! when read bottom six bit of password are inverted so we have
+ * to toggle them before returning password */
+ password = watchdog->CON0.B.PW;
+ password ^= 0x003F;
+
+ return password;
+}
+
+
+IFX_INLINE void IfxScuWdt_setCpuEndinitInline(Ifx_SCU_WDTCPU *watchdog, uint16 password)
+{
+ if (watchdog->CON0.B.LCK)
+ {
+ /* see Table 1 (Pass.word Access Bit Pattern Requirements) */
+ watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
+ (0 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
+ (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
+ (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
+ }
+
+ /* Set ENDINT and set LCK bit in Config_0 register */
+ watchdog->CON0.U = (1 << IFX_SCU_WDTCPU_CON0_ENDINIT_OFF) |
+ (1 << IFX_SCU_WDTCPU_CON0_LCK_OFF) |
+ (password << IFX_SCU_WDTCPU_CON0_PW_OFF) |
+ (watchdog->CON0.B.REL << IFX_SCU_WDTCPU_CON0_REL_OFF);
+
+ /* read back ENDINIT and wait until it has been set */
+ while (watchdog->CON0.B.ENDINIT == 0)
+ {}
+}
+
+
+IFX_INLINE void IfxScuWdt_setSafetyEndinitInline(uint16 password)
+{
+ if (SCU_WDTS_CON0.B.LCK)
+ {
+ /* see Table 1 (Password Access Bit Pattern Requirements) */
+ SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
+ (0 << IFX_SCU_WDTS_CON0_LCK_OFF) |
+ (password << IFX_SCU_WDTS_CON0_PW_OFF) |
+ (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
+ }
+
+ /* Set ENDINT and set LCK bit in Config_0 register */
+ SCU_WDTS_CON0.U = (1 << IFX_SCU_WDTS_CON0_ENDINIT_OFF) |
+ (1 << IFX_SCU_WDTS_CON0_LCK_OFF) |
+ (password << IFX_SCU_WDTS_CON0_PW_OFF) |
+ (SCU_WDTS_CON0.B.REL << IFX_SCU_WDTS_CON0_REL_OFF);
+
+ /* read back ENDINIT and wait until it has been cleared */
+ while (SCU_WDTS_CON0.B.ENDINIT == 0)
+ {}
+}
+
+
+#endif /* IFXSCUWDT_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Sent/IfxSent_Sent.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Sent/IfxSent_Sent.c
new file mode 100644
index 0000000..ba8dcc2
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Sent/IfxSent_Sent.c
@@ -0,0 +1,353 @@
+/**
+ * \file IfxSent_Sent.c
+ * \brief SENT SENT details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxSent_Sent.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxSent_Sent_deInitModule(IfxSent_Sent *driver)
+{
+ Ifx_SENT *sentSFR = driver->sent;
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ IfxSent_resetModule(sentSFR);
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config)
+{
+ boolean result = TRUE;
+
+ channel->driver = config->driver;
+ Ifx_SENT *sentSFR = config->driver->sent;
+ Ifx_SENT_CH *sentCh = &sentSFR->CH[config->channelId];
+ channel->channel = sentCh;
+ channel->channelId = config->channelId;
+
+ IfxSent_disableChannel(sentSFR, config->channelId);
+ IfxSent_initializeChannelUnitTime(sentSFR, config->channelId, config->tUnit);
+
+ Ifx_SENT_CH_WDT tempWDT;
+ tempWDT.U = 0;
+ tempWDT.B.WDLx = config->watchDogTimerLimit;
+ sentCh->WDT.U = tempWDT.U;
+
+ Ifx_SENT_CH_RCR tempRCR;
+ tempRCR.U = 0;
+ tempRCR.B.IEP = config->receiveControl.endPulseIgnored;
+ tempRCR.B.ACE = config->receiveControl.alternateCrcSelected;
+ tempRCR.B.SNI = config->receiveControl.statusNibbleEnabled;
+ tempRCR.B.SDP = config->receiveControl.serialDataProcessingEnabled;
+ tempRCR.B.SCDIS = config->receiveControl.serialDataDisabledCrcDisabled;
+ tempRCR.B.CDIS = config->receiveControl.crcModeDisabled;
+ tempRCR.B.CFC = config->receiveControl.frameCheckMode;
+ tempRCR.B.FRL = config->receiveControl.frameLength;
+ tempRCR.B.CRZ = config->receiveControl.crcMethodDisabled;
+ tempRCR.B.ESF = config->receiveControl.extendedSerialFrameMode;
+ tempRCR.B.IDE = config->receiveControl.driftErrorsDisabled;
+ tempRCR.B.SUSEN = config->receiveControl.suspendTriggered;
+ sentCh->RCR.U = tempRCR.U;
+
+ IfxSent_enableChannel(sentSFR, config->channelId);
+
+ Ifx_SENT_CH_VIEW tempVIEW;
+ tempVIEW.U = 0;
+ tempVIEW.B.RDNP0 = config->nibbleControl.nibblePointer0;
+ tempVIEW.B.RDNP1 = config->nibbleControl.nibblePointer1;
+ tempVIEW.B.RDNP2 = config->nibbleControl.nibblePointer2;
+ tempVIEW.B.RDNP3 = config->nibbleControl.nibblePointer3;
+ tempVIEW.B.RDNP4 = config->nibbleControl.nibblePointer4;
+ tempVIEW.B.RDNP5 = config->nibbleControl.nibblePointer5;
+ tempVIEW.B.RDNP6 = config->nibbleControl.nibblePointer6;
+ tempVIEW.B.RDNP7 = config->nibbleControl.nibblePointer7;
+ sentCh->VIEW.U = tempVIEW.U;
+
+ Ifx_SENT_CH_IOCR tempIOCR;
+ tempIOCR.U = 0;
+ tempIOCR.B.DEPTH = config->inputOutputControl.digitalGlitchFilterDepth;
+ tempIOCR.B.OIE = config->inputOutputControl.outputPulsePolarityHigh;
+ tempIOCR.B.IIE = config->inputOutputControl.inputPulsePolarityHigh;
+ tempIOCR.B.CEC = config->inputOutputControl.edgeCounterCleared;
+ tempIOCR.B.CREG = config->inputOutputControl.glitchRisingCleared;
+ tempIOCR.B.CFEG = config->inputOutputControl.glitchFallingCleared;
+ tempIOCR.B.ETS = config->inputOutputControl.externalTrigger;
+ tempIOCR.B.CTR = config->inputOutputControl.triggerMonitorCleared;
+ sentCh->IOCR.U = tempIOCR.U;
+
+ Ifx_SENT_CH_INP tempINP;
+ tempINP.U = 0;
+ tempINP.B.RSI = config->interuptNodeControl.receiveSuccessInterruptNode;
+ tempINP.B.RDI = config->interuptNodeControl.receiveDataInterruptNode;
+ tempINP.B.RBI = config->interuptNodeControl.receiveBufferOverflowInterruptNode;
+ tempINP.B.TDI = config->interuptNodeControl.transferDataInterruptNode;
+ tempINP.B.TBI = config->interuptNodeControl.transferBufferUnderflowInterruptNode;
+ tempINP.B.ERRI = config->interuptNodeControl.errorInterruptNode;
+ tempINP.B.SDI = config->interuptNodeControl.serialDataReceiveInterruptNode;
+ tempINP.B.WDI = config->interuptNodeControl.watchdogErrorInterruptNode;
+ sentCh->INP.U = tempINP.U;
+
+ sentCh->INTEN.U = config->enabledInterrupts.ALL;
+
+ if (config->receiveControl.frameLength > 8)
+ {
+ /* Clear RSI and enable only RDI interrupt */
+ sentCh->INTEN.B.RSI = 0;
+ sentCh->INTEN.B.RDI = 1;
+ }
+
+ if (config->spcModeOn == TRUE)
+ {
+ uint16 timeOut = IFXSENT_CFG_TIMEOUT_VALUE;
+ uint8 error = 0;
+
+ /* check if Transaction is in progress, before proceeding !!! */
+ while ((sentCh->SCR.B.TRQ == 1) && (timeOut > 0))
+ {
+ /* Wait for Transaction to be completed */
+ timeOut--;
+ }
+
+ if (timeOut == 0U)
+ {
+ error = 1U;
+ }
+
+ if (error == 0U)
+ {
+ Ifx_SENT_CH_SCR tempSCR;
+ tempSCR.U = 0;
+ tempSCR.B.PLEN = config->transmitControl.pulseLength;
+ tempSCR.B.TRIG = config->transmitControl.triggerSource;
+ tempSCR.B.DEL = config->transmitControl.pulseDelayLength;
+ tempSCR.B.BASE = config->transmitControl.timeBase;
+ sentCh->SCR.U = tempSCR.U;
+
+ if (config->transmitControl.spcMode == IfxSent_SpcMode_bidirectional)
+ {
+ /* Enable Buffer Underflow interrupt also */
+ sentCh->INTEN.B.TBI = 1U;
+ }
+ }
+ }
+
+ const IfxSent_Sent_Pins *pinsConfig = (const IfxSent_Sent_Pins *)config->pins;
+
+ if (pinsConfig != NULL_PTR)
+ {
+ const IfxSent_Sent_In *sentIn = pinsConfig->in;
+
+ if (sentIn != NULL_PTR)
+ {
+ IfxSent_initSentPin(sentIn, pinsConfig->inMode, pinsConfig->pinDriver);
+ }
+
+ const IfxSent_Spc_Out *spcOut = pinsConfig->out;
+
+ if (spcOut != NULL_PTR)
+ {
+ IfxSent_initSpcPin(spcOut, pinsConfig->outMode, pinsConfig->pinDriver);
+ }
+ }
+
+ {
+ IfxSrc_Tos tos = config->interrupt.isrProvider;
+
+ if ((config->interrupt.priority != 0) || (tos == IfxSrc_Tos_dma))
+ {
+ volatile Ifx_SRC_SRCR *src = IfxSent_getChannelSrc(config->channelId);
+ IfxSrc_init(src, tos, config->interrupt.priority);
+ IfxSrc_enable(src);
+ }
+ }
+
+ return result;
+}
+
+
+void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver)
+{
+ const IfxSent_Sent_ChannelConfig defaultChannelConfig = {
+ .driver = NULL_PTR,
+ .channelId = IfxSent_ChannelId_none,
+ .tUnit = 3E-6, /* 3 uS */
+
+ .watchDogTimerLimit = 0,
+
+ .receiveControl = {
+ .endPulseIgnored = FALSE,
+ .alternateCrcSelected = FALSE,
+ .statusNibbleEnabled = FALSE,
+ .serialDataProcessingEnabled = FALSE,
+ .serialDataDisabledCrcDisabled = FALSE,
+ .crcModeDisabled = FALSE,
+ .frameCheckMode = IfxSent_FrameCheckMode_pastSyncPulse,
+ .frameLength = 6,
+ .crcMethodDisabled = FALSE,
+ .extendedSerialFrameMode = IfxSent_ExtendedSerialFrameMode_standard,
+ .driftErrorsDisabled = FALSE,
+ .suspendTriggered = FALSE,
+ },
+
+ .nibbleControl = {
+ .nibblePointer0 = IfxSent_Nibble_0,
+ .nibblePointer1 = IfxSent_Nibble_1,
+ .nibblePointer2 = IfxSent_Nibble_2,
+ .nibblePointer3 = IfxSent_Nibble_3,
+ .nibblePointer4 = IfxSent_Nibble_4,
+ .nibblePointer5 = IfxSent_Nibble_5,
+ .nibblePointer6 = IfxSent_Nibble_6,
+ .nibblePointer7 = IfxSent_Nibble_7,
+ },
+
+ .inputOutputControl = {
+ .digitalGlitchFilterDepth = IfxSent_DigitalGlitchesLength_2,
+ .outputPulsePolarityHigh = FALSE,
+ .inputPulsePolarityHigh = FALSE,
+ .edgeCounterCleared = TRUE,
+ .glitchRisingCleared = TRUE,
+ .glitchFallingCleared = TRUE,
+ .externalTrigger = IfxSent_ExternalTrigger_0,
+ .triggerMonitorCleared = FALSE,
+ },
+
+ .enabledInterrupts.ALL = IFXSENT_CFG_CHANNEL_INTEN,
+
+ .interuptNodeControl = {
+ .receiveDataInterruptNode = IfxSent_InterruptNodePointer_0,
+ .receiveSuccessInterruptNode = IfxSent_InterruptNodePointer_0,
+ .receiveBufferOverflowInterruptNode = IfxSent_InterruptNodePointer_0,
+ .transferDataInterruptNode = IfxSent_InterruptNodePointer_0,
+ .transferBufferUnderflowInterruptNode = IfxSent_InterruptNodePointer_0,
+ .errorInterruptNode = IfxSent_InterruptNodePointer_0,
+ .serialDataReceiveInterruptNode = IfxSent_InterruptNodePointer_0,
+ .watchdogErrorInterruptNode = IfxSent_InterruptNodePointer_0,
+ },
+
+ .pins = NULL_PTR,
+
+ /* SPC mode enable/disable */
+ .spcModeOn = FALSE,
+ };
+ *config = defaultChannelConfig;
+ config->driver = driver;
+}
+
+
+boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config)
+{
+ boolean result = TRUE;
+ Ifx_SENT *sentSFR = config->module;
+ driver->sent = sentSFR;
+
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ if (IfxSent_isModuleEnabled(sentSFR) == FALSE)
+ {
+ IfxSent_enableModule(sentSFR);
+ }
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ sentSFR->CLC.B.EDIS = (config->sleepModeEnabled != FALSE) ? 0 : 1;
+ sentSFR->CLC.B.RMC = 1; /* no divider required, pass clock 1:1*/
+
+ IfxSent_initializeModuleClock(sentSFR, IfxSent_ClockDividerMode_normal, 1023); /* Fractional divider not required, pass 1:1*/
+ IfxSent_setTimeStampPredivider(sentSFR, config->timeStampPreDivider);
+
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ return result;
+}
+
+
+void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent)
+{
+ /* Default module initialization */
+ const IfxSent_Sent_Config defaultModuleConfig = {
+ .module = NULL_PTR,
+ .sleepModeEnabled = TRUE,
+ .timeStampPreDivider = 0,
+ };
+ *config = defaultModuleConfig;
+ config->module = sent;
+}
+
+
+boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame)
+{
+ boolean result = TRUE;
+
+ Ifx_SENT *sentSFR = channel->driver->sent;
+ IfxSent_ChannelId ChanIdx = channel->channelId;
+ frame->data = sentSFR->RDR[ChanIdx].U;
+ frame->timeStamp = sentSFR->RTS[ChanIdx].U;
+ frame->statusNibble = channel->channel->RSR.B.SCN;
+
+ return result;
+}
+
+
+boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message)
+{
+ boolean result = TRUE;
+
+ Ifx_SENT_CH *sentCh = channel->channel;
+ Ifx_SENT_CH_SDS sds;
+
+ sds.U = sentCh->SDS.U;
+
+ message->serialData = sds.B.SD;
+ message->messageId = sds.B.MID;
+ message->configBit = (IfxSent_ConfigBit)sds.B.CON;
+ message->crc = sds.B.SCRC;
+
+ return result;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Sent/IfxSent_Sent.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Sent/IfxSent_Sent.h
new file mode 100644
index 0000000..ec2f1c7
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Sent/IfxSent_Sent.h
@@ -0,0 +1,695 @@
+/**
+ * \file IfxSent_Sent.h
+ * \brief SENT SENT details
+ * \ingroup IfxLld_Sent
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Sent_Sent_Usage How to use the SENT Interface driver?
+ * \ingroup IfxLld_Sent
+ *
+ * This SENT interface driver provides functions to communicate with external sensors.
+ *
+ * \section IfxLld_Sent_Sent_Preparation Preparation
+ * \subsection IfxLld_Sent_Sent_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Sent_Sent_Variables Variables
+ *
+ * Declare SENT module and channel handles as global variables in your C code.
+ * If multiple SENT channels should be serviced, it makes sense to declare the SENT channel handle as an array:
+ * \code
+ * #define TESTED_SENT_CHANNELS 3
+ *
+ * static IfxSent_Sent sent;
+ * static IfxSent_Sent_Channel sentChannel[TESTED_SENT_CHANNELS];
+ * \endcode
+ *
+ * \subsection IfxLld_Sent_Sent_Interrupt Interrupt Handler Installation
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handler. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * #define IFX_INTPRIO_SENT_CHANNEL 1
+ * \endcode
+ *
+ * Add the interrupt service routine to your C code. It has to call the SENT interrupt handler by passing the SENT channel handle:
+ * \code
+ * void SentInterruptHandler(IfxSent_Sent_Channel *channel);
+ *
+ * IFX_INTERRUPT(sentChannelISR, 0, IFX_INTPRIO_SENT_CHANNEL)
+ * {
+ * int i;
+ *
+ * for(i=0; i 15.
+ * // *
+ * if (interruptStatus.B.NVI)
+ * {
+ * // insert your error handling code here
+ * __debug();
+ * }
+ *
+ * // * CRC Error
+ * // * This bit is set if the CRC check fails.
+ * // *
+ * if (interruptStatus.B.CRCI)
+ * {
+ * // insert your error handling code here
+ * __debug();
+ * }
+ *
+ * // * Wrong Status and Communication Nibble Error
+ * // * In standard Serial Frame Mode (RCR.ESF is cleared), this bit is set
+ * // * if the Status and Communication nibble shows a start bit in a frame
+ * // * other than frame number n x 16.
+ * // * In Extended Serial Frame Mode this bit is without function.
+ * // *
+ * if (interruptStatus.B.WSI)
+ * {
+ * // insert your error handling code here
+ * __debug();
+ * }
+ *
+ * // * Serial Data CRC Error
+ * // * This bit is set if the CRC of the serial message fails.
+ * // * In Extended Serial Message Format, this includes a check of the Serial
+ * // * Communication Nibble for correct 0 values of bit 3 in frames 7, 13 and 18.
+ * // *
+ * if (interruptStatus.B.SCRI)
+ * {
+ * // insert your error handling code here
+ * __debug();
+ * }
+ *
+ * // * Watch Dog Error
+ * // * This bit is set if the Watch Dog Timer of the channel expires.
+ * // *
+ * if (interruptStatus.B.WDI)
+ * {
+ * // insert your error handling code here
+ * __debug();
+ * }
+ * }
+ *
+ * // transaction events
+ *
+ * // * Receive Data
+ * // * RDI is activated when a received frame is moved to a Receive Data
+ * // * Register RDR. Both RDI and RSI will be issued together in normal use
+ * // * cases where the frame size is not bigger than 8 nibbles and CRC is
+ * // * correct or not checked (if RCRx.CDIS is cleared).
+ * // *
+ * if (interruptStatus.B.RDI)
+ * {
+ * // * Ignore RDI bit, useful only when Frame Length is greater than
+ * // * 8 nibbles since it can indicate that end of frame
+ * // *
+ * }
+ *
+ * // * Receive Success
+ * // * This bit is set at the successfully received end of a frame.
+ * // * Depending on bit RCRx.CDIS this indicates a successful check of the CRC.
+ * // *
+ * if (interruptStatus.B.RSI)
+ * {
+ * // here you could handle the incoming frame:
+ * IfxSent_Sent_Frame frame;
+ * IfxSent_Sent_readChannelSerialDataFrame(channel, &frame);
+ *
+ * // do something with the incoming data
+ * }
+ *
+ * // * Transfer Data
+ * // * This bit is set after the trigger condition was detected. Data to be
+ * // * transferred has been moved internally. Thus a new value can be written
+ * // * to SCRx. This can be used for back to back transfers.
+ * // *
+ * if (interruptStatus.B.TDI)
+ * {
+ * }
+ *
+ * // * Serial Data Received
+ * // * This bit is set after all serial data bits have been received via the
+ * // * Status and Communication nibble. Depending on bit RCRx.SCDIS this
+ * // * indicates a successful check of the CRC.
+ * // *
+ * if (interruptStatus.B.SDI)
+ * {
+ * // here you could handle the incoming message:
+ *
+ * // decode incoming message
+ * IfxSent_Sent_SerialMessageFrame message;
+ * IfxSent_Sent_readChannelSerialMessageFrame(channel, &message);
+ *
+ * // do something with the incoming message
+ * }
+ * }
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Sent_Sent_Frame Frame Decoding
+ * Following code snippet shows, how incoming data of a TLE4998S device can be decoded:
+ *
+ * \code
+ * static void parseSensorData(IfxSent_Sent_Frame *frame)
+ * {
+ * uint32 data = frame->data;
+ * uint8 statusNibble = frame->statusNibble;
+ *
+ * // select B range [mT]
+ * const uint8 rangeValTable[4] = { 200, 100, 50, 0 };
+ * uint8 rangeVal = rangeValTable[statusNibble & 3];
+ *
+ * uint16 hallVal = (short)((((data & 0xFFFF) * rangeVal) / 0x7FFF) - rangeVal);
+ * uint16 temperature = ((short)((data >> 16) & 0x00FF) - 55);
+ *
+ * // do something with the values here...
+ * }
+ * \endcode
+ *
+ * \defgroup IfxLld_Sent_Sent Interface Driver
+ * \ingroup IfxLld_Sent
+ * \defgroup IfxLld_Sent_Sent_Structures Data Structures
+ * \ingroup IfxLld_Sent_Sent
+ * \defgroup IfxLld_Sent_Sent_Module Module Functions
+ * \ingroup IfxLld_Sent_Sent
+ * \defgroup IfxLld_Sent_Sent_Channel Channel Functions
+ * \ingroup IfxLld_Sent_Sent
+ */
+
+#ifndef IFXSENT_SENT_H
+#define IFXSENT_SENT_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Scu/Std/IfxScuWdt.h"
+#include "Sent/Std/IfxSent.h"
+#include "Cpu/Irq/IfxCpu_Irq.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Sent_Sent_Structures
+ * \{ */
+/** \brief Specifies the Interrupt type enables structure
+ */
+typedef struct
+{
+ uint8 receiveDataInterrupt; /**< \brief Specifies receive data interrupt enable */
+ uint8 receiveSuccessInterrupt; /**< \brief Specifies receive success interrupt enable */
+ uint8 receiveBufferOverflowInterrupt; /**< \brief Specifies receive buffer overflow interrupt enable */
+ uint8 transferDataInterrupt; /**< \brief Specifies transfer data interrupt enable */
+ uint8 transferBufferUnderflowInterrupt; /**< \brief Specifies transfer buffer underflow interrupt enable */
+ uint8 serialDataReceiveInterrupt; /**< \brief Specifies serial data interrupt enable */
+ uint8 watchdogErrorInterrupt; /**< \brief Specifies watchdog error interrupt enable */
+ uint8 serialDataCrcErrorInterrupt; /**< \brief Specifies serial data CRC error interrupt enable */
+ uint8 wrongStatusNibbleErrorInterrupt; /**< \brief Specifies wrong status nibble error interrupt enable */
+ uint8 crcErrorInterrupt; /**< \brief Specifies CRC error interrupt enable */
+ uint8 nibblesValueOutOfRangeErrorInterrupt; /**< \brief Specifies nibble value out of range error interrupt enable */
+ uint8 nibblesWrongErrorInterrupt; /**< \brief Specifies nibbles wrong error interrupt enable */
+ uint8 frequencyDriftErrorInterrupt; /**< \brief Specifies frequency drift error interrupt enable */
+ uint8 frequencyRangeErrorInterrupt; /**< \brief Specifies frequency not in the range error interrupt enable */
+} IfxSent_Sent_Enable;
+
+/** \} */
+
+/** \addtogroup IfxLld_Sent_Sent_Structures
+ * \{ */
+/** \brief Specifies SENT handle structure
+ */
+typedef struct
+{
+ Ifx_SENT *sent; /**< \brief Specifies pointer to SENT registers */
+} IfxSent_Sent;
+
+/** \brief Specifies interrupt flags union . In addition it allows to write and read to/from all flags as once via the ALL member.
+ */
+typedef union
+{
+ uint32 ALL; /**< \brief Specifies to write and read to/from all flags as once via the ALL member. */
+ IfxSent_Sent_Enable enable; /**< \brief Structure contains the interrupt flags */
+} IfxSent_Sent_EnabledInterrupts;
+
+/** \brief Specifies the input output control properties
+ */
+typedef struct
+{
+ boolean inputPulsePolarityHigh; /**< \brief Specifies the polarity of input of each channel */
+ boolean outputPulsePolarityHigh; /**< \brief Specifies the polarity of input of each channel */
+ boolean edgeCounterCleared; /**< \brief Specifies the edge counter reset */
+ boolean glitchFallingCleared; /**< \brief Specifies the glitch falling edge clear */
+ boolean glitchRisingCleared; /**< \brief Specifies the glitch rising edge clear */
+ boolean triggerMonitorCleared; /**< \brief Specifies the trigger monitor reset */
+ IfxSent_DigitalGlitchesLength digitalGlitchFilterDepth; /**< \brief Specifies the Digital Glitch Filter depth for input signal delay */
+ IfxSent_ExternalTrigger externalTrigger; /**< \brief Specifies the external trigger line source */
+} IfxSent_Sent_InputOutputControl;
+
+/** \brief Specifies the interrupt control properties
+ */
+typedef struct
+{
+ uint16 priority; /**< \brief Specifies the interrupt priority. Always 1 since all interrupts are handled at a time */
+ IfxSrc_Tos isrProvider; /**< \brief Specifies the interrupt service provider. CPU or DMA. */
+} IfxSent_Sent_Interrupt;
+
+/** \brief Specifies the interrupt control properties structure
+ */
+typedef struct
+{
+ IfxSent_InterruptNodePointer receiveSuccessInterruptNode; /**< \brief Specifies the interrupt node for rsi request */
+ IfxSent_InterruptNodePointer receiveDataInterruptNode; /**< \brief Specifies the interrupt node for rdi request */
+ IfxSent_InterruptNodePointer receiveBufferOverflowInterruptNode; /**< \brief Specifies the interrupt node for rbi request */
+ IfxSent_InterruptNodePointer transferDataInterruptNode; /**< \brief Specifies the interrupt node for tdi request */
+ IfxSent_InterruptNodePointer transferBufferUnderflowInterruptNode; /**< \brief Specifies the interrupt node for tbi request */
+ IfxSent_InterruptNodePointer errorInterruptNode; /**< \brief Specifies the interrupt node for erri request */
+ IfxSent_InterruptNodePointer serialDataReceiveInterruptNode; /**< \brief Specifies the interrupt node for sdi request */
+ IfxSent_InterruptNodePointer watchdogErrorInterruptNode; /**< \brief Specifies the interrupt node for wdi request */
+} IfxSent_Sent_InterruptNodeControl;
+
+/** \brief Specifies the received nibbles control properties
+ */
+typedef struct
+{
+ IfxSent_Nibble nibblePointer0; /**< \brief Specifies the received nibble0 control */
+ IfxSent_Nibble nibblePointer1; /**< \brief Specifies the received nibble1 control */
+ IfxSent_Nibble nibblePointer2; /**< \brief Specifies the received nibble2 control */
+ IfxSent_Nibble nibblePointer3; /**< \brief Specifies the received nibble3 control */
+ IfxSent_Nibble nibblePointer4; /**< \brief Specifies the received nibble4 control */
+ IfxSent_Nibble nibblePointer5; /**< \brief Specifies the received nibble5 control */
+ IfxSent_Nibble nibblePointer6; /**< \brief Specifies the received nibble6 control */
+ IfxSent_Nibble nibblePointer7; /**< \brief Specifies the received nibble7 control */
+} IfxSent_Sent_NibbleControl;
+
+/** \brief Specifies the pins configuration for SENT channel
+ */
+typedef struct
+{
+ IFX_CONST IfxSent_Sent_In *in; /**< \brief Specifies input pin configuration */
+ IfxPort_InputMode inMode; /**< \brief Specifies input pin mode */
+ IFX_CONST IfxSent_Spc_Out *out; /**< \brief Specifies output pin configuration */
+ IfxPort_OutputMode outMode; /**< \brief Specifies output pin mode */
+ IfxPort_PadDriver pinDriver; /**< \brief Pad driver mode definition */
+} IfxSent_Sent_Pins;
+
+/** \brief Specifies the receive control properties
+ */
+typedef struct
+{
+ boolean crcModeDisabled; /**< \brief Specifies the CRC mode disabled mode */
+ boolean crcMethodDisabled; /**< \brief Specifies the CRC with zero nibbles disabled or enabled */
+ boolean alternateCrcSelected; /**< \brief Specifies the CRC is calculated for both fast and serial messages */
+ boolean serialDataProcessingEnabled; /**< \brief Specifies the serial data processing mode */
+ boolean serialDataDisabledCrcDisabled; /**< \brief Specifies the CRC disable for serial data disabled mode */
+ boolean statusNibbleEnabled; /**< \brief Specifies the status nibble to include in CRC */
+ boolean driftErrorsDisabled; /**< \brief Specifies the drift errors enabled or disabled */
+ boolean endPulseIgnored; /**< \brief Specifies the pause pulse during synchronization */
+ boolean suspendTriggered; /**< \brief Specifies the suspend trigger disables the channel or not */
+ uint8 frameLength; /**< \brief Specifies frame length in nibbles */
+ IfxSent_FrameCheckMode frameCheckMode; /**< \brief Specifies the frame check mode for valid frame */
+ IfxSent_ExtendedSerialFrameMode extendedSerialFrameMode; /**< \brief Specifies the extended serial frame mode */
+} IfxSent_Sent_ReceiveControl;
+
+/** \brief Specifies the SPC channel properties structure
+ */
+typedef struct
+{
+ uint8 pulseLength; /**< \brief Specifies the pulse length in ticktimes */
+ uint8 pulseDelayLength; /**< \brief Specifies the pulse delay length */
+ IfxSent_TriggerSource triggerSource; /**< \brief Specifies the trigger source and mode */
+ IfxSent_TimeBase timeBase; /**< \brief Specifies the pulse time base */
+ IfxSent_SpcMode spcMode; /**< \brief Specifies the SENT SPC operational mode */
+} IfxSent_Sent_TransmitControl;
+
+/** \} */
+
+/** \addtogroup IfxLld_Sent_Sent_Structures
+ * \{ */
+/** \brief Specifies the SENT Channel handle structure
+ */
+typedef struct
+{
+ IfxSent_Sent *driver; /**< \brief Specifies the pointer to SENT module handler */
+ Ifx_SENT_CH *channel; /**< \brief Specifies the pointer SENT channel registers */
+ IfxSent_ChannelId channelId; /**< \brief Specifies the SENT channel number */
+} IfxSent_Sent_Channel;
+
+/** \brief Specifies the SENT Channel configuration structure
+ */
+typedef struct
+{
+ IfxSent_Sent *driver; /**< \brief Specifies the pointer to SENT module handler */
+ uint16 watchDogTimerLimit; /**< \brief Speciifes the enabled interrupts for each Channel */
+ IfxSent_ChannelId channelId; /**< \brief Specifies the SENT channel number */
+ IfxSent_Sent_InputOutputControl inputOutputControl; /**< \brief Specifies the input output controllable properties */
+ IfxSent_Sent_ReceiveControl receiveControl; /**< \brief Specifies the receive control properties */
+ IfxSent_Sent_TransmitControl transmitControl; /**< \brief Specifies the transmit control properties */
+ IfxSent_Sent_InterruptNodeControl interuptNodeControl; /**< \brief Specifies the interrupt control properties structure */
+ IFX_CONST IfxSent_Sent_Pins *pins; /**< \brief Specifies the pins configuration for SENT channel */
+ float32 tUnit; /**< \brief desired unit time (f_tick), e.g. 3E-6 for 3 uS */
+ IfxSent_Sent_NibbleControl nibbleControl; /**< \brief Specifies the received nibbles control properties */
+ IfxSent_Sent_Interrupt interrupt; /**< \brief Specifies the interrupt control properties structure */
+ boolean spcModeOn; /**< \brief Specifies the SENT SPC mode enable/disable */
+ IfxSent_Sent_EnabledInterrupts enabledInterrupts;
+} IfxSent_Sent_ChannelConfig;
+
+/** \brief Specifies the SENT module configuration structure
+ */
+typedef struct
+{
+ Ifx_SENT *module; /**< \brief Specifies pointer to SENT registers */
+ boolean sleepModeEnabled; /**< \brief Specifies SENT enable/disable */
+ uint32 timeStampPreDivider; /**< \brief Specifies the pre-divider to get clock in time stamp */
+} IfxSent_Sent_Config;
+
+/** \brief Specifies the frame configuration structure for a channel
+ */
+typedef struct
+{
+ uint32 data; /**< \brief Contains the data from last received frame */
+ uint32 timeStamp; /**< \brief Contains the timestamp of last received frame */
+ uint8 statusNibble; /**< \brief Contains the status and communication Nibble of last received frame */
+} IfxSent_Sent_Frame;
+
+/** \brief Specifies received message frame
+ */
+typedef struct
+{
+ uint8 crc; /**< \brief Contains the received CRC value */
+ uint8 messageId; /**< \brief Contains the received message ID value */
+ uint16 serialData; /**< \brief Contains the received serial data value */
+ IfxSent_ConfigBit configBit; /**< \brief Contains the received configuration bit value */
+} IfxSent_Sent_SerialMessageFrame;
+
+/** \} */
+
+/** \addtogroup IfxLld_Sent_Sent_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reset the SENT module
+ * \param driver pointer to the SENT module handler
+ * \return None
+ */
+IFX_EXTERN void IfxSent_Sent_deInitModule(IfxSent_Sent *driver);
+
+/** \brief Initialise the SENT with the supplied configureation
+ * \param driver pointer to the SENT module handler
+ * \param config pointer to the SENT module configuration
+ * \return TRUE if valid configuration otherwise FALSE
+ *
+ * Usage example: see \ref IfxLld_Sent_Sent_Usage
+ *
+ */
+IFX_EXTERN boolean IfxSent_Sent_initModule(IfxSent_Sent *driver, const IfxSent_Sent_Config *config);
+
+/** \brief Initialise buffer with default SENT configuration
+ * \param config pointer to the SENT module configuration
+ * \param sent base address of the SENT register space
+ * \return None
+ *
+ * Usage example: see \ref IfxLld_Sent_Sent_Usage
+ *
+ */
+IFX_EXTERN void IfxSent_Sent_initModuleConfig(IfxSent_Sent_Config *config, Ifx_SENT *sent);
+
+/** \} */
+
+/** \addtogroup IfxLld_Sent_Sent_Channel
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.
+ *
+ * This function should be used in an ISR to retrieve the events which triggered the interrupt.
+ * \param channel Specifies the SENT Channel handle structure
+ * \return Interrupt flags which have been cleared.
+ *
+ * Usage example: see \ref IfxLld_Sent_Sent_Usage
+ *
+ */
+IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialize the channel with the supplied configuration
+ * \param channel pointer to the SENT channel
+ * \param config pointer to the SENT channel configuration
+ * \return TRUE if valid configuration otherwise FALSE
+ *
+ * Usage example: see \ref IfxLld_Sent_Sent_Usage
+ *
+ */
+IFX_EXTERN boolean IfxSent_Sent_initChannel(IfxSent_Sent_Channel *channel, const IfxSent_Sent_ChannelConfig *config);
+
+/** \brief Initialise channel buffer with default SENT channel configuration
+ * \param config pointer to the SENT channel configuration
+ * \param driver pointer to the SENT module handler
+ * \return None
+ *
+ * Usage example: see \ref IfxLld_Sent_Sent_Usage
+ *
+ */
+IFX_EXTERN void IfxSent_Sent_initChannelConfig(IfxSent_Sent_ChannelConfig *config, IfxSent_Sent *driver);
+
+/** \brief Reads the nibbles recieved in the Data register
+ * \param channel SENT Channel whose data has to be read
+ * \param frame Data read from the SENT Channel
+ * \return TRUE if data received otherwise false
+ *
+ * Usage example: see \ref IfxLld_Sent_Sent_Usage
+ *
+ */
+IFX_EXTERN boolean IfxSent_Sent_readChannelSerialDataFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_Frame *frame);
+
+/** \brief reads the Serial data recieved and collected over several SENT frames
+ * \param channel reads the Serial data recieved and collected over several SENT frames
+ * \param message Data pointer pointing to the serial data read from the SENT Channel
+ * \return TRUE if serial message received otherwise false
+ *
+ * Usage example: see \ref IfxLld_Sent_Sent_Usage
+ *
+ */
+IFX_EXTERN boolean IfxSent_Sent_readChannelSerialMessageFrame(IfxSent_Sent_Channel *channel, IfxSent_Sent_SerialMessageFrame *message);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_Sent_getAndClearInterruptStatus(IfxSent_Sent_Channel *channel)
+{
+ return IfxSent_getAndClearInterruptStatus(channel->driver->sent, channel->channelId);
+}
+
+
+#endif /* IFXSENT_SENT_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Std/IfxSent.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Std/IfxSent.c
new file mode 100644
index 0000000..f257ea0
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Std/IfxSent.c
@@ -0,0 +1,164 @@
+/**
+ * \file IfxSent.c
+ * \brief SENT basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxSent.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ float32 fFracDiv = IfxSent_getModuleClock(sent);
+ float32 fPdiv = fFracDiv / (float32)(sent->CH[channelId].CPDR.B.PDIV + 1);
+
+ uint32 div = sent->CH[channelId].CFDR.B.DIV;
+
+ if (div > 0)
+ {
+ float32 fTick = (fPdiv * 56) / div;
+ return 1 / fTick;
+ }
+ else
+ {
+ return 0.0;
+ }
+}
+
+
+float32 IfxSent_getModuleClock(Ifx_SENT *sent)
+{
+ float32 fsys = IfxScuCcu_getSpbFrequency();
+
+ uint32 rmc = sent->CLC.B.RMC;
+
+ if (rmc < 1)
+ {
+ rmc = 1;
+ }
+
+ float32 fclc = fsys / rmc;
+
+ Ifx_SENT_FDR fdr;
+ fdr.U = sent->FDR.U;
+
+ float32 kernelFreq = 0.0;
+
+ if (fdr.B.DM == 1)
+ {
+ kernelFreq = fclc / (1024 - fdr.B.STEP);
+ }
+ else if (fdr.B.DM == 2)
+ {
+ kernelFreq = (fclc * fdr.B.STEP) / 1024;
+ }
+
+ return kernelFreq;
+}
+
+
+void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
+{
+ float32 fFracDiv = IfxSent_getModuleClock(sent);
+
+ /* const uint32 divMin = 560; */
+ const uint32 divMax = 3276;
+
+ uint32 pDiv;
+ uint32 fDiv;
+
+ float32 tResult;
+ tResult = fFracDiv * 56 * tUnit;
+ pDiv = tResult / divMax;
+ fDiv = tResult / pDiv;
+
+ if (fDiv > divMax)
+ {
+ pDiv = pDiv + 1;
+ fDiv = tResult / pDiv;
+ }
+
+ if ((pDiv > 1024) || (pDiv < 1))
+ {
+ pDiv = 1025;
+ fDiv = tResult / 1024;
+ }
+
+ IfxSent_setChannelPreDivider(sent, channelId, (uint16)pDiv - 1);
+ IfxSent_setChannelFractionalDivider(sent, channelId, (uint16)fDiv);
+}
+
+
+void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
+{
+ Ifx_SENT_FDR tempFDR;
+ tempFDR.U = 0;
+ tempFDR.B.STEP = stepValue;
+ tempFDR.B.DM = dividerMode;
+ sent->FDR.U = tempFDR.U;
+}
+
+
+void IfxSent_resetModule(Ifx_SENT *sent)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ sent->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ sent->KRST0.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == sent->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ sent->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxScuWdt_setCpuEndinit(passwd);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Std/IfxSent.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Std/IfxSent.h
new file mode 100644
index 0000000..0de5bfa
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Std/IfxSent.h
@@ -0,0 +1,783 @@
+/**
+ * \file IfxSent.h
+ * \brief SENT basic functionality
+ * \ingroup IfxLld_Sent
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Sent_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Sent_Std
+ * \defgroup IfxLld_Sent_Std_Configuration Configuration Functions
+ * \ingroup IfxLld_Sent_Std
+ * \defgroup IfxLld_Sent_Std_Interrupts Interrupts
+ * \ingroup IfxLld_Sent_Std
+ * \defgroup IfxLld_Sent_Std_Operative Operative Functions
+ * \ingroup IfxLld_Sent_Std
+ * \defgroup IfxLld_Sent_Std_Baudrate Baudrate Configuration
+ * \ingroup IfxLld_Sent_Std
+ * \defgroup IfxLld_Sent_Std_IO IO Pin Configuration Functions
+ * \ingroup IfxLld_Sent_Std
+ */
+
+#ifndef IFXSENT_H
+#define IFXSENT_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxSent_cfg.h"
+#include "Src/Std/IfxSrc.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "_PinMap/IfxSent_PinMap.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxSent_bf.h"
+#include "IfxSent_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXSENT_INTERRUPT_STATUS_ERROR_FLAGS (0x000037f4)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Sent_Std_Enumerations
+ * \{ */
+/** \brief SENT.CH[channelId].IOCR.ALTI , Specifies alternate input for channel
+ */
+typedef enum
+{
+ IfxSent_AlternateInput_0 = 0, /**< \brief Specifies alternate input 0 */
+ IfxSent_AlternateInput_1, /**< \brief Specifies alternate input 1 */
+ IfxSent_AlternateInput_2, /**< \brief Specifies alternate input 2 */
+ IfxSent_AlternateInput_3 /**< \brief Specifies alternate input 3 */
+} IfxSent_AlternateInput;
+
+/** \brief SENT.CH[channelId].RSR.CST, Specifies the current channel status
+ */
+typedef enum
+{
+ IfxSent_ChannelStatus_stop = 0, /**< \brief Specifies the channel is stopped */
+ IfxSent_ChannelStatus_initialize = 1, /**< \brief Specifies the channel is initialized */
+ IfxSent_ChannelStatus_running = 2, /**< \brief Specifies the channel is running */
+ IfxSent_ChannelStatus_synchronize = 3 /**< \brief Specifies the channel is synchronized */
+} IfxSent_ChannelStatus;
+
+/** \brief SENT.FDR.DM , Specifies clock divider mode
+ */
+typedef enum
+{
+ IfxSent_ClockDividerMode_off = 0, /**< \brief Specifies clock divider mode off */
+ IfxSent_ClockDividerMode_normal = 1, /**< \brief Specifies clock normal divider mode */
+ IfxSent_ClockDividerMode_fractional = 2 /**< \brief Specifies clock fractional divider mode */
+} IfxSent_ClockDividerMode;
+
+/** \brief SENT.CH[channelId].SDS.CON , Specifies received configuration bit value
+ */
+typedef enum
+{
+ IfxSent_ConfigBit_0 = 0, /**< \brief Specifies received configuration bit value 0 */
+ IfxSent_ConfigBit_1 /**< \brief Specifies received configuration bit value 1 */
+} IfxSent_ConfigBit;
+
+/** \brief SENT.CH[channelId].IOCR.DEPTH , Specifies number of port input samples
+ */
+typedef enum
+{
+ IfxSent_DigitalGlitchesLength_off = 0, /**< \brief Specifies port input samples off */
+ IfxSent_DigitalGlitchesLength_1 = 1, /**< \brief Specifies 1 port input samples */
+ IfxSent_DigitalGlitchesLength_2, /**< \brief Specifies 2 port input samples */
+ IfxSent_DigitalGlitchesLength_3, /**< \brief Specifies 3 port input samples */
+ IfxSent_DigitalGlitchesLength_4, /**< \brief Specifies 4 port input samples */
+ IfxSent_DigitalGlitchesLength_5, /**< \brief Specifies 5 port input samples */
+ IfxSent_DigitalGlitchesLength_6, /**< \brief Specifies 6 port input samples */
+ IfxSent_DigitalGlitchesLength_7, /**< \brief Specifies 7 port input samples */
+ IfxSent_DigitalGlitchesLength_8, /**< \brief Specifies 8 port input samples */
+ IfxSent_DigitalGlitchesLength_9, /**< \brief Specifies 9 port input samples */
+ IfxSent_DigitalGlitchesLength_10, /**< \brief Specifies 10 port input samples */
+ IfxSent_DigitalGlitchesLength_11, /**< \brief Specifies 11 port input samples */
+ IfxSent_DigitalGlitchesLength_12, /**< \brief Specifies 12 port input samples */
+ IfxSent_DigitalGlitchesLength_13, /**< \brief Specifies 13 port input samples */
+ IfxSent_DigitalGlitchesLength_14, /**< \brief Specifies 14 port input samples */
+ IfxSent_DigitalGlitchesLength_15 /**< \brief Specifies 15 port input samples */
+} IfxSent_DigitalGlitchesLength;
+
+/** \brief SENT.CH[channelId].RCR.ESF , Specifies the serial frame structure
+ */
+typedef enum
+{
+ IfxSent_ExtendedSerialFrameMode_standard = 0, /**< \brief Specifies the standard serial frame structure */
+ IfxSent_ExtendedSerialFrameMode_extended = 1 /**< \brief Specifies the extended serial frame structure */
+} IfxSent_ExtendedSerialFrameMode;
+
+/** \brief SENT.CH[channelId].IOCR.ETS , Specifies the external trigger line
+ */
+typedef enum
+{
+ IfxSent_ExternalTrigger_0 = 0, /**< \brief Specifies the external trigger line 0 */
+ IfxSent_ExternalTrigger_1, /**< \brief Specifies the external trigger line 1 */
+ IfxSent_ExternalTrigger_2, /**< \brief Specifies the external trigger line 2 */
+ IfxSent_ExternalTrigger_3, /**< \brief Specifies the external trigger line 3 */
+ IfxSent_ExternalTrigger_4, /**< \brief Specifies the external trigger line 4 */
+ IfxSent_ExternalTrigger_5, /**< \brief Specifies the external trigger line 5 */
+ IfxSent_ExternalTrigger_6, /**< \brief Specifies the external trigger line 6 */
+ IfxSent_ExternalTrigger_7, /**< \brief Specifies the external trigger line 7 */
+ IfxSent_ExternalTrigger_8, /**< \brief Specifies the external trigger line 8 */
+ IfxSent_ExternalTrigger_9 /**< \brief Specifies the external trigger line 9 */
+} IfxSent_ExternalTrigger;
+
+/** \brief SENT.CH[channelId].RCR.CFC, Specifies received frame check mode
+ */
+typedef enum
+{
+ IfxSent_FrameCheckMode_pastSyncPulse = 0, /**< \brief Specifies frame check mode against past sync pulse */
+ IfxSent_FrameCheckMode_futureSuncPulse = 1 /**< \brief Specifies frame check mode against future sync pulse */
+} IfxSent_FrameCheckMode;
+
+/** \brief SENT.CH[channelId].INP.X(X= RSI,RDI,RBI,TDI,TBI,ERRI,SDI,WDI),Specifies interrupt requested node for respective interrupt
+ */
+typedef enum
+{
+ IfxSent_InterruptNodePointer_0 = 0, /**< \brief Specifies interrupt requested node 0 */
+ IfxSent_InterruptNodePointer_1, /**< \brief Specifies interrupt requested node 1 */
+ IfxSent_InterruptNodePointer_2, /**< \brief Specifies interrupt requested node 2 */
+ IfxSent_InterruptNodePointer_3, /**< \brief Specifies interrupt requested node 3 */
+ IfxSent_InterruptNodePointer_trigo0 = 4, /**< \brief Specifies interrupt requested node TRIGO 0 */
+ IfxSent_InterruptNodePointer_trigo1, /**< \brief Specifies interrupt requested node TRIGO 1 */
+ IfxSent_InterruptNodePointer_trigo2, /**< \brief Specifies interrupt requested node TRIGO 2 */
+ IfxSent_InterruptNodePointer_trigo3, /**< \brief Specifies interrupt requested node TRIGO 3 */
+ IfxSent_InterruptNodePointer_trigo4, /**< \brief Specifies interrupt requested node TRIGO 4 */
+ IfxSent_InterruptNodePointer_trigo5 /**< \brief Specifies interrupt requested node TRIGO 5 */
+} IfxSent_InterruptNodePointer;
+
+/** \brief SENT.CH[channelId].VIEW.RDNPy( y=0,1,..7 ).Specifies receive data target nibble pointer
+ */
+typedef enum
+{
+ IfxSent_Nibble_0 = 0, /**< \brief Specifies receive data target nibble pointer to nibble 0 */
+ IfxSent_Nibble_1, /**< \brief Specifies receive data target nibble pointer to nibble 1 */
+ IfxSent_Nibble_2, /**< \brief Specifies receive data target nibble pointer to nibble 2 */
+ IfxSent_Nibble_3, /**< \brief Specifies receive data target nibble pointer to nibble 3 */
+ IfxSent_Nibble_4, /**< \brief Specifies receive data target nibble pointer to nibble 4 */
+ IfxSent_Nibble_5, /**< \brief Specifies receive data target nibble pointer to nibble 5 */
+ IfxSent_Nibble_6, /**< \brief Specifies receive data target nibble pointer to nibble 6 */
+ IfxSent_Nibble_7 /**< \brief Specifies receive data target nibble pointer to nibble 7 */
+} IfxSent_Nibble;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_SENT.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxSent_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxSent_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxSent_SleepMode;
+
+/** \brief Specifies the SENT SPC operational mode
+ */
+typedef enum
+{
+ IfxSent_SpcMode_sync = 0, /**< \brief Specifies synchronous SPC mode */
+ IfxSent_SpcMode_range = 1, /**< \brief Specifies range selection SPC mode */
+ IfxSent_SpcMode_bidirectional = 2 /**< \brief Specifies bidirectional transmit SPC mode */
+} IfxSent_SpcMode;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxSent_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxSent_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxSent_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxSent_SuspendMode;
+
+/** \brief SENT.CH[channelId].SCR.BASE, Specifies selection of pulse based on time
+ */
+typedef enum
+{
+ IfxSent_TimeBase_measuredFrequency = 0, /**< \brief Specifies selection of pulse based on measured frequency */
+ IfxSent_TimeBase_nominalFrequency = 1 /**< \brief Specifies selection of pulse based on nomianl frequency */
+} IfxSent_TimeBase;
+
+/** \brief SENT.CH[channelId].SCR.TRIG, Specifies trigger source for pulse generation
+ */
+typedef enum
+{
+ IfxSent_TriggerSource_off = 0, /**< \brief Specifies no pulse generation */
+ IfxSent_TriggerSource_immediate = 1, /**< \brief Specifies immediate pulse generation */
+ IfxSent_TriggerSource_fallingEdge = 2, /**< \brief Specifies pulse generation at fallingEdge */
+ IfxSent_TriggerSource_externalTrigger = 3 /**< \brief Specifies pulse generation after each external trigger */
+} IfxSent_TriggerSource;
+
+/** \} */
+
+/** \brief Sent Interrupt Source
+ */
+typedef enum
+{
+ IfxSent_InterruptSource_rsi = 0, /**< \brief Enable Interrupt Request RSI */
+ IfxSent_InterruptSource_rdi = 1, /**< \brief Enable Interrupt Request RDI */
+ IfxSent_InterruptSource_rbi = 2, /**< \brief Enable Interrupt Request RBI */
+ IfxSent_InterruptSource_tdi = 3, /**< \brief Enable Interrupt Request TDI */
+ IfxSent_InterruptSource_tbi = 4, /**< \brief Enable Interrupt Request TBI */
+ IfxSent_InterruptSource_fri = 5, /**< \brief Enable Interrupt Request FRI */
+ IfxSent_InterruptSource_fdi = 6, /**< \brief Enable Interrupt Request FDI */
+ IfxSent_InterruptSource_nni = 7, /**< \brief Enable Interrupt Request NNI */
+ IfxSent_InterruptSource_nvi = 8, /**< \brief Enable Interrupt Request NVI */
+ IfxSent_InterruptSource_crci = 9, /**< \brief Enable Interrupt Request crci */
+ IfxSent_InterruptSource_wsi = 10, /**< \brief Enable Interrupt Request wsi */
+ IfxSent_InterruptSource_sdi = 11, /**< \brief Enable Interrupt Request sdi */
+ IfxSent_InterruptSource_scri = 12, /**< \brief Enable Interrupt Request scri */
+ IfxSent_InterruptSource_wdi = 13 /**< \brief Enable Interrupt Request wdi */
+} IfxSent_InterruptSource;
+
+/** \addtogroup IfxLld_Sent_Std_Configuration
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Sets the operation mode of SENT kernel
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \param alternateInput alternate input/output pin for SENT operation
+ * \return None
+ */
+IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput);
+
+/** \brief Set the module time stamp pre-divider
+ * \param sent base address of the SENT register space
+ * \param timeStampPreDivider time stamp pre-divider value
+ * \return None
+ */
+IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider);
+
+/** \} */
+
+/** \addtogroup IfxLld_Sent_Std_Interrupts
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Copies the current interrupt flags into the Ifx_SENT_CH_INTSTAT structure, and clears the flags in hardware.
+ *
+ * This function should be used in an ISR to retrieve the events which triggered the interrupt.
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return Interrupt flags which have been cleared.
+ */
+IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Gets the current channel status
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return current channel interrupt status
+ */
+IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief gets the source for channel interrupt handler
+ * \param channelId SENT channel number
+ * \return interrupt source
+ */
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxSent_getChannelSrc(IfxSent_ChannelId channelId);
+
+/** \} */
+
+/** \addtogroup IfxLld_Sent_Std_Operative
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable the channel with the channel number
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return None
+ */
+IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Disable the SENT module
+ * \param sent base address of the SENT register space
+ * \return None
+ */
+IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent);
+
+/** \brief Enable the channel with the channel number
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return None
+ */
+IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Enable the SENT module
+ * \param sent base address of the SENT register space
+ * \return None
+ */
+IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param sent Pointer to SENT module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent);
+
+/** \brief Sets the sensitivity of the module to sleep signal
+ * \param sent pointer to SENT registers
+ * \param mode mode selection (enable / disable)
+ * \return None
+ */
+IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param sent Pointer to SENT module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Resets the SENT module
+ * \param sent base address of the SENT register space
+ * \return None
+ */
+IFX_EXTERN void IfxSent_resetModule(Ifx_SENT *sent);
+
+/** \} */
+
+/** \addtogroup IfxLld_Sent_Std_Baudrate
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Sets the channel fractional baudrate divider
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \param divider channel baudrate fractional divider
+ * \return None
+ */
+IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider);
+
+/** \brief Sets the channel baudrate pre-divider
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \param preDivider channel baudrate pre-divider
+ * \return None
+ */
+IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the current module frequency in Hertz.
+ * \param sent base address of the SENT register space
+ * \return The current module frequency in Hertz
+ */
+IFX_EXTERN float32 IfxSent_getModuleClock(Ifx_SENT *sent);
+
+/** \brief Initializes the desired unit time (f_tick) for the external SENT device connected to the given channel
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \param tUnit desired unit time (f_tick), e.g. 3E-6 for 3 uS
+ * \return None
+ */
+IFX_EXTERN void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit);
+
+/** \brief Initialize and get the clock for SENT kernel
+ * \param sent base address of the SENT register space
+ * \param dividerMode Divider mode for clock output
+ * \param stepValue clock frequency for for module fractional divider
+ * \return None
+ */
+IFX_EXTERN void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue);
+
+/** \} */
+
+/** \addtogroup IfxLld_Sent_Std_IO
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initializes a SENT input
+ * \param sentIn the SENT Pin which should be configured
+ * \param inputMode the pin input mode which should be configured
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver);
+
+/** \brief Initializes a SPC output
+ * \param spcOut the SPC Pin which should be configured
+ * \param spcOutMode Port Output Mode
+ * \param padDriver the pad driver mode which should be configured
+ * \return None
+ */
+IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Set the watch dog timer limit value for sent channel.
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \param watchDogTimerLimit Specifies the watch dog timer limit value.
+ * \return None
+ */
+IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit);
+
+/** \brief Return TRUE if SENT module is enabled
+ * \param sent base address of the SENT register space
+ * \return The status of whether clock for sent is enabled or disabled
+ */
+IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent);
+
+/** \brief Return the Interrupt Status of the SENT channel
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \param source enable the interrupt source of any interrupt of SENT Channel
+ * \return The Interrupt Status of SENT channel
+ */
+IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source);
+
+/**
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \param source enable the interrupt source of any interrupt of SENT Channel
+ * \return None
+ */
+IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source);
+
+/**
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return The Data content of a recieved Data Frame
+ */
+IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Reads and returns value in RSR (Received Status Register).
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return Returns 32 bit RSR
+ */
+IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Returns 4 bit CRC value in Receive Status Register
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return 4 bit CRC
+ */
+IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Returns 2 bit CST value in Receive Status Register
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return 2 bit CST
+ */
+IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Returns 4 bit SCN value in Receive Status Register
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return 4 bit SCN
+ */
+IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Returns 32 bit Received Time Stamp Value
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return 32 bit Time Stamp
+ */
+IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Returns 6 bit PLEN value in SCR Register
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return 6 bit PLEN
+ */
+IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/** \brief Returns 6 bit Delay length value in SCR Register
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return 6 bit DEL
+ */
+IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the current unit time (f_tick) of the given channel
+ * \param sent base address of the SENT register space
+ * \param channelId SENT channel number
+ * \return The current unit time in seconds
+ */
+IFX_EXTERN float32 IfxSent_getChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxSent_disableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ sent->CH[channelId].RCR.B.CEN = 0;
+}
+
+
+IFX_INLINE void IfxSent_disableModule(Ifx_SENT *sent)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ sent->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxSent_enableChannel(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ sent->CH[channelId].RCR.B.CEN = 1;
+}
+
+
+IFX_INLINE void IfxSent_enableModule(Ifx_SENT *sent)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ sent->CLC.B.DISR = 0;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ if (sent->CLC.U)
+ {}
+}
+
+
+IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getAndClearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ Ifx_SENT_CH_INTSTAT interruptFlags;
+ interruptFlags.U = sent->CH[channelId].INTSTAT.U;
+ sent->CH[channelId].INTCLR.U = interruptFlags.U;
+ return interruptFlags;
+}
+
+
+IFX_INLINE Ifx_SENT_CH_INTSTAT IfxSent_getChannelInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ Ifx_SENT_CH_INTSTAT interruptFlags;
+ interruptFlags.U = sent->CH[channelId].INTSTAT.U;
+ return interruptFlags;
+}
+
+
+IFX_INLINE volatile Ifx_SRC_SRCR *IfxSent_getChannelSrc(IfxSent_ChannelId channelId)
+{
+ return &MODULE_SRC.SENT.SENT[0].SR[channelId];
+}
+
+
+IFX_INLINE void IfxSent_initSentPin(const IfxSent_Sent_In *sentIn, IfxPort_InputMode inputMode, IfxPort_PadDriver padDriver)
+{
+ if (sentIn->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeInput(sentIn->pin.port, sentIn->pin.pinIndex, inputMode);
+ IfxPort_setPinPadDriver(sentIn->pin.port, sentIn->pin.pinIndex, padDriver);
+ IfxSent_setAltiInput(sentIn->module, sentIn->channelId, (IfxSent_AlternateInput)sentIn->select);
+ }
+}
+
+
+IFX_INLINE void IfxSent_initSpcPin(const IfxSent_Spc_Out *spcOut, IfxPort_OutputMode spcOutMode, IfxPort_PadDriver padDriver)
+{
+ if (spcOut->pin.port != NULL_PTR)
+ {
+ IfxPort_setPinModeOutput(spcOut->pin.port, spcOut->pin.pinIndex, spcOutMode, spcOut->select);
+ IfxPort_setPinPadDriver(spcOut->pin.port, spcOut->pin.pinIndex, padDriver);
+ }
+}
+
+
+IFX_INLINE boolean IfxSent_isModuleSuspended(Ifx_SENT *sent)
+{
+ Ifx_SENT_OCS ocs;
+
+ // read the status
+ ocs.U = sent->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxSent_setAltiInput(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_AlternateInput alternateInput)
+{
+ sent->CH[channelId].IOCR.B.ALTI = alternateInput;
+}
+
+
+IFX_INLINE void IfxSent_setChannelFractionalDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 divider)
+{
+ sent->CH[channelId].CFDR.B.DIV = divider;
+}
+
+
+IFX_INLINE void IfxSent_setChannelPreDivider(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 preDivider)
+{
+ sent->CH[channelId].CPDR.B.PDIV = preDivider;
+}
+
+
+IFX_INLINE void IfxSent_setSleepMode(Ifx_SENT *sent, IfxSent_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ sent->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxSent_setSuspendMode(Ifx_SENT *sent, IfxSent_SuspendMode mode)
+{
+ Ifx_SENT_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ sent->OCS.U = ocs.U;
+}
+
+
+IFX_INLINE void IfxSent_setTimeStampPredivider(Ifx_SENT *sent, uint32 timeStampPreDivider)
+{
+ sent->TPD.B.TDIV = timeStampPreDivider;
+}
+
+
+IFX_INLINE void IfxSent_setWatchDogTimerLimit(Ifx_SENT *sent, IfxSent_ChannelId channelId, uint16 watchDogTimerLimit)
+{
+ sent->CH[channelId].WDT.B.WDLx = watchDogTimerLimit;
+}
+
+
+IFX_INLINE boolean IfxSent_isModuleEnabled(Ifx_SENT *sent)
+{
+ return sent->CLC.B.DISS == 0;
+}
+
+
+IFX_INLINE boolean IfxSent_getInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
+{
+ return (sent->CH[channelId].INTSTAT.U >> source) == 1;
+}
+
+
+IFX_INLINE void IfxSent_clearInterruptStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId, IfxSent_InterruptSource source)
+{
+ sent->CH[channelId].INTCLR.U = (1 << source);
+}
+
+
+IFX_INLINE uint32 IfxSent_readReceivedData(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ return sent->RDR[channelId].U;
+}
+
+
+IFX_INLINE uint32 IfxSent_readReceivedStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ return sent->CH[channelId].RSR.U;
+}
+
+
+IFX_INLINE uint8 IfxSent_readReceivedCrc(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ return sent->CH[channelId].RSR.B.CRC;
+}
+
+
+IFX_INLINE uint8 IfxSent_readReceivedChannelStatus(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ return sent->CH[channelId].RSR.B.CST;
+}
+
+
+IFX_INLINE uint8 IfxSent_readReceivedStatusAndCommunicationNibble(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ return sent->CH[channelId].RSR.B.SCN;
+}
+
+
+IFX_INLINE uint32 IfxSent_readReceivedTimeStamp(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ return sent->RTS[channelId].U;
+}
+
+
+IFX_INLINE uint8 IfxSent_readSpcPulseLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ return sent->CH[channelId].SCR.B.PLEN;
+}
+
+
+IFX_INLINE uint8 IfxSent_readSpcDelayLength(Ifx_SENT *sent, IfxSent_ChannelId channelId)
+{
+ return sent->CH[channelId].SCR.B.DEL;
+}
+
+
+#endif /* IFXSENT_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu/Std/IfxSmu.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu/Std/IfxSmu.c
new file mode 100644
index 0000000..3ffb9ac
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu/Std/IfxSmu.c
@@ -0,0 +1,321 @@
+/**
+ * \file IfxSmu.c
+ * \brief SMU basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxSmu.h"
+#include "Port/Std/IfxPort.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config)
+{
+ /* FIXME IfxSmu_Fsp is not required, only need Ifx_SMU */
+ boolean result = TRUE;
+
+ float32 fBack = 100e6;
+ uint16 endinitSfty_pw;
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ IfxSmu_unlock(smu);
+
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->AGC.B.EFRST = config->enableFaultToRunStateTransition ? 1 : 0;
+ smu->FSP.B.PES = config->emergencyStopEnabled ? 1 : 0;
+ smu->FSP.B.MODE = config->mode == IfxSmu_Fsp_Mode_bistable ? 0 : 2;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+
+ {
+ uint32 tFspHigh;
+ boolean ok = FALSE;
+
+ float32 tSmuFs;
+ uint32 i;
+
+ for (i = 0; i < 8; i++)
+ {
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->FSP.B.PRE1 = i; /* Write PRE1 to get TFSP_LOW value */
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+
+ tSmuFs = (1 << (smu->FSP.B.PRE1 + 1)) / fBack;
+
+ /*
+ * tFSP_FS = tSMU_FS *(SMU_FSP.TFSP_HIGH[] & SMU_FSP.TFSP_LOW[] + 1)
+ *
+ * tFSP_FS = tSMU_FS *(SMU_FSP.TFSP + 1)
+ * (SMU_FSP.TFSP + 1) = tFSP_FS / tSMU_FS
+ *
+ *
+ */
+
+ tFspHigh = ((uint32)(config->faultStateTime / tSmuFs) - 1) >> IFX_SMU_FSP_TFSP_LOW_LEN;
+
+ /* FIXME check why condition is always true */
+
+ if (
+ (config->faultStateTime <= tSmuFs * (((tFspHigh << IFX_SMU_FSP_TFSP_LOW_LEN) | (smu->FSP.B.TFSP_LOW)) + 1)) /* Check minimal fault time */
+ && (tFspHigh <= IFX_SMU_FSP_TFSP_HIGH_MSK) /* Check for overflow */
+ )
+ {
+ ok = TRUE;
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->FSP.B.TFSP_HIGH = tFspHigh;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ break;
+ }
+ }
+
+ result &= ok;
+ }
+
+ if (config->mode == IfxSmu_Fsp_Mode_timeSwitching)
+ {
+ uint32 dividers[4] = {512, 1024, 2048, 4096};
+ uint32 i;
+ float32 fSmuFfs;
+ boolean ok = FALSE;
+
+ for (i = 0; i < 4; i++)
+ {
+ fSmuFfs = fBack / dividers[i];
+
+ if ((config->faultFreeStateFrequencyMin < fSmuFfs) && (fSmuFfs < config->faultFreeStateFrequencyMax))
+ {
+ ok = TRUE;
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->FSP.B.PRE2 = i;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ break;
+ }
+ }
+
+ result &= ok;
+ }
+
+ {
+ IfxSmu_Fsp_Out *out = IfxSmu_Fsp_Out_pinTable[0][0];
+ IfxPort_setPinModeOutput(out->pin.port, out->pin.pinIndex, IfxPort_OutputMode_pushPull, IfxPort_OutputIdx_general);
+ IfxPort_setPinPadDriver(out->pin.port, out->pin.pinIndex, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+ }
+
+ {
+ /* Configure the FSP port to output */
+ Ifx_SMU_PCTL regPctrl;
+ regPctrl.U = smu->PCTL.U;
+
+ regPctrl.B.HWDIR = 1; /* Set to output */
+ regPctrl.B.HWEN = 1; /* Port is driven by FSP */
+ regPctrl.B.PCS = 1; /* PAD is controlled by the SMU */
+
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->PCTL.U = regPctrl.U;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ }
+
+ IfxSmu_lock(smu);
+
+ return result;
+}
+
+
+boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg)
+{
+ Ifx_SMU_CMD reg;
+ Ifx_SMU_STS status;
+ uint16 endinitSfty_pw;
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ reg.U = 0;
+ reg.B.CMD = cmd;
+ reg.B.ARG = arg;
+
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->CMD.U = reg.U;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+
+ status.U = smu->STS.U;
+ return (status.B.CMD == cmd) && (status.B.ARG == arg) && (status.B.RES == 0);
+}
+
+
+float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu)
+{
+ float32 fBack = 100e6;
+ uint32 dividers[4] = {512, 1024, 2048, 4096};
+
+ return fBack / dividers[smu->FSP.B.PRE2];
+}
+
+
+float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu)
+{
+ float32 fBack = 100e6;
+ float32 tSmuFs;
+
+ tSmuFs = (1 << (smu->FSP.B.PRE1 + 1)) / fBack;
+
+ return tSmuFs * (((smu->FSP.B.TFSP_HIGH << IFX_SMU_FSP_TFSP_LOW_LEN) | (smu->FSP.B.TFSP_LOW)) + 1);
+}
+
+
+boolean IfxSmu_unlock(Ifx_SMU *smu)
+{
+ boolean result;
+
+ if (smu->KEYS.B.PERLCK != 0xFF)
+ {
+ uint16 endinitSfty_pw;
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->KEYS.B.CFGLCK = 0xBC;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+ result = TRUE;
+ }
+ else
+ {
+ result = FALSE;
+ }
+
+ return result;
+}
+
+
+void IfxSmu_lock(Ifx_SMU *smu)
+{
+ uint16 endinitSfty_pw;
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->KEYS.B.CFGLCK = 0x00;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+}
+
+
+void IfxSmu_lockForever(Ifx_SMU *smu)
+{
+ uint16 endinitSfty_pw;
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->KEYS.B.PERLCK = 0xFF;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+}
+
+
+void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config)
+{
+ uint16 endinitSfty_pw;
+ IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
+ uint32 index = alarm & 0xFF;
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+
+ smu->AGCF[group][0].U &= ~(1 << index);
+ smu->AGCF[group][1].U &= ~(1 << index);
+ smu->AGCF[group][2].U &= ~(1 << index);
+
+ smu->AGCF[group][0].U |= ((config >> 0) & 1) << index;
+ smu->AGCF[group][1].U |= ((config >> 1) & 1) << index;
+ smu->AGCF[group][2].U |= ((config >> 2) & 1) << index;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+}
+
+
+void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled)
+{
+ uint16 endinitSfty_pw;
+ IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
+ uint32 index = alarm & 0xFF;
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->AGFSP[group].U &= (~1) << index;
+
+ smu->AGFSP[group].U |= (enabled ? 1 : 0) << index;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+}
+
+
+boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm)
+{
+ IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
+ uint32 index = alarm & 0xFF;
+
+ return ((smu->AG[group].U >> index) & 1) != 0;
+}
+
+
+IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu)
+{
+ IfxSmu_AlarmGroup group;
+ uint32 index;
+
+ for (group = IfxSmu_AlarmGroup_0; group <= IfxSmu_AlarmGroup_6; group++)
+ {
+ index = __clz(smu->AG[group].U);
+
+ if (index != 32)
+ {
+ return (IfxSmu_Alarm)((group << 8) | (31 - index));
+ }
+ }
+
+ return IfxSmu_Alarm_noAlarm;
+}
+
+
+void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
+{
+ uint16 endinitSfty_pw;
+ IfxSmu_AlarmGroup group = (IfxSmu_AlarmGroup)((alarm >> 8) & 0xFF);
+ uint32 index = alarm & 0xFF;
+ endinitSfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ IfxScuWdt_clearSafetyEndinit(endinitSfty_pw);
+ smu->AG[group].U = 1 << index;
+ IfxScuWdt_setSafetyEndinit(endinitSfty_pw);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu/Std/IfxSmu.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu/Std/IfxSmu.h
new file mode 100644
index 0000000..6182a66
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu/Std/IfxSmu.h
@@ -0,0 +1,344 @@
+/**
+ * \file IfxSmu.h
+ * \brief SMU basic functionality
+ * \ingroup IfxLld_Smu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Smu_Std_func_fsp FSP Functions
+ * \ingroup IfxLld_Smu_Std
+ * \defgroup IfxLld_Smu_Std_func SMU Functions
+ * \ingroup IfxLld_Smu_Std
+ * \defgroup IfxLld_Smu_Std_datastructures Data Structures
+ * \ingroup IfxLld_Smu_Std
+ */
+
+#ifndef IFXSMU_H
+#define IFXSMU_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxSmu_cfg.h"
+#include "Cpu/Std/Ifx_Types.h"
+#include "_PinMap/IfxSmu_PinMap.h"
+#include "IfxSmu_reg.h"
+#include "IfxSmu_regdef.h"
+#include "IfxSmu_bf.h"
+#include "_Utilities/Ifx_Assert.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Smu_Std_datastructures
+ * \{ */
+/** \brief SMU Alarm Configuration
+ * Ifx_SMU.AGCF[][]
+ */
+typedef enum
+{
+ IfxSmu_AlarmConfig_noAction = 0, /**< \brief No Action. Reset value. Alarm disabled. */
+ IfxSmu_AlarmConfig_interruptSet0 = 2, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 0 */
+ IfxSmu_AlarmConfig_interruptSet1 = 3, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 1 */
+ IfxSmu_AlarmConfig_interruptSet2 = 4, /**< \brief Sends an interrupt request to the interrupt system according to the Interrupt Generation Configuration Set 2 */
+ IfxSmu_AlarmConfig_nmi = 5, /**< \brief Sends an NMI request to the SCU */
+ IfxSmu_AlarmConfig_scuReset = 6, /**< \brief Sends a reset request to SCU */
+ IfxSmu_AlarmConfig_cpuIdle = 7 /**< \brief Triggers a CPU idle request */
+} IfxSmu_AlarmConfig;
+
+/** \brief SMU Commands
+ */
+typedef enum
+{
+ IfxSmu_Cmd_start = 0, /**< \brief Forces the SSM to go to the RUN state from the START state. */
+ IfxSmu_Cmd_activateFsp = 1, /**< \brief Activates the Fault Signaling Protocol. */
+ IfxSmu_Cmd_releaseFsp = 2, /**< \brief Turns the FSP into the fault free state. */
+ IfxSmu_Cmd_activatePes = 3, /**< \brief Triggers the activation of the Port Emergency Stop (PES). */
+ IfxSmu_Cmd_stopRecoveryTimer = 4, /**< \brief Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product. */
+ IfxSmu_Cmd_enableClearAlarmStatus = 5, /**< \brief Alarm Status Clear Enable Command */
+ IfxSmu_Cmd_triggerAlarm = 6 /**< \brief Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping" */
+} IfxSmu_Cmd;
+
+typedef enum
+{
+ IfxSmu_Fsp_Mode_bistable, /**< \brief Bi-stable fault signalling protocol */
+ IfxSmu_Fsp_Mode_timeSwitching /**< \brief Time switching protocol */
+} IfxSmu_Fsp_Mode;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Smu_Std_datastructures
+ * \{ */
+/** \brief FSP Configuration Structure
+ */
+typedef struct
+{
+ IfxSmu_Fsp_Mode mode; /**< \brief FSP mode */
+ float32 faultStateTime; /**< \brief Minimal fault state time in sec */
+ float32 faultFreeStateFrequencyMin; /**< \brief Min fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching */
+ float32 faultFreeStateFrequencyMax; /**< \brief Max fault free state frequency in Hz, only valid if mode=IfxSmu_Fsp_Mode_timeSwitching */
+ boolean emergencyStopEnabled; /**< \brief If TRUE, the emergency stop port is triggered on FSP fault state */
+ boolean enableFaultToRunStateTransition; /**< \brief Enable Fault to Run State Transition */
+} IfxSmu_configFsp;
+
+/** \} */
+
+/** \addtogroup IfxLld_Smu_Std_func_fsp
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Turns the FSP into the fault free state.
+ * \param smu Pointer to SMU module registers
+ */
+IFX_INLINE boolean IfxSmu_releaseFsp(Ifx_SMU *smu);
+
+/** \brief Initialize the FSP configuartion to default
+ * \param config FSP Configuration Structure
+ * \return None
+ */
+IFX_INLINE void IfxSmu_initFspConfig(IfxSmu_configFsp *config);
+
+/** \brief Activates the Fault Signaling Protocol.
+ * \param smu Pointer to SMU module registers
+ */
+IFX_INLINE boolean IfxSmu_activateFsp(Ifx_SMU *smu);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Initialize the FSP
+ *
+ * Fault state time >= tFSP_FS = tSMU_FS *(SMU_FSP.TFSP_HIGH[] & SMU_FSP.TFSP_LOW[] + 1)
+ * with tSMU_FS = . SMU_FSP.TFSP_HIGH[] / fBACK
+ * and SMU_FSP.PRE1 should enable tFSP_FS >= 500ms (Ref: TC27xC UM v2.2: SMU_FSP.TFSP_HIGH)
+ * Fault free state period (Time switching only) = tSMU_FFS = fBACK /
+ *
+ * Note: TSMU_FS * SMU_FSP.TFSP_LOW > 250us
+ * \param smu Pointer to SMU module registers
+ * \param config FSP Configuration Structure
+ */
+IFX_EXTERN boolean IfxSmu_initFsp(Ifx_SMU *smu, IfxSmu_configFsp *config);
+
+/** \brief Return FSP frequency (Time switching only)
+ * \param smu Pointer to SMU module registers
+ */
+IFX_EXTERN float32 IfxSmu_getFspFaultFreeFrequency(Ifx_SMU *smu);
+
+/** \brief Return the minimal fault state time
+ * \param smu Pointer to SMU module registers
+ */
+IFX_EXTERN float32 IfxSmu_getFspFaultStateTime(Ifx_SMU *smu);
+
+/** \brief Set the alarm FSP configuration
+ * \param smu Pointer to SMU Module Registers
+ * \param alarm Alarm to be configured
+ * \param enabled If TRUE, the alarm event triggers the FSP, else no action
+ * \return None
+ */
+IFX_EXTERN void IfxSmu_enableAlarmFsp(Ifx_SMU *smu, IfxSmu_Alarm alarm, boolean enabled);
+
+/** \} */
+
+/** \addtogroup IfxLld_Smu_Std_func
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Triggers the activation of the Port Emergency Stop (PES).
+ * \param smu Pointer to SMU module registers
+ */
+IFX_INLINE boolean IfxSmu_activatePes(Ifx_SMU *smu);
+
+/** \brief Stop the recovery Timer. Argument ARG shall be set to the recovery timer instance available in the product.
+ * \param smu Pointer to SMU module registers
+ * \param timer Recovery Timer
+ */
+IFX_INLINE boolean IfxSmu_stopRecoveryTimer(Ifx_SMU *smu, IfxSmu_RecoveryTimer timer);
+
+/** \brief Alarm Status Clear Enable Command.
+ * \param smu Pointer to SMU module registers
+ */
+IFX_INLINE boolean IfxSmu_enableClearAlarmStatus(Ifx_SMU *smu);
+
+/** \brief Triggers a software based alarm. ARG specifies the alarm index according to the mapping defined in "Alarm Mapping"
+ * \param smu Pointer to SMU module registers
+ * \param alarm Alarm list
+ */
+IFX_INLINE boolean IfxSmu_triggerAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm);
+
+/** \brief Forces the SSM to go to the RUN state from the START state.
+ * \param smu Pointer to SMU module registers
+ */
+IFX_INLINE boolean IfxSmu_start(Ifx_SMU *smu);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Unlock the SMU configuration (temporary)
+ * Ref: TC27xC UM v2.2: 9.4.6 SMU Control Interface
+ * Ref: TC27xC UM v2.2: 9.5.2 SMU Configuration Registers
+ * \param smu Pointer to SMU module registers
+ * \param cmd SMU Command
+ * \param arg Argument to be used with the command
+ */
+IFX_EXTERN boolean IfxSmu_cmd(Ifx_SMU *smu, uint8 cmd, uint8 arg);
+
+/** \brief Unlock the SMU configuration (temporary)
+ * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
+ * \param smu Pointer to SMU module registers
+ */
+IFX_EXTERN boolean IfxSmu_unlock(Ifx_SMU *smu);
+
+/** \brief Lock the SMU configuration (temporary)
+ * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
+ * \param smu Pointer to SMU module registers
+ * \return None
+ */
+IFX_EXTERN void IfxSmu_lock(Ifx_SMU *smu);
+
+/** \brief Lock the SMU configuration up to the next application reset
+ * Ref: TC27xC UM v2.2: 9.4.10.1 Register Write Protection
+ * \param smu Pointer to SMU module registers
+ * \return None
+ */
+IFX_EXTERN void IfxSmu_lockForever(Ifx_SMU *smu);
+
+/** \brief Set the SMU alarm configuration
+ * \param smu Pointer to SMU module registers
+ * \param alarm Alarm to be configured
+ * \param config Alarm configuration
+ * \return None
+ */
+IFX_EXTERN void IfxSmu_setAlarmConfig(Ifx_SMU *smu, IfxSmu_Alarm alarm, IfxSmu_AlarmConfig config);
+
+/** \brief Return the alarm status
+ * \param smu Pointer to SMU Module Registers
+ * \param alarm Alarm for which to return the status
+ * \return TRUE means the alarm is set and FALSE means the alarm is not set.
+ */
+IFX_EXTERN boolean IfxSmu_isAlarmSet(Ifx_SMU *smu, IfxSmu_Alarm alarm);
+
+/** \brief Get the alarm flag
+ * \param smu Pointer to SMU Module Registers
+ * \return Return the next set alarm, if no alarm is set , return IfxSmu_Alarm_noAlarm
+ */
+IFX_EXTERN IfxSmu_Alarm IfxSmu_getAlarm(Ifx_SMU *smu);
+
+/** \brief Clear the alarm flag
+ * \param smu Pointer to SMU Module Registers
+ * \param alarm Alarm for which the flag should be cleared
+ * \return None
+ */
+IFX_EXTERN void IfxSmu_clearAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE boolean IfxSmu_activatePes(Ifx_SMU *smu)
+{
+ return IfxSmu_cmd(smu, IfxSmu_Cmd_activatePes, 0);
+}
+
+
+IFX_INLINE boolean IfxSmu_stopRecoveryTimer(Ifx_SMU *smu, IfxSmu_RecoveryTimer timer)
+{
+ return IfxSmu_cmd(smu, IfxSmu_Cmd_stopRecoveryTimer, timer);
+}
+
+
+IFX_INLINE boolean IfxSmu_enableClearAlarmStatus(Ifx_SMU *smu)
+{
+ return IfxSmu_cmd(smu, IfxSmu_Cmd_enableClearAlarmStatus, 0);
+}
+
+
+IFX_INLINE boolean IfxSmu_triggerAlarm(Ifx_SMU *smu, IfxSmu_Alarm alarm)
+{
+ uint8 index = alarm & 0xFF;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (alarm >> 8) == IfxSmu_AlarmGroup_5);
+ return IfxSmu_cmd(smu, IfxSmu_Cmd_triggerAlarm, index);
+}
+
+
+IFX_INLINE boolean IfxSmu_start(Ifx_SMU *smu)
+{
+ return IfxSmu_cmd(smu, IfxSmu_Cmd_start, 0);
+}
+
+
+IFX_INLINE boolean IfxSmu_releaseFsp(Ifx_SMU *smu)
+{
+ return IfxSmu_cmd(smu, IfxSmu_Cmd_releaseFsp, 0);
+}
+
+
+IFX_INLINE void IfxSmu_initFspConfig(IfxSmu_configFsp *config)
+{
+ config->emergencyStopEnabled = FALSE;
+ config->enableFaultToRunStateTransition = FALSE;
+ config->faultFreeStateFrequencyMin = 0;
+ config->faultFreeStateFrequencyMax = 0;
+ config->faultStateTime = 1e-3;
+ config->mode = IfxSmu_Fsp_Mode_bistable;
+}
+
+
+IFX_INLINE boolean IfxSmu_activateFsp(Ifx_SMU *smu)
+{
+ return IfxSmu_cmd(smu, IfxSmu_Cmd_activateFsp, 0);
+}
+
+
+#endif /* IFXSMU_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Src/Std/IfxSrc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Src/Std/IfxSrc.c
new file mode 100644
index 0000000..773d020
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Src/Std/IfxSrc.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxSrc.c
+ * \brief SRC basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxSrc.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Src/Std/IfxSrc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Src/Std/IfxSrc.h
new file mode 100644
index 0000000..fc83127
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Src/Std/IfxSrc.h
@@ -0,0 +1,300 @@
+/**
+ * \file IfxSrc.h
+ * \brief SRC basic functionality
+ * \ingroup IfxLld_Src
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Src SRC
+ * \addtogroup IfxLld_Src
+ * \{
+ * \defgroup IfxLld_Src_Usage How to use Service Request Mechanism?
+ * \addtogroup IfxLld_Src_Usage
+ * \{
+ *
+ * For Aurix controller peripherals that can generate service requests is connected to one
+ * or more Service Request Nodes (SRNs) in the central Interrupt Router(IR) module. Refer to Controller User Manual for more details\n
+ *
+ * IfxSrc driver provides the APIs to configure and control service requests. Refer \ref IfxLld_Src_Usage for
+ * details of these APIs.
+ *
+ *
+ * \section Ifx_Src_UsageInit Initialize the Service Request Node
+ *
+ * Service request node is initialized to configure the following,\n
+ * 1) Route the interrupt trigger to service provider, which are:\n
+ * __a. One of the available CPUs or\n
+ * __b. DMA controller\n
+ *
+ * 2) Priority of CPU Interrupt or DMA Trigger.
+ *
+ * For Interrupt or DMA to be correctly triggered, following steps are to be done in the user code:
+ *
+ * \subsection Ifx_Src_UsageInitStep1 Step1: Configure the Node
+ *
+ * User must configure the service request node in the application / driver files.
+ *
+ * \subsection Ifx_Src_UsageInitStep2 Step2: Enable the Trigger
+ *
+ * Enable the service request node to connect the trigger event from the hardware to service provider.
+ *
+ * Example:
+ * Following example show the configuration for STM0 Service request 0 trigger configured to trigger
+ * CPU1 with the priority specified by IFX_INTPRIO_STM0 (from the example at IfxCpu_Irq)
+ *
+ * \code
+ * //file: myApplication.c
+ *
+ * #include "Ifx_IntPrioDef.h" // to get the priority numbers
+ *
+ * void myDriverInitFunction(void)
+ * {
+ * // driver init code
+ *
+ * // Step1: Call the function to route the trigger from for SRC_STM0_SR0 to CPU1
+ * // and priority specified at Ifx_IntPrioDef.h globally
+ * IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0, IfxSrc_Tos_cpu1, IFX_INTPRIO_STM0);
+ *
+ * // Step2: Enable the service request node
+ * IfxSrc_init(&MODULE_SRC.STM.STM[0].SR0);
+ * }
+ * \endcode
+ *
+ * \}
+ * \}
+ *
+ * \defgroup IfxLld_Src_Std_Service_Request Service Request Functions
+ * \ingroup IfxLld_Src_Std
+ * \defgroup IfxLld_Src_Std_Module Module Functions
+ * \ingroup IfxLld_Src_Std
+ */
+
+#ifndef IFXSRC_H
+#define IFXSRC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxSrc_cfg.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxSrc_reg.h"
+/** \addtogroup IfxLld_Src_Std_Service_Request
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Resets the overrun flag of the Service Request.
+ * \param src pointer to the Service Request Control register which the overrun flag should be cleared.
+ * \return None
+ *
+ * Usage example: see \ref IfxSrc_init
+ *
+ */
+IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src);
+
+/** \brief Resets a specific interrupt service by software.
+ * \param src pointer to the Service Request Control register which the request should be cleared.
+ * \return None
+ *
+ * Usage example: see \ref IfxSrc_init
+ *
+ */
+IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src);
+
+/** \brief Gets the current overrun status.
+ * \param src pointer to the Service Request Control register for which the overrun status should be returned.
+ * \return current service request control overrun status.
+ *
+ * Usage example: see \ref IfxSrc_init
+ *
+ */
+IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src);
+
+/** \brief Gets the current request status.
+ * \param src pointer to the Service Request Control register for which the request status should be returned.
+ * \return current service request control request status.
+ *
+ * Usage example: see \ref IfxSrc_init
+ *
+ */
+IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src);
+
+/** \brief Requests a specific interrupt service by software
+ * \param src pointer to the Service Request Control register which the interrupt has to be requested.
+ * \return None
+ *
+ * Usage example: see \ref IfxSrc_init
+ *
+ */
+IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src);
+
+/** \} */
+
+/** \addtogroup IfxLld_Src_Std_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief DeInitializes the service request control register.
+ * \param src pointer to the Service Request Control register which should be deinitialised.
+ * \return None
+ *
+ * Usage example: see \ref IfxSrc_init
+ *
+ */
+IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src);
+
+/** \brief Disables a specific interrupt service request.
+ * \param src pointer to the Service Request Control register for which the interrupt has to be disabled.
+ * \return None
+ *
+ * Usage example: see \ref IfxSrc_init
+ *
+ */
+IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src);
+
+/** \brief Enables a specific interrupt service request.
+ * \param src pointer to the Service Request Control register for which the interrupt has to be enabled.
+ * \return None
+ *
+ * Usage example: see \ref IfxSrc_init
+ *
+ */
+IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src);
+
+/** \brief Initializes the service request control register.
+ * \param src pointer to the Service Request Control register which should be initialised.
+ * \param typOfService type of interrupt service provider.
+ * \param priority Interrupt priority.
+ * \return None
+ *
+ * Get the peripheral service control register which request need to be serviced and assign this service to any of service providers.
+ * \code
+ * //define the interrupt priority
+ * #define IFXASCLIN0_TX_INTPRIO 2
+ * //get the service request
+ * volatile Ifx_SRC_SRCR *src = IfxAsclin_getSrcPointerRx( &MODULE_ASCLIN0 );
+ * //initlaise the service request
+ * IfxSrc_init( src, IfxSrc_Tos_cpu0, IFXASCLIN0_TX_INTPRIO );
+ * // enable the service
+ * IfxSrc_enable( src );
+ * //check for service request flags and clear if they occur
+ * if ( IfxSrc_isRequested( src ) == TRUE )
+ * {
+ * IfxSrc_clearRequest( src );
+ * }
+ * if ( IfxSrc_isOverrun( src ) == TRUE )
+ * {
+ * IfxSrc_clearOverrun( src );
+ * }
+ * // Atlast deinitialise the service control
+ * IfxSrc_deinit( src );
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxSrc_clearOverrun(volatile Ifx_SRC_SRCR *src)
+{
+ src->B.IOVCLR = 1;
+}
+
+
+IFX_INLINE void IfxSrc_clearRequest(volatile Ifx_SRC_SRCR *src)
+{
+ src->B.CLRR = 1;
+}
+
+
+IFX_INLINE void IfxSrc_deinit(volatile Ifx_SRC_SRCR *src)
+{
+ src->U = 0;
+}
+
+
+IFX_INLINE void IfxSrc_disable(volatile Ifx_SRC_SRCR *src)
+{
+ src->B.SRE = 0;
+}
+
+
+IFX_INLINE void IfxSrc_enable(volatile Ifx_SRC_SRCR *src)
+{
+ src->B.SRE = 1;
+}
+
+
+IFX_INLINE void IfxSrc_init(volatile Ifx_SRC_SRCR *src, IfxSrc_Tos typOfService, Ifx_Priority priority)
+{
+ src->B.SRPN = priority;
+ src->B.TOS = typOfService;
+ IfxSrc_clearRequest(src);
+}
+
+
+IFX_INLINE boolean IfxSrc_isOverrun(volatile Ifx_SRC_SRCR *src)
+{
+ return src->B.IOV ? TRUE : FALSE;
+}
+
+
+IFX_INLINE boolean IfxSrc_isRequested(volatile Ifx_SRC_SRCR *src)
+{
+ return src->B.SRR ? TRUE : FALSE;
+}
+
+
+IFX_INLINE void IfxSrc_setRequest(volatile Ifx_SRC_SRCR *src)
+{
+ src->B.SETR = 1;
+}
+
+
+#endif /* IFXSRC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Std/IfxStm.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Std/IfxStm.c
new file mode 100644
index 0000000..6ba59f5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Std/IfxStm.c
@@ -0,0 +1,291 @@
+/**
+ * \file IfxStm.c
+ * \brief STM basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxStm.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator)
+{
+ if (comparator == IfxStm_Comparator_0)
+ {
+ stm->ISCR.B.CMP0IRR = 1U;
+ }
+ else if (comparator == IfxStm_Comparator_1)
+ {
+ stm->ISCR.B.CMP1IRR = 1U;
+ }
+}
+
+
+void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
+{
+ if (comparator == IfxStm_Comparator_0)
+ {
+ stm->ICR.B.CMP0EN = 0U;
+ }
+ else // if (comparator == IfxStm_Comparator_1)
+ {
+ stm->ICR.B.CMP1EN = 0U;
+ }
+}
+
+
+void IfxStm_disableModule(Ifx_STM *stm)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ stm->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator)
+{
+ if (comparator == IfxStm_Comparator_0)
+ {
+ stm->ICR.B.CMP0EN = 1U;
+ }
+ else if (comparator == IfxStm_Comparator_1)
+ {
+ stm->ICR.B.CMP1EN = 1U;
+ }
+}
+
+
+void IfxStm_enableOcdsSuspend(Ifx_STM *stm)
+{
+ Ifx_STM_OCS ocs = stm->OCS;
+
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = 2;
+ stm->OCS = ocs;
+ stm->OCS.B.SUS_P = 0;
+}
+
+
+Ifx_STM *IfxStm_getAddress(IfxStm_Index stm)
+{
+ Ifx_STM *module;
+
+ if (stm < IFXSTM_NUM_MODULES)
+ {
+ module = (Ifx_STM *)IfxStm_cfg_indexMap[stm].module;
+ }
+ else
+ {
+ module = NULL_PTR;
+ }
+
+ return module;
+}
+
+
+IfxStm_Index IfxStm_getIndex(Ifx_STM *stm)
+{
+ uint32 index;
+ IfxStm_Index result;
+
+ result = IfxStm_Index_none;
+
+ for (index = 0; index < IFXSTM_NUM_MODULES; index++)
+ {
+ if (IfxStm_cfg_indexMap[index].module == stm)
+ {
+ result = (IfxStm_Index)IfxStm_cfg_indexMap[index].index;
+ break;
+ }
+ }
+
+ return result;
+}
+
+
+volatile Ifx_SRC_SRCR *IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator)
+{
+ IfxStm_Index index;
+ index = IfxStm_getIndex(stm);
+ return comparator == IfxStm_Comparator_0 ? &MODULE_SRC.STM.STM[index].SR0 : &MODULE_SRC.STM.STM[index].SR1;
+}
+
+
+boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config)
+{
+ sint32 index;
+ boolean result;
+ Ifx_STM_CMCON comcon = stm->CMCON;
+ Ifx_STM_ICR icr = stm->ICR;
+
+ if (config->comparator == 0)
+ {
+ comcon.B.MSIZE0 = config->compareSize;
+ comcon.B.MSTART0 = config->compareOffset;
+ icr.B.CMP0OS = config->comparatorInterrupt;
+ result = TRUE;
+ }
+ else if (config->comparator == 1)
+ {
+ comcon.B.MSIZE1 = config->compareSize;
+ comcon.B.MSTART1 = config->compareOffset;
+ icr.B.CMP1OS = config->comparatorInterrupt;
+ result = TRUE;
+ }
+ else
+ {
+ /*Invalid value */
+ result = FALSE;
+ }
+
+ stm->ICR.U = icr.U;
+ stm->CMCON.U = comcon.U;
+
+ /* configure interrupt */
+ index = IfxStm_getIndex(stm);
+
+ if (config->triggerPriority > 0)
+ {
+ volatile Ifx_SRC_SRCR *srcr;
+
+ if (config->comparatorInterrupt == IfxStm_ComparatorInterrupt_ir0)
+ {
+ srcr = &(MODULE_SRC.STM.STM[index].SR0);
+ }
+ else
+ {
+ srcr = &(MODULE_SRC.STM.STM[index].SR1);
+ }
+
+ IfxSrc_init(srcr, config->typeOfService, config->triggerPriority);
+ IfxSrc_enable(srcr);
+ }
+
+ /*Configure the comparator ticks to current value to avoid any wrong triggering*/
+ stm->CMP[config->comparator].U = IfxStm_getOffsetTimer(stm, (uint8)config->compareOffset);
+
+ /* clear the interrupt flag of the selected comparator before enabling the interrupt */
+ /* this is to avaoid the unneccesary interrupt for the compare match of reset values of the registers */
+ IfxStm_clearCompareFlag(stm, config->comparator);
+ /* enable the interrupt for the selected comparator */
+ IfxStm_enableComparatorInterrupt(stm, config->comparator);
+
+ /*Configure the comparator ticks */
+ stm->CMP[config->comparator].U = IfxStm_getOffsetTimer(stm, (uint8)config->compareOffset) + config->ticks;
+
+ return result;
+}
+
+
+void IfxStm_initCompareConfig(IfxStm_CompareConfig *config)
+{
+ config->comparator = IfxStm_Comparator_0;
+ config->compareOffset = IfxStm_ComparatorOffset_0;
+ config->compareSize = IfxStm_ComparatorSize_32Bits;
+ config->comparatorInterrupt = IfxStm_ComparatorInterrupt_ir0; /*User must select the interrupt output */
+ config->ticks = 0xFFFFFFFF;
+ config->triggerPriority = 0;
+ config->typeOfService = IfxSrc_Tos_cpu0;
+}
+
+
+boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator)
+{
+ if (comparator == IfxStm_Comparator_0)
+ {
+ return stm->ICR.B.CMP0IR;
+ }
+ else // if (comparator == IfxStm_Comparator_1)
+ {
+ return stm->ICR.B.CMP1IR;
+ }
+}
+
+
+void IfxStm_resetModule(Ifx_STM *stm)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ stm->KRST0.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ stm->KRST1.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (0 == stm->KRST0.B.RSTSTAT) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ stm->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt)
+{
+ Ifx_STM_CMCON comcon = stm->CMCON;
+ Ifx_STM_ICR icr = stm->ICR;
+
+ if (comparator == 0)
+ {
+ comcon.B.MSIZE0 = size;
+ comcon.B.MSTART0 = offset;
+ icr.B.CMP0OS = interrupt;
+ }
+ else // if (comparator == 1)
+ {
+ comcon.B.MSIZE1 = size;
+ comcon.B.MSTART1 = offset;
+ icr.B.CMP1OS = interrupt;
+ }
+
+ stm->ICR.U = icr.U;
+ stm->CMCON.U = comcon.U;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Std/IfxStm.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Std/IfxStm.h
new file mode 100644
index 0000000..8ef025e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Std/IfxStm.h
@@ -0,0 +1,698 @@
+/**
+ * \file IfxStm.h
+ * \brief STM basic functionality
+ * \ingroup IfxLld_Stm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Stm_Usage How to use the Stm driver?
+ * \ingroup IfxLld_Stm
+ *
+ * The Stm Standard driver provides APIs to initialize, configure and control the Stm.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Stm_Preparation Preparation
+ * \subsection IfxLld_Stm_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ * #include
+ * \endcode
+ *
+ * \subsection IfxLld_Stm_Variables Variables
+ *
+ * Declare STM variables :
+ * \code
+ * Ifx_STM *stmSfr;
+ * IfxStm_CompareConfig stmConfig;
+ * \endcode
+ *
+ * \subsection IfxLld_Stm_Interrupt Interrupt Handler Installation
+ *
+ * See also \ref IfxLld_Cpu_Irq_Usage
+ *
+ * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
+ * \code
+ * // priorities are normally defined in Ifx_IntPrioDef.h
+ * #define IFX_INTPRIO_STM0_SR0 10
+ * \endcode
+ *
+ * Add the interrupt service routines to your C code. They have to call the Stm interrupt handlers:
+ * please take care in choosing number of ticks, the below example code will raise an interrupt
+ * evry time the specified number of ticks have been elapsed.
+ * \code
+ * IFX_INTERRUPT(stm0Sr0ISR, 0, IFX_INTPRIO_STM0_SR0)
+ * {
+ * IfxStm_clearCompareFlag(stmSfr, stmConfig.comparator);
+ * IfxStm_increaseCompare(stmSfr, stmConfig.comparator, stmConfig.ticks);
+ * }
+ * \endcode
+ *
+ * Finally install the interrupt handlers in your initialisation function:
+ * \code
+ * // install interrupt handlers
+ * IfxCpu_Irq_installInterruptHandler(&stm0Sr0ISR, IFX_INTPRIO_STM0_SR0);
+ * IfxCpu_enableInterrupts();
+ * \endcode
+ *
+ * \subsection IfxLld_Stm_Init Module Initialisation
+ *
+ * The STM module can be configured to generate an interrupt at every compare match of the selected comaparator with the desired compare value, the interrupt can further be routed to other comparator.
+ *
+ * The module initialisation can be done as followed.
+ *
+ * \code
+ * stmSfr = &MODULE_STM0;
+ *
+ * IfxStm_initCompareConfig(&stmConfig);
+ *
+ * // configure to generate interrupt every 10 us
+ * sint32 ticks = IfxStm_getTicksFromMicroseconds(10);
+ *
+ * stmConfig.ticks = ticks;
+ *
+ * stmConfig.triggerPriority = IFX_INTPRIO_STM0_SR0;
+ * stmConfig.typeOfService = IfxSrc_Tos_cpu0;
+ *
+ * IfxStm_initCompare(stmSfr, &stmConfig);
+ *
+ * \endcode
+ *
+ * Now the Stm shall generate interrupts regularly based on the configured time !
+ *
+ * \defgroup IfxLld_Stm_Std_Enumerations Enumerations
+ * \ingroup IfxLld_Stm_Std
+ * \defgroup IfxLld_Stm_Std_Structures Data Structures
+ * \ingroup IfxLld_Stm_Std
+ * \defgroup IfxLld_Stm_Std_Module Module Functions
+ * \ingroup IfxLld_Stm_Std
+ * \defgroup IfxLld_Stm_Std_Timer Timer Functions
+ * \ingroup IfxLld_Stm_Std
+ * \defgroup IfxLld_Stm_Std_Comparator Comparator Functions
+ * \ingroup IfxLld_Stm_Std
+ */
+
+#ifndef IFXSTM_H
+#define IFXSTM_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxStm_cfg.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "Src/Std/IfxSrc.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Stm_Std_Enumerations
+ * \{ */
+/** \brief Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2)
+ */
+typedef enum
+{
+ IfxStm_Comparator_0 = 0, /**< \brief Comparator Id 0 */
+ IfxStm_Comparator_1 /**< \brief Comparator Id 1 */
+} IfxStm_Comparator;
+
+/** \brief Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1)
+ */
+typedef enum
+{
+ IfxStm_ComparatorInterrupt_ir0 = 0, /**< \brief Select STMIR0 */
+ IfxStm_ComparatorInterrupt_ir1 = 1 /**< \brief Select STMIR1 */
+} IfxStm_ComparatorInterrupt;
+
+/** \brief Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2)
+ */
+typedef enum
+{
+ IfxStm_ComparatorOffset_0 = 0, /**< \brief Comparator start bit position 0 with 64 bit timer */
+ IfxStm_ComparatorOffset_1, /**< \brief Comparator start bit position 1 with 64 bit timer */
+ IfxStm_ComparatorOffset_2, /**< \brief Comparator start bit position 2 with 64 bit timer */
+ IfxStm_ComparatorOffset_3, /**< \brief Comparator start bit position 3 with 64 bit timer */
+ IfxStm_ComparatorOffset_4, /**< \brief Comparator start bit position 4 with 64 bit timer */
+ IfxStm_ComparatorOffset_5, /**< \brief Comparator start bit position 5 with 64 bit timer */
+ IfxStm_ComparatorOffset_6, /**< \brief Comparator start bit position 6 with 64 bit timer */
+ IfxStm_ComparatorOffset_7, /**< \brief Comparator start bit position 7 with 64 bit timer */
+ IfxStm_ComparatorOffset_8, /**< \brief Comparator start bit position 8 with 64 bit timer */
+ IfxStm_ComparatorOffset_9, /**< \brief Comparator start bit position 9 with 64 bit timer */
+ IfxStm_ComparatorOffset_10, /**< \brief Comparator start bit position 10 with 64 bit timer */
+ IfxStm_ComparatorOffset_11, /**< \brief Comparator start bit position 11 with 64 bit timer */
+ IfxStm_ComparatorOffset_12, /**< \brief Comparator start bit position 12 with 64 bit timer */
+ IfxStm_ComparatorOffset_13, /**< \brief Comparator start bit position 13 with 64 bit timer */
+ IfxStm_ComparatorOffset_14, /**< \brief Comparator start bit position 14 with 64 bit timer */
+ IfxStm_ComparatorOffset_15, /**< \brief Comparator start bit position 15 with 64 bit timer */
+ IfxStm_ComparatorOffset_16, /**< \brief Comparator start bit position 16 with 64 bit timer */
+ IfxStm_ComparatorOffset_17, /**< \brief Comparator start bit position 17 with 64 bit timer */
+ IfxStm_ComparatorOffset_18, /**< \brief Comparator start bit position 18 with 64 bit timer */
+ IfxStm_ComparatorOffset_19, /**< \brief Comparator start bit position 19 with 64 bit timer */
+ IfxStm_ComparatorOffset_20, /**< \brief Comparator start bit position 20 with 64 bit timer */
+ IfxStm_ComparatorOffset_21, /**< \brief Comparator start bit position 21 with 64 bit timer */
+ IfxStm_ComparatorOffset_22, /**< \brief Comparator start bit position 22 with 64 bit timer */
+ IfxStm_ComparatorOffset_23, /**< \brief Comparator start bit position 23 with 64 bit timer */
+ IfxStm_ComparatorOffset_24, /**< \brief Comparator start bit position 24 with 64 bit timer */
+ IfxStm_ComparatorOffset_25, /**< \brief Comparator start bit position 25 with 64 bit timer */
+ IfxStm_ComparatorOffset_26, /**< \brief Comparator start bit position 26 with 64 bit timer */
+ IfxStm_ComparatorOffset_27, /**< \brief Comparator start bit position 27 with 64 bit timer */
+ IfxStm_ComparatorOffset_28, /**< \brief Comparator start bit position 28 with 64 bit timer */
+ IfxStm_ComparatorOffset_29, /**< \brief Comparator start bit position 29 with 64 bit timer */
+ IfxStm_ComparatorOffset_30, /**< \brief Comparator start bit position 30 with 64 bit timer */
+ IfxStm_ComparatorOffset_31 /**< \brief Comparator start bit position 31 with 64 bit timer */
+} IfxStm_ComparatorOffset;
+
+/** \brief Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2)
+ */
+typedef enum
+{
+ IfxStm_ComparatorSize_1Bit = 0, /**< \brief Size of compare value to compare with timer: 1 bit */
+ IfxStm_ComparatorSize_2Bits = 1, /**< \brief Size of compare value to compare with timer: 2 bits */
+ IfxStm_ComparatorSize_3Bits = 2, /**< \brief Size of compare value to compare with timer: 3 bits */
+ IfxStm_ComparatorSize_4Bits = 3, /**< \brief Size of compare value to compare with timer: 4 bits */
+ IfxStm_ComparatorSize_5Bits = 4, /**< \brief Size of compare value to compare with timer: 5 bits */
+ IfxStm_ComparatorSize_6Bits = 5, /**< \brief Size of compare value to compare with timer: 6 bits */
+ IfxStm_ComparatorSize_7Bits = 6, /**< \brief Size of compare value to compare with timer: 7 bits */
+ IfxStm_ComparatorSize_8Bits = 7, /**< \brief Size of compare value to compare with timer: 8 bits */
+ IfxStm_ComparatorSize_9Bits = 8, /**< \brief Size of compare value to compare with timer: 9 bits */
+ IfxStm_ComparatorSize_10Bits = 9, /**< \brief Size of compare value to compare with timer: 10 bits */
+ IfxStm_ComparatorSize_11Bits = 10, /**< \brief Size of compare value to compare with timer: 11 bits */
+ IfxStm_ComparatorSize_12Bits = 11, /**< \brief Size of compare value to compare with timer: 12 bits */
+ IfxStm_ComparatorSize_13Bits = 12, /**< \brief Size of compare value to compare with timer: 13 bits */
+ IfxStm_ComparatorSize_14Bits = 13, /**< \brief Size of compare value to compare with timer: 14 bits */
+ IfxStm_ComparatorSize_15Bits = 14, /**< \brief Size of compare value to compare with timer: 15 bits */
+ IfxStm_ComparatorSize_16Bits = 15, /**< \brief Size of compare value to compare with timer: 16 bits */
+ IfxStm_ComparatorSize_17Bits = 16, /**< \brief Size of compare value to compare with timer: 17 bits */
+ IfxStm_ComparatorSize_18Bits = 17, /**< \brief Size of compare value to compare with timer: 18 bits */
+ IfxStm_ComparatorSize_19Bits = 18, /**< \brief Size of compare value to compare with timer: 19 bits */
+ IfxStm_ComparatorSize_20Bits = 19, /**< \brief Size of compare value to compare with timer: 20 bits */
+ IfxStm_ComparatorSize_21Bits = 20, /**< \brief Size of compare value to compare with timer: 21 bits */
+ IfxStm_ComparatorSize_22Bits = 21, /**< \brief Size of compare value to compare with timer: 22 bits */
+ IfxStm_ComparatorSize_23Bits = 22, /**< \brief Size of compare value to compare with timer: 23 bits */
+ IfxStm_ComparatorSize_24Bits = 23, /**< \brief Size of compare value to compare with timer: 24 bits */
+ IfxStm_ComparatorSize_25Bits = 24, /**< \brief Size of compare value to compare with timer: 25 bits */
+ IfxStm_ComparatorSize_26Bits = 25, /**< \brief Size of compare value to compare with timer: 26 bits */
+ IfxStm_ComparatorSize_27Bits = 26, /**< \brief Size of compare value to compare with timer: 27 bits */
+ IfxStm_ComparatorSize_28Bits = 27, /**< \brief Size of compare value to compare with timer: 28 bits */
+ IfxStm_ComparatorSize_29Bits = 28, /**< \brief Size of compare value to compare with timer: 29 bits */
+ IfxStm_ComparatorSize_30Bits = 29, /**< \brief Size of compare value to compare with timer: 30 bits */
+ IfxStm_ComparatorSize_31Bits = 30, /**< \brief Size of compare value to compare with timer: 31 bits */
+ IfxStm_ComparatorSize_32Bits = 31 /**< \brief Size of compare value to compare with timer: 32 bits */
+} IfxStm_ComparatorSize;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_STM.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxStm_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxStm_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxStm_SleepMode;
+
+/** \brief OCDS Suspend Control (OCDS.SUS)
+ */
+typedef enum
+{
+ IfxStm_SuspendMode_none = 0, /**< \brief No suspend */
+ IfxStm_SuspendMode_hard = 1, /**< \brief Hard Suspend */
+ IfxStm_SuspendMode_soft = 2 /**< \brief Soft Suspend */
+} IfxStm_SuspendMode;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Stm_Std_Structures
+ * \{ */
+/** \brief Comparator Configuration Structure
+ */
+typedef struct
+{
+ IfxStm_Comparator comparator; /**< \brief Comparator Id defined in MODULE_STMx.ISCR.B.CMP0IRR(x = 0, 1, 2). */
+ IfxStm_ComparatorInterrupt comparatorInterrupt; /**< \brief Comparator Interrupt request source defined in MODULE_SRC.STM.STM[index].SRx (x =0, 1). */
+ IfxStm_ComparatorOffset compareOffset; /**< \brief Comparator start bit position defined in MODULE_STMx.CMCON.B.MSTART0(x = 0,1,2). */
+ IfxStm_ComparatorSize compareSize; /**< \brief Size of compare value to compare with timer defined in MODULE_STMx.CMCON.B.MSIZE0(x = 0,1,2). */
+ uint32 ticks; /**< \brief count for next comparison from current timer count. */
+ Ifx_Priority triggerPriority; /**< \brief Interrupt priority. Range = 0 .. 255. 0 = interrupt is disabled. */
+ IfxSrc_Tos typeOfService; /**< \brief Type of service. */
+} IfxStm_CompareConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Stm_Std_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns system timer value.
+ * \param stm pointer to System timer module registers.
+ * \return system timer value.
+ */
+IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm);
+
+/** \brief Returns the system timer frequency.
+ * \param stm pointer to System timer module registers.
+ * \return the system timer frequency in Hz.
+ */
+IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm);
+
+/** \brief Returns the module's suspend state.
+ * TRUE :if module is suspended.
+ * FALSE:if module is not yet suspended.
+ * \param stm Pointer to STM module registers
+ * \return Suspend status (TRUE / FALSE)
+ */
+IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm);
+
+/** \brief Configure the Module to Hard/Soft suspend mode.
+ * Note: The api works only when the OCDS is enabled and in Supervisor Mode. When OCDS is disabled the OCS suspend control is ineffective.
+ * \param stm Pointer to STM module registers
+ * \param mode Module suspend mode
+ * \return None
+ */
+IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disables the Stm module
+ * \param stm pointer to STM registers
+ * \return None
+ */
+IFX_EXTERN void IfxStm_disableModule(Ifx_STM *stm);
+
+/** \brief enable suspend by debugger.
+ * \param stm pointer to System timer module registers.
+ * \return None
+ */
+IFX_EXTERN void IfxStm_enableOcdsSuspend(Ifx_STM *stm);
+
+/** \brief Returns the module index of the selected STM module
+ * \param stm Pointer to STM module registers
+ * \return STM module register address
+ */
+IFX_EXTERN Ifx_STM *IfxStm_getAddress(IfxStm_Index stm);
+
+/** \brief API to get the resource index of the STM specified.
+ * \param stm pointer to System timer module registers.
+ * \return system timer module index.
+ */
+IFX_EXTERN IfxStm_Index IfxStm_getIndex(Ifx_STM *stm);
+
+/** \} */
+
+/** \addtogroup IfxLld_Stm_Std_Timer
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the lower system timer value.
+ * \param stm pointer to System timer module registers.
+ * \return the lower system timer value.
+ */
+IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm);
+
+/** \brief Gets the TIM3 couter value.
+ * \param stm pointer to System timer module registers.
+ * \return TIM3 counter value.
+ */
+IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm);
+
+/** \brief Gets the TIM4 couter value.
+ * \param stm pointer to System timer module registers.
+ * \return TIM4 counter value.
+ */
+IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm);
+
+/** \brief Gets the TIM5 couter value.
+ * \param stm pointer to System timer module registers.
+ * \return TIM5 counter value.
+ */
+IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm);
+
+/** \brief Gets the TIM6 couter value.
+ * \param stm pointer to System timer module registers.
+ * \return TIM6 counter value.
+ */
+IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm);
+
+/** \brief Gets the TIM1 couter value.
+ * \param stm pointer to System timer module registers.
+ * \return TIM1 counter value.
+ */
+IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm);
+
+/** \brief Gets the TIM2 couter value.
+ * \param stm pointer to System timer module registers.
+ * \return TIM2 counter value.
+ */
+IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm);
+
+/** \brief Returns the timer value shifted right by offset.
+ * \param stm pointer to System timer module registers.
+ * \param offset offset value.
+ * \return the lower system timer value shifted by offset.
+ */
+IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset);
+
+/** \brief Wait for requested time.
+ * The macro waits in while loop for the specified time in system timer ticks.
+ * \param stm pointer to System timer module registers.
+ * \param ticks ticks Wait time in system timer ticks.
+ * \return None
+ */
+IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks);
+
+/** \} */
+
+/** \addtogroup IfxLld_Stm_Std_Comparator
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the updated compare register value.
+ * \param stm pointer to System timer module registers.
+ * \param comparator comparator selection comparator.
+ * \return The compare value
+ */
+IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator);
+
+/** \brief Returns the number of ticks for the selected micro seconds based on the STM frequency.
+ * \param stm pointer to System timer module registers.
+ * \param microSeconds Number of micro seconds that need to be converted to ticks
+ * \return ticks
+ */
+IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds);
+
+/** \brief Returns the number of ticks for the selected milli seconds based on the STM frequency.
+ * \param stm pointer to System timer module registers.
+ * \param milliSeconds Number of micro seconds that need to be converted to ticks
+ * \return ticks
+ */
+IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds);
+
+/** \brief Update the compare register value increased with given ticks.
+ * \param stm pointer to System timer module registers.
+ * \param comparator comparator selection comparator.
+ * \param ticks count for next comparison from current timer count.
+ * \return None
+ */
+IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks);
+
+/** \brief Update the compare register value.
+ * \param stm pointer to System timer module registers.
+ * \param comparator comparator selection comparator.
+ * \param ticks count for next comparison.
+ * \return None
+ */
+IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Clear the compare interrupt flag.
+ * \param stm pointer to System timer module registers.
+ * \param comparator comparator selection comparator.
+ * \return None
+ */
+IFX_EXTERN void IfxStm_clearCompareFlag(Ifx_STM *stm, IfxStm_Comparator comparator);
+
+/** \brief Disables the compare interrupt
+ * \param stm pointer to System timer module registers.
+ * \param comparator comparator selection comparator.
+ * \return None
+ */
+IFX_EXTERN void IfxStm_disableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator);
+
+/** \brief Enables the compare interrupt .
+ * \param stm pointer to System timer module registers.
+ * \param comparator comparator selection comparator.
+ * \return None
+ */
+IFX_EXTERN void IfxStm_enableComparatorInterrupt(Ifx_STM *stm, IfxStm_Comparator comparator);
+
+/** \brief get the interrupt source pointer for the comparator.
+ * \param stm pointer to the STM registers
+ * \param comparator comparator selection comparator
+ * \return pointer to the interrupt source
+ */
+IFX_EXTERN volatile Ifx_SRC_SRCR *IfxStm_getSrcPointer(Ifx_STM *stm, IfxStm_Comparator comparator);
+
+/** \brief Initialise stm compare register.
+ * \param stm pointer to System timer module registers.
+ * \param config pointer to configuration structure.
+ * \return TRUE if Comparator successful otherwise FLASE.
+ */
+IFX_EXTERN boolean IfxStm_initCompare(Ifx_STM *stm, const IfxStm_CompareConfig *config);
+
+/** \brief Initialise compare configuration with default values.
+ * \param config pointer to configuration structure.
+ * \return None
+ */
+IFX_EXTERN void IfxStm_initCompareConfig(IfxStm_CompareConfig *config);
+
+/** \brief Indicates if the compare interrupt flag is set.
+ * \param stm pointer to System timer module registers.
+ * \param comparator comparator selection comparator.
+ * \return TRUE if the comparator flag is set
+ */
+IFX_EXTERN boolean IfxStm_isCompareFlagSet(Ifx_STM *stm, IfxStm_Comparator comparator);
+
+/** \brief Set the compare behavior
+ * \param stm pointer to System timer module registers
+ * \param comparator comparator selection comparator
+ * \param offset Comparator start bit position
+ * \param size Size of compare value to compare with timer
+ * \param interrupt Comparator Interrupt request source defined
+ * \return None
+ */
+IFX_EXTERN void IfxStm_setCompareControl(Ifx_STM *stm, IfxStm_Comparator comparator, IfxStm_ComparatorOffset offset, IfxStm_ComparatorSize size, IfxStm_ComparatorInterrupt interrupt);
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \param stm pointer STM registers
+ * \param mode mode selection (enable/ disable)
+ * \return None
+ */
+IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/**
+ * \param stm pointer to STM registers
+ * \return None
+ */
+IFX_EXTERN void IfxStm_resetModule(Ifx_STM *stm);
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE uint64 IfxStm_get(Ifx_STM *stm)
+{
+ uint64 result;
+
+ result = stm->TIM0.U;
+ result |= ((uint64)stm->CAP.U) << 32;
+
+ return result;
+}
+
+
+IFX_INLINE uint32 IfxStm_getCompare(Ifx_STM *stm, IfxStm_Comparator comparator)
+{
+ return stm->CMP[comparator].B.CMPVAL;
+}
+
+
+IFX_INLINE float32 IfxStm_getFrequency(Ifx_STM *stm)
+{
+ IFX_UNUSED_PARAMETER(stm);
+ float32 result;
+
+ result = IfxScuCcu_getStmFrequency();
+
+ return result;
+}
+
+
+IFX_INLINE uint32 IfxStm_getLower(Ifx_STM *stm)
+{
+ return stm->TIM0.U;
+}
+
+
+IFX_INLINE uint32 IfxStm_getOffset12Timer(Ifx_STM *stm)
+{
+ return stm->TIM3.U;
+}
+
+
+IFX_INLINE uint32 IfxStm_getOffset16Timer(Ifx_STM *stm)
+{
+ return stm->TIM4.U;
+}
+
+
+IFX_INLINE uint32 IfxStm_getOffset20Timer(Ifx_STM *stm)
+{
+ return stm->TIM5.U;
+}
+
+
+IFX_INLINE uint32 IfxStm_getOffset32Timer(Ifx_STM *stm)
+{
+ return stm->TIM6.U;
+}
+
+
+IFX_INLINE uint32 IfxStm_getOffset4Timer(Ifx_STM *stm)
+{
+ return stm->TIM1.U;
+}
+
+
+IFX_INLINE uint32 IfxStm_getOffset8Timer(Ifx_STM *stm)
+{
+ return stm->TIM2.U;
+}
+
+
+IFX_INLINE uint32 IfxStm_getOffsetTimer(Ifx_STM *stm, uint8 offset)
+{
+ uint64 now;
+
+ now = IfxStm_get(stm);
+
+ return (uint32)(now >> offset);
+}
+
+
+IFX_INLINE sint32 IfxStm_getTicksFromMicroseconds(Ifx_STM *stm, uint32 microSeconds)
+{
+ sint32 freq = (sint32)IfxStm_getFrequency(stm);
+ return (freq / (1000000)) * microSeconds;
+}
+
+
+IFX_INLINE sint32 IfxStm_getTicksFromMilliseconds(Ifx_STM *stm, uint32 milliSeconds)
+{
+ sint32 freq = (sint32)IfxStm_getFrequency(stm);
+ return (freq / (1000)) * milliSeconds;
+}
+
+
+IFX_INLINE void IfxStm_increaseCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
+{
+ stm->CMP[comparator].B.CMPVAL = stm->CMP[comparator].B.CMPVAL + ticks;
+}
+
+
+IFX_INLINE boolean IfxStm_isModuleSuspended(Ifx_STM *stm)
+{
+ Ifx_STM_OCS ocs;
+
+ // read the status
+ ocs.U = stm->OCS.U;
+
+ // return the status
+ return ocs.B.SUSSTA;
+}
+
+
+IFX_INLINE void IfxStm_setSleepMode(Ifx_STM *stm, IfxStm_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ stm->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxStm_setSuspendMode(Ifx_STM *stm, IfxStm_SuspendMode mode)
+{
+ Ifx_STM_OCS ocs;
+
+ // remove protection and configure the suspend mode.
+ ocs.B.SUS_P = 1;
+ ocs.B.SUS = mode;
+ stm->OCS.U = ocs.U;
+}
+
+
+IFX_INLINE void IfxStm_updateCompare(Ifx_STM *stm, IfxStm_Comparator comparator, uint32 ticks)
+{
+ stm->CMP[comparator].B.CMPVAL = ticks;
+}
+
+
+IFX_INLINE void IfxStm_waitTicks(Ifx_STM *stm, uint32 ticks)
+{
+ uint32 beginTime;
+
+ beginTime = IfxStm_getLower(stm);
+
+ /*below code will work because of unsigned 32 bit calculation even at timer wrapping condition
+ * As an example if beginTime = 0xFFFFFFFE and current time = 2 (after overflow), unsigned calculation
+ * 2 - 0xFFFFFFFE will be 4*/
+ while ((IfxStm_getLower(stm) - beginTime) < ticks)
+ {}
+}
+
+
+#endif /* IFXSTM_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Timer/IfxStm_Timer.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Timer/IfxStm_Timer.c
new file mode 100644
index 0000000..0420412
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Timer/IfxStm_Timer.c
@@ -0,0 +1,248 @@
+/**
+ * \file IfxStm_Timer.c
+ * \brief STM TIMER details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxStm_Timer.h"
+#include "_Utilities/Ifx_Assert.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver)
+{
+ boolean event;
+ event = IfxStm_isCompareFlagSet(driver->stm, driver->comparator);
+
+ if (event)
+ {
+ IfxStm_clearCompareFlag(driver->stm, driver->comparator);
+
+ if (!driver->base.singleShot)
+ {
+ driver->comparatorValue += driver->base.period;
+ IfxStm_updateCompare(driver->stm, driver->comparator, driver->comparatorValue);
+ }
+ else
+ {
+ IfxStm_disableComparatorInterrupt(driver->stm, driver->comparator);
+ }
+ }
+ else
+ {}
+
+ return event;
+}
+
+
+float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver)
+{
+ return 1.0 / IfxStdIf_Timer_tickToS(driver->base.clockFreq, driver->base.period);
+}
+
+
+float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver)
+{
+ return driver->base.clockFreq;
+}
+
+
+Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver)
+{
+ return driver->base.period;
+}
+
+
+float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver)
+{
+ return 1.0 / driver->base.clockFreq;
+}
+
+
+void IfxStm_Timer_run(IfxStm_Timer *driver)
+{
+ boolean interruptState;
+ uint64 timer;
+
+ interruptState = IfxCpu_disableInterrupts();
+ timer = IfxStm_get(driver->stm);
+ IfxCpu_restoreInterrupts(interruptState);
+
+ driver->comparatorValue = (Ifx_TimerValue)(timer >> driver->comparatorShift) + driver->base.period;
+
+ IfxStm_updateCompare(driver->stm, driver->comparator, driver->comparatorValue);
+ IfxStm_enableComparatorInterrupt(driver->stm, driver->comparator);
+}
+
+
+boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency)
+{
+ Ifx_TimerValue period = IfxStdIf_Timer_sToTick(driver->base.clockFreq, 1.0 / frequency);
+
+ return IfxStm_Timer_setPeriod(driver, period);
+}
+
+
+boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period)
+{
+ driver->base.period = period;
+
+ return TRUE;
+}
+
+
+void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled)
+{
+ driver->base.singleShot = enabled;
+}
+
+
+boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver)
+{
+ IfxStdIf_Timer_initStdIf(stdif, driver);
+ /* Set the API link */
+ stdif->getFrequency = (IfxStdIf_Timer_GetFrequency) & IfxStm_Timer_getFrequency;
+ stdif->getPeriod = (IfxStdIf_Timer_GetPeriod) & IfxStm_Timer_getPeriod;
+ stdif->getResolution = (IfxStdIf_Timer_GetResolution) & IfxStm_Timer_getResolution;
+ //stdif->getTrigger
+ stdif->setFrequency = (IfxStdIf_Timer_SetFrequency) & IfxStm_Timer_setFrequency;
+ stdif->updateInputFrequency = (IfxStdIf_Timer_UpdateInputFrequency) & IfxStm_Timer_updateInputFrequency;
+ //stdif->applyUpdate
+ //stdif->disableUpdate
+ stdif->getInputFrequency = (IfxStdIf_Timer_GetInputFrequency) & IfxStm_Timer_getInputFrequency;
+ stdif->run = (IfxStdIf_Timer_Run) & IfxStm_Timer_run;
+ stdif->setPeriod = (IfxStdIf_Timer_SetPeriod) & IfxStm_Timer_setPeriod;
+ stdif->setSingleMode = (IfxStdIf_Timer_SetSingleMode) & IfxStm_Timer_setSingleMode;
+ //stdif->setTrigger
+ stdif->stop = (IfxStdIf_Timer_Stop) & IfxStm_Timer_stop;
+ stdif->ackTimerIrq = (IfxStdIf_Timer_AckTimerIrq) & IfxStm_Timer_acknowledgeTimerIrq;
+ //stdif->ackTriggerIrq
+
+ return TRUE;
+}
+
+
+void IfxStm_Timer_stop(IfxStm_Timer *driver)
+{
+ IfxStm_disableComparatorInterrupt(driver->stm, driver->comparator);
+}
+
+
+void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver)
+{
+ float32 freqency;
+ freqency = IfxStm_getFrequency(driver->stm);
+ driver->base.clockFreq = freqency / (1 << driver->comparatorShift);
+}
+
+
+boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config)
+{
+ boolean result = TRUE;
+ IfxStm_Timer_Base *base = &driver->base;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.countDir == IfxStdIf_Timer_CountDir_up); /* only this mode is supported */
+
+ driver->stm = config->stm;
+ driver->comparator = config->comparator;
+
+ base->triggerEnabled = config->base.trigger.enabled;
+ base->singleShot = FALSE;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.trigger.enabled == FALSE); /* Trigger feature not supported */
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, config->base.startOffset == 0); /* Trigger feature not supported */
+
+ /* Initialize the timer part */
+ // STM timer is already running after reset (free running timer)
+
+ // Calculate shift
+ driver->comparatorShift = 32 - __clz((uint32)(config->base.minResolution * IfxStm_getFrequency(driver->stm)));
+
+ if (driver->comparatorShift > 0)
+ {
+ driver->comparatorShift--;
+ }
+
+ IfxStm_Timer_updateInputFrequency(driver);
+
+ if ((config->base.minResolution > 0) && ((1.0 / base->clockFreq) > config->base.minResolution))
+ {
+ result = FALSE;
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+ else
+ {}
+
+ IfxStm_Timer_setFrequency(driver, config->base.frequency);
+
+ IfxStm_setCompareControl(driver->stm, driver->comparator,
+ (IfxStm_ComparatorOffset)driver->comparatorShift,
+ IfxStm_ComparatorSize_32Bits,
+ driver->comparator == IfxStm_Comparator_0 ? IfxStm_ComparatorInterrupt_ir0 : IfxStm_ComparatorInterrupt_ir1);
+
+ /* Interrupt configuration */
+ if (config->base.isrPriority > 0)
+ {
+ /* clear the interrupt flag of the selected comparator */
+ IfxStm_clearCompareFlag(driver->stm, driver->comparator);
+
+ volatile Ifx_SRC_SRCR *src;
+ src = IfxStm_getSrcPointer(driver->stm, config->comparator);
+ IfxSrc_init(src, config->base.isrProvider, config->base.isrPriority);
+ IfxSrc_enable(src);
+ }
+
+ return result;
+}
+
+
+void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm)
+{
+ IfxStdIf_Timer_initConfig(&config->base);
+ config->stm = stm;
+ config->comparator = IfxStm_Comparator_0;
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Timer/IfxStm_Timer.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Timer/IfxStm_Timer.h
new file mode 100644
index 0000000..16e7774
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Timer/IfxStm_Timer.h
@@ -0,0 +1,274 @@
+/**
+ * \file IfxStm_Timer.h
+ * \brief STM TIMER details
+ * \ingroup IfxLld_Stm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * The timer driver enabled the generation of periodical interrupt based on the STM module.
+ *
+ * The driver is initialized with \ref IfxStm_Timer_init(). After initialization, the
+ * timer is started with \ref IfxStm_Timer_run() and stopped with \ref IfxStm_Timer_stop().
+ * Single shot can be set with \ref IfxStm_Timer_setSingleMode(), in case the timer is
+ * already running it will stop after the next event, else the timer event will occur only once.
+ *
+ * The timer interrupt must call the \ref IfxStm_Timer_acknowledgeTimerIrq() function which
+ * clears the interrupt flag and set the next compare value.
+ *
+ * Changing the period with \ref IfxStm_Timer_setPeriod() or \ref IfxStm_Timer_setFrequency() will
+ * take effect only after the next timer event.
+ *
+ *
+ * This driver implements a subset of the functionalities defined by \ref library_srvsw_stdif_timer.
+ * If does supports the timer with interrupt but not the trigger signal.
+ *
+ * The user is free to use either the driver specific APIs below or to used the \ref library_srvsw_stdif_timer "standard interface APIs".
+ *
+ * \section Specific Specific implementation
+ * For a detailed configuration of the microcontroller, see \ref IfxStm_Timer_init().
+ *
+ * \section Example Usage example
+ * Initialization and interrupt:
+ * \code
+ * #define ISR_PRIORITY_TIMER_1MS (2)
+ * #define ISR_PROVIDER_TIMER_1MS IfxSrc_Tos_cpu0
+ * #define INTERRUPT_TIMER_1MS ISR_ASSIGN(ISR_PRIORITY_TIMER_1MS, ISR_PROVIDER_TIMER_1MS)
+ *
+ * IfxStm_Timer myTimer;
+ *
+ * boolean AppInit_1ms(void)
+ * {
+ * boolean result = TRUE;
+ * IfxStm_Timer_Config timerConfig;
+ * IfxStm_Timer_initConfig(&timerConfig, &MODULE_STM0);
+ * timerConfig.base.frequency = 1000;
+ * timerConfig.base.isrPriority = ISR_PRIORITY(INTERRUPT_TIMER_1MS);
+ * timerConfig.base.isrProvider = ISR_PROVIDER(INTERRUPT_TIMER_1MS);
+ * timerConfig.base.minResolution = (1.0 / timerConfig.base.frequency) / 1000;
+ * timerConfig.comparator = IfxStm_Comparator_0;
+ * result = IfxStm_Timer_init(&myTimer, &timerConfig);
+ *
+ * return result;
+ * }
+ *
+ * IFX_INTERRUPT(ISR_TIMER_1ms, 0, ISR_PRIORITY_TIMER_1MS)
+ * {
+ * __enable();
+ * IfxStm_Timer_acknowledgeTimerIrq(&myTimer);
+ * }
+ * \endcode
+ *
+ * During run-time, the timer can be started / stopped as follow:
+ * \code
+ * IfxStm_Timer_run(&myTimer);
+ * IfxStm_Timer_stop(&myTimer);
+ * \endcode
+ *
+ * \defgroup IfxLld_Stm_Timer STM Timer Interface
+ * \ingroup IfxLld_Stm
+ * \defgroup IfxLld_Stm_Timer_STMTimerDataStructures STM Timer Data Structures
+ * \ingroup IfxLld_Stm_Timer
+ * \defgroup IfxLld_Stm_Timer_globalfunction global function
+ * \ingroup IfxLld_Stm_Timer
+ */
+
+#ifndef IFXSTM_TIMER_H
+#define IFXSTM_TIMER_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Stm/Std/IfxStm.h"
+#include "StdIf/IfxStdIf_Timer.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Stm_Timer_STMTimerDataStructures
+ * \{ */
+/** \brief Structure for the timer base
+ */
+typedef struct
+{
+ Ifx_TimerValue period; /**< \brief Timer period in ticks (cached value) */
+ boolean triggerEnabled; /**< \brief If TRUE, the trigger functionality is Initialized */
+ float32 clockFreq; /**< \brief Timer input clock frequency (cached value) */
+ IfxStdIf_Timer_CountDir countDir; /**< \brief Timer counting mode */
+ boolean singleShot; /**< \brief If TRUE, the timer will stop after 1st event */
+} IfxStm_Timer_Base;
+
+/** \} */
+
+/** \addtogroup IfxLld_Stm_Timer_STMTimerDataStructures
+ * \{ */
+/** \brief Timer interface
+ */
+typedef struct
+{
+ IfxStm_Timer_Base base; /**< \brief Timer interface */
+ Ifx_STM *stm; /**< \brief STM module used for the timer functionality */
+ IfxStm_Comparator comparator; /**< \brief Comparator used for the timer functionality */
+ uint32 comparatorValue; /**< \brief Value of the comparator for the next event */
+ uint8 comparatorShift; /**< \brief Comparator shift */
+} IfxStm_Timer;
+
+/** \brief configuration structure for Timer
+ */
+typedef struct
+{
+ IfxStdIf_Timer_Config base; /**< \brief Standard interface timer configuration */
+ Ifx_STM *stm; /**< \brief STM module used for the timer functionality */
+ IfxStm_Comparator comparator; /**< \brief Comparator used for the timer functionality */
+} IfxStm_Timer_Config;
+
+/** \} */
+
+/** \addtogroup IfxLld_Stm_Timer_globalfunction
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Returns the timer event
+ * see IfxStdIf_Timer_AckTimerIrq
+ * \param driver STM Timer interface Handle
+ * \return Timer interrupt event
+ */
+IFX_EXTERN boolean IfxStm_Timer_acknowledgeTimerIrq(IfxStm_Timer *driver);
+
+/** \brief Returns the frequency
+ * see IfxStdIf_Timer_GetFrequency
+ * \param driver STM Timer interface Handle
+ * \return Frequency
+ */
+IFX_EXTERN float32 IfxStm_Timer_getFrequency(IfxStm_Timer *driver);
+
+/** \brief Returns the input frequency
+ * see IfxStdIf_Timer_GetInputFrequency
+ * \param driver STM Timer interface Handle
+ * \return Frequency
+ */
+IFX_EXTERN float32 IfxStm_Timer_getInputFrequency(IfxStm_Timer *driver);
+
+/** \brief Returns the period of the timer
+ * see IfxStdIf_Timer_GetPeriod
+ * \param driver STM Timer interface Handle
+ * \return Period
+ */
+IFX_EXTERN Ifx_TimerValue IfxStm_Timer_getPeriod(IfxStm_Timer *driver);
+
+/** \brief Return the resolution of the Timer counters
+ * see IfxStdIf_Timer_GetResolution
+ * \param driver STM Timer interface handle
+ * \return Resolution
+ */
+IFX_EXTERN float32 IfxStm_Timer_getResolution(IfxStm_Timer *driver);
+
+/** \brief Runs the timer
+ * see IfxStdIf_Timer_Run
+ * \param driver STM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxStm_Timer_run(IfxStm_Timer *driver);
+
+/** \brief Sets the Frequency
+ * see IfxStdIf_Timer_SetFrequency
+ * \param driver STM Timer interface Handle
+ * \param frequency frequency
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxStm_Timer_setFrequency(IfxStm_Timer *driver, float32 frequency);
+
+/** \brief Sets the period for the timer
+ * see IfxStdIf_Timer_SetPeriod
+ * \param driver STM Timer interface handle
+ * \param period Period value
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxStm_Timer_setPeriod(IfxStm_Timer *driver, Ifx_TimerValue period);
+
+/** \brief Sets the single shot mode of the timer
+ * see IfxStdIf_Timer_SetSingleMode
+ * \param driver STM Timer interface Handle
+ * \param enabled If TRUE, sets the single shot mode
+ * \return None
+ */
+IFX_EXTERN void IfxStm_Timer_setSingleMode(IfxStm_Timer *driver, boolean enabled);
+
+/** \brief Initializes the standard interface timer
+ * \param stdif Standard interface object, will be initialized by the function
+ * \param driver driver Interface driver to be used by the standard interface. must be initialised separately
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxStm_Timer_stdIfTimerInit(IfxStdIf_Timer *stdif, IfxStm_Timer *driver);
+
+/** \brief Stops the timer
+ * see IfxStdIf_Timer_Stop
+ * \param driver STM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxStm_Timer_stop(IfxStm_Timer *driver);
+
+/** \brief Updates the input frequency
+ * see IfxStdIf_Timer_UpdateInputFrequency
+ * \param driver STM Timer interface Handle
+ * \return None
+ */
+IFX_EXTERN void IfxStm_Timer_updateInputFrequency(IfxStm_Timer *driver);
+
+/** \brief Initialises the timer object
+ * \param driver STM Timer interface Handle
+ * \param config Configuration structure for STM Timer
+ * \return TRUE on success else FALSE
+ */
+IFX_EXTERN boolean IfxStm_Timer_init(IfxStm_Timer *driver, const IfxStm_Timer_Config *config);
+
+/** \brief Initializes the configuration structure to default
+ * \param config Configuration structure for STM Timer
+ * \param stm Pointer to STM module
+ * \return None
+ */
+IFX_EXTERN void IfxStm_Timer_initConfig(IfxStm_Timer_Config *config, Ifx_STM *stm);
+
+/** \} */
+
+#endif /* IFXSTM_TIMER_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Adc/IfxVadc_Adc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Adc/IfxVadc_Adc.c
new file mode 100644
index 0000000..0bdfd95
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Adc/IfxVadc_Adc.c
@@ -0,0 +1,852 @@
+/**
+ * \file IfxVadc_Adc.c
+ * \brief VADC ADC details
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxVadc_Adc.h"
+
+/** \addtogroup IfxLld_Vadc_Adc_Group
+ * \{ */
+/******************************************************************************/
+/*------------------------Inline Function Prototypes--------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the master id
+ * \param slave Index of the group
+ * \param masterIndex master kernel index
+ * \return Master Group Id
+ */
+IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId(IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex);
+
+/** \brief Gets the current master kernel index.
+ * \param slave Index of the group
+ * \param master Index of the group
+ * \return current master kernel index
+ */
+IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex(IfxVadc_GroupId slave, IfxVadc_GroupId master);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_Variables
+ * \{ */
+
+/******************************************************************************/
+/*------------------------Private Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_STATIC IFX_CONST IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_masterIndex[IFXVADC_NUM_ADC_CAL_GROUPS][IFXVADC_NUM_ADC_CAL_GROUPS] = {
+ /* 0 1 2 3 */
+ {0, 1, 2, 3}, /* Grp 0 */
+ {1, 0, 2, 3}, /* Grp 1 */
+ {1, 2, 0, 3}, /* Grp 2 */
+ {1, 2, 3, 0} /* Grp 3 */
+};
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE IfxVadc_GroupId IfxVadc_Adc_getMasterId(IfxVadc_GroupId slave, IfxVadc_Adc_SYNCTR_STSEL masterIndex)
+{
+ uint8 i, idxOffset;
+ IfxVadc_GroupId masterId = slave;
+
+ if (masterIndex == 0)
+ {
+ masterId = slave;
+ }
+ else
+ {
+ idxOffset = (slave < 4) ? 0 : 4; /* 4 is the index in the above IfxVadc_Adc_masterIndex about which symmetry is observed */
+
+ for (i = 0; i < 4; i++)
+ {
+ if (IfxVadc_Adc_masterIndex[slave][i + idxOffset] == masterIndex)
+ {
+ return (IfxVadc_GroupId)(i + idxOffset);
+ }
+ }
+ }
+
+ return masterId;
+}
+
+
+IFX_INLINE IfxVadc_Adc_SYNCTR_STSEL IfxVadc_Adc_getMasterKernelIndex(IfxVadc_GroupId slave, IfxVadc_GroupId master)
+{
+ return IfxVadc_Adc_masterIndex[slave][master];
+}
+
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group)
+{
+ Ifx_VADC *vadc = IfxVadc_Adc_getVadcFromGroup(group);
+ Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(group);
+ /* Get group index */
+ IfxVadc_GroupId groupIndex = group->groupId;
+
+ /* Request Access to configuration registers */
+ IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
+ IfxVadc_resetGroup(vadcG);
+ IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
+}
+
+
+void IfxVadc_Adc_disableModule(Ifx_VADC *vadc)
+{
+ IfxVadc_disableModule(vadc);
+}
+
+
+void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config)
+{
+ Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(channel->group);
+ IfxVadc_ChannelId channelIndex = channel->channel;
+
+ config->channelId = channel->channel;
+ config->group = channel->group;
+
+ Ifx_VADC_CHCTR tempChctr;
+ tempChctr.U = 0;
+ tempChctr = IfxVadc_getChannelControlConfig(vadcG, channelIndex);
+
+ config->inputClass = (IfxVadc_InputClasses)tempChctr.B.ICLSEL;
+ config->reference = (IfxVadc_ChannelReference)tempChctr.B.REFSEL;
+ config->resultRegister = (IfxVadc_ChannelResult)tempChctr.B.RESREG;
+ config->globalResultUsage = tempChctr.B.RESTBS;
+ config->lowerBoundary = (IfxVadc_BoundarySelection)tempChctr.B.BNDSELL;
+ config->upperBoundary = (IfxVadc_BoundarySelection)tempChctr.B.BNDSELU;
+ config->boundaryMode = (IfxVadc_BoundaryExtension)tempChctr.B.BNDSELX;
+ config->limitCheck = (IfxVadc_LimitCheck)tempChctr.B.CHEVMODE;
+ config->synchonize = tempChctr.B.SYNC;
+ config->rightAlignedStorage = tempChctr.B.RESPOS;
+
+ config->backgroundChannel = ((IfxVadc_getAssignedChannels(vadcG)).U & (1 << channelIndex)) ? FALSE : TRUE;
+ uint32 channelServiceRequestNodePtr;
+ /* Get Channel index */
+ IfxVadc_GroupId groupIndex = channel->group->groupId;
+
+ if (config->channelId < IfxVadc_ChannelId_8)
+ {
+ channelServiceRequestNodePtr = ((IfxVadc_getChannelServiceRequestNodePointer0(vadcG)).U >> (channel->channel * 4)) & 0xF;
+ }
+ else
+ {
+ channelServiceRequestNodePtr = ((IfxVadc_getChannelServiceRequestNodePointer1(vadcG)).U >> ((channel->channel - IfxVadc_ChannelId_8) * 4)) & 0xF;
+ }
+
+ volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, (IfxVadc_SrcNr)channelServiceRequestNodePtr);
+
+ if (src->B.SRE == 1)
+ {
+ config->channelSrcNr = (IfxVadc_SrcNr)channelServiceRequestNodePtr;
+ config->channelPriority = (Ifx_Priority)src->B.SRPN;
+ config->channelServProvider = (IfxSrc_Tos)src->B.TOS;
+ }
+ else
+ {
+ config->channelSrcNr = (IfxVadc_SrcNr)0;
+ config->channelPriority = (Ifx_Priority)0;
+ config->channelServProvider = (IfxSrc_Tos)0;
+ }
+
+ uint32 resultServiceRequestNodePtr;
+
+ if (config->resultRegister < IfxVadc_ChannelResult_8)
+ {
+ resultServiceRequestNodePtr = ((IfxVadc_getChannelResultServiceRequestNodePointer0(vadcG)).U >> (channel->channel * 4)) & 0xF;
+ }
+ else
+ {
+ resultServiceRequestNodePtr = ((IfxVadc_getChannelResultServiceRequestNodePointer1(vadcG)).U >> ((channel->channel - IfxVadc_ChannelResult_8) * 4)) & 0xF;
+ }
+
+ src = IfxVadc_getSrcAddress(groupIndex, resultServiceRequestNodePtr);
+
+ if (src->B.SRE == 1)
+ {
+ config->resultSrcNr = (IfxVadc_SrcNr)resultServiceRequestNodePtr;
+ config->resultPriority = (Ifx_Priority)src->B.SRPN;
+ config->resultServProvider = (IfxSrc_Tos)src->B.TOS;
+ }
+ else
+ {
+ config->resultSrcNr = (IfxVadc_SrcNr)0;
+ config->resultPriority = (Ifx_Priority)0;
+ config->resultServProvider = (IfxSrc_Tos)0;
+ }
+}
+
+
+float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode)
+{
+ return IfxVadc_getChannelConversionTime(channel->group->module.vadc, channel->group->groupId, IfxVadc_getChannelInputClass(channel->group->group, channel->channel), IfxVadc_getAdcAnalogFrequency(channel->group->module.vadc), IfxVadc_getAdcModuleFrequency(), conversionMode);
+}
+
+
+void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config)
+{
+ uint8 inputClassNum;
+ Ifx_VADC_G *vadcG = group->group;
+ Ifx_VADC *vadc = group->module.vadc;
+ float32 analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc);
+
+ config->groupId = group->groupId;
+ config->module = &group->module;
+
+ config->arbiter.arbiterRoundLength = IfxVadc_getArbiterRoundLength(vadcG);
+
+ for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_INPUTCLASSES; inputClassNum++)
+ {
+ config->inputClass[inputClassNum].resolution = IfxVadc_getGroupResolution(vadcG, inputClassNum);
+ config->inputClass[inputClassNum].sampleTime = IfxVadc_getGroupSampleTime(vadcG, inputClassNum, analogFrequency);
+ }
+
+ if (IfxVadc_isRequestScanSlotEnabled(vadcG) == TRUE)
+ {
+ config->arbiter.requestSlotScanEnabled = TRUE;
+ config->scanRequest.requestSlotPrio = IfxVadc_getScanSlotPriority(vadcG);
+ config->scanRequest.requestSlotStartMode = IfxVadc_getScanSlotStartMode(vadcG);
+
+ config->scanRequest.triggerConfig.triggerSource = IfxVadc_getScanSlotTriggerInput(vadcG);
+ config->scanRequest.triggerConfig.triggerMode = IfxVadc_getScanSlotTriggerMode(vadcG);
+
+ if (config->scanRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
+ {
+ config->scanRequest.triggerConfig.gatingMode = IfxVadc_getScanSlotGatingMode(vadcG);
+ }
+ else if (config->scanRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
+ {
+ config->scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ }
+
+ config->scanRequest.triggerConfig.gatingSource = IfxVadc_getScanSlotGatingSource(vadcG);
+ config->scanRequest.autoscanEnabled = IfxVadc_isAutoScanEnabled(vadcG);
+ }
+ else
+ {
+ config->scanRequest.autoscanEnabled = FALSE;
+ config->scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
+ config->scanRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
+ config->scanRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
+ config->scanRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
+ }
+
+ if (IfxVadc_isRequestQueueSlotEnabled(vadcG) == TRUE)
+ {
+ config->arbiter.requestSlotQueueEnabled = TRUE;
+ config->queueRequest.requestSlotPrio = IfxVadc_getQueueSlotPriority(vadcG);
+ config->queueRequest.requestSlotStartMode = IfxVadc_getQueueSlotStartMode(vadcG);
+
+ config->queueRequest.triggerConfig.triggerSource = IfxVadc_getQueueSlotTriggerInput(vadcG);
+ config->queueRequest.triggerConfig.triggerMode = IfxVadc_getQueueSlotTriggerMode(vadcG);
+
+ if (config->queueRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
+ {
+ config->queueRequest.triggerConfig.gatingMode = IfxVadc_getQueueSlotGatingMode(vadcG);
+ }
+ else if (config->queueRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
+ {
+ config->queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ }
+
+ config->queueRequest.triggerConfig.gatingSource = IfxVadc_getQueueSlotGatingSource(vadcG);
+ config->queueRequest.flushQueueAfterInit = FALSE;
+ }
+ else
+ {
+ config->queueRequest.flushQueueAfterInit = FALSE;
+ config->queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
+ config->queueRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
+ config->queueRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
+ config->queueRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
+ }
+
+ if (IfxVadc_isRequestBackgroundScanSlotEnabled(vadcG) == TRUE)
+ {
+ config->arbiter.requestSlotBackgroundScanEnabled = TRUE;
+ config->backgroundScanRequest.requestSlotPrio = IfxVadc_getBackgroundScanSlotPriority(vadcG);
+ config->backgroundScanRequest.requestSlotStartMode = IfxVadc_getBackgroundScanSlotStartMode(vadcG);
+
+ config->backgroundScanRequest.triggerConfig.triggerSource = IfxVadc_getBackgroundScanTriggerInput(vadc);
+ config->backgroundScanRequest.triggerConfig.triggerMode = IfxVadc_getBackgroundScanTriggerMode(vadc);
+
+ if (config->backgroundScanRequest.triggerConfig.triggerSource != IfxVadc_TriggerSource_15)
+ {
+ config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_getBackgroundScanGatingMode(vadc);
+ }
+ else if (config->backgroundScanRequest.triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
+ {
+ config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ }
+
+ config->backgroundScanRequest.triggerConfig.gatingSource = IfxVadc_getBackgroundScanGatingSource(vadc);
+ config->backgroundScanRequest.autoBackgroundScanEnabled = IfxVadc_isAutoBackgroundScanEnabled(vadc);
+ }
+ else
+ {
+ config->backgroundScanRequest.autoBackgroundScanEnabled = FALSE;
+ config->backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_disabled;
+ config->backgroundScanRequest.triggerConfig.gatingSource = IfxVadc_GatingSource_0; /* Use CCU6061 TRIG0 */
+ config->backgroundScanRequest.triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger;
+ config->backgroundScanRequest.triggerConfig.triggerSource = IfxVadc_TriggerSource_0; /* Trigger source taken from Gating Input */
+ }
+
+ config->master = IfxVadc_Adc_getMasterId(group->groupId, IfxVadc_getMasterIndex(vadcG));
+
+ config->disablePostCalibration = ((IfxVadc_getGlobalConfigValue(vadc)).U >> (IFX_VADC_GLOBCFG_DPCAL0_OFF + group->groupId)) & 0x1;
+}
+
+
+IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config)
+{
+ IfxVadc_Status Status = IfxVadc_Status_noError;
+ Ifx_VADC *vadc = IfxVadc_Adc_getVadcFromGroup(config->group);
+ Ifx_VADC_G *vadcG = IfxVadc_Adc_getGroupRegsFromGroup(config->group);
+
+ channel->group = config->group;
+ IfxVadc_GroupId groupIndex = channel->group->groupId;
+ IfxVadc_ChannelId channelIndex = config->channelId;
+
+ /* Request Access to configuration registers */
+ IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_channelControl0 + groupIndex));
+
+ /* Configure Channel */
+ {
+ IfxVadc_setReferenceInput(vadcG, channelIndex, config->reference);
+ IfxVadc_storeGroupResult(vadcG, channelIndex, config->resultRegister);
+ IfxVadc_setLowerBoundary(vadcG, channelIndex, config->lowerBoundary);
+ IfxVadc_setUpperBoundary(vadcG, channelIndex, config->upperBoundary);
+ IfxVadc_setSyncRequest(vadcG, channelIndex, config->synchonize);
+ IfxVadc_setChannelInputClass(vadcG, channelIndex, config->inputClass);
+ IfxVadc_setChannelLimitCheckMode(vadcG, channelIndex, config->limitCheck);
+ IfxVadc_setResultPosition(vadcG, channelIndex, config->rightAlignedStorage);
+ IfxVadc_setBackgroundResultTarget(vadcG, channelIndex, config->globalResultUsage);
+ IfxVadc_setBoundaryMode(vadcG, channelIndex, config->boundaryMode);
+ }
+
+ IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
+
+ if (config->backgroundChannel == FALSE)
+ {
+ IfxVadc_setGroupPriorityChannel(vadcG, channelIndex);
+ }
+ else
+ {
+ IfxVadc_setBackgroundPriorityChannel(vadcG, channelIndex);
+ }
+
+ IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
+
+ if (config->channelId < IfxVadc_ChannelId_8)
+ {
+ IfxVadc_setChannelEventNodePointer0(vadcG, config->channelSrcNr, channel->channel);
+ }
+ else
+ {
+ IfxVadc_setChannelEventNodePointer1(vadcG, config->channelSrcNr, channel->channel);
+ }
+
+ if (config->channelPriority > 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, config->channelSrcNr);
+
+ IfxVadc_clearChannelRequest(vadcG, config->channelId);
+ IfxSrc_init(src, config->channelServProvider, config->channelPriority);
+ IfxSrc_enable(src);
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ if (config->resultRegister < IfxVadc_ChannelResult_8)
+ {
+ IfxVadc_setResultNodeEventPointer0(vadcG, config->resultSrcNr, config->resultRegister);
+ }
+ else
+ {
+ IfxVadc_setResultNodeEventPointer1(vadcG, config->resultSrcNr, config->resultRegister);
+ }
+
+ if (config->resultPriority > 0)
+ {
+ volatile Ifx_SRC_SRCR *src = IfxVadc_getSrcAddress(groupIndex, config->resultSrcNr);
+
+ IfxVadc_enableServiceRequest(vadcG, config->resultRegister);
+ IfxVadc_clearAllResultRequests(vadcG);
+ IfxSrc_init(src, config->resultServProvider, config->resultPriority);
+ IfxSrc_enable(src);
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_channelControl0 + groupIndex));
+ /* Software initialization */
+ channel->resultreg = config->resultRegister;
+ channel->channel = config->channelId;
+
+ return Status;
+}
+
+
+void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group)
+{
+ static const IfxVadc_Adc_ChannelConfig IfxVadc_Adc_defaultChannelConfig = {
+ .channelId = IfxVadc_ChannelId_0,
+ .group = NULL_PTR,
+ .inputClass = IfxVadc_InputClasses_group0,
+ .reference = IfxVadc_ChannelReference_standard,
+ .resultRegister = IfxVadc_ChannelResult_0,
+ .globalResultUsage = FALSE,
+ .lowerBoundary = IfxVadc_BoundarySelection_group0,
+ .upperBoundary = IfxVadc_BoundarySelection_group0,
+ .boundaryMode = IfxVadc_BoundaryExtension_standard,
+ .limitCheck = IfxVadc_LimitCheck_noCheck,
+ .synchonize = FALSE,
+ .backgroundChannel = FALSE,
+ .rightAlignedStorage = FALSE,
+ .resultPriority = 0,
+ .resultSrcNr = IfxVadc_SrcNr_group0,
+ .resultServProvider = IfxSrc_Tos_cpu0,
+ .channelPriority = 0,
+ .channelSrcNr = IfxVadc_SrcNr_group0,
+ .channelServProvider = IfxSrc_Tos_cpu0
+ };
+ *config = IfxVadc_Adc_defaultChannelConfig;
+ config->group = group;
+}
+
+
+IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config)
+{
+ IfxVadc_Status status = IfxVadc_Status_noError;
+ Ifx_VADC *vadc = config->module->vadc;
+ Ifx_VADC_G *vadcG = &vadc->G[config->groupId];
+
+ /* check for write access */
+ group->group = vadcG;
+ group->module = *config->module;
+ IfxVadc_GroupId groupIndex = config->groupId;
+ group->groupId = groupIndex;
+ float32 analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc);
+
+ uint8 inputClassNum;
+
+ /* Request Access to configuration registers */
+ IfxVadc_enableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
+
+ if (config->arbiter.requestSlotQueueEnabled == TRUE)
+ {
+ /* Enable Arbiter slot, set Priority and start mode */
+ IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotQueueEnabled, config->queueRequest.requestSlotPrio, config->queueRequest.requestSlotStartMode, IfxVadc_RequestSource_queue);
+ }
+ else
+ {
+ /* Disable the slot */
+ IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_queue);
+ }
+
+ if (config->arbiter.requestSlotScanEnabled == TRUE)
+ {
+ /* Setup Arbitration priority and turn on enabled slot */
+ /* Enable Arbiter slot, set Priority and start mode */
+ IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotScanEnabled, config->scanRequest.requestSlotPrio, config->scanRequest.requestSlotStartMode, IfxVadc_RequestSource_scan);
+ }
+ else
+ {
+ /* Disable the slot */
+ IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_scan);
+ }
+
+ if (config->arbiter.requestSlotBackgroundScanEnabled == TRUE)
+ {
+ /* Setup Arbitration priority and turn on enabled slot */
+ /* Enable Arbiter slot, set Priority and start mode */
+ IfxVadc_setArbiterPriority(vadcG, config->arbiter.requestSlotBackgroundScanEnabled, config->backgroundScanRequest.requestSlotPrio, config->backgroundScanRequest.requestSlotStartMode, IfxVadc_RequestSource_background);
+ }
+ else
+ {
+ /* Disable the slot */
+ IfxVadc_setArbiterPriority(vadcG, FALSE, IfxVadc_RequestSlotPriority_lowest, IfxVadc_RequestSlotStartMode_waitForStart, IfxVadc_RequestSource_background);
+ }
+
+ /* master slave configuration */
+ if (config->master != groupIndex)
+ {
+ uint8 masterIndex = IfxVadc_Adc_getMasterKernelIndex(groupIndex, config->master);
+ IfxVadc_setMasterIndex(vadcG, masterIndex);
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ /* Setup arbiter */
+ /* turn off the group during initialization, see UM for sync mode */
+ IfxVadc_setAnalogConvertControl(vadcG, IfxVadc_AnalogConverterMode_off);
+
+ IfxVadc_setArbitrationRoundLength(vadcG, config->arbiter.arbiterRoundLength);
+
+ /* Setup queue request if enabled */
+ if (config->arbiter.requestSlotQueueEnabled == TRUE)
+ {
+ const IfxVadc_Adc_QueueConfig *queueSlot = &config->queueRequest;
+
+ /* configure external Trigger if enabled */
+ if (queueSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
+ {
+ /* enable external trigger */
+ IfxVadc_enableQueueSlotExternalTrigger(vadcG);
+ IfxVadc_setQueueSlotTriggerOperatingConfig(vadcG, queueSlot->triggerConfig.triggerMode, queueSlot->triggerConfig.triggerSource);
+
+ /* if last input is used the trigger input selection is extend by Gating inputs */
+ if (queueSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15)
+ {
+ IfxVadc_setQueueSlotGatingConfig(vadcG, queueSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
+ }
+ else
+ {
+ /* do nothing, gating is configured later */
+ }
+ }
+ else
+ {
+ /* disable external trigger */
+ IfxVadc_disableQueueSlotExternalTrigger(vadcG);
+ }
+
+ /* configure Gating if enabled */
+ if ((queueSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
+ {
+ IfxVadc_setQueueSlotGatingConfig(vadcG, queueSlot->triggerConfig.gatingSource, queueSlot->triggerConfig.gatingMode);
+ }
+ else
+ {
+ /* do nothing, handled by trigger settings */
+ }
+
+ IfxVadc_clearQueue(vadcG, (queueSlot->flushQueueAfterInit) ? 1 : 0);
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ /* Setup scan request if enabled */
+ if (config->arbiter.requestSlotScanEnabled == TRUE)
+ {
+ const IfxVadc_Adc_ScanConfig *scanSlot = &config->scanRequest;
+
+ /* configure external Trigger if enabled */
+ if (scanSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
+ {
+ /* enable external trigger */
+ IfxVadc_enableScanSlotExternalTrigger(vadcG);
+
+ IfxVadc_setScanSlotTriggerConfig(vadcG, scanSlot->triggerConfig.triggerMode, scanSlot->triggerConfig.triggerSource);
+
+ if (scanSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15) /* if last input is used the trigger input selection is extend by Gating inputs */
+ {
+ IfxVadc_setScanSlotGatingConfig(vadcG, scanSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
+ }
+ else
+ {
+ /* do nothing, gating is configured later */
+ }
+ }
+ else
+ {
+ IfxVadc_disableScanSlotExternalTrigger(vadcG);
+ }
+
+ /* configure Gating if enabled */
+ if ((scanSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
+ {
+ IfxVadc_setScanSlotGatingConfig(vadcG, scanSlot->triggerConfig.gatingSource, scanSlot->triggerConfig.gatingMode);
+ }
+ else
+ {
+ /* do nothing, handled by trigger settings */
+ }
+
+ IfxVadc_setAutoScan(vadcG, scanSlot->autoscanEnabled ? 1 : 0);
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ if (config->arbiter.requestSlotBackgroundScanEnabled == TRUE)
+ {
+ const IfxVadc_Adc_BackgroundScanConfig *backgroundScanSlot = &config->backgroundScanRequest;
+
+ /* configure external Trigger if enabled */
+ if (backgroundScanSlot->triggerConfig.triggerMode != IfxVadc_TriggerMode_noExternalTrigger)
+ {
+ IfxVadc_enableBackgroundScanSlotExternalTrigger(vadc);
+
+ IfxVadc_setBackgroundScanSlotTriggerConfig(vadc, backgroundScanSlot->triggerConfig.triggerMode, backgroundScanSlot->triggerConfig.triggerSource);
+
+ if (backgroundScanSlot->triggerConfig.triggerSource == IfxVadc_TriggerSource_15) /* if last input is used the trigger input selection is extend by Gating inputs */
+ {
+ IfxVadc_setBackgroundScanSlotGatingConfig(vadc, backgroundScanSlot->triggerConfig.gatingSource, IfxVadc_GatingMode_always);
+ }
+ else
+ {
+ /* do nothing, gating is configured later */
+ }
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ /* configure Gating if enabled */
+ if ((backgroundScanSlot->triggerConfig.triggerSource != IfxVadc_TriggerSource_15))
+ {
+ IfxVadc_setBackgroundScanSlotGatingConfig(vadc, backgroundScanSlot->triggerConfig.gatingSource, backgroundScanSlot->triggerConfig.gatingMode);
+ }
+ else
+ {
+ /* do nothing, handled by trigger settings */
+ }
+
+ IfxVadc_setAutoBackgroundScan(vadc, backgroundScanSlot->autoBackgroundScanEnabled ? 1 : 0);
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ /* turn on group after initialisation, only in master mode */
+ IfxVadc_AnalogConverterMode convertMode = (config->master == groupIndex) ? IfxVadc_AnalogConverterMode_normalOperation : IfxVadc_AnalogConverterMode_off;
+ IfxVadc_setAnalogConvertControl(vadcG, convertMode);
+
+ /* Post Calibration */
+ IfxVadc_disablePostCalibration(vadc, groupIndex, config->disablePostCalibration);
+
+ for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_INPUTCLASSES; inputClassNum++)
+ {
+ /* configure Group input class registers */
+ IfxVadc_setGroupResolution(vadcG, inputClassNum, config->inputClass[inputClassNum].resolution);
+ /* Calculate Sample time ticks */
+ IfxVadc_setGroupSampleTime(vadcG, inputClassNum, analogFrequency, config->inputClass[inputClassNum].sampleTime);
+ }
+
+ IfxVadc_disableAccess(vadc, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupIndex));
+
+ return status;
+}
+
+
+void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc)
+{
+ static const IfxVadc_Adc_GroupConfig IfxVadc_Adc_defaultGroupConfig = {
+ .arbiter = {
+ .arbiterRoundLength = IfxVadc_ArbitrationRounds_4_slots,
+ .requestSlotQueueEnabled = FALSE,
+ .requestSlotScanEnabled = FALSE,
+ .requestSlotBackgroundScanEnabled = FALSE,
+ },
+ .backgroundScanRequest = {
+ .autoBackgroundScanEnabled = FALSE,
+ .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
+ .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
+ .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
+ .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
+ .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
+ .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
+ },
+ .scanRequest = {
+ .autoscanEnabled = FALSE,
+ .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
+ .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
+ .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
+ .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
+ .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
+ .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
+ },
+ .queueRequest = {
+ .flushQueueAfterInit = TRUE,
+ .triggerConfig.gatingMode = IfxVadc_GatingMode_disabled,
+ .triggerConfig.gatingSource = IfxVadc_GatingSource_0,
+ .triggerConfig.triggerMode = IfxVadc_TriggerMode_noExternalTrigger,
+ .triggerConfig.triggerSource = IfxVadc_TriggerSource_0,
+ .requestSlotPrio = IfxVadc_RequestSlotPriority_low,
+ .requestSlotStartMode = IfxVadc_RequestSlotStartMode_waitForStart,
+ },
+
+ .inputClass[0].resolution = IfxVadc_ChannelResolution_12bit,
+ .inputClass[0].sampleTime = 1.0e-6, /* Set sample time to 1us */
+ .inputClass[1].resolution = IfxVadc_ChannelResolution_12bit,
+ .inputClass[1].sampleTime = 1.0e-6, /* Set sample time to 1us */
+ };
+
+ *config = IfxVadc_Adc_defaultGroupConfig;
+ config->groupId = IfxVadc_GroupId_0;
+ config->module = vadc;
+ config->master = config->groupId;
+ config->disablePostCalibration = FALSE;
+}
+
+
+IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config)
+{
+ IfxVadc_Status status = IfxVadc_Status_noError;
+ Ifx_VADC *vadcSFR = config->vadc;
+ vadc->vadc = vadcSFR;
+ float32 analogFrequency;
+ uint8 inputClassNum, groupNum;
+
+ /* Enable VADC kernel clock */
+ IfxVadc_enableModule(vadcSFR);
+ IfxVadc_selectPowerSupplyVoltage(vadcSFR, config->supplyVoltage);
+
+ /* Set Analog Frequency */
+ if (IfxVadc_initializeFAdcI(vadcSFR, config->analogFrequency) == 0)
+ {
+ return IfxVadc_Status_notInitialised;
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ /* Set digital Frequency */
+ IfxVadc_initializeFAdcD(vadcSFR, config->digitalFrequency);
+
+ analogFrequency = IfxVadc_getAdcAnalogFrequency(vadcSFR);
+
+ /* configure Global input class registers */
+ for (inputClassNum = 0; inputClassNum < IFXVADC_NUM_GLOBAL_INPUTCLASSES; inputClassNum++)
+ {
+ /* configure ADC channel resolution ( conversion mode ) */
+ IfxVadc_setGlobalResolution(vadcSFR, inputClassNum, config->globalInputClass[inputClassNum].resolution);
+ /* configure Sample time ticks */
+ IfxVadc_setGlobalSampleTime(vadcSFR, inputClassNum, analogFrequency, config->globalInputClass[inputClassNum].sampleTime);
+ }
+
+ /* Start up calibration is requested */
+ if (config->startupCalibration == TRUE)
+ {
+ /* Ensure that all groups are enabled */
+ for (groupNum = 0; groupNum < IFXVADC_NUM_ADC_GROUPS; groupNum++)
+ {
+ IfxVadc_enableAccess(vadcSFR, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupNum));
+ IfxVadc_setAnalogConvertControl(&vadcSFR->G[groupNum], IfxVadc_AnalogConverterMode_normalOperation);
+ IfxVadc_disableAccess(vadcSFR, (IfxVadc_Protection)(IfxVadc_Protection_initGroup0 + groupNum));
+ }
+
+ // execute calibration
+ IfxVadc_startupCalibration(vadcSFR);
+ }
+
+ return status;
+}
+
+
+void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc)
+{
+ config->vadc = vadc;
+ config->analogFrequency = IFXVADC_DEFAULT_ANALOG_FREQ;
+
+ config->digitalFrequency = IfxVadc_getAdcDigitalFrequency(vadc);
+ config->moduleFrequency = IfxScuCcu_getSpbFrequency();
+ config->globalInputClass[0].resolution = IfxVadc_ChannelResolution_12bit;
+ config->globalInputClass[0].sampleTime = 1.0e-6;
+ config->globalInputClass[1].resolution = IfxVadc_ChannelResolution_12bit;
+ config->globalInputClass[1].sampleTime = 1.0e-6;
+ config->startupCalibration = FALSE;
+ config->supplyVoltage = IfxVadc_LowSupplyVoltageSelect_5V;
+}
+
+
+void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc)
+{
+ emuxConfig->vadc = vadc;
+ emuxConfig->channels = 0;
+ emuxConfig->groupId = IfxVadc_GroupId_0;
+ emuxConfig->emuxInterface = IfxVadc_EmuxInterface_0;
+ emuxConfig->startChannel = IfxVadc_EmuxSelectValue_0;
+ emuxConfig->code = IfxVadc_EmuxCodingScheme_binary;
+ emuxConfig->sampleTimeControl = IfxVadc_EmuxSampleTimeControl_settingChanges;
+ emuxConfig->mode = IfxVadc_ExternalMultiplexerMode_softwareControl;
+ emuxConfig->channelSelectionStyle = IfxVadc_ChannelSelectionStyle_channelNumber;
+ IfxVadc_Adc_EmuxPinConfig defaultConfig = {
+ .pins = {NULL_PTR},
+ .outputMode = IfxPort_OutputMode_pushPull,
+ .padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1,
+ };
+
+ emuxConfig->emuxOutPinConfig = defaultConfig;
+}
+
+
+void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl)
+{
+ uint8 count = 0;
+ Ifx_VADC_G *vadcG = &vadc->G[emuxControl->groupId];
+ IfxVadc_setEmuxInterfaceForGroup(vadc, emuxControl->emuxInterface, emuxControl->groupId);
+
+ for (count = 0; count < 3; count++)
+ {
+ if (emuxControl->emuxOutPinConfig.pins[count] != NULL_PTR)
+ {
+ IfxVadc_initEmuxPin(emuxControl->emuxOutPinConfig.pins[count], emuxControl->emuxOutPinConfig.outputMode, emuxControl->emuxOutPinConfig.padDriver);
+ }
+ }
+
+ IfxVadc_configExternalMultiplexerMode(vadc, vadcG, emuxControl->mode, emuxControl->channels, emuxControl->startChannel, emuxControl->code, emuxControl->sampleTimeControl, emuxControl->channelSelectionStyle);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Adc/IfxVadc_Adc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Adc/IfxVadc_Adc.h
new file mode 100644
index 0000000..b94c3b6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Adc/IfxVadc_Adc.h
@@ -0,0 +1,1313 @@
+/**
+ * \file IfxVadc_Adc.h
+ * \brief VADC ADC details
+ * \ingroup IfxLld_Vadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Vadc_Adc_Usage How to use the VADC ADC Interface driver?
+ * \ingroup IfxLld_Vadc
+ *
+ * VADC comprises of independent analog channels with Analog/Digital converters to convert analog input to discrete digital output.
+ *
+ * In the following sections it will be described, how to integrate the driver into the application framework.
+ *
+ * \section IfxLld_Vadc_Adc_Preparation Preparation
+ * \subsection IfxLld_Vadc_Adc_Include Include Files
+ *
+ * Include following header file into your C code:
+ * \code
+ *
+ * #include
+ *
+ * \endcode
+ *
+ * \subsection IfxLld_Vadc_Adc_Variables Variables
+ * \code
+ *
+ * // VADC handle
+ * IfxVadc_Adc vadc;
+ * IfxVadc_Adc_Group adcGroup;
+ * \endcode
+ *
+ * \subsection IfxLld_Vadc_Adc_ModuleInitialisation Module Initialisation
+ * The module initialisation can be done in the same function:
+ * \code
+ * // create configuration
+ * IfxVadc_Adc_Config adcConfig;
+ * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
+ *
+ * // initialize module
+ * // IfxVadc_Adc vadc; // declared globally
+ * IfxVadc_Adc_initModule(&vadc, &adcConfig);
+ * \endcode
+ *
+ *
+ * \subsection IfxLld_Vadc_Adc_GroupInitialisation Group Initialisation
+ * The group initialisation can be done in the same function:
+ * \code
+ * // create group config
+ * IfxVadc_Adc_GroupConfig adcGroupConfig;
+ * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
+ *
+ * // change group (default is GroupId_0, change to GroupId_3)
+ * adcGroupConfig.groupId = IfxVadc_GroupId_3;
+ *
+ * // IMPORTANT: usually we use the same group as master!
+ * adcGroupConfig.master = adcGroupConfig.groupId;
+ *
+ * // enable all arbiter request sources
+ * adcGroupConfig.arbiter.requestSlotQueueEnabled = TRUE; // enable Queue mode
+ * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE; // enable Scan mode
+ * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE; // enable Background scan
+ *
+ * // enable all gates in "always" mode (no edge detection)
+ * adcGroupConfig.queueRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ *
+ * // enable auto scan
+ * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
+ * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
+ *
+ * // initialize the group
+ * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
+ * \endcode
+ *
+ * \subsection IfxLld_Vadc_Adc_QueuedTransfers Queued Transfers
+ * Now, VADC is initialised. Here,Three channels are used for queued transfers
+ * \code
+ * // IMPORTANT: for deterministic results we have to disable the queue gate
+ * // while filling the queue, otherwise results could be output in the wrong order
+ * IfxVadc_GatingMode savedGate = IfxVadc_getQueueSlotGatingMode(adcGroup.group);
+ * IfxVadc_GatingSource gatingSource=IfxVadc_getQueueSlotGatingSource(adcGroup.group);
+ *
+ * IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, IfxVadc_GatingMode_disabled );
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig[3];
+ * IfxVadc_Adc_Channel adcChannel[3];
+ *
+ * for(int chnIx=0; chnIx<3; ++chnIx) {
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
+ *
+ * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
+ * adcChannelConfig[chnIx].resultRegister = IfxVadc_ChannelResult_1; // use result register #1 for all channels
+ *
+ * // initialize the channel
+ * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
+ *
+ * // Add channel to queue with refill enabled
+ * IfxVadc_Adc_addToQueue(&adcChannel[chnIx], IFXVADC_QUEUE_REFILL);
+ *
+ * // restore previous gate config
+ *
+ * IfxVadc_setQueueSlotGatingConfig(adcGroup.group, gatingSource, savedGate );
+ *
+ * // start the Queue
+ * IfxVadc_Adc_startQueue(&adcGroup); // just for the case that somebody copy&pastes the code - the queue has already been started in previous test
+ *
+ * // get 10 results for all 3 channels and store in temporary buffer
+ * // (the usage of a buffer is required, since the print statements used by the checks take more time than the conversions)
+ * Ifx_VADC_RES resultTrace[3*10];
+ * for(int i=0; i<3*10; ++i)
+ * {
+ * unsigned chnIx = i % 3;
+ *
+ * // wait for valid result
+ * Ifx_VADC_RES conversionResult;
+ * do {
+ * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
+ * } while( !conversionResult.B.VF );
+ *
+ * // store result
+ * resultTrace[i] = conversionResult;
+ * }
+ *
+ * // stop the queue
+ * IfxVadc_Adc_clearQueue(&adcGroup);
+ *
+ * // check results in buffer
+ * // ...
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Vadc_Adc_AutoScan Auto Scan
+ * Autoscan of 5 channels
+ * \code
+ * // create group config
+ * IfxVadc_Adc_GroupConfig adcGroupConfig;
+ * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
+ *
+ * // change group (default is GroupId_0, change to GroupId_3)
+ * adcGroupConfig.groupId = IfxVadc_GroupId_3;
+ *
+ * // IMPORTANT: usually we use the same group as master!
+ * adcGroupConfig.master = adcGroupConfig.groupId;
+ *
+ * // enable gate in "always" mode (no edge detection)
+ * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ *
+ * // enable auto scan
+ * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
+ * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
+ *
+ * // initialize the group
+ * //IfxVadc_Adc_Group adcGroup; // no need to create a new one
+ * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
+ *
+ * {
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig[5];
+ * IfxVadc_Adc_Channel adcChannel[5];
+ *
+ * for(int chnIx=0; chnIx<5; ++chnIx) {
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
+ *
+ * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx);
+ * adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(chnIx); // use dedicated result register
+ *
+ * // initialize the channel
+ * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
+ *
+ * // add to scan
+ * unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
+ * unsigned mask = channels;
+ * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
+ * }
+ *
+ * // start scan
+ * IfxVadc_Adc_startScan(&adcGroup);
+ *
+ * // check results
+ * for(int chnIx=0; chnIx<5; ++chnIx) {
+ * unsigned group = adcChannel[chnIx].group->groupId;
+ * unsigned channel = adcChannel[chnIx].channel;
+ *
+ * // wait for valid result
+ * Ifx_VADC_RES conversionResult;
+ * do {
+ * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
+ * } while( !conversionResult.B.VF );
+ *
+ *
+ * }
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Vadc_Adc_BackGroundScan Background Scan
+ * Background Scan of 2 channels
+ *
+ * \code
+ * // create group config
+ * IfxVadc_Adc_GroupConfig adcGroupConfig;
+ * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
+ *
+ * // change group (default is GroupId_0, change to GroupId_3)
+ * adcGroupConfig.groupId = IfxVadc_GroupId_3;
+ *
+ * // IMPORTANT: usually we use the same group as master!
+ * adcGroupConfig.master = adcGroupConfig.groupId;
+ *
+ * // enable background scan
+ * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
+ * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
+ *
+ * // enable gate in "always" mode (no edge detection)
+ * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ *
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig[2];
+ * IfxVadc_Adc_Channel adcChannel[2];
+ *
+ * for(int chnIx=0; chnIx<2; ++chnIx)
+ * {
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig[chnIx], &adcGroup);
+ *
+ * adcChannelConfig[chnIx].channelId = (IfxVadc_ChannelId)(chnIx + 5);
+ * adcChannelConfig[chnIx].resultRegister = (IfxVadc_ChannelResult)(5 + chnIx); // use register #5 and 6 for results
+ * adcChannelConfig[chnIx].backgroundChannel = TRUE;
+ *
+ * // initialize the channel
+ * IfxVadc_Adc_initChannel(&adcChannel[chnIx], &adcChannelConfig[chnIx]);
+ *
+ * // add to background scan
+ * unsigned channels = (1 << adcChannelConfig[chnIx].channelId);
+ * unsigned mask = channels;
+ * IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroup, channels, mask);
+ * }
+ *
+ * // start autoscan
+ * IfxVadc_Adc_startBackgroundScan(&vadc);
+ *
+ * // check results
+ * for(int chnIx=0; chnIx<2; ++chnIx)
+ * {
+ * unsigned group = adcChannel[chnIx].group->groupId;
+ * unsigned channel = adcChannel[chnIx].channel;
+ *
+ * // wait for valid result
+ * Ifx_VADC_RES conversionResult;
+ * do
+ * {
+ * conversionResult = IfxVadc_Adc_getResult(&adcChannel[chnIx]);
+ * } while( !conversionResult.B.VF );
+ *
+ * // check with expected value
+ * // ...
+ * }
+ * \endcode
+ *
+ * \subsection IfxLld_Vadc_Adc_EmuxConfiguration External Multiplexer Configuration
+ * External Configuration of 3 channels at channel 3
+ *
+ * \code
+ *
+ * IfxVadc_Adc_EmuxControl emuxConfig;
+ *
+ * IfxVadc_Adc_initExternalMultiplexerModeConfig(&emuxConfig,vadc);
+ *
+ * emuxConfig.groupId = IfxVadc_GroupId_1;
+ * emuxConfig.channels = (uint8)IfxVadc_ChannelId_3;
+ * emuxConfig.startChannel = IfxVadc_EmuxSelectValue_2; // it will take 0 to 2 external channel
+ *
+ * emuxConfig.sampleTimeControl = IfxVadc_EmuxSampleTimeControl_always;
+ * emuxConfig.mode = IfxVadc_ExternalMultiplexerMode_steady;
+ *
+ * IfxVadc_Adc_EmuxPinConfig pinsConfig ={
+ * .pins={ &IfxVadc_EMUX00_P02_6_OUT,
+ * &IfxVadc_EMUX01_P02_7_OUT,
+ * &IfxVadc_EMUX02_P02_8_OUT},
+ *
+ *
+ * .outputMode = IfxPort_OutputMode_pushPull,
+ * .padDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1
+ * };
+ * emuxConfig.emuxOutPinConfig = pinsConfig;
+ *
+ * IfxVadc_Adc_initExternalMultiplexerMode(vadc, &emuxConfig);
+ *
+ * IfxVadc_setEmuxGroupResolution(&vadc->G[emuxConfig.groupId], 0, IfxVadc_ChannelResolution_12bit);
+ * IfxVadc_setEmuxGroupSampletime(&vadc->G[emuxConfig.groupId], 0, 50000, 1.0e-6);
+ *
+ * \endcode
+ *
+ * \defgroup IfxLld_Vadc_Adc Interface Driver
+ * \ingroup IfxLld_Vadc
+ * \defgroup IfxLld_Vadc_Adc_DataStructures Data Structures
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Module Module Functions
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Group Group Functions
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Channel Channel Functions
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Background_Autoscan Background Autoscan Functions
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_ChannelScan Channel Scan Functions
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Queue Queue Functions
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Clock Clock Functions
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Interrupt Interrupt Functions
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Variables Variables
+ * \ingroup IfxLld_Vadc_Adc
+ * \defgroup IfxLld_Vadc_Adc_Emux Emux Functions
+ * \ingroup IfxLld_Vadc_Adc
+ */
+
+#ifndef IFXVADC_ADC_H
+#define IFXVADC_ADC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Vadc/Std/IfxVadc.h"
+#include "_Utilities/Ifx_Assert.h"
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+typedef uint8 IfxVadc_Adc_SYNCTR_STSEL;
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Vadc_Adc_DataStructures
+ * \{ */
+/** \brief VADC handle data structure
+ */
+typedef struct
+{
+ Ifx_VADC *vadc; /**< \brief Specifies the pointer to the VADC module registers */
+} IfxVadc_Adc;
+
+/** \brief Gating/Trigger configuration structure
+ */
+typedef struct
+{
+ IfxVadc_GatingSource gatingSource; /**< \brief Specifies used gate input for group */
+ IfxVadc_TriggerSource triggerSource; /**< \brief Specifies used Trigger input for group */
+ IfxVadc_GatingMode gatingMode; /**< \brief Specifies gating mode. High level, Low Level or Gating disabled */
+ IfxVadc_TriggerMode triggerMode; /**< \brief Specifies trigger mode. Rising, falling any edge leads to an trigger event */
+} IfxVadc_Adc_GatingTriggerConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_DataStructures
+ * \{ */
+/** \brief Arbiter configuration structure.
+ */
+typedef struct
+{
+ IfxVadc_ArbitrationRounds arbiterRoundLength; /**< \brief Specifies arbiter round length. */
+ boolean requestSlotQueueEnabled; /**< \brief request queue if enabled. */
+ boolean requestSlotScanEnabled; /**< \brief request scan if enabled. */
+ boolean requestSlotBackgroundScanEnabled; /**< \brief request background scan if enabled. */
+} IfxVadc_Adc_ArbiterConfig;
+
+/** \brief Background scan mode configuration structure.
+ */
+typedef struct
+{
+ boolean autoBackgroundScanEnabled; /**< \brief background autoscan functionality enable or disable. */
+ IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief trigger and gating configuration. */
+ IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used background scan request slot. */
+ IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request background scan source. */
+} IfxVadc_Adc_BackgroundScanConfig;
+
+/** \brief Input class configuration structure
+ */
+typedef struct
+{
+ float32 sampleTime; /**< \brief Specifies the requested sample time for input class */
+ IfxVadc_ChannelResolution resolution; /**< \brief Specifies the conversion Mode 8,10,12Bit or 10bit fast compare */
+} IfxVadc_Adc_ClassConfig;
+
+/** \brief Group handle data structure
+ */
+typedef struct
+{
+ IfxVadc_Adc module; /**< \brief The VADC handle structure */
+ Ifx_VADC_G *group; /**< \brief Pointer to the group registers */
+ IfxVadc_GroupId groupId; /**< \brief Specifies the group index */
+} IfxVadc_Adc_Group;
+
+/** \brief Queue configuration structure
+ */
+typedef struct
+{
+ boolean flushQueueAfterInit; /**< \brief Specifies if the queue is flushed after configuration */
+ IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief trigger and gating configuration. */
+ IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used queue request slot. */
+ IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request queue source. */
+} IfxVadc_Adc_QueueConfig;
+
+/** \brief Scan mode configuration structure.
+ */
+typedef struct
+{
+ boolean autoscanEnabled; /**< \brief Specifies autoscan functionality. */
+ IfxVadc_Adc_GatingTriggerConfig triggerConfig; /**< \brief Specifies trigger and gating configuration */
+ IfxVadc_RequestSlotPriority requestSlotPrio; /**< \brief priority of used scan request slot. */
+ IfxVadc_RequestSlotStartMode requestSlotStartMode; /**< \brief start mode for request scan source. */
+} IfxVadc_Adc_ScanConfig;
+
+/** \} */
+
+typedef struct
+{
+ IfxVadc_Emux_Out *pins[3]; /**< \brief Emux Pins configuration */
+ IfxPort_OutputMode outputMode; /**< \brief the pin output mode which should be configured */
+ IfxPort_PadDriver padDriver; /**< \brief Pad driver */
+} IfxVadc_Adc_EmuxPinConfig;
+
+/** \addtogroup IfxLld_Vadc_Adc_DataStructures
+ * \{ */
+/** \brief Channel handle data structure
+ */
+typedef struct
+{
+ IfxVadc_ChannelId channel; /**< \brief Specifies the channel index */
+ IfxVadc_ChannelResult resultreg; /**< \brief Specifies allocated result register */
+ IFX_CONST IfxVadc_Adc_Group *group; /**< \brief Specifies the group of the channel */
+} IfxVadc_Adc_Channel;
+
+/** \brief Channel configuration structure
+ */
+typedef struct
+{
+ boolean globalResultUsage; /**< \brief Specifies storage in global result register */
+ boolean synchonize; /**< \brief Specifies synchronized conversion channel */
+ boolean backgroundChannel; /**< \brief Specifies channel is used as background channel */
+ boolean rightAlignedStorage; /**< \brief Specifies result is right aligned */
+ Ifx_Priority resultPriority; /**< \brief Interrupt priority of the result trigger interrupt, if 0 the interrupt is disable */
+ Ifx_Priority channelPriority; /**< \brief Interrupt priority of the channel trigger interrupt, if 0 the interrupt is disable */
+ IfxSrc_Tos resultServProvider; /**< \brief Interrupt service provider for the result trigger interrupt */
+ IfxSrc_Tos channelServProvider; /**< \brief Interrupt service provider for the channel trigger interrupt */
+ IfxVadc_SrcNr resultSrcNr; /**< \brief Service node of the result trigger */
+ IfxVadc_SrcNr channelSrcNr; /**< \brief Service node of the channel trigger */
+ IfxVadc_ChannelId channelId; /**< \brief Specifies the channel index */
+ IfxVadc_InputClasses inputClass; /**< \brief Specifies input class selection */
+ IfxVadc_ChannelReference reference; /**< \brief Specifies Reference selection */
+ IfxVadc_ChannelResult resultRegister; /**< \brief Specifies Result register selection */
+ IfxVadc_BoundarySelection lowerBoundary; /**< \brief Specifies lower boundary selection */
+ IfxVadc_BoundarySelection upperBoundary; /**< \brief Specifies upper boundary selection */
+ IfxVadc_BoundaryExtension boundaryMode; /**< \brief Specifies Standard mode of fast compare mode */
+ IfxVadc_LimitCheck limitCheck; /**< \brief Specifies boundary band selection upper/lower */
+ IFX_CONST IfxVadc_Adc_Group *group; /**< \brief Specifies pointer to the IfxVadc_Adc_Group group handle */
+} IfxVadc_Adc_ChannelConfig;
+
+/** \brief VADC module configuration structure
+ */
+typedef struct
+{
+ Ifx_VADC *vadc; /**< \brief Specifies the pointer to the VADC module registers */
+ IfxVadc_Adc_ClassConfig globalInputClass[IFXVADC_NUM_GLOBAL_INPUTCLASSES]; /**< \brief Specifies the global conversion settings one and two */
+ float32 digitalFrequency; /**< \brief Specifies digital ADC Frequency */
+ float32 analogFrequency; /**< \brief Specifies analog ADC Frequency */
+ float32 moduleFrequency; /**< \brief module Frequency in Hz. */
+ boolean startupCalibration; /**< \brief Can be enabled to execute a startup calibration (disabled by default).
+ * Note that this option will also enable all converter groups.
+ * If this isn't desired, don't use this option, but execute IfxVadc_Adc_startupCalibration() after all ADC groups have been initialized. */
+ IfxVadc_LowSupplyVoltageSelect supplyVoltage; /**< \brief Select Low Power Supply Voltage */
+} IfxVadc_Adc_Config;
+
+/** \brief Emux Control Structure
+ */
+typedef struct
+{
+ Ifx_VADC *vadc; /**< \brief pointer to Module Configuration */
+ IfxVadc_ExternalMultiplexerMode mode; /**< \brief Specifies the External Multiplexer mode */
+ IfxVadc_EmuxSelectValue startChannel; /**< \brief specifies the external channel start value(EMUX[x:0])
+ * x- specifies external channel number */
+ IfxVadc_EmuxCodingScheme code; /**< \brief specifes binary/gray code */
+ IfxVadc_EmuxSampleTimeControl sampleTimeControl; /**< \brief specifies when to use sample time control */
+ IfxVadc_GroupId groupId; /**< \brief specifies groupId */
+ uint8 channels; /**< \brief specifies channel number */
+ IfxVadc_EmuxInterface emuxInterface; /**< \brief specifies the Emux interface */
+ IfxVadc_Adc_EmuxPinConfig emuxOutPinConfig; /**< \brief configure the emux output pin */
+ IfxVadc_ChannelSelectionStyle channelSelectionStyle; /**< \brief External Multiplexer Channel Selection Style */
+} IfxVadc_Adc_EmuxControl;
+
+/** \brief Group configuration structure
+ */
+typedef struct
+{
+ IFX_CONST IfxVadc_Adc *module; /**< \brief Specifies pointer to the IfxVadc_Adc module handle */
+ IfxVadc_GroupId groupId; /**< \brief Specifies the group/kernel id */
+ IfxVadc_GroupId master; /**< \brief Specifies the master group. If master is different from groupId, then the group is configured as slave. */
+ IfxVadc_Adc_ClassConfig inputClass[IFXVADC_NUM_INPUTCLASSES]; /**< \brief Specifies conversion settings one and two */
+ IfxVadc_Adc_ScanConfig scanRequest; /**< \brief Specifies scan mode configuration */
+ IfxVadc_Adc_QueueConfig queueRequest; /**< \brief Specifies queued mode configuration */
+ IfxVadc_Adc_BackgroundScanConfig backgroundScanRequest; /**< \brief Specifies back ground scan configuration */
+ boolean disablePostCalibration; /**< \brief Specifies if calibration after conversion (post calibration) should be disabled */
+ IfxVadc_Adc_ArbiterConfig arbiter; /**< \brief Arbiter configuration structure. */
+} IfxVadc_Adc_GroupConfig;
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_Module
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reset the VADC module
+ * \param vadc pointer to the VADC module
+ * \return None
+ *
+ * Example Usage :\ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_deInitModule(IfxVadc_Adc *vadc);
+
+/** \brief Get the current VADC configuration (e.g. VADC frequency)
+ * \param vadc pointer to the VADC module
+ * \param config pointer to the VADC module configuration
+ * \return None
+ *
+ * Example Usage :\ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_getModuleConfig(IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config);
+
+/** \brief Get conversion result based on the Request Source. (Function does not care about the alignment)
+ * value = raw * gain + offset
+ * \param group pointer to the VADC group
+ * \param channel channel number
+ * \param sourceType type of request source
+ * \return scaled Conversion result
+ *
+ * \code
+ * // create configuration
+ * IfxVadc_Adc_Config adcConfig;
+ * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
+ *
+ * // initialize module
+ * IfxVadc_Adc vadc;
+ * IfxVadc_Adc_initModule(&vadc, &adcConfig);
+ *
+ * // create group config
+ * IfxVadc_Adc_GroupConfig adcGroupConfig;
+ * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
+ *
+ * // change group (default is GroupId0, change to GroupId2)
+ * adcGroupConfig.groupId = IfxVadc_GroupId2;
+ * adcGroupConfig.master = adcGroupConfig.groupId;
+ *
+ * // enable gate in "always" mode (no edge detection)
+ * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ *
+ * // enable auto scan
+ * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
+ * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
+ *
+ * // initialize the group
+ * IfxVadc_Adc_Group adcGroup;
+ * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
+ *
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig;
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig, &adcGroup);
+ *
+ * // change channel (default is ChannelId0, change to ChannelId2)
+ * adcChannelConfig.channelId = IfxVadc_ChannelId2;
+ *
+ * // initialize the channel
+ * IfxVadc_Adc_Channel adcChannel;
+ * IfxVadc_Adc_initChannel(&adcChannel, &adcChannelConfig);
+ *
+ * uint32 channels = (1 << 2); // enable channel #2
+ * uint32 mask = (1 << 7) | (1 << 2); // modify the selection for channel #7 and #2; channel #7 will be disabled
+ *
+ * // configure wait for read mode
+ * IfxVadc_Adc_configureWaitForReadMode(&adcChannel, TRUE);
+ *
+ * // configure scan
+ * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
+ *
+ * // start the scan
+ * IfxVadc_Adc_startScan(&adcGroup);
+ *
+ * // wait for valid result
+ * Ifx_VADC_RES resultChannel;
+ * do {
+ * resultChannel = IfxVadc_Adc_getResultBasedOnRequestSource(&adcGroup, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
+ * } while( !resultChannel.B.VF );
+ * \endcode
+ *
+ */
+IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource(IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disable VADC Module
+ * \param vadc Pointer to VADC Module
+ * \return None
+ */
+IFX_EXTERN void IfxVadc_Adc_disableModule(Ifx_VADC *vadc);
+
+/** \brief Initialise the VADC to run with the expected frequency and calibration
+ * \param vadc pointer to the VADC handle
+ * \param config pointer to the VADC configuration
+ * \return IfxVadc_Status
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initModule(IfxVadc_Adc *vadc, const IfxVadc_Adc_Config *config);
+
+/** \brief Initialise buffer with default VADC configuration
+ * \param config pointer to the VADC module configuration
+ * \param vadc pointer to the VADC
+ * \return None
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN void IfxVadc_Adc_initModuleConfig(IfxVadc_Adc_Config *config, Ifx_VADC *vadc);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_Group
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gets the current group register set
+ * \param group Group handle data structure
+ * \return Group register set
+ *
+ * Ifx_VADC* vadc = &MODULE_VADC;
+ * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
+ *
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * //confiure wait for read mode for global result register
+ * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
+ * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
+ *
+ * // configure scan
+ * IfxVadc_setScan(group, channels, mask);
+ *
+ * // enable auto scan
+ * IfxVadc_setAutoScan(group, TRUE);
+ *
+ * // start the scan
+ * IfxVadc_startScan(group);
+ *
+ * // wait for conversion to finish
+ *
+ * // fetch the 2 results of conversion for group 0
+ * Ifx_VADC_RES results[10];
+ * result = IfxVadc_getGroupResult(group, results, 0, 2);
+ *
+ */
+IFX_INLINE Ifx_VADC_G *IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group);
+
+/** \brief Get conversion result for the group
+ * \param group pointer to the VADC group
+ * \param results pointer to scaled conversion results
+ * \param resultOffset offset for the first result
+ * \param numResults number of results
+ * \return None
+ *
+ * \code
+ * // create configuration
+ * IfxVadc_Adc_Config adcConfig;
+ * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
+ *
+ * // initialize module
+ * IfxVadc_Adc vadc;
+ * IfxVadc_Adc_initModule(&vadc, &adcConfig);
+ *
+ * // create group config
+ * IfxVadc_Adc_GroupConfig adcGroupConfig;
+ * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
+ *
+ * // change group (default is GroupId0, change to GroupId2)
+ * adcGroupConfig.groupId = IfxVadc_GroupId2;
+ * adcGroupConfig.master = adcGroupConfig.groupId;
+ *
+ * // enable gate in "always" mode (no edge detection)
+ * adcGroupConfig.scanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ *
+ * // enable auto scan
+ * adcGroupConfig.arbiter.requestSlotScanEnabled = TRUE;
+ * adcGroupConfig.scanRequest.autoscanEnabled = TRUE;
+ *
+ * // initialize the group
+ * IfxVadc_Adc_Group adcGroup;
+ * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
+ *
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig2;
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
+ *
+ * // change channel (default is ChannelId0, change to ChannelId2)
+ * adcChannelConfig2.channelId = IfxVadc_ChannelId2;
+ *
+ * // initialize the channel
+ * IfxVadc_Adc_Channel adcChannel2;
+ * IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
+ *
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig5;
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
+ *
+ * // change channel (default is ChannelId0, change to ChannelId5)
+ * adcChannelConfig5.channelId = IfxVadc_ChannelId5;
+ * // change channel result register (default is ChannelResult0, change to ChannelResult1)
+ * adcChannelConfig5.resultRegister = IfxVadc_ChannelResult1;
+ *
+ * // initialize the channel
+ * IfxVadc_Adc_Channel adcChannel5;
+ * IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
+ *
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * // configure wait for read mode
+ * IfxVadc_Adc_configureWaitForReadMode(&adcChannel2, TRUE);
+ * IfxVadc_Adc_configureWaitForReadMode(&adcChannel5, TRUE);
+ *
+ * // configure scan
+ * IfxVadc_Adc_setScan(&adcGroup, channels, mask);
+ *
+ * // start the scan
+ * IfxVadc_Adc_startScan(&adcGroup);
+ *
+ * // wait for conversion to finish
+ * IfxVadc_Status scanStatus;
+ * do
+ * {
+ * scanStatus = IfxVadc_Adc_getScanStatus(&adcGroup);
+ * } while(scanStatus==IfxVadc_Status_ChannelsStillPending);
+ *
+ * // fetch the 2 results of conversion for group 0
+ * Ifx_VADC_RES results[10];
+ * IfxVadc_Adc_getGroupResult(&adcGroup, results, 0, 2);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_getGroupResult(IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
+
+/** \brief Gets the current group module register address
+ * \param group Group handle data structure
+ * \return Group module register base address
+ */
+IFX_INLINE Ifx_VADC *IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Reset the VADC group
+ * \param group pointer to the VADC group
+ * \return None
+ *
+ * Example Usage :\ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN void IfxVadc_Adc_deInitGroup(IfxVadc_Adc_Group *group);
+
+/** \brief Get the current group configuration (e.g. vadc frequency)
+ * \param group pointer to the VADC group
+ * \param config pointer to the VADC group configuration
+ * \return None
+ *
+ * Example Usage :\ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN void IfxVadc_Adc_getGroupConfig(IfxVadc_Adc_Group *group, IfxVadc_Adc_GroupConfig *config);
+
+/** \brief Initialise the VADC group (also autoscan and queue modes) Slave Groups must initialize first.
+ * \param group pointer to the VADC group
+ * \param config pointer to the VADC group configuration
+ * \return IfxVadc_Status
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initGroup(IfxVadc_Adc_Group *group, const IfxVadc_Adc_GroupConfig *config);
+
+/** \brief Initialise buffer with default VADC configuration
+ * \param config pointer to the VADC group configuration
+ * \param vadc pointer to the VADC module
+ * \return None
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN void IfxVadc_Adc_initGroupConfig(IfxVadc_Adc_GroupConfig *config, IfxVadc_Adc *vadc);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_Channel
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief pointer to the VADC channel
+ * \param channel pointer to the VADC channel
+ * \param waitForRead wait for read mode enabled/disable
+ * \return None
+ *
+ * For coding example see: \ref IfxVadc_Adc_getGroupResult
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode(IfxVadc_Adc_Channel *channel, boolean waitForRead);
+
+/** \brief Get conversion result (Function does not care about the alignment)
+ * \param channel pointer to the VADC channel
+ * \return scaled Conversion result
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult(IfxVadc_Adc_Channel *channel);
+
+/** \brief Get debug result (Function does not care about the alignment)
+ * \param channel pointer to the VADC channel.
+ * \return Debug Conversion result
+ */
+IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult(IfxVadc_Adc_Channel *channel);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Get the current channel configuration (e.g. sample settings)
+ * \param channel pointer to the VADC channel
+ * \param config pointer to the VADC channel configuration
+ * \return None
+ *
+ * Example Usage :\ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN void IfxVadc_Adc_getChannelConfig(IfxVadc_Adc_Channel *channel, IfxVadc_Adc_ChannelConfig *config);
+
+/** \brief get the channel Conversion Time
+ * \param channel Channel
+ * \param conversionMode specifies Compatible mode(Standard Conversion mode).
+ * \return channel conversion time in sec
+ */
+IFX_EXTERN float32 IfxVadc_Adc_getChannelConversionTime(IfxVadc_Adc_Channel *channel, IfxVadc_ConversionType conversionMode);
+
+/** \brief Initialise one channel with given configuration
+ * \param channel pointer to the VADC channel
+ * \param config pointer to the VADC channel configuration
+ * \return IfxVadc_Status
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN IfxVadc_Status IfxVadc_Adc_initChannel(IfxVadc_Adc_Channel *channel, const IfxVadc_Adc_ChannelConfig *config);
+
+/** \brief Initialise buffer with default channel configuration
+ * \param config pointer to the VADC channel configuration
+ * \param group pointer to the VADC group
+ * \return None
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_EXTERN void IfxVadc_Adc_initChannelConfig(IfxVadc_Adc_ChannelConfig *config, const IfxVadc_Adc_Group *group);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_Background_Autoscan
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief access function to enable/disable wait for read mode for global result register
+ * \param vadc pointer to the VADC module
+ * \param waitForRead wait for read mode enabled/disabled
+ * \return None
+ *
+ * For coding example see: \ref IfxVadc_Adc_getGlobalResult
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxVadc_Adc *vadc, boolean waitForRead);
+
+/** \brief Gives the background scan status for a group
+ * \param vadc pointer to the VADC module
+ * \return IfxVadc_Status
+ */
+IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus(IfxVadc_Adc *vadc);
+
+/** \brief returns result stored in global result register
+ * \param vadc pointer to the VADC module
+ * \return global result register
+ *
+ * \code
+ * // create configuration
+ * IfxVadc_Adc_Config adcConfig;
+ * IfxVadc_Adc_initModuleConfig(&adcConfig, &MODULE_VADC);
+ *
+ * // initialize module
+ * IfxVadc_Adc vadc;
+ * IfxVadc_Adc_initModule(&vadc, &adcConfig);
+ *
+ * // create group config
+ * IfxVadc_Adc_GroupConfig adcGroupConfig;
+ * IfxVadc_Adc_initGroupConfig(&adcGroupConfig, &vadc);
+ *
+ * // change group (default is GroupId_0, change to GroupId_3)
+ * adcGroupConfig.groupId = IfxVadc_GroupId_3;
+ *
+ * // IMPORTANT: usually we use the same group as master!
+ * adcGroupConfig.master = adcGroupConfig.groupId;
+ *
+ * // enable background scan
+ * adcGroupConfig.arbiter.requestSlotBackgroundScanEnabled = TRUE;
+ * adcGroupConfig.backgroundScanRequest.autoBackgroundScanEnabled = TRUE;
+ *
+ * // enable gate in "always" mode (no edge detection)
+ * adcGroupConfig.backgroundScanRequest.triggerConfig.gatingMode = IfxVadc_GatingMode_always;
+ *
+ * // initialize the group
+ * IfxVadc_Adc_Group adcGroup;
+ * IfxVadc_Adc_initGroup(&adcGroup, &adcGroupConfig);
+ *
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig2;
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig2, &adcGroup);
+ * adcChannelConfig2.backgroundChannel = TRUE;
+ * adcChannelConfig2.globalResultUsage = TRUE;
+ *
+ * // change channel (default is ChannelId0, change to ChannelId2)
+ * adcChannelConfig2.channelId = IfxVadc_ChannelId2;
+ *
+ * // initialize the channel
+ * IfxVadc_Adc_Channel adcChannel2;
+ * IfxVadc_Adc_initChannel(&adcChannel2, &adcChannelConfig2);
+ *
+ * // create channel config
+ * IfxVadc_Adc_ChannelConfig adcChannelConfig5;
+ * IfxVadc_Adc_initChannelConfig(&adcChannelConfig5, &adcGroup);
+ * adcChannelConfig5.backgroundChannel = TRUE;
+ * adcChannelConfig5.globalResultUsage = TRUE;
+ *
+ * // change channel (default is ChannelId0, change to ChannelId5)
+ * adcChannelConfig5.channelId = IfxVadc_ChannelId5;
+ *
+ *
+ * // initialize the channel
+ * IfxVadc_Adc_Channel adcChannel5;
+ * IfxVadc_Adc_initChannel(&adcChannel5, &adcChannelConfig5);
+ *
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * //configure wait for read mode
+ * IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(&vadc, TRUE);
+ *
+ * // configure background scan
+ * IfxVadc_Adc_setBackgroundScan(&vadc, &adcGroupConfig, channels, mask);
+ *
+ * // start the background scan
+ * IfxVadc_Adc_startBackgroundScan(&vadc);
+ *
+ * // wait for valid result for channel 2
+ * Ifx_VADC_GLOBRES resultChannel2;
+ * do {
+ * resultChannel2 = IfxVadc_Adc_getGlobalResult(&vadc);
+ * } while( !resultChannel2.B.VF );
+ *
+ * // wait for valid result for channel 5
+ * Ifx_VADC_GLOBRES resultChannel5;
+ * do {
+ * resultChannel5 = IfxVadc_Adc_getGlobalResult(&vadc);
+ * } while( !resultChannel5.B.VF );
+ * \endcode
+ *
+ */
+IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult(IfxVadc_Adc *vadc);
+
+/** \brief configures a background scan
+ * \param vadc pointer to the VADC module
+ * \param group pointer to the VADC group
+ * \param channels specifies the channels which should be enabled/disabled
+ * \param mask specifies the channels which should be modified
+ * \return None
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_setBackgroundScan(IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask);
+
+/** \brief Starts a background scan
+ * \param vadc pointer to the VADC module
+ * \return None
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_startBackgroundScan(IfxVadc_Adc *vadc);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_ChannelScan
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gives the scan status for a group.
+ * \param group pointer to the VADC group
+ * \return IfxVadc_Status
+ *
+ * For coding example see: \ref IfxVadc_Adc_getResultBasedOnRequestSource
+ *
+ */
+IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus(IfxVadc_Adc_Group *group);
+
+/** \brief Configures an autoscan.
+ * \param group pointer to the VADC group
+ * \param channels specifies the channels which should be enabled/disabled
+ * \param mask specifies the channels which should be modified
+ * \return None
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_setScan(IfxVadc_Adc_Group *group, uint32 channels, uint32 mask);
+
+/** \brief Starts an autoscan on the specified group
+ * \param group pointer to the VADC group
+ * \return None
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_startScan(IfxVadc_Adc_Group *group);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_Queue
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Add an entry to the queue of a group for the specified channel with the following options set:
+ * refill
+ * source interrupt enable/disable
+ * external trigger control
+ * \param channel pointer to the VADC channel
+ * \param options options for channel
+ * \return None
+ *
+ * For coding example see: \ref IfxVadc_Adc_getResult
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_addToQueue(IfxVadc_Adc_Channel *channel, uint32 options);
+
+/** \brief Flush the contents of the queue of a group
+ * \param group pointer to the VADC group
+ * \return None
+ *
+ * For coding example see: \ref IfxVadc_Adc_getResult
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_clearQueue(IfxVadc_Adc_Group *group);
+
+/** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
+ * \param group pointer to the VADC group
+ * \return Queue status
+ *
+ * For coding example see: \ref IfxVadc_Adc_getResult
+ *
+ */
+IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus(IfxVadc_Adc_Group *group);
+
+/** \brief Starts a queue of a group by generating a trigger event through software
+ * \param group pointer to the VADC group
+ * \return None
+ *
+ * For coding example see: \ref IfxLld_Vadc_Adc_Usage
+ *
+ */
+IFX_INLINE void IfxVadc_Adc_startQueue(IfxVadc_Adc_Group *group);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Adc_Emux
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief initialise default configuration for external multiplexer
+ * \param emuxConfig speciifies EMUX configuration
+ * \param vadc pointer to VADC module space
+ * \return None
+ */
+IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerModeConfig(IfxVadc_Adc_EmuxControl *emuxConfig, Ifx_VADC *vadc);
+
+/** \brief initalise external multiplexer.
+ * \param vadc Pointer to VADC Module space
+ * \param emuxControl speciifies EMUX configuration
+ * \return None
+ */
+IFX_EXTERN void IfxVadc_Adc_initExternalMultiplexerMode(Ifx_VADC *vadc, const IfxVadc_Adc_EmuxControl *emuxControl);
+
+/** \} */
+
+/******************************************************************************/
+/*---------------------Inline Function Implementations------------------------*/
+/******************************************************************************/
+
+IFX_INLINE void IfxVadc_Adc_addToQueue(IfxVadc_Adc_Channel *channel, uint32 options)
+{
+ IfxVadc_addToQueue(channel->group->group, channel->channel, options);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_clearQueue(IfxVadc_Adc_Group *group)
+{
+ IfxVadc_clearQueue(group->group, TRUE);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_configureWaitForReadMode(IfxVadc_Adc_Channel *channel, boolean waitForRead)
+{
+ IfxVadc_configureWaitForReadMode(channel->group->group, channel->resultreg, waitForRead);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_configureWaitForReadModeForGlobalResultRegister(IfxVadc_Adc *vadc, boolean waitForRead)
+{
+ IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc->vadc, waitForRead);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_deInitModule(IfxVadc_Adc *vadc)
+{
+ Ifx_VADC *vadcSFR = vadc->vadc;
+
+ IfxVadc_resetKernel(vadcSFR);
+}
+
+
+IFX_INLINE IfxVadc_Status IfxVadc_Adc_getBackgroundScanStatus(IfxVadc_Adc *vadc)
+{
+ return IfxVadc_getBackgroundScanStatus(vadc->vadc);
+}
+
+
+IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_Adc_getGlobalResult(IfxVadc_Adc *vadc)
+{
+ return IfxVadc_getGlobalResult(vadc->vadc);
+}
+
+
+IFX_INLINE Ifx_VADC_G *IfxVadc_Adc_getGroupRegsFromGroup(const IfxVadc_Adc_Group *group)
+{
+ return group->group;
+}
+
+
+IFX_INLINE void IfxVadc_Adc_getGroupResult(IfxVadc_Adc_Group *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
+{
+ IfxVadc_getGroupResult(group->group, results, resultOffset, numResults);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_getModuleConfig(IfxVadc_Adc *vadc, IfxVadc_Adc_Config *config)
+{
+ config->vadc = vadc->vadc;
+ config->analogFrequency = IfxVadc_getAdcAnalogFrequency(vadc->vadc);
+ config->digitalFrequency = IfxVadc_getAdcDigitalFrequency(vadc->vadc);
+ config->globalInputClass[0].resolution = IfxVadc_getGlobalResolution(vadc->vadc, 0);
+ config->globalInputClass[1].resolution = IfxVadc_getGlobalResolution(vadc->vadc, 1);
+ config->globalInputClass[0].sampleTime = IfxVadc_getGlobalSampleTime(vadc->vadc, 0, config->analogFrequency);
+ config->globalInputClass[1].sampleTime = IfxVadc_getGlobalSampleTime(vadc->vadc, 1, config->analogFrequency);
+ config->moduleFrequency = IfxVadc_getAdcModuleFrequency();
+ config->startupCalibration = IfxVadc_getStartupCalibration(vadc->vadc);
+}
+
+
+IFX_INLINE IfxVadc_Status IfxVadc_Adc_getQueueStatus(IfxVadc_Adc_Group *group)
+{
+ return IfxVadc_getQueueStatus(group->group);
+}
+
+
+IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResult(IfxVadc_Adc_Channel *channel)
+{
+ return IfxVadc_getResult(channel->group->group, channel->resultreg);
+}
+
+
+IFX_INLINE Ifx_VADC_RES IfxVadc_Adc_getResultBasedOnRequestSource(IfxVadc_Adc_Group *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
+{
+ return IfxVadc_getResultBasedOnRequestSource(group->module.vadc, group->group, channel, sourceType);
+}
+
+
+IFX_INLINE IfxVadc_Status IfxVadc_Adc_getScanStatus(IfxVadc_Adc_Group *group)
+{
+ return IfxVadc_getScanStatus(group->group);
+}
+
+
+IFX_INLINE Ifx_VADC *IfxVadc_Adc_getVadcFromGroup(const IfxVadc_Adc_Group *group)
+{
+ return group->module.vadc;
+}
+
+
+IFX_INLINE void IfxVadc_Adc_setBackgroundScan(IfxVadc_Adc *vadc, IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
+{
+ IfxVadc_setBackgroundScan(vadc->vadc, group->groupId, channels, mask);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_setScan(IfxVadc_Adc_Group *group, uint32 channels, uint32 mask)
+{
+ IfxVadc_setScan(group->group, channels, mask);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_startBackgroundScan(IfxVadc_Adc *vadc)
+{
+ IfxVadc_startBackgroundScan(vadc->vadc);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_startQueue(IfxVadc_Adc_Group *group)
+{
+ IfxVadc_startQueue(group->group);
+}
+
+
+IFX_INLINE void IfxVadc_Adc_startScan(IfxVadc_Adc_Group *group)
+{
+ IfxVadc_startScan(group->group);
+}
+
+
+IFX_INLINE Ifx_VADC_RESD IfxVadc_Adc_getDebugResult(IfxVadc_Adc_Channel *channel)
+{
+ return IfxVadc_getDebugResult(channel->group->group, channel->resultreg);
+}
+
+
+#endif /* IFXVADC_ADC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Std/IfxVadc.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Std/IfxVadc.c
new file mode 100644
index 0000000..22b5306
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Std/IfxVadc.c
@@ -0,0 +1,591 @@
+/**
+ * \file IfxVadc.c
+ * \brief VADC basic functionality
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxVadc.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void IfxVadc_configExternalMultiplexerMode(Ifx_VADC *vadc, Ifx_VADC_G *vadcG, IfxVadc_ExternalMultiplexerMode mode, uint8 channels, IfxVadc_EmuxSelectValue startChannel, IfxVadc_EmuxCodingScheme code, IfxVadc_EmuxSampleTimeControl sampleTimeControl, IfxVadc_ChannelSelectionStyle channelSelectionStyle)
+{
+ Ifx_VADC_G_EMUXCTR emuxctr;
+
+ emuxctr.B.EMXWC = 1;
+ emuxctr.B.EMUXMODE = mode;
+ emuxctr.B.EMXCSS = channelSelectionStyle;
+ emuxctr.B.EMUXCH = channels;
+ emuxctr.B.EMUXSET = startChannel;
+ emuxctr.B.EMXCOD = code;
+ emuxctr.B.EMXST = sampleTimeControl;
+ IfxVadc_enableAccess(vadc, IfxVadc_Protection_externalMultiplexer);
+ vadcG->EMUXCTR.U = emuxctr.U;
+ emuxctr.B.EMXWC = 0;
+ vadcG->EMUXCTR.U = emuxctr.U;
+ IfxVadc_disableAccess(vadc, IfxVadc_Protection_externalMultiplexer);
+}
+
+
+void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
+{
+ uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(passwd);
+
+ if (protectionSet < IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER)
+ {
+ vadc->ACCPROT0.U |= (0x00000001 << protectionSet);
+ }
+ else
+ {
+ vadc->ACCPROT1.U |= (0x00000001 << (protectionSet & 0x1F));
+ }
+
+ IfxScuWdt_setSafetyEndinit(passwd);
+}
+
+
+void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable)
+{
+ if (group < IFXVADC_NUM_ADC_CAL_GROUPS)
+ {
+ IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
+
+ uint32 mask = 1 << (IFX_VADC_GLOBCFG_DPCAL0_OFF + group);
+
+ if (disable == TRUE)
+ {
+ vadc->GLOBCFG.U |= mask;
+ }
+ else
+ {
+ vadc->GLOBCFG.U &= ~mask;
+ }
+
+ IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
+ }
+}
+
+
+void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet)
+{
+ uint16 passwd = IfxScuWdt_getSafetyWatchdogPassword();
+ IfxScuWdt_clearSafetyEndinit(passwd);
+
+ if (protectionSet < IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER)
+ {
+ vadc->ACCPROT0.U &= ~(0x00000001 << protectionSet);
+ }
+ else
+ {
+ vadc->ACCPROT1.U &= ~(0x00000001 << (protectionSet & 0x1F));
+ }
+
+ IfxScuWdt_setSafetyEndinit(passwd);
+}
+
+
+void IfxVadc_enableGroupSync(Ifx_VADC *vadc, uint32 ccu6Num)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+
+ // VADC Config: enable ADC group sync
+ {
+ Ifx_VADC_GLOBCFG vadcGlobCfg;
+ vadcGlobCfg.U = vadc->GLOBCFG.U;
+ vadcGlobCfg.B.DIVWC = 1;
+ vadcGlobCfg.B.DCMSB = 1;
+
+ IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
+ vadc->GLOBCFG.U = vadcGlobCfg.U;
+ IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
+ }
+
+ if (ccu6Num == 0)
+ {
+ // CCU60 Config
+ CCU60_CLC.U = 0;
+
+ if (CCU60_CLC.U)
+ {}
+
+ CCU60_T13PR.U = 4; // results in 4+1 clock periods (100MHz) = 20MHz
+ CCU60_CC63SR.U = 4; // configures duty cycle of 40ns low and 10ns high
+ CCU60_MODCTR.B.ECT13O = 1; // bit ECT130 = 1 serves to route CC63ST signals out to COUT63
+ CCU60_TCTR4.U = (1 << IFX_CCU6_TCTR4_T13STR_OFF) | (1 << IFX_CCU6_TCTR4_T13RS_OFF); // set bit T13STR & T13RS -> enable shadow transfer & start timer T13
+ CCU60_MOSEL.B.TRIG1SEL = 0; // CCU60_COUT63 routed to output signal CCU6061 TRIG1
+ }
+ else if (ccu6Num == 1)
+ {
+ // CCU60 + CCU61 Config
+ CCU60_CLC.U = 0;
+ CCU61_CLC.U = 0;
+
+ if (CCU61_CLC.U)
+ {}
+
+ CCU61_T13PR.U = 4; // results in 4+1 clock periods (100MHz) = 20MHz
+ CCU61_CC63SR.U = 4; // configures duty cycle of 40ns low and 10ns high
+ CCU61_MODCTR.B.ECT13O = 1; // bit ECT130 = 1 serves to route CC63ST signals out to COUT63
+ CCU61_TCTR4.U = (1 << IFX_CCU6_TCTR4_T13STR_OFF) | (1 << IFX_CCU6_TCTR4_T13RS_OFF); // set bit T13STR & T13RS -> enable shadow transfer & start timer T13
+ CCU60_MOSEL.B.TRIG1SEL = 1; // CCU61_COUT63 routed to output signal CCU6061 TRIG1
+ }
+
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+float32 IfxVadc_getAdcAnalogFrequency(Ifx_VADC *vadc)
+{
+ return IfxScuCcu_getSpbFrequency() / (1U + vadc->GLOBCFG.B.DIVA);
+}
+
+
+float32 IfxVadc_getAdcDigitalFrequency(Ifx_VADC *vadc)
+{
+ return IfxScuCcu_getSpbFrequency() / (1U + vadc->GLOBCFG.B.DIVD);
+}
+
+
+float32 IfxVadc_getAdcModuleFrequency(void)
+{
+ return IfxScuCcu_getSpbFrequency();
+}
+
+
+IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc)
+{
+ IfxVadc_Status status = IfxVadc_Status_noError;
+ uint8 i;
+
+ for (i = 0; i < IFXVADC_NUM_ADC_GROUPS; i++)
+ {
+ if (vadc->BRSPND[i].U)
+ {
+ return IfxVadc_Status_channelsStillPending;
+ }
+ else
+ {
+ continue;
+ }
+ }
+
+ return status;
+}
+
+
+float32 IfxVadc_getChannelConversionTime(Ifx_VADC *vadc, IfxVadc_GroupId group, IfxVadc_InputClasses inputClass, float32 analogFrequency, float32 moduleFrequency, IfxVadc_ConversionType conversionMode)
+{
+ float32 conversionTime = 0.0;
+ Ifx_VADC_G *vadcG = &vadc->G[group];
+ uint32 stcs;
+ IfxVadc_ChannelResolution resolution;
+ uint32 n;
+
+ uint32 inputClassNum;
+
+ if (inputClass <= IfxVadc_InputClasses_group1)
+ {
+ inputClassNum = inputClass;
+ stcs = vadcG->ICLASS[inputClassNum].B.STCS;
+ resolution = (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
+ }
+ else
+ {
+ inputClassNum = inputClass - IfxVadc_InputClasses_global0;
+ stcs = vadc->GLOBICLASS[inputClassNum].B.STCS;
+ resolution = (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
+ }
+
+ if (stcs > 16)
+ {
+ stcs = (stcs - 15) * 16; // Reference for the logic: Table 28-4 of TC29xB User Manual v1.3
+ }
+
+ switch (resolution)
+ {
+ case IfxVadc_ChannelResolution_12bit: n = 12;
+ break;
+ case IfxVadc_ChannelResolution_10bit: n = 10;
+ break;
+ case IfxVadc_ChannelResolution_8bit: n = 8;
+ break;
+ case IfxVadc_ChannelResolution_10bitFast: n = 10;
+ break;
+ default: n = 0;
+ break;
+ }
+
+ if (conversionMode == IfxVadc_ConversionType_Compatible)
+ {
+ if (resolution != IfxVadc_ChannelResolution_10bitFast)
+ {
+ /* Standard conversion */
+ uint32 pc = IfxVadc_isPostCalibration(vadc, group) ? 2 : 0;
+ conversionTime = (float32)(2 + stcs + n + pc) / analogFrequency + 2.0 / moduleFrequency;
+ }
+ else
+ {
+ /* Fast compare mode */
+ conversionTime = (float32)(2 + stcs + 2) / analogFrequency + 2.0 / moduleFrequency;
+ }
+ }
+ else
+ {
+ // do nothing
+ }
+
+ return conversionTime;
+}
+
+
+IfxVadc_Status IfxVadc_getQueueStatus(Ifx_VADC_G *group)
+{
+ IfxVadc_Status status = IfxVadc_Status_noError;
+
+ /* just fill level is checked */
+ if (0x7 == group->QSR0.B.FILL)
+ {
+ status = IfxVadc_Status_queueFull;
+ }
+ else
+ {
+ status = IfxVadc_Status_noError;
+ }
+
+ return status;
+}
+
+
+Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType)
+{
+ sint32 sourceResultRegister = -1;
+ Ifx_VADC_RES tmpResult;
+
+ switch (sourceType)
+ {
+ case IfxVadc_RequestSource_queue:
+ sourceResultRegister = group->QCTRL0.B.SRCRESREG;
+ break;
+
+ case IfxVadc_RequestSource_scan:
+ sourceResultRegister = group->ASCTRL.B.SRCRESREG;
+ break;
+
+ case IfxVadc_RequestSource_background:
+ sourceResultRegister = vadc->BRSCTRL.B.SRCRESREG;
+ break;
+ }
+
+ if (sourceResultRegister > 0)
+ {
+ tmpResult.U = group->RES[sourceResultRegister].U;
+
+ return tmpResult;
+ }
+ else
+ {
+ if ((sourceType == IfxVadc_RequestSource_background) && (group->CHCTR[channel].B.RESTBS == 1))
+ {
+ tmpResult.B.VF = vadc->GLOBRES.B.VF;
+ tmpResult.B.FCR = vadc->GLOBRES.B.FCR;
+ tmpResult.B.CRS = vadc->GLOBRES.B.CRS;
+ tmpResult.B.EMUX = vadc->GLOBRES.B.EMUX;
+ tmpResult.B.CHNR = vadc->GLOBRES.B.CHNR;
+ tmpResult.B.DRC = vadc->GLOBRES.B.GNR; //The bitfields are the same but interpretation is different. TODO- define a generic result register type.
+ tmpResult.B.RESULT = vadc->GLOBRES.B.RESULT;
+
+ return tmpResult;
+ }
+ else
+ {
+ tmpResult.U = group->RES[group->CHCTR[channel].B.RESREG].U;
+
+ return tmpResult;
+ }
+ }
+}
+
+
+IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group)
+{
+ IfxVadc_Status status = IfxVadc_Status_noError;
+
+ if (group->ASPND.U)
+ {
+ return IfxVadc_Status_channelsStillPending;
+ }
+ else
+ {
+ return status;
+ }
+}
+
+
+volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index)
+{
+ Ifx_SRC_SRCR *base;
+
+ if (IfxVadc_SrcNr_shared0 <= index)
+ {
+ index -= 4;
+
+ if ((group & 0x1) != 0)
+ {
+ group = IfxVadc_GroupId_global1; /* Shared interrupt common 1 is used */
+ }
+ else
+ {
+ group = IfxVadc_GroupId_global0; /* Shared interrupt common 0 is used */
+ }
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ base = (Ifx_SRC_SRCR *)IfxVadc_cfg_srcAddresses[(group * 4) + index];
+
+ return &(base[0]);
+}
+
+
+void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider)
+{
+ Ifx_VADC_GLOBCFG tempGLOBCFG;
+ tempGLOBCFG.U = vadc->GLOBCFG.U;
+ tempGLOBCFG.B.DIVD = arbiterClockDivider;
+ tempGLOBCFG.B.DIVWC = 1;
+ IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
+ vadc->GLOBCFG.U = tempGLOBCFG.U;
+ IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
+}
+
+
+void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider)
+{
+ Ifx_VADC_GLOBCFG tempGLOBCFG;
+ tempGLOBCFG.U = vadc->GLOBCFG.U;
+ tempGLOBCFG.B.DIVA = converterClockDivider;
+ tempGLOBCFG.B.DIVWC = 1;
+ IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
+ vadc->GLOBCFG.U = tempGLOBCFG.U;
+ IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
+}
+
+
+uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD)
+{
+ uint32 divD;
+ uint32 result;
+ uint32 fadc = IfxScuCcu_getSpbFrequency();
+
+ divD = (fadc / fAdcD - 1);
+
+ divD = __minu(divD, 0x3u);
+
+ result = fadc / (divD + 1);
+ IfxVadc_initialiseAdcArbiterClock(vadc, divD);
+ return result;
+}
+
+
+uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI)
+{
+ uint32 divA;
+ uint32 result;
+ uint32 fadc = IfxScuCcu_getSpbFrequency();
+
+ /* DivA = min(max(0, Fadc / FAdcI - 1), 0x3F); */
+ divA = (fadc << 2) / fAdcI;
+
+ divA = (divA + 2) >> 2; /* Round to nearest integer */
+ divA = __minu(divA - 1, 0x1Fu);
+ result = fadc / (divA + 1);
+
+ if (result > IFXVADC_ANALOG_FREQUENCY_MAX)
+ {
+ divA = __minu(divA + 1, 0x1Fu);
+
+ result = fadc / (divA + 1);
+ }
+ else
+ {
+ /* do nothing */
+ }
+
+ if (!((result >= IFXVADC_ANALOG_FREQUENCY_MIN) && (result <= IFXVADC_ANALOG_FREQUENCY_MAX)))
+ {
+ result = 0; /* Min / Max FAdcI frequency */
+ }
+ else
+ {
+ IfxVadc_initialiseAdcConverterClock(vadc, divA);
+ }
+
+ return result;
+}
+
+
+boolean IfxVadc_isPostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group)
+{
+ boolean pcEnabled;
+
+ switch (group)
+ {
+ case IfxVadc_GroupId_0: pcEnabled = vadc->GLOBCFG.B.DPCAL0 == 0;
+ break;
+ case IfxVadc_GroupId_1: pcEnabled = vadc->GLOBCFG.B.DPCAL1 == 0;
+ break;
+ case IfxVadc_GroupId_2: pcEnabled = vadc->GLOBCFG.B.DPCAL2 == 0;
+ break;
+ case IfxVadc_GroupId_3: pcEnabled = vadc->GLOBCFG.B.DPCAL3 == 0;
+ break;
+ default: pcEnabled = FALSE;
+ break;
+ }
+
+ return pcEnabled;
+}
+
+
+void IfxVadc_resetKernel(Ifx_VADC *vadc)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
+ vadc->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
+ vadc->KRST0.B.RST = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+
+ while (vadc->KRST0.B.RSTSTAT == 0) /* Wait until reset is executed */
+
+ {}
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ vadc->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
+ IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+void IfxVadc_selectPowerSupplyVoltage(Ifx_VADC *vadc, IfxVadc_LowSupplyVoltageSelect supplyVoltage)
+{
+ Ifx_VADC_GLOBCFG tempGLOBCFG;
+ tempGLOBCFG.U = vadc->GLOBCFG.U;
+ tempGLOBCFG.B.LOSUP = supplyVoltage;
+ tempGLOBCFG.B.DIVWC = 1;
+ IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
+ vadc->GLOBCFG.U = tempGLOBCFG.U;
+ IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
+}
+
+
+void IfxVadc_setArbiterPriority(Ifx_VADC_G *vadcG, boolean slotEnable, IfxVadc_RequestSlotPriority prio, IfxVadc_RequestSlotStartMode mode, IfxVadc_RequestSource slot)
+{
+ if (slotEnable != FALSE)
+ {
+ vadcG->ARBPR.U |= slotEnable << (IFX_VADC_G_ARBPR_ASEN0_OFF + slot); /* enable Slot */
+ vadcG->ARBPR.U &= ~(IFX_VADC_G_ARBPR_PRIO0_MSK << (slot * 4u)); /* clear Priority */
+ vadcG->ARBPR.U |= (prio << (slot * 4u)); /* Set Priority */
+
+ if (mode != IfxVadc_RequestSlotStartMode_waitForStart)
+ {
+ vadcG->ARBPR.U |= 0x1u << (IFX_VADC_G_ARBPR_CSM0_OFF + (slot * 4u)); /* Set cancel inject mode */
+ }
+ else
+ {
+ vadcG->ARBPR.U &= ~(0x1u << (IFX_VADC_G_ARBPR_CSM0_OFF + (slot * 4u))); /* Set Wait for Start mode */
+ }
+ }
+ else
+ {
+ vadcG->ARBPR.U &= ~(IFX_VADC_G_ARBPR_ASEN0_MSK << (IFX_VADC_G_ARBPR_ASEN0_OFF + slot)); /* disable Slot */
+ }
+}
+
+
+void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask)
+{
+ /* select channels which should take part in the scan sequence */
+ /* the mask allows to specify the channels which should be enabled/disabled */
+ group->ASSEL.U = (group->ASSEL.U & ~mask) | (channels & mask);
+}
+
+
+void IfxVadc_startupCalibration(Ifx_VADC *vadc)
+{
+ boolean calibrationRunning;
+ uint8 adcCalGroupNum;
+
+ /* Start calibration */
+ IfxVadc_enableAccess(vadc, IfxVadc_Protection_globalConfig);
+ /* Set SUCAL bit */
+ IfxVadc_initiateStartupCalibration(vadc);
+ IfxVadc_disableAccess(vadc, IfxVadc_Protection_globalConfig);
+
+ /* Wait for hardware self-test and calibration to complete */
+ /* Wait until Calibration is done */
+ do
+ {
+ calibrationRunning = FALSE;
+
+ for (adcCalGroupNum = 0; adcCalGroupNum < IFXVADC_NUM_ADC_CAL_GROUPS; adcCalGroupNum++)
+ {
+ if (IfxVadc_getAdcCalibrationActiveState(vadc, adcCalGroupNum) != 0) /* Check ADC Calibration Flag CAL */
+ {
+ calibrationRunning = TRUE;
+ }
+ else
+ {
+ /* do nothing */
+ }
+ }
+ } while (calibrationRunning == TRUE); /* wait until calibration of all calibrated kernels are done */
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Std/IfxVadc.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Std/IfxVadc.h
new file mode 100644
index 0000000..15f9a9e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/Vadc/Std/IfxVadc.h
@@ -0,0 +1,2496 @@
+/**
+ * \file IfxVadc.h
+ * \brief VADC basic functionality
+ * \ingroup IfxLld_Vadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Vadc_Std_Enum Enumerations
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_Group Group Functions
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_Module Module Functions
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
+ * \ingroup IfxLld_Vadc_Std
+ * \defgroup IfxLld_Vadc_Std_Emux Emux Functions
+ * \ingroup IfxLld_Vadc_Std
+ */
+
+#ifndef IFXVADC_H
+#define IFXVADC_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "_Impl/IfxVadc_cfg.h"
+#include "_PinMap/IfxVadc_PinMap.h"
+#include "IfxVadc_bf.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "Scu/Std/IfxScuCcu.h"
+#include "Scu/Std/IfxScuWdt.h"
+#include "IfxCcu6_reg.h"
+#include "IfxCcu6_bf.h"
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Vadc_Std_Enum
+ * \{ */
+/** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
+ */
+typedef enum
+{
+ IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
+ IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
+ IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
+ IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
+} IfxVadc_AnalogConverterMode;
+
+/** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
+ */
+typedef enum
+{
+ IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
+ IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
+ IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
+ IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
+} IfxVadc_ArbitrationRounds;
+
+/** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
+ */
+typedef enum
+{
+ IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
+ IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
+ IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
+ IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
+ IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
+ IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
+ IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
+ IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
+ IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
+ IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
+ IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
+ IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
+ IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
+ IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
+ IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
+ IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
+} IfxVadc_BoundaryExtension;
+
+/** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
+ */
+typedef enum
+{
+ IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
+ IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
+ IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
+ IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
+} IfxVadc_BoundarySelection;
+
+/** \brief VADC Channels
+ */
+typedef enum
+{
+ IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
+ IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
+ IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
+ IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
+ IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
+ IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
+ IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
+ IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
+ IfxVadc_ChannelId_7 = 7, /**< \brief Channel 7 */
+ IfxVadc_ChannelId_8 = 8, /**< \brief Channel 8 */
+ IfxVadc_ChannelId_9 = 9, /**< \brief Channel 9 */
+ IfxVadc_ChannelId_10 = 10, /**< \brief Channel 10 */
+ IfxVadc_ChannelId_11 = 11, /**< \brief Channel 11 */
+ IfxVadc_ChannelId_12 = 12, /**< \brief Channel 12 */
+ IfxVadc_ChannelId_13 = 13, /**< \brief Channel 13 */
+ IfxVadc_ChannelId_14 = 14, /**< \brief Channel 14 */
+ IfxVadc_ChannelId_15 = 15 /**< \brief Channel 15 */
+} IfxVadc_ChannelId;
+
+/** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
+ */
+typedef enum
+{
+ IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
+ IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
+} IfxVadc_ChannelReference;
+
+/** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
+ */
+typedef enum
+{
+ IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
+ IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
+ IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
+ IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
+} IfxVadc_ChannelResolution;
+
+/** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
+ */
+typedef enum
+{
+ IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
+ IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
+ IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
+ IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
+ IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
+ IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
+ IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
+ IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
+ IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
+ IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
+ IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
+ IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
+ IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
+ IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
+ IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
+ IfxVadc_ChannelResult_15 /**< \brief Use Channel result 15 */
+} IfxVadc_ChannelResult;
+
+/** \brief External Multiplexer Channel Selection Style as defined in
+ * Ifx_VADC.G[x].EMUXCTR.B.EMXCSS
+ */
+typedef enum
+{
+ IfxVadc_ChannelSelectionStyle_channelNumber = 0, /**< \brief selects an arbitrary channel */
+ IfxVadc_ChannelSelectionStyle_binary = 1 /**< \brief Each bit of bitfield EMUXCH selects the
+ * associated channel for EMUX control */
+} IfxVadc_ChannelSelectionStyle;
+
+/** \brief type of conversion
+ */
+typedef enum
+{
+ IfxVadc_ConversionType_Compatible = 0 /**< \brief Compatible Timing Mode */
+} IfxVadc_ConversionType;
+
+/** \brief Specifies the External Coding scheme(binary/gray)
+ * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXCOD
+ */
+typedef enum
+{
+ IfxVadc_EmuxCodingScheme_binary = 0, /**< \brief Output the Channel Number in Binary code */
+ IfxVadc_EmuxCodingScheme_gray = 1 /**< \brief Output the channel number in gray code */
+} IfxVadc_EmuxCodingScheme;
+
+/** \brief Specifies the Emux interface
+ */
+typedef enum
+{
+ IfxVadc_EmuxInterface_0 = 0, /**< \brief Emux Interface 0 */
+ IfxVadc_EmuxInterface_1 = 1 /**< \brief Emux Interface 1 */
+} IfxVadc_EmuxInterface;
+
+/** \brief External Multiplexer sample time control
+ * defined in Ifx_VADC.G[x].EMUXCTR.B.EMXST
+ */
+typedef enum
+{
+ IfxVadc_EmuxSampleTimeControl_settingChanges = 0, /**< \brief Use STCE Whenever Setting Changes */
+ IfxVadc_EmuxSampleTimeControl_always = 1 /**< \brief Use STCE for each conversion of an external channel */
+} IfxVadc_EmuxSampleTimeControl;
+
+/** \brief specifies the External Channel Start select value
+ * defined in Ifx_VADC.G[x].EMUXCTR.B.EMUXSET
+ */
+typedef enum
+{
+ IfxVadc_EmuxSelectValue_0 = 0, /**< \brief Start Selection Value 0 */
+ IfxVadc_EmuxSelectValue_1, /**< \brief Start Selection Value 1 */
+ IfxVadc_EmuxSelectValue_2, /**< \brief Start Selection Value 2 */
+ IfxVadc_EmuxSelectValue_3, /**< \brief Start Selection Value 3 */
+ IfxVadc_EmuxSelectValue_4, /**< \brief Start Selection Value 4 */
+ IfxVadc_EmuxSelectValue_5, /**< \brief Start Selection Value 5 */
+ IfxVadc_EmuxSelectValue_6, /**< \brief Start Selection Value 6 */
+ IfxVadc_EmuxSelectValue_7 /**< \brief Start Selection Value 7 */
+} IfxVadc_EmuxSelectValue;
+
+/** \brief Specifies External Multiplexer Mode
+ * define in Ifx_VADC.G[x].EMUXCTR.B.EMUXMODE
+ */
+typedef enum
+{
+ IfxVadc_ExternalMultiplexerMode_softwareControl = 0, /**< \brief Disable The Emux Control */
+ IfxVadc_ExternalMultiplexerMode_steady = 1, /**< \brief select steady mode */
+ IfxVadc_ExternalMultiplexerMode_singleStep = 2, /**< \brief Select single step mode */
+ IfxVadc_ExternalMultiplexerMode_sequence = 3 /**< \brief Select Sequence Mode */
+} IfxVadc_ExternalMultiplexerMode;
+
+/** \brief FIFO mode enable
+ */
+typedef enum
+{
+ IfxVadc_FifoMode_seperateResultRegister = 0, /**< \brief seperate Result Register */
+ IfxVadc_FifoMode_fifoStructure = 1, /**< \brief fifoStructure */
+ IfxVadc_FifoMode_maximumMode = 2, /**< \brief copy new result if bigger */
+ IfxVadc_FifoMode_minimumMode = 3 /**< \brief copy new result if it is smaller */
+} IfxVadc_FifoMode;
+
+/** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
+ */
+typedef enum
+{
+ IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
+ IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
+ IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
+ IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
+} IfxVadc_GatingMode;
+
+/** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
+ */
+typedef enum
+{
+ IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
+ IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
+ IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
+ IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
+ IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
+ IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
+ IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
+ IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
+ IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
+ IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
+ IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
+ IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
+ IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
+ IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
+ IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
+ IfxVadc_GatingSource_15 /**< \brief Input signal REQGTx_15 */
+} IfxVadc_GatingSource;
+
+/** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
+ */
+typedef enum
+{
+ IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
+ IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
+ IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
+ IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
+} IfxVadc_InputClasses;
+
+/** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
+ */
+typedef enum
+{
+ IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
+ IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
+ IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
+ IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
+} IfxVadc_LimitCheck;
+
+/** \brief Low Power Supply Voltage Select
+ */
+typedef enum
+{
+ IfxVadc_LowSupplyVoltageSelect_5V = 0, /**< \brief 5V Power Supply is Connected */
+ IfxVadc_LowSupplyVoltageSelect_3V = 1 /**< \brief 3.3V Power Supply is Connected */
+} IfxVadc_LowSupplyVoltageSelect;
+
+/** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
+ */
+typedef enum
+{
+ IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
+ IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
+ IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
+ IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
+ IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
+ IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
+ IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
+ IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
+ IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
+ IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
+ IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
+ IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
+ IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
+ IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
+ IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
+ IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
+ IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
+ IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
+ IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
+ IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
+ IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+ IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
+} IfxVadc_Protection;
+
+/** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
+ */
+typedef enum
+{
+ IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
+ IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
+ IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
+ IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
+} IfxVadc_RequestSlotPriority;
+
+/** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
+ */
+typedef enum
+{
+ IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
+ IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
+} IfxVadc_RequestSlotStartMode;
+
+/** \brief Request sources
+ */
+typedef enum
+{
+ IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
+ IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
+ IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
+} IfxVadc_RequestSource;
+
+/** \brief Enable/disable the sensitivity of the module to sleep signal\n
+ * Definition in Ifx_VADC.CLC.B.EDIS
+ */
+typedef enum
+{
+ IfxVadc_SleepMode_enable = 0, /**< \brief enables sleep mode */
+ IfxVadc_SleepMode_disable = 1 /**< \brief disables sleep mode */
+} IfxVadc_SleepMode;
+
+/** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
+ */
+typedef enum
+{
+ IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
+ IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
+ IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
+ IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
+ IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
+ IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
+ IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
+ IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
+} IfxVadc_SrcNr;
+
+/** \brief API return values defined in
+ * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
+ * MODULE_VADC.BRSPND[x](x=0,1,...,11)
+ */
+typedef enum
+{
+ IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
+ IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
+ IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
+ IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
+ IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
+ IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
+ IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
+} IfxVadc_Status;
+
+/** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
+ */
+typedef enum
+{
+ IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
+ IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
+ IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
+ IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
+} IfxVadc_TriggerMode;
+
+/** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
+ */
+typedef enum
+{
+ IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
+ IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
+ IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
+ IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
+ IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
+ IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
+ IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
+ IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
+ IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
+ IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
+ IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
+ IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
+ IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
+ IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
+ IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
+ IfxVadc_TriggerSource_15 /**< \brief Input signal REQTRx_15 */
+} IfxVadc_TriggerSource;
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief access function to enable/disable wait for read mode for result registers
+ * \param group pointer to the VADC group
+ * \param resultIdx result register index
+ * \param waitForRead wait for read mode enabled/disabled
+ * \return None
+ */
+IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
+
+/** \brief access function to enable/disable wait for read mode for global result register
+ * \param vadc pointer to the VADC
+ * \param waitForRead wait for read mode enabled/disabled
+ * \return None
+ */
+IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
+
+/** \brief Enables the background sacn external trigger.
+ * \param vadc pointer to the base of VADC registers.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc);
+
+/** \brief Gets the background scan gating mode.
+ * \param vadc pointer to the base of VADC registers.
+ * \return background scan gating mode.
+ */
+IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc);
+
+/** \brief Gets the gating input selection.
+ * \param vadc pointer to the base of VADC registers.
+ * \return background scan gating input selection.
+ */
+IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc);
+
+/** \brief Gets the requested background scan slot priority.
+ * \param vadcG pointer to VADC group registers.
+ * \return requested background scan slot priority.
+ */
+IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the requested background scan slot start mode.
+ * \param vadcG pointer to VADC group registers.
+ * \return requested background scan slot start mode.
+ */
+IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the background scan trigger input.
+ * \param vadc pointer to the base of VADC registers.
+ * \return Gets the background scan external trigger source.
+ */
+IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc);
+
+/** \brief Gets the background scan external trigger mode.
+ * \param vadc pointer to the base of VADC registers.
+ * \return background scan external trigger mode.
+ */
+IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc);
+
+/** \brief get global input class resolution
+ * \param vadc Pointer to the VADC Group
+ * \param inputClassNum global input class number
+ * \return ADC input class channel resolution.
+ */
+IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum);
+
+/** \brief return conversion result stored in the Global result Register
+ * \param vadc pointer to the VADC module
+ * \return global result register
+ *
+ * \code
+ * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
+ * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * //confiure wait for read mode for global result register
+ * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
+ *
+ * // configure background scan
+ * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
+ *
+ * // enable auto scan
+ * IfxVadc_SetAutoBackgroundScan(vadc, TRUE);
+ *
+ * // start the background scan
+ * IfxVadc_startBackgroundScan(vadc);
+ *
+ * Ifx_VADC_GLOBRES result;
+ * result = IfxVadc_getGlobalResult (vadc);
+ *
+ * \endcode
+ *
+ */
+IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
+
+/** \brief get global input class sample time in sec
+ * \param vadc Pointer to the VADC Group Register space
+ * \param inputClassNum ADC input class number
+ * \param analogFrequency ADC module analog frequency in Hz.
+ * \return ADC input class channel sample time in sec.
+ */
+IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency);
+
+/** \brief Get conversion result for the group
+ * \param group pointer to the VADC group
+ * \param results pointer to scaled conversion results
+ * \param resultOffset offset for the first result
+ * \param numResults number of results
+ * \return None
+ *
+ * \code
+ * Ifx_VADC* vadc = &MODULE_VADC
+ * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * //confiure wait for read mode for global result register
+ * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
+ * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
+ *
+ * // configure scan
+ * IfxVadc_setScan(group, channels, mask);
+ *
+ * // enable auto scan
+ * IfxVadc_setAutoScan(group, TRUE);
+ *
+ * // start the scan
+ * IfxVadc_startScan(group);
+ *
+ * // wait for conversion to finish
+ *
+ * // fetch the 2 results of conversion for group 0
+ * Ifx_VADC_RES results[10];
+ * result = IfxVadc_getGroupResult(group, results, 0, 2);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
+
+/** \brief Get conversion result (Function does not care about the alignment)
+ * value = raw * gain + offset.
+ * \param group pointer to the VADC group
+ * \param resultIdx result register index
+ * \return scaled Conversion result
+ *
+ * \code
+ * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * //confiure wait for read mode for global result register
+ * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
+ * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
+ *
+ * // configure scan
+ * IfxVadc_setScan(group, channels, mask);
+ *
+ * // enable auto scan
+ * IfxVadc_setAutoScan(group, TRUE);
+ *
+ * // start the scan
+ * IfxVadc_startScan(group);
+ *
+ * // wait for conversion to finish
+ *
+ * // fetch the result of conversion from result register 0 for group 0
+ * Ifx_VADC_RES result;
+ * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
+ * \endcode
+ *
+ */
+IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
+
+/** \brief Returns the auto background scan status.
+ * \param vadc pointer to the base of VADC registers.
+ * \return TRUE if enabled otherwise FALSE.
+ */
+IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
+
+/** \brief Returns the background scan slot requested status.
+ * \param vadcG pointer to VADC group registers.
+ * \return background scan slot requested status.
+ */
+IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
+
+/** \brief Enables/Disables continuous background auto scan
+ * \param vadc pointer to the base of VADC registers.
+ * \param autoBackgroundScanEnable whether auto background scan enabled or not.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
+
+/** \brief configures a background scan; can also stop autoscan if all channels are 0
+ * \param vadc pointer to the VADC module registers
+ * \param groupId group index
+ * \param channels specifies the channels which should be enabled/disabled
+ * \param mask specifies the channels which should be modified
+ * \return None
+ *
+ * Background scan can be enabled/disabled for the given channels which are selected with the mask
+ *
+ * \code
+ * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
+ * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * //confiure wait for read mode for global result register
+ * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
+ *
+ * // configure background scan
+ * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
+ *
+ * // enable auto scan
+ * IfxVadc_setAutoBackgroundScan(vadc, TRUE);
+ *
+ * // start the background scan
+ * IfxVadc_startBackgroundScan(vadc);
+ * \endcode
+ *
+ */
+IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
+
+/** \brief Sets the background scan slot gating configurations.
+ * \param vadc pointer to the base of VADC registers.
+ * \param gatingSource gate input for group.
+ * \param gatingMode gating mode. High level, Low Level or Gating disabled.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
+
+/** \brief Sets the background scan exteranal trigger operating configurations.
+ * \param vadc pointer to the base of VADC registers.
+ * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
+ * \param triggerSource trigger input for group.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
+
+/** \brief Starts a background scan
+ * \param vadc pointer to the VADC module
+ * \return None
+ *
+ * \see IfxVadc_setBackgroundScan
+ *
+ */
+IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc);
+
+/** \brief Get debug conversion result
+ * \param group pointer to the VADC group
+ * \param resultIdx result register index
+ * \return Debug conversion result.
+ */
+IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gives the background scan status for a group
+ * \param vadc pointer to the VADC module
+ * \return IfxVadc_Status
+ */
+IFX_EXTERN IfxVadc_Status IfxVadc_getBackgroundScanStatus(Ifx_VADC *vadc);
+
+/** \brief Get conversion result (Function does not care about the alignment)
+ * value = raw * gain + offset.
+ * \param vadc VADC module pointer
+ * \param group pointer to the VADC group
+ * \param channel channel Id
+ * \param sourceType type of request source
+ * \return scaled Conversion result
+ *
+ * \code
+ * Ifx_VADC vadc;
+ * vadc.vadc = &MODULE_VADC;
+ * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * //confiure wait for read mode for global result register
+ * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
+ * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
+ *
+ * // configure scan
+ * IfxVadc_setScan(group, channels, mask);
+ *
+ * // start the scan
+ * IfxVadc_startScan(group);
+ *
+ * // wait for conversion to finish
+ *
+ * // fetch the result of conversion for channel 2 of group 0
+ * Ifx_VADC_RESresult2;
+ * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
+ * Ifx_VADC_RESresult5;
+ * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
+ * \endcode
+ *
+ */
+IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Std_ChannelScan
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Disables the scan slot external trigger.
+ * \param vadcG pointer to VADC group registers.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
+
+/** \brief Enables the scan slot external trigger.
+ * \param vadcG pointer to VADC group registers.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the request scan slot gating mode.
+ * \param vadcG pointer to VADC group registers.
+ * \return requested scan slot gating mode.
+ */
+IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the request scan slot gating input.
+ * \param vadcG pointer to VADC group registers.
+ * \return request scan slot gating input.
+ */
+IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the request scan slot priority.
+ * \param vadcG pointer to VADC group registers.
+ * \return request scan slot priority.
+ */
+IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the request scan slot start mode.
+ * \param vadcG pointer to VADC group registers.
+ * \return request scan slot start mode.
+ */
+IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the requested scan slot trigger input.
+ * \param vadcG pointer to VADC group registers.
+ * \return requested scan slot trigger input.
+ */
+IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the requested scan slot trigger mode.
+ * \param vadcG pointer to VADC group registers.
+ * \return requested scan slot trigger mode.
+ */
+IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG);
+
+/** \brief Gets the auto scan enable status.
+ * \param vadcG pointer to VADC group registers.
+ * \return TRUE if auto scan enabled otherwise FALSE.
+ */
+IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
+
+/** \brief Returns the scan slot requested status.
+ * \param vadcG pointer to VADC group registers.
+ * \return TRUE if scan slot request enabled otherwise FALSE.
+ */
+IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
+
+/** \brief Enables/Disables continuous auto scan
+ * \param vadcG pointer to VADC group registers.
+ * \param autoscanEnable whether autoscan is enabled or not.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
+
+/** \brief Sets the scan slot gating configuration.
+ * \param vadcG pointer to VADC group registers.
+ * \param gatingSource gate input for group.
+ * \param gatingMode gating mode. High level, Low Level or Gating disabled.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
+
+/** \brief Sets the scan slot trigger operating configurations.
+ * \param vadcG pointer to VADC group registers.
+ * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
+ * \param triggerSource trigger input for group.
+ * \return None
+ */
+IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
+
+/** \brief Starts an autoscan on the specified group
+ * \param group pointer to the VADC group
+ * \return None
+ *
+ * See \ref IfxVadc_setScan
+ *
+ */
+IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Gives the scan status for a group
+ * \param group pointer to the VADC group
+ * \return IfxVadc_Status
+ */
+IFX_EXTERN IfxVadc_Status IfxVadc_getScanStatus(Ifx_VADC_G *group);
+
+/** \brief Configures an (auto-)scan
+ * \param group pointer to the VADC group
+ * \param channels specifies the channels which should be enabled/disabled
+ * \param mask specifies the channels which should be modified
+ * \return None
+ *
+ * (Auto-)Scan can be enabled/disabled for the given channels which are selected with the mask
+ *
+ * \code
+ * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
+ * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
+ * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
+ *
+ * // configure scan
+ * IfxVadc_setScan(group, channels, mask);
+ *
+ * // enable Auto-Scan
+ * IfxVadc_setAutoScan(group, TRUE);
+ *
+ * // start the scan
+ * IfxVadc_startScan(group);
+ * \endcode
+ *
+ */
+IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask);
+
+/** \} */
+
+/** \addtogroup IfxLld_Vadc_Std_QueueRequest
+ * \{ */
+
+/******************************************************************************/
+/*-------------------------Inline Function Prototypes-------------------------*/
+/******************************************************************************/
+
+/** \brief Add an entry to the queue of a group for the specified channel with the following options set:
+ * refill incase of aborted conversion
+ * source interrupt enable/disable
+ * external trigger control of the aborted conversion
+ * \param group pointer to the VADC group
+ * \param channel specifies channel Id
+ * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
+ * \return None
+ *
+ * \code
+ *
+ * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
+ * IfxVadc_ChannelId channel = 1; // for channel 1
+ * // Add channel 1 to queue of group 0 with the refill turned on
+ * IfxVadc_addToQueue(qroup, channel, (1<QINR0.U = channel | options;
+}
+
+
+IFX_INLINE uint32 IfxVadc_calculateSampleTime(float32 analogFrequency, float32 sampleTime)
+{
+ uint32 ticks;
+
+ ticks = (uint32)(sampleTime * analogFrequency) - 2;
+
+ if (ticks > 31)
+ {
+ ticks = (ticks / 16) + 15;
+ }
+
+ ticks = __minu(ticks, 0xFFu);
+
+ return ticks;
+}
+
+
+IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG)
+{
+ vadcG->REFCLR.U = 0x0000FFFFu;
+}
+
+
+IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId)
+{
+ vadcG->CEFCLR.U = 1 << channelId;
+}
+
+
+IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
+{
+ vadcG->QMR0.B.FLUSH = flushQueue;
+}
+
+
+IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
+{
+ group->RCR[resultIdx].B.WFR = waitForRead;
+}
+
+
+IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead)
+{
+ vadc->GLOBRCR.B.WFR = waitForRead;
+}
+
+
+IFX_INLINE void IfxVadc_disableModule(Ifx_VADC *vadc)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ vadc->CLC.B.DISR = 1;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxVadc_disableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
+{
+ vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
+}
+
+
+IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
+{
+ vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
+}
+
+
+IFX_INLINE void IfxVadc_enableBackgroundScanSlotExternalTrigger(Ifx_VADC *vadc)
+{
+ vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
+}
+
+
+IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister, IfxVadc_FifoMode fifoMode)
+{
+ vadcG->RCR[resultRegister].B.FEN = fifoMode;
+}
+
+
+IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+
+ IfxScuWdt_clearCpuEndinit(passwd);
+ vadc->CLC.U = 0x00000000;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG)
+{
+ vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
+}
+
+
+IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG)
+{
+ vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
+}
+
+
+IFX_INLINE void IfxVadc_enableServiceRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
+{
+ vadcG->RCR[resultRegister].B.SRGEN = 1;
+}
+
+
+IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum)
+{
+ uint8 status;
+ status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
+ return status;
+}
+
+
+IFX_INLINE IfxVadc_ArbitrationRounds IfxVadc_getArbiterRoundLength(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
+}
+
+
+IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
+{
+ Ifx_VADC_G_CHASS assignChannels;
+ assignChannels.U = vadcG->CHASS.U;
+ return assignChannels;
+}
+
+
+IFX_INLINE IfxVadc_GatingMode IfxVadc_getBackgroundScanGatingMode(Ifx_VADC *vadc)
+{
+ return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
+}
+
+
+IFX_INLINE IfxVadc_GatingSource IfxVadc_getBackgroundScanGatingSource(Ifx_VADC *vadc)
+{
+ return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
+}
+
+
+IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getBackgroundScanSlotPriority(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
+}
+
+
+IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getBackgroundScanSlotStartMode(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
+}
+
+
+IFX_INLINE IfxVadc_TriggerSource IfxVadc_getBackgroundScanTriggerInput(Ifx_VADC *vadc)
+{
+ return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
+}
+
+
+IFX_INLINE IfxVadc_TriggerMode IfxVadc_getBackgroundScanTriggerMode(Ifx_VADC *vadc)
+{
+ return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
+}
+
+
+IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
+{
+ Ifx_VADC_CHCTR tempChctr;
+ tempChctr.U = vadcG->CHCTR[channelIndex].U;
+ return tempChctr;
+}
+
+
+IFX_INLINE IfxVadc_InputClasses IfxVadc_getChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
+{
+ return (IfxVadc_InputClasses)vadcG->CHCTR[channelIndex].B.ICLSEL;
+}
+
+
+IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
+{
+ Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
+ resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
+ return resultServiceRequestNodePtr0;
+}
+
+
+IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
+{
+ Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
+ resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
+ return resultServiceRequestNodePtr1;
+}
+
+
+IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer0(Ifx_VADC_G *vadcG)
+{
+ Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
+ serviceRequestNodePtr.U = vadcG->CEVNP0.U;
+ return serviceRequestNodePtr;
+}
+
+
+IFX_INLINE Ifx_VADC_G_CEVNP1 IfxVadc_getChannelServiceRequestNodePointer1(Ifx_VADC_G *vadcG)
+{
+ Ifx_VADC_G_CEVNP1 serviceRequestNodePtr;
+ serviceRequestNodePtr.U = vadcG->CEVNP1.U;
+ return serviceRequestNodePtr;
+}
+
+
+IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
+{
+ return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CME;
+}
+
+
+IFX_INLINE float32 IfxVadc_getEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
+{
+ return (float32)(IFXVADC_SAMPLETIME_MIN + vadc->GLOBICLASS[inputClassNum].B.STCE) / analogFrequency;
+}
+
+
+IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
+{
+ return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CME;
+}
+
+
+IFX_INLINE float32 IfxVadc_getEmuxGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
+{
+ return (float32)(IFXVADC_SAMPLETIME_MIN + vadcG->ICLASS[inputClassNum].B.STCE) / analogFrequency;
+}
+
+
+IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
+{
+ Ifx_VADC_GLOBCFG globCfg;
+ globCfg.U = vadc->GLOBCFG.U;
+ return globCfg;
+}
+
+
+IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum)
+{
+ return (IfxVadc_ChannelResolution)vadc->GLOBICLASS[inputClassNum].B.CMS;
+}
+
+
+IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
+{
+ Ifx_VADC_GLOBRES tmpGlobalResult;
+
+ tmpGlobalResult.U = vadc->GLOBRES.U;
+
+ return tmpGlobalResult;
+}
+
+
+IFX_INLINE float32 IfxVadc_getGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency)
+{
+ uint32 sampleTime = vadc->GLOBICLASS[inputClassNum].B.STCS;
+
+ if (sampleTime > 16)
+ {
+ sampleTime = (sampleTime - 15) * 16;
+ }
+
+ return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
+}
+
+
+IFX_INLINE IfxVadc_ChannelResolution IfxVadc_getGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum)
+{
+ return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
+}
+
+
+IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
+{
+ uint32 idx;
+
+ for (idx = 0; idx < numResults; idx++)
+ {
+ results[idx].U = group->RES[resultOffset + idx].U;
+ }
+}
+
+
+IFX_INLINE float32 IfxVadc_getGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
+{
+ uint32 sampleTime = vadcG->ICLASS[inputClassNum].B.STCS;
+
+ if (sampleTime > 16)
+ {
+ sampleTime = (sampleTime - 15) * 16;
+ }
+
+ return (float32)(IFXVADC_SAMPLETIME_MIN + sampleTime) / analogFrequency;
+}
+
+
+IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG)
+{
+ uint8 masterIndex = 0;
+ masterIndex = vadcG->SYNCTR.B.STSEL;
+ return masterIndex;
+}
+
+
+IFX_INLINE IfxVadc_GatingMode IfxVadc_getQueueSlotGatingMode(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
+}
+
+
+IFX_INLINE IfxVadc_GatingSource IfxVadc_getQueueSlotGatingSource(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
+}
+
+
+IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getQueueSlotPriority(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
+}
+
+
+IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getQueueSlotStartMode(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
+}
+
+
+IFX_INLINE IfxVadc_TriggerSource IfxVadc_getQueueSlotTriggerInput(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
+}
+
+
+IFX_INLINE IfxVadc_TriggerMode IfxVadc_getQueueSlotTriggerMode(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
+}
+
+
+IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
+{
+ Ifx_VADC_RES tmpResult;
+
+ tmpResult.U = group->RES[resultIdx].U;
+
+ return tmpResult;
+}
+
+
+IFX_INLINE IfxVadc_GatingMode IfxVadc_getScanSlotGatingMode(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
+}
+
+
+IFX_INLINE IfxVadc_GatingSource IfxVadc_getScanSlotGatingSource(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
+}
+
+
+IFX_INLINE IfxVadc_RequestSlotPriority IfxVadc_getScanSlotPriority(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
+}
+
+
+IFX_INLINE IfxVadc_RequestSlotStartMode IfxVadc_getScanSlotStartMode(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
+}
+
+
+IFX_INLINE IfxVadc_TriggerSource IfxVadc_getScanSlotTriggerInput(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
+}
+
+
+IFX_INLINE IfxVadc_TriggerMode IfxVadc_getScanSlotTriggerMode(Ifx_VADC_G *vadcG)
+{
+ return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
+}
+
+
+IFX_INLINE boolean IfxVadc_getStartupCalibration(Ifx_VADC *vadc)
+{
+ return (boolean)vadc->GLOBCFG.B.SUCAL;
+}
+
+
+IFX_INLINE void IfxVadc_initEmuxPin(const IfxVadc_Emux_Out *emux, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
+ IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE void IfxVadc_initGxBflPin(const IfxVadc_GxBfl_Out *gxBfl, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
+{
+ IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
+ IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
+}
+
+
+IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc)
+{
+ vadc->GLOBCFG.B.SUCAL = 1;
+}
+
+
+IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc)
+{
+ return (boolean)vadc->BRSMR.B.SCAN;
+}
+
+
+IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
+{
+ return (boolean)vadcG->ASMR.B.SCAN;
+}
+
+
+IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG)
+{
+ return (boolean)vadcG->ARBPR.B.ASEN2;
+}
+
+
+IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG)
+{
+ return (boolean)vadcG->ARBPR.B.ASEN0;
+}
+
+
+IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG)
+{
+ return (boolean)vadcG->ARBPR.B.ASEN1;
+}
+
+
+IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
+{
+ vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
+}
+
+
+IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
+{
+ vadcG->ARBCFG.B.ANONC = analogConverterMode;
+}
+
+
+IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength)
+{
+ vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
+}
+
+
+IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
+{
+ vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
+}
+
+
+IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
+{
+ vadcG->ASMR.B.SCAN = autoscanEnable;
+}
+
+
+IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
+{
+ vadcG->CHASS.U &= ~(1 << channelIndex);
+}
+
+
+IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
+{
+ vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
+}
+
+
+IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
+{
+ channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
+ vadc->BRSSEL[groupId].U = channels;
+}
+
+
+IFX_INLINE void IfxVadc_setBackgroundScanSlotGatingConfig(Ifx_VADC *vadc, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
+{
+ Ifx_VADC_BRSCTRL brsctrl;
+ brsctrl.U = vadc->BRSCTRL.U;
+ brsctrl.B.GTWC = 1;
+ brsctrl.B.GTSEL = gatingSource;
+ vadc->BRSCTRL.U = brsctrl.U;
+ vadc->BRSMR.B.ENGT = gatingMode;
+}
+
+
+IFX_INLINE void IfxVadc_setBackgroundScanSlotTriggerConfig(Ifx_VADC *vadc, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
+{
+ Ifx_VADC_BRSCTRL brsctrl;
+ brsctrl.U = vadc->BRSCTRL.U;
+ brsctrl.B.XTWC = 1;
+ brsctrl.B.XTMODE = triggerMode;
+ brsctrl.B.XTSEL = triggerSource;
+ vadc->BRSCTRL.U = brsctrl.U;
+}
+
+
+IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
+{
+ vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
+}
+
+
+IFX_INLINE void IfxVadc_setChannelEventNodePointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
+{
+ vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << (channel * 4));
+ vadcG->CEVNP0.U |= (channelSrcNr << (channel * 4));
+}
+
+
+IFX_INLINE void IfxVadc_setChannelEventNodePointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
+{
+ vadcG->CEVNP1.U &= ~(IFX_VADC_G_CEVNP1_CEV8NP_MSK << (channel * 4));
+ vadcG->CEVNP1.U |= (channelSrcNr << (channel * 4));
+}
+
+
+IFX_INLINE void IfxVadc_setChannelInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
+{
+ vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
+}
+
+
+IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
+{
+ vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
+}
+
+
+IFX_INLINE void IfxVadc_setEmuxGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
+{
+ vadc->GLOBICLASS[inputClassNum].B.CME = resolution;
+}
+
+
+IFX_INLINE void IfxVadc_setEmuxGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
+{
+ vadc->GLOBICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
+}
+
+
+IFX_INLINE void IfxVadc_setEmuxGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
+{
+ vadcG->ICLASS[inputClassNum].B.CME = resolution;
+}
+
+
+IFX_INLINE void IfxVadc_setEmuxGroupSampletime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
+{
+ vadcG->ICLASS[inputClassNum].B.STCE = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
+}
+
+
+IFX_INLINE void IfxVadc_setEmuxInterfaceForGroup(Ifx_VADC *vadc, IfxVadc_EmuxInterface emuxInterface, IfxVadc_GroupId group)
+{
+ if (emuxInterface == IfxVadc_EmuxInterface_0)
+ {
+ vadc->EMUXSEL.B.EMUXGRP0 = group;
+ }
+ else
+ {
+ vadc->EMUXSEL.B.EMUXGRP1 = group;
+ }
+}
+
+
+IFX_INLINE void IfxVadc_setGlobalResolution(Ifx_VADC *vadc, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
+{
+ vadc->GLOBICLASS[inputClassNum].B.CMS = resolution;
+}
+
+
+IFX_INLINE void IfxVadc_setGlobalSampleTime(Ifx_VADC *vadc, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
+{
+ vadc->GLOBICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
+}
+
+
+IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
+{
+ vadcG->CHASS.U |= (1 << channelIndex);
+}
+
+
+IFX_INLINE void IfxVadc_setGroupResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
+{
+ vadcG->ICLASS[inputClassNum].B.CMS = resolution;
+}
+
+
+IFX_INLINE void IfxVadc_setGroupSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
+{
+ vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTime(analogFrequency, sampleTime);
+}
+
+
+IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
+{
+ vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
+}
+
+
+IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
+{
+ vadcG->SYNCTR.B.STSEL = (masterIndex % 4);
+ vadcG->SYNCTR.U |= (0x00000008U << (masterIndex % 4));
+}
+
+
+IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
+{
+ Ifx_VADC_G_QCTRL0 qctrl0;
+ qctrl0.U = vadcG->QCTRL0.U;
+ qctrl0.B.GTWC = 1;
+ qctrl0.B.GTSEL = gatingSource;
+ vadcG->QCTRL0.U = qctrl0.U;
+ vadcG->QMR0.B.ENGT = gatingMode;
+}
+
+
+IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
+{
+ Ifx_VADC_G_QCTRL0 qctrl0;
+ qctrl0.U = vadcG->QCTRL0.U;
+ qctrl0.B.XTWC = 1;
+ qctrl0.B.XTMODE = triggerMode;
+ qctrl0.B.XTSEL = triggerSource;
+ vadcG->QCTRL0.U = qctrl0.U;
+}
+
+
+IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
+{
+ vadcG->CHCTR[channelIndex].B.REFSEL = reference;
+}
+
+
+IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
+{
+ vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
+ vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
+}
+
+
+IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
+{
+ vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
+ vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
+}
+
+
+IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
+{
+ vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
+}
+
+
+IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode)
+{
+ Ifx_VADC_G_ASCTRL asctrl;
+ asctrl.U = vadcG->ASCTRL.U;
+ asctrl.B.GTWC = 1;
+ asctrl.B.GTSEL = gatingSource;
+ vadcG->ASCTRL.U = asctrl.U;
+ vadcG->ASMR.B.ENGT = gatingMode;
+}
+
+
+IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource)
+{
+ Ifx_VADC_G_ASCTRL asctrl;
+ asctrl.U = vadcG->ASCTRL.U;
+ asctrl.B.XTWC = 1;
+ asctrl.B.XTMODE = triggerMode;
+ asctrl.B.XTSEL = triggerSource;
+ vadcG->ASCTRL.U = asctrl.U;
+}
+
+
+IFX_INLINE void IfxVadc_setSleepMode(Ifx_VADC *vadc, IfxVadc_SleepMode mode)
+{
+ uint16 passwd = IfxScuWdt_getCpuWatchdogPassword();
+ IfxScuWdt_clearCpuEndinit(passwd);
+ vadc->CLC.B.EDIS = mode;
+ IfxScuWdt_setCpuEndinit(passwd);
+}
+
+
+IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
+{
+ vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
+}
+
+
+IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
+{
+ vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
+}
+
+
+IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc)
+{
+ vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
+}
+
+
+IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
+{
+ group->QMR0.B.TREV = 1;
+}
+
+
+IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
+{
+ group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
+}
+
+
+IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
+{
+ vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
+}
+
+
+IFX_INLINE Ifx_VADC_RESD IfxVadc_getDebugResult(Ifx_VADC_G *group, uint32 resultIdx)
+{
+ Ifx_VADC_RESD tmpResult;
+
+ tmpResult.U = group->RESD[resultIdx].U;
+
+ return tmpResult;
+}
+
+
+#endif /* IFXVADC_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxAsclin.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxAsclin.xml
new file mode 100644
index 0000000..1188bfa
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxAsclin.xml
@@ -0,0 +1,18 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ _Impl/IfxAsclin_cfg.c
+ Asclin/Std/IfxAsclin.c
+ Asclin/Asc/IfxAsclin_Asc.c
+ Asclin/Lin/IfxAsclin_Lin.c
+ Asclin/Spi/IfxAsclin_Spi.c
+ _PinMap/IfxAsclin_PinMap.c
+ _Lib/DataHandling/Ifx_Fifo.c
+ _Lib/DataHandling/Ifx_CircularBuffer.c
+ _Lib/DataHandling/Ifx_CircularBuffer.asm.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCcu6.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCcu6.xml
new file mode 100644
index 0000000..87bc7c6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCcu6.xml
@@ -0,0 +1,16 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Ccu6/Icu/IfxCcu6_Icu.c
+ Ccu6/PwmBc/IfxCcu6_PwmBc.c
+ Ccu6/Std/IfxCcu6.c
+ Ccu6/TPwm/IfxCcu6_TPwm.c
+ Ccu6/Timer/IfxCcu6_Timer.c
+ _PinMap/IfxCcu6_PinMap.c
+ _Impl/IfxCcu6_cfg.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCif.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCif.xml
new file mode 100644
index 0000000..2891434
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCif.xml
@@ -0,0 +1,16 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Cif/Std/IfxCif.c
+ Cif/Cam/IfxCif_Cam.c
+ Emem/Std/IfxEmem.c
+ _PinMap/IfxCif_PinMap.c
+ _PinMap/IfxI2c_PinMap.c
+ I2c/Std/IfxI2c.c
+ I2c/I2c/IfxI2c_I2c.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCpu.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCpu.xml
new file mode 100644
index 0000000..745b6c8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxCpu.xml
@@ -0,0 +1,9 @@
+
+
+
+
+ Cpu/Std/IfxCpu.c
+ Cpu/Irq/IfxCpu_Irq.c
+ Cpu/Trap/IfxCpu_Trap.c
+ _Impl/IfxCpu_cfg.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDma.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDma.xml
new file mode 100644
index 0000000..c9d6a12
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDma.xml
@@ -0,0 +1,8 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Dma/Dma/IfxDma_Dma.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDsadc.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDsadc.xml
new file mode 100644
index 0000000..532ef7d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDsadc.xml
@@ -0,0 +1,13 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Dsadc/Std/IfxDsadc.c
+ Dsadc/Dsadc/IfxDsadc_Dsadc.c
+ Dsadc/Rdc/IfxDsadc_Rdc.c
+ _PinMap/IfxDsadc_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDts.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDts.xml
new file mode 100644
index 0000000..25aab9b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxDts.xml
@@ -0,0 +1,11 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Dts/Std/IfxDts.c
+ Dts/Dts/IfxDts_Dts.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEmem.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEmem.xml
new file mode 100644
index 0000000..136a19a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEmem.xml
@@ -0,0 +1,9 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Emem/Std/IfxEmem.c
+ _Impl/IfxEmem_cfg.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEray.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEray.xml
new file mode 100644
index 0000000..123fe64
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEray.xml
@@ -0,0 +1,15 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Eray/Std/IfxEray.c
+ Eray/Eray/IfxEray_Eray.c
+ _PinMap/IfxEray_PinMap.c
+ Mtu/Std/IfxMtu.c
+ _Impl/IfxMtu_cfg.c
+ _Impl/IfxEray_cfg.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEth.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEth.xml
new file mode 100644
index 0000000..bc5df7f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxEth.xml
@@ -0,0 +1,12 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Eth/Std/IfxEth.c
+ Eth/Phy_Pef7071/IfxEth_Phy_Pef7071.c
+ _PinMap/IfxEth_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFce.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFce.xml
new file mode 100644
index 0000000..70befbd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFce.xml
@@ -0,0 +1,11 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Fce/Std/IfxFce.c
+ Fce/Crc/IfxFce_Crc.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFft.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFft.xml
new file mode 100644
index 0000000..6b2d517
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFft.xml
@@ -0,0 +1,12 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Fft/Std/IfxFft.c
+ Fft/Fft/IfxFft_Fft.c
+ Dma/Dma/IfxDma_Dma.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFlash.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFlash.xml
new file mode 100644
index 0000000..0207e80
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxFlash.xml
@@ -0,0 +1,9 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Flash/Std/IfxFlash.c
+ _Impl/IfxFlash_cfg.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxGpt12.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxGpt12.xml
new file mode 100644
index 0000000..828307b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxGpt12.xml
@@ -0,0 +1,12 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Gpt12/Std/IfxGpt12.c
+ Gpt12/IncrEnc/IfxGpt12_IncrEnc.c
+ _PinMap/IfxGpt12_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxGtm.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxGtm.xml
new file mode 100644
index 0000000..1803132
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxGtm.xml
@@ -0,0 +1,27 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Gtm/Tom/Timer/IfxGtm_Tom_Timer.c
+ Gtm/Tom/Pwm/IfxGtm_Tom_Pwm.c
+ Gtm/Tom/PwmHl/IfxGtm_Tom_PwmHl.c
+ Gtm/Std/IfxGtm.c
+ Gtm/Std/IfxGtm_Atom.c
+ Gtm/Std/IfxGtm_Tim.c
+ Gtm/Std/IfxGtm_Cmu.c
+ Gtm/Std/IfxGtm_Dpll.c
+ Gtm/Std/IfxGtm_Tbu.c
+ Gtm/Std/IfxGtm_Tom.c
+ Gtm/Atom/Timer/IfxGtm_Atom_Timer.c
+ Gtm/Atom/Pwm/IfxGtm_Atom_Pwm.c
+ Gtm/Atom/PwmHl/IfxGtm_Atom_PwmHl.c
+ Gtm/Tim/In/IfxGtm_Tim_In.c
+ Gtm/Trig/IfxGtm_Trig.c
+ _PinMap/IfxGtm_PinMap.c
+ StdIf/IfxStdIf_PwmHl.c
+ StdIf/IfxStdIf_Timer.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxHssl.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxHssl.xml
new file mode 100644
index 0000000..58f80ed
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxHssl.xml
@@ -0,0 +1,12 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ _Impl/IfxHssl_cfg.c
+ Hssl/Std/IfxHssl.c
+ Hssl/Hssl/IfxHssl_Hssl.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxI2c.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxI2c.xml
new file mode 100644
index 0000000..75da736
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxI2c.xml
@@ -0,0 +1,13 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ _Impl/IfxI2c_cfg.c
+ _PinMap/IfxI2c_PinMap.c
+ I2c/Std/IfxI2c.c
+ I2c/I2c/IfxI2c_I2c.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxIom.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxIom.xml
new file mode 100644
index 0000000..00a3ef3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxIom.xml
@@ -0,0 +1,10 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Iom/Std/IfxIom.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMsc.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMsc.xml
new file mode 100644
index 0000000..1a64fe3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMsc.xml
@@ -0,0 +1,14 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Msc/Std/IfxMsc.c
+ Msc/Msc/IfxMsc_Msc.c
+ _Impl/IfxMsc_cfg.c
+ _PinMap/IfxMsc_PinMap.c
+
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMtu.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMtu.xml
new file mode 100644
index 0000000..021ccf3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMtu.xml
@@ -0,0 +1,10 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Mtu/Std/IfxMtu.c
+ _Impl/IfxMtu_cfg.c
+
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMultican.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMultican.xml
new file mode 100644
index 0000000..6ff717e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxMultican.xml
@@ -0,0 +1,13 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Multican/Std/IfxMultican.c
+ Multican/Can/IfxMultican_Can.c
+ _Impl/IfxMultican_cfg.c
+ _PinMap/IfxMultican_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPort.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPort.xml
new file mode 100644
index 0000000..82addf3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPort.xml
@@ -0,0 +1,11 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ Port/Io/IfxPort_Io.c
+ _Impl/IfxPort_cfg.c
+ _PinMap/IfxPort_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPsi5.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPsi5.xml
new file mode 100644
index 0000000..6d35679
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPsi5.xml
@@ -0,0 +1,11 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Psi5/Psi5/IfxPsi5_Psi5.c
+ _PinMap/IfxPsi5_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPsi5s.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPsi5s.xml
new file mode 100644
index 0000000..5d7a02a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxPsi5s.xml
@@ -0,0 +1,11 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Psi5s/Psi5s/IfxPsi5s_Psi5s.c
+ Psi5s/Std/IfxPsi5s.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxQspi.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxQspi.xml
new file mode 100644
index 0000000..35de82b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxQspi.xml
@@ -0,0 +1,17 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ _Impl/IfxQspi_cfg.c
+ Qspi/Std/IfxQspi.c
+ Qspi/SpiMaster/IfxQspi_SpiMaster.c
+ Qspi/SpiSlave/IfxQspi_SpiSlave.c
+ _PinMap/IfxQspi_PinMap.c
+ Dma/Dma/IfxDma_Dma.c
+ Cpu/Irq/IfxCpu_Irq.c
+ If/SpiIf.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxScu.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxScu.xml
new file mode 100644
index 0000000..960f7c6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxScu.xml
@@ -0,0 +1,11 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Scu/Std/IfxScuEru.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ _PinMap/IfxScu_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSent.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSent.xml
new file mode 100644
index 0000000..7a1469f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSent.xml
@@ -0,0 +1,13 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ _Impl/IfxSent_cfg.c
+ Sent/Std/IfxSent.c
+ Sent/Sent/IfxSent_Sent.c
+ _PinMap/IfxSent_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSmu.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSmu.xml
new file mode 100644
index 0000000..e385fe6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSmu.xml
@@ -0,0 +1,10 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Smu/Std/IfxSmu.c
+ _Impl/IfxSmu_cfg.c
+ _PinMap/IfxSmu_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSrc.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSrc.xml
new file mode 100644
index 0000000..12ffae3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxSrc.xml
@@ -0,0 +1,6 @@
+
+
+
+
+ Src/Std/IfxSrc.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxStm.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxStm.xml
new file mode 100644
index 0000000..dfb1c91
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxStm.xml
@@ -0,0 +1,10 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Stm/Std/IfxStm.c
+ Stm/Timer/IfxStm_Timer.c
+ _Impl/IfxStm_cfg.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxVadc.xml b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxVadc.xml
new file mode 100644
index 0000000..46a08fd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build/IfxVadc.xml
@@ -0,0 +1,13 @@
+
+
+
+
+ Scu/Std/IfxScuCcu.c
+ Scu/Std/IfxScuWdt.c
+ Port/Std/IfxPort.c
+ _Impl/IfxPort_cfg.c
+ Vadc/Std/IfxVadc.c
+ Vadc/Adc/IfxVadc_Adc.c
+ _Impl/IfxVadc_cfg.c
+ _PinMap/IfxVadc_PinMap.c
+
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxAsclin_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxAsclin_cfg.c
new file mode 100644
index 0000000..94b0d9c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxAsclin_cfg.c
@@ -0,0 +1,60 @@
+/**
+ * \file IfxAsclin_cfg.c
+ * \brief ASCLIN on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxAsclin_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES] = {
+ {&MODULE_ASCLIN0, (uint32)IfxAsclin_Index_0},
+ {&MODULE_ASCLIN1, (uint32)IfxAsclin_Index_1},
+ {&MODULE_ASCLIN2, (uint32)IfxAsclin_Index_2},
+ {&MODULE_ASCLIN3, (uint32)IfxAsclin_Index_3}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxAsclin_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxAsclin_cfg.h
new file mode 100644
index 0000000..822de04
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxAsclin_cfg.h
@@ -0,0 +1,95 @@
+/**
+ * \file IfxAsclin_cfg.h
+ * \brief ASCLIN on-chip implementation data
+ * \ingroup IfxLld_Asclin
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Asclin ASCLIN
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Asclin_Impl Implementation
+ * \ingroup IfxLld_Asclin
+ * \defgroup IfxLld_Asclin_Std Standard Driver
+ * \ingroup IfxLld_Asclin
+ * \defgroup IfxLld_Asclin_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Asclin_Impl
+ */
+
+#ifndef IFXASCLIN_CFG_H
+#define IFXASCLIN_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxAsclin_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXASCLIN_NUM_MODULES (4)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Asclin_Impl_Enumerations
+ * \{ */
+/** \brief List of the available Asclin resources
+ */
+typedef enum
+{
+ IfxAsclin_Index_none = -1, /**< \brief Not Selected */
+ IfxAsclin_Index_0 = 0, /**< \brief ASCLIN Index 0 */
+ IfxAsclin_Index_1, /**< \brief ASCLIN Index 1 */
+ IfxAsclin_Index_2, /**< \brief ASCLIN Index 2 */
+ IfxAsclin_Index_3 /**< \brief ASCLIN Index 3 */
+} IfxAsclin_Index;
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxAsclin_cfg_indexMap[IFXASCLIN_NUM_MODULES];
+
+#endif /* IFXASCLIN_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCcu6_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCcu6_cfg.c
new file mode 100644
index 0000000..fa8693a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCcu6_cfg.c
@@ -0,0 +1,64 @@
+/**
+ * \file IfxCcu6_cfg.c
+ * \brief CCU6 on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxCcu6_cfg.h"
+
+/******************************************************************************/
+/*----------------------------------Macros------------------------------------*/
+/******************************************************************************/
+
+#define IFXCCU6_EMPTY_OUTPUT_SLOT (0, 0, IfxPort_OutputIdx_alt7)
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES] = {
+ {&MODULE_CCU60, IfxCcu6_Index_0},
+ {&MODULE_CCU61, IfxCcu6_Index_1}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCcu6_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCcu6_cfg.h
new file mode 100644
index 0000000..0e07902
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCcu6_cfg.h
@@ -0,0 +1,113 @@
+/**
+ * \file IfxCcu6_cfg.h
+ * \brief CCU6 on-chip implementation data
+ * \ingroup IfxLld_Ccu6
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Ccu6 CCU6
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Ccu6_Impl Implementation
+ * \ingroup IfxLld_Ccu6
+ * \defgroup IfxLld_Ccu6_Std Standard Driver
+ * \ingroup IfxLld_Ccu6
+ * \defgroup IfxLld_Ccu6_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Ccu6_Impl
+ */
+
+#ifndef IFXCCU6_CFG_H
+#define IFXCCU6_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxCcu6_reg.h"
+#include "IfxCcu6_bf.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXCCU6_NUM_MODULES (2)
+
+#define IFXCCU6_NUM_SERVICE_REQUESTS (4)
+
+#define IFXCCU6_NUM_T12_CHANNELS (3)
+
+#define IFXCCU6_NUM_T13_CHANNELS (1)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief List of the available CCU6 resources
+ */
+typedef enum
+{
+ IfxCcu6_Index_none = -1, /**< \brief Not Selected */
+ IfxCcu6_Index_0 = 0, /**< \brief CCU6 index 0 */
+ IfxCcu6_Index_1 /**< \brief CCU6 index 1 */
+} IfxCcu6_Index;
+
+typedef enum
+{
+ IfxCcu6_TrigOut_0 = IFX_CCU6_MOSEL_TRIG0SEL_OFF, /**< \brief Output Trigger Select for CCU6061 TRIG0 */
+ IfxCcu6_TrigOut_1 = IFX_CCU6_MOSEL_TRIG1SEL_OFF, /**< \brief Output Trigger Select for CCU6061 TRIG1 */
+ IfxCcu6_TrigOut_2 = IFX_CCU6_MOSEL_TRIG2SEL_OFF /**< \brief Output Trigger Select for CCU6061 TRIG2 */
+} IfxCcu6_TrigOut;
+
+typedef enum
+{
+ IfxCcu6_TrigSel_cout63 = 0,
+ IfxCcu6_TrigSel_cc60 = 1,
+ IfxCcu6_TrigSel_cc61 = 1,
+ IfxCcu6_TrigSel_cc62 = 1,
+ IfxCcu6_TrigSel_sr1 = 2,
+ IfxCcu6_TrigSel_sr3 = 3
+} IfxCcu6_TrigSel;
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCcu6_cfg_indexMap[IFXCCU6_NUM_MODULES];
+
+#endif /* IFXCCU6_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCif_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCif_cfg.c
new file mode 100644
index 0000000..4b226c7
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCif_cfg.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxCif_cfg.c
+ * \brief CIF on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxCif_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCif_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCif_cfg.h
new file mode 100644
index 0000000..123606a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCif_cfg.h
@@ -0,0 +1,79 @@
+/**
+ * \file IfxCif_cfg.h
+ * \brief CIF on-chip implementation data
+ * \ingroup IfxLld_Cif
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cif CIF
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Cif_Impl Implementation
+ * \ingroup IfxLld_Cif
+ * \defgroup IfxLld_Cif_Std Standard Driver
+ * \ingroup IfxLld_Cif
+ */
+
+#ifndef IFXCIF_CFG_H
+#define IFXCIF_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#ifndef IFXCIF_DEBUG
+#define IFXCIF_DEBUG __debug()
+#endif
+
+/** \brief Number of extra phats
+ */
+#define IFXCIF_EXTRA_PATHS (5)
+
+#ifndef IFXCIF_MAX_I2CNAK
+#define IFXCIF_MAX_I2CNAK (16)
+#endif
+
+#define IFXCIF_NUM_MODULES (1)
+
+#endif /* IFXCIF_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCpu_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCpu_cfg.c
new file mode 100644
index 0000000..5ece2a5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCpu_cfg.c
@@ -0,0 +1,58 @@
+/**
+ * \file IfxCpu_cfg.c
+ * \brief CPU on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxCpu_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES] = {
+ {&MODULE_CPU0, (uint32)IfxCpu_ResourceCpu_0},
+ {&MODULE_CPU1, (uint32)IfxCpu_ResourceCpu_1}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCpu_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCpu_cfg.h
new file mode 100644
index 0000000..494b0da
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxCpu_cfg.h
@@ -0,0 +1,169 @@
+/**
+ * \file IfxCpu_cfg.h
+ * \brief CPU on-chip implementation data
+ * \ingroup IfxLld_Cpu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cpu CPU
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Cpu_Impl Implementation
+ * \ingroup IfxLld_Cpu
+ * \defgroup IfxLld_Cpu_Std Standard Driver
+ * \ingroup IfxLld_Cpu
+ */
+
+#ifndef IFXCPU_CFG_H
+#define IFXCPU_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxCpu_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief CPU count
+ */
+#define IFXCPU_NUM_MODULES (2)
+
+/** \brief Segment number of cachable flash region
+ */
+#define IFXCPU_CACHABLE_FLASH_SEGMENT (8)
+
+/** \brief Segment number of cachable LMU region
+ */
+#define IFXCPU_CACHABLE_LMU_SEGMENT (9)
+
+/** \brief All cores (coreIDs) mask. This macro can be defined by the user according to the number of core being enabled.
+ * So that can be used for syncronisation among multiple cores. In case user didn't define this macro, by default this
+ * mask will be generated for all the available cores of the device.
+ * e.g:
+ * 1. Check for synchronisation between core 0 and core 5
+ * # define 0x41U
+ * 2. Check for synchronisation between core 0 to core 5
+ * # define 0x5FU
+ *
+ * Note:
+ * Core id values read from CORE_ID register will be as shown below. The value
+ * indicates the position of the bit needs to be set while building the macro.
+ * Core 0: 0
+ * Core 1: 1
+ * Core 2: 2
+ * Core 3: 3
+ * Core 4: 4
+ * Core 5: 6
+ */
+#ifndef IFXCPU_CFG_ALLCORE_DONE
+#define IFXCPU_CFG_ALLCORE_DONE (0x3)
+#endif
+
+/** \brief
+ */
+#ifndef IFXCPU_ALLCORE_DONE
+#define IFXCPU_ALLCORE_DONE IFXCPU_CFG_ALLCORE_DONE
+#else
+#ifdef __TASKING__
+# pragma message("IFXCPU_ALLCORE_DONE macro is going to be deprecated. Use IFXCPU_CFG_ALLCORE_DONE instead.")
+#else
+# warning IFXCPU_ALLCORE_DONE macro is going to be deprecated. Use IFXCPU_CFG_ALLCORE_DONE instead.
+#endif
+#endif
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief Halt status
+ */
+typedef enum
+{
+ IfxCpu_DBGST_HALT_run = 0,
+ IfxCpu_DBGST_HALT_halt = 1
+} IfxCpu_DBGST_HALT;
+
+/** \brief List of the available CPU ids
+ */
+typedef enum
+{
+ IfxCpu_Id_0 = 0, /**< \brief CPU 0 */
+ IfxCpu_Id_1 = 1, /**< \brief CPU 1 */
+ IfxCpu_Id_none /**< \brief None of the CPU */
+} IfxCpu_Id;
+
+/** \brief List of the available CPU resources
+ */
+typedef enum
+{
+ IfxCpu_Index_0 = 0, /**< \brief CPU 0 */
+ IfxCpu_Index_1 = 1, /**< \brief CPU 1 */
+ IfxCpu_Index_none /**< \brief None of the CPU */
+} IfxCpu_Index;
+
+/** \brief Power management status
+ */
+typedef enum
+{
+ IfxCpu_PMCSR_PMST_normalMode = 1,
+ IfxCpu_PMCSR_PMST_idleModeRequest = 2,
+ IfxCpu_PMCSR_PMST_idleMode = 3,
+ IfxCpu_PMCSR_PMST_sleepModeRequest = 4,
+ IfxCpu_PMCSR_PMST_standbyModeRequest = 6
+} IfxCpu_PMCSR_PMST;
+
+/** \brief List of the available CPU resources
+ */
+typedef enum
+{
+ IfxCpu_ResourceCpu_0 = IfxCpu_Index_0, /**< \brief CPU 0 */
+ IfxCpu_ResourceCpu_1 = IfxCpu_Index_1, /**< \brief CPU 1 */
+ IfxCpu_ResourceCpu_none = IfxCpu_Index_none /**< \brief None of the CPU */
+} IfxCpu_ResourceCpu;
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxCpu_cfg_indexMap[IFXCPU_NUM_MODULES];
+
+#endif /* IFXCPU_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDma_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDma_cfg.c
new file mode 100644
index 0000000..cb98119
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDma_cfg.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxDma_cfg.c
+ * \brief DMA on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxDma_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDma_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDma_cfg.h
new file mode 100644
index 0000000..5f3da0d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDma_cfg.h
@@ -0,0 +1,158 @@
+/**
+ * \file IfxDma_cfg.h
+ * \brief DMA on-chip implementation data
+ * \ingroup IfxLld_Dma
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dma DMA
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Dma_Impl Implementation
+ * \ingroup IfxLld_Dma
+ * \defgroup IfxLld_Dma_Std Standard Driver
+ * \ingroup IfxLld_Dma
+ */
+
+#ifndef IFXDMA_CFG_H
+#define IFXDMA_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Number of channels
+ */
+#define IFXDMA_NUM_CHANNELS 48
+
+/** \brief Error mask for move engine source error
+ */
+#define IFXDMA_ERROR_S (IFX_DMA_BLK_CLRE_CSER_MSK << IFX_DMA_BLK_CLRE_CSER_OFF)
+
+/** \brief Error mask for move engine destination error
+ */
+#define IFXDMA_ERROR_D (IFX_DMA_BLK_CLRE_CDER_MSK << IFX_DMA_BLK_CLRE_CDER_OFF)
+
+/** \brief Error mask for bus error on SPB
+ */
+#define IFXDMA_ERROR_SPB (IFX_DMA_BLK_CLRE_CSPBER_MSK << IFX_DMA_BLK_CLRE_CSPBER_OFF)
+
+/** \brief Error mask for bus error on SRI
+ */
+#define IFXDMA_ERROR_SRI (IFX_DMA_BLK_CLRE_CSRIER_MSK << IFX_DMA_BLK_CLRE_CSRIER_OFF)
+
+/** \brief Error mask for RAM error
+ */
+#define IFXDMA_ERROR_RAM (IFX_DMA_BLK_CLRE_CRAMER_MSK << IFX_DMA_BLK_CLRE_CRAMER_OFF)
+
+/** \brief Error mask for SLL (safe linked list CRC checksum) error
+ */
+#define IFXDMA_ERROR_SLL (IFX_DMA_BLK_CLRE_CSLLER_MSK << IFX_DMA_BLK_CLRE_CSLLER_OFF)
+
+/** \brief Error mask for DLL (failed linked list load) error
+ */
+#define IFXDMA_ERROR_DLL (IFX_DMA_BLK_CLRE_CDLLER_MSK << IFX_DMA_BLK_CLRE_CDLLER_OFF)
+
+#define IFXDMA_NUM_MODULES (1)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief DMA channel resources definition
+ */
+typedef enum
+{
+ IfxDma_ChannelId_none = -1, /**< \brief None of the Ifx_DMA Channels */
+ IfxDma_ChannelId_0 = 0, /**< \brief Ifx_DMA Channel 0 */
+ IfxDma_ChannelId_1, /**< \brief Ifx_DMA Channel 1 */
+ IfxDma_ChannelId_2, /**< \brief Ifx_DMA Channel 2 */
+ IfxDma_ChannelId_3, /**< \brief Ifx_DMA Channel 3 */
+ IfxDma_ChannelId_4, /**< \brief Ifx_DMA Channel 4 */
+ IfxDma_ChannelId_5, /**< \brief Ifx_DMA Channel 5 */
+ IfxDma_ChannelId_6, /**< \brief Ifx_DMA Channel 6 */
+ IfxDma_ChannelId_7, /**< \brief Ifx_DMA Channel 7 */
+ IfxDma_ChannelId_8, /**< \brief Ifx_DMA Channel 8 */
+ IfxDma_ChannelId_9, /**< \brief Ifx_DMA Channel 9 */
+ IfxDma_ChannelId_10, /**< \brief Ifx_DMA Channel 10 */
+ IfxDma_ChannelId_11, /**< \brief Ifx_DMA Channel 11 */
+ IfxDma_ChannelId_12, /**< \brief Ifx_DMA Channel 12 */
+ IfxDma_ChannelId_13, /**< \brief Ifx_DMA Channel 13 */
+ IfxDma_ChannelId_14, /**< \brief Ifx_DMA Channel 14 */
+ IfxDma_ChannelId_15, /**< \brief Ifx_DMA Channel 15 */
+ IfxDma_ChannelId_16, /**< \brief Ifx_DMA Channel 16 */
+ IfxDma_ChannelId_17, /**< \brief Ifx_DMA Channel 17 */
+ IfxDma_ChannelId_18, /**< \brief Ifx_DMA Channel 18 */
+ IfxDma_ChannelId_19, /**< \brief Ifx_DMA Channel 19 */
+ IfxDma_ChannelId_20, /**< \brief Ifx_DMA Channel 20 */
+ IfxDma_ChannelId_21, /**< \brief Ifx_DMA Channel 21 */
+ IfxDma_ChannelId_22, /**< \brief Ifx_DMA Channel 22 */
+ IfxDma_ChannelId_23, /**< \brief Ifx_DMA Channel 23 */
+ IfxDma_ChannelId_24, /**< \brief Ifx_DMA Channel 24 */
+ IfxDma_ChannelId_25, /**< \brief Ifx_DMA Channel 25 */
+ IfxDma_ChannelId_26, /**< \brief Ifx_DMA Channel 26 */
+ IfxDma_ChannelId_27, /**< \brief Ifx_DMA Channel 27 */
+ IfxDma_ChannelId_28, /**< \brief Ifx_DMA Channel 28 */
+ IfxDma_ChannelId_29, /**< \brief Ifx_DMA Channel 29 */
+ IfxDma_ChannelId_30, /**< \brief Ifx_DMA Channel 30 */
+ IfxDma_ChannelId_31, /**< \brief Ifx_DMA Channel 31 */
+ IfxDma_ChannelId_32, /**< \brief Ifx_DMA Channel 32 */
+ IfxDma_ChannelId_33, /**< \brief Ifx_DMA Channel 33 */
+ IfxDma_ChannelId_34, /**< \brief Ifx_DMA Channel 34 */
+ IfxDma_ChannelId_35, /**< \brief Ifx_DMA Channel 35 */
+ IfxDma_ChannelId_36, /**< \brief Ifx_DMA Channel 36 */
+ IfxDma_ChannelId_37, /**< \brief Ifx_DMA Channel 37 */
+ IfxDma_ChannelId_38, /**< \brief Ifx_DMA Channel 38 */
+ IfxDma_ChannelId_39, /**< \brief Ifx_DMA Channel 39 */
+ IfxDma_ChannelId_40, /**< \brief Ifx_DMA Channel 40 */
+ IfxDma_ChannelId_41, /**< \brief Ifx_DMA Channel 41 */
+ IfxDma_ChannelId_42, /**< \brief Ifx_DMA Channel 42 */
+ IfxDma_ChannelId_43, /**< \brief Ifx_DMA Channel 43 */
+ IfxDma_ChannelId_44, /**< \brief Ifx_DMA Channel 44 */
+ IfxDma_ChannelId_45, /**< \brief Ifx_DMA Channel 45 */
+ IfxDma_ChannelId_46, /**< \brief Ifx_DMA Channel 46 */
+ IfxDma_ChannelId_47 /**< \brief Ifx_DMA Channel 47 */
+} IfxDma_ChannelId;
+
+#endif /* IFXDMA_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDsadc_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDsadc_cfg.h
new file mode 100644
index 0000000..a81021a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDsadc_cfg.h
@@ -0,0 +1,71 @@
+/**
+ * \file IfxDsadc_cfg.h
+ * \brief DSADC on-chip implementation data
+ * \ingroup IfxLld_Dsadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dsadc DSADC
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Dsadc_Impl Implementation
+ * \ingroup IfxLld_Dsadc
+ * \defgroup IfxLld_Dsadc_Std Standard Driver
+ * \ingroup IfxLld_Dsadc
+ */
+
+#ifndef IFXDSADC_CFG_H
+#define IFXDSADC_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Number of channels
+ */
+#define IFXDSADC_NUM_CHANNELS 4
+
+#define IFXDSADC_NUM_MODULES (1)
+
+
+#endif /* IFXDSADC_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDts_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDts_cfg.h
new file mode 100644
index 0000000..b6983fa
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxDts_cfg.h
@@ -0,0 +1,65 @@
+/**
+ * \file IfxDts_cfg.h
+ * \brief DTS on-chip implementation data
+ * \ingroup IfxLld_Dts
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dts DTS
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Dts_Impl Implementation
+ * \ingroup IfxLld_Dts
+ * \defgroup IfxLld_Dts_Std Standard Driver
+ * \ingroup IfxLld_Dts
+ */
+
+#ifndef IFXDTS_CFG_H
+#define IFXDTS_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXDTS_NUM_MODULES (1)
+
+#endif /* IFXDTS_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEmem_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEmem_cfg.c
new file mode 100644
index 0000000..3658f94
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEmem_cfg.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxEmem_cfg.c
+ * \brief EMEM on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxEmem_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEmem_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEmem_cfg.h
new file mode 100644
index 0000000..7dbd9ab
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEmem_cfg.h
@@ -0,0 +1,80 @@
+/**
+ * \file IfxEmem_cfg.h
+ * \brief EMEM on-chip implementation data
+ * \ingroup IfxLld_Emem
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Emem EMEM
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Emem_Impl Implementation
+ * \ingroup IfxLld_Emem
+ * \defgroup IfxLld_Emem_Std Standard Driver
+ * \ingroup IfxLld_Emem
+ */
+
+#ifndef IFXEMEM_CFG_H
+#define IFXEMEM_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxEmem_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXEMEM_START_ADDR_CPU_CACHED 0x9F000000UL
+
+#define IFXEMEM_START_ADDR_CPU 0xBF000000UL
+
+#define IFXEMEM_START_ADDR_BBB (0xAF000000UL)
+
+#define IFXEMEM_SIZE (0x50000UL)
+
+#define IFXEMEM_NUM_MODULES (1)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+#endif /* IFXEMEM_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEray_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEray_cfg.c
new file mode 100644
index 0000000..6396015
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEray_cfg.c
@@ -0,0 +1,57 @@
+/**
+ * \file IfxEray_cfg.c
+ * \brief ERAY on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxEray_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES] = {
+ {&MODULE_ERAY0, (uint32)IfxEray_Index_0},
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEray_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEray_cfg.h
new file mode 100644
index 0000000..286107c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEray_cfg.h
@@ -0,0 +1,110 @@
+/**
+ * \file IfxEray_cfg.h
+ * \brief ERAY on-chip implementation data
+ * \ingroup IfxLld_Eray
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Eray ERAY
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Eray_Impl Implementation
+ * \ingroup IfxLld_Eray
+ * \defgroup IfxLld_Eray_Std Standard Driver
+ * \ingroup IfxLld_Eray
+ * \defgroup IfxLld_Eray_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Eray_Impl
+ */
+
+#ifndef IFXERAY_CFG_H
+#define IFXERAY_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxEray_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXERAY_NUM_MODULES (1)
+
+#define IFXERAY_NUM_SLOTS (128)
+
+#define IFXERAY_NUM_CHANNELS (2)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Eray_Impl_Enumerations
+ * \{ */
+/** \brief List of the available Eray resources
+ */
+typedef enum
+{
+ IfxEray_Index_none = -1, /**< \brief Not Selected */
+ IfxEray_Index_0 = 0, /**< \brief ERAY index 0 */
+} IfxEray_Index;
+
+/** \brief Node Id in communication cycle.
+ */
+typedef enum
+{
+ IfxEray_NodeId_a = 0, /**< \brief Ifx_ERAY Node A */
+ IfxEray_NodeId_b = 1, /**< \brief Ifx_ERAY Node B */
+ IfxEray_NodeId_none = -1 /**< \brief None of the Ifx_ERAY Nodes */
+} IfxEray_NodeId;
+
+/** \} */
+
+/** \addtogroup IfxLld_Eray_Impl_Enumerations
+ * \{ */
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxEray_cfg_indexMap[IFXERAY_NUM_MODULES];
+
+/** \} */
+
+#endif /* IFXERAY_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEth_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEth_cfg.h
new file mode 100644
index 0000000..41e5cc5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxEth_cfg.h
@@ -0,0 +1,67 @@
+/**
+ * \file IfxEth_cfg.h
+ * \brief ETH on-chip implementation data
+ * \ingroup IfxLld_Eth
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Eth ETH
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Eth_Impl Implementation
+ * \ingroup IfxLld_Eth
+ * \defgroup IfxLld_Eth_Std Standard Driver
+ * \ingroup IfxLld_Eth
+ */
+
+#ifndef IFXETH_CFG_H
+#define IFXETH_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXETH_MAX_TIMEOUT_VALUE 1000
+
+#define IFXETH_NUM_MODULES (1)
+
+#endif /* IFXETH_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFce_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFce_cfg.h
new file mode 100644
index 0000000..c260dbb
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFce_cfg.h
@@ -0,0 +1,67 @@
+/**
+ * \file IfxFce_cfg.h
+ * \brief FCE on-chip implementation data
+ * \ingroup IfxLld_Fce
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Fce FCE
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Fce_Impl Implementation
+ * \ingroup IfxLld_Fce
+ * \defgroup IfxLld_Fce_Std Standard Driver
+ * \ingroup IfxLld_Fce
+ */
+
+#ifndef IFXFCE_CFG_H
+#define IFXFCE_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXFCE_NUM_KERNEL (4)
+
+#define IFXFCE_NUM_MODULES (1)
+
+#endif /* IFXFCE_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFft_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFft_cfg.h
new file mode 100644
index 0000000..f9b7709
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFft_cfg.h
@@ -0,0 +1,89 @@
+/**
+ * \file IfxFft_cfg.h
+ * \brief FFT on-chip implementation data
+ * \ingroup IfxLld_Fft
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Fft FFT
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Fft_Impl Implementation
+ * \ingroup IfxLld_Fft
+ * \defgroup IfxLld_Fft_Std Standard Driver
+ * \ingroup IfxLld_Fft
+ */
+
+#ifndef IFXFFT_CFG_H
+#define IFXFFT_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Data space starting address
+ */
+#define IFXFFT_DATA_SPACE 0xBE000000U
+
+/** \brief Window coefficient space starting address
+ */
+#define IFXFFT_WINDOW_SPACE 0xBE100000U
+
+/** \brief Maximim possible length of the transform
+ */
+#define IFXFFT_MAX_LENGTH 2048
+
+#define IFXFFT_MAX_WINDOW_LENGTH (IFXFFT_MAX_LENGTH / 2)
+
+#define IFXFFT_FFT_DMA_SUPPORT (1)
+
+#define IFXFFT_FFT_OPTIMIZED (0)
+
+#define IFXFFT_FFT_DMA_CHANNEL_BASE 4
+
+#define IFXFFT_FFT_PIPELINED (1)
+
+#define IFXFFT_FFT_NUM_JOBS (8)
+
+#define IFXFFT_NUM_MODULES (1)
+
+#endif /* IFXFFT_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFlash_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFlash_cfg.c
new file mode 100644
index 0000000..abf98f5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFlash_cfg.c
@@ -0,0 +1,151 @@
+/**
+ * \file IfxFlash_cfg.c
+ * \brief FLASH on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxFlash_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS] = {
+ {0xAF000000 + 0 * 0x2000, 0xAF000000 + 1 * 0x2000 - 1 },
+ {0xAF000000 + 1 * 0x2000, 0xAF000000 + 2 * 0x2000 - 1 },
+ {0xAF000000 + 2 * 0x2000, 0xAF000000 + 3 * 0x2000 - 1 },
+ {0xAF000000 + 3 * 0x2000, 0xAF000000 + 4 * 0x2000 - 1 },
+ {0xAF000000 + 4 * 0x2000, 0xAF000000 + 5 * 0x2000 - 1 },
+ {0xAF000000 + 5 * 0x2000, 0xAF000000 + 6 * 0x2000 - 1 },
+ {0xAF000000 + 6 * 0x2000, 0xAF000000 + 7 * 0x2000 - 1 },
+ {0xAF000000 + 7 * 0x2000, 0xAF000000 + 8 * 0x2000 - 1 },
+ {0xAF000000 + 8 * 0x2000, 0xAF000000 + 9 * 0x2000 - 1 },
+ {0xAF000000 + 9 * 0x2000, 0xAF000000 + 10 * 0x2000 - 1},
+ {0xAF000000 + 10 * 0x2000, 0xAF000000 + 11 * 0x2000 - 1},
+ {0xAF000000 + 11 * 0x2000, 0xAF000000 + 12 * 0x2000 - 1},
+};
+
+IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS] = {
+ {IFXFLASH_DFLASH_START, IFXFLASH_DFLASH_END},
+};
+
+IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS] = {
+ {0xaf100000, 0xaf1003ff}, // UCB0
+ {0xaf100400, 0xaf1007ff}, // UCB1
+ {0xaf100800, 0xaf100bff}, // UCB2
+ {0xaf100c00, 0xaf100fff}, // UCB3
+ {0xaf101000, 0xaf1013ff}, // UCB4
+ {0xaf101400, 0xaf1017ff}, // UCB5
+ {0xaf101800, 0xaf101bff}, // UCB6
+ {0xaf101c00, 0xaf101fff}, // UCB7
+ {0xaf102000, 0xaf1023ff}, // UCB8
+ {0xaf102400, 0xaf1027ff}, // UCB9
+ {0xaf102800, 0xaf102bff}, // UCB10
+ {0xaf102c00, 0xaf102fff}, // UCB11
+ {0xaf103000, 0xaf1033ff}, // UCB12
+ {0xaf103400, 0xaf1037ff}, // UCB13
+ {0xaf103800, 0xaf103bff}, // UCB14
+ {0xaf103c00, 0xaf103fff}, // UCB15
+};
+
+IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS] = {
+ {0xa0000000, 0xa0003fff}, // PF0 S0
+ {0xa0004000, 0xa0007fff}, // PF0 S1
+ {0xa0008000, 0xa000bfff}, // PF0 S2
+ {0xa000c000, 0xa000ffff}, // PF0 S3
+ {0xa0010000, 0xa0013fff}, // PF0 S4
+ {0xa0014000, 0xa0017fff}, // PF0 S5
+ {0xa0018000, 0xa001bfff}, // PF0 S6
+ {0xa001c000, 0xa001ffff}, // PF0 S7
+ {0xa0020000, 0xa0027fff}, // PF0 S8
+ {0xa0028000, 0xa002ffff}, // PF0 S9
+ {0xa0030000, 0xa0037fff}, // PF0 S10
+ {0xa0038000, 0xa003ffff}, // PF0 S11
+ {0xa0040000, 0xa0047fff}, // PF0 S12
+ {0xa0048000, 0xa004ffff}, // PF0 S13
+ {0xa0050000, 0xa0057fff}, // PF0 S14
+ {0xa0058000, 0xa005ffff}, // PF0 S15
+ {0xa0060000, 0xa006ffff}, // PF0 S16
+ {0xa0070000, 0xa007ffff}, // PF0 S17
+ {0xa0080000, 0xa008ffff}, // PF0 S18
+ {0xa0090000, 0xa009ffff}, // PF0 S19
+ {0xa00a0000, 0xa00bffff}, // PF0 S20
+ {0xa00c0000, 0xa00dffff}, // PF0 S21
+ {0xa00e0000, 0xa00fffff}, // PF0 S22
+ // TC26x has only 1MB PF0 and 1.5MB PF1
+ {0xa0100000, 0xa0103fff}, // PF1 S0
+ {0xa0104000, 0xa0107fff}, // PF1 S1
+ {0xa0108000, 0xa010bfff}, // PF1 S2
+ {0xa010c000, 0xa010ffff}, // PF1 S3
+ {0xa0110000, 0xa0113fff}, // PF1 S4
+ {0xa0114000, 0xa0117fff}, // PF1 S5
+ {0xa0118000, 0xa011bfff}, // PF1 S6
+ {0xa011c000, 0xa011ffff}, // PF1 S7
+ {0xa0120000, 0xa0127fff}, // PF1 S8
+ {0xa0128000, 0xa012ffff}, // PF1 S9
+ {0xa0130000, 0xa0137fff}, // PF1 S10
+ {0xa0138000, 0xa013ffff}, // PF1 S11
+ {0xa0140000, 0xa0147fff}, // PF1 S12
+ {0xa0148000, 0xa014ffff}, // PF1 S13
+ {0xa0150000, 0xa0157fff}, // PF1 S14
+ {0xa0158000, 0xa015ffff}, // PF1 S15
+ {0xa0160000, 0xa016ffff}, // PF1 S16
+ {0xa0170000, 0xa017ffff}, // PF1 S17
+ {0xa0180000, 0xa018ffff}, // PF1 S18
+ {0xa0190000, 0xa019ffff}, // PF1 S19
+ {0xa01a0000, 0xa01bffff}, // PF1 S20
+ {0xa01c0000, 0xa01dffff}, // PF1 S21
+ {0xa01e0000, 0xa01fffff}, // PF1 S22
+ {0xa0200000, 0xa023ffff}, // PF1 S23
+ {0xa0240000, 0xa027ffff}, // PF1 S24
+};
+
+IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS] = {
+ {0xa0000000, 0xa007ffff}, // PF0 PS0
+ {0xa0080000, 0xa00fffff}, // PF0 PS1
+ {0xa0100000, 0xa017ffff}, // PF1 PS0
+ {0xa0180000, 0xa01fffff}, // PF1 PS1
+ {0xa0200000, 0xa027ffff}, // PF1 PS2
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFlash_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFlash_cfg.h
new file mode 100644
index 0000000..791c939
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxFlash_cfg.h
@@ -0,0 +1,196 @@
+/**
+ * \file IfxFlash_cfg.h
+ * \brief FLASH on-chip implementation data
+ * \ingroup IfxLld_Flash
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Flash FLASH
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Flash_Impl Implementation
+ * \ingroup IfxLld_Flash
+ * \defgroup IfxLld_Flash_Std Standard Driver
+ * \ingroup IfxLld_Flash
+ */
+
+#ifndef IFXFLASH_CFG_H
+#define IFXFLASH_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief number of flash modules.
+ * This macro may be deprecated in future. Use IFXFLASH_NUM_MODULES instead.
+ */
+#define IFXFLASH_NUM_FLASH_MODULES (1)
+
+/** \brief base address for general command sequences
+ */
+#define IFXFLASH_CMD_BASE_ADDRESS (0xaf000000)
+
+/** \brief offset between command areas (in DFlash range)
+ */
+#define IFXFLASH_CMD_BASE_OFFSET (0x00100000)
+
+#define IFXFLASH_DFLASH_BANKS (1)
+
+/** \brief Dflash burst length
+ */
+#define IFXFLASH_DFLASH_BURST_LENGTH (0x20)
+
+#define IFXFLASH_DFLASH_END (IFXFLASH_DFLASH_START + IFXFLASH_DFLASH_SIZE - 1)
+
+#define IFXFLASH_DFLASH_NUM_LOG_SECTORS (12)
+
+/** \brief Phy sector for DF
+ */
+#define IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS (1)
+
+#define IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS (16)
+
+/** \brief 8 bytes
+ */
+#define IFXFLASH_DFLASH_PAGE_LENGTH (8)
+
+#define IFXFLASH_DFLASH_SIZE (IFXFLASH_DFLASH_NUM_LOG_SECTORS * 0x2000)
+
+#define IFXFLASH_DFLASH_START (0xaf000000)
+
+/** \brief
+ */
+#define IFXFLASH_ERROR_TRACKING_MAX_CORRECTABLE_ERRORS (10)
+
+/** \brief
+ */
+#define IFXFLASH_ERROR_TRACKING_MAX_UNCORRECTABLE_ERRORS (1)
+
+/** \brief number of flash modules
+ */
+#define IFXFLASH_NUM_MODULES (1)
+
+#define IFXFLASH_PFLASH_BANKS (2)
+
+/** \brief P flash burst length
+ */
+#define IFXFLASH_PFLASH_BURST_LENGTH (0x100)
+
+/** \brief p flash end
+ */
+#define IFXFLASH_PFLASH_END ()
+
+/** \brief
+ */
+#define IFXFLASH_PFLASH_NUM_LOG_SECTORS (23 + 25)
+
+#define IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS (2 + 3)
+
+/** \brief offset between PMU PFlash ranges
+ */
+#define IFXFLASH_PFLASH_OFFSET (0x00800000)
+
+#define IFXFLASH_PFLASH_PAGE_LENGTH (32)
+
+/** \brief p flash size
+ */
+#define IFXFLASH_PFLASH_SIZE (0x00280000)
+
+/** \brief p flash start
+ */
+#define IFXFLASH_PFLASH_START (0xa0000000)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief
+ */
+typedef enum
+{
+ IfxFlash_FlashType_Fa = 0, /**< \brief Flash Array */
+ IfxFlash_FlashType_D0 = 1, /**< \brief data flash #0 */
+ IfxFlash_FlashType_D1 = 2, /**< \brief data flash #1 */
+ IfxFlash_FlashType_P0 = 3, /**< \brief program flash #0 */
+ IfxFlash_FlashType_P1 = 4, /**< \brief program flash #1 */
+ IfxFlash_FlashType_P2 = 5, /**< \brief program flash #2 */
+ IfxFlash_FlashType_P3 = 6 /**< \brief program flash #3 */
+} IfxFlash_FlashType;
+
+/** \brief user configuration block type
+ */
+typedef enum
+{
+ IfxFlash_UcbType_ucb0 = 0, /**< \brief UCB 0 */
+ IfxFlash_UcbType_ucb1 = 1, /**< \brief UCB 1 */
+ IfxFlash_UcbType_ucbHsmc = 5 /**< \brief HSM UCB */
+} IfxFlash_UcbType;
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \brief contains start and end address of sectors
+ */
+typedef struct
+{
+ uint32 start; /**< \brief start address of sector */
+ uint32 end; /**< \brief end address of sector */
+} IfxFlash_flashSector;
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableEepLog[IFXFLASH_DFLASH_NUM_LOG_SECTORS];
+
+IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTablePhys[IFXFLASH_DFLASH_NUM_PHYSICAL_SECTORS];
+
+IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_dFlashTableUcbLog[IFXFLASH_DFLASH_NUM_UCB_LOG_SECTORS];
+
+IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTableLog[IFXFLASH_PFLASH_NUM_LOG_SECTORS];
+
+IFX_EXTERN IFX_CONST IfxFlash_flashSector IfxFlash_pFlashTablePhys[IFXFLASH_PFLASH_NUM_PHYSICAL_SECTORS];
+
+#endif /* IFXFLASH_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGlobal_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGlobal_cfg.h
new file mode 100644
index 0000000..77de313
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGlobal_cfg.h
@@ -0,0 +1,64 @@
+/**
+ * \file IfxGlobal_cfg.h
+ * \brief Global definitions
+ * \ingroup IfxLld_Global
+ *
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Global Global Definitions
+ * \ingroup IfxLld
+ *
+ */
+
+#ifndef IFXGLOBAL_H
+#define IFXGLOBAL_H 1
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+/** \brief Microcontroller derivative corresponding to the iLLD implementation
+ */
+#define IFXGLOBAL_DERIVATIVE_TC26xB (1)
+
+/** \brief Microcontroller derivative name
+ */
+#define IFXGLOBAL_DERIVATIVE_NAME "TC26xB"
+
+#endif /* IFXGLOBAL_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGpt12_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGpt12_cfg.h
new file mode 100644
index 0000000..3527d06
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGpt12_cfg.h
@@ -0,0 +1,65 @@
+/**
+ * \file IfxGpt12_cfg.h
+ * \brief GPT12 on-chip implementation data
+ * \ingroup IfxLld_Gpt12
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gpt12 GPT12
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Gpt12_Impl Implementation
+ * \ingroup IfxLld_Gpt12
+ * \defgroup IfxLld_Gpt12_Std Standard Driver
+ * \ingroup IfxLld_Gpt12
+ */
+
+#ifndef IFXGPT12_CFG_H
+#define IFXGPT12_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXGPT12_NUM_MODULES (1)
+
+#endif /* IFXGPT12_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGtm_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGtm_cfg.c
new file mode 100644
index 0000000..88c7d34
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGtm_cfg.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxGtm_cfg.c
+ * \brief GTM on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxGtm_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGtm_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGtm_cfg.h
new file mode 100644
index 0000000..1409cbe
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxGtm_cfg.h
@@ -0,0 +1,340 @@
+/**
+ * \file IfxGtm_cfg.h
+ * \brief GTM on-chip implementation data
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm GTM
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Gtm_Impl Implementation
+ * \ingroup IfxLld_Gtm
+ * \defgroup IfxLld_Gtm_Std Standard Driver
+ * \ingroup IfxLld_Gtm
+ * \defgroup IfxLld_Gtm_Atom Atom Interface Drivers
+ * \ingroup IfxLld_Gtm
+ * \defgroup IfxLld_Gtm_Tom TOM Interface Drivers
+ * \ingroup IfxLld_Gtm
+ * \defgroup IfxLld_Gtm_Tim Tim Interface Drivers
+ * \ingroup IfxLld_Gtm
+ * \defgroup IfxLld_Gtm_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Gtm_Impl
+ * \defgroup IfxLld_Gtm_Impl_Data_Structures Data Structures
+ * \ingroup IfxLld_Gtm_Impl
+ */
+
+#ifndef IFXGTM_CFG_H
+#define IFXGTM_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "Ifx_Cfg.h"
+#include "IfxGtm_reg.h"
+#include "Port/Std/IfxPort.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Mask for CMU_CLK_EN register (Enable): CLK0
+ */
+#define IFXGTM_CMU_CLKEN_CLK0 (0x00000002)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): CLK1
+ */
+#define IFXGTM_CMU_CLKEN_CLK1 (0x00000008)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): CLK2
+ */
+#define IFXGTM_CMU_CLKEN_CLK2 (0x00000020)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): CLK3
+ */
+#define IFXGTM_CMU_CLKEN_CLK3 (0x00000080)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): CLK4
+ */
+#define IFXGTM_CMU_CLKEN_CLK4 (0x00000200)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): CLK5
+ */
+#define IFXGTM_CMU_CLKEN_CLK5 (0x00000800)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): CLK6
+ */
+#define IFXGTM_CMU_CLKEN_CLK6 (0x00002000)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): CLK7
+ */
+#define IFXGTM_CMU_CLKEN_CLK7 (0x00008000)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): ECLK0
+ */
+#define IFXGTM_CMU_CLKEN_ECLK0 (0x00020000)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): ECLK1
+ */
+#define IFXGTM_CMU_CLKEN_ECLK1 (0x00080000)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): ECLK2
+ */
+#define IFXGTM_CMU_CLKEN_ECLK2 (0x00200000)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): FXCLK
+ */
+#define IFXGTM_CMU_CLKEN_FXCLK (0x00800000)
+
+/** \brief Mask for CMU_CLK_EN register (Enable): ALL clocks
+ */
+#define IFXGTM_CMU_CLKEN_ALL (0x00AAAAAA)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): CLK0
+ */
+#define IFXGTM_CMU_CLKDIS_CLK0 (0x00000001)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): CLK1
+ */
+#define IFXGTM_CMU_CLKDIS_CLK1 (0x00000004)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): CLK2
+ */
+#define IFXGTM_CMU_CLKDIS_CLK2 (0x00000010)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): CLK3
+ */
+#define IFXGTM_CMU_CLKDIS_CLK3 (0x00000040)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): CLK4
+ */
+#define IFXGTM_CMU_CLKDIS_CLK4 (0x00000100)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): CLK5
+ */
+#define IFXGTM_CMU_CLKDIS_CLK5 (0x00000400)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): CLK6
+ */
+#define IFXGTM_CMU_CLKDIS_CLK6 (0x00001000)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): CLK7
+ */
+#define IFXGTM_CMU_CLKDIS_CLK7 (0x00004000)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): ECLK0
+ */
+#define IFXGTM_CMU_CLKDIS_ECLK0 (0x00010000)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): ECLK1
+ */
+#define IFXGTM_CMU_CLKDIS_ECLK1 (0x00040000)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): ECLK2
+ */
+#define IFXGTM_CMU_CLKDIS_ECLK2 (0x00100000)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): FXCLK
+ */
+#define IFXGTM_CMU_CLKDIS_FXCLK (0x00400000)
+
+/** \brief Mask for CMU_CLK_EN register (Disable): ALL clocks
+ */
+#define IFXGTM_CMU_CLKDIS_ALL (0x00555555)
+
+/** \brief
+ */
+#define IFXGTM_NUM_ATOM_OBJECTS (4)
+
+#define IFXGTM_NUM_TOM_OBJECTS (2)
+
+#define IFXGTM_NUM_ATOM_CHANNELS (8)
+
+#define IFXGTM_NUM_TOM_CHANNELS (16)
+
+#define IFXGTM_NUM_MODULES (1)
+
+/** \brief number of TIM channels.
+ */
+#define IFXGTM_NUM_TIM_CHANNELS (8)
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+typedef volatile struct IfxGtm_Tom_TGC Ifx_GTM_TOM_TGC;
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Impl_Enumerations
+ * \{ */
+/** \brief Enum for ATOM objects
+ */
+typedef enum
+{
+ IfxGtm_Atom_0, /**< \brief ATOM object 0 */
+ IfxGtm_Atom_1, /**< \brief ATOM object 1 */
+ IfxGtm_Atom_2, /**< \brief ATOM object 2 */
+ IfxGtm_Atom_3 /**< \brief ATOM object 3 */
+} IfxGtm_Atom;
+
+/** \brief Enum for ATOM channels
+ */
+typedef enum
+{
+ IfxGtm_Atom_Ch_none = -1, /**< \brief Not Selected */
+ IfxGtm_Atom_Ch_0, /**< \brief ATOM channel 0 */
+ IfxGtm_Atom_Ch_1, /**< \brief ATOM channel 1 */
+ IfxGtm_Atom_Ch_2, /**< \brief ATOM channel 2 */
+ IfxGtm_Atom_Ch_3, /**< \brief ATOM channel 3 */
+ IfxGtm_Atom_Ch_4, /**< \brief ATOM channel 4 */
+ IfxGtm_Atom_Ch_5, /**< \brief ATOM channel 5 */
+ IfxGtm_Atom_Ch_6, /**< \brief ATOM channel 6 */
+ IfxGtm_Atom_Ch_7 /**< \brief ATOM channel 7 */
+} IfxGtm_Atom_Ch;
+
+/** \brief Enum for Dpll subincrements
+ */
+typedef enum
+{
+ IfxGtm_Dpll_SubInc_1 = 0, /**< \brief subincrement1 */
+ IfxGtm_Dpll_SubInc_2 /**< \brief subincrement2 */
+} IfxGtm_Dpll_SubInc;
+
+/** \brief Enum Enable disable feature control
+ */
+typedef enum
+{
+ IfxGtm_FeatureControl_disabled = 0, /**< \brief disabled */
+ IfxGtm_FeatureControl_disable = 1, /**< \brief disable */
+ IfxGtm_FeatureControl_enable = 2, /**< \brief enable */
+ IfxGtm_FeatureControl_enabled = 3 /**< \brief enabled */
+} IfxGtm_FeatureControl;
+
+/** \brief Enum for TIM objects
+ */
+typedef enum
+{
+ IfxGtm_Tim_0, /**< \brief TIM object 0 */
+ IfxGtm_Tim_1, /**< \brief TIM object 1 */
+ IfxGtm_Tim_2 /**< \brief TIM object 2 */
+} IfxGtm_Tim;
+
+/** \brief Enum for TIM channels
+ */
+typedef enum
+{
+ IfxGtm_Tim_Ch_0, /**< \brief TIM channel 0 */
+ IfxGtm_Tim_Ch_1, /**< \brief TIM channel 1 */
+ IfxGtm_Tim_Ch_2, /**< \brief TIM channel 2 */
+ IfxGtm_Tim_Ch_3, /**< \brief TIM channel 3 */
+ IfxGtm_Tim_Ch_4, /**< \brief TIM channel 4 */
+ IfxGtm_Tim_Ch_5, /**< \brief TIM channel 5 */
+ IfxGtm_Tim_Ch_6, /**< \brief TIM channel 6 */
+ IfxGtm_Tim_Ch_7 /**< \brief TIM channel 7 */
+} IfxGtm_Tim_Ch;
+
+/** \brief Enum for TOM objects
+ */
+typedef enum
+{
+ IfxGtm_Tom_0, /**< \brief TOM object 0 */
+ IfxGtm_Tom_1 /**< \brief TOM object 1 */
+} IfxGtm_Tom;
+
+/** \brief Enum for TOM channels
+ */
+typedef enum
+{
+ IfxGtm_Tom_Ch_none = -1, /**< \brief Not Selected */
+ IfxGtm_Tom_Ch_0, /**< \brief TOM channel 0 */
+ IfxGtm_Tom_Ch_1, /**< \brief TOM channel 1 */
+ IfxGtm_Tom_Ch_2, /**< \brief TOM channel 2 */
+ IfxGtm_Tom_Ch_3, /**< \brief TOM channel 3 */
+ IfxGtm_Tom_Ch_4, /**< \brief TOM channel 4 */
+ IfxGtm_Tom_Ch_5, /**< \brief TOM channel 5 */
+ IfxGtm_Tom_Ch_6, /**< \brief TOM channel 6 */
+ IfxGtm_Tom_Ch_7, /**< \brief TOM channel 7 */
+ IfxGtm_Tom_Ch_8, /**< \brief TOM channel 8 */
+ IfxGtm_Tom_Ch_9, /**< \brief TOM channel 9 */
+ IfxGtm_Tom_Ch_10, /**< \brief TOM channel 10 */
+ IfxGtm_Tom_Ch_11, /**< \brief TOM channel 11 */
+ IfxGtm_Tom_Ch_12, /**< \brief TOM channel 12 */
+ IfxGtm_Tom_Ch_13, /**< \brief TOM channel 13 */
+ IfxGtm_Tom_Ch_14, /**< \brief TOM channel 14 */
+ IfxGtm_Tom_Ch_15 /**< \brief TOM channel 15 */
+} IfxGtm_Tom_Ch;
+
+/** \brief Enum for TOM global channel control units
+ */
+typedef enum
+{
+ IfxGtm_Tom_Tgc_0, /**< \brief TOM global channel control unit0 */
+ IfxGtm_Tom_Tgc_1 /**< \brief TOM global channel control unit1 */
+} IfxGtm_Tom_Tgc;
+
+/** \} */
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Gtm_Impl_Data_Structures
+ * \{ */
+/** \brief TOM TGC objects
+ */
+struct IfxGtm_Tom_TGC
+{
+ Ifx_GTM_TOM_TGC0_GLB_CTRL GLB_CTRL; /**< \brief 30, TOM TGC0 Global Control Register */
+ Ifx_GTM_TOM_TGC0_ACT_TB ACT_TB; /**< \brief 34, TOM TGC0 Action Time Base Register */
+ Ifx_GTM_TOM_TGC0_FUPD_CTRL FUPD_CTRL; /**< \brief 38, TOM TGC0 Force Update Control Register */
+ Ifx_GTM_TOM_TGC0_INT_TRIG INT_TRIG; /**< \brief 3C, TOM TGC0 Internal Trigger Control Register */
+ Ifx_GTM_TOM_CH xxxCH1; /**< \brief 40, TOM channel objects */
+ Ifx_GTM_TOM_TGC0_ENDIS_CTRL ENDIS_CTRL; /**< \brief 70, TOM TGC0 Enable/Disable Control Register */
+ Ifx_GTM_TOM_TGC0_ENDIS_STAT ENDIS_STAT; /**< \brief 74, TOM TGC0 Enable/Disable Status Register */
+ Ifx_GTM_TOM_TGC0_OUTEN_CTRL OUTEN_CTRL; /**< \brief 78, TOM TGC0 Output Enable Control Register */
+ Ifx_GTM_TOM_TGC0_OUTEN_STAT OUTEN_STAT; /**< \brief 7C, TOM TGC0 Output Enable Status Register */
+};
+
+/** \} */
+
+#endif /* IFXGTM_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxHssl_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxHssl_cfg.c
new file mode 100644
index 0000000..50503cd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxHssl_cfg.c
@@ -0,0 +1,61 @@
+/**
+ * \file IfxHssl_cfg.c
+ * \brief HSSL on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxHssl_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES] = {
+ {&MODULE_HSCT, (uint32)IfxHssl_hsctIndex_0}
+};
+
+IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES] = {
+ {&MODULE_HSSL, (uint32)IfxHssl_hsslIndex_0}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxHssl_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxHssl_cfg.h
new file mode 100644
index 0000000..7b5a62e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxHssl_cfg.h
@@ -0,0 +1,112 @@
+/**
+ * \file IfxHssl_cfg.h
+ * \brief HSSL on-chip implementation data
+ * \ingroup IfxLld_Hssl
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Hssl HSSL
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Hssl_Impl Implementation
+ * \ingroup IfxLld_Hssl
+ * \defgroup IfxLld_Hssl_Std Standard Driver
+ * \ingroup IfxLld_Hssl
+ * \defgroup IfxLld_Hssl_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Hssl_Impl
+ */
+
+#ifndef IFXHSSL_CFG_H
+#define IFXHSSL_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxHssl_reg.h"
+#include "IfxHsct_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXHSSL_NUM_CHANNELS 4
+
+#define IFXHSSL_NUM_MODULES 1
+
+#define IFXHSSL_JTAG_ID_ADDRESS (0xF0000464u)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Hssl_Impl_Enumerations
+ * \{ */
+/** \brief List of the available Hsct resources
+ */
+typedef enum
+{
+ IfxHssl_hsctIndex_none = -1, /**< \brief Not Selected */
+ IfxHssl_hsctIndex_0 = 0, /**< \brief HSCT index 0 */
+} IfxHssl_hsctIndex;
+
+/** \brief List of the available Hssl resources
+ */
+typedef enum
+{
+ IfxHssl_hsslIndex_none = -1, /**< \brief Not Selected */
+ IfxHssl_hsslIndex_0 = 0, /**< \brief HSSL index 0 */
+} IfxHssl_hsslIndex;
+
+/** \} */
+
+/** \addtogroup IfxLld_Hssl_Impl_Enumerations
+ * \{ */
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsctIndexMap[IFXHSSL_NUM_MODULES];
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxHssl_cfg_hsslIndexMap[IFXHSSL_NUM_MODULES];
+
+/** \} */
+
+#endif /* IFXHSSL_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxI2c_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxI2c_cfg.c
new file mode 100644
index 0000000..694bcc5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxI2c_cfg.c
@@ -0,0 +1,57 @@
+/**
+ * \file IfxI2c_cfg.c
+ * \brief I2C on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxI2c_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES] = {
+ {&MODULE_I2C0, (uint32)IfxI2c_Index_0}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxI2c_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxI2c_cfg.h
new file mode 100644
index 0000000..0cf4e13
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxI2c_cfg.h
@@ -0,0 +1,97 @@
+/**
+ * \file IfxI2c_cfg.h
+ * \brief I2C on-chip implementation data
+ * \ingroup IfxLld_I2c
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_I2c I2C
+ * \ingroup IfxLld
+ * \defgroup IfxLld_I2c_Impl Implementation
+ * \ingroup IfxLld_I2c
+ * \defgroup IfxLld_I2c_Std Standard Driver
+ * \ingroup IfxLld_I2c
+ * \defgroup IfxLld_I2c_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_I2c_Impl
+ */
+
+#ifndef IFXI2C_CFG_H
+#define IFXI2C_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxI2c_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXI2C_NUM_MODULES (1)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_I2c_Impl_Enumerations
+ * \{ */
+/** \brief List of the available I2c interfaces
+ */
+typedef enum
+{
+ IfxI2c_Index_none = -1, /**< \brief Not Selected */
+ IfxI2c_Index_0 = 0, /**< \brief I2C Index 0 */
+} IfxI2c_Index;
+
+/** \} */
+
+/** \addtogroup IfxLld_I2c_Impl_Enumerations
+ * \{ */
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxI2c_cfg_indexMap[IFXI2C_NUM_MODULES];
+
+/** \} */
+
+#endif /* IFXI2C_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxIom_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxIom_cfg.h
new file mode 100644
index 0000000..b98820f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxIom_cfg.h
@@ -0,0 +1,245 @@
+/**
+ * \file IfxIom_cfg.h
+ * \brief IOM on-chip implementation data
+ * \ingroup IfxLld_Iom
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Iom IOM
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Iom_Impl Implementation
+ * \ingroup IfxLld_Iom
+ * \defgroup IfxLld_Iom_Std Standard Driver
+ * \ingroup IfxLld_Iom
+ * \defgroup IfxLld_Iom_Impl_Enum Enum input signals
+ * \ingroup IfxLld_Iom_Impl
+ * \defgroup IfxLld_Iom_Impl_Enumeration Enumeration inputs
+ * \ingroup IfxLld_Iom_Impl
+ */
+
+#ifndef IFXIOM_CFG_H
+#define IFXIOM_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Specifies maximum number of channels
+ */
+#define IFXIOM_NUM_CHANNELS 16
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Iom_Impl_Enum
+ * \{ */
+/** \brief IOM_FPCCTRk.ISM
+ */
+typedef enum
+{
+ IfxIom_MonInputSignal_p = 0, /**< \brief Signal input Pn_IN (from portlogic) selected */
+ IfxIom_MonInputSignal_0 = 1, /**< \brief Monitor Signal Input 0 selected */
+ IfxIom_MonInputSignal_1 = 2, /**< \brief Monitor Signal Input 1 selected */
+ IfxIom_MonInputSignal_2 = 3 /**< \brief Monitor Signal Input 2 selected */
+} IfxIom_MonInputSignal;
+
+/** \brief IOM_FPCCTRk.ISR
+ */
+typedef enum
+{
+ IfxIom_RefInputSignal_p = 0, /**< \brief Signal input Pn_IN (from portlogic) selected */
+ IfxIom_RefInputSignal_0 = 1, /**< \brief Monitor Signal Input 0 selected */
+ IfxIom_RefInputSignal_1 = 2, /**< \brief Monitor Signal Input 1 selected */
+ IfxIom_RefInputSignal_2 = 3, /**< \brief Monitor Signal Input 2 selected */
+ IfxIom_RefInputSignal_xorCombiner = 4 /**< \brief GTM XOR Combiner selected */
+} IfxIom_RefInputSignal;
+
+/** \} */
+
+/** \addtogroup IfxLld_Iom_Impl_Enumeration
+ * \{ */
+/** \brief LAM mon inputs
+ */
+typedef enum
+{
+ IfxIom_MonInput_p33_0 = (IfxIom_MonInputSignal_p << 8) | 0x0, /**< \brief Value=0xXXYY where XX=ISM, YY=k */
+ IfxIom_MonInput_p33_1 = (IfxIom_MonInputSignal_p << 8) | 0x1,
+ IfxIom_MonInput_p33_2 = (IfxIom_MonInputSignal_p << 8) | 0x2,
+ IfxIom_MonInput_p33_3 = (IfxIom_MonInputSignal_p << 8) | 0x3,
+ IfxIom_MonInput_p33_4 = (IfxIom_MonInputSignal_p << 8) | 0x4,
+ IfxIom_MonInput_p33_5 = (IfxIom_MonInputSignal_p << 8) | 0x5,
+ IfxIom_MonInput_p33_6 = (IfxIom_MonInputSignal_p << 8) | 0x6,
+ IfxIom_MonInput_p33_7 = (IfxIom_MonInputSignal_p << 8) | 0x7,
+ IfxIom_MonInput_p33_8 = (IfxIom_MonInputSignal_p << 8) | 0x8,
+ IfxIom_MonInput_p33_9 = (IfxIom_MonInputSignal_p << 8) | 0x9,
+ IfxIom_MonInput_p33_10 = (IfxIom_MonInputSignal_p << 8) | 0xa,
+ IfxIom_MonInput_p33_11 = (IfxIom_MonInputSignal_p << 8) | 0xb,
+ IfxIom_MonInput_p33_12 = (IfxIom_MonInputSignal_p << 8) | 0xc,
+ IfxIom_MonInput_p20_12 = (IfxIom_MonInputSignal_p << 8) | 0xd,
+ IfxIom_MonInput_p20_13 = (IfxIom_MonInputSignal_p << 8) | 0xe,
+ IfxIom_MonInput_p20_14 = (IfxIom_MonInputSignal_p << 8) | 0xf,
+ IfxIom_MonInput_gtmTout22 = (IfxIom_MonInputSignal_0 << 8) | 0x0,
+ IfxIom_MonInput_gtmTout23 = (IfxIom_MonInputSignal_0 << 8) | 0x1,
+ IfxIom_MonInput_gtmTout24 = (IfxIom_MonInputSignal_0 << 8) | 0x2,
+ IfxIom_MonInput_gtmTout25 = (IfxIom_MonInputSignal_0 << 8) | 0x3,
+ IfxIom_MonInput_gtmTout26 = (IfxIom_MonInputSignal_0 << 8) | 0x4,
+ IfxIom_MonInput_gtmTout27 = (IfxIom_MonInputSignal_0 << 8) | 0x5,
+ IfxIom_MonInput_gtmTout28 = (IfxIom_MonInputSignal_0 << 8) | 0x6,
+ IfxIom_MonInput_gtmTout29 = (IfxIom_MonInputSignal_0 << 8) | 0x7,
+ IfxIom_MonInput_gtmTout30 = (IfxIom_MonInputSignal_0 << 8) | 0x8,
+ IfxIom_MonInput_gtmTout31 = (IfxIom_MonInputSignal_0 << 8) | 0x9,
+ IfxIom_MonInput_gtmTout32 = (IfxIom_MonInputSignal_0 << 8) | 0xa,
+ IfxIom_MonInput_gtmTout33 = (IfxIom_MonInputSignal_0 << 8) | 0xb,
+ IfxIom_MonInput_gtmTout34 = (IfxIom_MonInputSignal_0 << 8) | 0xc,
+ IfxIom_MonInput_gtmTout68 = (IfxIom_MonInputSignal_0 << 8) | 0xd,
+ IfxIom_MonInput_gtmTout69 = (IfxIom_MonInputSignal_0 << 8) | 0xe,
+ IfxIom_MonInput_gtmTout70 = (IfxIom_MonInputSignal_0 << 8) | 0xf,
+ IfxIom_MonInput_ccu60Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0x0,
+ IfxIom_MonInput_ccu60Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x1,
+ IfxIom_MonInput_ccu60Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x2,
+ IfxIom_MonInput_ccu60Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0x3,
+ IfxIom_MonInput_ccu60Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0x4,
+ IfxIom_MonInput_ccu60Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0x5,
+ IfxIom_MonInput_ccu60Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x6,
+ IfxIom_MonInput_ccu61Cout63 = (IfxIom_MonInputSignal_1 << 8) | 0x7,
+ IfxIom_MonInput_ccu61Cc60 = (IfxIom_MonInputSignal_1 << 8) | 0x8,
+ IfxIom_MonInput_ccu61Cc61 = (IfxIom_MonInputSignal_1 << 8) | 0x9,
+ IfxIom_MonInput_ccu61Cc62 = (IfxIom_MonInputSignal_1 << 8) | 0xa,
+ IfxIom_MonInput_ccu61Cout60 = (IfxIom_MonInputSignal_1 << 8) | 0xb,
+ IfxIom_MonInput_ccu61Cout61 = (IfxIom_MonInputSignal_1 << 8) | 0xc,
+ IfxIom_MonInput_ccu61Cout62 = (IfxIom_MonInputSignal_1 << 8) | 0xd,
+ IfxIom_MonInput_psi5Psitx0 = (IfxIom_MonInputSignal_1 << 8) | 0xe,
+ IfxIom_MonInput_psi5Psitx1 = (IfxIom_MonInputSignal_1 << 8) | 0xf,
+ IfxIom_MonInput_qspi0Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x0,
+ IfxIom_MonInput_qspi1Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x1,
+ IfxIom_MonInput_qspi2Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x2,
+ IfxIom_MonInput_qspi3Mrst = (IfxIom_MonInputSignal_2 << 8) | 0x3,
+ IfxIom_MonInput_gnd = (IfxIom_MonInputSignal_2 << 8) | 0x4,
+ IfxIom_MonInput_canNode0Txd = (IfxIom_MonInputSignal_2 << 8) | 0x5,
+ IfxIom_MonInput_canNode1Txd = (IfxIom_MonInputSignal_2 << 8) | 0x6,
+ IfxIom_MonInput_canNode2Txd = (IfxIom_MonInputSignal_2 << 8) | 0x7,
+ IfxIom_MonInput_canNode3Txd = (IfxIom_MonInputSignal_2 << 8) | 0x8,
+ IfxIom_MonInput_gtmTout104 = (IfxIom_MonInputSignal_2 << 8) | 0x9,
+ IfxIom_MonInput_gtmTout105 = (IfxIom_MonInputSignal_2 << 8) | 0xa,
+ IfxIom_MonInput_gtmTout106 = (IfxIom_MonInputSignal_2 << 8) | 0xb,
+ IfxIom_MonInput_asclin0Atx = (IfxIom_MonInputSignal_2 << 8) | 0xc,
+ IfxIom_MonInput_asclin1Atx = (IfxIom_MonInputSignal_2 << 8) | 0xd,
+ IfxIom_MonInput_asclin2Atx = (IfxIom_MonInputSignal_2 << 8) | 0xe,
+ IfxIom_MonInput_asclin3Atx = (IfxIom_MonInputSignal_2 << 8) | 0xf
+} IfxIom_MonInput;
+
+/** \brief LAM ref inputs
+ */
+typedef enum
+{
+ IfxIom_RefInput_p33_0 = (IfxIom_RefInputSignal_p << 8) | 0x0,
+ IfxIom_RefInput_p33_1 = (IfxIom_RefInputSignal_p << 8) | 0x1,
+ IfxIom_RefInput_p33_2 = (IfxIom_RefInputSignal_p << 8) | 0x2,
+ IfxIom_RefInput_p33_3 = (IfxIom_RefInputSignal_p << 8) | 0x3,
+ IfxIom_RefInput_p33_4 = (IfxIom_RefInputSignal_p << 8) | 0x4,
+ IfxIom_RefInput_p33_5 = (IfxIom_RefInputSignal_p << 8) | 0x5,
+ IfxIom_RefInput_p33_6 = (IfxIom_RefInputSignal_p << 8) | 0x6,
+ IfxIom_RefInput_p33_7 = (IfxIom_RefInputSignal_p << 8) | 0x7,
+ IfxIom_RefInput_p33_8 = (IfxIom_RefInputSignal_p << 8) | 0x8,
+ IfxIom_RefInput_p33_9 = (IfxIom_RefInputSignal_p << 8) | 0x9,
+ IfxIom_RefInput_p33_10 = (IfxIom_RefInputSignal_p << 8) | 0xa,
+ IfxIom_RefInput_p33_11 = (IfxIom_RefInputSignal_p << 8) | 0xb,
+ IfxIom_RefInput_p33_12 = (IfxIom_RefInputSignal_p << 8) | 0xc,
+ IfxIom_RefInput_p20_12 = (IfxIom_RefInputSignal_p << 8) | 0xd,
+ IfxIom_RefInput_p20_13 = (IfxIom_RefInputSignal_p << 8) | 0xe,
+ IfxIom_RefInput_p20_14 = (IfxIom_RefInputSignal_p << 8) | 0xf,
+ IfxIom_RefInput_gtmTout0 = (IfxIom_RefInputSignal_0 << 8) | 0x0,
+ IfxIom_RefInput_gtmTout1 = (IfxIom_RefInputSignal_0 << 8) | 0x1,
+ IfxIom_RefInput_gtmTout2 = (IfxIom_RefInputSignal_0 << 8) | 0x2,
+ IfxIom_RefInput_gtmTout3 = (IfxIom_RefInputSignal_0 << 8) | 0x3,
+ IfxIom_RefInput_gtmTout4 = (IfxIom_RefInputSignal_0 << 8) | 0x4,
+ IfxIom_RefInput_gtmTout5 = (IfxIom_RefInputSignal_0 << 8) | 0x5,
+ IfxIom_RefInput_gtmTout6 = (IfxIom_RefInputSignal_0 << 8) | 0x6,
+ IfxIom_RefInput_gtmTout7 = (IfxIom_RefInputSignal_0 << 8) | 0x7,
+ IfxIom_RefInput_gtmTout8 = (IfxIom_RefInputSignal_0 << 8) | 0x8,
+ IfxIom_RefInput_gtmTout9 = (IfxIom_RefInputSignal_0 << 8) | 0x9,
+ IfxIom_RefInput_gtmTout10 = (IfxIom_RefInputSignal_0 << 8) | 0xa,
+ IfxIom_RefInput_gtmTout11 = (IfxIom_RefInputSignal_0 << 8) | 0xb,
+ IfxIom_RefInput_gtmTout12 = (IfxIom_RefInputSignal_0 << 8) | 0xc,
+ IfxIom_RefInput_gtmTout13 = (IfxIom_RefInputSignal_0 << 8) | 0xd,
+ IfxIom_RefInput_gtmTout14 = (IfxIom_RefInputSignal_0 << 8) | 0xe,
+ IfxIom_RefInput_gtmTout15 = (IfxIom_RefInputSignal_0 << 8) | 0xf,
+ IfxIom_RefInput_ccu60Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x0,
+ IfxIom_RefInput_ccu60Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x1,
+ IfxIom_RefInput_ccu60Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x2,
+ IfxIom_RefInput_ccu60Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0x3,
+ IfxIom_RefInput_ccu60Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0x4,
+ IfxIom_RefInput_ccu60Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0x5,
+ IfxIom_RefInput_ccu60Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0x6,
+ IfxIom_RefInput_ccu61Cout63 = (IfxIom_RefInputSignal_1 << 8) | 0x7,
+ IfxIom_RefInput_ccu61Cout62 = (IfxIom_RefInputSignal_1 << 8) | 0x8,
+ IfxIom_RefInput_ccu61Cout61 = (IfxIom_RefInputSignal_1 << 8) | 0x9,
+ IfxIom_RefInput_ccu61Cout60 = (IfxIom_RefInputSignal_1 << 8) | 0xa,
+ IfxIom_RefInput_ccu61Cc62 = (IfxIom_RefInputSignal_1 << 8) | 0xb,
+ IfxIom_RefInput_ccu61Cc61 = (IfxIom_RefInputSignal_1 << 8) | 0xc,
+ IfxIom_RefInput_ccu61Cc60 = (IfxIom_RefInputSignal_1 << 8) | 0xd,
+ IfxIom_RefInput_psi5Psitx0 = (IfxIom_RefInputSignal_1 << 8) | 0xe,
+ IfxIom_RefInput_psi5Psitx2 = (IfxIom_RefInputSignal_1 << 8) | 0xf,
+ IfxIom_RefInput_qspi0Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x0,
+ IfxIom_RefInput_qspi1Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x1,
+ IfxIom_RefInput_qspi2Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x2,
+ IfxIom_RefInput_qspi3Mrst = (IfxIom_RefInputSignal_2 << 8) | 0x3,
+ IfxIom_RefInput_gnd = (IfxIom_RefInputSignal_2 << 8) | 0x4,
+ IfxIom_RefInput_canNode0Txd = (IfxIom_RefInputSignal_2 << 8) | 0x5,
+ IfxIom_RefInput_canNode1Txd = (IfxIom_RefInputSignal_2 << 8) | 0x6,
+ IfxIom_RefInput_canNode2Txd = (IfxIom_RefInputSignal_2 << 8) | 0x7,
+ IfxIom_RefInput_canNode3Txd = (IfxIom_RefInputSignal_2 << 8) | 0x8,
+ IfxIom_RefInput_gtmTout107 = (IfxIom_RefInputSignal_2 << 8) | 0x9,
+ IfxIom_RefInput_gtmTout108 = (IfxIom_RefInputSignal_2 << 8) | 0xa,
+ IfxIom_RefInput_gtmTout109 = (IfxIom_RefInputSignal_2 << 8) | 0xb,
+ IfxIom_RefInput_asclin0Atx = (IfxIom_RefInputSignal_2 << 8) | 0xc,
+ IfxIom_RefInput_asclin1Atx = (IfxIom_RefInputSignal_2 << 8) | 0xd,
+ IfxIom_RefInput_asclin2Atx = (IfxIom_RefInputSignal_2 << 8) | 0xe,
+ IfxIom_RefInput_asclin3Atx = (IfxIom_RefInputSignal_2 << 8) | 0xf,
+ IfxIom_RefInput_exorCombiner = (IfxIom_RefInputSignal_xorCombiner << 8) | 0x0
+} IfxIom_RefInput;
+
+/** \} */
+
+#endif /* IFXIOM_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMsc_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMsc_cfg.c
new file mode 100644
index 0000000..2619dd5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMsc_cfg.c
@@ -0,0 +1,58 @@
+/**
+ * \file IfxMsc_cfg.c
+ * \brief MSC on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxMsc_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES] = {
+ {&MODULE_MSC0, IfxMsc_Index_0},
+ {&MODULE_MSC1, IfxMsc_Index_1}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMsc_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMsc_cfg.h
new file mode 100644
index 0000000..9713193
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMsc_cfg.h
@@ -0,0 +1,95 @@
+/**
+ * \file IfxMsc_cfg.h
+ * \brief MSC on-chip implementation data
+ * \ingroup IfxLld_Msc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Msc MSC
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Msc_Impl Implementation
+ * \ingroup IfxLld_Msc
+ * \defgroup IfxLld_Msc_Std Standard Driver
+ * \ingroup IfxLld_Msc
+ * \defgroup IfxLld_Msc_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Msc_Impl
+ */
+
+#ifndef IFXMSC_CFG_H
+#define IFXMSC_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxMsc_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXMSC_NUM_MODULES 2
+
+#define IFXMSC_NUM_ENABLE_SELECT_LINES (4)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Msc_Impl_Enumerations
+ * \{ */
+/** \brief List of the available MSC resources
+ */
+typedef enum
+{
+ IfxMsc_Index_none = -1, /**< \brief Not Selected */
+ IfxMsc_Index_0 = 0, /**< \brief "MSC index "+str(x) */
+ IfxMsc_Index_1 /**< \brief "MSC index "+str(x) */
+} IfxMsc_Index;
+
+/** \} */
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMsc_cfg_indexMap[IFXMSC_NUM_MODULES];
+
+#endif /* IFXMSC_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMtu_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMtu_cfg.c
new file mode 100644
index 0000000..5caffb8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMtu_cfg.c
@@ -0,0 +1,145 @@
+/**
+ * \file IfxMtu_cfg.c
+ * \brief Mtu on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxMtu_cfg.h"
+#include "Mtu/Std/IfxMtu.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS] = {
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {2 * 4, 16, 6, 0, 1, 8192 }, /**< \brief IfxMtu_MbistSel_cpu1Dspr */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {2 * 1, 20, 6, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_cpu1Dtag */
+ {1 * 2, 64, 8, 0, 1, 3072 }, /**< \brief IfxMtu_MbistSel_cpu1Pspr */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {2 * 1, 20, 5, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_cpu1Ptag */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {2 * 4, 16, 6, 0, 1, 8192 }, /**< \brief IfxMtu_MbistSel_cpu0Dspr */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {1 * 2, 32, 8, 0, 1, 3072 }, /**< \brief IfxMtu_MbistSel_cpu0Pspr */
+ {2 * 1, 20, 5, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_cpu0Ptag */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {1 * 2, 35, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_ethermac */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {1 * 1, 64, 8, 0, 1, 4096 }, /**< \brief IfxMtu_MbistSel_mod4 */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {1 * 1, 29, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmFifo */
+ {1 * 3, 32, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmMcs0 */
+ {1 * 3, 32, 8, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_gtmMcs1 */
+ {1 * 1, 24, 7, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_gtmDpll1a */
+ {1 * 1, 24, 7, 0, 1, 384 }, /**< \brief IfxMtu_MbistSel_gtmDpll1b */
+ {1 * 1, 24, 7, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_gtmDpll2 */
+ {1 * 1, 32, 8, 0, 1, 192 }, /**< \brief IfxMtu_MbistSel_psi5 */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {1 * 1, 32, 8, 0, 1, 2496 }, /**< \brief IfxMtu_MbistSel_mcan */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {1 * 2, 32, 8, 0, 1, 64 }, /**< \brief IfxMtu_MbistSel_erayObf */
+ {1 * 4, 32, 8, 0, 1, 128 }, /**< \brief IfxMtu_MbistSel_erayIbfTbf */
+ {1 * 1, 32, 8, 0, 1, 4096 }, /**< \brief IfxMtu_MbistSel_erayMbf */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {2 * 1, 8, 6, 0, 1, 40960}, /**< \brief IfxMtu_MbistSel_stdbyRam1 */
+ {1 * 4, 32, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_mcds */
+ {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem0 */
+ {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem1 */
+ {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem2 */
+ {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem3 */
+ {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem4 */
+ {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem5 */
+ {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem6 */
+ {1 * 2, 128, 9, 0, 1, 2048 }, /**< \brief IfxMtu_MbistSel_emem7 */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {1 * 4, 8, 6, 0, 1, 5120 }, /**< \brief IfxMtu_MbistSel_cifJpeg1_4 */
+ {0 * 0, 0, 0, 0, 0, 0 }, /**< \brief IfxMtu_MbistSel_none */
+ {1 * 2, 8, 6, 0, 1, 384 }, /**< \brief IfxMtu_MbistSel_cifJpeg3 */
+ {1 * 1, 36, 8, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_cifCif */
+ {1 * 1, 8, 6, 0, 1, 20480}, /**< \brief IfxMtu_MbistSel_stdbyRam2 */
+ {1 * 4, 64, 8, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_dma */
+ {1 * 2, 128, 9, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_ememXtm0 */
+ {1 * 2, 128, 9, 0, 1, 256 }, /**< \brief IfxMtu_MbistSel_ememXtm1 */
+ {1 * 4, 64, 8, 0, 1, 1024 }, /**< \brief IfxMtu_MbistSel_fft0 */
+ {1 * 1, 16, 6, 0, 1, 512 }, /**< \brief IfxMtu_MbistSel_fft1 */
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMtu_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMtu_cfg.h
new file mode 100644
index 0000000..1901254
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMtu_cfg.h
@@ -0,0 +1,152 @@
+/**
+ * \file IfxMtu_cfg.h
+ * \brief Mtu on-chip implementation data
+ * \ingroup IfxLld_Mtu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Mtu MTU
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Mtu_Impl Implementation
+ * \ingroup IfxLld_Mtu
+ * \defgroup IfxLld_Mtu_Std Standard Driver
+ * \ingroup IfxLld_Mtu
+ */
+
+#ifndef IFXMTU_CFG_H
+#define IFXMTU_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/IfxCpu.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxMtu_reg.h"
+#include "IfxMc_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Base address of first MBIST Control Block
+ */
+#define IFXMTU_MC_ADDRESS_BASE (0xF0061000u)
+
+/** \brief Number of MBIST Table items
+ */
+#define IFXMTU_NUM_MBIST_TABLE_ITEMS (88)
+
+/** \brief Maximum number of tracked SRAM addresses (ETTR)
+ */
+#define IFXMTU_MAX_TRACKED_ADDRESSES (5)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief MBIST Selection
+ */
+typedef enum
+{
+ IfxMtu_MbistSel_none = -1,
+ IfxMtu_MbistSel_cpu1Dspr = 6,
+ IfxMtu_MbistSel_cpu1Dtag = 8,
+ IfxMtu_MbistSel_cpu1Pspr = 9,
+ IfxMtu_MbistSel_cpu1Ptag = 11,
+ IfxMtu_MbistSel_cpu0Dspr = 14,
+ IfxMtu_MbistSel_cpu0Pspr = 16,
+ IfxMtu_MbistSel_cpu0Ptag = 17,
+ IfxMtu_MbistSel_ethermac = 22,
+ IfxMtu_MbistSel_mod4 = 26,
+ IfxMtu_MbistSel_gtmFifo = 28,
+ IfxMtu_MbistSel_gtmMcs0 = 29,
+ IfxMtu_MbistSel_gtmMcs1 = 30,
+ IfxMtu_MbistSel_gtmDpll1a = 31,
+ IfxMtu_MbistSel_gtmDpll1b = 32,
+ IfxMtu_MbistSel_gtmDpll2 = 33,
+ IfxMtu_MbistSel_psi5 = 34,
+ IfxMtu_MbistSel_mcan = 36,
+ IfxMtu_MbistSel_erayObf = 38,
+ IfxMtu_MbistSel_erayIbfTbf = 39,
+ IfxMtu_MbistSel_erayMbf = 40,
+ IfxMtu_MbistSel_stdbyRam1 = 44,
+ IfxMtu_MbistSel_mcds = 45,
+ IfxMtu_MbistSel_emem0 = 46,
+ IfxMtu_MbistSel_emem1 = 47,
+ IfxMtu_MbistSel_emem2 = 48,
+ IfxMtu_MbistSel_emem3 = 49,
+ IfxMtu_MbistSel_emem4 = 50,
+ IfxMtu_MbistSel_emem5 = 51,
+ IfxMtu_MbistSel_emem6 = 52,
+ IfxMtu_MbistSel_emem7 = 53,
+ IfxMtu_MbistSel_cifJpeg1_4 = 78,
+ IfxMtu_MbistSel_cifJpeg3 = 80,
+ IfxMtu_MbistSel_cifCif = 81,
+ IfxMtu_MbistSel_stdbyRam2 = 82,
+ IfxMtu_MbistSel_dma = 83,
+ IfxMtu_MbistSel_ememXtm0 = 84,
+ IfxMtu_MbistSel_ememXtm1 = 85,
+ IfxMtu_MbistSel_fft0 = 86,
+ IfxMtu_MbistSel_fft1 = 87
+} IfxMtu_MbistSel;
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \brief Describes physical parameters of a SRAM memory
+ */
+typedef struct
+{
+ uint8 numBlocks; /**< \brief number of SRAM blocks */
+ uint16 dataSize; /**< \brief Data Size of each memory block */
+ uint8 eccSize; /**< \brief ECC Size of each memory block */
+ uint8 eccInvPos0; /**< \brief First ECC bit which needs to be inverted */
+ uint8 eccInvPos1; /**< \brief Second ECC bit which needs to be inverted */
+ uint32 mbistDelay; /**< \brief Mbist Delay */
+} IfxMtu_SramItem;
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN const IfxMtu_SramItem IfxMtu_sramTable[IFXMTU_NUM_MBIST_TABLE_ITEMS];
+
+#endif /* IFXMTU_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMultican_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMultican_cfg.c
new file mode 100644
index 0000000..c3243a5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMultican_cfg.c
@@ -0,0 +1,57 @@
+/**
+ * \file IfxMultican_cfg.c
+ * \brief MULTICAN on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxMultican_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES] = {
+ {&MODULE_CAN, (uint32)IfxMultican_Index_0}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMultican_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMultican_cfg.h
new file mode 100644
index 0000000..fb37c6b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxMultican_cfg.h
@@ -0,0 +1,139 @@
+/**
+ * \file IfxMultican_cfg.h
+ * \brief MULTICAN on-chip implementation data
+ * \ingroup IfxLld_Multican
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Multican MULTICAN
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Multican_Impl Implementation
+ * \ingroup IfxLld_Multican
+ * \defgroup IfxLld_Multican_Std Standard Driver
+ * \ingroup IfxLld_Multican
+ */
+
+#ifndef IFXMULTICAN_CFG_H
+#define IFXMULTICAN_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxCan_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Number of CAN message objects
+ */
+#define IFXMULTICAN_NUM_MESSAGE_OBJECTS (256)
+
+/** \brief Number of CAN nodes
+ */
+#define IFXMULTICAN_NUM_NODES (5)
+
+/** \brief Number of service requests
+ */
+#define IFXMULTICAN_NUM_SRC (16)
+
+#define IFXMULTICAN_NUM_MODULES (1)
+
+/** \brief Number of CANR service requests
+ */
+#define IFXMULTICAN_R_NUM_SRC (8)
+
+
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief List of the available multican resource.
+ */
+typedef enum
+{
+ IfxMultican_Index_none = -1, /**< \brief Not Selected */
+ IfxMultican_Index_0 = 0, /**< \brief MULTICAN index 0 */
+} IfxMultican_Index;
+
+/** \brief CAN Nodes definition
+ */
+typedef enum
+{
+ IfxMultican_NodeId_none = -1, /**< \brief None of the Ifx_CAN Nodes */
+ IfxMultican_NodeId_0 = 0, /**< \brief Ifx_CAN Node 0 */
+ IfxMultican_NodeId_1, /**< \brief Ifx_CAN Node 1 */
+ IfxMultican_NodeId_2, /**< \brief Ifx_CAN Node 2 */
+ IfxMultican_NodeId_3 /**< \brief Ifx_CAN Node 3 */
+} IfxMultican_NodeId;
+
+/** \brief Service request ID
+ */
+typedef enum
+{
+ IfxMultican_SrcId_0 = 0, /**< \brief Service request ID 0 */
+ IfxMultican_SrcId_1, /**< \brief Service request ID 1 */
+ IfxMultican_SrcId_2, /**< \brief Service request ID 2 */
+ IfxMultican_SrcId_3, /**< \brief Service request ID 3 */
+ IfxMultican_SrcId_4, /**< \brief Service request ID 4 */
+ IfxMultican_SrcId_5, /**< \brief Service request ID 5 */
+ IfxMultican_SrcId_6, /**< \brief Service request ID 6 */
+ IfxMultican_SrcId_7, /**< \brief Service request ID 7 */
+ IfxMultican_SrcId_8, /**< \brief Service request ID 8 */
+ IfxMultican_SrcId_9, /**< \brief Service request ID 9 */
+ IfxMultican_SrcId_10, /**< \brief Service request ID 10 */
+ IfxMultican_SrcId_11, /**< \brief Service request ID 11 */
+ IfxMultican_SrcId_12, /**< \brief Service request ID 12 */
+ IfxMultican_SrcId_13, /**< \brief Service request ID 13 */
+ IfxMultican_SrcId_14, /**< \brief Service request ID 14 */
+ IfxMultican_SrcId_15 /**< \brief Service request ID 15 */
+} IfxMultican_SrcId;
+
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxMultican_cfg_indexMap[IFXMULTICAN_NUM_MODULES];
+
+
+#endif /* IFXMULTICAN_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPort_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPort_cfg.c
new file mode 100644
index 0000000..a63ddc8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPort_cfg.c
@@ -0,0 +1,88 @@
+/**
+ * \file IfxPort_cfg.c
+ * \brief PORT on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxPort_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES] = {
+ {&MODULE_P00, 0x0000FFFFUL}, // Port 00
+ {&MODULE_P02, 0x0000FFFFUL}, // Port 02
+ {&MODULE_P10, 0x0000FFFFUL}, // Port 10
+ {&MODULE_P11, 0x0000FFFFUL}, // Port 11
+ {&MODULE_P13, 0x0000FFFFUL}, // Port 13
+ {&MODULE_P14, 0x0000FFFFUL}, // Port 14
+ {&MODULE_P15, 0x0000FFFFUL}, // Port 15
+ {&MODULE_P20, 0x0000FFFFUL}, // Port 20
+ {&MODULE_P21, 0x0000FFFFUL}, // Port 21
+ {&MODULE_P22, 0x0000FFFFUL}, // Port 22
+ {&MODULE_P23, 0x0000FFFFUL}, // Port 23
+ {&MODULE_P32, 0x0000FFFFUL}, // Port 32
+ {&MODULE_P33, 0x0000FFFFUL}, // Port 33
+ //{&MODULE_P40, 0x0000FFFFUL} // Port 40
+};
+
+IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES] = {
+ {&MODULE_P00, IfxPort_Index_00}, // Port 00
+ {&MODULE_P02, IfxPort_Index_02}, // Port 02
+ {&MODULE_P10, IfxPort_Index_10}, // Port 10
+ {&MODULE_P11, IfxPort_Index_11}, // Port 11
+ {&MODULE_P13, IfxPort_Index_13}, // Port 13
+ {&MODULE_P14, IfxPort_Index_14}, // Port 14
+ {&MODULE_P15, IfxPort_Index_15}, // Port 15
+ {&MODULE_P20, IfxPort_Index_20}, // Port 20
+ {&MODULE_P21, IfxPort_Index_21}, // Port 21
+ {&MODULE_P22, IfxPort_Index_22}, // Port 22
+ {&MODULE_P23, IfxPort_Index_23}, // Port 23
+ {&MODULE_P32, IfxPort_Index_32}, // Port 32
+ {&MODULE_P33, IfxPort_Index_33} // Port 33
+ //{&MODULE_P40, 40} // Port 40
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPort_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPort_cfg.h
new file mode 100644
index 0000000..8ce0f6c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPort_cfg.h
@@ -0,0 +1,117 @@
+/**
+ * \file IfxPort_cfg.h
+ * \brief PORT on-chip implementation data
+ * \ingroup IfxLld_Port
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Port PORTS
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Port_Impl Implementation
+ * \ingroup IfxLld_Port
+ * \defgroup IfxLld_Port_Std Standard Driver
+ * \ingroup IfxLld_Port
+ */
+
+#ifndef IFXPORT_CFG_H
+#define IFXPORT_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxPort_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Port count \ingroup IfxLld_port_cfg
+ */
+#define IFXPORT_NUM_MODULES (13)
+
+#define IFXPORT_OUTOUTFEATURE_NONE (0xFFFFFFFF)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief List of the available Port resources
+ */
+typedef enum
+{
+ IfxPort_Index_00 = 0, /**< \brief PORT 00 */
+ IfxPort_Index_02 = 2, /**< \brief PORT 02 */
+ IfxPort_Index_10 = 10, /**< \brief PORT 10 */
+ IfxPort_Index_11 = 11, /**< \brief PORT 11 */
+ IfxPort_Index_13 = 13, /**< \brief PORT 13 */
+ IfxPort_Index_14 = 14, /**< \brief PORT 14 */
+ IfxPort_Index_15 = 15, /**< \brief PORT 15 */
+ IfxPort_Index_20 = 20, /**< \brief PORT 20 */
+ IfxPort_Index_21 = 21, /**< \brief PORT 21 */
+ IfxPort_Index_22 = 22, /**< \brief PORT 22 */
+ IfxPort_Index_23 = 23, /**< \brief PORT 23 */
+ IfxPort_Index_32 = 32, /**< \brief PORT 32 */
+ IfxPort_Index_33 = 33, /**< \brief PORT 33 */
+ IfxPort_Index_none = -1 /**< \brief none */
+} IfxPort_Index;
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+
+/** \brief used by IfxPort_Esr_Masks table
+ */
+typedef struct
+{
+ Ifx_P *port;
+ uint16 masks;
+} IfxPort_Esr_Masks;
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxPort_Esr_Masks IfxPort_cfg_esrMasks[IFXPORT_NUM_MODULES];
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxPort_cfg_indexMap[IFXPORT_NUM_MODULES];
+
+#endif /* IFXPORT_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5_cfg.c
new file mode 100644
index 0000000..a3a5cd4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5_cfg.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxPsi5_cfg.c
+ * \brief PSI5 on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxPsi5_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5_cfg.h
new file mode 100644
index 0000000..462ba12
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5_cfg.h
@@ -0,0 +1,99 @@
+/**
+ * \file IfxPsi5_cfg.h
+ * \brief PSI5 on-chip implementation data
+ * \ingroup IfxLld_Psi5
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Psi5 PSI5
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Psi5_Impl Implementation
+ * \ingroup IfxLld_Psi5
+ * \defgroup IfxLld_Psi5_Std Standard Driver
+ * \ingroup IfxLld_Psi5
+ * \defgroup IfxLld_Psi5_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Psi5_Impl
+ */
+
+#ifndef IFXPSI5_CFG_H
+#define IFXPSI5_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXPSI5_STEP_RANGE 1024
+
+#define IFXPSI5_NUM_WDTS 7
+
+#define IFXPSI5_NUM_SLOTS 6
+
+#define IFXPSI5_ENABLE_CHANNELTRIGGER (1 << 8)
+
+#define IFXPSI5_ENABLE_CHANNEL (1 << 16)
+
+#define IFXPSI5_DEFAULT_SLOWCLOCK_FREQ 4000000
+
+#define IFXPSI5_DEFAULT_FASTCLOCK_FREQ 6000000
+
+#define IFXPSI5_DEFAULT_TIMESTAMP_FREQ 1000000
+
+#define IFXPSI5_NUM_CHANNELS 3
+
+#define IFXPSI5_NUM_MODULES (1)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief Channel Id
+ */
+typedef enum
+{
+ IfxPsi5_ChannelId_none = -1, /**< \brief None of the Ifx_PSI5 Channels */
+ IfxPsi5_ChannelId_0 = 0, /**< \brief Specifies PSI5 channel 0 */
+ IfxPsi5_ChannelId_1 = 1, /**< \brief Specifies PSI5 channel 1 */
+ IfxPsi5_ChannelId_2 = 2 /**< \brief Specifies PSI5 channel 2 */
+} IfxPsi5_ChannelId;
+
+#endif /* IFXPSI5_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5s_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5s_cfg.h
new file mode 100644
index 0000000..4a5e200
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxPsi5s_cfg.h
@@ -0,0 +1,95 @@
+/**
+ * \file IfxPsi5s_cfg.h
+ * \brief PSI5S on-chip implementation data
+ * \ingroup IfxLld_Psi5s
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Psi5s PSI5S
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Psi5s_Impl Implementation
+ * \ingroup IfxLld_Psi5s
+ * \defgroup IfxLld_Psi5s_Std Standard Driver
+ * \ingroup IfxLld_Psi5s
+ */
+
+#ifndef IFXPSI5S_CFG_H
+#define IFXPSI5S_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXPSI5S_NUM_CHANNELS 8
+
+#define IFXPSI5S_STEP_RANGE 1024
+
+#define IFXPSI5S_NUM_WDTS 7
+
+#define IFXPSI5S_NUM_SLOTS 6
+
+#define IFXPSI5S_ENABLE_CHANNELTRIGGER (1 << 8)
+
+#define IFXPSI5S_ENABLE_CHANNEL (1 << 16)
+
+#define IFXPSI5S_BG_RANGE 8192
+
+#define IFXPSI5S_FDV_RANGE 2048
+
+#define IFXPSI5S_BAUDRATE_1562500 1562500
+
+/** \brief //0x00FF0000
+ */
+#define IFXPSI5S_GCR_CHANNELS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 16
+
+ #define IFXPSI5S_GCR_CHANNEL_TRIGGER_COUNTERS_ENABLE_MASK ((1 << IFXPSI5S_NUM_CHANNELS) - 1) << 8
+
+ #define IFXPSI5S_DEFAULT_SLOWCLOCK_FREQ 4000000
+
+ #define IFXPSI5S_DEFAULT_FASTCLOCK_FREQ 6000000
+
+ #define IFXPSI5S_DEFAULT_TIMESTAMP_FREQ 1000000
+
+ #define IFXPSI5S_NUM_MODULES (1)
+
+#endif /* IFXPSI5S_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxQspi_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxQspi_cfg.c
new file mode 100644
index 0000000..b8421ba
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxQspi_cfg.c
@@ -0,0 +1,60 @@
+/**
+ * \file IfxQspi_cfg.c
+ * \brief QSPI on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxQspi_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES] = {
+ {&MODULE_QSPI0, IfxQspi_Index_0},
+ {&MODULE_QSPI1, IfxQspi_Index_1},
+ {&MODULE_QSPI2, IfxQspi_Index_2},
+ {&MODULE_QSPI3, IfxQspi_Index_3}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxQspi_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxQspi_cfg.h
new file mode 100644
index 0000000..e137d4d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxQspi_cfg.h
@@ -0,0 +1,95 @@
+/**
+ * \file IfxQspi_cfg.h
+ * \brief QSPI on-chip implementation data
+ * \ingroup IfxLld_Qspi
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Qspi QSPI
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Qspi_Impl Implementation
+ * \ingroup IfxLld_Qspi
+ * \defgroup IfxLld_Qspi_Std Standard Driver
+ * \ingroup IfxLld_Qspi
+ * \defgroup IfxLld_Qspi_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Qspi_Impl
+ */
+
+#ifndef IFXQSPI_CFG_H
+#define IFXQSPI_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+#include "IfxQspi_reg.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXQSPI_HWFIFO_DEPTH (4)
+
+#define IFXQSPI_NUM_MODULES (4)
+
+#define IFXQSPI_NUM_CHANNELS (16)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief List of the available QSPI resources
+ */
+typedef enum
+{
+ IfxQspi_Index_none = -1, /**< \brief Not Selected */
+ IfxQspi_Index_0 = 0, /**< \brief QSPI index 0 */
+ IfxQspi_Index_1, /**< \brief QSPI index 1 */
+ IfxQspi_Index_2, /**< \brief QSPI index 2 */
+ IfxQspi_Index_3 /**< \brief QSPI index 3 */
+} IfxQspi_Index;
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxQspi_cfg_indexMap[IFXQSPI_NUM_MODULES];
+
+#endif /* IFXQSPI_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxScu_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxScu_cfg.c
new file mode 100644
index 0000000..4cd8bbd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxScu_cfg.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxScu_cfg.c
+ * \brief SCU on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxScu_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxScu_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxScu_cfg.h
new file mode 100644
index 0000000..7954f6f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxScu_cfg.h
@@ -0,0 +1,1419 @@
+/**
+ * \file IfxScu_cfg.h
+ * \brief SCU on-chip implementation data
+ * \ingroup IfxLld_Scu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2012 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Scu SCU
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Scu_Impl Implementation
+ * \ingroup IfxLld_Scu
+ * \defgroup IfxLld_Scu_Std Standard Driver
+ * \ingroup IfxLld_Scu
+ */
+
+#ifndef IFXSCU_CFG_H
+#define IFXSCU_CFG_H
+/******************************************************************************/
+#include "Ifx_Cfg.h"
+#include "IfxScu_bf.h"
+#include "IfxFlash_bf.h"
+
+/******************************************************************************/
+/* Macro */
+/******************************************************************************/
+#ifndef IFX_CFG_SCU_XTAL_FREQUENCY
+# define IFX_CFG_SCU_XTAL_FREQUENCY 20000000 /**< \brief Default External oscillator frequency */
+# warning "IFX_CFG_SCU_XTAL_FREQUENCY not specified in your IfxCfg.h file."
+# warning "Please doublecheck the external XTAL frequency with the default setting of 20 MHz!"
+#endif
+
+#ifndef IFX_CFG_SCU_PLL_FREQUENCY
+# define IFX_CFG_SCU_PLL_FREQUENCY 200000000 /**< \brief Default PLL frequency */
+#endif
+
+#define IFXSCU_VCO_BASE_FREQUENCY (100000000.0)
+#define IFXSCU_EVR_OSC_FREQUENCY (100000000.0)
+
+/*The following frequency is the PLL free running frequency */
+
+
+#define IFXSCU_PLL_FREERUNNING_FREQUENCY (100000000.0)
+
+/******************************************************************************/
+/** \brief Macros to configure Pll steps,
+ * Macros to configure the Pll steps for different profiles of Crystal frequency and
+ * target frequencies. This configuration is important for the current jump controll
+ * during clock throttling.
+ * \ref IfxScuCcu_PllStepsConfig
+ */
+
+/******************** Pll step for 16MHz crystal Configurations ********************************/
+#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ
+/** \brief Macro for Pll step for profile with 16MHz Crystal and 80MHz target */
+#define IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ \
+ { /*Step 0 Config: 80MHz*/ \
+ (8 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_80MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ
+/** \brief Macro for Pll step for profile with 16MHz Crystal and 133MHz target */
+#define IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ \
+ { /*Step 0 Config: 114MHz*/ \
+ (7 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 133MHz*/ \
+ (6 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_133MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ
+/** \brief Macro for Pll step for profile with 16MHz Crystal and 160MHz target */
+#define IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ \
+ { /*Step 1 Config: 128MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 160MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_160MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ
+/** \brief Macro for Pll step for profile with 16MHz Crystal and 200MHz target */
+#define IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ \
+ { /*Step 0 Config: 120MHz*/ \
+ (6 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 150MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 200MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_200MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ
+/** \brief Macro for Pll step for profile with 16MHz Crystal and 240MHz target */
+#define IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ \
+ { /*Step 0 Config: 144MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 180MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 240MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_16MHZ_240MHZ */
+
+/******************** Pll step 20MHz crystal Configurations ********************************/
+#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ
+/** \brief Macro for Pll step for profile with 20MHz Crystal and 80MHz target */
+#define IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ \
+ { /*Step 0 Config: 80MHz*/ \
+ (8 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_80MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ
+/** \brief Macro for Pll step for profile with 20MHz Crystal and 133MHz target */
+#define IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ \
+ { /*Step 0 Config: 114MHz*/ \
+ (7 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 133MHz*/ \
+ (6 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_133MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ
+/** \brief Macro for Pll step for profile with 20MHz Crystal and 160MHz target */
+#define IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ \
+ { /*Step 1 Config: 128MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 160MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_160MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ
+/** \brief Macro for Pll step for profile with 20MHz Crystal and 200MHz target */
+#define IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ \
+ { /*Step 0 Config: 120MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 150MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 200MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_200MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ
+/** \brief Macro for Pll step for profile with 20MHz Crystal and 240MHz target */
+#define IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ \
+ { /*Step 0 Config: 144MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 180MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 240MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_240MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ
+/** \brief Macro for Pll step for profile with 20MHz Crystal and 300MHz target */
+#define IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ \
+ { /*Step 0 Config: 150MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 200MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 300MHz*/ \
+ (2 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_20MHZ_300MHZ */
+
+/******************** Pll step for 40MHz crystal Configurations ********************************/
+#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ
+/** \brief Macro for Pll step for profile with 40MHz Crystal and 80MHz target */
+#define IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ \
+ { /*Step 0 Config: 80MHz*/ \
+ (8 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_80MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ
+/** \brief Macro for Pll step for profile with 40MHz Crystal and 133MHz target */
+#define IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ \
+ { /*Step 0 Config: 114MHz*/ \
+ (7 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 133MHz*/ \
+ (6 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_133MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ
+/** \brief Macro for Pll step for profile with 40MHz Crystal and 160MHz target */
+#define IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ \
+ { /*Step 1 Config: 128MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 160MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_160MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ
+/** \brief Macro for Pll step for profile with 40MHz Crystal and 200MHz target */
+#define IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ \
+ { /*Step 0 Config: 120MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 150MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 200MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_200MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ
+/** \brief Macro for Pll step for profile with 40MHz Crystal and 240MHz target */
+#define IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ \
+ { /*Step 0 Config: 144MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 180MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 240MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_240MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ
+/** \brief Macro for Pll step for profile with 40MHz Crystal and 300MHz target */
+#define IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ \
+ { /*Step 0 Config: 150MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 200MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 2 Config: 300MHz*/ \
+ (2 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_40MHZ_300MHZ */
+
+/******************** Pll step for 8MHz crystal Configurations ********************************/
+#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ
+/** \brief Macro for Pll step for profile with 8MHz Crystal and 80MHz target */
+#define IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ \
+ { /*Step 0 Config: 80MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_80MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ
+/** \brief Macro for Pll step for profile with 8MHz Crystal and 160MHz target */
+#define IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ \
+ { /*Step 0 Config: 100MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 160MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_160MHZ */
+
+#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ
+/** \brief Macro for Pll step for profile with 8MHz Crystal and 200MHz target */
+#define IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ \
+ { /*Step 0 Config: 120MHz*/ \
+ (5 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 0 Config: 150MHz*/ \
+ (4 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ }, \
+ { /*Step 1 Config: 200MHz*/ \
+ (3 - 1), /*uint8 k2Step;*/ \
+ 0.000100, /*float32 waitTime;*/ \
+ 0 /*IfxScu_PllStepsFunctionHook hookFunction;*/ \
+ },
+#endif /*#ifndef IFXSCU_CFG_PLL_STEPS_8MHZ_200MHZ */
+
+/** \brief Macros to configure Initial Pll step.
+ * Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are
+ * done for the internal Oscillator frequency.
+ * \ref IfxScuCcu_InitialStepConfig
+ */
+
+/****************** Initial Pll step for 16MHz crystal Configurations ******************************/
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ
+/** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 80MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(1 - 1), (40 - 1), (7 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_80MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ
+/** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 133MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(1 - 1), (50 - 1), (8 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_133MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ
+/** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 160MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(1 - 1), (40 - 1), (6 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_160MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ
+/** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 200MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(1 - 1), (50 - 1), (8 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_200MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ
+/** \brief Macro for Initial Pll step, for profile with 16MHz Crystal and 240MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(1 - 1), (45 - 1), (7 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_16MHZ_240MHZ */
+
+/****************** Initial Pll step for 20MHz crystal Configurations ******************************/
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ
+/** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 80MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(2 - 1), (64 - 1), (7 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_80MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ
+/** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 133MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(2 - 1), (80 - 1), (8 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_133MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ
+/** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 160MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(2 - 1), (64 - 1), (6 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_160MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ
+/** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 200MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(2 - 1), (60 - 1), (6 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_200MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ
+/** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 240MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(2 - 1), (72 - 1), (7 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_240MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ
+/** \brief Macro for Initial Pll step, for profile with 20MHz Crystal and 300MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(2 - 1), (60 - 1), (6 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_20MHZ_300MHZ */
+
+/****************** Initial Pll step for 40MHz crystal Configurations ******************************/
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ
+/** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 80MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(4 - 1), (64 - 1), (7 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_80MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ
+/** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 133MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(4 - 1), (80 - 1), (8 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_133MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ
+/** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 160MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(4 - 1), (64 - 1), (6 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_160MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ
+/** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 200MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(4 - 1), (60 - 1), (6 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_200MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ
+/** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 240MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(4 - 1), (72 - 1), (7 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_240MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ
+/** \brief Macro for Initial Pll step, for profile with 40MHz Crystal and 300MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(4 - 1), (60 - 1), (6 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_40MHZ_300MHZ */
+
+/****************** Initial Pll step for 8MHz crystal Configurations ******************************/
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ
+/** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 80MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime } ??*/\
+ {(1 - 1), (50 - 1), (5 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_80MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ
+/** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 160MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(1 - 1), (60 - 1), (5 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_160MHZ */
+
+#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ
+/** \brief Macro for Initial Pll step, for profile with 8MHz Crystal and 200MHz target */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ \
+/*{ uint8 pDivider, uint8 nDivider, uint8 k2Initial, float32 waitTime }*/\
+ {(1 - 1), (75 - 1), (6 - 1), 0.000200F}
+#endif /*#ifndef IFXSCU_CFG_PLL_INITIAL_STEP_8MHZ_200MHZ */
+
+/** \brief Macros to configure CCUCON registers.
+ * Macros to configure the Pll initial step, where the configuration of PDIV, NDIV and K2DIV are
+ * done for the internal Oscillator frequency.
+ * \ref IfxScuCcu_InitialStepConfig
+ */
+
+/** \brief Macros to configure CCUCON registers */
+
+#ifndef IFXSCU_CFG_MAXDIV_80MHZ
+/** \brief Macro to configure MAXDIV at 80MHz target frequency */
+#define IFXSCU_CFG_MAXDIV_80MHZ (1)
+#endif /*#ifndef IFXSCU_CFG_MAXDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_MAXDIV_133MHZ
+/** \brief Macro to configure MAXDIV at 133MHz target frequency */
+#define IFXSCU_CFG_MAXDIV_133MHZ (1)
+#endif /*#ifndef IFXSCU_CFG_MAXDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_MAXDIV_160MHZ
+/** \brief Macro to configure MAXDIV at 160MHz target frequency */
+#define IFXSCU_CFG_MAXDIV_160MHZ (1)
+#endif /*#ifndef IFXSCU_CFG_MAXDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_MAXDIV_200MHZ
+/** \brief Macro to configure MAXDIV at 200MHz target frequency */
+#define IFXSCU_CFG_MAXDIV_200MHZ (1)
+#endif /*#ifndef IFXSCU_CFG_MAXDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_MAXDIV_240MHZ
+/** \brief Macro to configure MAXDIV at 240MHz target frequency */
+#define IFXSCU_CFG_MAXDIV_240MHZ (1)
+#endif /*#ifndef IFXSCU_CFG_MAXDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_MAXDIV_300MHZ
+/** \brief Macro to configure MAXDIV at 300MHz target frequency */
+#define IFXSCU_CFG_MAXDIV_300MHZ (1)
+#endif /*#ifndef IFXSCU_CFG_MAXDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_SRIDIV_80MHZ
+/** \brief Macro to configure SRIDIV at 80MHz target frequency */
+#define IFXSCU_CFG_SRIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_SRIDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_SRIDIV_133MHZ
+/** \brief Macro to configure SRIDIV at 133MHz target frequency */
+#define IFXSCU_CFG_SRIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_SRIDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_SRIDIV_160MHZ
+/** \brief Macro to configure SRIDIV at 160MHz target frequency */
+#define IFXSCU_CFG_SRIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_SRIDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_SRIDIV_200MHZ
+/** \brief Macro to configure SRIDIV at 200MHz target frequency */
+#define IFXSCU_CFG_SRIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_SRIDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_SRIDIV_240MHZ
+/** \brief Macro to configure SRIDIV at 240MHz target frequency */
+#define IFXSCU_CFG_SRIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_SRIDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_SRIDIV_300MHZ
+/** \brief Macro to configure SRIDIV at 300MHz target frequency */
+#define IFXSCU_CFG_SRIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_SRIDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_BAUD1DIV_80MHZ
+/** \brief Macro to configure BAUD1DIV at 80MHz target frequency */
+#define IFXSCU_CFG_BAUD1DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_BAUD1DIV_80MHZ */
+
+#ifndef IFXSCU_CFG_BAUD1DIV_133MHZ
+/** \brief Macro to configure BAUD1DIV at 133MHz target frequency */
+#define IFXSCU_CFG_BAUD1DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_BAUD1DIV_133MHZ */
+
+#ifndef IFXSCU_CFG_BAUD1DIV_160MHZ
+/** \brief Macro to configure BAUD1DIV at 160MHz target frequency */
+#define IFXSCU_CFG_BAUD1DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_BAUD1DIV_160MHZ */
+
+#ifndef IFXSCU_CFG_BAUD1DIV_200MHZ
+/** \brief Macro to configure BAUD1DIV at 200MHz target frequency */
+#define IFXSCU_CFG_BAUD1DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_BAUD1DIV_200MHZ */
+
+#ifndef IFXSCU_CFG_BAUD1DIV_240MHZ
+/** \brief Macro to configure BAUD1DIV at 240MHz target frequency */
+#define IFXSCU_CFG_BAUD1DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_BAUD1DIV_240MHZ */
+
+#ifndef IFXSCU_CFG_BAUD1DIV_300MHZ
+/** \brief Macro to configure BAUD1DIV at 300MHz target frequency */
+#define IFXSCU_CFG_BAUD1DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_BAUD1DIV_300MHZ */
+
+#ifndef IFXSCU_CFG_BAUD2DIV_80MHZ
+/** \brief Macro to configure BAUD2DIV at 80MHz target frequency */
+#define IFXSCU_CFG_BAUD2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_BAUD2DIV_80MHZ */
+
+#ifndef IFXSCU_CFG_BAUD2DIV_133MHZ
+/** \brief Macro to configure BAUD2DIV at 133MHz target frequency */
+#define IFXSCU_CFG_BAUD2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_BAUD2DIV_133MHZ */
+
+#ifndef IFXSCU_CFG_BAUD2DIV_160MHZ
+/** \brief Macro to configure BAUD2DIV at 160MHz target frequency */
+#define IFXSCU_CFG_BAUD2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_BAUD2DIV_160MHZ */
+
+#ifndef IFXSCU_CFG_BAUD2DIV_200MHZ
+/** \brief Macro to configure BAUD2DIV at 200MHz target frequency */
+#define IFXSCU_CFG_BAUD2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_BAUD2DIV_200MHZ */
+
+#ifndef IFXSCU_CFG_BAUD2DIV_240MHZ
+/** \brief Macro to configure BAUD2DIV at 240MHz target frequency */
+#define IFXSCU_CFG_BAUD2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_BAUD2DIV_240MHZ */
+
+#ifndef IFXSCU_CFG_BAUD2DIV_300MHZ
+/** \brief Macro to configure BAUD2DIV at 300MHz target frequency */
+#define IFXSCU_CFG_BAUD2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_BAUD2DIV_300MHZ */
+
+#ifndef IFXSCU_CFG_SPBDIV_80MHZ
+/** \brief Macro to configure SPBDIV at 80MHz target frequency */
+#define IFXSCU_CFG_SPBDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_SPBDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_SPBDIV_133MHZ
+/** \brief Macro to configure SPBDIV at 133MHz target frequency */
+#define IFXSCU_CFG_SPBDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_SPBDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_SPBDIV_160MHZ
+/** \brief Macro to configure SPBDIV at 160MHz target frequency */
+#define IFXSCU_CFG_SPBDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_SPBDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_SPBDIV_200MHZ
+/** \brief Macro to configure SPBDIV at 200MHz target frequency */
+#define IFXSCU_CFG_SPBDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_SPBDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_SPBDIV_240MHZ
+/** \brief Macro to configure SPBDIV at 240MHz target frequency */
+#define IFXSCU_CFG_SPBDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_SPBDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_SPBDIV_300MHZ
+/** \brief Macro to configure SPBDIV at 300MHz target frequency */
+#define IFXSCU_CFG_SPBDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_SPBDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_FSI2DIV_80MHZ
+/** \brief Macro to configure FSI2DIV at 80MHz target frequency */
+#define IFXSCU_CFG_FSI2DIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_FSI2DIV_80MHZ */
+
+#ifndef IFXSCU_CFG_FSI2DIV_133MHZ
+/** \brief Macro to configure FSI2DIV at 133MHz target frequency */
+#define IFXSCU_CFG_FSI2DIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_FSI2DIV_133MHZ */
+
+#ifndef IFXSCU_CFG_FSI2DIV_160MHZ
+/** \brief Macro to configure FSI2DIV at 160MHz target frequency */
+#define IFXSCU_CFG_FSI2DIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_FSI2DIV_160MHZ */
+
+#ifndef IFXSCU_CFG_FSI2DIV_200MHZ
+/** \brief Macro to configure FSI2DIV at 200MHz target frequency */
+#define IFXSCU_CFG_FSI2DIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_FSI2DIV_200MHZ */
+
+#ifndef IFXSCU_CFG_FSI2DIV_240MHZ
+/** \brief Macro to configure FSI2DIV at 240MHz target frequency */
+#define IFXSCU_CFG_FSI2DIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_FSI2DIV_240MHZ */
+
+#ifndef IFXSCU_CFG_FSI2DIV_300MHZ
+/** \brief Macro to configure FSI2DIV at 300MHz target frequency */
+#define IFXSCU_CFG_FSI2DIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_FSI2DIV_300MHZ */
+
+#ifndef IFXSCU_CFG_FSIDIV_80MHZ
+/** \brief Macro to configure FSIDIV at 80MHz target frequency */
+#define IFXSCU_CFG_FSIDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_FSIDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_FSIDIV_133MHZ
+/** \brief Macro to configure FSIDIV at 133MHz target frequency */
+#define IFXSCU_CFG_FSIDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_FSIDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_FSIDIV_160MHZ
+/** \brief Macro to configure FSIDIV at 160MHz target frequency */
+#define IFXSCU_CFG_FSIDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_FSIDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_FSIDIV_200MHZ
+/** \brief Macro to configure FSIDIV at 200MHz target frequency */
+#define IFXSCU_CFG_FSIDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_FSIDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_FSIDIV_240MHZ
+/** \brief Macro to configure FSIDIV at 240MHz target frequency */
+#define IFXSCU_CFG_FSIDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_FSIDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_FSIDIV_300MHZ
+/** \brief Macro to configure FSIDIV at 300MHz target frequency */
+#define IFXSCU_CFG_FSIDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_FSIDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_CANDIV_80MHZ
+/** \brief Macro to configure CANDIV at 80MHz target frequency */
+#define IFXSCU_CFG_CANDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_CANDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_CANDIV_133MHZ
+/** \brief Macro to configure CANDIV at 133MHz target frequency */
+#define IFXSCU_CFG_CANDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_CANDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_CANDIV_160MHZ
+/** \brief Macro to configure CANDIV at 160MHz target frequency */
+#define IFXSCU_CFG_CANDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_CANDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_CANDIV_200MHZ
+/** \brief Macro to configure CANDIV at 200MHz target frequency */
+#define IFXSCU_CFG_CANDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_CANDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_CANDIV_240MHZ
+/** \brief Macro to configure CANDIV at 240MHz target frequency */
+#define IFXSCU_CFG_CANDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_CANDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_CANDIV_300MHZ
+/** \brief Macro to configure CANDIV at 200MHz target frequency */
+#define IFXSCU_CFG_CANDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_CANDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_ERAYDIV_80MHZ
+/** \brief Macro to configure ERAYDIV at 80MHz target frequency */
+#define IFXSCU_CFG_ERAYDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 80MHz */
+#endif /*#ifndef IFXSCU_CFG_ERAYDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_ERAYDIV_133MHZ
+/** \brief Macro to configure ERAYDIV at 133MHz target frequency */
+#define IFXSCU_CFG_ERAYDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 80MHz */
+#endif /*#ifndef IFXSCU_CFG_ERAYDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_ERAYDIV_160MHZ
+/** \brief Macro to configure ERAYDIV at 160MHz target frequency */
+#define IFXSCU_CFG_ERAYDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 80MHz */
+#endif /*#ifndef IFXSCU_CFG_ERAYDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_ERAYDIV_200MHZ
+/** \brief Macro to configure ERAYDIV at 200MHz target frequency */
+#define IFXSCU_CFG_ERAYDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 3) /*Max: 80MHz */
+#endif /*#ifndef IFXSCU_CFG_ERAYDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_ERAYDIV_240MHZ
+/** \brief Macro to configure ERAYDIV at 200MHz target frequency */
+#define IFXSCU_CFG_ERAYDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 80MHz */
+#endif /*#ifndef IFXSCU_CFG_ERAYDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_ERAYDIV_300MHZ
+/** \brief Macro to configure ERAYDIV at 300MHz target frequency */
+#define IFXSCU_CFG_ERAYDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 4) /*Max: 80MHz */
+#endif /*#ifndef IFXSCU_CFG_ERAYDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_STMDIV_80MHZ
+/** \brief Macro to configure STMDIV at 80MHz target frequency */
+#define IFXSCU_CFG_STMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_STMDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_STMDIV_133MHZ
+/** \brief Macro to configure STMDIV at 133MHz target frequency */
+#define IFXSCU_CFG_STMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_STMDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_STMDIV_160MHZ
+/** \brief Macro to configure STMDIV at 160MHz target frequency */
+#define IFXSCU_CFG_STMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_STMDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_STMDIV_200MHZ
+/** \brief Macro to configure STMDIV at 200MHz target frequency */
+#define IFXSCU_CFG_STMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_STMDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_STMDIV_240MHZ
+/** \brief Macro to configure STMDIV at 240MHz target frequency */
+#define IFXSCU_CFG_STMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_STMDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_STMDIV_300MHZ
+/** \brief Macro to configure STMDIV at 300MHz target frequency */
+#define IFXSCU_CFG_STMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_STMDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_GTMDIV_80MHZ
+/** \brief Macro to configure GTMDIV at 80MHz target frequency */
+#define IFXSCU_CFG_GTMDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_GTMDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_GTMDIV_133MHZ
+/** \brief Macro to configure GTMDIV at 133MHz target frequency */
+#define IFXSCU_CFG_GTMDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_GTMDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_GTMDIV_160MHZ
+/** \brief Macro to configure GTMDIV at 160MHz target frequency */
+#define IFXSCU_CFG_GTMDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_GTMDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_GTMDIV_200MHZ
+/** \brief Macro to configure GTMDIV at 200MHz target frequency */
+#define IFXSCU_CFG_GTMDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_GTMDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_GTMDIV_240MHZ
+/** \brief Macro to configure GTMDIV at 240MHz target frequency */
+#define IFXSCU_CFG_GTMDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_GTMDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_GTMDIV_300MHZ
+/** \brief Macro to configure GTMDIV at 300MHz target frequency */
+#define IFXSCU_CFG_GTMDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_GTMDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_ETHDIV_80MHZ
+/** \brief Macro to configure ETHDIV at 80MHz target frequency */
+#define IFXSCU_CFG_ETHDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ * 2)
+#endif /*#ifndef IFXSCU_CFG_ETHDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_ETHDIV_133MHZ
+/** \brief Macro to configure ETHDIV at 133MHz target frequency */
+#define IFXSCU_CFG_ETHDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 3)
+#endif /*#ifndef IFXSCU_CFG_ETHDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_ETHDIV_160MHZ
+/** \brief Macro to configure ETHDIV at 160MHz target frequency */
+#define IFXSCU_CFG_ETHDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 4)
+#endif /*#ifndef IFXSCU_CFG_ETHDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_ETHDIV_200MHZ
+/** \brief Macro to configure ETHDIV at 200MHz target frequency */
+#define IFXSCU_CFG_ETHDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 4)
+#endif /*#ifndef IFXSCU_CFG_ETHDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_ETHDIV_240MHZ
+/** \brief Macro to configure ETHDIV at 240MHz target frequency */
+#define IFXSCU_CFG_ETHDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 5)
+#endif /*#ifndef IFXSCU_CFG_ETHDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_ETHDIV_300MHZ
+/** \brief Macro to configure ETHDIV at 300MHz target frequency */
+#define IFXSCU_CFG_ETHDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 6)
+#endif /*#ifndef IFXSCU_CFG_ETHDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINFDIV_80MHZ
+/** \brief Macro to configure ASCLINFDIV at 80MHz target frequency */
+#define IFXSCU_CFG_ASCLINFDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINFDIV_133MHZ
+/** \brief Macro to configure ASCLINFDIV at 133MHz target frequency */
+#define IFXSCU_CFG_ASCLINFDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINFDIV_160MHZ
+/** \brief Macro to configure ASCLINFDIV at 160MHz target frequency */
+#define IFXSCU_CFG_ASCLINFDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINFDIV_200MHZ
+/** \brief Macro to configure ASCLINFDIV at 200MHz target frequency */
+#define IFXSCU_CFG_ASCLINFDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINFDIV_240MHZ
+/** \brief Macro to configure ASCLINFDIV at 240MHz target frequency */
+#define IFXSCU_CFG_ASCLINFDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINFDIV_300MHZ
+/** \brief Macro to configure ASCLINFDIV at 300MHz target frequency */
+#define IFXSCU_CFG_ASCLINFDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ) /*Same as MAXDIV */
+#endif /*#ifndef IFXSCU_CFG_ASCLINFDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINSDIV_80MHZ
+/** \brief Macro to configure ASCLINSDIV at 80MHz target frequency */
+#define IFXSCU_CFG_ASCLINSDIV_80MHZ (IFXSCU_CFG_MAXDIV_80MHZ) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINSDIV_133MHZ
+/** \brief Macro to configure ASCLINSDIV at 133MHz target frequency */
+#define IFXSCU_CFG_ASCLINSDIV_133MHZ (IFXSCU_CFG_MAXDIV_133MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINSDIV_160MHZ
+/** \brief Macro to configure ASCLINSDIV at 160MHz target frequency */
+#define IFXSCU_CFG_ASCLINSDIV_160MHZ (IFXSCU_CFG_MAXDIV_160MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ
+/** \brief Macro to configure ASCLINSDIV at 200MHz target frequency */
+#define IFXSCU_CFG_ASCLINSDIV_200MHZ (IFXSCU_CFG_MAXDIV_200MHZ * 2) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINSDIV_240MHZ
+/** \brief Macro to configure ASCLINSDIV at 240MHz target frequency */
+#define IFXSCU_CFG_ASCLINSDIV_240MHZ (IFXSCU_CFG_MAXDIV_240MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_ASCLINSDIV_300MHZ
+/** \brief Macro to configure ASCLINSDIV at 300MHz target frequency */
+#define IFXSCU_CFG_ASCLINSDIV_300MHZ (IFXSCU_CFG_MAXDIV_300MHZ * 3) /*Max: 100MHz */
+#endif /*#ifndef IFXSCU_CFG_ASCLINSDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_BBBDIV_80MHZ
+/** \brief Macro to configure BBBDIV at 80MHz target frequency */
+#define IFXSCU_CFG_BBBDIV_80MHZ (IFXSCU_CFG_SRIDIV_80MHZ * 2)
+#endif /*#ifndef IFXSCU_CFG_BBBDIV_80MHZ */
+
+#ifndef IFXSCU_CFG_BBBDIV_133MHZ
+/** \brief Macro to configure BBBDIV at 133MHz target frequency */
+#define IFXSCU_CFG_BBBDIV_133MHZ (IFXSCU_CFG_SRIDIV_133MHZ * 2)
+#endif /*#ifndef IFXSCU_CFG_BBBDIV_133MHZ */
+
+#ifndef IFXSCU_CFG_BBBDIV_160MHZ
+/** \brief Macro to configure BBBDIV at 160MHz target frequency */
+#define IFXSCU_CFG_BBBDIV_160MHZ (IFXSCU_CFG_SRIDIV_160MHZ * 2)
+#endif /*#ifndef IFXSCU_CFG_BBBDIV_160MHZ */
+
+#ifndef IFXSCU_CFG_BBBDIV_200MHZ
+/** \brief Macro to configure BBBDIV at 200MHz target frequency */
+#define IFXSCU_CFG_BBBDIV_200MHZ (IFXSCU_CFG_SRIDIV_200MHZ * 2)
+#endif /*#ifndef IFXSCU_CFG_BBBDIV_200MHZ */
+
+#ifndef IFXSCU_CFG_BBBDIV_240MHZ
+/** \brief Macro to configure BBBDIV at 240MHz target frequency */
+#define IFXSCU_CFG_BBBDIV_240MHZ (IFXSCU_CFG_SRIDIV_240MHZ * 2)
+#endif /*#ifndef IFXSCU_CFG_BBBDIV_240MHZ */
+
+#ifndef IFXSCU_CFG_BBBDIV_300MHZ
+/** \brief Macro to configure BBBDIV at 300MHz target frequency */
+#define IFXSCU_CFG_BBBDIV_300MHZ (IFXSCU_CFG_SRIDIV_300MHZ * 2)
+#endif /*#ifndef IFXSCU_CFG_BBBDIV_300MHZ */
+
+#ifndef IFXSCU_CFG_CPU0DIV_80MHZ
+/** \brief Macro to configure CPU0DIV at 80MHz target frequency */
+#define IFXSCU_CFG_CPU0DIV_80MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU0DIV_80MHZ */
+
+#ifndef IFXSCU_CFG_CPU0DIV_133MHZ
+/** \brief Macro to configure CPU0DIV at 133MHz target frequency */
+#define IFXSCU_CFG_CPU0DIV_133MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU0DIV_133MHZ */
+
+#ifndef IFXSCU_CFG_CPU0DIV_160MHZ
+/** \brief Macro to configure CPU0DIV at 160MHz target frequency */
+#define IFXSCU_CFG_CPU0DIV_160MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU0DIV_160MHZ */
+
+#ifndef IFXSCU_CFG_CPU0DIV_200MHZ
+/** \brief Macro to configure CPU0DIV at 200MHz target frequency */
+#define IFXSCU_CFG_CPU0DIV_200MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU0DIV_200MHZ */
+
+#ifndef IFXSCU_CFG_CPU0DIV_240MHZ
+/** \brief Macro to configure CPU0DIV at 240MHz target frequency */
+#define IFXSCU_CFG_CPU0DIV_240MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU0DIV_240MHZ */
+
+#ifndef IFXSCU_CFG_CPU0DIV_300MHZ
+/** \brief Macro to configure CPU0DIV at 300MHz target frequency */
+#define IFXSCU_CFG_CPU0DIV_300MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU0DIV_300MHZ */
+
+#ifndef IFXSCU_CFG_CPU1DIV_80MHZ
+/** \brief Macro to configure CPU1DIV at 80MHz target frequency */
+#define IFXSCU_CFG_CPU1DIV_80MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU1DIV_80MHZ */
+
+#ifndef IFXSCU_CFG_CPU1DIV_133MHZ
+/** \brief Macro to configure CPU1DIV at 133MHz target frequency */
+#define IFXSCU_CFG_CPU1DIV_133MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU1DIV_133MHZ */
+
+#ifndef IFXSCU_CFG_CPU1DIV_160MHZ
+/** \brief Macro to configure CPU1DIV at 160MHz target frequency */
+#define IFXSCU_CFG_CPU1DIV_160MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU1DIV_160MHZ */
+
+#ifndef IFXSCU_CFG_CPU1DIV_200MHZ
+/** \brief Macro to configure CPU1DIV at 200MHz target frequency */
+#define IFXSCU_CFG_CPU1DIV_200MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU1DIV_200MHZ */
+
+#ifndef IFXSCU_CFG_CPU1DIV_240MHZ
+/** \brief Macro to configure CPU1DIV at 240MHz target frequency */
+#define IFXSCU_CFG_CPU1DIV_240MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU1DIV_240MHZ */
+
+#ifndef IFXSCU_CFG_CPU1DIV_300MHZ
+/** \brief Macro to configure CPU1DIV at 300MHz target frequency */
+#define IFXSCU_CFG_CPU1DIV_300MHZ (0) /*Same as SRIDIV */
+#endif /*#ifndef IFXSCU_CFG_CPU1DIV_300MHZ */
+
+/** \brief Macros to configure FLASH.FCON register for flash waitstate configuration.
+ * \ref IfxScuCcu_InitialStepConfig
+ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ
+/** \brief Macro to configure FCON.WSPFLASH at 80MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ (3 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_80MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ
+/** \brief Macro to configure FCON.WSPFLASH at 133MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ (4 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_133MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ
+/** \brief Macro to configure FCON.WSPFLASH at 160MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ (5 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_160MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ
+/** \brief Macro to configure FCON.WSPFLASH at 200MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ (6 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_200MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ
+/** \brief Macro to configure FCON.WSPFLASH at 240MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ (8 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_240MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ
+/** \brief Macro to configure FCON.WSPFLASH at 300MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ (9 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSPFLASH_300MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ
+/** \brief Macro to configure FCON.WSECP_ at 80MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ (1 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_80MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ
+/** \brief Macro to configure FCON.WSECPF at 133MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_133MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ
+/** \brief Macro to configure FCON.WSECPF at 160MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_160MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ
+/** \brief Macro to configure FCON.WSECPF at 200MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_200MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ
+/** \brief Macro to configure FCON.WSECPF_ at 240MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ (3 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_240MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ
+/** \brief Macro to configure FCON.WSECPF at 300MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ (3 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECPF_300MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ
+/** \brief Macro to configure FCON.WSDFLASH at 80MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ (16 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_80MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ
+/** \brief Macro to configure FCON.WSDFLASH_ at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ (14 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_133MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ
+/** \brief Macro to configure FCON.WSDFLASH at 160MHz target frequency, where fSRI= 160/2= 80MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ (16 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_160MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ
+/** \brief Macro to configure FCON.WSDFLASH at 200MHz target frequency, where fSRI= 200/2= 100MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ (20 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_200MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ
+/** \brief Macro to configure FCON.WSDFLASH at 240MHz target frequency, where fSRI= 240/3= 80MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ (16 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_240MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ
+/** \brief Macro to configure FCON.WSDFLASH at 300MHz target frequency, where fSRI= 300/3= 100MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ (20 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSDFLASH_300MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ
+/** \brief Macro to configure FCON.WSECDF at 80MHz target frequency */
+#define IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_80MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ
+/** \brief Macro to configure FCON.WSECDF at 133MHz target frequency, where fSRI= 133/2= 66.5MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_133MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ
+/** \brief Macro to configure FCON.WSECDF at 160MHz target frequency, where fSRI= 160/2= 80MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_160MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ
+/** \brief Macro to configure FCON.WSECDF at 200MHz target frequency, where fSRI= 200/2= 100MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_200MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ
+/** \brief Macro to configure FCON.WSECDF at 240MHz target frequency, where fSRI= 240/3= 80MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_240MHZ */
+
+#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ
+/** \brief Macro to configure FCON.WSECDF at 300MHz target frequency, where fSRI= 300/3= 100MHZ */
+#define IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ (2 - 1)
+#endif /*#ifndef IFXSCU_CFG_FLASH_FCON_WSECDF_300MHZ */
+
+/** \brief Macros to configure FLASH.FCON registers */
+#define IFXSCU_CFG_FLASH_WAITSTATE_MSK \
+ ( \
+ (IFX_FLASH_FCON_WSPFLASH_MSK << IFX_FLASH_FCON_WSPFLASH_OFF) | \
+ (IFX_FLASH_FCON_WSECPF_MSK << IFX_FLASH_FCON_WSECPF_OFF) | \
+ (IFX_FLASH_FCON_WSDFLASH_MSK << IFX_FLASH_FCON_WSDFLASH_OFF) | \
+ (IFX_FLASH_FCON_WSECDF_MSK << IFX_FLASH_FCON_WSECDF_OFF))
+
+#define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq) \
+ ( \
+ (IFXSCU_CFG_FLASH_FCON_WSPFLASH_##pllFreq << IFX_FLASH_FCON_WSPFLASH_OFF) | \
+ (IFXSCU_CFG_FLASH_FCON_WSECPF_##pllFreq << IFX_FLASH_FCON_WSECPF_OFF) | \
+ (IFXSCU_CFG_FLASH_FCON_WSDFLASH_##pllFreq << IFX_FLASH_FCON_WSDFLASH_OFF) | \
+ (IFXSCU_CFG_FLASH_FCON_WSECDF_##pllFreq << IFX_FLASH_FCON_WSECDF_OFF))
+
+#define IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(pllFreq) IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC_(pllFreq)
+
+#define IFXSCU_CFG_FLASH_WAITSTATE_VAL IFXSCU_CFG_FLASH_WAITSTATE_VAL_BASIC(IFXSCU_CFG_PLL_FREQ)
+
+/** \brief Macros to configure CCUCON0 Clock distribution */
+#define IFXSCU_CFG_CCUCON0_MASK \
+ ( \
+ (IFX_SCU_CCUCON0_BAUD1DIV_MSK << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
+ (IFX_SCU_CCUCON0_BAUD2DIV_MSK << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
+ (IFX_SCU_CCUCON0_SRIDIV_MSK << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
+ (IFX_SCU_CCUCON0_SPBDIV_MSK << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
+ (IFX_SCU_CCUCON0_FSI2DIV_MSK << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
+ (IFX_SCU_CCUCON0_FSIDIV_MSK << IFX_SCU_CCUCON0_FSIDIV_OFF))
+
+#define IFXSCU_CFG_CCUCON0_BASIC_(pllFreq) \
+ (uint32)( \
+ (IFXSCU_CFG_BAUD1DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD1DIV_OFF) | \
+ (IFXSCU_CFG_BAUD2DIV_##pllFreq << IFX_SCU_CCUCON0_BAUD2DIV_OFF) | \
+ (IFXSCU_CFG_SRIDIV_##pllFreq << IFX_SCU_CCUCON0_SRIDIV_OFF) | \
+ (IFXSCU_CFG_SPBDIV_##pllFreq << IFX_SCU_CCUCON0_SPBDIV_OFF) | \
+ (IFXSCU_CFG_FSI2DIV_##pllFreq << IFX_SCU_CCUCON0_FSI2DIV_OFF) | \
+ (IFXSCU_CFG_FSIDIV_##pllFreq << IFX_SCU_CCUCON0_FSIDIV_OFF))
+
+#define IFXSCU_CFG_CCUCON0_BASIC(pllFreq) IFXSCU_CFG_CCUCON0_BASIC_(pllFreq)
+
+#define IFXSCU_CFG_CCUCON0 IFXSCU_CFG_CCUCON0_BASIC(IFXSCU_CFG_PLL_FREQ)
+
+/** \brief Macros to configure CCUCON1 Clock distribution */
+#define IFXSCU_CFG_CCUCON1_MASK \
+ ( \
+ (IFX_SCU_CCUCON1_CANDIV_MSK << IFX_SCU_CCUCON1_CANDIV_OFF) | \
+ (IFX_SCU_CCUCON1_ERAYDIV_MSK << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
+ (IFX_SCU_CCUCON1_STMDIV_MSK << IFX_SCU_CCUCON1_STMDIV_OFF) | \
+ (IFX_SCU_CCUCON1_GTMDIV_MSK << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
+ (IFX_SCU_CCUCON1_ETHDIV_MSK << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
+ (IFX_SCU_CCUCON1_ASCLINFDIV_MSK << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
+ (IFX_SCU_CCUCON1_ASCLINSDIV_MSK << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))
+
+#define IFXSCU_CFG_CCUCON1_BASIC_(pllFreq) \
+ (uint32)( \
+ (IFXSCU_CFG_CANDIV_##pllFreq << IFX_SCU_CCUCON1_CANDIV_OFF) | \
+ (IFXSCU_CFG_ERAYDIV_80MHZ << IFX_SCU_CCUCON1_ERAYDIV_OFF) | \
+ (IFXSCU_CFG_STMDIV_##pllFreq << IFX_SCU_CCUCON1_STMDIV_OFF) | \
+ (IFXSCU_CFG_GTMDIV_##pllFreq << IFX_SCU_CCUCON1_GTMDIV_OFF) | \
+ (IFXSCU_CFG_ETHDIV_##pllFreq << IFX_SCU_CCUCON1_ETHDIV_OFF) | \
+ (IFXSCU_CFG_ASCLINFDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINFDIV_OFF) | \
+ (IFXSCU_CFG_ASCLINSDIV_##pllFreq << IFX_SCU_CCUCON1_ASCLINSDIV_OFF))
+
+#define IFXSCU_CFG_CCUCON1_BASIC(pllFreq) IFXSCU_CFG_CCUCON1_BASIC_(pllFreq)
+
+#define IFXSCU_CFG_CCUCON1 IFXSCU_CFG_CCUCON1_BASIC(IFXSCU_CFG_PLL_FREQ)
+
+/** \brief Macros to configure CCUCON2 Clock distribution */
+#define IFXSCU_CFG_CCUCON2_MASK \
+ ( \
+ (IFX_SCU_CCUCON2_BBBDIV_MSK << IFX_SCU_CCUCON2_BBBDIV_OFF))
+
+#define IFXSCU_CFG_CCUCON2_BASIC_(pllFreq) \
+ (uint32)( \
+ (IFXSCU_CFG_BBBDIV_##pllFreq << IFX_SCU_CCUCON2_BBBDIV_OFF))
+
+#define IFXSCU_CFG_CCUCON2_BASIC(pllFreq) IFXSCU_CFG_CCUCON2_BASIC_(pllFreq)
+
+#define IFXSCU_CFG_CCUCON2 IFXSCU_CFG_CCUCON2_BASIC(IFXSCU_CFG_PLL_FREQ)
+
+/** \brief Macros to configure CCUCON5 Clock distribution */
+#define IFXSCU_CFG_CCUCON5_MASK \
+ ( \
+ (IFX_SCU_CCUCON5_MAXDIV_MSK << IFX_SCU_CCUCON5_MAXDIV_OFF))
+
+#define IFXSCU_CFG_CCUCON5_BASIC_(pllFreq) \
+ (uint32)( \
+ (IFXSCU_CFG_MAXDIV_##pllFreq << IFX_SCU_CCUCON5_MAXDIV_OFF))
+
+#define IFXSCU_CFG_CCUCON5_BASIC(pllFreq) IFXSCU_CFG_CCUCON5_BASIC_(pllFreq)
+
+#define IFXSCU_CFG_CCUCON5 IFXSCU_CFG_CCUCON5_BASIC(IFXSCU_CFG_PLL_FREQ)
+
+/** \brief Macros to configure CCUCON6 Clock distribution */
+#define IFXSCU_CFG_CCUCON6_MASK \
+ ( \
+ (IFX_SCU_CCUCON6_CPU0DIV_MSK << IFX_SCU_CCUCON6_CPU0DIV_OFF))
+
+#define IFXSCU_CFG_CCUCON6_BASIC_(pllFreq) \
+ (uint32)( \
+ (IFXSCU_CFG_CPU0DIV_##pllFreq << IFX_SCU_CCUCON6_CPU0DIV_OFF))
+
+#define IFXSCU_CFG_CCUCON6_BASIC(pllFreq) IFXSCU_CFG_CCUCON6_BASIC_(pllFreq)
+
+#define IFXSCU_CFG_CCUCON6 IFXSCU_CFG_CCUCON6_BASIC(IFXSCU_CFG_PLL_FREQ)
+
+/** \brief Macros to configure CCUCON7 Clock distribution */
+#define IFXSCU_CFG_CCUCON7_MASK \
+ ( \
+ (IFX_SCU_CCUCON7_CPU1DIV_MSK << IFX_SCU_CCUCON7_CPU1DIV_OFF))
+
+#define IFXSCU_CFG_CCUCON7_BASIC_(pllFreq) \
+ (uint32)( \
+ (IFXSCU_CFG_CPU1DIV_##pllFreq << IFX_SCU_CCUCON7_CPU1DIV_OFF))
+
+#define IFXSCU_CFG_CCUCON7_BASIC(pllFreq) IFXSCU_CFG_CCUCON7_BASIC_(pllFreq)
+
+#define IFXSCU_CFG_CCUCON7 IFXSCU_CFG_CCUCON7_BASIC(IFXSCU_CFG_PLL_FREQ)
+
+#define IFXSCU_CFG_CLK_DISTRIBUTION \
+ { \
+/* { uint32 value, uint32 mask }*/ \
+ {IFXSCU_CFG_CCUCON0, IFXSCU_CFG_CCUCON0_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon0;*/ \
+ {IFXSCU_CFG_CCUCON1, IFXSCU_CFG_CCUCON1_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon1;*/ \
+ {IFXSCU_CFG_CCUCON2, IFXSCU_CFG_CCUCON2_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon2;*/ \
+ {IFXSCU_CFG_CCUCON5, IFXSCU_CFG_CCUCON5_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon5;*/ \
+ {IFXSCU_CFG_CCUCON6, IFXSCU_CFG_CCUCON6_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon6;*/ \
+ {IFXSCU_CFG_CCUCON7, IFXSCU_CFG_CCUCON7_MASK}, /*IfxScuCcu_CcuconRegConfig ccucon7;*/ \
+ }
+
+/*Utility macros for the configuration structure */
+/*macro for pll steps configuration */
+#define IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_##xtalFreq##_##pllFreq
+#define IFXSCU_CFG_PLL_STEPS_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_STEPS_BASIC_(xtalFreq, pllFreq)
+#define IFXSCU_CFG_PLL_STEPS IFXSCU_CFG_PLL_STEPS_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
+
+/*macro for pll initial step configuration */
+#define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_##xtalFreq##_##pllFreq
+#define IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(xtalFreq, pllFreq) IFXSCU_CFG_PLL_INITIAL_STEP_BASIC_(xtalFreq, pllFreq)
+#define IFXSCU_CFG_PLL_INITIAL_STEP IFXSCU_CFG_PLL_INITIAL_STEP_BASIC(IFXSCU_CFG_XTAL_FREQ, IFXSCU_CFG_PLL_FREQ)
+
+#define IFXSCU_CFG_FLASH_WAITSTATE \
+/* { uint32 value, uint32 mask }*/\
+ {IFXSCU_CFG_FLASH_WAITSTATE_VAL, IFXSCU_CFG_FLASH_WAITSTATE_MSK}
+
+#if (IFX_CFG_SCU_XTAL_FREQUENCY == (20000000))
+#define IFXSCU_CFG_XTAL_FREQ 20MHZ
+#elif (IFX_CFG_SCU_XTAL_FREQUENCY == (40000000))
+#define IFXSCU_CFG_XTAL_FREQ 40MHZ
+#elif (IFX_CFG_SCU_XTAL_FREQUENCY == (16000000))
+#define IFXSCU_CFG_XTAL_FREQ 16MHZ
+#elif (IFX_CFG_SCU_XTAL_FREQUENCY == (8000000))
+#define IFXSCU_CFG_XTAL_FREQ 8MHZ
+#else
+#error "Wrong XTAL frequency configuration! check IFX_CFG_SCU_XTAL_FREQUENCY configuration in Ifx_Cfg.h."
+#error "Aurix Triboard supported crystal frequencies are 8MHz, 16MHz, 20MHz and 40MHz"
+#endif
+
+#if (IFX_CFG_SCU_PLL_FREQUENCY == (80000000))
+#define IFXSCU_CFG_PLL_FREQ 80MHZ
+#elif (IFX_CFG_SCU_PLL_FREQUENCY == (133000000)) && (IFX_CFG_SCU_XTAL_FREQUENCY != (8000000))
+#define IFXSCU_CFG_PLL_FREQ 133MHZ
+#elif (IFX_CFG_SCU_PLL_FREQUENCY == (160000000))
+#define IFXSCU_CFG_PLL_FREQ 160MHZ
+#elif (IFX_CFG_SCU_PLL_FREQUENCY == (200000000))
+#define IFXSCU_CFG_PLL_FREQ 200MHZ
+#else
+#error "Wrong PLL frequency configuration!, check IFX_CFG_SCU_PLL_FREQUENCY configuration in Ifx_Cfg.h."
+#error "Supported PLL frequencies are 80MHz, 133MHz (8MHz XTAL doesn't support), 160Mhz, and 200MHz."
+#endif
+
+/******************************************************************************/
+/* Enum */
+/******************************************************************************/
+/** Clock selection */
+typedef enum
+{
+ IfxScu_CCUCON0_CLKSEL_fBack = 0,
+ IfxScu_CCUCON0_CLKSEL_fPll = 1
+} IfxScu_CCUCON0_CLKSEL;
+
+/** Input selection for PLL and PLL ERAY */
+typedef enum
+{
+ IfxScu_CCUCON1_INSEL_fOsc1 = 0,
+ IfxScu_CCUCON1_INSEL_fOsc0 = 1
+} IfxScu_CCUCON1_INSEL;
+
+/** Input frequency request control */
+typedef enum
+{
+ IfxScu_WDTCON1_IR_divBy16384 = 0,
+ IfxScu_WDTCON1_IR_divBy256 = 1,
+ IfxScu_WDTCON1_IR_divBy64 = 2
+} IfxScu_WDTCON1_IR;
+
+typedef enum
+{
+ IfxScu_PMCSR_REQSLP_Run = 0U, /* 00 Request CPU Run Mode */
+ IfxScu_PMCSR_REQSLP_Idle = 1U, /* 01 Request CPU Idle Mode */
+ IfxScu_PMCSR_REQSLP_Sleep = 2U, /* 10 Request CPU System Sleep Mode */
+ IfxScu_PMCSR_REQSLP_Stby = 3U /* 11 Request System Standby Mode */
+} IfxScu_PMCSR_REQSLP;
+
+/******************************************************************************/
+
+#endif /* IFXSCU_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSent_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSent_cfg.c
new file mode 100644
index 0000000..fa99ca4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSent_cfg.c
@@ -0,0 +1,50 @@
+/**
+ * \file IfxSent_cfg.c
+ * \brief SENT on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxSent_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSent_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSent_cfg.h
new file mode 100644
index 0000000..fc93aa4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSent_cfg.h
@@ -0,0 +1,97 @@
+/**
+ * \file IfxSent_cfg.h
+ * \brief SENT on-chip implementation data
+ * \ingroup IfxLld_Sent
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ *
+ * \defgroup IfxLld_Sent SENT
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Sent_Impl Implementation
+ * \ingroup IfxLld_Sent
+ * \defgroup IfxLld_Sent_Std Standard Driver
+ * \ingroup IfxLld_Sent
+ */
+
+#ifndef IFXSENT_CFG_H
+#define IFXSENT_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Specifies all interrupt events
+ */
+#define IFXSENT_CFG_CHANNEL_INTEN (0x1FEDU)
+
+/** \brief Specifies the step range for calculating module clock
+ */
+#define IFXSENT_CFG_STEP_RANGE (1024)
+
+/** \brief Specifies timeout value in transmission
+ */
+#define IFXSENT_CFG_TIMEOUT_VALUE ((uint16)0xFFFFU)
+
+#define IFXSENT_NUM_CHANNELS (6)
+
+#define IFXSENT_NUM_MODULES (1)
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief Specifies the channel Id
+ */
+typedef enum
+{
+ IfxSent_ChannelId_0 = 0, /**< \brief Specifies the channel Id 0 */
+ IfxSent_ChannelId_1 = 1, /**< \brief Specifies the channel Id 1 */
+ IfxSent_ChannelId_2 = 2, /**< \brief Specifies the channel Id 2 */
+ IfxSent_ChannelId_3 = 3, /**< \brief Specifies the channel Id 3 */
+ IfxSent_ChannelId_4 = 4, /**< \brief Specifies the channel Id 4 */
+ IfxSent_ChannelId_5 = 5, /**< \brief Specifies the channel Id 5 */
+ IfxSent_ChannelId_none = -1 /**< \brief None Sent channels */
+} IfxSent_ChannelId;
+
+#endif /* IFXSENT_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSmu_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSmu_cfg.c
new file mode 100644
index 0000000..4518b1e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSmu_cfg.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxSmu_cfg.c
+ * \brief SMU on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxSmu_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSmu_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSmu_cfg.h
new file mode 100644
index 0000000..c9f74dd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSmu_cfg.h
@@ -0,0 +1,247 @@
+/**
+ * \file IfxSmu_cfg.h
+ * \brief SMU on-chip implementation data
+ * \ingroup IfxLld_Smu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Smu SMU
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Smu_Impl Implementation
+ * \ingroup IfxLld_Smu
+ * \defgroup IfxLld_Smu_Std Standard Driver
+ * \ingroup IfxLld_Smu
+ * \defgroup IfxLld_Smu_Impl_Enum_AlarmGroup Alarm Group Enumeration
+ * \ingroup IfxLld_Smu_Impl
+ * \defgroup IfxLld_Smu_Impl_Enum_ListAlarms List of Alarms Enumeration
+ * \ingroup IfxLld_Smu_Impl
+ */
+
+#ifndef IFXSMU_CFG_H
+#define IFXSMU_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+#define IFXSMU_NUM_MODULES (1)
+
+
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Smu_Impl_Enum_AlarmGroup
+ * \{ */
+/** \brief Alarm group
+ */
+typedef enum
+{
+ IfxSmu_AlarmGroup_0 = 0, /**< \brief Alarm group 0 */
+ IfxSmu_AlarmGroup_1, /**< \brief Alarm group 1 */
+ IfxSmu_AlarmGroup_2, /**< \brief Alarm group 2 */
+ IfxSmu_AlarmGroup_3, /**< \brief Alarm group 3 */
+ IfxSmu_AlarmGroup_4, /**< \brief Alarm group 4 */
+ IfxSmu_AlarmGroup_5, /**< \brief Alarm group 5 */
+ IfxSmu_AlarmGroup_6 /**< \brief Alarm group 6 */
+} IfxSmu_AlarmGroup;
+
+/** \brief Recovery Timer
+ */
+typedef enum
+{
+ IfxSmu_RecoveryTimer_0 = 0, /**< \brief Recovery Timer 0 */
+ IfxSmu_RecoveryTimer_1 /**< \brief Recovery Timer 1 */
+} IfxSmu_RecoveryTimer;
+
+/** \} */
+
+/** \addtogroup IfxLld_Smu_Impl_Enum_ListAlarms
+ * \{ */
+/** \brief SMU Alarm list
+ */
+typedef enum
+{
+ IfxSmu_Alarm_Cpu0LockstepComparatorError = (IfxSmu_AlarmGroup_0 << 8) | 0, /**< \brief CPU0 Lockstep Comparator Error */
+ IfxSmu_Alarm_Cpu0BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_0 << 8) | 1, /**< \brief CPU0 Bus-level MPU violation / Access Protection violation */
+ IfxSmu_Alarm_Cpu0PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 3, /**< \brief CPU0 PCACHE TAG uncorrectable error */
+ IfxSmu_Alarm_Cpu0PcacheTagAddressError = (IfxSmu_AlarmGroup_0 << 8) | 4, /**< \brief CPU0 PCACHE TAG address error */
+ IfxSmu_Alarm_Cpu0PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 5, /**< \brief CPU0 PCACHE TAG Address Buffer overflow */
+ IfxSmu_Alarm_Cpu0UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 6, /**< \brief CPU0 Unified PCACHE/PSPR single-bit correction */
+ IfxSmu_Alarm_Cpu0UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 7, /**< \brief CPU0 Unified PCACHE/PSPR uncorrectable error */
+ IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 8, /**< \brief CPU0 Unified PCACHE/PSPR Address error */
+ IfxSmu_Alarm_Cpu0UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 9, /**< \brief CPU0 Unified PCACHE/PSPR Address Buffer overflow */
+ IfxSmu_Alarm_Cpu0UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_0 << 8) | 10, /**< \brief CPU0 Unified DCACHE/DSPR single-bit correction */
+ IfxSmu_Alarm_Cpu0UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_0 << 8) | 11, /**< \brief CPU0 Unified DCACHE/DSPR uncorrectable error */
+ IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_0 << 8) | 12, /**< \brief CPU0 Unified DCACHE/DSPR address error */
+ IfxSmu_Alarm_Cpu0UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_0 << 8) | 13, /**< \brief CPU0 Unified DCACHE/DSPR Address Buffer overflow */
+ IfxSmu_Alarm_Cpu0CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_0 << 8) | 19, /**< \brief CPU0 CPU Data SRI Interface (Load/Store) EDC Error */
+ IfxSmu_Alarm_Cpu1LockstepComparatorError = (IfxSmu_AlarmGroup_1 << 8) |0, /**< \brief CPU1 Lockstep Comparator Error */
+ IfxSmu_Alarm_Cpu1BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_1 << 8) |1, /**< \brief CPU1 Bus-level MPU violation / Access Protection violation */
+ IfxSmu_Alarm_Cpu1PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |3, /**< \brief CPU1 PCACHE TAG uncorrectable error */
+ IfxSmu_Alarm_Cpu1PcacheTagAddressError = (IfxSmu_AlarmGroup_1 << 8) |4, /**< \brief CPU1 PCACHE TAG address error */
+ IfxSmu_Alarm_Cpu1PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |5, /**< \brief CPU1 PCACHE TAG Address Buffer overflow */
+ IfxSmu_Alarm_Cpu1UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |6, /**< \brief CPU1 Unified PCACHE/PSPR single-bit correction */
+ IfxSmu_Alarm_Cpu1UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |7, /**< \brief CPU1 Unified PCACHE/PSPR uncorrectable error */
+ IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |8, /**< \brief CPU1 Unified PCACHE/PSPR Address error */
+ IfxSmu_Alarm_Cpu1UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |9, /**< \brief CPU1 Unified PCACHE/PSPR Address Buffer overflow */
+ IfxSmu_Alarm_Cpu1UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_1 << 8) |10, /**< \brief CPU1 Unified DCACHE/DSPR single-bit correction */
+ IfxSmu_Alarm_Cpu1UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |11, /**< \brief CPU1 Unified DCACHE/DSPR uncorrectable error */
+ IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_1 << 8) |12, /**< \brief CPU1 Unified DCACHE/DSPR address error */
+ IfxSmu_Alarm_Cpu1UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |13, /**< \brief CPU1 Unified DCACHE/DSPR Address Buffer overflow */
+ IfxSmu_Alarm_Cpu1DcacheTagSramCorrection = (IfxSmu_AlarmGroup_1 << 8) |14, /**< \brief CPU1 DCACHE TAG SRAM correction */
+ IfxSmu_Alarm_Cpu1DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_1 << 8) |15, /**< \brief CPU1 DCACHE TAG SRAM uncorrectable error */
+ IfxSmu_Alarm_Cpu1DcacheTagSramAddressError = (IfxSmu_AlarmGroup_1 << 8) |16, /**< \brief CPU1 DCACHE TAG SRAM address error */
+ IfxSmu_Alarm_Cpu1DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_1 << 8) |17, /**< \brief CPU1 DCACHE TAG SRAM address buffer overflow */
+ IfxSmu_Alarm_Cpu1CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |18, /**< \brief CPU1 CPU Instruction Fetch SRI Interface EDC Error */
+ IfxSmu_Alarm_Cpu1CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_1 << 8) |19, /**< \brief CPU1 CPU Data SRI Interface (Load/Store) EDC Error */
+ IfxSmu_Alarm_PmuSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 2, /**< \brief PMU single bit correction */
+ IfxSmu_Alarm_PmuDoubleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 3, /**< \brief PMU double bit correction */
+ IfxSmu_Alarm_PmuNonCorrectableMultipleBit = (IfxSmu_AlarmGroup_2 << 8) | 4, /**< \brief PMU non correctable multiple bit */
+ IfxSmu_Alarm_PmuAddressingError = (IfxSmu_AlarmGroup_2 << 8) | 5, /**< \brief PMU Addressing error */
+ IfxSmu_Alarm_PmuAddressBufferFull = (IfxSmu_AlarmGroup_2 << 8) | 6, /**< \brief PMU address buffer full */
+ IfxSmu_Alarm_PmuPflashEccError = (IfxSmu_AlarmGroup_2 << 8) | 7, /**< \brief PMU PFLASH ECC error */
+ IfxSmu_Alarm_PmuEdcComparatorError = (IfxSmu_AlarmGroup_2 << 8) | 8, /**< \brief PMU EDC comparator error */
+ IfxSmu_Alarm_LmuEccError = (IfxSmu_AlarmGroup_2 << 8) | 15, /**< \brief LMU ECC Error */
+ IfxSmu_Alarm_LmuRegisterAccessProtectionErrorBusLevelMpuError = (IfxSmu_AlarmGroup_2 << 8) | 16, /**< \brief LMU Register Access Protection error / Bus-level MPU error */
+ IfxSmu_Alarm_LmuSramSingleBitCorrection = (IfxSmu_AlarmGroup_2 << 8) | 17, /**< \brief LMU SRAM single-bit correction */
+ IfxSmu_Alarm_LmuSramUncorrectableError = (IfxSmu_AlarmGroup_2 << 8) | 18, /**< \brief LMU SRAM uncorrectable error */
+ IfxSmu_Alarm_LmuSramAddressError = (IfxSmu_AlarmGroup_2 << 8) | 19, /**< \brief LMU SRAM Address error */
+ IfxSmu_Alarm_LmuSramAddressBufferOverflow = (IfxSmu_AlarmGroup_2 << 8) | 20, /**< \brief LMU SRAM Address buffer overflow */
+ IfxSmu_Alarm_SriEdcAddressPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 21, /**< \brief SRI EDC Address phase error */
+ IfxSmu_Alarm_SriEdcWritePhaseError = (IfxSmu_AlarmGroup_2 << 8) | 22, /**< \brief SRI EDC Write phase error */
+ IfxSmu_Alarm_SriEdcReadPhaseError = (IfxSmu_AlarmGroup_2 << 8) | 23, /**< \brief SRI EDC Read phase error */
+ IfxSmu_Alarm_IrEdcError = (IfxSmu_AlarmGroup_2 << 8) | 25, /**< \brief IR EDC error */
+ IfxSmu_Alarm_IomPinMismatchIndication = (IfxSmu_AlarmGroup_2 << 8) | 26, /**< \brief IOM Pin Mismatch Indication */
+ IfxSmu_Alarm_SmuTimer0TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 29, /**< \brief SMU Timer 0 time-out */
+ IfxSmu_Alarm_SmuTimer1TimeOut = (IfxSmu_AlarmGroup_2 << 8) | 30, /**< \brief SMU Timer 1 time-out */
+ IfxSmu_Alarm_SmuErrorPinFaultStateActivation = (IfxSmu_AlarmGroup_2 << 8) | 31, /**< \brief SMU ErrorPin Fault State Activation */
+ IfxSmu_Alarm_ScuCguInputClockOutOfRange = (IfxSmu_AlarmGroup_3 << 8) | 0, /**< \brief SCU/CGU input clock out of range */
+ IfxSmu_Alarm_ScuCguSystemPllVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 1, /**< \brief SCU/CGU System PLL VCO Loss-of-Lock Event */
+ IfxSmu_Alarm_ScuCguPll_ErayVcoLossOfLockEvent = (IfxSmu_AlarmGroup_3 << 8) | 2, /**< \brief SCU/CGU PLL_ERAY VCO Loss-of-Lock Event */
+ IfxSmu_Alarm_ScuCguStmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 3, /**< \brief SCU/CGU STM clock out of range frequency */
+ IfxSmu_Alarm_ScuCguPll_ErayOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 4, /**< \brief SCU/CGU PLL_ERAY out of range frequency */
+ IfxSmu_Alarm_ScuCguSystemPLLOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 5, /**< \brief SCU/CGU System PLL out of range frequency */
+ IfxSmu_Alarm_ScuCguSriClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 6, /**< \brief SCU/CGU SRI clock out of range frequency */
+ IfxSmu_Alarm_ScuCguSpbClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 7, /**< \brief SCU/CGU SPB clock out of range frequency */
+ IfxSmu_Alarm_ScuCguGtmClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 8, /**< \brief SCU/CGU GTM clock out of range frequency */
+ IfxSmu_Alarm_ScuCguAdcClockOutOfRangeFrequency = (IfxSmu_AlarmGroup_3 << 8) | 9, /**< \brief SCU/CGU ADC clock out of range frequency */
+ IfxSmu_Alarm_ScuEvrEvr1Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 11, /**< \brief SCU/EVR EVR 1.3V under voltage */
+ IfxSmu_Alarm_ScuEvrEvr1Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 12, /**< \brief SCU/EVR EVR 1.3V over voltage */
+ IfxSmu_Alarm_ScuEvrEvr3Dot3VUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 13, /**< \brief SCU/EVR EVR 3.3V under voltage */
+ IfxSmu_Alarm_ScuEvrEvr3Dot3VOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 14, /**< \brief SCU/EVR EVR 3.3V over voltage */
+ IfxSmu_Alarm_ScuEvrExternalSupplyUnderVoltage = (IfxSmu_AlarmGroup_3 << 8) | 15, /**< \brief SCU/EVR External Supply under voltage */
+ IfxSmu_Alarm_ScuEVRExternalSupplyOverVoltage = (IfxSmu_AlarmGroup_3 << 8) | 16, /**< \brief SCU/EVR External Supply over voltage */
+ IfxSmu_Alarm_ScuWdtsWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 17, /**< \brief SCU/WDTS watchdog time-out */
+ IfxSmu_Alarm_ScuWdtCpu0WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 18, /**< \brief SCU/WDTCPU0 watchdog time-out */
+ IfxSmu_Alarm_ScuWdtCpu1WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 19, /**< \brief SCU/WDTCPU1 watchdog time-out */
+ IfxSmu_Alarm_ScuWdtCpu2WatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 20, /**< \brief SCU/WDTCPU2 watchdog time-out */
+ IfxSmu_Alarm_ScuWdtWatchdogTimeOut = (IfxSmu_AlarmGroup_3 << 8) | 21, /**< \brief SCU/WDT watchdog time-out */
+ IfxSmu_Alarm_SpbAccessEnableError = (IfxSmu_AlarmGroup_3 << 8) | 22, /**< \brief SPB Access Enable Error */
+ IfxSmu_Alarm_ScuDtsTemperatureUnderflow = (IfxSmu_AlarmGroup_3 << 8) | 25, /**< \brief SCU/DTS Temperature underflow */
+ IfxSmu_Alarm_ScuDtsTemperatureOverflow = (IfxSmu_AlarmGroup_3 << 8) | 26, /**< \brief SCU/DTS Temperature overflow */
+ IfxSmu_Alarm_ScuExternalEmergencyStopSignal = (IfxSmu_AlarmGroup_3 << 8) | 29, /**< \brief SCU External Emergency Stop Signal */
+ IfxSmu_Alarm_SriBusError = (IfxSmu_AlarmGroup_3 << 8) | 30, /**< \brief SRI Bus error */
+ IfxSmu_Alarm_SpbBusError = (IfxSmu_AlarmGroup_3 << 8) | 31, /**< \brief SPB Bus error */
+ IfxSmu_Alarm_GtmSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 0, /**< \brief GTM SRAM single-bit correction */
+ IfxSmu_Alarm_GtmSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 1, /**< \brief GTM SRAM uncorrectable error */
+ IfxSmu_Alarm_GtmSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 2, /**< \brief GTM SRAM address error */
+ IfxSmu_Alarm_GtmSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 3, /**< \brief GTM SRAM Address Buffer overflow */
+ IfxSmu_Alarm_CanSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 4, /**< \brief CAN SRAM single-bit correction */
+ IfxSmu_Alarm_CanSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 5, /**< \brief CAN SRAM uncorrectable error */
+ IfxSmu_Alarm_CanSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 6, /**< \brief CAN SRAM address error */
+ IfxSmu_Alarm_CanSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 7, /**< \brief CAN SRAM Address Buffer overflow */
+ IfxSmu_Alarm_FlexraySramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 8, /**< \brief FLEXRAY SRAM single-bit correction */
+ IfxSmu_Alarm_FlexraySramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 9, /**< \brief FLEXRAY SRAM uncorrectable error */
+ IfxSmu_Alarm_FlexraySramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 10, /**< \brief FLEXRAY SRAM address error */
+ IfxSmu_Alarm_FlexraySramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 11, /**< \brief FLEXRAY SRAM Address Buffer overflow */
+ IfxSmu_Alarm_EmemSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 12, /**< \brief EMEM SRAM single-bit correction */
+ IfxSmu_Alarm_EmemSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 13, /**< \brief EMEM SRAM uncorrectable error */
+ IfxSmu_Alarm_EmemSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 15, /**< \brief EMEM SRAM Address Buffer overflow */
+ IfxSmu_Alarm_SramsSramSingleBitCorrection = (IfxSmu_AlarmGroup_4 << 8) | 16, /**< \brief SRAMs SRAM single-bit correction */
+ IfxSmu_Alarm_SramsSramUncorrectableError = (IfxSmu_AlarmGroup_4 << 8) | 17, /**< \brief SRAMs SRAM uncorrectable error */
+ IfxSmu_Alarm_SramsSramAddressError = (IfxSmu_AlarmGroup_4 << 8) | 18, /**< \brief SRAMs SRAM address error */
+ IfxSmu_Alarm_SramsSramAddressBufferOverflow = (IfxSmu_AlarmGroup_4 << 8) | 19, /**< \brief SRAMs SRAM Address Buffer overflow */
+ IfxSmu_Alarm_SoftwareAlarm0 = (IfxSmu_AlarmGroup_5 << 8) | 0, /**< \brief Software Alarm 0 */
+ IfxSmu_Alarm_SoftwareAlarm1 = (IfxSmu_AlarmGroup_5 << 8) | 1, /**< \brief Software Alarm 1 */
+ IfxSmu_Alarm_SoftwareAlarm2 = (IfxSmu_AlarmGroup_5 << 8) | 2, /**< \brief Software Alarm 2 */
+ IfxSmu_Alarm_SoftwareAlarm3 = (IfxSmu_AlarmGroup_5 << 8) | 3, /**< \brief Software Alarm 3 */
+ IfxSmu_Alarm_SoftwareAlarm4 = (IfxSmu_AlarmGroup_5 << 8) | 4, /**< \brief Software Alarm 4 */
+ IfxSmu_Alarm_SoftwareAlarm5 = (IfxSmu_AlarmGroup_5 << 8) | 5, /**< \brief Software Alarm 5 */
+ IfxSmu_Alarm_SoftwareAlarm6 = (IfxSmu_AlarmGroup_5 << 8) | 6, /**< \brief Software Alarm 6 */
+ IfxSmu_Alarm_SoftwareAlarm7 = (IfxSmu_AlarmGroup_5 << 8) | 7, /**< \brief Software Alarm 7 */
+ IfxSmu_Alarm_SoftwareAlarm8 = (IfxSmu_AlarmGroup_5 << 8) | 8, /**< \brief Software Alarm 8 */
+ IfxSmu_Alarm_SoftwareAlarm9 = (IfxSmu_AlarmGroup_5 << 8) | 9, /**< \brief Software Alarm 9 */
+ IfxSmu_Alarm_SoftwareAlarm10 = (IfxSmu_AlarmGroup_5 << 8) | 10, /**< \brief Software Alarm 10 */
+ IfxSmu_Alarm_SoftwareAlarm11 = (IfxSmu_AlarmGroup_5 << 8) | 11, /**< \brief Software Alarm 11 */
+ IfxSmu_Alarm_SoftwareAlarm12 = (IfxSmu_AlarmGroup_5 << 8) | 12, /**< \brief Software Alarm 12 */
+ IfxSmu_Alarm_SoftwareAlarm13 = (IfxSmu_AlarmGroup_5 << 8) | 13, /**< \brief Software Alarm 13 */
+ IfxSmu_Alarm_SoftwareAlarm14 = (IfxSmu_AlarmGroup_5 << 8) | 14, /**< \brief Software Alarm 14 */
+ IfxSmu_Alarm_SoftwareAlarm15 = (IfxSmu_AlarmGroup_5 << 8) | 15, /**< \brief Software Alarm 15 */
+ IfxSmu_Alarm_Cpu2BusLevelMpuViolationAccessProtection = (IfxSmu_AlarmGroup_6 << 8) | 1, /**< \brief CPU2 Bus-level MPU violation / Access Protection violation */
+ IfxSmu_Alarm_Cpu2PcacheTagUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 3, /**< \brief CPU2 PCACHE TAG uncorrectable error */
+ IfxSmu_Alarm_Cpu2PcacheTagAddressError = (IfxSmu_AlarmGroup_6 << 8) | 4, /**< \brief CPU2 PCACHE TAG address error */
+ IfxSmu_Alarm_Cpu2PcacheTagAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 5, /**< \brief CPU2 PCACHE TAG Address Buffer overflow */
+ IfxSmu_Alarm_Cpu2UnifiedPcachePsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 6, /**< \brief CPU2 Unified PCACHE/PSPR single-bit correction */
+ IfxSmu_Alarm_Cpu2UnifiedPcachePsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 7, /**< \brief CPU2 Unified PCACHE/PSPR uncorrectable error */
+ IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 8, /**< \brief CPU2 Unified PCACHE/PSPR Address error */
+ IfxSmu_Alarm_Cpu2UnifiedPcachePsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 9, /**< \brief CPU2 Unified PCACHE/PSPR Address Buffer overflow */
+ IfxSmu_Alarm_Cpu2UnifiedDcacheDsprSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 10, /**< \brief CPU2 Unified DCACHE/DSPR single-bit correction */
+ IfxSmu_Alarm_Cpu2UnifiedDcacheDsprUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 11, /**< \brief CPU2 Unified DCACHE/DSPR uncorrectable error */
+ IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressError = (IfxSmu_AlarmGroup_6 << 8) | 12, /**< \brief CPU2 Unified DCACHE/DSPR address error */
+ IfxSmu_Alarm_Cpu2UnifiedDcacheDsprAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 13, /**< \brief CPU2 Unified DCACHE/DSPR Address Buffer overflow */
+ IfxSmu_Alarm_Cpu2DcacheTagSramSingleBitCorrection = (IfxSmu_AlarmGroup_6 << 8) | 14, /**< \brief CPU2 DCACHE TAG SRAM single-bit correction */
+ IfxSmu_Alarm_Cpu2DcacheTagSramUncorrectableError = (IfxSmu_AlarmGroup_6 << 8) | 15, /**< \brief CPU2 DCACHE TAG SRAM uncorrectable error */
+ IfxSmu_Alarm_Cpu2DcacheTagSramAddressError = (IfxSmu_AlarmGroup_6 << 8) | 16, /**< \brief CPU2 DCACHE TAG SRAM Address error */
+ IfxSmu_Alarm_Cpu2DcacheTagSramAddressBufferOverflow = (IfxSmu_AlarmGroup_6 << 8) | 17, /**< \brief CPU2 DCACHE TAG SRAM Address buffer overflow */
+ IfxSmu_Alarm_Cpu2CpuInstructionFetchSRIInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 18, /**< \brief CPU2 CPU Instruction Fetch SRI Interface EDC Error */
+ IfxSmu_Alarm_Cpu2CpuDataSriInterfaceEdcError = (IfxSmu_AlarmGroup_6 << 8) | 19, /**< \brief CPU2 CPU Data SRI Interface (Load/Store) EDC Error */
+ IfxSmu_Alarm_noAlarm /**< \brief Special flag to inform about no alarm (Software only) */
+} IfxSmu_Alarm;
+
+/** \} */
+
+
+#endif /* IFXSMU_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSrc_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSrc_cfg.c
new file mode 100644
index 0000000..2d2cbff
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSrc_cfg.c
@@ -0,0 +1,49 @@
+/**
+ * \file IfxSrc_cfg.c
+ * \brief SRC on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxSrc_cfg.h"
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSrc_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSrc_cfg.h
new file mode 100644
index 0000000..2732bc9
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxSrc_cfg.h
@@ -0,0 +1,78 @@
+/**
+ * \file IfxSrc_cfg.h
+ * \brief SRC on-chip implementation data
+ * \ingroup IfxLld_Src
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2016 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Src SRC
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Src_Impl Implementation
+ * \ingroup IfxLld_Src
+ * \defgroup IfxLld_Src_Std Standard Driver
+ * \ingroup IfxLld_Src
+ * \defgroup IfxLld_Src_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Src_Impl
+ */
+
+#ifndef IFXSRC_CFG_H
+#define IFXSRC_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Src_Impl_Enumerations
+ * \{ */
+/** \brief Identifier of interrupt service provider, which handles the interrupt service request.
+ */
+typedef enum
+{
+ IfxSrc_Tos_cpu0 = 0, /**< \brief CPU0 interrupt service provider, which handles the interrupt service request. */
+ IfxSrc_Tos_cpu1 = 1, /**< \brief CPU1 interrupt service provider, which handles the interrupt service request. */
+ IfxSrc_Tos_dma = 3 /**< \brief DMA interrupt service provider, which handles the interrupt service request. */
+} IfxSrc_Tos;
+
+/** \} */
+
+#endif /* IFXSRC_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxStm_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxStm_cfg.c
new file mode 100644
index 0000000..f0853b8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxStm_cfg.c
@@ -0,0 +1,58 @@
+/**
+ * \file IfxStm_cfg.c
+ * \brief STM on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxStm_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES] = {
+ {&MODULE_STM0, IfxStm_Index_0},
+ {&MODULE_STM1, IfxStm_Index_1}
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxStm_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxStm_cfg.h
new file mode 100644
index 0000000..e1e7fc8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxStm_cfg.h
@@ -0,0 +1,107 @@
+/**
+ * \file IfxStm_cfg.h
+ * \brief STM on-chip implementation data
+ * \ingroup IfxLld_Stm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2018 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Stm STM
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Stm_Impl Implementation
+ * \ingroup IfxLld_Stm
+ * \defgroup IfxLld_Stm_Std Standard Driver
+ * \ingroup IfxLld_Stm
+ * \defgroup IfxLld_Stm_Impl_Enumerations Enumerations
+ * \ingroup IfxLld_Stm_Impl
+ * \defgroup IfxLld_Stm_Impl_Variables Global Variables
+ * \ingroup IfxLld_Stm_Impl
+ */
+
+#ifndef IFXSTM_CFG_H
+#define IFXSTM_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+#include "IfxStm_reg.h"
+#include "Cpu/Std/Ifx_Types.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief STM count
+ */
+#define IFXSTM_NUM_MODULES 2
+
+/** \brief No Of Comparators per Stm
+ */
+#define IFXSTM_NUM_COMPARATORS (2)
+
+/******************************************************************************/
+/*--------------------------------Enumerations--------------------------------*/
+/******************************************************************************/
+
+/** \addtogroup IfxLld_Stm_Impl_Enumerations
+ * \{ */
+/** \brief List of the available STM resources
+ */
+typedef enum
+{
+ IfxStm_Index_none = -1, /**< \brief Not Selected */
+ IfxStm_Index_0 = 0, /**< \brief STM index 0 */
+ IfxStm_Index_1 /**< \brief STM index 1 */
+} IfxStm_Index;
+
+/** \} */
+
+/** \addtogroup IfxLld_Stm_Impl_Variables
+ * \{ */
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST IfxModule_IndexMap IfxStm_cfg_indexMap[IFXSTM_NUM_MODULES];
+
+/** \} */
+
+#endif /* IFXSTM_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxVadc_cfg.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxVadc_cfg.c
new file mode 100644
index 0000000..b30329f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxVadc_cfg.c
@@ -0,0 +1,80 @@
+/**
+ * \file IfxVadc_cfg.c
+ * \brief VADC on-chip implementation data
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "IfxVadc_cfg.h"
+
+/******************************************************************************/
+/*-----------------------Exported Variables/Constants-------------------------*/
+/******************************************************************************/
+
+IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS * 4) + (IFXVADC_NUM_ADC_COMMON_GROUPS * 4)] = {
+ (uint32)&SRC_VADC_G0_SR0,
+ (uint32)&SRC_VADC_G0_SR1,
+ (uint32)&SRC_VADC_G0_SR2,
+ (uint32)&SRC_VADC_G0_SR3,
+ (uint32)&SRC_VADC_G1_SR0,
+ (uint32)&SRC_VADC_G1_SR1,
+ (uint32)&SRC_VADC_G1_SR2,
+ (uint32)&SRC_VADC_G1_SR3,
+ (uint32)&SRC_VADC_G2_SR0,
+ (uint32)&SRC_VADC_G2_SR1,
+ (uint32)&SRC_VADC_G2_SR2,
+ (uint32)&SRC_VADC_G2_SR3,
+ (uint32)&SRC_VADC_G3_SR0,
+ (uint32)&SRC_VADC_G3_SR1,
+ (uint32)&SRC_VADC_G3_SR2,
+ (uint32)&SRC_VADC_G3_SR3,
+ (uint32)&SRC_VADC_CG0_SR0,
+ (uint32)&SRC_VADC_CG0_SR1,
+ (uint32)&SRC_VADC_CG0_SR2,
+ (uint32)&SRC_VADC_CG0_SR3,
+ (uint32)&SRC_VADC_CG1_SR0,
+ (uint32)&SRC_VADC_CG1_SR1,
+ (uint32)&SRC_VADC_CG1_SR2,
+ (uint32)&SRC_VADC_CG1_SR3
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxVadc_cfg.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxVadc_cfg.h
new file mode 100644
index 0000000..fc26701
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Impl/IfxVadc_cfg.h
@@ -0,0 +1,137 @@
+/**
+ * \file IfxVadc_cfg.h
+ * \brief VADC on-chip implementation data
+ * \ingroup IfxLld_Vadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2017 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Vadc VADC
+ * \ingroup IfxLld
+ * \defgroup IfxLld_Vadc_Impl Implementation
+ * \ingroup IfxLld_Vadc
+ * \defgroup IfxLld_Vadc_Std Standard Driver
+ * \ingroup IfxLld_Vadc
+ */
+
+#ifndef IFXVADC_CFG_H
+#define IFXVADC_CFG_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Src/Std/IfxSrc.h"
+
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/** \brief Number of ADC Groups
+ */
+#define IFXVADC_NUM_ADC_GROUPS (4 )
+
+/** \brief Number of calibrated ADC Groups
+ */
+#define IFXVADC_NUM_ADC_CAL_GROUPS (4 )
+
+/** \brief Maximum allowed analog frequency
+ */
+#define IFXVADC_ANALOG_FREQUENCY_MAX (20000000)
+
+/** \brief Minimum allowed analog frequency
+ */
+#define IFXVADC_ANALOG_FREQUENCY_MIN (500000)
+
+/** \brief Default analog frequency used in initModuleConfig function
+ */
+#define IFXVADC_DEFAULT_ANALOG_FREQ (20000000)
+
+/** \brief Number of Conversion request Slots
+ */
+#define IFXVADC_NUM_REQUESTSLOTS (3)
+
+/** \brief Number of group specific Input Class
+ */
+#define IFXVADC_NUM_INPUTCLASSES (2)
+
+/** \brief Maximum number of configurable bitfields in ACCPROT0 register
+ */
+#define IFXVADC_MAXIMUM_BITFIELDS_IN_ACCPROT0_REGISTER (32)
+
+#define IFXVADC_QUEUE_REFILL (1 << IFX_VADC_G_QBUR0_RF_OFF)
+
+/** \brief Number of ADC group input classes.
+ */
+#define IFXVADC_NUM_GLOBAL_INPUTCLASSES (2)
+
+#define IFXVADC_NUM_ADC_COMMON_GROUPS (2)
+
+#define IFXVADC_SAMPLETIME_MIN (2)
+
+#define IFXVADC_NUM_EMUX_INTERFACE (2)
+
+#define IFXVADC_NUM_MODULES (1)
+
+
+
+/******************************************************************************/
+/*-------------------------------Enumerations---------------------------------*/
+/******************************************************************************/
+
+/** \brief VADC Groups
+ */
+typedef enum
+{
+ IfxVadc_GroupId_0, /**< \brief VADC group 0 */
+ IfxVadc_GroupId_1, /**< \brief VADC group 1 */
+ IfxVadc_GroupId_2, /**< \brief VADC group 2 */
+ IfxVadc_GroupId_3, /**< \brief VADC group 3 */
+ IfxVadc_GroupId_global0, /**< \brief VADC group global0 */
+ IfxVadc_GroupId_global1 /**< \brief VADC group global1 */
+} IfxVadc_GroupId;
+
+
+/******************************************************************************/
+/*-------------------Global Exported Variables/Constants----------------------*/
+/******************************************************************************/
+
+IFX_EXTERN IFX_CONST uint32 IfxVadc_cfg_srcAddresses[(IFXVADC_NUM_ADC_GROUPS *4) + (IFXVADC_NUM_ADC_COMMON_GROUPS * 4) ];
+
+
+#endif /* IFXVADC_CFG_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.asm.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.asm.c
new file mode 100644
index 0000000..01668dd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.asm.c
@@ -0,0 +1,159 @@
+/**
+ * \file Ifx_CircularBuffer.asm.c
+ * \brief Circular buffer functions (assembler implementation).
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "Ifx_CircularBuffer.h"
+
+#if !(IFX_CFG_CIRCULARBUFFER_C)
+
+uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
+{
+ uint32 data;
+
+ __asm(" ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
+ " ld.w\t%0,[a14/a15+c]\n" /* Get the value from the buffer, and increment the buffer pointer */
+ " st.da\t[%1],a14/a15\n" /* Store the new circular buffer state */
+ : "=d" (data) : "a" (buffer) : "a14", "a15");
+
+ return data;
+}
+
+
+uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
+{
+ Ifx_SizeT data;
+
+ __asm(" ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
+ " ld.h\t%0,[a14/a15+c]\n" /* Get the value from the buffer, and increment the buffer pointer */
+ " st.da\t[%1],a14/a15\n" /* Store the new circular buffer state */
+ : "=d" (data) : "a" (buffer) : "a14", "a15");
+
+ return data;
+}
+
+
+/** \brief Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer
+ *
+ * \param buffer Specifies circular buffer.
+ * \param data Specifies value to be added to the buffer.
+ *
+ * \return None.
+ */
+void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
+{
+ __asm(" ld.da\ta14/a15,[%0]\n" /* Get circular buffer state */
+ " st.w\t[a14/a15+c]0,%1\n" /* Store the value to the buffer, and increment the buffer pointer */
+ " ld.w\t%1,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
+ " st.da\t[%0],a14/a15\n" /* Store the new circular buffer state */
+ :
+ : "a" (buffer), "d" (data) : "a14", "a15");
+}
+
+
+void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
+{
+ count--;
+ __asm(" mov.a\ta13,%3\n" /* Get count value */
+ " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
+ "Ifx_CircularBuffer_read1:" " ld.b\td15,[a14/a15+c]\n"/* read the value from the buffer, and increment the buffer pointer */
+ " st.b\t[%2+],d15\n" /* Store value to the data buffer, and increment the pointer */
+ " loop\ta13,Ifx_CircularBuffer_read1\n" /* loop */
+ " mov.d\t%0,a15\n" /* Get the new index value */
+ " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
+ "d15");
+
+ return data;
+}
+
+
+void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
+{
+ count--;
+ __asm(" mov.a\ta13,%3\n" /* Get count value */
+ " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
+ "Ifx_CircularBuffer_read2:" " ld.w\td15,[a14/a15+c]\n"/* read the value from the buffer, and increment the buffer pointer */
+ " st.w\t[%2+],d15\n" /* Store value to the data buffer, and increment the pointer */
+ " loop\ta13,Ifx_CircularBuffer_read2\n" /* loop */
+ " mov.d\t%0,a15\n" /* Get the new index value */
+ " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
+ "d15");
+
+ return data;
+}
+
+
+const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
+{
+ count--;
+ __asm(" mov.a\ta13,%3\n" /* Get count value */
+ " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
+ "Ifx_CircularBuffer_write1:" " ld.b\td15,[%2+]\n"/* Get value from the data buffer, and increment the pointer */
+ " st.b\t[a14/a15+c]0,d15\n" /* Store the value to the buffer, and increment the buffer pointer */
+ " ld.b\td15,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
+ " loop\ta13,Ifx_CircularBuffer_write1\n" /* loop */
+ " mov.d\t%0,a15\n" /* Get the new index value */
+ " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
+ "d15");
+
+ return data;
+}
+
+
+const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
+{
+ count--;
+ __asm(" mov.a\ta13,%3\n" /* Get count value */
+ " ld.da\ta14/a15,[%1]\n" /* Get circular buffer state */
+ "Ifx_CircularBuffer_write2:" " ld.w\td15,[%2+]\n"/* Get value from the data buffer, and increment the pointer */
+ " st.w\t[a14/a15+c]0,d15\n" /* Store the value to the buffer, and increment the buffer pointer */
+ " ld.w\td15,[a14/a15+c]\n" /* Read the value from the buffer, to get the buffer pointer incremented (bug workaround) */
+ " loop\ta13,Ifx_CircularBuffer_write2\n" /* loop */
+ " mov.d\t%0,a15\n" /* Get the new index value */
+ " extr.u\t%0,%0,#0,#16\n": "=d" (buffer->index) : "a" (buffer), "a" (data), "d" (count) : "a13", "a14", "a15",
+ "d15");
+
+ return data;
+}
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.c
new file mode 100644
index 0000000..c725006
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.c
@@ -0,0 +1,186 @@
+/**
+ * \file Ifx_CircularBuffer.c
+ * \brief Circular buffer functions in C language.
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "Ifx_CircularBuffer.h"
+
+#if (IFX_CFG_CIRCULARBUFFER_C)
+
+uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer)
+{
+ uint32 data = ((uint32 *)buffer->base)[buffer->index];
+
+ buffer->index += 4;
+
+ if (buffer->index >= buffer->length)
+ {
+ buffer->index = 0;
+ }
+
+ return data;
+}
+
+
+uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer)
+{
+ uint16 data = ((uint16 *)buffer->base)[buffer->index];
+
+ buffer->index += 2;
+
+ if (buffer->index >= buffer->length)
+ {
+ buffer->index = 0;
+ }
+
+ return data;
+}
+
+
+/** \brief Add a 32 bit value to the circular buffer, and post-increment the circular buffer pointer
+ *
+ * \param buffer Specifies circular buffer.
+ * \param data Specifies value to be added to the buffer.
+ *
+ * \return None.
+ */
+void Ifx_CircularBuffer_addDataIncr(Ifx_CircularBuffer *buffer, uint32 data)
+{
+ ((uint32 *)buffer->base)[buffer->index] = data;
+ buffer->index += 4;
+
+ if (buffer->index >= buffer->length)
+ {
+ buffer->index = 0;
+ }
+}
+
+
+void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
+{
+ uint8 *Dest = (uint8 *)data;
+
+ do
+ {
+ count--;
+ *Dest = ((uint8 *)buffer->base)[buffer->index];
+ Dest = &Dest[1];
+ buffer->index++;
+
+ if (buffer->index >= buffer->length)
+ {
+ buffer->index = 0;
+ }
+ } while (count > 0);
+
+ return Dest;
+}
+
+
+void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count)
+{
+ uint32 *Dest = (uint32 *)data;
+ uint8 *base = buffer->base;
+
+ do
+ {
+ *Dest = *((uint32 *)(&base[buffer->index]));
+ Dest = &Dest[1];
+ buffer->index = buffer->index + 4;
+
+ if (buffer->index >= buffer->length)
+ {
+ buffer->index = 0;
+ }
+
+ count--;
+ } while (count > 0);
+
+ return Dest;
+}
+
+
+const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
+{
+ const uint8 *source = (const uint8 *)data;
+
+ do
+ {
+ count--;
+ ((uint8 *)buffer->base)[buffer->index] = *source;
+ source = &source[1];
+ buffer->index++;
+
+ if (buffer->index >= buffer->length)
+ {
+ buffer->index = 0;
+ }
+ } while (count > 0);
+
+ return source;
+}
+
+
+const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count)
+{
+ const uint32 *source = (const uint32 *)data;
+ uint8 *base = buffer->base;
+
+ do
+ {
+ *((uint32 *)(&base[buffer->index])) = *source;
+ source = &source[1];
+ buffer->index = buffer->index + 4;
+
+ if (buffer->index >= buffer->length)
+ {
+ buffer->index = 0;
+ }
+
+ count--;
+ } while (count > 0);
+
+ return source;
+}
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.h
new file mode 100644
index 0000000..131f629
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_CircularBuffer.h
@@ -0,0 +1,121 @@
+/**
+ * \file Ifx_CircularBuffer.h
+ * \brief Circular buffer functions.
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_lib_datahandling_circularbuffer Circular buffer
+ * This module implements circular buffer functions.
+ * \ingroup IfxLld_lib_datahandling
+ *
+ */
+
+#ifndef IFX_CIRCULARBUFFER_H
+#define IFX_CIRCULARBUFFER_H 1
+
+//---------------------------------------------------------------------------
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+//---------------------------------------------------------------------------
+
+#ifndef IFX_CFG_CIRCULARBUFFER_C
+#define IFX_CFG_CIRCULARBUFFER_C (1)
+#endif
+
+/** \addtogroup IfxLld_lib_datahandling_circularbuffer
+ * \{
+ */
+/** \brief Return the circular buffer 16 bit value, and post-increment the circular buffer pointer
+ *
+ * \param buffer Specifies circular buffer.
+ *
+ * \return Return the next circular buffer value.
+ */
+uint16 Ifx_CircularBuffer_get16(Ifx_CircularBuffer *buffer);
+
+/** \brief Return the circular buffer 32 bit value, and post-increment the circular buffer pointer
+ *
+ * \param buffer Specifies circular buffer.
+ *
+ * \return Return the next circular buffer value.
+ */
+uint32 Ifx_CircularBuffer_get32(Ifx_CircularBuffer *buffer);
+
+/** \brief Copy count bytes from the circular buffer to the data array
+ *
+ * \param buffer Specifies circular buffer.
+ * \param data Specifies destination pointer.
+ * \param count Specifies number of bytes to be copied. count MUST be >= 1.
+ *
+ * \return Returns the updated data pointer data = ((uint8*)data) + count
+ */
+void *Ifx_CircularBuffer_read8(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count);
+
+/** \brief Copy count 32 bit words from the circular buffer to the data array
+ *
+ * \param buffer Specifies circular buffer.
+ * \param data Specifies destination pointer.
+ * \param count Specifies number of 32 bit words to be copied. count MUST be >= 1.
+ *
+ * \return Returns the updated data pointer data = ((uint32*)data) + count
+ */
+void *Ifx_CircularBuffer_read32(Ifx_CircularBuffer *buffer, void *data, Ifx_SizeT count);
+
+/** \brief Copy count bytes from the data array to the circular buffer
+ *
+ * \param buffer Specifies circular buffer.
+ * \param data Specifies source pointer.
+ * \param count Specifies number of bytes to be copied. count MUST be >= 1.
+ *
+ * \return Returns the updated data pointer data = ((uint8*)data) + count
+ */
+const void *Ifx_CircularBuffer_write8(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count);
+
+/** \brief Copy count 32 bit words from the data array to the circular buffer
+ *
+ * \param buffer Specifies circular buffer.
+ * \param data Specifies source pointer.
+ * \param count Specifies number of 32 bit words to be copied. count MUST be >= 1.
+ *
+ * \return Returns the updated data pointer data = ((uint32*)data) + count
+ */
+const void *Ifx_CircularBuffer_write32(Ifx_CircularBuffer *buffer, const void *data, Ifx_SizeT count);
+
+/** \} */
+//---------------------------------------------------------------------------
+#endif
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_Fifo.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_Fifo.c
new file mode 100644
index 0000000..0a7296a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_Fifo.c
@@ -0,0 +1,419 @@
+/**
+ * \file Ifx_Fifo.c
+ * \brief FIFO functions
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+//------------------------------------------------------------------------------
+#include "Ifx_Fifo.h"
+#include
+#include "Ifx_CircularBuffer.h"
+#include "_Utilities/Ifx_Assert.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "SysSe/Bsp/Bsp.h"
+//------------------------------------------------------------------------------
+/*
+ * Note: the fifo function can be used to exchange data between the main task and interrupts:
+ * - a mutex using the interrupt enable / disable is implemented to insure
+ * data consitancy
+ * - it is supposed that all access to 8, 16, 32 bit data are atomic and are
+ * therefore not protected by a critical section
+ * - the following is possible
+ * reader(main) -- writer(main)
+ * reader(main) -- writer(interrupt)
+ * reader(interrupt) -- writer(main)
+ * reader(interrupt) -- writer(interrupt)
+ * - Only one reader and one writer are allowed by FIFO, no nested read write
+ * Implementation note: as an interrupt runs at a higher cpu level than the thread
+ * the interrupt is not disabled in the IntfifoXXX() functions
+ * This is valid is an OS is used.
+ *
+ */
+//------------------------------------------------------------------------------
+Ifx_Fifo *Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize)
+{
+ Ifx_Fifo *fifo = NULL_PTR;
+
+ size = Ifx_AlignOn32(size); /* data transfer is optimised for 32 bit access */
+
+ fifo = malloc(size + sizeof(Ifx_Fifo) + 8); /* +8 because of padding in case the pointer is not aligned on 64 */
+
+ if (IFX_VALIDATE(IFX_VERBOSE_LEVEL_ERROR, (fifo != NULL_PTR)))
+ {
+ fifo = Ifx_Fifo_init(fifo, size, elementSize);
+ }
+
+ return fifo;
+}
+
+
+void Ifx_Fifo_destroy(Ifx_Fifo *fifo)
+{
+ free(fifo);
+}
+
+
+Ifx_Fifo *Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize)
+{
+ Ifx_Fifo *fifo = NULL_PTR;
+
+ size = Ifx_AlignOn32(size); /* data transfer is optimised for 32 bit access */
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, elementSize <= size);
+ /* Check size over maximum FIFO size */
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, (size <= IFX_SIZET_MAX));
+
+ {
+ fifo = (Ifx_Fifo *)buffer;
+ fifo->eventReader = FALSE;
+ fifo->eventWriter = TRUE;
+ fifo->buffer = (uint8 *)Ifx_AlignOn64(((uint32)fifo) + sizeof(Ifx_Fifo));
+ fifo->shared.count = 0;
+ fifo->shared.maxcount = 0;
+ fifo->shared.readerWaitx = fifo->shared.writerWaitx = 0;
+ fifo->startIndex = fifo->endIndex = 0;
+ fifo->size = size;
+ fifo->elementSize = elementSize;
+ }
+
+ return fifo;
+}
+
+
+/**
+ * param: count in bytes
+ */
+static Ifx_SizeT Ifx_Fifo_beginRead(Ifx_Fifo *fifo, Ifx_SizeT count)
+{
+ boolean interruptState;
+ Ifx_SizeT blockSize;
+
+ interruptState = IfxCpu_disableInterrupts();
+ blockSize = __min(count, Ifx_Fifo_readCount(fifo));
+ blockSize -= blockSize % fifo->elementSize;
+ fifo->eventReader = FALSE;
+ fifo->shared.readerWaitx = __min(count - blockSize, fifo->size);
+ IfxCpu_restoreInterrupts(interruptState);
+
+ return blockSize;
+}
+
+
+boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
+{
+ boolean result;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
+
+ if ((count < fifo->elementSize) || (count > fifo->size))
+ { /* Only complete elements can be read from the buffer */
+ result = FALSE;
+ }
+ else
+ {
+ boolean interruptState;
+ sint32 waitCount;
+ interruptState = IfxCpu_disableInterrupts();
+ waitCount = count - Ifx_Fifo_readCount(fifo);
+
+ if (waitCount <= 0)
+ {
+ fifo->shared.readerWaitx = 0;
+ fifo->eventReader = TRUE;
+ IfxCpu_restoreInterrupts(interruptState);
+ result = TRUE;
+ }
+ else
+ {
+ Ifx_TickTime DeadLine = getDeadLine(timeout);
+ fifo->eventReader = FALSE;
+ fifo->shared.readerWaitx = waitCount;
+ IfxCpu_restoreInterrupts(interruptState);
+
+ while ((fifo->eventReader == FALSE) && (isDeadLine(DeadLine) == FALSE))
+ {}
+ /* After the timeout, the reader is not waiting for any data */
+ fifo->shared.readerWaitx = 0;
+ result = fifo->eventReader == TRUE;
+ }
+ }
+
+ return result;
+}
+
+
+/**
+ * param: count in bytes
+ */
+static Ifx_SizeT Ifx_Fifo_readEnd(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_SizeT blockSize)
+{
+ boolean interruptState;
+
+ /* Set the shared values */
+ interruptState = IfxCpu_disableInterrupts();
+
+ fifo->shared.count -= blockSize;
+
+ if (fifo->shared.writerWaitx != 0)
+ {
+ fifo->shared.writerWaitx -= blockSize;
+
+ if (fifo->shared.writerWaitx <= 0)
+ {
+ fifo->shared.writerWaitx = 0;
+ fifo->eventWriter = TRUE; /* Signal the writer */
+ }
+ }
+
+ IfxCpu_restoreInterrupts(interruptState);
+
+ return count - blockSize;
+}
+
+
+Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout)
+{
+ Ifx_TickTime DeadLine;
+ Ifx_SizeT blockSize;
+ Ifx_CircularBuffer buffer;
+ boolean Stop = FALSE;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, data != NULL_PTR);
+
+ if (count != 0)
+ {
+ buffer.base = fifo->buffer;
+ buffer.length = (uint16)fifo->size; /* size always fit into 16 bit */
+ buffer.index = (uint16)fifo->startIndex; /* startIndex always fit into size */
+ DeadLine = getDeadLine(timeout);
+
+ do
+ {
+ blockSize = Ifx_Fifo_beginRead(fifo, count);
+
+ if (blockSize != 0)
+ {
+ /* read element from the buffer */
+ data = Ifx_CircularBuffer_read8(&buffer, data, blockSize);
+ count = Ifx_Fifo_readEnd(fifo, count, blockSize);
+ }
+
+ if ((Stop != FALSE) || (isDeadLine(DeadLine) != FALSE))
+ {
+ /*When exiting, the reader is not waiting for any data */
+ fifo->shared.readerWaitx = 0;
+ break;
+ }
+
+ if (count != 0)
+ {
+ while ((fifo->eventReader == FALSE) && (isDeadLine(DeadLine) == FALSE))
+ {}
+
+ Stop = (fifo->eventReader == FALSE); /* If the function timeout, the maximum number of characters are read before returning */
+ }
+ } while (count != 0);
+
+ fifo->startIndex = buffer.index;
+ }
+
+ return count;
+}
+
+
+void Ifx_Fifo_clear(Ifx_Fifo *fifo)
+{
+ boolean interruptState;
+
+ interruptState = IfxCpu_disableInterrupts();
+
+ if (fifo->shared.writerWaitx != 0)
+ {
+ fifo->shared.writerWaitx = 0;
+ fifo->eventWriter = TRUE; /* Signal the writer */
+ }
+
+ fifo->eventReader = FALSE;
+ fifo->shared.readerWaitx = 0;
+ fifo->shared.count = 0;
+ fifo->shared.maxcount = 0;
+ fifo->startIndex = fifo->endIndex;
+ IfxCpu_restoreInterrupts(interruptState);
+}
+
+
+static Ifx_SizeT Ifx_Fifo_beginWrite(Ifx_Fifo *fifo, Ifx_SizeT count)
+{
+ Ifx_SizeT blockSize;
+ boolean interruptState;
+
+ interruptState = IfxCpu_disableInterrupts();
+ blockSize = __min(count, fifo->size - Ifx_Fifo_readCount(fifo));
+ blockSize -= blockSize % fifo->elementSize;
+ fifo->eventWriter = FALSE;
+ fifo->shared.writerWaitx = __min(count - blockSize, fifo->size);
+ IfxCpu_restoreInterrupts(interruptState);
+
+ return blockSize;
+}
+
+
+boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout)
+{
+ boolean result;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
+
+
+ if ((count < fifo->elementSize) || (count > fifo->size))
+ { /* Only complete elements can be written to the buffer */
+ result = FALSE;
+ }
+
+ else
+ {
+ boolean interruptState;
+ interruptState = IfxCpu_disableInterrupts();
+
+ if ((fifo->size - Ifx_Fifo_readCount(fifo)) >= count)
+ {
+ fifo->shared.writerWaitx = 0;
+ fifo->eventWriter = TRUE;
+ IfxCpu_restoreInterrupts(interruptState);
+ result = TRUE;
+ }
+ else
+ {
+ Ifx_TickTime DeadLine = getDeadLine(timeout);
+ fifo->eventWriter = FALSE;
+ fifo->shared.writerWaitx = __max(0, count - (fifo->size - Ifx_Fifo_readCount(fifo)));
+ IfxCpu_restoreInterrupts(interruptState);
+
+ while ((fifo->eventWriter == FALSE) && (isDeadLine(DeadLine) == FALSE))
+ {}
+ /* After the timeout, the writer is not waiting for any space */
+ fifo->shared.writerWaitx = 0;
+ result = fifo->eventWriter == TRUE;
+ }
+ }
+
+ return result;
+}
+
+static Ifx_SizeT Ifx_Fifo_endWrite(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_SizeT blockSize)
+{
+ boolean interruptState;
+
+ /* Set the shared values */
+ interruptState = IfxCpu_disableInterrupts();
+
+ fifo->shared.count += blockSize;
+ fifo->shared.maxcount = __max(fifo->shared.maxcount, fifo->shared.count); /* Update maximum value */
+
+ if (fifo->shared.readerWaitx != 0)
+ {
+ fifo->shared.readerWaitx -= blockSize;
+
+ if (fifo->shared.readerWaitx <= 0)
+ {
+ fifo->shared.readerWaitx = 0;
+ fifo->eventReader = TRUE; /* Signal the reader - a re-scheduling may occur at this point! */
+ }
+ }
+
+ IfxCpu_restoreInterrupts(interruptState);
+
+ return count - blockSize;
+}
+
+
+
+Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout)
+{
+ Ifx_TickTime DeadLine;
+ Ifx_SizeT blockSize;
+ Ifx_CircularBuffer buffer;
+ boolean Stop = FALSE;
+
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, fifo != NULL_PTR);
+ IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, data != NULL_PTR);
+
+ if (count != 0)
+ {
+ buffer.base = fifo->buffer;
+ buffer.length = (uint16)fifo->size; /* size always fit into 16 bit */
+ buffer.index = (uint16)fifo->endIndex; /* startIndex always fit into size */
+ DeadLine = getDeadLine(timeout);
+
+ do
+ {
+ blockSize = Ifx_Fifo_beginWrite(fifo, count);
+
+ if (blockSize != 0)
+ {
+ /* write element to the buffer */
+ data = Ifx_CircularBuffer_write8(&buffer, data, blockSize);
+ count = Ifx_Fifo_endWrite(fifo, count, blockSize);
+ }
+
+ if ((Stop != FALSE) || (isDeadLine(DeadLine) != FALSE))
+ {
+ /*When exiting, the writer is not waiting for any space */
+ fifo->shared.writerWaitx = 0;
+ break;
+ }
+
+ if (count != 0)
+ {
+ while ((fifo->eventWriter == FALSE) && (isDeadLine(DeadLine) == FALSE))
+ {}
+
+ Stop = fifo->eventWriter == FALSE; /* If the function timeout, the maximum number of characters are written before returning */
+ }
+ } while (count != 0);
+
+ fifo->endIndex = buffer.index;
+ }
+
+ return count;
+}
+
+//------------------------------------------------------------------------------
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_Fifo.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_Fifo.h
new file mode 100644
index 0000000..47edb2e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/Ifx_Fifo.h
@@ -0,0 +1,243 @@
+/**
+ * \file Ifx_Fifo.h
+ * \brief FIFO buffer functions
+ * \ingroup IfxLld_lib_datahandling_fifo
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_lib_datahandling_fifo FIFO
+ * This module implements the FIFO buffer functionality.
+ * \ingroup IfxLld_lib_datahandling
+ *
+ */
+
+#ifndef IFX_FIFO_H
+#define IFX_FIFO_H 1
+//------------------------------------------------------------------------------
+#include "Ifx_Cfg.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+//------------------------------------------------------------------------------
+
+/** Shared data of the FIFO
+ *
+ */
+typedef struct
+{
+ Ifx_SizeT count; /**< \brief number of bytes contained in the buffer */
+ sint32 readerWaitx; /**< \brief Number of bytes that the reader is waiting for. When the writer modify it to 0 the reader get signaled */
+ sint32 writerWaitx; /**< \brief Number of byte that the writer expect to be free. When the reader modify it to 0 the reader get signaled */
+ Ifx_SizeT maxcount; /**< \brief Highest value seen in the count */
+} Ifx_Fifo_Shared;
+
+/** \addtogroup IfxLld_lib_datahandling_fifo
+ * \{ */
+/** Fifo object
+ *
+ */
+typedef struct _Fifo
+{
+ void *buffer; /**< \brief aligned on 64 bit boundary */
+ Ifx_Fifo_Shared shared; /**< \brief data shared between reader / writer */
+ Ifx_SizeT startIndex; /**< \brief buffer valid data start index */
+ Ifx_SizeT endIndex; /**< \brief buffer valid data end index */
+ Ifx_SizeT size; /**< \brief multiple of 8 bit, max 0xFFF8 */
+ Ifx_SizeT elementSize; /**< \brief minimum number of bytes (block) added / removed to / from the buffer */
+ volatile boolean eventReader; /**< \brief event set by the writer to signal the reader that the required data are available in the buffer */
+ volatile boolean eventWriter; /**< \brief event set by the reader to signal the writer that the required free space are available in the buffer */
+} Ifx_Fifo;
+
+/** \brief Indicates if the required number of bytes are available in the buffer
+ *
+ * Should not be called from an interrupt as this function may wait forever
+ * \param fifo Pointer on the Fifo object
+ * \param count in bytes
+ * \param timeout in system timer ticks
+ *
+ * \return TRUE if at least count bytes can be read from the buffer, else
+ * the Event is armed to be set when the buffer count is bigger or equal to the requested count
+ */
+IFX_EXTERN boolean Ifx_Fifo_canReadCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout);
+/** \brief Indicates if there is enough free space to write the data in the buffer
+ *
+ * Should not be called from an interrupt as this function may wait forever
+ *
+ * \param fifo Pointer on the Fifo object
+ * \param count in bytes
+ * \param timeout in system timer ticks
+ *
+ * \return TRUE if at least count bytes can be written to the buffer,
+ * if not the Event is armed to be set when the buffer free count is bigger or equal to the requested count
+ */
+IFX_EXTERN boolean Ifx_Fifo_canWriteCount(Ifx_Fifo *fifo, Ifx_SizeT count, Ifx_TickTime timeout);
+
+/** \brief Clear fifo contents.
+ *
+ * \param fifo Pointer on the Fifo object
+ *
+ * \return void
+ */
+IFX_EXTERN void Ifx_Fifo_clear(Ifx_Fifo *fifo);
+
+/** \brief Create a Fifo object
+ *
+ * The memory required for the object is allocated dynamically.
+ *
+ * \param size Specifies the FIFO buffer size in bytes
+ * \param elementSize Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
+ *
+ * \return returns a pointer to the FIFO object
+ *
+ * \see Ifx_Fifo_destroy()
+ */
+IFX_EXTERN Ifx_Fifo *Ifx_Fifo_create(Ifx_SizeT size, Ifx_SizeT elementSize);
+
+/** \brief Destroy the FIFO object
+ *
+ * This function must be called to destroy the fifo object when created with \ref Ifx_Fifo_create()
+ *
+ * \param fifo Pointer on the Fifo object
+ * \return void
+ *
+ * \see Ifx_Fifo_create()
+ */
+IFX_EXTERN void Ifx_Fifo_destroy(Ifx_Fifo *fifo);
+
+/** \brief Initialize the FIFO buffer object
+ *
+ * \param buffer Specifies the FIFO object address.
+ * \param size Specifies the FIFO buffer size in bytes
+ * \param elementSize Specifies data element size in bytes. size must be bigger or equal to elemenntSize.
+ *
+ * \return Returns a pointer on the FIFO object
+ *
+ * \note: The buffer parameter must point on a free memory location where the
+ * buffer object will be initialised. The size of this area must be at least
+ * equals to "size + sizeof(Ifx_Fifo) + 8". Not taking this in account may result
+ * in unpredictable behavior.
+ */
+IFX_EXTERN Ifx_Fifo *Ifx_Fifo_init(void *buffer, Ifx_SizeT size, Ifx_SizeT elementSize);
+
+/** \brief Read data from a fifo and remove them from the buffer.
+ *
+ * Only complete elements are returned, if count is not a multiple of
+ * elementSize then the incomplete element is not read/removed from the buffer.
+ *
+ * \param fifo Pointer on the Fifo object
+ * \param data Pointer to the data buffer for storing values
+ * \param count in bytes
+ * \param timeout in system timer ticks
+ *
+ * \return return the number of byte that could not be read
+ */
+IFX_EXTERN Ifx_SizeT Ifx_Fifo_read(Ifx_Fifo *fifo, void *data, Ifx_SizeT count, Ifx_TickTime timeout);
+
+/** \brief Write data into a fifo.
+ *
+ * Only complete elements are written to the buffer, if count is not a multiple of
+ * elementSize then the incomplete element are not written to the buffer.
+ *
+ * \param fifo Pointer on the Fifo object
+ * \param data Pointer to the data buffer to write into the Fifo
+ * \param count in bytes
+ * \param timeout in system timer ticks
+ */
+IFX_EXTERN Ifx_SizeT Ifx_Fifo_write(Ifx_Fifo *fifo, const void *data, Ifx_SizeT count, Ifx_TickTime timeout);
+
+/** \brief Empty the fifo
+ *
+ * \param fifo Pointer on the Fifo object
+ * \param timeout in system timer ticks
+ *
+ * \return TRUE if the buffer is emptied.
+ */
+IFX_INLINE boolean Ifx_Fifo_flush(Ifx_Fifo *fifo, Ifx_TickTime timeout)
+{
+ return Ifx_Fifo_canWriteCount(fifo, fifo->size, timeout);
+}
+
+
+/**
+ * \brief Returns the size of the data in the buffer in bytes
+ *
+ * \param fifo Pointer on the Fifo object
+ *
+ * Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are
+ * a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return
+ * a multiple of fifo->elementSize
+ *
+ * \return Returns the size of the data in the buffer in bytes
+ */
+IFX_INLINE Ifx_SizeT Ifx_Fifo_readCount(Ifx_Fifo *fifo)
+{
+ return fifo->shared.count;
+}
+
+
+/** \brief Returns the free size in bytes
+ *
+ * \param fifo Pointer on the Fifo object
+ *
+ * Note as the Ifx_Fifo_write / Ifx_Fifo_read function does only write blocks which are
+ * a multiple of fifo->elementSize, the Ifx_Fifo_readCount / Ifx_Fifo_writeCount return
+ * a multiple of fifo->elementSize
+ *
+ * \return Returns the free size in bytes
+ */
+IFX_INLINE Ifx_SizeT Ifx_Fifo_writeCount(Ifx_Fifo *fifo)
+{
+ return (Ifx_SizeT)(fifo->size - Ifx_Fifo_readCount(fifo));
+}
+
+
+/** \brief Indicates if the fifo is empty
+ *
+ * \param fifo Pointer on the Ifx_Fifo object
+ *
+ * \retval TRUE is the buffer is empty
+ * \retval FALSE is the buffer is not empty
+ */
+IFX_INLINE boolean Ifx_Fifo_isEmpty(Ifx_Fifo *fifo)
+{
+ return (Ifx_Fifo_readCount(fifo) != FALSE) ? FALSE : TRUE;
+}
+
+
+/**\}*/
+//------------------------------------------------------------------------------
+#endif
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/info.dox b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/info.dox
new file mode 100644
index 0000000..26e05dc
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/DataHandling/info.dox
@@ -0,0 +1,5 @@
+/**
+ * \defgroup IfxLld_lib_datahandling Data handling
+ * \ingroup IfxLld_lib
+ *
+ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/Ifx_InternalMux.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/Ifx_InternalMux.c
new file mode 100644
index 0000000..1c66461
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/Ifx_InternalMux.c
@@ -0,0 +1,67 @@
+/**
+ * \file Ifx_InternalMux.c
+ * \brief Mux configuration functions
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2019 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Ifx_InternalMux.h"
+#include "Cpu/Std/IfxCpu_Intrinsics.h"
+
+/******************************************************************************/
+/*-------------------------Function Implementations---------------------------*/
+/******************************************************************************/
+
+void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg)
+{
+ uint32 i;
+
+ for (i = 0; i < cfg->size; i++)
+ {
+ Ifx_InternalMux_MuxConfig muxCfg = cfg->muxConfig[i];
+
+ /*Load modify store operation done to insert the value to the register bit field*/
+ __ldmst((volatile void *)(muxCfg.regAddr), muxCfg.mask, muxCfg.value);
+ }
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/Ifx_InternalMux.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/Ifx_InternalMux.h
new file mode 100644
index 0000000..0145bf8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/Ifx_InternalMux.h
@@ -0,0 +1,94 @@
+/**
+ * \file Ifx_InternalMux.h
+ * \brief Mux configuration functions
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2015 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_lib_internalmux_internalmux FIFO
+ * This module implements the Internal Mux functionality.
+ * \ingroup IfxLld_lib_internalmux
+ */
+
+#ifndef IFX_INTERNALMUX_H
+#define IFX_INTERNALMUX_H 1
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+#include "Cpu/Std/Ifx_Types.h"
+
+/******************************************************************************/
+/*-----------------------------Data Structures--------------------------------*/
+/******************************************************************************/
+/** \addtogroup IfxLld_lib_internalmux_internalmux
+ * \{ */
+/** Individual Mux configuration structure
+ *
+ */
+typedef struct
+{
+ volatile void *regAddr; /**< \brief pointer to the register for Mux/Demux configuration */
+ uint32 mask; /**< \brief Bit field position for the Mux/Demux selection */
+ uint32 value; /**< \brief Mux/Demux configuration value */
+} Ifx_InternalMux_MuxConfig;
+
+/** Global/Combined Mux configuration object
+ *
+ */
+typedef struct
+{
+ uint32 size; /**< size of the internal mux configuration array*/
+ Ifx_InternalMux_MuxConfig *muxConfig; /**< pointer to the internal mux config array*/
+}Ifx_InternalMux_Config;
+
+/******************************************************************************/
+/*-------------------------Global Function Prototypes-------------------------*/
+/******************************************************************************/
+/** \brief Initialises the internal mux configuration
+ *
+ * \param cfg Pointer on the Global Mux Configuration object
+ *
+ * \return None
+ */
+IFX_EXTERN void Ifx_InternalMux_init(const Ifx_InternalMux_Config *cfg);
+
+/**\}*/
+
+#endif /* IFX_INTERNALMUX_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/info.dox b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/info.dox
new file mode 100644
index 0000000..84c679b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux/info.dox
@@ -0,0 +1,5 @@
+/**
+ * \defgroup IfxLld_lib_internalmux Internal Mux
+ * \ingroup IfxLld_lib
+ *
+ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/info.dox b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/info.dox
new file mode 100644
index 0000000..c79b644
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/info.dox
@@ -0,0 +1,5 @@
+/**
+ * \defgroup IfxLld_lib General functionalities
+ * \ingroup IfxLld
+ *
+ */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxAsclin_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxAsclin_PinMap.c
new file mode 100644
index 0000000..53f2300
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxAsclin_PinMap.c
@@ -0,0 +1,345 @@
+/**
+ * \file IfxAsclin_PinMap.c
+ * \brief ASCLIN I/O map
+ * \ingroup IfxLld_Asclin
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxAsclin_PinMap.h"
+
+IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a};
+IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a};
+IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b};
+IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a};
+IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b};
+IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a};
+IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3};
+IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a};
+IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b};
+IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a};
+IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b};
+IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c};
+IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d};
+IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e};
+IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f};
+IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g};
+IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a};
+IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b};
+IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d};
+IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e};
+IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g};
+IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a};
+IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c};
+IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d};
+IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e};
+IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f};
+IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt6};
+IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt6};
+IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt6};
+IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt6};
+IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,11}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt4};
+IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt6};
+IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt4};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt6};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt6};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt3};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt3};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt4};
+IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT = {&MODULE_ASCLIN1, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt4};
+IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,10}, IfxPort_OutputIdx_alt4};
+IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt6};
+IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt5};
+IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2};
+IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2};
+
+
+const IfxAsclin_Cts_In *IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS] = {
+ {
+ &IfxAsclin0_CTSA_P14_9_IN,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin1_CTSA_P20_7_IN,
+ &IfxAsclin1_CTSB_P32_4_IN
+ },
+ {
+ &IfxAsclin2_CTSA_P10_7_IN,
+ &IfxAsclin2_CTSB_P33_5_IN
+ },
+ {
+ &IfxAsclin3_CTSA_P00_12_IN,
+ NULL_PTR
+ }
+};
+
+const IfxAsclin_Rts_Out *IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS] = {
+ {
+ &IfxAsclin0_RTS_P14_7_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin1_RTS_P20_6_OUT,
+ &IfxAsclin1_RTS_P23_1_OUT
+ },
+ {
+ &IfxAsclin2_RTS_P10_8_OUT,
+ &IfxAsclin2_RTS_P33_4_OUT
+ },
+ {
+ &IfxAsclin3_RTS_P00_9_OUT,
+ NULL_PTR
+ }
+};
+
+const IfxAsclin_Rx_In *IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS] = {
+ {
+ &IfxAsclin0_RXA_P14_1_IN,
+ &IfxAsclin0_RXB_P15_3_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin1_RXA_P15_1_IN,
+ &IfxAsclin1_RXB_P15_5_IN,
+ &IfxAsclin1_RXC_P20_9_IN,
+ &IfxAsclin1_RXD_P14_8_IN,
+ &IfxAsclin1_RXE_P11_10_IN,
+ &IfxAsclin1_RXF_P33_13_IN,
+ &IfxAsclin1_RXG_P02_3_IN
+ },
+ {
+ &IfxAsclin2_RXA_P14_3_IN,
+ &IfxAsclin2_RXB_P02_1_IN,
+ NULL_PTR,
+ &IfxAsclin2_RXD_P10_6_IN,
+ &IfxAsclin2_RXE_P33_8_IN,
+ NULL_PTR,
+ &IfxAsclin2_RXG_P02_0_IN
+ },
+ {
+ &IfxAsclin3_RXA_P15_7_IN,
+ NULL_PTR,
+ &IfxAsclin3_RXC_P20_3_IN,
+ &IfxAsclin3_RXD_P32_2_IN,
+ &IfxAsclin3_RXE_P00_1_IN,
+ &IfxAsclin3_RXF_P21_6_IN,
+ NULL_PTR
+ }
+};
+
+const IfxAsclin_Sclk_Out *IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS] = {
+ {
+ &IfxAsclin0_SCLK_P14_0_OUT,
+ &IfxAsclin0_SCLK_P15_2_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin1_SCLK_P15_0_OUT,
+ &IfxAsclin1_SCLK_P20_10_OUT,
+ &IfxAsclin1_SCLK_P33_11_OUT,
+ &IfxAsclin1_SCLK_P33_12_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin2_SCLK_P02_4_OUT,
+ &IfxAsclin2_SCLK_P10_6_OUT,
+ &IfxAsclin2_SCLK_P14_2_OUT,
+ &IfxAsclin2_SCLK_P33_7_OUT,
+ &IfxAsclin2_SCLK_P33_9_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin3_SCLK_P00_0_OUT,
+ &IfxAsclin3_SCLK_P00_2_OUT,
+ &IfxAsclin3_SCLK_P15_6_OUT,
+ &IfxAsclin3_SCLK_P15_8_OUT,
+ &IfxAsclin3_SCLK_P20_0_OUT,
+ &IfxAsclin3_SCLK_P21_5_OUT,
+ &IfxAsclin3_SCLK_P21_7_OUT,
+ &IfxAsclin3_SCLK_P32_3_OUT,
+ &IfxAsclin3_SCLK_P33_2_OUT
+ }
+};
+
+const IfxAsclin_Slso_Out *IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS] = {
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin1_SLSO_P14_3_OUT,
+ &IfxAsclin1_SLSO_P20_8_OUT,
+ &IfxAsclin1_SLSO_P33_10_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin2_SLSO_P02_3_OUT,
+ &IfxAsclin2_SLSO_P10_5_OUT,
+ &IfxAsclin2_SLSO_P33_6_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin3_SLSO_P00_3_OUT,
+ &IfxAsclin3_SLSO_P14_3_OUT,
+ &IfxAsclin3_SLSO_P21_2_OUT,
+ &IfxAsclin3_SLSO_P21_6_OUT,
+ &IfxAsclin3_SLSO_P33_1_OUT
+ }
+};
+
+const IfxAsclin_Tx_Out *IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS] = {
+ {
+ &IfxAsclin0_TX_P14_0_OUT,
+ &IfxAsclin0_TX_P14_1_OUT,
+ &IfxAsclin0_TX_P15_2_OUT,
+ &IfxAsclin0_TX_P15_3_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin1_TX_P02_2_OUT,
+ &IfxAsclin1_TX_P11_12_OUT,
+ &IfxAsclin1_TX_P14_10_OUT,
+ &IfxAsclin1_TX_P15_0_OUT,
+ &IfxAsclin1_TX_P15_1_OUT,
+ &IfxAsclin1_TX_P15_4_OUT,
+ &IfxAsclin1_TX_P15_5_OUT,
+ &IfxAsclin1_TX_P20_10_OUT,
+ &IfxAsclin1_TX_P33_12_OUT,
+ &IfxAsclin1_TX_P33_13_OUT
+ },
+ {
+ &IfxAsclin2_TX_P02_0_OUT,
+ &IfxAsclin2_TX_P10_5_OUT,
+ &IfxAsclin2_TX_P14_2_OUT,
+ &IfxAsclin2_TX_P14_3_OUT,
+ &IfxAsclin2_TX_P33_8_OUT,
+ &IfxAsclin2_TX_P33_9_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxAsclin3_TX_P00_0_OUT,
+ &IfxAsclin3_TX_P00_1_OUT,
+ &IfxAsclin3_TX_P15_6_OUT,
+ &IfxAsclin3_TX_P15_7_OUT,
+ &IfxAsclin3_TX_P20_0_OUT,
+ &IfxAsclin3_TX_P20_3_OUT,
+ &IfxAsclin3_TX_P21_7_OUT,
+ &IfxAsclin3_TX_P32_2_OUT,
+ &IfxAsclin3_TX_P32_3_OUT,
+ NULL_PTR
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxAsclin_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxAsclin_PinMap.h
new file mode 100644
index 0000000..236336e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxAsclin_PinMap.h
@@ -0,0 +1,228 @@
+/**
+ * \file IfxAsclin_PinMap.h
+ * \brief ASCLIN I/O map
+ * \ingroup IfxLld_Asclin
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Asclin_pinmap ASCLIN Pin Mapping
+ * \ingroup IfxLld_Asclin
+ */
+
+#ifndef IFXASCLIN_PINMAP_H
+#define IFXASCLIN_PINMAP_H
+
+#include
+#include <_Impl/IfxAsclin_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Asclin_pinmap
+ * \{ */
+
+/** \brief CTS pin mapping structure */
+typedef const struct
+{
+ Ifx_ASCLIN* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxAsclin_Cts_In;
+
+/** \brief RX pin mapping structure */
+typedef const struct
+{
+ Ifx_ASCLIN* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxAsclin_Rx_In;
+
+/** \brief RTS pin mapping structure */
+typedef const struct
+{
+ Ifx_ASCLIN* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxAsclin_Rts_Out;
+
+/** \brief SCLK pin mapping structure */
+typedef const struct
+{
+ Ifx_ASCLIN* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxAsclin_Sclk_Out;
+
+/** \brief SLSO pin mapping structure */
+typedef const struct
+{
+ Ifx_ASCLIN* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxAsclin_Slso_Out;
+
+/** \brief TX pin mapping structure */
+typedef const struct
+{
+ Ifx_ASCLIN* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxAsclin_Tx_Out;
+
+IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN; /**< \brief ASCLIN0_CTSA: ASCLIN0 input */
+IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN; /**< \brief ASCLIN1_CTSA: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN; /**< \brief ASCLIN1_CTSB: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN; /**< \brief ASCLIN2_CTSA: ASCLIN2 input */
+IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN; /**< \brief ASCLIN2_CTSB: ASCLIN2 input */
+IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN; /**< \brief ASCLIN3_CTSA: ASCLIN3 input */
+IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT; /**< \brief ASCLIN0_RTS: ASCLIN0 output */
+IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT; /**< \brief ASCLIN1_RTS: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT; /**< \brief ASCLIN1_RTS: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT; /**< \brief ASCLIN2_RTS: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT; /**< \brief ASCLIN2_RTS: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT; /**< \brief ASCLIN3_RTS: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN; /**< \brief ASCLIN0_RXA: ASCLIN0 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN; /**< \brief ASCLIN0_RXB: ASCLIN0 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN; /**< \brief ASCLIN1_RXA: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN; /**< \brief ASCLIN1_RXB: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN; /**< \brief ASCLIN1_RXC: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN; /**< \brief ASCLIN1_RXD: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN; /**< \brief ASCLIN1_RXE: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN; /**< \brief ASCLIN1_RXF: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN; /**< \brief ASCLIN1_RXG: ASCLIN1 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN; /**< \brief ASCLIN2_RXA: ASCLIN2 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN; /**< \brief ASCLIN2_RXB: ASCLIN2 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN; /**< \brief ASCLIN2_RXD: ASCLIN2 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN; /**< \brief ASCLIN2_RXE: ASCLIN2 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN; /**< \brief ASCLIN2_RXG: ASCLIN2 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN; /**< \brief ASCLIN3_RXA: ASCLIN3 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN; /**< \brief ASCLIN3_RXC: ASCLIN3 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN; /**< \brief ASCLIN3_RXD: ASCLIN3 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN; /**< \brief ASCLIN3_RXE: ASCLIN3 input */
+IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN; /**< \brief ASCLIN3_RXF: ASCLIN3 input */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT; /**< \brief ASCLIN0_SCLK: ASCLIN0 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT; /**< \brief ASCLIN0_SCLK: ASCLIN0 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
+
+/** \brief Table dimensions */
+#define IFXASCLIN_PINMAP_NUM_MODULES 4
+#define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
+#define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
+#define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7
+#define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 9
+#define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 5
+#define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 10
+
+
+/** \brief IfxAsclin_Cts_In table */
+IFX_EXTERN const IfxAsclin_Cts_In *IfxAsclin_Cts_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS];
+
+/** \brief IfxAsclin_Rts_Out table */
+IFX_EXTERN const IfxAsclin_Rts_Out *IfxAsclin_Rts_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS];
+
+/** \brief IfxAsclin_Rx_In table */
+IFX_EXTERN const IfxAsclin_Rx_In *IfxAsclin_Rx_In_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS];
+
+/** \brief IfxAsclin_Sclk_Out table */
+IFX_EXTERN const IfxAsclin_Sclk_Out *IfxAsclin_Sclk_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS];
+
+/** \brief IfxAsclin_Slso_Out table */
+IFX_EXTERN const IfxAsclin_Slso_Out *IfxAsclin_Slso_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS];
+
+/** \brief IfxAsclin_Tx_Out table */
+IFX_EXTERN const IfxAsclin_Tx_Out *IfxAsclin_Tx_Out_pinTable[IFXASCLIN_PINMAP_NUM_MODULES][IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXASCLIN_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCcu6_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCcu6_PinMap.c
new file mode 100644
index 0000000..bee4af6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCcu6_PinMap.c
@@ -0,0 +1,374 @@
+/**
+ * \file IfxCcu6_PinMap.c
+ * \brief CCU6 I/O map
+ * \ingroup IfxLld_Ccu6
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxCcu6_PinMap.h"
+
+IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT = {&MODULE_CCU60, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT = {&MODULE_CCU60, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT = {&MODULE_CCU60, {&MODULE_P11,12}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT = {&MODULE_CCU60, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT = {&MODULE_CCU61, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT = {&MODULE_CCU61, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT = {&MODULE_CCU61, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT = {&MODULE_CCU61, {&MODULE_P33,13}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN = {&MODULE_CCU60, {&MODULE_P02, 0}, Ifx_RxSel_a};
+IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN = {&MODULE_CCU60, {&MODULE_P00, 1}, Ifx_RxSel_b};
+IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_c};
+IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN = {&MODULE_CCU61, {&MODULE_P00, 1}, Ifx_RxSel_a};
+IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN = {&MODULE_CCU61, {&MODULE_P02, 0}, Ifx_RxSel_b};
+IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_c};
+IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT = {&MODULE_CCU60, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT = {&MODULE_CCU60, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT = {&MODULE_CCU60, {&MODULE_P11,11}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT = {&MODULE_CCU60, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT = {&MODULE_CCU61, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT = {&MODULE_CCU61, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT = {&MODULE_CCU61, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT = {&MODULE_CCU61, {&MODULE_P33,11}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN = {&MODULE_CCU60, {&MODULE_P02, 2}, Ifx_RxSel_a};
+IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN = {&MODULE_CCU60, {&MODULE_P00, 3}, Ifx_RxSel_b};
+IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_c};
+IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN = {&MODULE_CCU61, {&MODULE_P00, 3}, Ifx_RxSel_a};
+IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN = {&MODULE_CCU61, {&MODULE_P02, 2}, Ifx_RxSel_b};
+IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_c};
+IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT = {&MODULE_CCU60, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT = {&MODULE_CCU60, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT = {&MODULE_CCU60, {&MODULE_P11,10}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT = {&MODULE_CCU60, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT = {&MODULE_CCU61, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT = {&MODULE_CCU61, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT = {&MODULE_CCU61, {&MODULE_P20,10}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT = {&MODULE_CCU61, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN = {&MODULE_CCU60, {&MODULE_P02, 4}, Ifx_RxSel_a};
+IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN = {&MODULE_CCU60, {&MODULE_P00, 5}, Ifx_RxSel_b};
+IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_c};
+IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN = {&MODULE_CCU61, {&MODULE_P00, 5}, Ifx_RxSel_a};
+IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN = {&MODULE_CCU61, {&MODULE_P02, 4}, Ifx_RxSel_b};
+IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_c};
+IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN = {&MODULE_CCU60, {&MODULE_P02, 6}, Ifx_RxSel_a};
+IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN = {&MODULE_CCU60, {&MODULE_P10, 4}, Ifx_RxSel_c};
+IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN = {&MODULE_CCU60, {&MODULE_P40, 0}, Ifx_RxSel_d};
+IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN = {&MODULE_CCU61, {&MODULE_P00, 7}, Ifx_RxSel_a};
+IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN = {&MODULE_CCU61, {&MODULE_P33, 7}, Ifx_RxSel_c};
+IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN = {&MODULE_CCU60, {&MODULE_P02, 7}, Ifx_RxSel_a};
+IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN = {&MODULE_CCU60, {&MODULE_P40, 1}, Ifx_RxSel_b};
+IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN = {&MODULE_CCU60, {&MODULE_P10, 7}, Ifx_RxSel_c};
+IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN = {&MODULE_CCU60, {&MODULE_P40, 2}, Ifx_RxSel_d};
+IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN = {&MODULE_CCU61, {&MODULE_P00, 8}, Ifx_RxSel_a};
+IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN = {&MODULE_CCU61, {&MODULE_P40, 6}, Ifx_RxSel_b};
+IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN = {&MODULE_CCU61, {&MODULE_P33, 6}, Ifx_RxSel_c};
+IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN = {&MODULE_CCU61, {&MODULE_P40, 7}, Ifx_RxSel_d};
+IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN = {&MODULE_CCU60, {&MODULE_P02, 8}, Ifx_RxSel_a};
+IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN = {&MODULE_CCU60, {&MODULE_P40, 3}, Ifx_RxSel_b};
+IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN = {&MODULE_CCU60, {&MODULE_P10, 8}, Ifx_RxSel_c};
+IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN = {&MODULE_CCU61, {&MODULE_P00, 9}, Ifx_RxSel_a};
+IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN = {&MODULE_CCU61, {&MODULE_P40, 8}, Ifx_RxSel_b};
+IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN = {&MODULE_CCU61, {&MODULE_P33, 5}, Ifx_RxSel_c};
+IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN = {&MODULE_CCU61, {&MODULE_P40, 9}, Ifx_RxSel_d};
+IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT = {&MODULE_CCU60, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT = {&MODULE_CCU60, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT = {&MODULE_CCU60, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT = {&MODULE_CCU61, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT = {&MODULE_CCU61, {&MODULE_P20,11}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT = {&MODULE_CCU61, {&MODULE_P33,12}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT = {&MODULE_CCU60, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT = {&MODULE_CCU60, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT = {&MODULE_CCU60, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT = {&MODULE_CCU61, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT = {&MODULE_CCU61, {&MODULE_P20,12}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT = {&MODULE_CCU61, {&MODULE_P33,10}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT = {&MODULE_CCU60, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT = {&MODULE_CCU60, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT = {&MODULE_CCU60, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT = {&MODULE_CCU61, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT = {&MODULE_CCU61, {&MODULE_P20,13}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT = {&MODULE_CCU61, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT = {&MODULE_CCU60, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT = {&MODULE_CCU60, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT = {&MODULE_CCU60, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT = {&MODULE_CCU60, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT = {&MODULE_CCU61, {&MODULE_P00,10}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT = {&MODULE_CCU61, {&MODULE_P00,12}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT = {&MODULE_CCU61, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt7};
+IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN = {&MODULE_CCU60, {&MODULE_P00,11}, Ifx_RxSel_a};
+IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN = {&MODULE_CCU61, {&MODULE_P00, 0}, Ifx_RxSel_a};
+IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN = {&MODULE_CCU61, {&MODULE_P33, 4}, Ifx_RxSel_c};
+IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN = {&MODULE_CCU60, {&MODULE_P00, 7}, Ifx_RxSel_b};
+IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c};
+IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN = {&MODULE_CCU60, {&MODULE_P00, 0}, Ifx_RxSel_e};
+IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN = {&MODULE_CCU61, {&MODULE_P02, 6}, Ifx_RxSel_b};
+IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c};
+IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN = {&MODULE_CCU61, {&MODULE_P00,11}, Ifx_RxSel_e};
+IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN = {&MODULE_CCU60, {&MODULE_P00, 8}, Ifx_RxSel_b};
+IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN = {&MODULE_CCU60, {&MODULE_P00, 9}, Ifx_RxSel_c};
+IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN = {&MODULE_CCU61, {&MODULE_P02, 7}, Ifx_RxSel_b};
+IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN = {&MODULE_CCU61, {&MODULE_P02, 8}, Ifx_RxSel_c};
+
+
+const IfxCcu6_Cc60_Out *IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CC60_P02_0_OUT,
+ &IfxCcu60_CC60_P02_6_OUT,
+ &IfxCcu60_CC60_P11_12_OUT,
+ &IfxCcu60_CC60_P15_6_OUT
+ },
+ {
+ &IfxCcu61_CC60_P00_1_OUT,
+ &IfxCcu61_CC60_P00_7_OUT,
+ &IfxCcu61_CC60_P20_8_OUT,
+ &IfxCcu61_CC60_P33_13_OUT
+ }
+};
+
+const IfxCcu6_Cc60in_In *IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CC60INA_P02_0_IN,
+ &IfxCcu60_CC60INB_P00_1_IN,
+ &IfxCcu60_CC60INC_P02_6_IN
+ },
+ {
+ &IfxCcu61_CC60INA_P00_1_IN,
+ &IfxCcu61_CC60INB_P02_0_IN,
+ &IfxCcu61_CC60INC_P00_7_IN
+ }
+};
+
+const IfxCcu6_Cc61_Out *IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CC61_P02_2_OUT,
+ &IfxCcu60_CC61_P02_7_OUT,
+ &IfxCcu60_CC61_P11_11_OUT,
+ &IfxCcu60_CC61_P15_5_OUT
+ },
+ {
+ &IfxCcu61_CC61_P00_3_OUT,
+ &IfxCcu61_CC61_P00_8_OUT,
+ &IfxCcu61_CC61_P20_9_OUT,
+ &IfxCcu61_CC61_P33_11_OUT
+ }
+};
+
+const IfxCcu6_Cc61in_In *IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CC61INA_P02_2_IN,
+ &IfxCcu60_CC61INB_P00_3_IN,
+ &IfxCcu60_CC61INC_P02_7_IN
+ },
+ {
+ &IfxCcu61_CC61INA_P00_3_IN,
+ &IfxCcu61_CC61INB_P02_2_IN,
+ &IfxCcu61_CC61INC_P00_8_IN
+ }
+};
+
+const IfxCcu6_Cc62_Out *IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CC62_P02_4_OUT,
+ &IfxCcu60_CC62_P02_8_OUT,
+ &IfxCcu60_CC62_P11_10_OUT,
+ &IfxCcu60_CC62_P15_4_OUT
+ },
+ {
+ &IfxCcu61_CC62_P00_5_OUT,
+ &IfxCcu61_CC62_P00_9_OUT,
+ &IfxCcu61_CC62_P20_10_OUT,
+ &IfxCcu61_CC62_P33_9_OUT
+ }
+};
+
+const IfxCcu6_Cc62in_In *IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CC62INA_P02_4_IN,
+ &IfxCcu60_CC62INB_P00_5_IN,
+ &IfxCcu60_CC62INC_P02_8_IN
+ },
+ {
+ &IfxCcu61_CC62INA_P00_5_IN,
+ &IfxCcu61_CC62INB_P02_4_IN,
+ &IfxCcu61_CC62INC_P00_9_IN
+ }
+};
+
+const IfxCcu6_Ccpos0_In *IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CCPOS0A_P02_6_IN,
+ NULL_PTR,
+ &IfxCcu60_CCPOS0C_P10_4_IN,
+ &IfxCcu60_CCPOS0D_P40_0_IN
+ },
+ {
+ &IfxCcu61_CCPOS0A_P00_7_IN,
+ NULL_PTR,
+ &IfxCcu61_CCPOS0C_P33_7_IN,
+ NULL_PTR
+ }
+};
+
+const IfxCcu6_Ccpos1_In *IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CCPOS1A_P02_7_IN,
+ &IfxCcu60_CCPOS1B_P40_1_IN,
+ &IfxCcu60_CCPOS1C_P10_7_IN,
+ &IfxCcu60_CCPOS1D_P40_2_IN
+ },
+ {
+ &IfxCcu61_CCPOS1A_P00_8_IN,
+ &IfxCcu61_CCPOS1B_P40_6_IN,
+ &IfxCcu61_CCPOS1C_P33_6_IN,
+ &IfxCcu61_CCPOS1D_P40_7_IN
+ }
+};
+
+const IfxCcu6_Ccpos2_In *IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CCPOS2A_P02_8_IN,
+ &IfxCcu60_CCPOS2B_P40_3_IN,
+ &IfxCcu60_CCPOS2C_P10_8_IN,
+ NULL_PTR
+ },
+ {
+ &IfxCcu61_CCPOS2A_P00_9_IN,
+ &IfxCcu61_CCPOS2B_P40_8_IN,
+ &IfxCcu61_CCPOS2C_P33_5_IN,
+ &IfxCcu61_CCPOS2D_P40_9_IN
+ }
+};
+
+const IfxCcu6_Cout60_Out *IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS] = {
+ {
+ &IfxCcu60_COUT60_P02_1_OUT,
+ &IfxCcu60_COUT60_P11_9_OUT,
+ &IfxCcu60_COUT60_P15_7_OUT
+ },
+ {
+ &IfxCcu61_COUT60_P00_2_OUT,
+ &IfxCcu61_COUT60_P20_11_OUT,
+ &IfxCcu61_COUT60_P33_12_OUT
+ }
+};
+
+const IfxCcu6_Cout61_Out *IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS] = {
+ {
+ &IfxCcu60_COUT61_P02_3_OUT,
+ &IfxCcu60_COUT61_P11_6_OUT,
+ &IfxCcu60_COUT61_P15_8_OUT
+ },
+ {
+ &IfxCcu61_COUT61_P00_4_OUT,
+ &IfxCcu61_COUT61_P20_12_OUT,
+ &IfxCcu61_COUT61_P33_10_OUT
+ }
+};
+
+const IfxCcu6_Cout62_Out *IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS] = {
+ {
+ &IfxCcu60_COUT62_P02_5_OUT,
+ &IfxCcu60_COUT62_P11_3_OUT,
+ &IfxCcu60_COUT62_P14_0_OUT
+ },
+ {
+ &IfxCcu61_COUT62_P00_6_OUT,
+ &IfxCcu61_COUT62_P20_13_OUT,
+ &IfxCcu61_COUT62_P33_8_OUT
+ }
+};
+
+const IfxCcu6_Cout63_Out *IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS] = {
+ {
+ &IfxCcu60_COUT63_P00_0_OUT,
+ &IfxCcu60_COUT63_P11_2_OUT,
+ &IfxCcu60_COUT63_P14_1_OUT,
+ &IfxCcu60_COUT63_P32_4_OUT
+ },
+ {
+ &IfxCcu61_COUT63_P00_10_OUT,
+ &IfxCcu61_COUT63_P00_12_OUT,
+ &IfxCcu61_COUT63_P20_7_OUT,
+ NULL_PTR
+ }
+};
+
+const IfxCcu6_Ctrap_In *IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS] = {
+ {
+ &IfxCcu60_CTRAPA_P00_11_IN,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxCcu61_CTRAPA_P00_0_IN,
+ NULL_PTR,
+ &IfxCcu61_CTRAPC_P33_4_IN
+ }
+};
+
+const IfxCcu6_T12hr_In *IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS] = {
+ {
+ NULL_PTR,
+ &IfxCcu60_T12HRB_P00_7_IN,
+ &IfxCcu60_T12HRC_P00_9_IN,
+ NULL_PTR,
+ &IfxCcu60_T12HRE_P00_0_IN
+ },
+ {
+ NULL_PTR,
+ &IfxCcu61_T12HRB_P02_6_IN,
+ &IfxCcu61_T12HRC_P02_8_IN,
+ NULL_PTR,
+ &IfxCcu61_T12HRE_P00_11_IN
+ }
+};
+
+const IfxCcu6_T13hr_In *IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS] = {
+ {
+ NULL_PTR,
+ &IfxCcu60_T13HRB_P00_8_IN,
+ &IfxCcu60_T13HRC_P00_9_IN
+ },
+ {
+ NULL_PTR,
+ &IfxCcu61_T13HRB_P02_7_IN,
+ &IfxCcu61_T13HRC_P02_8_IN
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCcu6_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCcu6_PinMap.h
new file mode 100644
index 0000000..d03196a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCcu6_PinMap.h
@@ -0,0 +1,357 @@
+/**
+ * \file IfxCcu6_PinMap.h
+ * \brief CCU6 I/O map
+ * \ingroup IfxLld_Ccu6
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Ccu6_pinmap CCU6 Pin Mapping
+ * \ingroup IfxLld_Ccu6
+ */
+
+#ifndef IFXCCU6_PINMAP_H
+#define IFXCCU6_PINMAP_H
+
+#include
+#include <_Impl/IfxCcu6_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Ccu6_pinmap
+ * \{ */
+
+/** \brief CC60IN pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_Cc60in_In;
+
+/** \brief CC61IN pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_Cc61in_In;
+
+/** \brief CC62IN pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_Cc62in_In;
+
+/** \brief CCPOS0 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_Ccpos0_In;
+
+/** \brief CCPOS1 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_Ccpos1_In;
+
+/** \brief CCPOS2 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_Ccpos2_In;
+
+/** \brief CTRAP pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_Ctrap_In;
+
+/** \brief T12HR pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_T12hr_In;
+
+/** \brief T13HR pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxCcu6_T13hr_In;
+
+/** \brief CC60 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxCcu6_Cc60_Out;
+
+/** \brief CC61 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxCcu6_Cc61_Out;
+
+/** \brief CC62 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxCcu6_Cc62_Out;
+
+/** \brief COUT60 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxCcu6_Cout60_Out;
+
+/** \brief COUT61 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxCcu6_Cout61_Out;
+
+/** \brief COUT62 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxCcu6_Cout62_Out;
+
+/** \brief COUT63 pin mapping structure */
+typedef const struct
+{
+ Ifx_CCU6* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxCcu6_Cout63_Out;
+
+IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_0_OUT; /**< \brief CCU60_CC60: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P02_6_OUT; /**< \brief CCU60_CC60: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P11_12_OUT; /**< \brief CCU60_CC60: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu60_CC60_P15_6_OUT; /**< \brief CCU60_CC60: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_1_OUT; /**< \brief CCU61_CC60: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P00_7_OUT; /**< \brief CCU61_CC60: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P20_8_OUT; /**< \brief CCU61_CC60: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc60_Out IfxCcu61_CC60_P33_13_OUT; /**< \brief CCU61_CC60: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INA_P02_0_IN; /**< \brief CCU60_CC60INA: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INB_P00_1_IN; /**< \brief CCU60_CC60INB: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu60_CC60INC_P02_6_IN; /**< \brief CCU60_CC60INC: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INA_P00_1_IN; /**< \brief CCU61_CC60INA: CCU61 input */
+IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INB_P02_0_IN; /**< \brief CCU61_CC60INB: CCU61 input */
+IFX_EXTERN IfxCcu6_Cc60in_In IfxCcu61_CC60INC_P00_7_IN; /**< \brief CCU61_CC60INC: CCU61 input */
+IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_2_OUT; /**< \brief CCU60_CC61: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P02_7_OUT; /**< \brief CCU60_CC61: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P11_11_OUT; /**< \brief CCU60_CC61: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu60_CC61_P15_5_OUT; /**< \brief CCU60_CC61: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_3_OUT; /**< \brief CCU61_CC61: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P00_8_OUT; /**< \brief CCU61_CC61: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P20_9_OUT; /**< \brief CCU61_CC61: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc61_Out IfxCcu61_CC61_P33_11_OUT; /**< \brief CCU61_CC61: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INA_P02_2_IN; /**< \brief CCU60_CC61INA: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INB_P00_3_IN; /**< \brief CCU60_CC61INB: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu60_CC61INC_P02_7_IN; /**< \brief CCU60_CC61INC: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INA_P00_3_IN; /**< \brief CCU61_CC61INA: CCU61 input */
+IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INB_P02_2_IN; /**< \brief CCU61_CC61INB: CCU61 input */
+IFX_EXTERN IfxCcu6_Cc61in_In IfxCcu61_CC61INC_P00_8_IN; /**< \brief CCU61_CC61INC: CCU61 input */
+IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_4_OUT; /**< \brief CCU60_CC62: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P02_8_OUT; /**< \brief CCU60_CC62: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P11_10_OUT; /**< \brief CCU60_CC62: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu60_CC62_P15_4_OUT; /**< \brief CCU60_CC62: CCU60 output */
+IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_5_OUT; /**< \brief CCU61_CC62: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P00_9_OUT; /**< \brief CCU61_CC62: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P20_10_OUT; /**< \brief CCU61_CC62: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc62_Out IfxCcu61_CC62_P33_9_OUT; /**< \brief CCU61_CC62: CCU61 output */
+IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INA_P02_4_IN; /**< \brief CCU60_CC62INA: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INB_P00_5_IN; /**< \brief CCU60_CC62INB: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu60_CC62INC_P02_8_IN; /**< \brief CCU60_CC62INC: CCU60 input */
+IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INA_P00_5_IN; /**< \brief CCU61_CC62INA: CCU61 input */
+IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INB_P02_4_IN; /**< \brief CCU61_CC62INB: CCU61 input */
+IFX_EXTERN IfxCcu6_Cc62in_In IfxCcu61_CC62INC_P00_9_IN; /**< \brief CCU61_CC62INC: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0A_P02_6_IN; /**< \brief CCU60_CCPOS0A: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0C_P10_4_IN; /**< \brief CCU60_CCPOS0C: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu60_CCPOS0D_P40_0_IN; /**< \brief CCU60_CCPOS0D: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0A_P00_7_IN; /**< \brief CCU61_CCPOS0A: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos0_In IfxCcu61_CCPOS0C_P33_7_IN; /**< \brief CCU61_CCPOS0C: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1A_P02_7_IN; /**< \brief CCU60_CCPOS1A: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1B_P40_1_IN; /**< \brief CCU60_CCPOS1B: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1C_P10_7_IN; /**< \brief CCU60_CCPOS1C: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu60_CCPOS1D_P40_2_IN; /**< \brief CCU60_CCPOS1D: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1A_P00_8_IN; /**< \brief CCU61_CCPOS1A: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1B_P40_6_IN; /**< \brief CCU61_CCPOS1B: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1C_P33_6_IN; /**< \brief CCU61_CCPOS1C: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos1_In IfxCcu61_CCPOS1D_P40_7_IN; /**< \brief CCU61_CCPOS1D: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2A_P02_8_IN; /**< \brief CCU60_CCPOS2A: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2B_P40_3_IN; /**< \brief CCU60_CCPOS2B: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu60_CCPOS2C_P10_8_IN; /**< \brief CCU60_CCPOS2C: CCU60 input */
+IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2A_P00_9_IN; /**< \brief CCU61_CCPOS2A: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2B_P40_8_IN; /**< \brief CCU61_CCPOS2B: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2C_P33_5_IN; /**< \brief CCU61_CCPOS2C: CCU61 input */
+IFX_EXTERN IfxCcu6_Ccpos2_In IfxCcu61_CCPOS2D_P40_9_IN; /**< \brief CCU61_CCPOS2D: CCU61 input */
+IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P02_1_OUT; /**< \brief CCU60_COUT60: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P11_9_OUT; /**< \brief CCU60_COUT60: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu60_COUT60_P15_7_OUT; /**< \brief CCU60_COUT60: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P00_2_OUT; /**< \brief CCU61_COUT60: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P20_11_OUT; /**< \brief CCU61_COUT60: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout60_Out IfxCcu61_COUT60_P33_12_OUT; /**< \brief CCU61_COUT60: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P02_3_OUT; /**< \brief CCU60_COUT61: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P11_6_OUT; /**< \brief CCU60_COUT61: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu60_COUT61_P15_8_OUT; /**< \brief CCU60_COUT61: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P00_4_OUT; /**< \brief CCU61_COUT61: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P20_12_OUT; /**< \brief CCU61_COUT61: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout61_Out IfxCcu61_COUT61_P33_10_OUT; /**< \brief CCU61_COUT61: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P02_5_OUT; /**< \brief CCU60_COUT62: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P11_3_OUT; /**< \brief CCU60_COUT62: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu60_COUT62_P14_0_OUT; /**< \brief CCU60_COUT62: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P00_6_OUT; /**< \brief CCU61_COUT62: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P20_13_OUT; /**< \brief CCU61_COUT62: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout62_Out IfxCcu61_COUT62_P33_8_OUT; /**< \brief CCU61_COUT62: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P00_0_OUT; /**< \brief CCU60_COUT63: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P11_2_OUT; /**< \brief CCU60_COUT63: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P14_1_OUT; /**< \brief CCU60_COUT63: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu60_COUT63_P32_4_OUT; /**< \brief CCU60_COUT63: CCU60 output */
+IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_10_OUT; /**< \brief CCU61_COUT63: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P00_12_OUT; /**< \brief CCU61_COUT63: CCU61 output */
+IFX_EXTERN IfxCcu6_Cout63_Out IfxCcu61_COUT63_P20_7_OUT; /**< \brief CCU61_COUT63: CCU61 output */
+IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu60_CTRAPA_P00_11_IN; /**< \brief CCU60_CTRAPA: CCU60 input */
+IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPA_P00_0_IN; /**< \brief CCU61_CTRAPA: CCU61 input */
+IFX_EXTERN IfxCcu6_Ctrap_In IfxCcu61_CTRAPC_P33_4_IN; /**< \brief CCU61_CTRAPC: CCU61 input */
+IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRB_P00_7_IN; /**< \brief CCU60_T12HRB: CCU60 input */
+IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRC_P00_9_IN; /**< \brief CCU60_T12HRC: CCU60 input */
+IFX_EXTERN IfxCcu6_T12hr_In IfxCcu60_T12HRE_P00_0_IN; /**< \brief CCU60_T12HRE: CCU60 input */
+IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRB_P02_6_IN; /**< \brief CCU61_T12HRB: CCU61 input */
+IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRC_P02_8_IN; /**< \brief CCU61_T12HRC: CCU61 input */
+IFX_EXTERN IfxCcu6_T12hr_In IfxCcu61_T12HRE_P00_11_IN; /**< \brief CCU61_T12HRE: CCU61 input */
+IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRB_P00_8_IN; /**< \brief CCU60_T13HRB: CCU60 input */
+IFX_EXTERN IfxCcu6_T13hr_In IfxCcu60_T13HRC_P00_9_IN; /**< \brief CCU60_T13HRC: CCU60 input */
+IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRB_P02_7_IN; /**< \brief CCU61_T13HRB: CCU61 input */
+IFX_EXTERN IfxCcu6_T13hr_In IfxCcu61_T13HRC_P02_8_IN; /**< \brief CCU61_T13HRC: CCU61 input */
+
+/** \brief Table dimensions */
+#define IFXCCU6_PINMAP_NUM_MODULES 2
+#define IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS 4
+#define IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS 3
+#define IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS 4
+#define IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS 3
+#define IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS 4
+#define IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS 3
+#define IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS 4
+#define IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS 4
+#define IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS 4
+#define IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS 3
+#define IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS 3
+#define IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS 3
+#define IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS 4
+#define IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS 3
+#define IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS 5
+#define IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS 3
+
+
+/** \brief IfxCcu6_Cc60_Out table */
+IFX_EXTERN const IfxCcu6_Cc60_Out *IfxCcu6_Cc60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60_OUT_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cc60in_In table */
+IFX_EXTERN const IfxCcu6_Cc60in_In *IfxCcu6_Cc60in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC60IN_IN_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cc61_Out table */
+IFX_EXTERN const IfxCcu6_Cc61_Out *IfxCcu6_Cc61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61_OUT_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cc61in_In table */
+IFX_EXTERN const IfxCcu6_Cc61in_In *IfxCcu6_Cc61in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC61IN_IN_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cc62_Out table */
+IFX_EXTERN const IfxCcu6_Cc62_Out *IfxCcu6_Cc62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62_OUT_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cc62in_In table */
+IFX_EXTERN const IfxCcu6_Cc62in_In *IfxCcu6_Cc62in_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CC62IN_IN_NUM_ITEMS];
+
+/** \brief IfxCcu6_Ccpos0_In table */
+IFX_EXTERN const IfxCcu6_Ccpos0_In *IfxCcu6_Ccpos0_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS0_IN_NUM_ITEMS];
+
+/** \brief IfxCcu6_Ccpos1_In table */
+IFX_EXTERN const IfxCcu6_Ccpos1_In *IfxCcu6_Ccpos1_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS1_IN_NUM_ITEMS];
+
+/** \brief IfxCcu6_Ccpos2_In table */
+IFX_EXTERN const IfxCcu6_Ccpos2_In *IfxCcu6_Ccpos2_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CCPOS2_IN_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cout60_Out table */
+IFX_EXTERN const IfxCcu6_Cout60_Out *IfxCcu6_Cout60_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT60_OUT_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cout61_Out table */
+IFX_EXTERN const IfxCcu6_Cout61_Out *IfxCcu6_Cout61_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT61_OUT_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cout62_Out table */
+IFX_EXTERN const IfxCcu6_Cout62_Out *IfxCcu6_Cout62_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT62_OUT_NUM_ITEMS];
+
+/** \brief IfxCcu6_Cout63_Out table */
+IFX_EXTERN const IfxCcu6_Cout63_Out *IfxCcu6_Cout63_Out_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_COUT63_OUT_NUM_ITEMS];
+
+/** \brief IfxCcu6_Ctrap_In table */
+IFX_EXTERN const IfxCcu6_Ctrap_In *IfxCcu6_Ctrap_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_CTRAP_IN_NUM_ITEMS];
+
+/** \brief IfxCcu6_T12hr_In table */
+IFX_EXTERN const IfxCcu6_T12hr_In *IfxCcu6_T12hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T12HR_IN_NUM_ITEMS];
+
+/** \brief IfxCcu6_T13hr_In table */
+IFX_EXTERN const IfxCcu6_T13hr_In *IfxCcu6_T13hr_In_pinTable[IFXCCU6_PINMAP_NUM_MODULES][IFXCCU6_PINMAP_T13HR_IN_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXCCU6_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCif_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCif_PinMap.c
new file mode 100644
index 0000000..17d7747
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCif_PinMap.c
@@ -0,0 +1,66 @@
+/**
+ * \file IfxCif_PinMap.c
+ * \brief CIF I/O map
+ * \ingroup IfxLld_Cif
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxCif_PinMap.h"
+
+IfxCif_Clk_In IfxCif_CLK_P00_7_IN = {&MODULE_CIF, {&MODULE_P00, 7}};
+IfxCif_D_In IfxCif_D0_P02_0_IN = {&MODULE_CIF, {&MODULE_P02, 0}};
+IfxCif_D_In IfxCif_D10_P00_1_IN = {&MODULE_CIF, {&MODULE_P00, 1}};
+IfxCif_D_In IfxCif_D11_P00_2_IN = {&MODULE_CIF, {&MODULE_P00, 2}};
+IfxCif_D_In IfxCif_D12_P00_3_IN = {&MODULE_CIF, {&MODULE_P00, 3}};
+IfxCif_D_In IfxCif_D13_P00_4_IN = {&MODULE_CIF, {&MODULE_P00, 4}};
+IfxCif_D_In IfxCif_D14_P00_5_IN = {&MODULE_CIF, {&MODULE_P00, 5}};
+IfxCif_D_In IfxCif_D15_P00_6_IN = {&MODULE_CIF, {&MODULE_P00, 6}};
+IfxCif_D_In IfxCif_D1_P02_1_IN = {&MODULE_CIF, {&MODULE_P02, 1}};
+IfxCif_D_In IfxCif_D2_P02_2_IN = {&MODULE_CIF, {&MODULE_P02, 2}};
+IfxCif_D_In IfxCif_D3_P02_3_IN = {&MODULE_CIF, {&MODULE_P02, 3}};
+IfxCif_D_In IfxCif_D4_P02_4_IN = {&MODULE_CIF, {&MODULE_P02, 4}};
+IfxCif_D_In IfxCif_D5_P02_5_IN = {&MODULE_CIF, {&MODULE_P02, 5}};
+IfxCif_D_In IfxCif_D6_P02_6_IN = {&MODULE_CIF, {&MODULE_P02, 6}};
+IfxCif_D_In IfxCif_D7_P02_7_IN = {&MODULE_CIF, {&MODULE_P02, 7}};
+IfxCif_D_In IfxCif_D8_P02_8_IN = {&MODULE_CIF, {&MODULE_P02, 8}};
+IfxCif_D_In IfxCif_D9_P00_0_IN = {&MODULE_CIF, {&MODULE_P00, 0}};
+IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN = {&MODULE_CIF, {&MODULE_P00, 9}};
+IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN = {&MODULE_CIF, {&MODULE_P00, 8}};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCif_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCif_PinMap.h
new file mode 100644
index 0000000..123ee8a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxCif_PinMap.h
@@ -0,0 +1,108 @@
+/**
+ * \file IfxCif_PinMap.h
+ * \brief CIF I/O map
+ * \ingroup IfxLld_Cif
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Cif_pinmap CIF Pin Mapping
+ * \ingroup IfxLld_Cif
+ */
+
+#ifndef IFXCIF_PINMAP_H
+#define IFXCIF_PINMAP_H
+
+#include
+#include <_Impl/IfxCif_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Cif_pinmap
+ * \{ */
+
+/** \brief CLK pin mapping structure */
+typedef const struct
+{
+ Ifx_CIF* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+} IfxCif_Clk_In;
+
+/** \brief D pin mapping structure */
+typedef const struct
+{
+ Ifx_CIF* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+} IfxCif_D_In;
+
+/** \brief HSNC pin mapping structure */
+typedef const struct
+{
+ Ifx_CIF* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+} IfxCif_Hsnc_In;
+
+/** \brief VSNC pin mapping structure */
+typedef const struct
+{
+ Ifx_CIF* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+} IfxCif_Vsnc_In;
+
+IFX_EXTERN IfxCif_Clk_In IfxCif_CLK_P00_7_IN; /**< \brief CIF_CLK: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D0_P02_0_IN; /**< \brief CIF_D0: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D10_P00_1_IN; /**< \brief CIF_D10: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D11_P00_2_IN; /**< \brief CIF_D11: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D12_P00_3_IN; /**< \brief CIF_D12: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D13_P00_4_IN; /**< \brief CIF_D13: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D14_P00_5_IN; /**< \brief CIF_D14: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D15_P00_6_IN; /**< \brief CIF_D15: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D1_P02_1_IN; /**< \brief CIF_D1: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D2_P02_2_IN; /**< \brief CIF_D2: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D3_P02_3_IN; /**< \brief CIF_D3: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D4_P02_4_IN; /**< \brief CIF_D4: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D5_P02_5_IN; /**< \brief CIF_D5: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D6_P02_6_IN; /**< \brief CIF_D6: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D7_P02_7_IN; /**< \brief CIF_D7: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D8_P02_8_IN; /**< \brief CIF_D8: CIF input */
+IFX_EXTERN IfxCif_D_In IfxCif_D9_P00_0_IN; /**< \brief CIF_D9: CIF input */
+IFX_EXTERN IfxCif_Hsnc_In IfxCif_HSNC_P00_9_IN; /**< \brief CIF_HSNC: CIF input */
+IFX_EXTERN IfxCif_Vsnc_In IfxCif_VSNC_P00_8_IN; /**< \brief CIF_VSNC: CIF input */
+
+/** \} */
+
+#endif /* IFXCIF_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxDsadc_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxDsadc_PinMap.c
new file mode 100644
index 0000000..8c1333b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxDsadc_PinMap.c
@@ -0,0 +1,279 @@
+/**
+ * \file IfxDsadc_PinMap.c
+ * \brief DSADC I/O map
+ * \ingroup IfxLld_Dsadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxDsadc_PinMap.h"
+
+IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT = {&MODULE_DSADC, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt2};
+IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT = {&MODULE_DSADC, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT = {&MODULE_DSADC, {&MODULE_P33,11}, IfxPort_OutputIdx_alt6};
+IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT = {&MODULE_DSADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt2};
+IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT = {&MODULE_DSADC, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT = {&MODULE_DSADC, {&MODULE_P33,12}, IfxPort_OutputIdx_alt6};
+IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, Ifx_RxSel_a};
+IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, Ifx_RxSel_b};
+IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, Ifx_RxSel_a};
+IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, Ifx_RxSel_b};
+IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, Ifx_RxSel_a};
+IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, Ifx_RxSel_b};
+IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT = {&MODULE_DSADC, 0, {&MODULE_P00,11}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT = {&MODULE_DSADC, 0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT = {&MODULE_DSADC, 0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT = {&MODULE_DSADC, 2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT = {&MODULE_DSADC, 2, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT = {&MODULE_DSADC, 3, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT = {&MODULE_DSADC, 3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt4};
+IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN = {&MODULE_DSADC, 0, {&MODULE_P00, 2}, Ifx_RxSel_a};
+IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 6}, Ifx_RxSel_b};
+IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN = {&MODULE_DSADC, 2, {&MODULE_P00, 6}, Ifx_RxSel_a};
+IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_b};
+IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 4}, Ifx_RxSel_a};
+IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_b};
+IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN = {&MODULE_DSADC, 0, {NULL_PTR, 3}, Ifx_RxSel_a};
+IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN = {&MODULE_DSADC, 0, {NULL_PTR, 1}, Ifx_RxSel_b};
+IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN = {&MODULE_DSADC, 2, {NULL_PTR,21}, Ifx_RxSel_a};
+IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN = {&MODULE_DSADC, 3, {NULL_PTR,37}, Ifx_RxSel_a};
+IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 7}, Ifx_RxSel_a};
+IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN = {&MODULE_DSADC, 3, {NULL_PTR,39}, Ifx_RxSel_b};
+IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 9}, Ifx_RxSel_b};
+IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN = {&MODULE_DSADC, 3, {NULL_PTR,45}, Ifx_RxSel_c};
+IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN = {&MODULE_DSADC, 3, {NULL_PTR,47}, Ifx_RxSel_d};
+IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN = {&MODULE_DSADC, 0, {NULL_PTR, 2}, Ifx_RxSel_a};
+IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN = {&MODULE_DSADC, 0, {NULL_PTR, 0}, Ifx_RxSel_b};
+IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN = {&MODULE_DSADC, 2, {NULL_PTR,20}, Ifx_RxSel_a};
+IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN = {&MODULE_DSADC, 3, {NULL_PTR,36}, Ifx_RxSel_a};
+IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 6}, Ifx_RxSel_a};
+IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN = {&MODULE_DSADC, 3, {NULL_PTR,38}, Ifx_RxSel_b};
+IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN = {&MODULE_DSADC, 3, {&MODULE_P40, 8}, Ifx_RxSel_b};
+IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN = {&MODULE_DSADC, 3, {NULL_PTR,44}, Ifx_RxSel_c};
+IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN = {&MODULE_DSADC, 3, {NULL_PTR,46}, Ifx_RxSel_d};
+IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 0}, Ifx_RxSel_e};
+IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN = {&MODULE_DSADC, 0, {&MODULE_P33, 4}, Ifx_RxSel_f};
+IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 2}, Ifx_RxSel_e};
+IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN = {&MODULE_DSADC, 2, {&MODULE_P33, 6}, Ifx_RxSel_f};
+IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN = {&MODULE_DSADC, 3, {&MODULE_P02, 8}, Ifx_RxSel_e};
+IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN = {&MODULE_DSADC, 3, {&MODULE_P00, 9}, Ifx_RxSel_f};
+IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN = {&MODULE_DSADC, {&MODULE_P00, 4}, Ifx_RxSel_a};
+IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN = {&MODULE_DSADC, {&MODULE_P33,13}, Ifx_RxSel_b};
+
+
+const IfxDsadc_Cgpwm_Out *IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS] = {
+ {
+ &IfxDsadc_CGPWMN_P00_5_OUT,
+ &IfxDsadc_CGPWMP_P00_6_OUT,
+ &IfxDsadc_CGPWMN_P02_0_OUT,
+ &IfxDsadc_CGPWMP_P02_1_OUT,
+ &IfxDsadc_CGPWMN_P33_11_OUT,
+ &IfxDsadc_CGPWMP_P33_12_OUT
+ }
+};
+
+const IfxDsadc_Cin_In *IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxDsadc_CIN0A_P00_1_IN,
+ &IfxDsadc_CIN0B_P33_5_IN
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxDsadc_CIN2A_P00_5_IN,
+ &IfxDsadc_CIN2B_P33_1_IN
+ },
+ {
+ &IfxDsadc_CIN3A_P00_3_IN,
+ &IfxDsadc_CIN3B_P02_7_IN
+ }
+ }
+};
+
+const IfxDsadc_Cout_Out *IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxDsadc_COUT0_P00_1_OUT,
+ &IfxDsadc_COUT0_P00_11_OUT,
+ &IfxDsadc_COUT0_P33_5_OUT
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxDsadc_COUT2_P00_5_OUT,
+ &IfxDsadc_COUT2_P33_1_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxDsadc_COUT3_P00_3_OUT,
+ &IfxDsadc_COUT3_P02_7_OUT,
+ NULL_PTR
+ }
+ }
+};
+
+const IfxDsadc_Din_In *IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxDsadc_DIN0A_P00_2_IN,
+ &IfxDsadc_DIN0B_P33_6_IN
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxDsadc_DIN2A_P00_6_IN,
+ &IfxDsadc_DIN2B_P33_2_IN
+ },
+ {
+ &IfxDsadc_DIN3A_P00_4_IN,
+ &IfxDsadc_DIN3B_P02_8_IN
+ }
+ }
+};
+
+const IfxDsadc_Dsn_In *IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxDsadc_DS0NA_AN3_IN,
+ &IfxDsadc_DS0NB_AN1_IN,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxDsadc_DS2NA_AN21_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxDsadc_DS3NA_P40_7_IN,
+ &IfxDsadc_DS3NB_P40_9_IN,
+ &IfxDsadc_DS3NC_AN45_IN,
+ &IfxDsadc_DS3ND_AN47_IN
+ }
+ }
+};
+
+const IfxDsadc_Dsp_In *IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxDsadc_DS0PA_AN2_IN,
+ &IfxDsadc_DS0PB_AN0_IN,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxDsadc_DS2PA_AN20_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxDsadc_DS3PA_P40_6_IN,
+ &IfxDsadc_DS3PB_P40_8_IN,
+ &IfxDsadc_DS3PC_AN44_IN,
+ &IfxDsadc_DS3PD_AN46_IN
+ }
+ }
+};
+
+const IfxDsadc_Itr_In *IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS] = {
+ {
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxDsadc_ITR0E_P33_0_IN,
+ &IfxDsadc_ITR0F_P33_4_IN
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxDsadc_ITR2E_P33_2_IN,
+ &IfxDsadc_ITR2F_P33_6_IN
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxDsadc_ITR3E_P02_8_IN,
+ &IfxDsadc_ITR3F_P00_9_IN
+ }
+ }
+};
+
+const IfxDsadc_Sg_In *IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS] = {
+ {
+ &IfxDsadc_SGNA_P00_4_IN,
+ &IfxDsadc_SGNB_P33_13_IN
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxDsadc_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxDsadc_PinMap.h
new file mode 100644
index 0000000..5d7ae40
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxDsadc_PinMap.h
@@ -0,0 +1,219 @@
+/**
+ * \file IfxDsadc_PinMap.h
+ * \brief DSADC I/O map
+ * \ingroup IfxLld_Dsadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Dsadc_pinmap DSADC Pin Mapping
+ * \ingroup IfxLld_Dsadc
+ */
+
+#ifndef IFXDSADC_PINMAP_H
+#define IFXDSADC_PINMAP_H
+
+#include
+#include <_Impl/IfxDsadc_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Dsadc_pinmap
+ * \{ */
+
+/** \brief DS negative pin mapping structure */
+typedef const struct
+{
+ Ifx_DSADC* module; /**< \brief Base address */
+ uint8 channel; /**< \brief Channel number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxDsadc_Dsn_In;
+
+/** \brief DS positive pin mapping structure */
+typedef const struct
+{
+ Ifx_DSADC* module; /**< \brief Base address */
+ uint8 channel; /**< \brief Channel number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxDsadc_Dsp_In;
+
+/** \brief CIN pin mapping structure */
+typedef const struct
+{
+ Ifx_DSADC* module; /**< \brief Base address */
+ uint8 channel; /**< \brief Channel number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxDsadc_Cin_In;
+
+/** \brief DIN pin mapping structure */
+typedef const struct
+{
+ Ifx_DSADC* module; /**< \brief Base address */
+ uint8 channel; /**< \brief Channel number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxDsadc_Din_In;
+
+/** \brief ITR pin mapping structure */
+typedef const struct
+{
+ Ifx_DSADC* module; /**< \brief Base address */
+ uint8 channel; /**< \brief Channel number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxDsadc_Itr_In;
+
+/** \brief CGPWM pin mapping structure */
+typedef const struct
+{
+ Ifx_DSADC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxDsadc_Cgpwm_Out;
+
+/** \brief SG pin mapping structure */
+typedef const struct
+{
+ Ifx_DSADC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxDsadc_Sg_In;
+
+/** \brief COUT pin mapping structure */
+typedef const struct
+{
+ Ifx_DSADC* module; /**< \brief Base address */
+ uint8 channel; /**< \brief Channel number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxDsadc_Cout_Out;
+
+IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P00_5_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
+IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P02_0_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
+IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMN_P33_11_OUT; /**< \brief DSADC_CGPWMN: DSADC output */
+IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P00_6_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
+IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P02_1_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
+IFX_EXTERN IfxDsadc_Cgpwm_Out IfxDsadc_CGPWMP_P33_12_OUT; /**< \brief DSADC_CGPWMP: DSADC output */
+IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0A_P00_1_IN; /**< \brief DSADC_CIN0A: DSADC input */
+IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN0B_P33_5_IN; /**< \brief DSADC_CIN0B: DSADC input */
+IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2A_P00_5_IN; /**< \brief DSADC_CIN2A: DSADC input */
+IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN2B_P33_1_IN; /**< \brief DSADC_CIN2B: DSADC input */
+IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3A_P00_3_IN; /**< \brief DSADC_CIN3A: DSADC input */
+IFX_EXTERN IfxDsadc_Cin_In IfxDsadc_CIN3B_P02_7_IN; /**< \brief DSADC_CIN3B: DSADC input */
+IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_11_OUT; /**< \brief DSADC_COUT0: DSADC output */
+IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P00_1_OUT; /**< \brief DSADC_COUT0: DSADC output */
+IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT0_P33_5_OUT; /**< \brief DSADC_COUT0: DSADC output */
+IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P00_5_OUT; /**< \brief DSADC_COUT2: DSADC output */
+IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT2_P33_1_OUT; /**< \brief DSADC_COUT2: DSADC output */
+IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P00_3_OUT; /**< \brief DSADC_COUT3: DSADC output */
+IFX_EXTERN IfxDsadc_Cout_Out IfxDsadc_COUT3_P02_7_OUT; /**< \brief DSADC_COUT3: DSADC output */
+IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0A_P00_2_IN; /**< \brief DSADC_DIN0A: DSADC input */
+IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN0B_P33_6_IN; /**< \brief DSADC_DIN0B: DSADC input */
+IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2A_P00_6_IN; /**< \brief DSADC_DIN2A: DSADC input */
+IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN2B_P33_2_IN; /**< \brief DSADC_DIN2B: DSADC input */
+IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3A_P00_4_IN; /**< \brief DSADC_DIN3A: DSADC input */
+IFX_EXTERN IfxDsadc_Din_In IfxDsadc_DIN3B_P02_8_IN; /**< \brief DSADC_DIN3B: DSADC input */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NA_AN3_IN; /**< \brief DSADC_DS0NA: DSADC: negative analog input channel of DSADC 0 pin A */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS0NB_AN1_IN; /**< \brief DSADC_DS0NB: DSADC: negative analog input channel of DSADC 0 pin B */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS2NA_AN21_IN; /**< \brief DSADC_DS2NA: DSADC: negative analog input channel of DSADC 2 pin A */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_AN37_IN; /**< \brief DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3 pin A */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NA_P40_7_IN; /**< \brief DSADC_DS3NA: DSADC: negative analog input channel of DSADC 3, pin A */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_AN39_IN; /**< \brief DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3 pin B */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NB_P40_9_IN; /**< \brief DSADC_DS3NB: DSADC: negative analog input channel of DSADC 3, pin B */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3NC_AN45_IN; /**< \brief DSADC_DS3NC: DSADC: negative analog input channel of DSADC 3 pin C */
+IFX_EXTERN IfxDsadc_Dsn_In IfxDsadc_DS3ND_AN47_IN; /**< \brief DSADC_DS3ND: DSADC: negative analog input channel of DSADC 3 pin D */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PA_AN2_IN; /**< \brief DSADC_DS0PA: DSADC: positive analog input channel of DSADC 0 pin A */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS0PB_AN0_IN; /**< \brief DSADC_DS0PB: DSADC: positive analog input channel of DSADC 0 pin B */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS2PA_AN20_IN; /**< \brief DSADC_DS2PA: DSADC: positive analog input channel of DSADC 2 pin A */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_AN36_IN; /**< \brief DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3 pin A */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PA_P40_6_IN; /**< \brief DSADC_DS3PA: DSADC: positive analog input channel of DSADC 3, pin A */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_AN38_IN; /**< \brief DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3 pin B */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PB_P40_8_IN; /**< \brief DSADC_DS3PB: DSADC: positive analog input channel of DSADC 3, pin B */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PC_AN44_IN; /**< \brief DSADC_DS3PC: DSADC: positive analog input channel of DSADC 3 pin C */
+IFX_EXTERN IfxDsadc_Dsp_In IfxDsadc_DS3PD_AN46_IN; /**< \brief DSADC_DS3PD: DSADC: positive analog input channel of DSADC 3 pin D */
+IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0E_P33_0_IN; /**< \brief DSADC_ITR0E: DSADC input */
+IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR0F_P33_4_IN; /**< \brief DSADC_ITR0F: DSADC input */
+IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2E_P33_2_IN; /**< \brief DSADC_ITR2E: DSADC input */
+IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR2F_P33_6_IN; /**< \brief DSADC_ITR2F: DSADC input */
+IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3E_P02_8_IN; /**< \brief DSADC_ITR3E: DSADC input */
+IFX_EXTERN IfxDsadc_Itr_In IfxDsadc_ITR3F_P00_9_IN; /**< \brief DSADC_ITR3F: DSADC input */
+IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNA_P00_4_IN; /**< \brief DSADC_SGNA: DSADC input */
+IFX_EXTERN IfxDsadc_Sg_In IfxDsadc_SGNB_P33_13_IN; /**< \brief DSADC_SGNB: DSADC input */
+
+/** \brief Table dimensions */
+#define IFXDSADC_PINMAP_NUM_MODULES 1
+#define IFXDSADC_PINMAP_NUM_CHANNELS 4
+#define IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS 6
+#define IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS 2
+#define IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS 3
+#define IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS 2
+#define IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS 4
+#define IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS 4
+#define IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS 6
+#define IFXDSADC_PINMAP_SG_IN_NUM_ITEMS 2
+
+
+/** \brief IfxDsadc_Cgpwm_Out table */
+IFX_EXTERN const IfxDsadc_Cgpwm_Out *IfxDsadc_Cgpwm_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_CGPWM_OUT_NUM_ITEMS];
+
+/** \brief IfxDsadc_Cin_In table */
+IFX_EXTERN const IfxDsadc_Cin_In *IfxDsadc_Cin_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_CIN_IN_NUM_ITEMS];
+
+/** \brief IfxDsadc_Cout_Out table */
+IFX_EXTERN const IfxDsadc_Cout_Out *IfxDsadc_Cout_Out_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_COUT_OUT_NUM_ITEMS];
+
+/** \brief IfxDsadc_Din_In table */
+IFX_EXTERN const IfxDsadc_Din_In *IfxDsadc_Din_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DIN_IN_NUM_ITEMS];
+
+/** \brief IfxDsadc_Dsn_In table */
+IFX_EXTERN const IfxDsadc_Dsn_In *IfxDsadc_Dsn_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSN_IN_NUM_ITEMS];
+
+/** \brief IfxDsadc_Dsp_In table */
+IFX_EXTERN const IfxDsadc_Dsp_In *IfxDsadc_Dsp_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_DSP_IN_NUM_ITEMS];
+
+/** \brief IfxDsadc_Itr_In table */
+IFX_EXTERN const IfxDsadc_Itr_In *IfxDsadc_Itr_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_NUM_CHANNELS][IFXDSADC_PINMAP_ITR_IN_NUM_ITEMS];
+
+/** \brief IfxDsadc_Sg_In table */
+IFX_EXTERN const IfxDsadc_Sg_In *IfxDsadc_Sg_In_pinTable[IFXDSADC_PINMAP_NUM_MODULES][IFXDSADC_PINMAP_SG_IN_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXDSADC_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEray_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEray_PinMap.c
new file mode 100644
index 0000000..5ec49a1
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEray_PinMap.c
@@ -0,0 +1,125 @@
+/**
+ * \file IfxEray_PinMap.c
+ * \brief ERAY I/O map
+ * \ingroup IfxLld_Eray
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxEray_PinMap.h"
+
+IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 8}, Ifx_RxSel_a};
+IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 9}, Ifx_RxSel_b};
+IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 1}, Ifx_RxSel_c};
+IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 1}, Ifx_RxSel_d};
+IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 7}, Ifx_RxSel_a};
+IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,10}, Ifx_RxSel_b};
+IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 3}, Ifx_RxSel_c};
+IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 1}, Ifx_RxSel_d};
+IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt6};
+IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt4};
+IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt3};
+IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14,10}, IfxPort_OutputIdx_alt6};
+IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt6};
+IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,12}, IfxPort_OutputIdx_alt4};
+IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt4};
+IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt6};
+IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt6};
+IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt4};
+IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_a, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt6};
+IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt6};
+IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11,11}, IfxPort_OutputIdx_alt6};
+IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt2};
+IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt6};
+IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT = {&MODULE_ERAY0, IfxEray_NodeId_b, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt5};
+
+
+const IfxEray_Rxd_In *IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxEray0_RXDA0_P14_8_IN,
+ &IfxEray0_RXDA1_P11_9_IN,
+ &IfxEray0_RXDA2_P02_1_IN,
+ &IfxEray0_RXDA3_P14_1_IN
+ },
+ {
+ &IfxEray0_RXDB0_P14_7_IN,
+ &IfxEray0_RXDB1_P11_10_IN,
+ &IfxEray0_RXDB2_P02_3_IN,
+ &IfxEray0_RXDB3_P14_1_IN
+ }
+ }
+};
+
+const IfxEray_Txd_Out *IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxEray0_TXDA_P02_0_OUT,
+ &IfxEray0_TXDA_P11_3_OUT,
+ &IfxEray0_TXDA_P14_0_OUT,
+ &IfxEray0_TXDA_P14_10_OUT
+ },
+ {
+ &IfxEray0_TXDB_P02_2_OUT,
+ &IfxEray0_TXDB_P11_12_OUT,
+ &IfxEray0_TXDB_P14_0_OUT,
+ &IfxEray0_TXDB_P14_5_OUT
+ }
+ }
+};
+
+const IfxEray_Txen_Out *IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxEray0_TXENA_P02_4_OUT,
+ &IfxEray0_TXENA_P11_6_OUT,
+ &IfxEray0_TXENA_P14_9_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxEray0_TXENB_P02_5_OUT,
+ &IfxEray0_TXENB_P11_6_OUT,
+ &IfxEray0_TXENB_P11_11_OUT,
+ &IfxEray0_TXENB_P14_6_OUT,
+ &IfxEray0_TXENB_P14_9_OUT
+ }
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEray_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEray_PinMap.h
new file mode 100644
index 0000000..944087b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEray_PinMap.h
@@ -0,0 +1,129 @@
+/**
+ * \file IfxEray_PinMap.h
+ * \brief ERAY I/O map
+ * \ingroup IfxLld_Eray
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Eray_pinmap ERAY Pin Mapping
+ * \ingroup IfxLld_Eray
+ */
+
+#ifndef IFXERAY_PINMAP_H
+#define IFXERAY_PINMAP_H
+
+#include
+#include <_Impl/IfxEray_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Eray_pinmap
+ * \{ */
+
+/** \brief RXD pin mapping structure */
+typedef const struct
+{
+ Ifx_ERAY* module; /**< \brief Base address */
+ IfxEray_NodeId nodeId; /**< \brief Node ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEray_Rxd_In;
+
+/** \brief TXD pin mapping structure */
+typedef const struct
+{
+ Ifx_ERAY* module; /**< \brief Base address */
+ IfxEray_NodeId nodeId; /**< \brief Node ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxEray_Txd_Out;
+
+/** \brief TXEN pin mapping structure */
+typedef const struct
+{
+ Ifx_ERAY* module; /**< \brief Base address */
+ IfxEray_NodeId nodeId; /**< \brief Node ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxEray_Txen_Out;
+
+IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA0_P14_8_IN; /**< \brief ERAY_RXDA0: ERAY input */
+IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA1_P11_9_IN; /**< \brief ERAY_RXDA1: ERAY input */
+IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA2_P02_1_IN; /**< \brief ERAY_RXDA2: ERAY input */
+IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDA3_P14_1_IN; /**< \brief ERAY_RXDA3: ERAY input */
+IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB0_P14_7_IN; /**< \brief ERAY_RXDB0: ERAY input */
+IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB1_P11_10_IN; /**< \brief ERAY_RXDB1: ERAY input */
+IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB2_P02_3_IN; /**< \brief ERAY_RXDB2: ERAY input */
+IFX_EXTERN IfxEray_Rxd_In IfxEray0_RXDB3_P14_1_IN; /**< \brief ERAY_RXDB3: ERAY input */
+IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P02_0_OUT; /**< \brief ERAY_TXDA: ERAY output */
+IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P11_3_OUT; /**< \brief ERAY_TXDA: ERAY output */
+IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_0_OUT; /**< \brief ERAY_TXDA: ERAY output */
+IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDA_P14_10_OUT; /**< \brief ERAY_TXDA: ERAY output */
+IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P02_2_OUT; /**< \brief ERAY_TXDB: ERAY output */
+IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P11_12_OUT; /**< \brief ERAY_TXDB: ERAY output */
+IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_0_OUT; /**< \brief ERAY_TXDB: ERAY output */
+IFX_EXTERN IfxEray_Txd_Out IfxEray0_TXDB_P14_5_OUT; /**< \brief ERAY_TXDB: ERAY output */
+IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P02_4_OUT; /**< \brief ERAY_TXENA: ERAY output */
+IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P11_6_OUT; /**< \brief ERAY_TXENA: ERAY output */
+IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENA_P14_9_OUT; /**< \brief ERAY_TXENA: ERAY output */
+IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P02_5_OUT; /**< \brief ERAY_TXENB: ERAY output */
+IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_11_OUT; /**< \brief ERAY_TXENB: ERAY output */
+IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P11_6_OUT; /**< \brief ERAY_TXENB: ERAY output */
+IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_6_OUT; /**< \brief ERAY_TXENB: ERAY output */
+IFX_EXTERN IfxEray_Txen_Out IfxEray0_TXENB_P14_9_OUT; /**< \brief ERAY_TXENB: ERAY output */
+
+/** \brief Table dimensions */
+#define IFXERAY_PINMAP_NUM_MODULES 1
+#define IFXERAY_PINMAP_NUM_NODES 2
+#define IFXERAY_PINMAP_RXD_IN_NUM_ITEMS 4
+#define IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS 4
+#define IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS 5
+
+
+/** \brief IfxEray_Rxd_In table */
+IFX_EXTERN const IfxEray_Rxd_In *IfxEray_Rxd_In_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_RXD_IN_NUM_ITEMS];
+
+/** \brief IfxEray_Txd_Out table */
+IFX_EXTERN const IfxEray_Txd_Out *IfxEray_Txd_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXD_OUT_NUM_ITEMS];
+
+/** \brief IfxEray_Txen_Out table */
+IFX_EXTERN const IfxEray_Txen_Out *IfxEray_Txen_Out_pinTable[IFXERAY_PINMAP_NUM_MODULES][IFXERAY_PINMAP_NUM_NODES][IFXERAY_PINMAP_TXEN_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXERAY_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEth_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEth_PinMap.c
new file mode 100644
index 0000000..19c4173
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEth_PinMap.c
@@ -0,0 +1,135 @@
+/**
+ * \file IfxEth_PinMap.c
+ * \brief ETH I/O map
+ * \ingroup IfxLld_Eth
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxEth_PinMap.h"
+
+IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN = {&MODULE_ETH, {&MODULE_P11,11}, Ifx_RxSel_a};
+IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT = {&MODULE_ETH, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt6};
+IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT = {&MODULE_ETH, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt6};
+IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT = {&MODULE_ETH, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt5};
+IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT = {&MODULE_ETH, {&MODULE_P00, 0}, Ifx_RxSel_a, IfxPort_OutputIdx_alt1};
+IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT = {&MODULE_ETH, {&MODULE_P21, 3}, Ifx_RxSel_d, IfxPort_OutputIdx_alt1};
+IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT = {&MODULE_ETH, {&MODULE_P21, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
+IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a};
+IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_a};
+IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN = {&MODULE_ETH, {&MODULE_P11,10}, Ifx_RxSel_a};
+IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN = {&MODULE_ETH, {&MODULE_P11, 9}, Ifx_RxSel_a};
+IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN = {&MODULE_ETH, {&MODULE_P21, 7}, Ifx_RxSel_b};
+IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN = {&MODULE_ETH, {&MODULE_P11,12}, Ifx_RxSel_b};
+IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT = {&MODULE_ETH, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt6};
+IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT = {&MODULE_ETH, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt6};
+IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT = {&MODULE_ETH, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt6};
+
+
+const IfxEth_Crsdv_In *IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS] = {
+ {
+ &IfxEth_CRSDVA_P11_11_IN
+ }
+};
+
+const IfxEth_Mdc_Out *IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS] = {
+ {
+ &IfxEth_MDC_P02_8_OUT,
+ &IfxEth_MDC_P21_0_OUT,
+ &IfxEth_MDC_P21_2_OUT
+ }
+};
+
+const IfxEth_Mdio_InOut *IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS] = {
+ {
+ NULL_PTR,
+ &IfxEth_MDIOA_P00_0_INOUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxEth_MDIO_P21_1_INOUT
+ }
+};
+
+const IfxEth_Refclk_In *IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS] = {
+ {
+ &IfxEth_REFCLK_P11_12_IN
+ }
+};
+
+const IfxEth_Rxclk_In *IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS] = {
+ {
+ &IfxEth_RXCLKA_P11_12_IN
+ }
+};
+
+const IfxEth_Rxd_In *IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS] = {
+ {
+ &IfxEth_RXD1_P11_9_IN
+ }
+};
+
+const IfxEth_Rxer_In *IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS] = {
+ {
+ NULL_PTR,
+ &IfxEth_RXERB_P21_7_IN
+ }
+};
+
+const IfxEth_Txclk_In *IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS] = {
+ {
+ NULL_PTR,
+ &IfxEth_TXCLKB_P11_12_IN
+ }
+};
+
+const IfxEth_Txd_Out *IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS] = {
+ {
+ &IfxEth_TXD1_P11_2_OUT,
+ &IfxEth_TXD0_P11_3_OUT
+ }
+};
+
+const IfxEth_Txen_Out *IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS] = {
+ {
+ &IfxEth_TXEN_P11_6_OUT
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEth_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEth_PinMap.h
new file mode 100644
index 0000000..e1250cd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxEth_PinMap.h
@@ -0,0 +1,234 @@
+/**
+ * \file IfxEth_PinMap.h
+ * \brief ETH I/O map
+ * \ingroup IfxLld_Eth
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Eth_pinmap ETH Pin Mapping
+ * \ingroup IfxLld_Eth
+ */
+
+#ifndef IFXETH_PINMAP_H
+#define IFXETH_PINMAP_H
+
+#include
+#include <_Impl/IfxEth_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Eth_pinmap
+ * \{ */
+
+/** \brief CRS pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Crs_In;
+
+/** \brief CRSDV pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Crsdv_In;
+
+/** \brief RXDV pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Rxdv_In;
+
+/** \brief REFCLK pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Refclk_In;
+
+/** \brief RXCLK pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Rxclk_In;
+
+/** \brief TXCLK pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Txclk_In;
+
+/** \brief RXD pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Rxd_In;
+
+/** \brief COL pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Col_In;
+
+/** \brief MDC pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxEth_Mdc_Out;
+
+/** \brief MDIO pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
+ IfxPort_OutputIdx outSelect;/**< \brief Port control code */
+} IfxEth_Mdio_InOut;
+
+/** \brief TXD pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxEth_Txd_Out;
+
+/** \brief TXEN pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxEth_Txen_Out;
+
+/** \brief TXER pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxEth_Txer_Out;
+
+/** \brief RXER pin mapping structure */
+typedef const struct
+{
+ Ifx_ETH* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxEth_Rxer_In;
+
+IFX_EXTERN IfxEth_Crsdv_In IfxEth_CRSDVA_P11_11_IN; /**< \brief ETH_CRSDVA: ETH input */
+IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P02_8_OUT; /**< \brief ETH_MDC: ETH output */
+IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_0_OUT; /**< \brief ETH_MDC: ETH output */
+IFX_EXTERN IfxEth_Mdc_Out IfxEth_MDC_P21_2_OUT; /**< \brief ETH_MDC: ETH output */
+IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOA_P00_0_INOUT; /**< \brief ETH_MDIOA: ETH input/output */
+IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIOD_P21_3_INOUT; /**< \brief ETH_MDIOD: ETH input/output */
+IFX_EXTERN IfxEth_Mdio_InOut IfxEth_MDIO_P21_1_INOUT; /**< \brief ETH_MDIO: ETH output (Not for production purposes) */
+IFX_EXTERN IfxEth_Refclk_In IfxEth_REFCLK_P11_12_IN; /**< \brief ETH_REFCLK: ETH input */
+IFX_EXTERN IfxEth_Rxclk_In IfxEth_RXCLKA_P11_12_IN; /**< \brief ETH_RXCLKA: ETH input (Not for productive purposes) */
+IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD0_P11_10_IN; /**< \brief ETH_RXD0: ETH input */
+IFX_EXTERN IfxEth_Rxd_In IfxEth_RXD1_P11_9_IN; /**< \brief ETH_RXD1: ETH input */
+IFX_EXTERN IfxEth_Rxer_In IfxEth_RXERB_P21_7_IN; /**< \brief ETH_RXERB: ETH input */
+IFX_EXTERN IfxEth_Txclk_In IfxEth_TXCLKB_P11_12_IN; /**< \brief ETH_TXCLKB: ETH input (Not for productive purposes) */
+IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD0_P11_3_OUT; /**< \brief ETH_TXD0: ETH output */
+IFX_EXTERN IfxEth_Txd_Out IfxEth_TXD1_P11_2_OUT; /**< \brief ETH_TXD1: ETH output */
+IFX_EXTERN IfxEth_Txen_Out IfxEth_TXEN_P11_6_OUT; /**< \brief ETH_TXEN: ETH output */
+
+/** \brief Table dimensions */
+#define IFXETH_PINMAP_NUM_MODULES 1
+#define IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS 1
+#define IFXETH_PINMAP_MDC_OUT_NUM_ITEMS 3
+#define IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS 7
+#define IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS 1
+#define IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS 1
+#define IFXETH_PINMAP_RXD_IN_NUM_ITEMS 1
+#define IFXETH_PINMAP_RXER_IN_NUM_ITEMS 2
+#define IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS 2
+#define IFXETH_PINMAP_TXD_OUT_NUM_ITEMS 2
+#define IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS 1
+
+
+/** \brief IfxEth_Crsdv_In table */
+IFX_EXTERN const IfxEth_Crsdv_In *IfxEth_Crsdv_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_CRSDV_IN_NUM_ITEMS];
+
+/** \brief IfxEth_Mdc_Out table */
+IFX_EXTERN const IfxEth_Mdc_Out *IfxEth_Mdc_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDC_OUT_NUM_ITEMS];
+
+/** \brief IfxEth_Mdio_InOut table */
+IFX_EXTERN const IfxEth_Mdio_InOut *IfxEth_Mdio_InOut_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_MDIO_INOUT_NUM_ITEMS];
+
+/** \brief IfxEth_Refclk_In table */
+IFX_EXTERN const IfxEth_Refclk_In *IfxEth_Refclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_REFCLK_IN_NUM_ITEMS];
+
+/** \brief IfxEth_Rxclk_In table */
+IFX_EXTERN const IfxEth_Rxclk_In *IfxEth_Rxclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXCLK_IN_NUM_ITEMS];
+
+/** \brief IfxEth_Rxd_In table */
+IFX_EXTERN const IfxEth_Rxd_In *IfxEth_Rxd_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXD_IN_NUM_ITEMS];
+
+/** \brief IfxEth_Rxer_In table */
+IFX_EXTERN const IfxEth_Rxer_In *IfxEth_Rxer_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_RXER_IN_NUM_ITEMS];
+
+/** \brief IfxEth_Txclk_In table */
+IFX_EXTERN const IfxEth_Txclk_In *IfxEth_Txclk_In_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXCLK_IN_NUM_ITEMS];
+
+/** \brief IfxEth_Txd_Out table */
+IFX_EXTERN const IfxEth_Txd_Out *IfxEth_Txd_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXD_OUT_NUM_ITEMS];
+
+/** \brief IfxEth_Txen_Out table */
+IFX_EXTERN const IfxEth_Txen_Out *IfxEth_Txen_Out_pinTable[IFXETH_PINMAP_NUM_MODULES][IFXETH_PINMAP_TXEN_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXETH_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGpt12_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGpt12_PinMap.c
new file mode 100644
index 0000000..ba9669a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGpt12_PinMap.c
@@ -0,0 +1,178 @@
+/**
+ * \file IfxGpt12_PinMap.c
+ * \brief GPT12 I/O map
+ * \ingroup IfxLld_Gpt12
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxGpt12_PinMap.h"
+
+IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN = {&MODULE_GPT120, {&MODULE_P13, 2}, Ifx_RxSel_a};
+IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 8}, Ifx_RxSel_a};
+IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 6}, Ifx_RxSel_b};
+IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 7}, Ifx_RxSel_a};
+IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 7}, Ifx_RxSel_b};
+IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN = {&MODULE_GPT120, 4, {&MODULE_P00, 9}, Ifx_RxSel_a};
+IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN = {&MODULE_GPT120, 4, {&MODULE_P33, 5}, Ifx_RxSel_b};
+IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 6}, Ifx_RxSel_a};
+IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 1}, Ifx_RxSel_b};
+IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 0}, Ifx_RxSel_a};
+IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 0}, Ifx_RxSel_b};
+IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN = {&MODULE_GPT120, 2, {&MODULE_P00, 7}, Ifx_RxSel_a};
+IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN = {&MODULE_GPT120, 2, {&MODULE_P33, 7}, Ifx_RxSel_b};
+IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN = {&MODULE_GPT120, 3, {&MODULE_P02, 6}, Ifx_RxSel_a};
+IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN = {&MODULE_GPT120, 3, {&MODULE_P10, 4}, Ifx_RxSel_b};
+IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN = {&MODULE_GPT120, 4, {&MODULE_P02, 8}, Ifx_RxSel_a};
+IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN = {&MODULE_GPT120, 4, {&MODULE_P10, 8}, Ifx_RxSel_b};
+IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN = {&MODULE_GPT120, 5, {&MODULE_P21, 7}, Ifx_RxSel_a};
+IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN = {&MODULE_GPT120, 5, {&MODULE_P10, 3}, Ifx_RxSel_b};
+IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN = {&MODULE_GPT120, 6, {&MODULE_P20, 3}, Ifx_RxSel_a};
+IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN = {&MODULE_GPT120, 6, {&MODULE_P10, 2}, Ifx_RxSel_b};
+IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt4};
+IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT = {&MODULE_GPT120, 3, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt7};
+IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT = {&MODULE_GPT120, 6, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt5};
+IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT = {&MODULE_GPT120, 6, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt7};
+
+
+const IfxGpt12_Capin_In *IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS] = {
+ {
+ &IfxGpt120_CAPINA_P13_2_IN
+ }
+};
+
+const IfxGpt12_TxEud_In *IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS] = {
+ {
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxGpt120_T2EUDA_P00_8_IN,
+ &IfxGpt120_T2EUDB_P33_6_IN
+ },
+ {
+ &IfxGpt120_T3EUDA_P02_7_IN,
+ &IfxGpt120_T3EUDB_P10_7_IN
+ },
+ {
+ &IfxGpt120_T4EUDA_P00_9_IN,
+ &IfxGpt120_T4EUDB_P33_5_IN
+ },
+ {
+ &IfxGpt120_T5EUDA_P21_6_IN,
+ &IfxGpt120_T5EUDB_P10_1_IN
+ },
+ {
+ &IfxGpt120_T6EUDA_P20_0_IN,
+ &IfxGpt120_T6EUDB_P10_0_IN
+ }
+ }
+};
+
+const IfxGpt12_TxIn_In *IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS] = {
+ {
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxGpt120_T2INA_P00_7_IN,
+ &IfxGpt120_T2INB_P33_7_IN
+ },
+ {
+ &IfxGpt120_T3INA_P02_6_IN,
+ &IfxGpt120_T3INB_P10_4_IN
+ },
+ {
+ &IfxGpt120_T4INA_P02_8_IN,
+ &IfxGpt120_T4INB_P10_8_IN
+ },
+ {
+ &IfxGpt120_T5INA_P21_7_IN,
+ &IfxGpt120_T5INB_P10_3_IN
+ },
+ {
+ &IfxGpt120_T6INA_P20_3_IN,
+ &IfxGpt120_T6INB_P10_2_IN
+ }
+ }
+};
+
+const IfxGpt12_TxOut_Out *IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS] = {
+ {
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxGpt120_T3OUT_P10_6_OUT,
+ &IfxGpt120_T3OUT_P21_6_OUT
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxGpt120_T6OUT_P10_5_OUT,
+ &IfxGpt120_T6OUT_P21_7_OUT
+ }
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGpt12_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGpt12_PinMap.h
new file mode 100644
index 0000000..26f5ed3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGpt12_PinMap.h
@@ -0,0 +1,142 @@
+/**
+ * \file IfxGpt12_PinMap.h
+ * \brief GPT12 I/O map
+ * \ingroup IfxLld_Gpt12
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gpt12_pinmap GPT12 Pin Mapping
+ * \ingroup IfxLld_Gpt12
+ */
+
+#ifndef IFXGPT12_PINMAP_H
+#define IFXGPT12_PINMAP_H
+
+#include
+#include <_Impl/IfxGpt12_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Gpt12_pinmap
+ * \{ */
+
+/** \brief CAPIN pin mapping structure */
+typedef const struct
+{
+ Ifx_GPT12* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxGpt12_Capin_In;
+
+/** \brief TxEUD pin mapping structure */
+typedef const struct
+{
+ Ifx_GPT12* module; /**< \brief Base address */
+ uint8 timer; /**< \brief Timer number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxGpt12_TxEud_In;
+
+/** \brief TxIN pin mapping structure */
+typedef const struct
+{
+ Ifx_GPT12* module; /**< \brief Base address */
+ uint8 timer; /**< \brief Timer number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxGpt12_TxIn_In;
+
+/** \brief TxOUT pin mapping structure */
+typedef const struct
+{
+ Ifx_GPT12* module; /**< \brief Base address */
+ uint8 timer; /**< \brief Timer number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxGpt12_TxOut_Out;
+
+IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN; /**< \brief GPT120_CAPINA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN; /**< \brief GPT120_T2EUDA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN; /**< \brief GPT120_T2EUDB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN; /**< \brief GPT120_T3EUDA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN; /**< \brief GPT120_T3EUDB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN; /**< \brief GPT120_T4EUDA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN; /**< \brief GPT120_T4EUDB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN; /**< \brief GPT120_T5EUDA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN; /**< \brief GPT120_T5EUDB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN; /**< \brief GPT120_T6EUDA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN; /**< \brief GPT120_T6EUDB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN; /**< \brief GPT120_T2INA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN; /**< \brief GPT120_T2INB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN; /**< \brief GPT120_T3INA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN; /**< \brief GPT120_T3INB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN; /**< \brief GPT120_T4INA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN; /**< \brief GPT120_T4INB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN; /**< \brief GPT120_T5INA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN; /**< \brief GPT120_T5INB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN; /**< \brief GPT120_T6INA: GPT120 input */
+IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN; /**< \brief GPT120_T6INB: GPT120 input */
+IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT; /**< \brief GPT120_T3OUT: GPT120 output */
+IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT; /**< \brief GPT120_T3OUT: GPT120 output */
+IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT; /**< \brief GPT120_T6OUT: GPT120 output */
+IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT; /**< \brief GPT120_T6OUT: GPT120 output */
+
+/** \brief Table dimensions */
+#define IFXGPT12_PINMAP_NUM_MODULES 1
+#define IFXGPT12_PINMAP_NUM_TIMERS 7
+#define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
+#define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
+#define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
+#define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2
+
+
+/** \brief IfxGpt12_Capin_In table */
+IFX_EXTERN const IfxGpt12_Capin_In *IfxGpt12_Capin_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS];
+
+/** \brief IfxGpt12_TxEud_In table */
+IFX_EXTERN const IfxGpt12_TxEud_In *IfxGpt12_TxEud_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS];
+
+/** \brief IfxGpt12_TxIn_In table */
+IFX_EXTERN const IfxGpt12_TxIn_In *IfxGpt12_TxIn_In_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS];
+
+/** \brief IfxGpt12_TxOut_Out table */
+IFX_EXTERN const IfxGpt12_TxOut_Out *IfxGpt12_TxOut_Out_pinTable[IFXGPT12_PINMAP_NUM_MODULES][IFXGPT12_PINMAP_NUM_TIMERS][IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXGPT12_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGtm_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGtm_PinMap.c
new file mode 100644
index 0000000..16c5865
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGtm_PinMap.c
@@ -0,0 +1,743 @@
+/**
+ * \file IfxGtm_PinMap.c
+ * \brief GTM I/O map
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxGtm_PinMap.h"
+
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_0, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT = {IfxGtm_Atom_1, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_c, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_c, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_c, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_c, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_c, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_c, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_c, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_2, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_c, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_0, IfxGtm_ToutSel_d, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_1, IfxGtm_ToutSel_d, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_2, IfxGtm_ToutSel_d, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_3, IfxGtm_ToutSel_d, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_4, IfxGtm_ToutSel_d, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_5, IfxGtm_ToutSel_d, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_6, IfxGtm_ToutSel_d, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT = {IfxGtm_Atom_3, IfxGtm_Atom_Ch_7, IfxGtm_ToutSel_d, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT = {&MODULE_GTM, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt4};
+IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT = {&MODULE_GTM, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt4};
+IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT = {&MODULE_GTM, {&MODULE_P11,12}, IfxPort_OutputIdx_alt3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)12};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)13};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)10};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)12};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 0}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)10};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 1}, (IfxGtm_ChXSel)10};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P33, 1}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN = {IfxGtm_Tim_0, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P02, 0}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P10, 7}, (IfxGtm_ChXSel)14};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P00, 9}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33, 4}, (IfxGtm_ChXSel)10};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P33,10}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P22, 1}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P21, 2}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)15};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P15, 6}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 5}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P14, 7}, (IfxGtm_ChXSel)13};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P10, 1}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P00,10}, (IfxGtm_ChXSel)14};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P02, 1}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 5}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P33, 9}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P22, 0}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P21, 3}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)10};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P15, 7}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P14, 6}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 2}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P10, 5}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P00,11}, (IfxGtm_ChXSel)14};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33, 6}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P02, 2}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P33,11}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P23, 5}, (IfxGtm_ChXSel)15};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P21, 4}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)10};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P15, 8}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 3}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P10, 6}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P00,12}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P33, 7}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P32, 2}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P02, 3}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P22, 2}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P21, 5}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)10};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P14, 0}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)12};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P10, 0}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 0}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P33, 8}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P32, 3}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P02, 4}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P22, 3}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P21, 6}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)12};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P14, 1}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P10, 8}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P32, 4}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P23, 0}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P21, 7}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P02, 5}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P14, 2}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)12};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)12};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P10, 4}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P33, 2}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 1}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P23, 2}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20, 0}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P02, 6}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P14, 3}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)13};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)12};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)11};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P33, 3}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 3}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P23, 4}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20, 8}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)8};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)7};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P02, 7}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P14, 4}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN = {IfxGtm_Tim_1, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)9};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P33,12}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P20,12}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P15, 5}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P02, 8}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P13, 3}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_0, {&MODULE_P00, 0}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 1}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P00, 2}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P33,13}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P20,13}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_1, {&MODULE_P11, 2}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P00, 3}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P32, 0}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P20,14}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P14, 8}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_2, {&MODULE_P11, 3}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P00, 4}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P20, 1}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P15, 0}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P14, 9}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_3, {&MODULE_P11, 6}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P00, 5}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P21, 0}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P20, 3}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P15, 1}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P14,10}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_4, {&MODULE_P11, 9}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P00, 6}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P21, 1}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P20, 9}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P15, 2}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P13, 0}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_5, {&MODULE_P11,10}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P11,11}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P00, 7}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20, 6}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P20,10}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P15, 3}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_6, {&MODULE_P13, 1}, (IfxGtm_ChXSel)3};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P11,12}, (IfxGtm_ChXSel)2};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P00, 8}, (IfxGtm_ChXSel)1};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20, 7}, (IfxGtm_ChXSel)5};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P20,11}, (IfxGtm_ChXSel)6};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P15, 4}, (IfxGtm_ChXSel)4};
+IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN = {IfxGtm_Tim_2, IfxGtm_Tim_Ch_7, {&MODULE_P13, 2}, (IfxGtm_ChXSel)3};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 42, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_a, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_a, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT = {IfxGtm_Tom_0, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 18, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 26, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 32, {&MODULE_P33,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 48, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 53, {&MODULE_P21, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_a, 68, {&MODULE_P20,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 76, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 77, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 85, {&MODULE_P14, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 87, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 8, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 94, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_0, IfxGtm_ToutSel_b, 9, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 104, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 107, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_b, 2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_10, IfxGtm_ToutSel_a, 62, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 105, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 108, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_b, 3, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 60, {&MODULE_P20, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_11, IfxGtm_ToutSel_a, 63, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 102, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 34, {&MODULE_P33,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_b, 4, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_12, IfxGtm_ToutSel_a, 61, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 110, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 35, {&MODULE_P33,13}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_b, 5, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_13, IfxGtm_ToutSel_a, 65, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 36, {&MODULE_P32, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_a, 66, {&MODULE_P20,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_14, IfxGtm_ToutSel_b, 6, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_a, 67, {&MODULE_P20,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_15, IfxGtm_ToutSel_b, 7, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 10, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 11, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 19, {&MODULE_P00,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 27, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 31, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 47, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 54, {&MODULE_P21, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_a, 69, {&MODULE_P20,13}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 78, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 86, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_1, IfxGtm_ToutSel_b, 95, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 12, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 20, {&MODULE_P00,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 28, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 33, {&MODULE_P33,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 46, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 55, {&MODULE_P21, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_a, 70, {&MODULE_P20,14}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 79, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 88, {&MODULE_P14, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_2, IfxGtm_ToutSel_b, 96, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 13, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 21, {&MODULE_P00,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 29, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 38, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 49, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 56, {&MODULE_P21, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_a, 71, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 80, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 89, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_3, IfxGtm_ToutSel_b, 97, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 14, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 22, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 30, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 39, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 50, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 57, {&MODULE_P21, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_a, 72, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 81, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 90, {&MODULE_P14,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_4, IfxGtm_ToutSel_b, 98, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 15, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 23, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 40, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 41, {&MODULE_P23, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 58, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_a, 73, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 82, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 91, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_5, IfxGtm_ToutSel_b, 99, {&MODULE_P11,10}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 100, {&MODULE_P11,11}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 106, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 16, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 24, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 43, {&MODULE_P23, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 59, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_a, 74, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 83, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_6, IfxGtm_ToutSel_b, 92, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 101, {&MODULE_P11,12}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 17, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 25, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 44, {&MODULE_P23, 3}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 45, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 64, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_a, 75, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 84, {&MODULE_P14, 4}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_7, IfxGtm_ToutSel_b, 93, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 109, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_8, IfxGtm_ToutSel_b, 51, {&MODULE_P21, 0}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 103, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 1, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt1};
+IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT = {IfxGtm_Tom_1, IfxGtm_Tom_Ch_9, IfxGtm_ToutSel_b, 52, {&MODULE_P21, 1}, IfxPort_OutputIdx_alt1};
+
+#include "IfxGtm_bf.h"
+
+void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode)
+{
+ uint32 shift = config->channel * 4;
+
+ __ldmst_c(&(MODULE_GTM.INOUTSEL.TIM[config->tim].INSEL.U), (0xFU << shift), ((uint32)config->select) << shift);
+
+ if (inputMode != IfxPort_InputMode_undefined)
+ {
+ IfxPort_setPinModeInput(config->pin.port, config->pin.pinIndex, inputMode);
+ }
+}
+
+void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
+{
+ uint32 outselReg = (config->toutn >> 4);
+ uint32 shift = (config->toutn & 0xFU) * 2;
+ uint32 outsel = (uint32)config->toutSel << shift;
+ uint32 mask = 0x3U << shift;
+
+ __ldmst_c(&(MODULE_GTM.INOUTSEL.T.OUTSEL[outselReg].U), mask, outsel);
+ IfxPort_setPinModeOutput(config->pin.port, config->pin.pinIndex, outputMode, config->select);
+ IfxPort_setPinPadDriver(config->pin.port, config->pin.pinIndex, padDriver);
+}
+
+void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver)
+{
+ uint32 outselReg = (config->toutn >> 4);
+ uint32 shift = (config->toutn & 0xFU) * 2;
+ uint32 outsel = (uint32)config->toutSel << shift;
+ uint32 mask = 0x3U << shift;
+
+ __ldmst_c(&(MODULE_GTM.INOUTSEL.T.OUTSEL[outselReg].U), mask, outsel);
+ IfxPort_setPinModeOutput(config->pin.port, config->pin.pinIndex, outputMode, config->select);
+ IfxPort_setPinPadDriver(config->pin.port, config->pin.pinIndex, padDriver);
+}
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGtm_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGtm_PinMap.h
new file mode 100644
index 0000000..284cd07
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxGtm_PinMap.h
@@ -0,0 +1,805 @@
+/**
+ * \file IfxGtm_PinMap.h
+ * \brief GTM I/O map
+ * \ingroup IfxLld_Gtm
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Gtm_pinmap GTM Pin Mapping
+ * \ingroup IfxLld_Gtm
+ */
+
+#ifndef IFXGTM_PINMAP_H
+#define IFXGTM_PINMAP_H
+
+#include
+#include <_Impl/IfxGtm_cfg.h>
+#include
+#include
+#include
+#include
+
+/** \addtogroup IfxLld_Gtm_pinmap
+ * \{ */
+
+/** \brief CHxSEL register control code */
+typedef enum
+{
+ IfxGtm_ChXSel_a,
+ IfxGtm_ChXSel_b,
+ IfxGtm_ChXSel_c,
+ IfxGtm_ChXSel_d,
+
+ IfxGtm_ChXSel_e,
+ IfxGtm_ChXSel_f,
+ IfxGtm_ChXSel_g,
+ IfxGtm_ChXSel_h,
+
+ IfxGtm_ChXSel_i,
+ IfxGtm_ChXSel_j,
+ IfxGtm_ChXSel_k,
+ IfxGtm_ChXSel_l,
+
+ IfxGtm_ChXSel_m,
+ IfxGtm_ChXSel_n,
+ IfxGtm_ChXSel_o,
+ IfxGtm_ChXSel_p
+} IfxGtm_ChXSel;
+
+/** \brief TOUTSEL register control code */
+typedef enum
+{
+ IfxGtm_ToutSel_a,
+ IfxGtm_ToutSel_b,
+ IfxGtm_ToutSel_c,
+ IfxGtm_ToutSel_d,
+ IfxGtm_ToutSel_e
+} IfxGtm_ToutSel;
+
+/** \brief TIN pin mapping structure */
+typedef const struct
+{
+ IfxGtm_Tim tim; /**< \brief TIM unit index */
+ IfxGtm_Tim_Ch channel; /**< \brief TIM channel index */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxGtm_ChXSel select; /**< \brief Input multiplexer value */
+} IfxGtm_Tim_TinMap;
+
+/** \brief ATOM TOUT pin mapping structure */
+typedef const struct
+{
+ IfxGtm_Atom atom; /**< \brief ATOM unit index */
+ IfxGtm_Atom_Ch channel; /**< \brief ATOM channel index */
+ IfxGtm_ToutSel toutSel; /**< \brief TOUTSEL register control code */
+ uint32 toutn; /**< \brief TOUT number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxGtm_Atom_ToutMap;
+
+/** \brief Pointer to \ref IfxGtm_Atom_ToutMap */
+typedef IfxGtm_Atom_ToutMap *IfxGtm_Atom_ToutMapP;
+
+/** \brief TOM TOUT pin mapping structure */
+typedef const struct
+{
+ IfxGtm_Tom tom; /**< \brief TOM unit index */
+ IfxGtm_Tom_Ch channel; /**< \brief TOM channel index */
+ IfxGtm_ToutSel toutSel; /**< \brief TOUTSEL register control code */
+ uint32 toutn; /**< \brief TOUT number */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxGtm_Tom_ToutMap;
+
+/** \brief GTM Clock Output */
+typedef const struct
+{
+ Ifx_GTM* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxGtm_Clk_Out;
+
+/** \brief Pointer to \ref IfxGtm_Tom_ToutMap */
+typedef IfxGtm_Tom_ToutMap *IfxGtm_Tom_ToutMapP;
+
+IFX_EXTERN void IfxGtm_PinMap_setTimTin(IfxGtm_Tim_TinMap *config, IfxPort_InputMode inputMode);
+IFX_EXTERN void IfxGtm_PinMap_setAtomTout(IfxGtm_Atom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
+IFX_EXTERN void IfxGtm_PinMap_setTomTout(IfxGtm_Tom_ToutMap *config, IfxPort_OutputMode outputMode, IfxPort_PadDriver padDriver);
+
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT0_P02_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT109_P10_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT48_P22_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT53_P21_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT85_P14_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT8_P02_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM0_0_TOUT9_P00_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT103_P10_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT10_P00_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT11_P00_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT1_P02_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT31_P33_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT47_P22_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT54_P21_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_1_TOUT84_P14_4_OUT; /**< \brief IfxGtm_ATOM0_1_TOUT84_P14_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT104_P10_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT107_P10_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT12_P00_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT2_P02_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT33_P33_11_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT46_P23_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT55_P21_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_2_TOUT83_P14_3_OUT; /**< \brief IfxGtm_ATOM0_2_TOUT83_P14_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT105_P10_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT108_P10_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT13_P00_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT38_P32_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT3_P02_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT49_P22_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT56_P21_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT60_P20_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_3_TOUT82_P14_2_OUT; /**< \brief IfxGtm_ATOM0_3_TOUT82_P14_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT102_P10_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT14_P00_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT39_P32_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT4_P02_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT50_P22_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT57_P21_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT61_P20_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM0_4_TOUT81_P14_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT110_P10_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT15_P00_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT23_P33_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT40_P32_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT41_P23_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT58_P21_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_5_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM0_5_TOUT5_P02_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT106_P10_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT16_P00_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT24_P33_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT42_P23_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT59_P20_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_6_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM0_6_TOUT6_P02_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT17_P00_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT25_P33_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT45_P23_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT64_P20_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM0_7_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM0_7_TOUT7_P02_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT0_P02_0_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT0_P02_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT109_P10_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT48_P22_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT53_P21_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT68_P20_12_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT76_P15_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT77_P15_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT87_P14_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT8_P02_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_ATOM1_0_TOUT9_P00_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT103_P10_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT10_P00_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT11_P00_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT1_P02_1_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT1_P02_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT31_P33_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT47_P22_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT54_P21_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT69_P20_13_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT78_P15_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT79_P15_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM1_1_TOUT86_P14_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT104_P10_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT107_P10_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT12_P00_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT2_P02_2_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT2_P02_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT33_P33_11_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT46_P23_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT55_P21_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT70_P20_14_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_2_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM1_2_TOUT80_P14_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT105_P10_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT108_P10_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT13_P00_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT38_P32_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT3_P02_3_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT3_P02_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT49_P22_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT56_P21_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT60_P20_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM1_3_TOUT71_P15_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT102_P10_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT14_P00_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT39_P32_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT4_P02_4_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT4_P02_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT50_P22_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT57_P21_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT61_P20_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM1_4_TOUT72_P15_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT110_P10_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT15_P00_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT23_P33_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT40_P32_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT41_P23_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT58_P21_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT5_P02_5_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT5_P02_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT65_P20_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM1_5_TOUT73_P15_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT106_P10_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT16_P00_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT24_P33_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT42_P23_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT59_P20_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT66_P20_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT6_P02_6_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT6_P02_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM1_6_TOUT74_P15_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT17_P00_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT25_P33_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT45_P23_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT67_P20_11_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT67_P20_11_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT75_P15_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM1_7_TOUT7_P02_7_OUT; /**< \brief IfxGtm_ATOM1_7_TOUT7_P02_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT18_P00_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT26_P33_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT32_P33_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT68_P20_12_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM2_0_TOUT94_P13_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT19_P00_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT27_P33_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT43_P23_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT69_P20_13_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM2_1_TOUT95_P11_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT20_P00_11_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT28_P33_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT44_P23_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT70_P20_14_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT88_P14_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM2_2_TOUT96_P11_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT21_P00_12_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT29_P33_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT71_P15_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT89_P14_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM2_3_TOUT97_P11_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT22_P33_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT30_P33_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT34_P33_12_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT51_P21_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT72_P15_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT90_P14_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM2_4_TOUT98_P11_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT35_P33_13_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT52_P21_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT65_P20_9_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT65_P20_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT73_P15_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT91_P13_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM2_5_TOUT99_P11_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT100_P11_11_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT36_P32_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT62_P20_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT66_P20_10_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT66_P20_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT74_P15_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM2_6_TOUT92_P13_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT101_P11_12_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT63_P20_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT64_P20_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT67_P20_11_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT67_P20_11_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT75_P15_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM2_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM2_7_TOUT93_P13_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT18_P00_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT26_P33_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT32_P33_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT76_P15_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT77_P15_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT85_P14_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT87_P14_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_ATOM3_0_TOUT94_P13_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT19_P00_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT27_P33_5_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT43_P23_2_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT43_P23_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT78_P15_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT79_P15_8_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT79_P15_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT84_P14_4_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT84_P14_4_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT86_P14_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_ATOM3_1_TOUT95_P11_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT20_P00_11_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT28_P33_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT44_P23_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT44_P23_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT80_P14_0_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT80_P14_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT83_P14_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT83_P14_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT88_P14_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_ATOM3_2_TOUT96_P11_3_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT21_P00_12_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT29_P33_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT82_P14_2_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT82_P14_2_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT89_P14_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_ATOM3_3_TOUT97_P11_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT22_P33_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT30_P33_8_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT34_P33_12_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT34_P33_12_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT51_P21_0_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT51_P21_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT81_P14_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT90_P14_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_ATOM3_4_TOUT98_P11_9_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT35_P33_13_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT35_P33_13_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT52_P21_1_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT52_P21_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT91_P13_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_ATOM3_5_TOUT99_P11_10_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT100_P11_11_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT36_P32_0_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT36_P32_0_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT62_P20_6_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT62_P20_6_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_ATOM3_6_TOUT92_P13_1_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT101_P11_12_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT63_P20_7_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT63_P20_7_OUT */
+IFX_EXTERN IfxGtm_Atom_ToutMap IfxGtm_ATOM3_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_ATOM3_7_TOUT93_P13_2_OUT */
+IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK0_P23_1_OUT; /**< \brief GTM_CLK0: GTM output */
+IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK1_P32_4_OUT; /**< \brief GTM_CLK1: GTM output */
+IFX_EXTERN IfxGtm_Clk_Out IfxGtm_CLK2_P11_12_OUT; /**< \brief GTM_CLK2: GTM output */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN0_P02_0_IN; /**< \brief IfxGtm_TIM0_0_TIN0_P02_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN109_P10_7_IN; /**< \brief IfxGtm_TIM0_0_TIN109_P10_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN18_P00_9_IN; /**< \brief IfxGtm_TIM0_0_TIN18_P00_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN26_P33_4_IN; /**< \brief IfxGtm_TIM0_0_TIN26_P33_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN32_P33_10_IN; /**< \brief IfxGtm_TIM0_0_TIN32_P33_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN34_P33_12_IN; /**< \brief IfxGtm_TIM0_0_TIN34_P33_12_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN48_P22_1_IN; /**< \brief IfxGtm_TIM0_0_TIN48_P22_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN53_P21_2_IN; /**< \brief IfxGtm_TIM0_0_TIN53_P21_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN77_P15_6_IN; /**< \brief IfxGtm_TIM0_0_TIN77_P15_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN85_P14_5_IN; /**< \brief IfxGtm_TIM0_0_TIN85_P14_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN87_P14_7_IN; /**< \brief IfxGtm_TIM0_0_TIN87_P14_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN8_P02_8_IN; /**< \brief IfxGtm_TIM0_0_TIN8_P02_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_0_TIN9_P00_0_IN; /**< \brief IfxGtm_TIM0_0_TIN9_P00_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN103_P10_1_IN; /**< \brief IfxGtm_TIM0_1_TIN103_P10_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN10_P00_1_IN; /**< \brief IfxGtm_TIM0_1_TIN10_P00_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN11_P00_2_IN; /**< \brief IfxGtm_TIM0_1_TIN11_P00_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN19_P00_10_IN; /**< \brief IfxGtm_TIM0_1_TIN19_P00_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN1_P02_1_IN; /**< \brief IfxGtm_TIM0_1_TIN1_P02_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN27_P33_5_IN; /**< \brief IfxGtm_TIM0_1_TIN27_P33_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN31_P33_9_IN; /**< \brief IfxGtm_TIM0_1_TIN31_P33_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN35_P33_13_IN; /**< \brief IfxGtm_TIM0_1_TIN35_P33_13_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN47_P22_0_IN; /**< \brief IfxGtm_TIM0_1_TIN47_P22_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN54_P21_3_IN; /**< \brief IfxGtm_TIM0_1_TIN54_P21_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN78_P15_7_IN; /**< \brief IfxGtm_TIM0_1_TIN78_P15_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_1_TIN86_P14_6_IN; /**< \brief IfxGtm_TIM0_1_TIN86_P14_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN104_P10_2_IN; /**< \brief IfxGtm_TIM0_2_TIN104_P10_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN107_P10_5_IN; /**< \brief IfxGtm_TIM0_2_TIN107_P10_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN20_P00_11_IN; /**< \brief IfxGtm_TIM0_2_TIN20_P00_11_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN28_P33_6_IN; /**< \brief IfxGtm_TIM0_2_TIN28_P33_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN2_P02_2_IN; /**< \brief IfxGtm_TIM0_2_TIN2_P02_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN33_P33_11_IN; /**< \brief IfxGtm_TIM0_2_TIN33_P33_11_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN36_P32_0_IN; /**< \brief IfxGtm_TIM0_2_TIN36_P32_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN46_P23_5_IN; /**< \brief IfxGtm_TIM0_2_TIN46_P23_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN55_P21_4_IN; /**< \brief IfxGtm_TIM0_2_TIN55_P21_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_2_TIN79_P15_8_IN; /**< \brief IfxGtm_TIM0_2_TIN79_P15_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN105_P10_3_IN; /**< \brief IfxGtm_TIM0_3_TIN105_P10_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN108_P10_6_IN; /**< \brief IfxGtm_TIM0_3_TIN108_P10_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN21_P00_12_IN; /**< \brief IfxGtm_TIM0_3_TIN21_P00_12_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN29_P33_7_IN; /**< \brief IfxGtm_TIM0_3_TIN29_P33_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN38_P32_2_IN; /**< \brief IfxGtm_TIM0_3_TIN38_P32_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN3_P02_3_IN; /**< \brief IfxGtm_TIM0_3_TIN3_P02_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN49_P22_2_IN; /**< \brief IfxGtm_TIM0_3_TIN49_P22_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN51_P21_0_IN; /**< \brief IfxGtm_TIM0_3_TIN51_P21_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN56_P21_5_IN; /**< \brief IfxGtm_TIM0_3_TIN56_P21_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN60_P20_1_IN; /**< \brief IfxGtm_TIM0_3_TIN60_P20_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_3_TIN80_P14_0_IN; /**< \brief IfxGtm_TIM0_3_TIN80_P14_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN102_P10_0_IN; /**< \brief IfxGtm_TIM0_4_TIN102_P10_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN22_P33_0_IN; /**< \brief IfxGtm_TIM0_4_TIN22_P33_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN30_P33_8_IN; /**< \brief IfxGtm_TIM0_4_TIN30_P33_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN39_P32_3_IN; /**< \brief IfxGtm_TIM0_4_TIN39_P32_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN4_P02_4_IN; /**< \brief IfxGtm_TIM0_4_TIN4_P02_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN50_P22_3_IN; /**< \brief IfxGtm_TIM0_4_TIN50_P22_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN52_P21_1_IN; /**< \brief IfxGtm_TIM0_4_TIN52_P21_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN57_P21_6_IN; /**< \brief IfxGtm_TIM0_4_TIN57_P21_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN61_P20_3_IN; /**< \brief IfxGtm_TIM0_4_TIN61_P20_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_4_TIN81_P14_1_IN; /**< \brief IfxGtm_TIM0_4_TIN81_P14_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN110_P10_8_IN; /**< \brief IfxGtm_TIM0_5_TIN110_P10_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN23_P33_1_IN; /**< \brief IfxGtm_TIM0_5_TIN23_P33_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN40_P32_4_IN; /**< \brief IfxGtm_TIM0_5_TIN40_P32_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN41_P23_0_IN; /**< \brief IfxGtm_TIM0_5_TIN41_P23_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN58_P21_7_IN; /**< \brief IfxGtm_TIM0_5_TIN58_P21_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN5_P02_5_IN; /**< \brief IfxGtm_TIM0_5_TIN5_P02_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_5_TIN82_P14_2_IN; /**< \brief IfxGtm_TIM0_5_TIN82_P14_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN106_P10_4_IN; /**< \brief IfxGtm_TIM0_6_TIN106_P10_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN24_P33_2_IN; /**< \brief IfxGtm_TIM0_6_TIN24_P33_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN42_P23_1_IN; /**< \brief IfxGtm_TIM0_6_TIN42_P23_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN43_P23_2_IN; /**< \brief IfxGtm_TIM0_6_TIN43_P23_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN59_P20_0_IN; /**< \brief IfxGtm_TIM0_6_TIN59_P20_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN62_P20_6_IN; /**< \brief IfxGtm_TIM0_6_TIN62_P20_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_6_TIN83_P14_3_IN; /**< \brief IfxGtm_TIM0_6_TIN83_P14_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN25_P33_3_IN; /**< \brief IfxGtm_TIM0_7_TIN25_P33_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN44_P23_3_IN; /**< \brief IfxGtm_TIM0_7_TIN44_P23_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN45_P23_4_IN; /**< \brief IfxGtm_TIM0_7_TIN45_P23_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN63_P20_7_IN; /**< \brief IfxGtm_TIM0_7_TIN63_P20_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN64_P20_8_IN; /**< \brief IfxGtm_TIM0_7_TIN64_P20_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN7_P02_7_IN; /**< \brief IfxGtm_TIM0_7_TIN7_P02_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM0_7_TIN84_P14_4_IN; /**< \brief IfxGtm_TIM0_7_TIN84_P14_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN0_P02_0_IN; /**< \brief IfxGtm_TIM1_0_TIN0_P02_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN109_P10_7_IN; /**< \brief IfxGtm_TIM1_0_TIN109_P10_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN18_P00_9_IN; /**< \brief IfxGtm_TIM1_0_TIN18_P00_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN26_P33_4_IN; /**< \brief IfxGtm_TIM1_0_TIN26_P33_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN32_P33_10_IN; /**< \brief IfxGtm_TIM1_0_TIN32_P33_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN48_P22_1_IN; /**< \brief IfxGtm_TIM1_0_TIN48_P22_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN53_P21_2_IN; /**< \brief IfxGtm_TIM1_0_TIN53_P21_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN68_P20_12_IN; /**< \brief IfxGtm_TIM1_0_TIN68_P20_12_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN76_P15_5_IN; /**< \brief IfxGtm_TIM1_0_TIN76_P15_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN77_P15_6_IN; /**< \brief IfxGtm_TIM1_0_TIN77_P15_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN85_P14_5_IN; /**< \brief IfxGtm_TIM1_0_TIN85_P14_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN87_P14_7_IN; /**< \brief IfxGtm_TIM1_0_TIN87_P14_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_0_TIN94_P13_3_IN; /**< \brief IfxGtm_TIM1_0_TIN94_P13_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN103_P10_1_IN; /**< \brief IfxGtm_TIM1_1_TIN103_P10_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN19_P00_10_IN; /**< \brief IfxGtm_TIM1_1_TIN19_P00_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN1_P02_1_IN; /**< \brief IfxGtm_TIM1_1_TIN1_P02_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN27_P33_5_IN; /**< \brief IfxGtm_TIM1_1_TIN27_P33_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN31_P33_9_IN; /**< \brief IfxGtm_TIM1_1_TIN31_P33_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN47_P22_0_IN; /**< \brief IfxGtm_TIM1_1_TIN47_P22_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN54_P21_3_IN; /**< \brief IfxGtm_TIM1_1_TIN54_P21_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN69_P20_13_IN; /**< \brief IfxGtm_TIM1_1_TIN69_P20_13_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN78_P15_7_IN; /**< \brief IfxGtm_TIM1_1_TIN78_P15_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN86_P14_6_IN; /**< \brief IfxGtm_TIM1_1_TIN86_P14_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_1_TIN95_P11_2_IN; /**< \brief IfxGtm_TIM1_1_TIN95_P11_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN104_P10_2_IN; /**< \brief IfxGtm_TIM1_2_TIN104_P10_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN107_P10_5_IN; /**< \brief IfxGtm_TIM1_2_TIN107_P10_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN12_P00_3_IN; /**< \brief IfxGtm_TIM1_2_TIN12_P00_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN20_P00_11_IN; /**< \brief IfxGtm_TIM1_2_TIN20_P00_11_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN28_P33_6_IN; /**< \brief IfxGtm_TIM1_2_TIN28_P33_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN2_P02_2_IN; /**< \brief IfxGtm_TIM1_2_TIN2_P02_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN33_P33_11_IN; /**< \brief IfxGtm_TIM1_2_TIN33_P33_11_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN46_P23_5_IN; /**< \brief IfxGtm_TIM1_2_TIN46_P23_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN55_P21_4_IN; /**< \brief IfxGtm_TIM1_2_TIN55_P21_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN70_P20_14_IN; /**< \brief IfxGtm_TIM1_2_TIN70_P20_14_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN79_P15_8_IN; /**< \brief IfxGtm_TIM1_2_TIN79_P15_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_2_TIN96_P11_3_IN; /**< \brief IfxGtm_TIM1_2_TIN96_P11_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN105_P10_3_IN; /**< \brief IfxGtm_TIM1_3_TIN105_P10_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN108_P10_6_IN; /**< \brief IfxGtm_TIM1_3_TIN108_P10_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN13_P00_4_IN; /**< \brief IfxGtm_TIM1_3_TIN13_P00_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN21_P00_12_IN; /**< \brief IfxGtm_TIM1_3_TIN21_P00_12_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN29_P33_7_IN; /**< \brief IfxGtm_TIM1_3_TIN29_P33_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN38_P32_2_IN; /**< \brief IfxGtm_TIM1_3_TIN38_P32_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN3_P02_3_IN; /**< \brief IfxGtm_TIM1_3_TIN3_P02_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN49_P22_2_IN; /**< \brief IfxGtm_TIM1_3_TIN49_P22_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN56_P21_5_IN; /**< \brief IfxGtm_TIM1_3_TIN56_P21_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN71_P15_0_IN; /**< \brief IfxGtm_TIM1_3_TIN71_P15_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN80_P14_0_IN; /**< \brief IfxGtm_TIM1_3_TIN80_P14_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_3_TIN97_P11_6_IN; /**< \brief IfxGtm_TIM1_3_TIN97_P11_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN102_P10_0_IN; /**< \brief IfxGtm_TIM1_4_TIN102_P10_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN14_P00_5_IN; /**< \brief IfxGtm_TIM1_4_TIN14_P00_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN22_P33_0_IN; /**< \brief IfxGtm_TIM1_4_TIN22_P33_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN30_P33_8_IN; /**< \brief IfxGtm_TIM1_4_TIN30_P33_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN39_P32_3_IN; /**< \brief IfxGtm_TIM1_4_TIN39_P32_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN4_P02_4_IN; /**< \brief IfxGtm_TIM1_4_TIN4_P02_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN50_P22_3_IN; /**< \brief IfxGtm_TIM1_4_TIN50_P22_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN57_P21_6_IN; /**< \brief IfxGtm_TIM1_4_TIN57_P21_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN72_P15_1_IN; /**< \brief IfxGtm_TIM1_4_TIN72_P15_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN81_P14_1_IN; /**< \brief IfxGtm_TIM1_4_TIN81_P14_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_4_TIN98_P11_9_IN; /**< \brief IfxGtm_TIM1_4_TIN98_P11_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN110_P10_8_IN; /**< \brief IfxGtm_TIM1_5_TIN110_P10_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN15_P00_6_IN; /**< \brief IfxGtm_TIM1_5_TIN15_P00_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN40_P32_4_IN; /**< \brief IfxGtm_TIM1_5_TIN40_P32_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN41_P23_0_IN; /**< \brief IfxGtm_TIM1_5_TIN41_P23_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN58_P21_7_IN; /**< \brief IfxGtm_TIM1_5_TIN58_P21_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN5_P02_5_IN; /**< \brief IfxGtm_TIM1_5_TIN5_P02_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN65_P20_9_IN; /**< \brief IfxGtm_TIM1_5_TIN65_P20_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN73_P15_2_IN; /**< \brief IfxGtm_TIM1_5_TIN73_P15_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN82_P14_2_IN; /**< \brief IfxGtm_TIM1_5_TIN82_P14_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN91_P13_0_IN; /**< \brief IfxGtm_TIM1_5_TIN91_P13_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_5_TIN99_P11_10_IN; /**< \brief IfxGtm_TIM1_5_TIN99_P11_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN100_P11_11_IN; /**< \brief IfxGtm_TIM1_6_TIN100_P11_11_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN106_P10_4_IN; /**< \brief IfxGtm_TIM1_6_TIN106_P10_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN16_P00_7_IN; /**< \brief IfxGtm_TIM1_6_TIN16_P00_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN24_P33_2_IN; /**< \brief IfxGtm_TIM1_6_TIN24_P33_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN42_P23_1_IN; /**< \brief IfxGtm_TIM1_6_TIN42_P23_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN43_P23_2_IN; /**< \brief IfxGtm_TIM1_6_TIN43_P23_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN59_P20_0_IN; /**< \brief IfxGtm_TIM1_6_TIN59_P20_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN66_P20_10_IN; /**< \brief IfxGtm_TIM1_6_TIN66_P20_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN6_P02_6_IN; /**< \brief IfxGtm_TIM1_6_TIN6_P02_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN74_P15_3_IN; /**< \brief IfxGtm_TIM1_6_TIN74_P15_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN83_P14_3_IN; /**< \brief IfxGtm_TIM1_6_TIN83_P14_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_6_TIN92_P13_1_IN; /**< \brief IfxGtm_TIM1_6_TIN92_P13_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN101_P11_12_IN; /**< \brief IfxGtm_TIM1_7_TIN101_P11_12_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN17_P00_8_IN; /**< \brief IfxGtm_TIM1_7_TIN17_P00_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN25_P33_3_IN; /**< \brief IfxGtm_TIM1_7_TIN25_P33_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN44_P23_3_IN; /**< \brief IfxGtm_TIM1_7_TIN44_P23_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN45_P23_4_IN; /**< \brief IfxGtm_TIM1_7_TIN45_P23_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN64_P20_8_IN; /**< \brief IfxGtm_TIM1_7_TIN64_P20_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN67_P20_11_IN; /**< \brief IfxGtm_TIM1_7_TIN67_P20_11_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN75_P15_4_IN; /**< \brief IfxGtm_TIM1_7_TIN75_P15_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN7_P02_7_IN; /**< \brief IfxGtm_TIM1_7_TIN7_P02_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN84_P14_4_IN; /**< \brief IfxGtm_TIM1_7_TIN84_P14_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM1_7_TIN93_P13_2_IN; /**< \brief IfxGtm_TIM1_7_TIN93_P13_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN34_P33_12_IN; /**< \brief IfxGtm_TIM2_0_TIN34_P33_12_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN68_P20_12_IN; /**< \brief IfxGtm_TIM2_0_TIN68_P20_12_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN76_P15_5_IN; /**< \brief IfxGtm_TIM2_0_TIN76_P15_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN8_P02_8_IN; /**< \brief IfxGtm_TIM2_0_TIN8_P02_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN94_P13_3_IN; /**< \brief IfxGtm_TIM2_0_TIN94_P13_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_0_TIN9_P00_0_IN; /**< \brief IfxGtm_TIM2_0_TIN9_P00_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN10_P00_1_IN; /**< \brief IfxGtm_TIM2_1_TIN10_P00_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN11_P00_2_IN; /**< \brief IfxGtm_TIM2_1_TIN11_P00_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN35_P33_13_IN; /**< \brief IfxGtm_TIM2_1_TIN35_P33_13_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN69_P20_13_IN; /**< \brief IfxGtm_TIM2_1_TIN69_P20_13_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_1_TIN95_P11_2_IN; /**< \brief IfxGtm_TIM2_1_TIN95_P11_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN12_P00_3_IN; /**< \brief IfxGtm_TIM2_2_TIN12_P00_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN36_P32_0_IN; /**< \brief IfxGtm_TIM2_2_TIN36_P32_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN70_P20_14_IN; /**< \brief IfxGtm_TIM2_2_TIN70_P20_14_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN88_P14_8_IN; /**< \brief IfxGtm_TIM2_2_TIN88_P14_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_2_TIN96_P11_3_IN; /**< \brief IfxGtm_TIM2_2_TIN96_P11_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN13_P00_4_IN; /**< \brief IfxGtm_TIM2_3_TIN13_P00_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN60_P20_1_IN; /**< \brief IfxGtm_TIM2_3_TIN60_P20_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN71_P15_0_IN; /**< \brief IfxGtm_TIM2_3_TIN71_P15_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN89_P14_9_IN; /**< \brief IfxGtm_TIM2_3_TIN89_P14_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_3_TIN97_P11_6_IN; /**< \brief IfxGtm_TIM2_3_TIN97_P11_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN14_P00_5_IN; /**< \brief IfxGtm_TIM2_4_TIN14_P00_5_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN51_P21_0_IN; /**< \brief IfxGtm_TIM2_4_TIN51_P21_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN61_P20_3_IN; /**< \brief IfxGtm_TIM2_4_TIN61_P20_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN72_P15_1_IN; /**< \brief IfxGtm_TIM2_4_TIN72_P15_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN90_P14_10_IN; /**< \brief IfxGtm_TIM2_4_TIN90_P14_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_4_TIN98_P11_9_IN; /**< \brief IfxGtm_TIM2_4_TIN98_P11_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN15_P00_6_IN; /**< \brief IfxGtm_TIM2_5_TIN15_P00_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN52_P21_1_IN; /**< \brief IfxGtm_TIM2_5_TIN52_P21_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN65_P20_9_IN; /**< \brief IfxGtm_TIM2_5_TIN65_P20_9_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN73_P15_2_IN; /**< \brief IfxGtm_TIM2_5_TIN73_P15_2_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN91_P13_0_IN; /**< \brief IfxGtm_TIM2_5_TIN91_P13_0_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_5_TIN99_P11_10_IN; /**< \brief IfxGtm_TIM2_5_TIN99_P11_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN100_P11_11_IN; /**< \brief IfxGtm_TIM2_6_TIN100_P11_11_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN16_P00_7_IN; /**< \brief IfxGtm_TIM2_6_TIN16_P00_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN62_P20_6_IN; /**< \brief IfxGtm_TIM2_6_TIN62_P20_6_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN66_P20_10_IN; /**< \brief IfxGtm_TIM2_6_TIN66_P20_10_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN74_P15_3_IN; /**< \brief IfxGtm_TIM2_6_TIN74_P15_3_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_6_TIN92_P13_1_IN; /**< \brief IfxGtm_TIM2_6_TIN92_P13_1_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN101_P11_12_IN; /**< \brief IfxGtm_TIM2_7_TIN101_P11_12_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN17_P00_8_IN; /**< \brief IfxGtm_TIM2_7_TIN17_P00_8_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN63_P20_7_IN; /**< \brief IfxGtm_TIM2_7_TIN63_P20_7_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN67_P20_11_IN; /**< \brief IfxGtm_TIM2_7_TIN67_P20_11_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN75_P15_4_IN; /**< \brief IfxGtm_TIM2_7_TIN75_P15_4_IN */
+IFX_EXTERN IfxGtm_Tim_TinMap IfxGtm_TIM2_7_TIN93_P13_2_IN; /**< \brief IfxGtm_TIM2_7_TIN93_P13_2_IN */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM0_0_TOUT109_P10_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM0_0_TOUT18_P00_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM0_0_TOUT26_P33_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM0_0_TOUT32_P33_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM0_0_TOUT53_P21_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM0_0_TOUT76_P15_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM0_0_TOUT77_P15_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_TOM0_0_TOUT85_P14_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM0_0_TOUT87_P14_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM0_10_TOUT12_P00_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM0_10_TOUT2_P02_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM0_10_TOUT41_P23_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM0_10_TOUT46_P23_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM0_10_TOUT62_P20_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM0_10_TOUT70_P20_14_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_10_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM0_10_TOUT96_P11_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM0_11_TOUT13_P00_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM0_11_TOUT3_P02_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM0_11_TOUT43_P23_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM0_11_TOUT49_P22_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM0_11_TOUT63_P20_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM0_11_TOUT71_P15_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_11_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM0_11_TOUT97_P11_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM0_12_TOUT14_P00_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM0_12_TOUT34_P33_12_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM0_12_TOUT44_P23_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM0_12_TOUT4_P02_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM0_12_TOUT50_P22_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM0_12_TOUT72_P15_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_12_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM0_12_TOUT98_P11_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM0_13_TOUT15_P00_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM0_13_TOUT35_P33_13_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM0_13_TOUT5_P02_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM0_13_TOUT65_P20_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM0_13_TOUT73_P15_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_13_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM0_13_TOUT99_P11_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM0_14_TOUT100_P11_11_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM0_14_TOUT16_P00_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM0_14_TOUT36_P32_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM0_14_TOUT66_P20_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM0_14_TOUT6_P02_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_14_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM0_14_TOUT74_P15_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM0_15_TOUT101_P11_12_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM0_15_TOUT17_P00_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_15_TOUT42_P23_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM0_15_TOUT67_P20_11_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM0_15_TOUT75_P15_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_15_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM0_15_TOUT7_P02_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM0_1_TOUT103_P10_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM0_1_TOUT19_P00_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM0_1_TOUT27_P33_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM0_1_TOUT31_P33_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM0_1_TOUT54_P21_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM0_1_TOUT78_P15_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM0_1_TOUT86_P14_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM0_2_TOUT104_P10_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM0_2_TOUT107_P10_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM0_2_TOUT20_P00_11_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM0_2_TOUT28_P33_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM0_2_TOUT33_P33_11_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM0_2_TOUT55_P21_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM0_2_TOUT79_P15_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM0_2_TOUT88_P14_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM0_3_TOUT105_P10_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM0_3_TOUT108_P10_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM0_3_TOUT21_P00_12_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM0_3_TOUT29_P33_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM0_3_TOUT38_P32_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM0_3_TOUT56_P21_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM0_3_TOUT60_P20_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM0_3_TOUT80_P14_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM0_3_TOUT89_P14_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT102_P10_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM0_4_TOUT22_P33_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM0_4_TOUT30_P33_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM0_4_TOUT39_P32_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM0_4_TOUT57_P21_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM0_4_TOUT61_P20_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM0_4_TOUT81_P14_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM0_4_TOUT90_P14_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM0_5_TOUT110_P10_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM0_5_TOUT23_P33_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM0_5_TOUT40_P32_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM0_5_TOUT58_P21_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM0_5_TOUT82_P14_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM0_5_TOUT91_P13_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM0_6_TOUT106_P10_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM0_6_TOUT24_P33_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT42_P23_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT42_P23_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM0_6_TOUT59_P20_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT83_P14_3_OUT; /**< \brief IfxGtm_TOM0_6_TOUT83_P14_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM0_6_TOUT92_P13_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM0_7_TOUT25_P33_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM0_7_TOUT45_P23_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM0_7_TOUT64_P20_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM0_7_TOUT84_P14_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM0_7_TOUT93_P13_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT0_P02_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM0_8_TOUT48_P22_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT51_P21_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM0_8_TOUT68_P20_12_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM0_8_TOUT8_P02_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM0_8_TOUT94_P13_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM0_8_TOUT95_P11_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_8_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM0_8_TOUT9_P00_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT10_P00_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM0_9_TOUT11_P00_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT1_P02_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT47_P22_0_OUT; /**< \brief IfxGtm_TOM0_9_TOUT47_P22_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM0_9_TOUT52_P21_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM0_9_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM0_9_TOUT69_P20_13_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT18_P00_9_OUT; /**< \brief IfxGtm_TOM1_0_TOUT18_P00_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT26_P33_4_OUT; /**< \brief IfxGtm_TOM1_0_TOUT26_P33_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT32_P33_10_OUT; /**< \brief IfxGtm_TOM1_0_TOUT32_P33_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT48_P22_1_OUT; /**< \brief IfxGtm_TOM1_0_TOUT48_P22_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT53_P21_2_OUT; /**< \brief IfxGtm_TOM1_0_TOUT53_P21_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT68_P20_12_OUT; /**< \brief IfxGtm_TOM1_0_TOUT68_P20_12_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT76_P15_5_OUT; /**< \brief IfxGtm_TOM1_0_TOUT76_P15_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT77_P15_6_OUT; /**< \brief IfxGtm_TOM1_0_TOUT77_P15_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT85_P14_5_OUT; /**< \brief IfxGtm_TOM1_0_TOUT85_P14_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT87_P14_7_OUT; /**< \brief IfxGtm_TOM1_0_TOUT87_P14_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT8_P02_8_OUT; /**< \brief IfxGtm_TOM1_0_TOUT8_P02_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT94_P13_3_OUT; /**< \brief IfxGtm_TOM1_0_TOUT94_P13_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_0_TOUT9_P00_0_OUT; /**< \brief IfxGtm_TOM1_0_TOUT9_P00_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT104_P10_2_OUT; /**< \brief IfxGtm_TOM1_10_TOUT104_P10_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT107_P10_5_OUT; /**< \brief IfxGtm_TOM1_10_TOUT107_P10_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT2_P02_2_OUT; /**< \brief IfxGtm_TOM1_10_TOUT2_P02_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_10_TOUT62_P20_6_OUT; /**< \brief IfxGtm_TOM1_10_TOUT62_P20_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT105_P10_3_OUT; /**< \brief IfxGtm_TOM1_11_TOUT105_P10_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT108_P10_6_OUT; /**< \brief IfxGtm_TOM1_11_TOUT108_P10_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT3_P02_3_OUT; /**< \brief IfxGtm_TOM1_11_TOUT3_P02_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT60_P20_1_OUT; /**< \brief IfxGtm_TOM1_11_TOUT60_P20_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_11_TOUT63_P20_7_OUT; /**< \brief IfxGtm_TOM1_11_TOUT63_P20_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT102_P10_0_OUT; /**< \brief IfxGtm_TOM1_12_TOUT102_P10_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT34_P33_12_OUT; /**< \brief IfxGtm_TOM1_12_TOUT34_P33_12_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT4_P02_4_OUT; /**< \brief IfxGtm_TOM1_12_TOUT4_P02_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_12_TOUT61_P20_3_OUT; /**< \brief IfxGtm_TOM1_12_TOUT61_P20_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT110_P10_8_OUT; /**< \brief IfxGtm_TOM1_13_TOUT110_P10_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT35_P33_13_OUT; /**< \brief IfxGtm_TOM1_13_TOUT35_P33_13_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT5_P02_5_OUT; /**< \brief IfxGtm_TOM1_13_TOUT5_P02_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_13_TOUT65_P20_9_OUT; /**< \brief IfxGtm_TOM1_13_TOUT65_P20_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT36_P32_0_OUT; /**< \brief IfxGtm_TOM1_14_TOUT36_P32_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT66_P20_10_OUT; /**< \brief IfxGtm_TOM1_14_TOUT66_P20_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_14_TOUT6_P02_6_OUT; /**< \brief IfxGtm_TOM1_14_TOUT6_P02_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT67_P20_11_OUT; /**< \brief IfxGtm_TOM1_15_TOUT67_P20_11_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_15_TOUT7_P02_7_OUT; /**< \brief IfxGtm_TOM1_15_TOUT7_P02_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT10_P00_1_OUT; /**< \brief IfxGtm_TOM1_1_TOUT10_P00_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT11_P00_2_OUT; /**< \brief IfxGtm_TOM1_1_TOUT11_P00_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT19_P00_10_OUT; /**< \brief IfxGtm_TOM1_1_TOUT19_P00_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT27_P33_5_OUT; /**< \brief IfxGtm_TOM1_1_TOUT27_P33_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT31_P33_9_OUT; /**< \brief IfxGtm_TOM1_1_TOUT31_P33_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT47_P22_0_OUT; /**< \brief IfxGtm_TOM1_1_TOUT47_P22_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT54_P21_3_OUT; /**< \brief IfxGtm_TOM1_1_TOUT54_P21_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT69_P20_13_OUT; /**< \brief IfxGtm_TOM1_1_TOUT69_P20_13_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT78_P15_7_OUT; /**< \brief IfxGtm_TOM1_1_TOUT78_P15_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT86_P14_6_OUT; /**< \brief IfxGtm_TOM1_1_TOUT86_P14_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_1_TOUT95_P11_2_OUT; /**< \brief IfxGtm_TOM1_1_TOUT95_P11_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT12_P00_3_OUT; /**< \brief IfxGtm_TOM1_2_TOUT12_P00_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT20_P00_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT20_P00_11_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT28_P33_6_OUT; /**< \brief IfxGtm_TOM1_2_TOUT28_P33_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT33_P33_11_OUT; /**< \brief IfxGtm_TOM1_2_TOUT33_P33_11_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT46_P23_5_OUT; /**< \brief IfxGtm_TOM1_2_TOUT46_P23_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT55_P21_4_OUT; /**< \brief IfxGtm_TOM1_2_TOUT55_P21_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT70_P20_14_OUT; /**< \brief IfxGtm_TOM1_2_TOUT70_P20_14_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT79_P15_8_OUT; /**< \brief IfxGtm_TOM1_2_TOUT79_P15_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT88_P14_8_OUT; /**< \brief IfxGtm_TOM1_2_TOUT88_P14_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_2_TOUT96_P11_3_OUT; /**< \brief IfxGtm_TOM1_2_TOUT96_P11_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT13_P00_4_OUT; /**< \brief IfxGtm_TOM1_3_TOUT13_P00_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT21_P00_12_OUT; /**< \brief IfxGtm_TOM1_3_TOUT21_P00_12_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT29_P33_7_OUT; /**< \brief IfxGtm_TOM1_3_TOUT29_P33_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT38_P32_2_OUT; /**< \brief IfxGtm_TOM1_3_TOUT38_P32_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT49_P22_2_OUT; /**< \brief IfxGtm_TOM1_3_TOUT49_P22_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT56_P21_5_OUT; /**< \brief IfxGtm_TOM1_3_TOUT56_P21_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT71_P15_0_OUT; /**< \brief IfxGtm_TOM1_3_TOUT71_P15_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT80_P14_0_OUT; /**< \brief IfxGtm_TOM1_3_TOUT80_P14_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT89_P14_9_OUT; /**< \brief IfxGtm_TOM1_3_TOUT89_P14_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_3_TOUT97_P11_6_OUT; /**< \brief IfxGtm_TOM1_3_TOUT97_P11_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT14_P00_5_OUT; /**< \brief IfxGtm_TOM1_4_TOUT14_P00_5_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT22_P33_0_OUT; /**< \brief IfxGtm_TOM1_4_TOUT22_P33_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT30_P33_8_OUT; /**< \brief IfxGtm_TOM1_4_TOUT30_P33_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT39_P32_3_OUT; /**< \brief IfxGtm_TOM1_4_TOUT39_P32_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT50_P22_3_OUT; /**< \brief IfxGtm_TOM1_4_TOUT50_P22_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT57_P21_6_OUT; /**< \brief IfxGtm_TOM1_4_TOUT57_P21_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT72_P15_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT72_P15_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT81_P14_1_OUT; /**< \brief IfxGtm_TOM1_4_TOUT81_P14_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT90_P14_10_OUT; /**< \brief IfxGtm_TOM1_4_TOUT90_P14_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_4_TOUT98_P11_9_OUT; /**< \brief IfxGtm_TOM1_4_TOUT98_P11_9_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT15_P00_6_OUT; /**< \brief IfxGtm_TOM1_5_TOUT15_P00_6_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT23_P33_1_OUT; /**< \brief IfxGtm_TOM1_5_TOUT23_P33_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT40_P32_4_OUT; /**< \brief IfxGtm_TOM1_5_TOUT40_P32_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT41_P23_0_OUT; /**< \brief IfxGtm_TOM1_5_TOUT41_P23_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT58_P21_7_OUT; /**< \brief IfxGtm_TOM1_5_TOUT58_P21_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT73_P15_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT73_P15_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT82_P14_2_OUT; /**< \brief IfxGtm_TOM1_5_TOUT82_P14_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT91_P13_0_OUT; /**< \brief IfxGtm_TOM1_5_TOUT91_P13_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_5_TOUT99_P11_10_OUT; /**< \brief IfxGtm_TOM1_5_TOUT99_P11_10_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT100_P11_11_OUT; /**< \brief IfxGtm_TOM1_6_TOUT100_P11_11_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT106_P10_4_OUT; /**< \brief IfxGtm_TOM1_6_TOUT106_P10_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT16_P00_7_OUT; /**< \brief IfxGtm_TOM1_6_TOUT16_P00_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT24_P33_2_OUT; /**< \brief IfxGtm_TOM1_6_TOUT24_P33_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT43_P23_2_OUT; /**< \brief IfxGtm_TOM1_6_TOUT43_P23_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT59_P20_0_OUT; /**< \brief IfxGtm_TOM1_6_TOUT59_P20_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT74_P15_3_OUT; /**< \brief IfxGtm_TOM1_6_TOUT74_P15_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT83_P14_3_OUT; /**< \brief IfxGtm_TOM1_6_TOUT83_P14_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_6_TOUT92_P13_1_OUT; /**< \brief IfxGtm_TOM1_6_TOUT92_P13_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT101_P11_12_OUT; /**< \brief IfxGtm_TOM1_7_TOUT101_P11_12_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT17_P00_8_OUT; /**< \brief IfxGtm_TOM1_7_TOUT17_P00_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT25_P33_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT25_P33_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT44_P23_3_OUT; /**< \brief IfxGtm_TOM1_7_TOUT44_P23_3_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT45_P23_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT45_P23_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT64_P20_8_OUT; /**< \brief IfxGtm_TOM1_7_TOUT64_P20_8_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT75_P15_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT75_P15_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT84_P14_4_OUT; /**< \brief IfxGtm_TOM1_7_TOUT84_P14_4_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_7_TOUT93_P13_2_OUT; /**< \brief IfxGtm_TOM1_7_TOUT93_P13_2_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT0_P02_0_OUT; /**< \brief IfxGtm_TOM1_8_TOUT0_P02_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT109_P10_7_OUT; /**< \brief IfxGtm_TOM1_8_TOUT109_P10_7_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_8_TOUT51_P21_0_OUT; /**< \brief IfxGtm_TOM1_8_TOUT51_P21_0_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT103_P10_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT103_P10_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT1_P02_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT1_P02_1_OUT */
+IFX_EXTERN IfxGtm_Tom_ToutMap IfxGtm_TOM1_9_TOUT52_P21_1_OUT; /**< \brief IfxGtm_TOM1_9_TOUT52_P21_1_OUT */
+
+/** \} */
+
+#endif /* IFXGTM_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxI2c_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxI2c_PinMap.c
new file mode 100644
index 0000000..7d36cc0
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxI2c_PinMap.c
@@ -0,0 +1,70 @@
+/**
+ * \file IfxI2c_PinMap.c
+ * \brief I2C I/O map
+ * \ingroup IfxLld_I2c
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxI2c_PinMap.h"
+
+IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT = {&MODULE_I2C0, {&MODULE_P02, 5}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5};
+IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT = {&MODULE_I2C0, {&MODULE_P13, 1}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
+IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT = {&MODULE_I2C0, {&MODULE_P15, 4}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6};
+IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT = {&MODULE_I2C0, {&MODULE_P02, 4}, Ifx_RxSel_a, IfxPort_OutputIdx_alt5};
+IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT = {&MODULE_I2C0, {&MODULE_P13, 2}, Ifx_RxSel_b, IfxPort_OutputIdx_alt6};
+IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT = {&MODULE_I2C0, {&MODULE_P15, 5}, Ifx_RxSel_c, IfxPort_OutputIdx_alt6};
+
+
+const IfxI2c_Scl_InOut *IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS] = {
+ {
+ &IfxI2c0_SCL_P02_5_INOUT,
+ &IfxI2c0_SCL_P13_1_INOUT,
+ &IfxI2c0_SCL_P15_4_INOUT
+ }
+};
+
+const IfxI2c_Sda_InOut *IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS] = {
+ {
+ &IfxI2c0_SDA_P02_4_INOUT,
+ &IfxI2c0_SDA_P13_2_INOUT,
+ &IfxI2c0_SDA_P15_5_INOUT
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxI2c_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxI2c_PinMap.h
new file mode 100644
index 0000000..ae8148f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxI2c_PinMap.h
@@ -0,0 +1,97 @@
+/**
+ * \file IfxI2c_PinMap.h
+ * \brief I2C I/O map
+ * \ingroup IfxLld_I2c
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_I2c_pinmap I2C Pin Mapping
+ * \ingroup IfxLld_I2c
+ */
+
+#ifndef IFXI2C_PINMAP_H
+#define IFXI2C_PINMAP_H
+
+#include
+#include <_Impl/IfxI2c_cfg.h>
+#include
+
+/** \addtogroup IfxLld_I2c_pinmap
+ * \{ */
+
+/** \brief SCL input mapping structure */
+typedef const struct
+{
+ Ifx_I2C* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
+ IfxPort_OutputIdx outSelect; /**< \brief Port control code */
+} IfxI2c_Scl_InOut;
+
+/** \brief SDA input mapping structure */
+typedef const struct
+{
+ Ifx_I2C* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel inSelect; /**< \brief Input multiplexer value */
+ IfxPort_OutputIdx outSelect; /**< \brief Port control code */
+} IfxI2c_Sda_InOut;
+
+IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P02_5_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
+IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P13_1_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
+IFX_EXTERN IfxI2c_Scl_InOut IfxI2c0_SCL_P15_4_INOUT; /**< \brief I2C0_SCL: I2C0 output and input */
+IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P02_4_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
+IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P13_2_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
+IFX_EXTERN IfxI2c_Sda_InOut IfxI2c0_SDA_P15_5_INOUT; /**< \brief I2C0_SDA: I2C0 output and input */
+
+/** \brief Table dimensions */
+#define IFXI2C_PINMAP_NUM_MODULES 1
+#define IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS 3
+#define IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS 3
+
+
+/** \brief IfxI2c_Scl_InOut table */
+IFX_EXTERN const IfxI2c_Scl_InOut *IfxI2c_Scl_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SCL_INOUT_NUM_ITEMS];
+
+/** \brief IfxI2c_Sda_InOut table */
+IFX_EXTERN const IfxI2c_Sda_InOut *IfxI2c_Sda_InOut_pinTable[IFXI2C_PINMAP_NUM_MODULES][IFXI2C_PINMAP_SDA_INOUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXI2C_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMsc_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMsc_PinMap.c
new file mode 100644
index 0000000..ee99296
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMsc_PinMap.c
@@ -0,0 +1,245 @@
+/**
+ * \file IfxMsc_PinMap.c
+ * \brief MSC I/O map
+ * \ingroup IfxLld_Msc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxMsc_PinMap.h"
+
+IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt4};
+IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt4};
+IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT = {&MODULE_MSC0, 0, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT = {&MODULE_MSC0, 0, {&MODULE_P11,11}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT = {&MODULE_MSC0, 0, {&MODULE_P14,10}, IfxPort_OutputIdx_alt3};
+IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT = {&MODULE_MSC0, 0, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT = {&MODULE_MSC0, 1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt4};
+IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT = {&MODULE_MSC0, 1, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT = {&MODULE_MSC0, 1, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt4};
+IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT = {&MODULE_MSC0, 1, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt3};
+IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT = {&MODULE_MSC0, 1, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt6};
+IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT = {&MODULE_MSC0, 2, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt6};
+IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT = {&MODULE_MSC0, 2, {&MODULE_P11,11}, IfxPort_OutputIdx_alt2};
+IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT = {&MODULE_MSC0, 2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt2};
+IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT = {&MODULE_MSC0, 2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt4};
+IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT = {&MODULE_MSC0, 3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt6};
+IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT = {&MODULE_MSC0, 3, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt2};
+IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT = {&MODULE_MSC0, 3, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt2};
+IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT = {&MODULE_MSC0, 3, {&MODULE_P14, 9}, IfxPort_OutputIdx_alt2};
+IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT = {&MODULE_MSC0, 3, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt4};
+IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT = {&MODULE_MSC1, 0, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT = {&MODULE_MSC1, 1, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt5};
+IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt4};
+IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT = {&MODULE_MSC1, 2, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt3};
+IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT = {&MODULE_MSC1, 3, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt4};
+IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt6};
+IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT = {&MODULE_MSC0, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt5};
+IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt6};
+IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT = {&MODULE_MSC1, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt5};
+IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT = {&MODULE_MSC0, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt5};
+IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT = {&MODULE_MSC0, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt5};
+IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt4};
+IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT = {&MODULE_MSC1, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt5};
+IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN = {&MODULE_MSC0, {&MODULE_P00, 0}, Ifx_RxSel_a};
+IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN = {&MODULE_MSC0, {&MODULE_P10, 5}, Ifx_RxSel_b};
+IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN = {&MODULE_MSC1, {&MODULE_P23, 3}, Ifx_RxSel_a};
+IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN = {&MODULE_MSC1, {&MODULE_P33,13}, Ifx_RxSel_b};
+IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN = {&MODULE_MSC0, {&MODULE_P11,10}, Ifx_RxSel_a};
+IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN = {&MODULE_MSC0, {&MODULE_P10, 2}, Ifx_RxSel_b};
+IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN = {&MODULE_MSC0, {&MODULE_P14, 3}, Ifx_RxSel_c};
+IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN = {&MODULE_MSC0, {&MODULE_P11, 3}, Ifx_RxSel_d};
+IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN = {&MODULE_MSC1, {&MODULE_P23, 1}, Ifx_RxSel_a};
+IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN = {&MODULE_MSC1, {&MODULE_P02, 3}, Ifx_RxSel_b};
+IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN = {&MODULE_MSC1, {&MODULE_P32, 4}, Ifx_RxSel_c};
+IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt7};
+IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT = {&MODULE_MSC0, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt5};
+IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt6};
+IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT = {&MODULE_MSC1, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt5};
+IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT = {&MODULE_MSC0, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt5};
+IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT = {&MODULE_MSC0, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt5};
+IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT = {&MODULE_MSC1, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt5};
+
+
+const IfxMsc_En_Out *IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxMsc0_EN0_P10_2_OUT,
+ &IfxMsc0_EN0_P10_3_OUT,
+ &IfxMsc0_EN0_P10_4_OUT,
+ &IfxMsc0_EN0_P11_11_OUT,
+ &IfxMsc0_EN0_P14_10_OUT,
+ &IfxMsc0_EN0_P15_5_OUT
+ },
+ {
+ &IfxMsc0_EN1_P10_1_OUT,
+ &IfxMsc0_EN1_P11_2_OUT,
+ &IfxMsc0_EN1_P13_0_OUT,
+ &IfxMsc0_EN1_P14_9_OUT,
+ &IfxMsc0_EN1_P15_3_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxMsc0_END2_P10_2_OUT,
+ &IfxMsc0_END2_P10_3_OUT,
+ &IfxMsc0_END2_P10_4_OUT,
+ &IfxMsc0_END2_P11_11_OUT,
+ &IfxMsc0_END2_P14_10_OUT,
+ &IfxMsc0_END2_P15_5_OUT
+ },
+ {
+ &IfxMsc0_END3_P10_1_OUT,
+ &IfxMsc0_END3_P11_2_OUT,
+ &IfxMsc0_END3_P13_0_OUT,
+ &IfxMsc0_END3_P14_9_OUT,
+ &IfxMsc0_END3_P15_3_OUT,
+ NULL_PTR
+ }
+ },
+ {
+ {
+ &IfxMsc1_EN0_P23_4_OUT,
+ &IfxMsc1_EN0_P32_4_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxMsc1_EN1_P23_5_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxMsc1_END2_P23_4_OUT,
+ &IfxMsc1_END2_P32_4_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxMsc1_END3_P23_5_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ }
+ }
+};
+
+const IfxMsc_Fcln_Out *IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS] = {
+ {
+ &IfxMsc0_FCLN_P13_0_OUT,
+ &IfxMsc0_FCLND_P13_0_OUT
+ },
+ {
+ &IfxMsc1_FCLN_P22_0_OUT,
+ &IfxMsc1_FCLND_P22_0_OUT
+ }
+};
+
+const IfxMsc_Fclp_Out *IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS] = {
+ {
+ &IfxMsc0_FCLP_P11_6_OUT,
+ &IfxMsc0_FCLP_P13_1_OUT,
+ &IfxMsc0_FCLP_P13_2_OUT
+ },
+ {
+ &IfxMsc1_FCLP_P22_1_OUT,
+ NULL_PTR,
+ NULL_PTR
+ }
+};
+
+const IfxMsc_Inj_In *IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS] = {
+ {
+ &IfxMsc0_INJ0_P00_0_IN,
+ &IfxMsc0_INJ1_P10_5_IN
+ },
+ {
+ &IfxMsc1_INJ0_P23_3_IN,
+ &IfxMsc1_INJ1_P33_13_IN
+ }
+};
+
+const IfxMsc_Sdi_In *IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS] = {
+ {
+ &IfxMsc0_SDI0_P11_10_IN,
+ &IfxMsc0_SDI1_P10_2_IN,
+ &IfxMsc0_SDI2_P14_3_IN,
+ &IfxMsc0_SDI3_P11_3_IN
+ },
+ {
+ &IfxMsc1_SDI0_P23_1_IN,
+ &IfxMsc1_SDI1_P02_3_IN,
+ &IfxMsc1_SDI2_P32_4_IN,
+ NULL_PTR
+ }
+};
+
+const IfxMsc_Son_Out *IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS] = {
+ {
+ &IfxMsc0_SON_P13_2_OUT,
+ &IfxMsc0_SOND_P13_2_OUT
+ },
+ {
+ &IfxMsc1_SON_P22_2_OUT,
+ &IfxMsc1_SOND_P22_2_OUT
+ }
+};
+
+const IfxMsc_Sop_Out *IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS] = {
+ {
+ &IfxMsc0_SOP_P11_9_OUT,
+ &IfxMsc0_SOP_P13_3_OUT
+ },
+ {
+ &IfxMsc1_SOP_P22_3_OUT,
+ NULL_PTR
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMsc_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMsc_PinMap.h
new file mode 100644
index 0000000..c622696
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMsc_PinMap.h
@@ -0,0 +1,205 @@
+/**
+ * \file IfxMsc_PinMap.h
+ * \brief MSC I/O map
+ * \ingroup IfxLld_Msc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Msc_pinmap MSC Pin Mapping
+ * \ingroup IfxLld_Msc
+ */
+
+#ifndef IFXMSC_PINMAP_H
+#define IFXMSC_PINMAP_H
+
+#include
+#include <_Impl/IfxMsc_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Msc_pinmap
+ * \{ */
+
+/** \brief INJ pin mapping structure */
+typedef const struct
+{
+ Ifx_MSC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxMsc_Inj_In;
+
+/** \brief SDI pin mapping structure */
+typedef const struct
+{
+ Ifx_MSC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxMsc_Sdi_In;
+
+/** \brief EN pin mapping structure */
+typedef const struct
+{
+ Ifx_MSC* module; /**< \brief Base address */
+ uint8 target; /**< \brief Target ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxMsc_En_Out;
+
+/** \brief FCLP pin mapping structure */
+typedef const struct
+{
+ Ifx_MSC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxMsc_Fclp_Out;
+
+/** \brief FCLN pin mapping structure */
+typedef const struct
+{
+ Ifx_MSC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxMsc_Fcln_Out;
+
+/** \brief SOP pin mapping structure */
+typedef const struct
+{
+ Ifx_MSC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxMsc_Sop_Out;
+
+/** \brief SON pin mapping structure */
+typedef const struct
+{
+ Ifx_MSC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxMsc_Son_Out;
+
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_2_OUT; /**< \brief MSC0_EN0: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_3_OUT; /**< \brief MSC0_EN0: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P10_4_OUT; /**< \brief MSC0_EN0: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P11_11_OUT; /**< \brief MSC0_EN0: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P14_10_OUT; /**< \brief MSC0_EN0: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN0_P15_5_OUT; /**< \brief MSC0_EN0: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P10_1_OUT; /**< \brief MSC0_EN1: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P11_2_OUT; /**< \brief MSC0_EN1: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P13_0_OUT; /**< \brief MSC0_EN1: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P14_9_OUT; /**< \brief MSC0_EN1: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_EN1_P15_3_OUT; /**< \brief MSC0_EN1: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_2_OUT; /**< \brief MSC0_END2: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_3_OUT; /**< \brief MSC0_END2: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P10_4_OUT; /**< \brief MSC0_END2: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P11_11_OUT; /**< \brief MSC0_END2: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P14_10_OUT; /**< \brief MSC0_END2: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END2_P15_5_OUT; /**< \brief MSC0_END2: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P10_1_OUT; /**< \brief MSC0_END3: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P11_2_OUT; /**< \brief MSC0_END3: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P13_0_OUT; /**< \brief MSC0_END3: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P14_9_OUT; /**< \brief MSC0_END3: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc0_END3_P15_3_OUT; /**< \brief MSC0_END3: MSC0 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P23_4_OUT; /**< \brief MSC1_EN0: MSC1 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN0_P32_4_OUT; /**< \brief MSC1_EN0: MSC1 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc1_EN1_P23_5_OUT; /**< \brief MSC1_EN1: MSC1 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P23_4_OUT; /**< \brief MSC1_END2: MSC1 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc1_END2_P32_4_OUT; /**< \brief MSC1_END2: MSC1 output */
+IFX_EXTERN IfxMsc_En_Out IfxMsc1_END3_P23_5_OUT; /**< \brief MSC1_END3: MSC1 output */
+IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLND_P13_0_OUT; /**< \brief MSC0_FCLND: MSC0 output (LVDS) */
+IFX_EXTERN IfxMsc_Fcln_Out IfxMsc0_FCLN_P13_0_OUT; /**< \brief MSC0_FCLN: MSC0 output (LVDS) */
+IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLND_P22_0_OUT; /**< \brief MSC1_FCLND: MSC1 output (LVDS) */
+IFX_EXTERN IfxMsc_Fcln_Out IfxMsc1_FCLN_P22_0_OUT; /**< \brief MSC1_FCLN: MSC1 output (LVDS) */
+IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P11_6_OUT; /**< \brief MSC0_FCLP: MSC0 output */
+IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_1_OUT; /**< \brief MSC0_FCLP: MSC0 output (LVDS) */
+IFX_EXTERN IfxMsc_Fclp_Out IfxMsc0_FCLP_P13_2_OUT; /**< \brief MSC0_FCLP: MSC0 output */
+IFX_EXTERN IfxMsc_Fclp_Out IfxMsc1_FCLP_P22_1_OUT; /**< \brief MSC1_FCLP: MSC1 output (LVDS) */
+IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ0_P00_0_IN; /**< \brief MSC0_INJ0: MSC0 input */
+IFX_EXTERN IfxMsc_Inj_In IfxMsc0_INJ1_P10_5_IN; /**< \brief MSC0_INJ1: MSC0 input */
+IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ0_P23_3_IN; /**< \brief MSC1_INJ0: MSC1 input */
+IFX_EXTERN IfxMsc_Inj_In IfxMsc1_INJ1_P33_13_IN; /**< \brief MSC1_INJ1: MSC1 input */
+IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI0_P11_10_IN; /**< \brief MSC0_SDI0: MSC0 input */
+IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI1_P10_2_IN; /**< \brief MSC0_SDI1: MSC0 input */
+IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI2_P14_3_IN; /**< \brief MSC0_SDI2: MSC0 input */
+IFX_EXTERN IfxMsc_Sdi_In IfxMsc0_SDI3_P11_3_IN; /**< \brief MSC0_SDI3: MSC0 input */
+IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI0_P23_1_IN; /**< \brief MSC1_SDI0: MSC1 input */
+IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI1_P02_3_IN; /**< \brief MSC1_SDI1: MSC1 input */
+IFX_EXTERN IfxMsc_Sdi_In IfxMsc1_SDI2_P32_4_IN; /**< \brief MSC1_SDI2: MSC1 input */
+IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SOND_P13_2_OUT; /**< \brief MSC0_SOND: MSC0 output (LVDS) */
+IFX_EXTERN IfxMsc_Son_Out IfxMsc0_SON_P13_2_OUT; /**< \brief MSC0_SON: MSC0 output (LVDS) */
+IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SOND_P22_2_OUT; /**< \brief MSC1_SOND: MSC1 output (LVDS) */
+IFX_EXTERN IfxMsc_Son_Out IfxMsc1_SON_P22_2_OUT; /**< \brief MSC1_SON: MSC1 output (LVDS) */
+IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P11_9_OUT; /**< \brief MSC0_SOP: MSC0 output */
+IFX_EXTERN IfxMsc_Sop_Out IfxMsc0_SOP_P13_3_OUT; /**< \brief MSC0_SOP: MSC0 output (LVDS) */
+IFX_EXTERN IfxMsc_Sop_Out IfxMsc1_SOP_P22_3_OUT; /**< \brief MSC1_SOP: MSC1 output (LVDS) */
+
+/** \brief Table dimensions */
+#define IFXMSC_PINMAP_NUM_MODULES 2
+#define IFXMSC_PINMAP_NUM_TARGETS 4
+#define IFXMSC_PINMAP_EN_OUT_NUM_ITEMS 6
+#define IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS 2
+#define IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS 3
+#define IFXMSC_PINMAP_INJ_IN_NUM_ITEMS 2
+#define IFXMSC_PINMAP_SDI_IN_NUM_ITEMS 4
+#define IFXMSC_PINMAP_SON_OUT_NUM_ITEMS 2
+#define IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS 2
+
+
+/** \brief IfxMsc_En_Out table */
+IFX_EXTERN const IfxMsc_En_Out *IfxMsc_En_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_NUM_TARGETS][IFXMSC_PINMAP_EN_OUT_NUM_ITEMS];
+
+/** \brief IfxMsc_Fcln_Out table */
+IFX_EXTERN const IfxMsc_Fcln_Out *IfxMsc_Fcln_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLN_OUT_NUM_ITEMS];
+
+/** \brief IfxMsc_Fclp_Out table */
+IFX_EXTERN const IfxMsc_Fclp_Out *IfxMsc_Fclp_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_FCLP_OUT_NUM_ITEMS];
+
+/** \brief IfxMsc_Inj_In table */
+IFX_EXTERN const IfxMsc_Inj_In *IfxMsc_Inj_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_INJ_IN_NUM_ITEMS];
+
+/** \brief IfxMsc_Sdi_In table */
+IFX_EXTERN const IfxMsc_Sdi_In *IfxMsc_Sdi_In_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SDI_IN_NUM_ITEMS];
+
+/** \brief IfxMsc_Son_Out table */
+IFX_EXTERN const IfxMsc_Son_Out *IfxMsc_Son_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SON_OUT_NUM_ITEMS];
+
+/** \brief IfxMsc_Sop_Out table */
+IFX_EXTERN const IfxMsc_Sop_Out *IfxMsc_Sop_Out_pinTable[IFXMSC_PINMAP_NUM_MODULES][IFXMSC_PINMAP_SOP_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXMSC_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMultican_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMultican_PinMap.c
new file mode 100644
index 0000000..29c4bb4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMultican_PinMap.c
@@ -0,0 +1,146 @@
+/**
+ * \file IfxMultican_PinMap.c
+ * \brief MULTICAN I/O map
+ * \ingroup IfxLld_Multican
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxMultican_PinMap.h"
+
+IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 1}, Ifx_RxSel_a};
+IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 7}, Ifx_RxSel_b};
+IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 4}, Ifx_RxSel_d};
+IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 7}, Ifx_RxSel_e};
+IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 3}, Ifx_RxSel_a};
+IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 1}, Ifx_RxSel_b};
+IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 1}, Ifx_RxSel_d};
+IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 1}, Ifx_RxSel_a};
+IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 3}, Ifx_RxSel_b};
+IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14, 8}, Ifx_RxSel_d};
+IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 2}, Ifx_RxSel_e};
+IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 3}, Ifx_RxSel_a};
+IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 2}, Ifx_RxSel_b};
+IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 0}, Ifx_RxSel_c};
+IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,10}, Ifx_RxSel_d};
+IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 9}, Ifx_RxSel_e};
+IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt2};
+IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT = {&MODULE_CAN, IfxMultican_NodeId_0, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_1, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt6};
+IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P14,10}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT = {&MODULE_CAN, IfxMultican_NodeId_2, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P11,12}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20,10}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt5};
+IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT = {&MODULE_CAN, IfxMultican_NodeId_3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt5};
+
+
+const IfxMultican_Rxd_In *IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxMultican_RXD0A_P02_1_IN,
+ &IfxMultican_RXD0B_P20_7_IN,
+ NULL_PTR,
+ &IfxMultican_RXD0D_P02_4_IN,
+ &IfxMultican_RXD0E_P33_7_IN
+ },
+ {
+ &IfxMultican_RXD1A_P15_3_IN,
+ &IfxMultican_RXD1B_P14_1_IN,
+ NULL_PTR,
+ &IfxMultican_RXD1D_P00_1_IN,
+ NULL_PTR
+ },
+ {
+ &IfxMultican_RXD2A_P15_1_IN,
+ &IfxMultican_RXD2B_P02_3_IN,
+ NULL_PTR,
+ &IfxMultican_RXD2D_P14_8_IN,
+ &IfxMultican_RXD2E_P10_2_IN
+ },
+ {
+ &IfxMultican_RXD3A_P00_3_IN,
+ &IfxMultican_RXD3B_P32_2_IN,
+ &IfxMultican_RXD3C_P20_0_IN,
+ &IfxMultican_RXD3D_P11_10_IN,
+ &IfxMultican_RXD3E_P20_9_IN
+ }
+ }
+};
+
+const IfxMultican_Txd_Out *IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxMultican_TXD0_P02_0_OUT,
+ &IfxMultican_TXD0_P02_5_OUT,
+ &IfxMultican_TXD0_P20_8_OUT,
+ &IfxMultican_TXD0_P33_8_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxMultican_TXD1_P00_0_OUT,
+ &IfxMultican_TXD1_P14_0_OUT,
+ &IfxMultican_TXD1_P15_2_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxMultican_TXD2_P02_2_OUT,
+ &IfxMultican_TXD2_P10_3_OUT,
+ &IfxMultican_TXD2_P14_10_OUT,
+ &IfxMultican_TXD2_P15_0_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxMultican_TXD3_P00_2_OUT,
+ &IfxMultican_TXD3_P11_12_OUT,
+ &IfxMultican_TXD3_P20_3_OUT,
+ &IfxMultican_TXD3_P20_10_OUT,
+ &IfxMultican_TXD3_P32_3_OUT
+ }
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMultican_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMultican_PinMap.h
new file mode 100644
index 0000000..e6e94af
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxMultican_PinMap.h
@@ -0,0 +1,124 @@
+/**
+ * \file IfxMultican_PinMap.h
+ * \brief MULTICAN I/O map
+ * \ingroup IfxLld_Multican
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Multican_pinmap MULTICAN Pin Mapping
+ * \ingroup IfxLld_Multican
+ */
+
+#ifndef IFXMULTICAN_PINMAP_H
+#define IFXMULTICAN_PINMAP_H
+
+#include
+#include <_Impl/IfxMultican_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Multican_pinmap
+ * \{ */
+
+/** \brief RXD pin mapping structure */
+typedef const struct
+{
+ Ifx_CAN* module; /**< \brief Base address */
+ IfxMultican_NodeId nodeId; /**< \brief Node ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxMultican_Rxd_In;
+
+/** \brief TXD pin mapping structure */
+typedef const struct
+{
+ Ifx_CAN* module; /**< \brief Base address */
+ IfxMultican_NodeId nodeId; /**< \brief Node ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxMultican_Txd_Out;
+
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0A_P02_1_IN; /**< \brief CAN0_RXDA: CAN node 0 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0B_P20_7_IN; /**< \brief CAN0_RXDB: CAN node 0 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0D_P02_4_IN; /**< \brief CAN0_RXDD: CAN node 0 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD0E_P33_7_IN; /**< \brief CAN0_RXDE: CAN node 0 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1A_P15_3_IN; /**< \brief CAN1_RXDA: CAN node 1 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1B_P14_1_IN; /**< \brief CAN1_RXDB: CAN node 1 input Used for single pin DAP (SPD) function. */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD1D_P00_1_IN; /**< \brief CAN1_RXDD: CAN node 1 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2A_P15_1_IN; /**< \brief CAN2_RXDA: CAN node 2 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2B_P02_3_IN; /**< \brief CAN2_RXDB: CAN node 2 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2D_P14_8_IN; /**< \brief CAN2_RXDD: CAN node 2 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD2E_P10_2_IN; /**< \brief CAN2_RXDE: CAN node 2 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3A_P00_3_IN; /**< \brief CAN3_RXDA: CAN node 3 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3B_P32_2_IN; /**< \brief CAN3_RXDB: CAN node 3 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3C_P20_0_IN; /**< \brief CAN3_RXDC: CAN node 3 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3D_P11_10_IN; /**< \brief CAN3_RXDD: CAN node 3 input */
+IFX_EXTERN IfxMultican_Rxd_In IfxMultican_RXD3E_P20_9_IN; /**< \brief CAN3_RXDE: CAN node 3 input */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_0_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P02_5_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P20_8_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD0_P33_8_OUT; /**< \brief CAN0_TXD: CAN node 0 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P00_0_OUT; /**< \brief CAN1_TXD: CAN node 1 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P14_0_OUT; /**< \brief CAN1_TXD: CAN node 1 output Used for single pin DAP (SPD) function. */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD1_P15_2_OUT; /**< \brief CAN1_TXD: CAN node 1 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P02_2_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P10_3_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P14_10_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD2_P15_0_OUT; /**< \brief CAN2_TXD: CAN node 2 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P00_2_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P11_12_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_10_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P20_3_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
+IFX_EXTERN IfxMultican_Txd_Out IfxMultican_TXD3_P32_3_OUT; /**< \brief CAN3_TXD: CAN node 3 output */
+
+/** \brief Table dimensions */
+#define IFXMULTICAN_PINMAP_NUM_MODULES 1
+#define IFXMULTICAN_PINMAP_NUM_NODES 4
+#define IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS 5
+#define IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS 5
+
+
+/** \brief IfxMultican_Rxd_In table */
+IFX_EXTERN const IfxMultican_Rxd_In *IfxMultican_Rxd_In_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_RXD_IN_NUM_ITEMS];
+
+/** \brief IfxMultican_Txd_Out table */
+IFX_EXTERN const IfxMultican_Txd_Out *IfxMultican_Txd_Out_pinTable[IFXMULTICAN_PINMAP_NUM_MODULES][IFXMULTICAN_PINMAP_NUM_NODES][IFXMULTICAN_PINMAP_TXD_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXMULTICAN_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPort_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPort_PinMap.c
new file mode 100644
index 0000000..d2d86c1
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPort_PinMap.c
@@ -0,0 +1,866 @@
+/**
+ * \file IfxPort_PinMap.c
+ * \brief PORT I/O map
+ * \ingroup IfxLld_Port
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxPort_PinMap.h"
+
+IfxPort_Pin IfxPort_P00_0 = {&MODULE_P00, 0};
+IfxPort_Pin IfxPort_P00_1 = {&MODULE_P00, 1};
+IfxPort_Pin IfxPort_P00_10 = {&MODULE_P00,10};
+IfxPort_Pin IfxPort_P00_11 = {&MODULE_P00,11};
+IfxPort_Pin IfxPort_P00_12 = {&MODULE_P00,12};
+IfxPort_Pin IfxPort_P00_2 = {&MODULE_P00, 2};
+IfxPort_Pin IfxPort_P00_3 = {&MODULE_P00, 3};
+IfxPort_Pin IfxPort_P00_4 = {&MODULE_P00, 4};
+IfxPort_Pin IfxPort_P00_5 = {&MODULE_P00, 5};
+IfxPort_Pin IfxPort_P00_6 = {&MODULE_P00, 6};
+IfxPort_Pin IfxPort_P00_7 = {&MODULE_P00, 7};
+IfxPort_Pin IfxPort_P00_8 = {&MODULE_P00, 8};
+IfxPort_Pin IfxPort_P00_9 = {&MODULE_P00, 9};
+IfxPort_Pin IfxPort_P02_0 = {&MODULE_P02, 0};
+IfxPort_Pin IfxPort_P02_1 = {&MODULE_P02, 1};
+IfxPort_Pin IfxPort_P02_2 = {&MODULE_P02, 2};
+IfxPort_Pin IfxPort_P02_3 = {&MODULE_P02, 3};
+IfxPort_Pin IfxPort_P02_4 = {&MODULE_P02, 4};
+IfxPort_Pin IfxPort_P02_5 = {&MODULE_P02, 5};
+IfxPort_Pin IfxPort_P02_6 = {&MODULE_P02, 6};
+IfxPort_Pin IfxPort_P02_7 = {&MODULE_P02, 7};
+IfxPort_Pin IfxPort_P02_8 = {&MODULE_P02, 8};
+IfxPort_Pin IfxPort_P10_0 = {&MODULE_P10, 0};
+IfxPort_Pin IfxPort_P10_1 = {&MODULE_P10, 1};
+IfxPort_Pin IfxPort_P10_2 = {&MODULE_P10, 2};
+IfxPort_Pin IfxPort_P10_3 = {&MODULE_P10, 3};
+IfxPort_Pin IfxPort_P10_4 = {&MODULE_P10, 4};
+IfxPort_Pin IfxPort_P10_5 = {&MODULE_P10, 5};
+IfxPort_Pin IfxPort_P10_6 = {&MODULE_P10, 6};
+IfxPort_Pin IfxPort_P10_7 = {&MODULE_P10, 7};
+IfxPort_Pin IfxPort_P10_8 = {&MODULE_P10, 8};
+IfxPort_Pin IfxPort_P11_10 = {&MODULE_P11,10};
+IfxPort_Pin IfxPort_P11_11 = {&MODULE_P11,11};
+IfxPort_Pin IfxPort_P11_12 = {&MODULE_P11,12};
+IfxPort_Pin IfxPort_P11_2 = {&MODULE_P11, 2};
+IfxPort_Pin IfxPort_P11_3 = {&MODULE_P11, 3};
+IfxPort_Pin IfxPort_P11_6 = {&MODULE_P11, 6};
+IfxPort_Pin IfxPort_P11_9 = {&MODULE_P11, 9};
+IfxPort_Pin IfxPort_P13_0 = {&MODULE_P13, 0};
+IfxPort_Pin IfxPort_P13_1 = {&MODULE_P13, 1};
+IfxPort_Pin IfxPort_P13_2 = {&MODULE_P13, 2};
+IfxPort_Pin IfxPort_P13_3 = {&MODULE_P13, 3};
+IfxPort_Pin IfxPort_P14_0 = {&MODULE_P14, 0};
+IfxPort_Pin IfxPort_P14_1 = {&MODULE_P14, 1};
+IfxPort_Pin IfxPort_P14_10 = {&MODULE_P14,10};
+IfxPort_Pin IfxPort_P14_2 = {&MODULE_P14, 2};
+IfxPort_Pin IfxPort_P14_3 = {&MODULE_P14, 3};
+IfxPort_Pin IfxPort_P14_4 = {&MODULE_P14, 4};
+IfxPort_Pin IfxPort_P14_5 = {&MODULE_P14, 5};
+IfxPort_Pin IfxPort_P14_6 = {&MODULE_P14, 6};
+IfxPort_Pin IfxPort_P14_7 = {&MODULE_P14, 7};
+IfxPort_Pin IfxPort_P14_8 = {&MODULE_P14, 8};
+IfxPort_Pin IfxPort_P14_9 = {&MODULE_P14, 9};
+IfxPort_Pin IfxPort_P15_0 = {&MODULE_P15, 0};
+IfxPort_Pin IfxPort_P15_1 = {&MODULE_P15, 1};
+IfxPort_Pin IfxPort_P15_2 = {&MODULE_P15, 2};
+IfxPort_Pin IfxPort_P15_3 = {&MODULE_P15, 3};
+IfxPort_Pin IfxPort_P15_4 = {&MODULE_P15, 4};
+IfxPort_Pin IfxPort_P15_5 = {&MODULE_P15, 5};
+IfxPort_Pin IfxPort_P15_6 = {&MODULE_P15, 6};
+IfxPort_Pin IfxPort_P15_7 = {&MODULE_P15, 7};
+IfxPort_Pin IfxPort_P15_8 = {&MODULE_P15, 8};
+IfxPort_Pin IfxPort_P20_0 = {&MODULE_P20, 0};
+IfxPort_Pin IfxPort_P20_1 = {&MODULE_P20, 1};
+IfxPort_Pin IfxPort_P20_10 = {&MODULE_P20,10};
+IfxPort_Pin IfxPort_P20_11 = {&MODULE_P20,11};
+IfxPort_Pin IfxPort_P20_12 = {&MODULE_P20,12};
+IfxPort_Pin IfxPort_P20_13 = {&MODULE_P20,13};
+IfxPort_Pin IfxPort_P20_14 = {&MODULE_P20,14};
+IfxPort_Pin IfxPort_P20_3 = {&MODULE_P20, 3};
+IfxPort_Pin IfxPort_P20_6 = {&MODULE_P20, 6};
+IfxPort_Pin IfxPort_P20_7 = {&MODULE_P20, 7};
+IfxPort_Pin IfxPort_P20_8 = {&MODULE_P20, 8};
+IfxPort_Pin IfxPort_P20_9 = {&MODULE_P20, 9};
+IfxPort_Pin IfxPort_P21_0 = {&MODULE_P21, 0};
+IfxPort_Pin IfxPort_P21_1 = {&MODULE_P21, 1};
+IfxPort_Pin IfxPort_P21_2 = {&MODULE_P21, 2};
+IfxPort_Pin IfxPort_P21_3 = {&MODULE_P21, 3};
+IfxPort_Pin IfxPort_P21_4 = {&MODULE_P21, 4};
+IfxPort_Pin IfxPort_P21_5 = {&MODULE_P21, 5};
+IfxPort_Pin IfxPort_P21_6 = {&MODULE_P21, 6};
+IfxPort_Pin IfxPort_P21_7 = {&MODULE_P21, 7};
+IfxPort_Pin IfxPort_P22_0 = {&MODULE_P22, 0};
+IfxPort_Pin IfxPort_P22_1 = {&MODULE_P22, 1};
+IfxPort_Pin IfxPort_P22_2 = {&MODULE_P22, 2};
+IfxPort_Pin IfxPort_P22_3 = {&MODULE_P22, 3};
+IfxPort_Pin IfxPort_P23_0 = {&MODULE_P23, 0};
+IfxPort_Pin IfxPort_P23_1 = {&MODULE_P23, 1};
+IfxPort_Pin IfxPort_P23_2 = {&MODULE_P23, 2};
+IfxPort_Pin IfxPort_P23_3 = {&MODULE_P23, 3};
+IfxPort_Pin IfxPort_P23_4 = {&MODULE_P23, 4};
+IfxPort_Pin IfxPort_P23_5 = {&MODULE_P23, 5};
+IfxPort_Pin IfxPort_P32_0 = {&MODULE_P32, 0};
+IfxPort_Pin IfxPort_P32_2 = {&MODULE_P32, 2};
+IfxPort_Pin IfxPort_P32_3 = {&MODULE_P32, 3};
+IfxPort_Pin IfxPort_P32_4 = {&MODULE_P32, 4};
+IfxPort_Pin IfxPort_P33_0 = {&MODULE_P33, 0};
+IfxPort_Pin IfxPort_P33_1 = {&MODULE_P33, 1};
+IfxPort_Pin IfxPort_P33_10 = {&MODULE_P33,10};
+IfxPort_Pin IfxPort_P33_11 = {&MODULE_P33,11};
+IfxPort_Pin IfxPort_P33_12 = {&MODULE_P33,12};
+IfxPort_Pin IfxPort_P33_13 = {&MODULE_P33,13};
+IfxPort_Pin IfxPort_P33_2 = {&MODULE_P33, 2};
+IfxPort_Pin IfxPort_P33_3 = {&MODULE_P33, 3};
+IfxPort_Pin IfxPort_P33_4 = {&MODULE_P33, 4};
+IfxPort_Pin IfxPort_P33_5 = {&MODULE_P33, 5};
+IfxPort_Pin IfxPort_P33_6 = {&MODULE_P33, 6};
+IfxPort_Pin IfxPort_P33_7 = {&MODULE_P33, 7};
+IfxPort_Pin IfxPort_P33_8 = {&MODULE_P33, 8};
+IfxPort_Pin IfxPort_P33_9 = {&MODULE_P33, 9};
+IfxPort_Pin IfxPort_P40_0 = {&MODULE_P40, 0};
+IfxPort_Pin IfxPort_P40_1 = {&MODULE_P40, 1};
+IfxPort_Pin IfxPort_P40_2 = {&MODULE_P40, 2};
+IfxPort_Pin IfxPort_P40_3 = {&MODULE_P40, 3};
+IfxPort_Pin IfxPort_P40_6 = {&MODULE_P40, 6};
+IfxPort_Pin IfxPort_P40_7 = {&MODULE_P40, 7};
+IfxPort_Pin IfxPort_P40_8 = {&MODULE_P40, 8};
+IfxPort_Pin IfxPort_P40_9 = {&MODULE_P40, 9};
+
+
+const IfxPort_Pin *IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS] = {
+ {
+ &IfxPort_P00_0,
+ &IfxPort_P00_1,
+ &IfxPort_P00_2,
+ &IfxPort_P00_3,
+ &IfxPort_P00_4,
+ &IfxPort_P00_5,
+ &IfxPort_P00_6,
+ &IfxPort_P00_7,
+ &IfxPort_P00_8,
+ &IfxPort_P00_9,
+ &IfxPort_P00_10,
+ &IfxPort_P00_11,
+ &IfxPort_P00_12,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P02_0,
+ &IfxPort_P02_1,
+ &IfxPort_P02_2,
+ &IfxPort_P02_3,
+ &IfxPort_P02_4,
+ &IfxPort_P02_5,
+ &IfxPort_P02_6,
+ &IfxPort_P02_7,
+ &IfxPort_P02_8,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P10_0,
+ &IfxPort_P10_1,
+ &IfxPort_P10_2,
+ &IfxPort_P10_3,
+ &IfxPort_P10_4,
+ &IfxPort_P10_5,
+ &IfxPort_P10_6,
+ &IfxPort_P10_7,
+ &IfxPort_P10_8,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ &IfxPort_P11_2,
+ &IfxPort_P11_3,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxPort_P11_6,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxPort_P11_9,
+ &IfxPort_P11_10,
+ &IfxPort_P11_11,
+ &IfxPort_P11_12,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P13_0,
+ &IfxPort_P13_1,
+ &IfxPort_P13_2,
+ &IfxPort_P13_3,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P14_0,
+ &IfxPort_P14_1,
+ &IfxPort_P14_2,
+ &IfxPort_P14_3,
+ &IfxPort_P14_4,
+ &IfxPort_P14_5,
+ &IfxPort_P14_6,
+ &IfxPort_P14_7,
+ &IfxPort_P14_8,
+ &IfxPort_P14_9,
+ &IfxPort_P14_10,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P15_0,
+ &IfxPort_P15_1,
+ &IfxPort_P15_2,
+ &IfxPort_P15_3,
+ &IfxPort_P15_4,
+ &IfxPort_P15_5,
+ &IfxPort_P15_6,
+ &IfxPort_P15_7,
+ &IfxPort_P15_8,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P20_0,
+ &IfxPort_P20_1,
+ NULL_PTR,
+ &IfxPort_P20_3,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxPort_P20_6,
+ &IfxPort_P20_7,
+ &IfxPort_P20_8,
+ &IfxPort_P20_9,
+ &IfxPort_P20_10,
+ &IfxPort_P20_11,
+ &IfxPort_P20_12,
+ &IfxPort_P20_13,
+ &IfxPort_P20_14
+ },
+ {
+ &IfxPort_P21_0,
+ &IfxPort_P21_1,
+ &IfxPort_P21_2,
+ &IfxPort_P21_3,
+ &IfxPort_P21_4,
+ &IfxPort_P21_5,
+ &IfxPort_P21_6,
+ &IfxPort_P21_7,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P22_0,
+ &IfxPort_P22_1,
+ &IfxPort_P22_2,
+ &IfxPort_P22_3,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P23_0,
+ &IfxPort_P23_1,
+ &IfxPort_P23_2,
+ &IfxPort_P23_3,
+ &IfxPort_P23_4,
+ &IfxPort_P23_5,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P32_0,
+ NULL_PTR,
+ &IfxPort_P32_2,
+ &IfxPort_P32_3,
+ &IfxPort_P32_4,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P33_0,
+ &IfxPort_P33_1,
+ &IfxPort_P33_2,
+ &IfxPort_P33_3,
+ &IfxPort_P33_4,
+ &IfxPort_P33_5,
+ &IfxPort_P33_6,
+ &IfxPort_P33_7,
+ &IfxPort_P33_8,
+ &IfxPort_P33_9,
+ &IfxPort_P33_10,
+ &IfxPort_P33_11,
+ &IfxPort_P33_12,
+ &IfxPort_P33_13,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxPort_P40_0,
+ &IfxPort_P40_1,
+ &IfxPort_P40_2,
+ &IfxPort_P40_3,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxPort_P40_6,
+ &IfxPort_P40_7,
+ &IfxPort_P40_8,
+ &IfxPort_P40_9,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPort_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPort_PinMap.h
new file mode 100644
index 0000000..f76b0ee
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPort_PinMap.h
@@ -0,0 +1,186 @@
+/**
+ * \file IfxPort_PinMap.h
+ * \brief PORT I/O map
+ * \ingroup IfxLld_Port
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Port_pinmap PORT Pin Mapping
+ * \ingroup IfxLld_Port
+ */
+
+#ifndef IFXPORT_PINMAP_H
+#define IFXPORT_PINMAP_H
+
+#include
+
+/** \addtogroup IfxLld_Port_pinmap
+ * \{ */
+
+
+IFX_EXTERN IfxPort_Pin IfxPort_P00_0; /**< \brief IfxPort_P00_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_1; /**< \brief IfxPort_P00_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_10; /**< \brief IfxPort_P00_10 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_11; /**< \brief IfxPort_P00_11 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_12; /**< \brief IfxPort_P00_12 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_2; /**< \brief IfxPort_P00_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_3; /**< \brief IfxPort_P00_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_4; /**< \brief IfxPort_P00_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_5; /**< \brief IfxPort_P00_5 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_6; /**< \brief IfxPort_P00_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_7; /**< \brief IfxPort_P00_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_8; /**< \brief IfxPort_P00_8 */
+IFX_EXTERN IfxPort_Pin IfxPort_P00_9; /**< \brief IfxPort_P00_9 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_0; /**< \brief IfxPort_P02_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_1; /**< \brief IfxPort_P02_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_2; /**< \brief IfxPort_P02_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_3; /**< \brief IfxPort_P02_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_4; /**< \brief IfxPort_P02_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_5; /**< \brief IfxPort_P02_5 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_6; /**< \brief IfxPort_P02_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_7; /**< \brief IfxPort_P02_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P02_8; /**< \brief IfxPort_P02_8 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_0; /**< \brief IfxPort_P10_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_1; /**< \brief IfxPort_P10_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_2; /**< \brief IfxPort_P10_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_3; /**< \brief IfxPort_P10_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_4; /**< \brief IfxPort_P10_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_5; /**< \brief IfxPort_P10_5 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_6; /**< \brief IfxPort_P10_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_7; /**< \brief IfxPort_P10_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P10_8; /**< \brief IfxPort_P10_8 */
+IFX_EXTERN IfxPort_Pin IfxPort_P11_10; /**< \brief IfxPort_P11_10 */
+IFX_EXTERN IfxPort_Pin IfxPort_P11_11; /**< \brief IfxPort_P11_11 */
+IFX_EXTERN IfxPort_Pin IfxPort_P11_12; /**< \brief IfxPort_P11_12 */
+IFX_EXTERN IfxPort_Pin IfxPort_P11_2; /**< \brief IfxPort_P11_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P11_3; /**< \brief IfxPort_P11_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P11_6; /**< \brief IfxPort_P11_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P11_9; /**< \brief IfxPort_P11_9 */
+IFX_EXTERN IfxPort_Pin IfxPort_P13_0; /**< \brief IfxPort_P13_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P13_1; /**< \brief IfxPort_P13_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P13_2; /**< \brief IfxPort_P13_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P13_3; /**< \brief IfxPort_P13_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_0; /**< \brief IfxPort_P14_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_1; /**< \brief IfxPort_P14_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_10; /**< \brief IfxPort_P14_10 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_2; /**< \brief IfxPort_P14_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_3; /**< \brief IfxPort_P14_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_4; /**< \brief IfxPort_P14_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_5; /**< \brief IfxPort_P14_5 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_6; /**< \brief IfxPort_P14_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_7; /**< \brief IfxPort_P14_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_8; /**< \brief IfxPort_P14_8 */
+IFX_EXTERN IfxPort_Pin IfxPort_P14_9; /**< \brief IfxPort_P14_9 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_0; /**< \brief IfxPort_P15_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_1; /**< \brief IfxPort_P15_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_2; /**< \brief IfxPort_P15_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_3; /**< \brief IfxPort_P15_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_4; /**< \brief IfxPort_P15_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_5; /**< \brief IfxPort_P15_5 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_6; /**< \brief IfxPort_P15_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_7; /**< \brief IfxPort_P15_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P15_8; /**< \brief IfxPort_P15_8 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_0; /**< \brief IfxPort_P20_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_1; /**< \brief IfxPort_P20_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_10; /**< \brief IfxPort_P20_10 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_11; /**< \brief IfxPort_P20_11 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_12; /**< \brief IfxPort_P20_12 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_13; /**< \brief IfxPort_P20_13 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_14; /**< \brief IfxPort_P20_14 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_3; /**< \brief IfxPort_P20_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_6; /**< \brief IfxPort_P20_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_7; /**< \brief IfxPort_P20_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_8; /**< \brief IfxPort_P20_8 */
+IFX_EXTERN IfxPort_Pin IfxPort_P20_9; /**< \brief IfxPort_P20_9 */
+IFX_EXTERN IfxPort_Pin IfxPort_P21_0; /**< \brief IfxPort_P21_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P21_1; /**< \brief IfxPort_P21_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P21_2; /**< \brief IfxPort_P21_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P21_3; /**< \brief IfxPort_P21_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P21_4; /**< \brief IfxPort_P21_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P21_5; /**< \brief IfxPort_P21_5 */
+IFX_EXTERN IfxPort_Pin IfxPort_P21_6; /**< \brief IfxPort_P21_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P21_7; /**< \brief IfxPort_P21_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P22_0; /**< \brief IfxPort_P22_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P22_1; /**< \brief IfxPort_P22_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P22_2; /**< \brief IfxPort_P22_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P22_3; /**< \brief IfxPort_P22_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P23_0; /**< \brief IfxPort_P23_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P23_1; /**< \brief IfxPort_P23_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P23_2; /**< \brief IfxPort_P23_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P23_3; /**< \brief IfxPort_P23_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P23_4; /**< \brief IfxPort_P23_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P23_5; /**< \brief IfxPort_P23_5 */
+IFX_EXTERN IfxPort_Pin IfxPort_P32_0; /**< \brief IfxPort_P32_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P32_2; /**< \brief IfxPort_P32_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P32_3; /**< \brief IfxPort_P32_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P32_4; /**< \brief IfxPort_P32_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_0; /**< \brief IfxPort_P33_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_1; /**< \brief IfxPort_P33_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_10; /**< \brief IfxPort_P33_10 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_11; /**< \brief IfxPort_P33_11 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_12; /**< \brief IfxPort_P33_12 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_13; /**< \brief IfxPort_P33_13 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_2; /**< \brief IfxPort_P33_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_3; /**< \brief IfxPort_P33_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_4; /**< \brief IfxPort_P33_4 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_5; /**< \brief IfxPort_P33_5 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_6; /**< \brief IfxPort_P33_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_7; /**< \brief IfxPort_P33_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_8; /**< \brief IfxPort_P33_8 */
+IFX_EXTERN IfxPort_Pin IfxPort_P33_9; /**< \brief IfxPort_P33_9 */
+IFX_EXTERN IfxPort_Pin IfxPort_P40_0; /**< \brief IfxPort_P40_0 */
+IFX_EXTERN IfxPort_Pin IfxPort_P40_1; /**< \brief IfxPort_P40_1 */
+IFX_EXTERN IfxPort_Pin IfxPort_P40_2; /**< \brief IfxPort_P40_2 */
+IFX_EXTERN IfxPort_Pin IfxPort_P40_3; /**< \brief IfxPort_P40_3 */
+IFX_EXTERN IfxPort_Pin IfxPort_P40_6; /**< \brief IfxPort_P40_6 */
+IFX_EXTERN IfxPort_Pin IfxPort_P40_7; /**< \brief IfxPort_P40_7 */
+IFX_EXTERN IfxPort_Pin IfxPort_P40_8; /**< \brief IfxPort_P40_8 */
+IFX_EXTERN IfxPort_Pin IfxPort_P40_9; /**< \brief IfxPort_P40_9 */
+
+/** \brief Table dimensions */
+#define IFXPORT_PINMAP_NUM_MODULES 41
+#define IFXPORT_PINMAP_PIN_NUM_ITEMS 15
+
+
+/** \brief IfxPort_Pin table */
+IFX_EXTERN const IfxPort_Pin *IfxPort_Pin_pinTable[IFXPORT_PINMAP_NUM_MODULES][IFXPORT_PINMAP_PIN_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXPORT_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5_PinMap.c
new file mode 100644
index 0000000..f9b586b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5_PinMap.c
@@ -0,0 +1,106 @@
+/**
+ * \file IfxPsi5_PinMap.c
+ * \brief PSI5 I/O map
+ * \ingroup IfxLld_Psi5
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxPsi5_PinMap.h"
+
+IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_a};
+IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 3}, Ifx_RxSel_b};
+IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 1}, Ifx_RxSel_c};
+IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 3}, Ifx_RxSel_a};
+IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 5}, Ifx_RxSel_b};
+IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 3}, Ifx_RxSel_c};
+IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 5}, Ifx_RxSel_a};
+IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 7}, Ifx_RxSel_b};
+IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 5}, Ifx_RxSel_c};
+IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P00, 2}, IfxPort_OutputIdx_alt4};
+IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt4};
+IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_0, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt4};
+IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt4};
+IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt4};
+IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_1, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt4};
+IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt4};
+IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt4};
+IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT = {&MODULE_PSI5, IfxPsi5_ChannelId_2, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt4};
+
+
+const IfxPsi5_Rx_In *IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxPsi5_RX0A_P00_1_IN,
+ &IfxPsi5_RX0B_P02_3_IN,
+ &IfxPsi5_RX0C_P33_1_IN
+ },
+ {
+ &IfxPsi5_RX1A_P00_3_IN,
+ &IfxPsi5_RX1B_P02_5_IN,
+ &IfxPsi5_RX1C_P33_3_IN
+ },
+ {
+ &IfxPsi5_RX2A_P00_5_IN,
+ &IfxPsi5_RX2B_P02_7_IN,
+ &IfxPsi5_RX2C_P33_5_IN
+ }
+ }
+};
+
+const IfxPsi5_Tx_Out *IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxPsi5_TX0_P00_2_OUT,
+ &IfxPsi5_TX0_P02_2_OUT,
+ &IfxPsi5_TX0_P33_2_OUT
+ },
+ {
+ &IfxPsi5_TX1_P00_4_OUT,
+ &IfxPsi5_TX1_P02_6_OUT,
+ &IfxPsi5_TX1_P33_4_OUT
+ },
+ {
+ &IfxPsi5_TX2_P00_6_OUT,
+ &IfxPsi5_TX2_P02_8_OUT,
+ &IfxPsi5_TX2_P33_6_OUT
+ }
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5_PinMap.h
new file mode 100644
index 0000000..c4b6231
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5_PinMap.h
@@ -0,0 +1,110 @@
+/**
+ * \file IfxPsi5_PinMap.h
+ * \brief PSI5 I/O map
+ * \ingroup IfxLld_Psi5
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Psi5_pinmap PSI5 Pin Mapping
+ * \ingroup IfxLld_Psi5
+ */
+
+#ifndef IFXPSI5_PINMAP_H
+#define IFXPSI5_PINMAP_H
+
+#include
+#include <_Impl/IfxPsi5_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Psi5_pinmap
+ * \{ */
+
+/** \brief RX pin mapping structure */
+typedef const struct
+{
+ Ifx_PSI5* module; /**< \brief Base address */
+ IfxPsi5_ChannelId channelId; /**< \brief Channel ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxPsi5_Rx_In;
+
+/** \brief TX pin mapping structure */
+typedef const struct
+{
+ Ifx_PSI5* module; /**< \brief Base address */
+ IfxPsi5_ChannelId channelId; /**< \brief Channel ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxPsi5_Tx_Out;
+
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0A_P00_1_IN; /**< \brief PSI5_RX0A: PSI5 input */
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0B_P02_3_IN; /**< \brief PSI5_RX0B: PSI5 input */
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX0C_P33_1_IN; /**< \brief PSI5_RX0C: PSI5 input */
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1A_P00_3_IN; /**< \brief PSI5_RX1A: PSI5 input */
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1B_P02_5_IN; /**< \brief PSI5_RX1B: PSI5 input */
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX1C_P33_3_IN; /**< \brief PSI5_RX1C: PSI5 input */
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2A_P00_5_IN; /**< \brief PSI5_RX2A: PSI5 input */
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2B_P02_7_IN; /**< \brief PSI5_RX2B: PSI5 input */
+IFX_EXTERN IfxPsi5_Rx_In IfxPsi5_RX2C_P33_5_IN; /**< \brief PSI5_RX2C: PSI5 input */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P00_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P02_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX0_P33_2_OUT; /**< \brief PSI5_TX0: PSI5 output */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P00_4_OUT; /**< \brief PSI5_TX1: PSI5 output */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P02_6_OUT; /**< \brief PSI5_TX1: PSI5 output */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX1_P33_4_OUT; /**< \brief PSI5_TX1: PSI5 output */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P00_6_OUT; /**< \brief PSI5_TX2: PSI5 output */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P02_8_OUT; /**< \brief PSI5_TX2: PSI5 output */
+IFX_EXTERN IfxPsi5_Tx_Out IfxPsi5_TX2_P33_6_OUT; /**< \brief PSI5_TX2: PSI5 output */
+
+/** \brief Table dimensions */
+#define IFXPSI5_PINMAP_NUM_MODULES 1
+#define IFXPSI5_PINMAP_NUM_CHANNELS 3
+#define IFXPSI5_PINMAP_RX_IN_NUM_ITEMS 3
+#define IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS 3
+
+
+/** \brief IfxPsi5_Rx_In table */
+IFX_EXTERN const IfxPsi5_Rx_In *IfxPsi5_Rx_In_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_RX_IN_NUM_ITEMS];
+
+/** \brief IfxPsi5_Tx_Out table */
+IFX_EXTERN const IfxPsi5_Tx_Out *IfxPsi5_Tx_Out_pinTable[IFXPSI5_PINMAP_NUM_MODULES][IFXPSI5_PINMAP_NUM_CHANNELS][IFXPSI5_PINMAP_TX_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXPSI5_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5s_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5s_PinMap.c
new file mode 100644
index 0000000..b0bcdb1
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5s_PinMap.c
@@ -0,0 +1,79 @@
+/**
+ * \file IfxPsi5s_PinMap.c
+ * \brief PSI5S I/O map
+ * \ingroup IfxLld_Psi5s
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxPsi5s_PinMap.h"
+
+IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT = {&MODULE_PSI5S, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt4};
+IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT = {&MODULE_PSI5S, {&MODULE_P33,10}, IfxPort_OutputIdx_alt5};
+IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN = {&MODULE_PSI5S, {&MODULE_P00, 3}, Ifx_RxSel_a};
+IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN = {&MODULE_PSI5S, {&MODULE_P02, 5}, Ifx_RxSel_b};
+IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN = {&MODULE_PSI5S, {&MODULE_P33, 5}, Ifx_RxSel_c};
+IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT = {&MODULE_PSI5S, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt2};
+IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT = {&MODULE_PSI5S, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt2};
+IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT = {&MODULE_PSI5S, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt7};
+
+
+const IfxPsi5s_Clk_Out *IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS] = {
+ {
+ &IfxPsi5s_CLK_P02_4_OUT,
+ &IfxPsi5s_CLK_P33_10_OUT
+ }
+};
+
+const IfxPsi5s_Rx_In *IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS] = {
+ {
+ &IfxPsi5s_RXA_P00_3_IN,
+ &IfxPsi5s_RXB_P02_5_IN,
+ &IfxPsi5s_RXC_P33_5_IN
+ }
+};
+
+const IfxPsi5s_Tx_Out *IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS] = {
+ {
+ &IfxPsi5s_TX_P00_4_OUT,
+ &IfxPsi5s_TX_P02_6_OUT,
+ &IfxPsi5s_TX_P33_6_OUT
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5s_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5s_PinMap.h
new file mode 100644
index 0000000..511adb5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxPsi5s_PinMap.h
@@ -0,0 +1,109 @@
+/**
+ * \file IfxPsi5s_PinMap.h
+ * \brief PSI5S I/O map
+ * \ingroup IfxLld_Psi5s
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Psi5s_pinmap PSI5S Pin Mapping
+ * \ingroup IfxLld_Psi5s
+ */
+
+#ifndef IFXPSI5S_PINMAP_H
+#define IFXPSI5S_PINMAP_H
+
+#include
+#include <_Impl/IfxPsi5s_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Psi5s_pinmap
+ * \{ */
+
+/** \brief RX pin mapping structure */
+typedef const struct
+{
+ Ifx_PSI5S* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxPsi5s_Rx_In;
+
+/** \brief TX pin mapping structure */
+typedef const struct
+{
+ Ifx_PSI5S* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxPsi5s_Tx_Out;
+
+/** \brief CLK pin mapping structure */
+typedef const struct
+{
+ Ifx_PSI5S* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxPsi5s_Clk_Out;
+
+IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P02_4_OUT; /**< \brief PSI5S_CLK: PSI5-S output */
+IFX_EXTERN IfxPsi5s_Clk_Out IfxPsi5s_CLK_P33_10_OUT; /**< \brief PSI5S_CLK: PSI5-S output */
+IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXA_P00_3_IN; /**< \brief PSI5S_RXA: PSI5-S input */
+IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXB_P02_5_IN; /**< \brief PSI5S_RXB: PSI5-S input */
+IFX_EXTERN IfxPsi5s_Rx_In IfxPsi5s_RXC_P33_5_IN; /**< \brief PSI5S_RXC: PSI5-S input */
+IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P00_4_OUT; /**< \brief PSI5S_TX: PSI5-S output */
+IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P02_6_OUT; /**< \brief PSI5S_TX: PSI5-S output */
+IFX_EXTERN IfxPsi5s_Tx_Out IfxPsi5s_TX_P33_6_OUT; /**< \brief PSI5S_TX: PSI5-S output */
+
+/** \brief Table dimensions */
+#define IFXPSI5S_PINMAP_NUM_MODULES 1
+#define IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS 2
+#define IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS 3
+#define IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS 3
+
+
+/** \brief IfxPsi5s_Clk_Out table */
+IFX_EXTERN const IfxPsi5s_Clk_Out *IfxPsi5s_Clk_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_CLK_OUT_NUM_ITEMS];
+
+/** \brief IfxPsi5s_Rx_In table */
+IFX_EXTERN const IfxPsi5s_Rx_In *IfxPsi5s_Rx_In_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_RX_IN_NUM_ITEMS];
+
+/** \brief IfxPsi5s_Tx_Out table */
+IFX_EXTERN const IfxPsi5s_Tx_Out *IfxPsi5s_Tx_Out_pinTable[IFXPSI5S_PINMAP_NUM_MODULES][IFXPSI5S_PINMAP_TX_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXPSI5S_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxQspi_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxQspi_PinMap.c
new file mode 100644
index 0000000..9dc4d88
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxQspi_PinMap.c
@@ -0,0 +1,658 @@
+/**
+ * \file IfxQspi_PinMap.c
+ * \brief QSPI I/O map
+ * \ingroup IfxLld_Qspi
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxQspi_PinMap.h"
+
+IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a};
+IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_b};
+IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN = {&MODULE_QSPI3, {&MODULE_P33, 9}, Ifx_RxSel_a};
+IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_b};
+IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a};
+IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a};
+IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b};
+IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a};
+IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b};
+IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c};
+IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c};
+IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e};
+IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a};
+IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b};
+IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN = {&MODULE_QSPI3, {&MODULE_P33,13}, Ifx_RxSel_d};
+IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN = {&MODULE_QSPI3, {&MODULE_P22, 1}, Ifx_RxSel_e};
+IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN = {&MODULE_QSPI3, {&MODULE_P21, 2}, Ifx_RxSel_f};
+IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN = {&MODULE_QSPI3, {&MODULE_P21, 3}, Ifx_RxSel_f};
+IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT = {&MODULE_QSPI1, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt6};
+IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT = {&MODULE_QSPI1, {&MODULE_P11, 3}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT = {&MODULE_QSPI2, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT = {&MODULE_QSPI2, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT = {&MODULE_QSPI3, {&MODULE_P02, 5}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT = {&MODULE_QSPI3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT = {&MODULE_QSPI3, {&MODULE_P33,13}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a};
+IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a};
+IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b};
+IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c};
+IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a};
+IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b};
+IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a};
+IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b};
+IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN = {&MODULE_QSPI3, {&MODULE_P33,12}, Ifx_RxSel_d};
+IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN = {&MODULE_QSPI3, {&MODULE_P22, 0}, Ifx_RxSel_e};
+IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT = {&MODULE_QSPI0, {&MODULE_P20,12}, IfxPort_OutputIdx_alt4};
+IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT = {&MODULE_QSPI0, {&MODULE_P20,14}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT = {&MODULE_QSPI1, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt2};
+IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT = {&MODULE_QSPI1, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT = {&MODULE_QSPI1, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt4};
+IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT = {&MODULE_QSPI1, {&MODULE_P11, 9}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT = {&MODULE_QSPI2, {&MODULE_P13, 2}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT = {&MODULE_QSPI2, {&MODULE_P13, 3}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT = {&MODULE_QSPI2, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT = {&MODULE_QSPI3, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt4};
+IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt4};
+IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT = {&MODULE_QSPI3, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT = {&MODULE_QSPI3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt3};
+IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT = {&MODULE_QSPI3, {&MODULE_P33,12}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a};
+IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a};
+IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b};
+IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a};
+IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b};
+IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a};
+IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b};
+IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN = {&MODULE_QSPI3, {&MODULE_P33,11}, Ifx_RxSel_d};
+IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN = {&MODULE_QSPI3, {&MODULE_P22, 3}, Ifx_RxSel_e};
+IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT = {&MODULE_QSPI0, {&MODULE_P20,11}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT = {&MODULE_QSPI0, {&MODULE_P20,13}, IfxPort_OutputIdx_alt5};
+IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT = {&MODULE_QSPI1, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT = {&MODULE_QSPI1, {&MODULE_P11, 6}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT = {&MODULE_QSPI2, {&MODULE_P13, 0}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT = {&MODULE_QSPI2, {&MODULE_P13, 1}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT = {&MODULE_QSPI2, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT = {&MODULE_QSPI2, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt5};
+IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT = {&MODULE_QSPI2, {&MODULE_P15, 8}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT = {&MODULE_QSPI3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt4};
+IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT = {&MODULE_QSPI3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt4};
+IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT = {&MODULE_QSPI3, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT = {&MODULE_QSPI3, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT = {&MODULE_QSPI3, {&MODULE_P22, 3}, IfxPort_OutputIdx_alt3};
+IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT = {&MODULE_QSPI3, {&MODULE_P33,11}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a};
+IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b};
+IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a};
+IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a};
+IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b};
+IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a};
+IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_c};
+IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN = {&MODULE_QSPI3, {&MODULE_P22, 2}, Ifx_RxSel_d};
+IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2};
+IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2};
+IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4};
+IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT = {&MODULE_QSPI3, 11, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT = {&MODULE_QSPI3, 12, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT = {&MODULE_QSPI3, 13, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT = {&MODULE_QSPI3, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT = {&MODULE_QSPI3, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT = {&MODULE_QSPI3, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2};
+IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT = {&MODULE_QSPI3, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2};
+IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2};
+IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT = {&MODULE_QSPI3, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3};
+IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3};
+
+
+const IfxQspi_Hsicin_In *IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS] = {
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_HSICINA_P15_2_IN,
+ &IfxQspi2_HSICINB_P15_3_IN
+ },
+ {
+ &IfxQspi3_HSICINA_P33_9_IN,
+ &IfxQspi3_HSICINB_P33_10_IN
+ }
+};
+
+const IfxQspi_Mrst_In *IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS] = {
+ {
+ &IfxQspi0_MRSTA_P20_12_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_MRSTA_P10_1_IN,
+ &IfxQspi1_MRSTB_P11_3_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_MRSTA_P15_4_IN,
+ &IfxQspi2_MRSTB_P15_7_IN,
+ &IfxQspi2_MRSTCN_P21_2_IN,
+ NULL_PTR,
+ &IfxQspi2_MRSTE_P15_2_IN,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_MRSTA_P02_5_IN,
+ &IfxQspi3_MRSTB_P10_7_IN,
+ NULL_PTR,
+ &IfxQspi3_MRSTD_P33_13_IN,
+ &IfxQspi3_MRSTE_P22_1_IN,
+ &IfxQspi3_MRSTFN_P21_2_IN
+ }
+};
+
+const IfxQspi_Mrst_Out *IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS] = {
+ {
+ &IfxQspi0_MRST_P20_12_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_MRST_P10_1_OUT,
+ &IfxQspi1_MRST_P10_6_OUT,
+ &IfxQspi1_MRST_P11_3_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_MRST_P15_4_OUT,
+ &IfxQspi2_MRST_P15_7_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_MRST_P02_5_OUT,
+ &IfxQspi3_MRST_P10_7_OUT,
+ &IfxQspi3_MRST_P22_1_OUT,
+ &IfxQspi3_MRST_P33_13_OUT
+ }
+};
+
+const IfxQspi_Mtsr_In *IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS] = {
+ {
+ &IfxQspi0_MTSRA_P20_14_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_MTSRA_P10_3_IN,
+ &IfxQspi1_MTSRB_P11_9_IN,
+ &IfxQspi1_MTSRC_P10_4_IN,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_MTSRA_P15_5_IN,
+ &IfxQspi2_MTSRB_P15_6_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_MTSRA_P02_6_IN,
+ &IfxQspi3_MTSRB_P10_6_IN,
+ NULL_PTR,
+ &IfxQspi3_MTSRD_P33_12_IN,
+ &IfxQspi3_MTSRE_P22_0_IN
+ }
+};
+
+const IfxQspi_Mtsr_Out *IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS] = {
+ {
+ &IfxQspi0_MTSR_P20_12_OUT,
+ &IfxQspi0_MTSR_P20_14_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_MTSR_P10_1_OUT,
+ &IfxQspi1_MTSR_P10_3_OUT,
+ &IfxQspi1_MTSR_P10_4_OUT,
+ &IfxQspi1_MTSR_P11_9_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_MTSRN_P13_2_OUT,
+ &IfxQspi2_MTSRP_P13_3_OUT,
+ &IfxQspi2_MTSR_P15_5_OUT,
+ &IfxQspi2_MTSR_P15_6_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_MTSR_P02_6_OUT,
+ &IfxQspi3_MTSR_P10_6_OUT,
+ &IfxQspi3_MTSR_P22_0_OUT,
+ &IfxQspi3_MTSRN_P22_2_OUT,
+ &IfxQspi3_MTSRP_P22_3_OUT,
+ &IfxQspi3_MTSR_P33_12_OUT
+ }
+};
+
+const IfxQspi_Sclk_In *IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS] = {
+ {
+ &IfxQspi0_SCLKA_P20_11_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SCLKA_P10_2_IN,
+ &IfxQspi1_SCLKB_P11_6_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SCLKA_P15_3_IN,
+ &IfxQspi2_SCLKB_P15_8_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SCLKA_P02_7_IN,
+ &IfxQspi3_SCLKB_P10_8_IN,
+ NULL_PTR,
+ &IfxQspi3_SCLKD_P33_11_IN,
+ &IfxQspi3_SCLKE_P22_3_IN
+ }
+};
+
+const IfxQspi_Sclk_Out *IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS] = {
+ {
+ &IfxQspi0_SCLK_P20_11_OUT,
+ &IfxQspi0_SCLK_P20_13_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SCLK_P10_2_OUT,
+ &IfxQspi1_SCLK_P11_6_OUT,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SCLKN_P13_0_OUT,
+ &IfxQspi2_SCLKP_P13_1_OUT,
+ &IfxQspi2_SCLK_P15_3_OUT,
+ &IfxQspi2_SCLK_P15_6_OUT,
+ &IfxQspi2_SCLK_P15_8_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SCLK_P02_7_OUT,
+ &IfxQspi3_SCLK_P10_8_OUT,
+ &IfxQspi3_SCLKN_P22_0_OUT,
+ &IfxQspi3_SCLKP_P22_1_OUT,
+ &IfxQspi3_SCLK_P22_3_OUT,
+ &IfxQspi3_SCLK_P33_11_OUT
+ }
+};
+
+const IfxQspi_Slsi_In *IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS] = {
+ {
+ &IfxQspi0_SLSIA_P20_13_IN,
+ &IfxQspi0_SLSIB_P20_9_IN,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSIA_P11_10_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSIA_P15_2_IN,
+ &IfxQspi2_SLSIB_P15_1_IN,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SLSIA_P02_4_IN,
+ NULL_PTR,
+ &IfxQspi3_SLSIC_P33_10_IN,
+ &IfxQspi3_SLSID_P22_2_IN
+ }
+};
+
+const IfxQspi_Slso_Out *IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxQspi0_SLSO0_P20_8_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO1_P20_9_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO2_P20_13_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO3_P11_10_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO4_P11_11_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO5_P11_2_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO6_P20_10_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO7_P33_5_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO8_P20_6_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO9_P20_3_OUT,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi0_SLSO13_P15_0_OUT,
+ NULL_PTR
+ }
+ },
+ {
+ {
+ &IfxQspi1_SLSO0_P20_8_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO1_P20_9_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO2_P20_13_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO3_P11_10_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO4_P11_11_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO5_P11_2_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO6_P33_10_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO7_P33_5_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO8_P10_4_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO9_P10_5_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi1_SLSO10_P10_0_OUT,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ }
+ },
+ {
+ {
+ &IfxQspi2_SLSO0_P15_2_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO1_P14_2_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO2_P14_6_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO3_P14_3_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO4_P14_7_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO5_P15_1_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO6_P33_13_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO7_P20_10_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO8_P20_6_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi2_SLSO9_P20_3_OUT,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ }
+ },
+ {
+ {
+ &IfxQspi3_SLSO0_P02_4_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SLSO1_P02_0_OUT,
+ &IfxQspi3_SLSO1_P33_9_OUT
+ },
+ {
+ &IfxQspi3_SLSO2_P02_1_OUT,
+ &IfxQspi3_SLSO2_P33_8_OUT
+ },
+ {
+ &IfxQspi3_SLSO3_P02_2_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SLSO4_P02_3_OUT,
+ &IfxQspi3_SLSO4_P23_5_OUT
+ },
+ {
+ &IfxQspi3_SLSO5_P02_8_OUT,
+ &IfxQspi3_SLSO5_P23_4_OUT
+ },
+ {
+ &IfxQspi3_SLSO6_P00_8_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SLSO7_P00_9_OUT,
+ &IfxQspi3_SLSO7_P33_7_OUT
+ },
+ {
+ &IfxQspi3_SLSO8_P10_5_OUT,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SLSO11_P33_10_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SLSO12_P22_2_OUT,
+ NULL_PTR
+ },
+ {
+ &IfxQspi3_SLSO13_P23_1_OUT,
+ NULL_PTR
+ }
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxQspi_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxQspi_PinMap.h
new file mode 100644
index 0000000..c5483c7
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxQspi_PinMap.h
@@ -0,0 +1,310 @@
+/**
+ * \file IfxQspi_PinMap.h
+ * \brief QSPI I/O map
+ * \ingroup IfxLld_Qspi
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Qspi_pinmap QSPI Pin Mapping
+ * \ingroup IfxLld_Qspi
+ */
+
+#ifndef IFXQSPI_PINMAP_H
+#define IFXQSPI_PINMAP_H
+
+#include
+#include <_Impl/IfxQspi_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Qspi_pinmap
+ * \{ */
+
+/** \brief MRST pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxQspi_Mrst_In;
+
+/** \brief MTSR pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxQspi_Mtsr_In;
+
+/** \brief SCLK pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxQspi_Sclk_In;
+
+/** \brief SLSI pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxQspi_Slsi_In;
+
+/** \brief HSICIN pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxQspi_Hsicin_In;
+
+/** \brief MRST pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxQspi_Mrst_Out;
+
+/** \brief MTSR pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxQspi_Mtsr_Out;
+
+/** \brief SCLK pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxQspi_Sclk_Out;
+
+/** \brief SLSO pin mapping structure */
+typedef const struct
+{
+ Ifx_QSPI* module; /**< \brief Base address */
+ sint32 slsoNr; /**< \brief Slave Select */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxQspi_Slso_Out;
+
+IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINA_P15_2_IN; /**< \brief QSPI2_HSICINA: QSPI2 input */
+IFX_EXTERN IfxQspi_Hsicin_In IfxQspi2_HSICINB_P15_3_IN; /**< \brief QSPI2_HSICINB: QSPI2 input */
+IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINA_P33_9_IN; /**< \brief QSPI3_HSICINA: QSPI3 input */
+IFX_EXTERN IfxQspi_Hsicin_In IfxQspi3_HSICINB_P33_10_IN; /**< \brief QSPI3_HSICINB: QSPI3 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN; /**< \brief QSPI0_MRSTA: QSPI0 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN; /**< \brief QSPI1_MRSTA: QSPI1 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN; /**< \brief QSPI1_MRSTB: QSPI1 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN; /**< \brief QSPI2_MRSTA: QSPI2 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN; /**< \brief QSPI2_MRSTB: QSPI2 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN; /**< \brief QSPI2_MRSTCN: QSPI2 input (LVDS) */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN; /**< \brief QSPI2_MRSTCP: QSPI2 input (LVDS) */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN; /**< \brief QSPI2_MRSTE: QSPI2 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN; /**< \brief QSPI3_MRSTA: QSPI3 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN; /**< \brief QSPI3_MRSTB: QSPI3 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN; /**< \brief QSPI3_MRSTD: QSPI3 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN; /**< \brief QSPI3_MRSTE: QSPI3 input */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN; /**< \brief QSPI3_MRSTFN: QSPI3 input (LVDS) */
+IFX_EXTERN IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN; /**< \brief QSPI3_MRSTFP: QSPI3 input (LVDS) */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi0_MRST_P20_12_OUT; /**< \brief QSPI0_MRST: QSPI0 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_1_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P10_6_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi1_MRST_P11_3_OUT; /**< \brief QSPI1_MRST: QSPI1 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_4_OUT; /**< \brief QSPI2_MRST: QSPI2 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi2_MRST_P15_7_OUT; /**< \brief QSPI2_MRST: QSPI2 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P02_5_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P10_7_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P22_1_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
+IFX_EXTERN IfxQspi_Mrst_Out IfxQspi3_MRST_P33_13_OUT; /**< \brief QSPI3_MRST: QSPI3 output */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN; /**< \brief QSPI0_MTSRA: QSPI0 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN; /**< \brief QSPI1_MTSRA: QSPI1 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN; /**< \brief QSPI1_MTSRB: QSPI1 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN; /**< \brief QSPI1_MTSRC: QSPI1 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN; /**< \brief QSPI2_MTSRA: QSPI2 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN; /**< \brief QSPI2_MTSRB: QSPI2 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN; /**< \brief QSPI3_MTSRA: QSPI3 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN; /**< \brief QSPI3_MTSRB: QSPI3 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN; /**< \brief QSPI3_MTSRD: QSPI3 input */
+IFX_EXTERN IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN; /**< \brief QSPI3_MTSRE: QSPI3 input */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_12_OUT; /**< \brief QSPI0_MTSR: QSPI0 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi0_MTSR_P20_14_OUT; /**< \brief QSPI0_MTSR: QSPI0 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_1_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_3_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P10_4_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi1_MTSR_P11_9_OUT; /**< \brief QSPI1_MTSR: QSPI1 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRN_P13_2_OUT; /**< \brief QSPI2_MTSRN: QSPI2 output (LVDS) */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSRP_P13_3_OUT; /**< \brief QSPI2_MTSRP: QSPI2 output (LVDS) */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_5_OUT; /**< \brief QSPI2_MTSR: QSPI2 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi2_MTSR_P15_6_OUT; /**< \brief QSPI2_MTSR: QSPI2 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRN_P22_2_OUT; /**< \brief QSPI3_MTSRN: QSPI3 output (LVDS) */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSRP_P22_3_OUT; /**< \brief QSPI3_MTSRP: QSPI3 output (LVDS) */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P02_6_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P10_6_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P22_0_OUT; /**< \brief QSPI3_MTSR: QSPI3 output (LVDS) */
+IFX_EXTERN IfxQspi_Mtsr_Out IfxQspi3_MTSR_P33_12_OUT; /**< \brief QSPI3_MTSR: QSPI3 output */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN; /**< \brief QSPI0_SCLKA: QSPI0 input */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN; /**< \brief QSPI1_SCLKA: QSPI1 input */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN; /**< \brief QSPI1_SCLKB: QSPI1 input */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN; /**< \brief QSPI2_SCLKA: QSPI2 input */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN; /**< \brief QSPI2_SCLKB: QSPI2 input */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN; /**< \brief QSPI3_SCLKA: QSPI3 input */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN; /**< \brief QSPI3_SCLKB: QSPI3 input */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN; /**< \brief QSPI3_SCLKD: QSPI3 input */
+IFX_EXTERN IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN; /**< \brief QSPI3_SCLKE: QSPI3 input */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_11_OUT; /**< \brief QSPI0_SCLK: QSPI0 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi0_SCLK_P20_13_OUT; /**< \brief QSPI0_SCLK: QSPI0 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P10_2_OUT; /**< \brief QSPI1_SCLK: QSPI1 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi1_SCLK_P11_6_OUT; /**< \brief QSPI1_SCLK: QSPI1 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKN_P13_0_OUT; /**< \brief QSPI2_SCLKN: QSPI2 output (LVDS) */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLKP_P13_1_OUT; /**< \brief QSPI2_SCLKP: QSPI2 output (LVDS) */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_3_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_6_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi2_SCLK_P15_8_OUT; /**< \brief QSPI2_SCLK: QSPI2 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKN_P22_0_OUT; /**< \brief QSPI3_SCLKN: QSPI3 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLKP_P22_1_OUT; /**< \brief QSPI3_SCLKP: QSPI3 output (LVDS) */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P02_7_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P10_8_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P22_3_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
+IFX_EXTERN IfxQspi_Sclk_Out IfxQspi3_SCLK_P33_11_OUT; /**< \brief QSPI3_SCLK: QSPI3 output */
+IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN; /**< \brief QSPI0_SLSIA: QSPI0 input */
+IFX_EXTERN IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN; /**< \brief QSPI0_SLSIB: QSPI0 input */
+IFX_EXTERN IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN; /**< \brief QSPI1_SLSIA: QSPI1 input */
+IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN; /**< \brief QSPI2_SLSIA: QSPI2 input */
+IFX_EXTERN IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN; /**< \brief QSPI2_SLSIB: QSPI2 input */
+IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN; /**< \brief QSPI3_SLSIA: QSPI3 input */
+IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN; /**< \brief QSPI3_SLSIC: QSPI3 input */
+IFX_EXTERN IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN; /**< \brief QSPI3_SLSID: QSPI3 input */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT; /**< \brief QSPI0_SLSO0: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT; /**< \brief QSPI0_SLSO13: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT; /**< \brief QSPI0_SLSO1: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT; /**< \brief QSPI0_SLSO2: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT; /**< \brief QSPI0_SLSO3: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT; /**< \brief QSPI0_SLSO4: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT; /**< \brief QSPI0_SLSO5: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT; /**< \brief QSPI0_SLSO6: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT; /**< \brief QSPI0_SLSO7: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT; /**< \brief QSPI0_SLSO8: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT; /**< \brief QSPI0_SLSO9: QSPI0 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT; /**< \brief QSPI1_SLSO0: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT; /**< \brief QSPI1_SLSO10: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT; /**< \brief QSPI1_SLSO1: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT; /**< \brief QSPI1_SLSO2: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT; /**< \brief QSPI1_SLSO3: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT; /**< \brief QSPI1_SLSO4: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT; /**< \brief QSPI1_SLSO5: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT; /**< \brief QSPI1_SLSO6: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT; /**< \brief QSPI1_SLSO7: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT; /**< \brief QSPI1_SLSO8: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT; /**< \brief QSPI1_SLSO9: QSPI1 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT; /**< \brief QSPI2_SLSO0: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT; /**< \brief QSPI2_SLSO1: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT; /**< \brief QSPI2_SLSO2: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT; /**< \brief QSPI2_SLSO3: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT; /**< \brief QSPI2_SLSO4: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT; /**< \brief QSPI2_SLSO5: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT; /**< \brief QSPI2_SLSO6: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT; /**< \brief QSPI2_SLSO7: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT; /**< \brief QSPI2_SLSO8: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT; /**< \brief QSPI2_SLSO9: QSPI2 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT; /**< \brief QSPI3_SLSO0: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT; /**< \brief QSPI3_SLSO11: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT; /**< \brief QSPI3_SLSO12: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT; /**< \brief QSPI3_SLSO13: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT; /**< \brief QSPI3_SLSO1: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT; /**< \brief QSPI3_SLSO1: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT; /**< \brief QSPI3_SLSO2: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT; /**< \brief QSPI3_SLSO2: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT; /**< \brief QSPI3_SLSO3: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT; /**< \brief QSPI3_SLSO4: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT; /**< \brief QSPI3_SLSO4: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT; /**< \brief QSPI3_SLSO5: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT; /**< \brief QSPI3_SLSO5: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT; /**< \brief QSPI3_SLSO6: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT; /**< \brief QSPI3_SLSO7: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT; /**< \brief QSPI3_SLSO7: QSPI3 output */
+IFX_EXTERN IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT; /**< \brief QSPI3_SLSO8: QSPI3 output */
+
+/** \brief Table dimensions */
+#define IFXQSPI_PINMAP_NUM_MODULES 4
+#define IFXQSPI_PINMAP_NUM_SLAVESELECTS 14
+#define IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS 2
+#define IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS 6
+#define IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS 4
+#define IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS 5
+#define IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS 6
+#define IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS 5
+#define IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS 6
+#define IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS 4
+#define IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS 2
+
+
+/** \brief IfxQspi_Hsicin_In table */
+IFX_EXTERN const IfxQspi_Hsicin_In *IfxQspi_Hsicin_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_HSICIN_IN_NUM_ITEMS];
+
+/** \brief IfxQspi_Mrst_In table */
+IFX_EXTERN const IfxQspi_Mrst_In *IfxQspi_Mrst_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_IN_NUM_ITEMS];
+
+/** \brief IfxQspi_Mrst_Out table */
+IFX_EXTERN const IfxQspi_Mrst_Out *IfxQspi_Mrst_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MRST_OUT_NUM_ITEMS];
+
+/** \brief IfxQspi_Mtsr_In table */
+IFX_EXTERN const IfxQspi_Mtsr_In *IfxQspi_Mtsr_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_IN_NUM_ITEMS];
+
+/** \brief IfxQspi_Mtsr_Out table */
+IFX_EXTERN const IfxQspi_Mtsr_Out *IfxQspi_Mtsr_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_MTSR_OUT_NUM_ITEMS];
+
+/** \brief IfxQspi_Sclk_In table */
+IFX_EXTERN const IfxQspi_Sclk_In *IfxQspi_Sclk_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_IN_NUM_ITEMS];
+
+/** \brief IfxQspi_Sclk_Out table */
+IFX_EXTERN const IfxQspi_Sclk_Out *IfxQspi_Sclk_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SCLK_OUT_NUM_ITEMS];
+
+/** \brief IfxQspi_Slsi_In table */
+IFX_EXTERN const IfxQspi_Slsi_In *IfxQspi_Slsi_In_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_SLSI_IN_NUM_ITEMS];
+
+/** \brief IfxQspi_Slso_Out table */
+IFX_EXTERN const IfxQspi_Slso_Out *IfxQspi_Slso_Out_pinTable[IFXQSPI_PINMAP_NUM_MODULES][IFXQSPI_PINMAP_NUM_SLAVESELECTS][IFXQSPI_PINMAP_SLSO_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXQSPI_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxScu_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxScu_PinMap.c
new file mode 100644
index 0000000..28da356
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxScu_PinMap.c
@@ -0,0 +1,186 @@
+/**
+ * \file IfxScu_PinMap.c
+ * \brief SCU I/O map
+ * \ingroup IfxLld_Scu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxScu_PinMap.h"
+
+IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT = {&MODULE_SCU, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt6};
+IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT = {&MODULE_SCU, {&MODULE_P33,13}, IfxPort_OutputIdx_alt6};
+IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN = {&MODULE_SCU, {&MODULE_P33, 8}, Ifx_RxSel_a};
+IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN = {&MODULE_SCU, {&MODULE_P21, 2}, Ifx_RxSel_b};
+IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN = {&MODULE_SCU, {&MODULE_P14, 1}, Ifx_RxSel_a};
+IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN = {&MODULE_SCU, {&MODULE_P15, 1}, Ifx_RxSel_b};
+IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT = {&MODULE_SCU, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt6};
+IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT = {&MODULE_SCU, {&MODULE_P11,12}, IfxPort_OutputIdx_alt6};
+IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT = {&MODULE_SCU, {&MODULE_P32, 4}, IfxPort_OutputIdx_alt6};
+IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN = {&MODULE_SCU, {&MODULE_P14, 6}};
+IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN = {&MODULE_SCU, {&MODULE_P14, 5}};
+IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN = {&MODULE_SCU, {&MODULE_P14, 2}};
+IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN = {&MODULE_SCU, {&MODULE_P14, 3}};
+IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN = {&MODULE_SCU, {&MODULE_P10, 5}};
+IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN = {&MODULE_SCU, {&MODULE_P10, 6}};
+IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN = {&MODULE_SCU, {&MODULE_P14, 4}};
+IfxScu_Req_In IfxScu_REQ0_P15_4_IN = {&MODULE_SCU, 0, {&MODULE_P15, 4}, Ifx_RxSel_a};
+IfxScu_Req_In IfxScu_REQ10_P14_3_IN = {&MODULE_SCU, 1, {&MODULE_P14, 3}, Ifx_RxSel_a};
+IfxScu_Req_In IfxScu_REQ11_P20_9_IN = {&MODULE_SCU, 7, {&MODULE_P20, 9}, Ifx_RxSel_a};
+IfxScu_Req_In IfxScu_REQ12_P11_10_IN = {&MODULE_SCU, 6, {&MODULE_P11,10}, Ifx_RxSel_d};
+IfxScu_Req_In IfxScu_REQ13_P15_5_IN = {&MODULE_SCU, 4, {&MODULE_P15, 5}, Ifx_RxSel_d};
+IfxScu_Req_In IfxScu_REQ14_P02_1_IN = {&MODULE_SCU, 2, {&MODULE_P02, 1}, Ifx_RxSel_b};
+IfxScu_Req_In IfxScu_REQ15_P14_1_IN = {&MODULE_SCU, 3, {&MODULE_P14, 1}, Ifx_RxSel_b};
+IfxScu_Req_In IfxScu_REQ16_P15_1_IN = {&MODULE_SCU, 7, {&MODULE_P15, 1}, Ifx_RxSel_c};
+IfxScu_Req_In IfxScu_REQ1_P15_8_IN = {&MODULE_SCU, 5, {&MODULE_P15, 8}, Ifx_RxSel_a};
+IfxScu_Req_In IfxScu_REQ2_P10_2_IN = {&MODULE_SCU, 2, {&MODULE_P10, 2}, Ifx_RxSel_a};
+IfxScu_Req_In IfxScu_REQ3_P10_3_IN = {&MODULE_SCU, 3, {&MODULE_P10, 3}, Ifx_RxSel_a};
+IfxScu_Req_In IfxScu_REQ4_P10_7_IN = {&MODULE_SCU, 0, {&MODULE_P10, 7}, Ifx_RxSel_c};
+IfxScu_Req_In IfxScu_REQ5_P10_8_IN = {&MODULE_SCU, 1, {&MODULE_P10, 8}, Ifx_RxSel_c};
+IfxScu_Req_In IfxScu_REQ6_P02_0_IN = {&MODULE_SCU, 3, {&MODULE_P02, 0}, Ifx_RxSel_c};
+IfxScu_Req_In IfxScu_REQ7_P00_4_IN = {&MODULE_SCU, 2, {&MODULE_P00, 4}, Ifx_RxSel_c};
+IfxScu_Req_In IfxScu_REQ8_P33_7_IN = {&MODULE_SCU, 4, {&MODULE_P33, 7}, Ifx_RxSel_a};
+IfxScu_Req_In IfxScu_REQ9_P20_0_IN = {&MODULE_SCU, 6, {&MODULE_P20, 0}, Ifx_RxSel_a};
+IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT = {&MODULE_SCU, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt6};
+IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT = {&MODULE_SCU, {&MODULE_P20, 7}, IfxPort_OutputIdx_alt6};
+IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT = {&MODULE_SCU, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt6};
+
+
+const IfxScu_Dcdcsync_Out *IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS] = {
+ {
+ &IfxScu_DCDCSYNC_P32_2_OUT,
+ &IfxScu_DCDCSYNC_P33_13_OUT
+ }
+};
+
+const IfxScu_Emgstop_In *IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS] = {
+ {
+ &IfxScu_EMGSTOPA_P33_8_IN,
+ &IfxScu_EMGSTOPB_P21_2_IN
+ }
+};
+
+const IfxScu_Evrwup_In *IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS] = {
+ {
+ &IfxScu_EVRWUPA_P14_1_IN,
+ &IfxScu_EVRWUPB_P15_1_IN
+ }
+};
+
+const IfxScu_Extclk_Out *IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS] = {
+ {
+ &IfxScu_EXTCLK1_P11_12_OUT,
+ &IfxScu_EXTCLK0_P23_1_OUT,
+ &IfxScu_EXTCLK1_P32_4_OUT
+ }
+};
+
+const IfxScu_Hwcfg_In *IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS] = {
+ {
+ &IfxScu_HWCFG4_P10_5_IN,
+ &IfxScu_HWCFG5_P10_6_IN,
+ &IfxScu_HWCFG2EVR13_P14_2_IN,
+ &IfxScu_HWCFG3_BMI_P14_3_IN,
+ &IfxScu_HWCFG6_P14_4_IN,
+ &IfxScu_HWCFG1EVR33_P14_5_IN,
+ &IfxScu_HWCFG0DCLDO_P14_6_IN
+ }
+};
+
+const IfxScu_Req_In *IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxScu_REQ0_P15_4_IN,
+ NULL_PTR,
+ &IfxScu_REQ4_P10_7_IN,
+ NULL_PTR
+ },
+ {
+ &IfxScu_REQ10_P14_3_IN,
+ NULL_PTR,
+ &IfxScu_REQ5_P10_8_IN,
+ NULL_PTR
+ },
+ {
+ &IfxScu_REQ2_P10_2_IN,
+ &IfxScu_REQ14_P02_1_IN,
+ &IfxScu_REQ7_P00_4_IN,
+ NULL_PTR
+ },
+ {
+ &IfxScu_REQ3_P10_3_IN,
+ &IfxScu_REQ15_P14_1_IN,
+ &IfxScu_REQ6_P02_0_IN,
+ NULL_PTR
+ },
+ {
+ &IfxScu_REQ8_P33_7_IN,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxScu_REQ13_P15_5_IN
+ },
+ {
+ &IfxScu_REQ1_P15_8_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxScu_REQ9_P20_0_IN,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxScu_REQ12_P11_10_IN
+ },
+ {
+ &IfxScu_REQ11_P20_9_IN,
+ NULL_PTR,
+ &IfxScu_REQ16_P15_1_IN,
+ NULL_PTR
+ }
+ }
+};
+
+const IfxScu_Wdtlck_Out *IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS] = {
+ {
+ &IfxScu_WDT1LCK_P20_7_OUT,
+ &IfxScu_WDT0LCK_P20_8_OUT,
+ &IfxScu_WDTSLCK_P20_9_OUT
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxScu_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxScu_PinMap.h
new file mode 100644
index 0000000..3cafd6d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxScu_PinMap.h
@@ -0,0 +1,186 @@
+/**
+ * \file IfxScu_PinMap.h
+ * \brief SCU I/O map
+ * \ingroup IfxLld_Scu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Scu_pinmap SCU Pin Mapping
+ * \ingroup IfxLld_Scu
+ */
+
+#ifndef IFXSCU_PINMAP_H
+#define IFXSCU_PINMAP_H
+
+#include
+#include <_Impl/IfxScu_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Scu_pinmap
+ * \{ */
+
+/** \brief EVR Wakeup pin mapping structure */
+typedef const struct
+{
+ Ifx_SCU* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxScu_Evrwup_In;
+
+/** \brief Hardware Configuration pin mapping structure */
+typedef const struct
+{
+ Ifx_SCU* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+} IfxScu_Hwcfg_In;
+
+/** \brief External Request pin mapping structure */
+typedef const struct
+{
+ Ifx_SCU* module; /**< \brief Base address */
+ uint8 channelId; /**< \brief ERU Channel ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxScu_Req_In;
+
+/** \brief DCDC Sync pin mapping structure */
+typedef const struct
+{
+ Ifx_SCU* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxScu_Dcdcsync_Out;
+
+/** \brief Emergency Stop pin mapping structure */
+typedef const struct
+{
+ Ifx_SCU* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxScu_Emgstop_In;
+
+/** \brief Watchdog Timer Lock pin mapping structure */
+typedef const struct
+{
+ Ifx_SCU* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxScu_Wdtlck_Out;
+
+/** \brief External Clock pin mapping structure */
+typedef const struct
+{
+ Ifx_SCU* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxScu_Extclk_Out;
+
+IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT; /**< \brief SCU_DCDCSYNC: SCU output */
+IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT; /**< \brief SCU_DCDCSYNC: SCU output */
+IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN; /**< \brief SCU_EMGSTOPA: SCU input */
+IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN; /**< \brief SCU_EMGSTOPB: SCU input */
+IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN; /**< \brief SCU_EVRWUPA: SCU input */
+IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN; /**< \brief SCU_EVRWUPB: SCU input */
+IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT; /**< \brief SCU_EXTCLK0: SCU output */
+IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT; /**< \brief SCU_EXTCLK1: SCU output */
+IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT; /**< \brief SCU_EXTCLK1: SCU output */
+IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN; /**< \brief SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode. */
+IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN; /**< \brief SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation. */
+IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN; /**< \brief SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation. */
+IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN; /**< \brief SCU_HWCFG3_BMI: SCU input */
+IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN; /**< \brief SCU_HWCFG4: SCU input */
+IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN; /**< \brief SCU_HWCFG5: SCU input */
+IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN; /**< \brief SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z). */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN; /**< \brief SCU_REQ0: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN; /**< \brief SCU_REQ10: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN; /**< \brief SCU_REQ11: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN; /**< \brief SCU_REQ12: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN; /**< \brief SCU_REQ13: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN; /**< \brief SCU_REQ14: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN; /**< \brief SCU_REQ15: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN; /**< \brief SCU_REQ16: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN; /**< \brief SCU_REQ1: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN; /**< \brief SCU_REQ2: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN; /**< \brief SCU_REQ3: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN; /**< \brief SCU_REQ4: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN; /**< \brief SCU_REQ5: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN; /**< \brief SCU_REQ6: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN; /**< \brief SCU_REQ7: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN; /**< \brief SCU_REQ8: SCU input */
+IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN; /**< \brief SCU_REQ9: SCU input */
+IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT; /**< \brief SCU_WDT0LCK: SCU output */
+IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT; /**< \brief SCU_WDT1LCK: SCU output */
+IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT; /**< \brief SCU_WDTSLCK: SCU output */
+
+/** \brief Table dimensions */
+#define IFXSCU_PINMAP_NUM_MODULES 1
+#define IFXSCU_PINMAP_NUM_REQUESTS 8
+#define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
+#define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
+#define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2
+#define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3
+#define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7
+#define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 4
+#define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 3
+
+
+/** \brief IfxScu_Dcdcsync_Out table */
+IFX_EXTERN const IfxScu_Dcdcsync_Out *IfxScu_Dcdcsync_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS];
+
+/** \brief IfxScu_Emgstop_In table */
+IFX_EXTERN const IfxScu_Emgstop_In *IfxScu_Emgstop_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS];
+
+/** \brief IfxScu_Evrwup_In table */
+IFX_EXTERN const IfxScu_Evrwup_In *IfxScu_Evrwup_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS];
+
+/** \brief IfxScu_Extclk_Out table */
+IFX_EXTERN const IfxScu_Extclk_Out *IfxScu_Extclk_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS];
+
+/** \brief IfxScu_Hwcfg_In table */
+IFX_EXTERN const IfxScu_Hwcfg_In *IfxScu_Hwcfg_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS];
+
+/** \brief IfxScu_Req_In table */
+IFX_EXTERN const IfxScu_Req_In *IfxScu_Req_In_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_NUM_REQUESTS][IFXSCU_PINMAP_REQ_IN_NUM_ITEMS];
+
+/** \brief IfxScu_Wdtlck_Out table */
+IFX_EXTERN const IfxScu_Wdtlck_Out *IfxScu_Wdtlck_Out_pinTable[IFXSCU_PINMAP_NUM_MODULES][IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXSCU_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSent_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSent_PinMap.c
new file mode 100644
index 0000000..88359ed
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSent_PinMap.c
@@ -0,0 +1,146 @@
+/**
+ * \file IfxSent_PinMap.c
+ * \brief SENT I/O map
+ * \ingroup IfxLld_Sent
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxSent_PinMap.h"
+
+IfxSent_Sent_In IfxSent_SENT0A_AN24_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {NULL_PTR,24}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P40, 0}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, Ifx_RxSel_b};
+IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P02, 8}, Ifx_RxSel_c};
+IfxSent_Sent_In IfxSent_SENT1A_AN25_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {NULL_PTR,25}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P40, 1}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P00, 2}, Ifx_RxSel_b};
+IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, Ifx_RxSel_c};
+IfxSent_Sent_In IfxSent_SENT2A_AN26_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,26}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 2}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, Ifx_RxSel_b};
+IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P02, 6}, Ifx_RxSel_c};
+IfxSent_Sent_In IfxSent_SENT2D_AN36_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {NULL_PTR,36}, Ifx_RxSel_d};
+IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P40, 6}, Ifx_RxSel_d};
+IfxSent_Sent_In IfxSent_SENT3A_AN27_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,27}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 3}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, Ifx_RxSel_b};
+IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P02, 5}, Ifx_RxSel_c};
+IfxSent_Sent_In IfxSent_SENT3D_AN37_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {NULL_PTR,37}, Ifx_RxSel_d};
+IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P40, 7}, Ifx_RxSel_d};
+IfxSent_Sent_In IfxSent_SENT4A_AN38_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {NULL_PTR,38}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P40, 8}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, Ifx_RxSel_b};
+IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P33, 6}, Ifx_RxSel_c};
+IfxSent_Sent_In IfxSent_SENT5A_AN39_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {NULL_PTR,39}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P40, 9}, Ifx_RxSel_a};
+IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, Ifx_RxSel_b};
+IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P33, 5}, Ifx_RxSel_c};
+IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT = {&MODULE_SENT, IfxSent_ChannelId_0, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt6};
+IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT = {&MODULE_SENT, IfxSent_ChannelId_1, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt6};
+IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT = {&MODULE_SENT, IfxSent_ChannelId_2, {&MODULE_P00, 3}, IfxPort_OutputIdx_alt6};
+IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT = {&MODULE_SENT, IfxSent_ChannelId_3, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt6};
+IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT = {&MODULE_SENT, IfxSent_ChannelId_4, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt6};
+IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT = {&MODULE_SENT, IfxSent_ChannelId_5, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt6};
+
+
+const IfxSent_Sent_In *IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxSent_SENT0A_P40_0_IN,
+ &IfxSent_SENT0B_P00_1_IN,
+ &IfxSent_SENT0C_P02_8_IN,
+ NULL_PTR
+ },
+ {
+ &IfxSent_SENT1A_P40_1_IN,
+ &IfxSent_SENT1B_P00_2_IN,
+ &IfxSent_SENT1C_P02_7_IN,
+ NULL_PTR
+ },
+ {
+ &IfxSent_SENT2A_P40_2_IN,
+ &IfxSent_SENT2B_P00_3_IN,
+ &IfxSent_SENT2C_P02_6_IN,
+ &IfxSent_SENT2D_P40_6_IN
+ },
+ {
+ &IfxSent_SENT3A_P40_3_IN,
+ &IfxSent_SENT3B_P00_4_IN,
+ &IfxSent_SENT3C_P02_5_IN,
+ &IfxSent_SENT3D_P40_7_IN
+ },
+ {
+ &IfxSent_SENT4A_P40_8_IN,
+ &IfxSent_SENT4B_P00_5_IN,
+ &IfxSent_SENT4C_P33_6_IN,
+ NULL_PTR
+ },
+ {
+ &IfxSent_SENT5A_P40_9_IN,
+ &IfxSent_SENT5B_P00_6_IN,
+ &IfxSent_SENT5C_P33_5_IN,
+ NULL_PTR
+ }
+ }
+};
+
+const IfxSent_Spc_Out *IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxSent_SPC0_P00_1_OUT
+ },
+ {
+ &IfxSent_SPC1_P02_7_OUT
+ },
+ {
+ &IfxSent_SPC2_P00_3_OUT
+ },
+ {
+ &IfxSent_SPC3_P00_4_OUT
+ },
+ {
+ &IfxSent_SPC4_P00_5_OUT
+ },
+ {
+ &IfxSent_SPC5_P00_6_OUT
+ }
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSent_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSent_PinMap.h
new file mode 100644
index 0000000..3d350c9
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSent_PinMap.h
@@ -0,0 +1,126 @@
+/**
+ * \file IfxSent_PinMap.h
+ * \brief SENT I/O map
+ * \ingroup IfxLld_Sent
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Sent_pinmap SENT Pin Mapping
+ * \ingroup IfxLld_Sent
+ */
+
+#ifndef IFXSENT_PINMAP_H
+#define IFXSENT_PINMAP_H
+
+#include
+#include <_Impl/IfxSent_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Sent_pinmap
+ * \{ */
+
+/** \brief SENT pin mapping structure */
+typedef const struct
+{
+ Ifx_SENT* module; /**< \brief Base address */
+ IfxSent_ChannelId channelId; /**< \brief Channel ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ Ifx_RxSel select; /**< \brief Input multiplexer value */
+} IfxSent_Sent_In;
+
+/** \brief SPC pin mapping structure */
+typedef const struct
+{
+ Ifx_SENT* module; /**< \brief Base address */
+ IfxSent_ChannelId channelId; /**< \brief Channel ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxSent_Spc_Out;
+
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_AN24_IN; /**< \brief SENT_SENT0A: SENT input channel 0 pin A */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0A_P40_0_IN; /**< \brief SENT_SENT0A: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0B_P00_1_IN; /**< \brief SENT_SENT0B: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT0C_P02_8_IN; /**< \brief SENT_SENT0C: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_AN25_IN; /**< \brief SENT_SENT1A: SENT input channel 1 pin A */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1A_P40_1_IN; /**< \brief SENT_SENT1A: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1B_P00_2_IN; /**< \brief SENT_SENT1B: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT1C_P02_7_IN; /**< \brief SENT_SENT1C: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_AN26_IN; /**< \brief SENT_SENT2A: SENT input channel 2 pin A */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2A_P40_2_IN; /**< \brief SENT_SENT2A: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2B_P00_3_IN; /**< \brief SENT_SENT2B: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2C_P02_6_IN; /**< \brief SENT_SENT2C: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_AN36_IN; /**< \brief SENT_SENT2D: SENT input channel 2 pin D */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT2D_P40_6_IN; /**< \brief SENT_SENT2D: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_AN27_IN; /**< \brief SENT_SENT3A: SENT input channel 3 pin A */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3A_P40_3_IN; /**< \brief SENT_SENT3A: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3B_P00_4_IN; /**< \brief SENT_SENT3B: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3C_P02_5_IN; /**< \brief SENT_SENT3C: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_AN37_IN; /**< \brief SENT_SENT3D: SENT input channel 3 pin D */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT3D_P40_7_IN; /**< \brief SENT_SENT3D: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_AN38_IN; /**< \brief SENT_SENT4A: SENT input channel 4 pin A */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4A_P40_8_IN; /**< \brief SENT_SENT4A: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4B_P00_5_IN; /**< \brief SENT_SENT4B: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT4C_P33_6_IN; /**< \brief SENT_SENT4C: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_AN39_IN; /**< \brief SENT_SENT5A: SENT input channel 5 pin A */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5A_P40_9_IN; /**< \brief SENT_SENT5A: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5B_P00_6_IN; /**< \brief SENT_SENT5B: SENT input */
+IFX_EXTERN IfxSent_Sent_In IfxSent_SENT5C_P33_5_IN; /**< \brief SENT_SENT5C: SENT input */
+IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC0_P00_1_OUT; /**< \brief SENT_SPC0: SENT output */
+IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC1_P02_7_OUT; /**< \brief SENT_SPC1: SENT output */
+IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC2_P00_3_OUT; /**< \brief SENT_SPC2: SENT output */
+IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC3_P00_4_OUT; /**< \brief SENT_SPC3: SENT output */
+IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC4_P00_5_OUT; /**< \brief SENT_SPC4: SENT output */
+IFX_EXTERN IfxSent_Spc_Out IfxSent_SPC5_P00_6_OUT; /**< \brief SENT_SPC5: SENT output */
+
+/** \brief Table dimensions */
+#define IFXSENT_PINMAP_NUM_MODULES 1
+#define IFXSENT_PINMAP_NUM_CHANNELS 6
+#define IFXSENT_PINMAP_SENT_IN_NUM_ITEMS 4
+#define IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS 1
+
+
+/** \brief IfxSent_Sent_In table */
+IFX_EXTERN const IfxSent_Sent_In *IfxSent_Sent_In_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SENT_IN_NUM_ITEMS];
+
+/** \brief IfxSent_Spc_Out table */
+IFX_EXTERN const IfxSent_Spc_Out *IfxSent_Spc_Out_pinTable[IFXSENT_PINMAP_NUM_MODULES][IFXSENT_PINMAP_NUM_CHANNELS][IFXSENT_PINMAP_SPC_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXSENT_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSmu_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSmu_PinMap.c
new file mode 100644
index 0000000..f4307bd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSmu_PinMap.c
@@ -0,0 +1,55 @@
+/**
+ * \file IfxSmu_PinMap.c
+ * \brief SMU I/O map
+ * \ingroup IfxLld_Smu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxSmu_PinMap.h"
+
+IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT = {&MODULE_SMU, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt1};
+
+
+const IfxSmu_Fsp_Out *IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS] = {
+ {
+ &IfxSmu_FSP_P33_8_OUT
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSmu_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSmu_PinMap.h
new file mode 100644
index 0000000..34eceea
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxSmu_PinMap.h
@@ -0,0 +1,77 @@
+/**
+ * \file IfxSmu_PinMap.h
+ * \brief SMU I/O map
+ * \ingroup IfxLld_Smu
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Smu_pinmap SMU Pin Mapping
+ * \ingroup IfxLld_Smu
+ */
+
+#ifndef IFXSMU_PINMAP_H
+#define IFXSMU_PINMAP_H
+
+#include
+#include
+
+/** \addtogroup IfxLld_Smu_pinmap
+ * \{ */
+
+/** \brief Fault Signal Protocol Pin */
+typedef const struct
+{
+ Ifx_SMU* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxSmu_Fsp_Out;
+
+IFX_EXTERN IfxSmu_Fsp_Out IfxSmu_FSP_P33_8_OUT; /**< \brief SMU_FSP: SMU */
+
+/** \brief Table dimensions */
+#define IFXSMU_PINMAP_NUM_MODULES 1
+#define IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS 1
+
+
+/** \brief IfxSmu_Fsp_Out table */
+IFX_EXTERN const IfxSmu_Fsp_Out *IfxSmu_Fsp_Out_pinTable[IFXSMU_PINMAP_NUM_MODULES][IFXSMU_PINMAP_FSP_OUT_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXSMU_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxVadc_PinMap.c b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxVadc_PinMap.c
new file mode 100644
index 0000000..95a12a6
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxVadc_PinMap.c
@@ -0,0 +1,267 @@
+/**
+ * \file IfxVadc_PinMap.c
+ * \brief VADC I/O map
+ * \ingroup IfxLld_Vadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ */
+
+#include "IfxVadc_PinMap.h"
+
+IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT = {&MODULE_VADC, {&MODULE_P02, 6}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT = {&MODULE_VADC, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT = {&MODULE_VADC, {&MODULE_P02, 7}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT = {&MODULE_VADC, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT = {&MODULE_VADC, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT = {&MODULE_VADC, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT = {&MODULE_VADC, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT = {&MODULE_VADC, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT = {&MODULE_VADC, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT = {&MODULE_VADC, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT = {&MODULE_VADC, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt5};
+IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT = {&MODULE_VADC, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt5};
+IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt6};
+IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt6};
+IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 6}, IfxPort_OutputIdx_alt6};
+IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_0, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt6};
+IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 0}, IfxPort_OutputIdx_alt6};
+IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 1}, IfxPort_OutputIdx_alt6};
+IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 2}, IfxPort_OutputIdx_alt6};
+IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P33, 3}, IfxPort_OutputIdx_alt6};
+IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 4}, IfxPort_OutputIdx_alt5};
+IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 5}, IfxPort_OutputIdx_alt5};
+IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 6}, IfxPort_OutputIdx_alt3};
+IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P00, 7}, IfxPort_OutputIdx_alt3};
+IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt5};
+IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 6}, IfxPort_OutputIdx_alt7};
+IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 1}, IfxPort_OutputIdx_alt5};
+IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 7}, IfxPort_OutputIdx_alt4};
+IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 2}, IfxPort_OutputIdx_alt5};
+IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P10, 3}, IfxPort_OutputIdx_alt2};
+IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 0}, 0};
+IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,10}, 10};
+IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,11}, 11};
+IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,12}, 12};
+IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR,13}, 13};
+IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 1}, 1};
+IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 2}, 2};
+IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 3}, 3};
+IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 4}, 4};
+IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 5}, 5};
+IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 6}, 6};
+IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 7}, 7};
+IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN = {&MODULE_VADC, IfxVadc_GroupId_0, {NULL_PTR, 8}, 8};
+IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,16}, 0};
+IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,26}, 10};
+IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 2}, 10};
+IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,27}, 11};
+IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 3}, 11};
+IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,28}, 12};
+IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,29}, 13};
+IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,17}, 1};
+IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,18}, 2};
+IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,19}, 3};
+IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,20}, 4};
+IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,21}, 5};
+IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,24}, 8};
+IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 0}, 8};
+IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {NULL_PTR,25}, 9};
+IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN = {&MODULE_VADC, IfxVadc_GroupId_1, {&MODULE_P40, 1}, 9};
+IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,32}, 0};
+IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,44}, 10};
+IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,45}, 11};
+IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,46}, 12};
+IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,47}, 13};
+IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,48}, 14};
+IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,49}, 15};
+IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,33}, 1};
+IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,35}, 3};
+IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,36}, 4};
+IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 6}, 4};
+IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,37}, 5};
+IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 7}, 5};
+IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,38}, 6};
+IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 8}, 6};
+IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {NULL_PTR,39}, 7};
+IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN = {&MODULE_VADC, IfxVadc_GroupId_2, {&MODULE_P40, 9}, 7};
+IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,12}, 0};
+IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 2}, 10};
+IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 1}, 11};
+IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,11}, 1};
+IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00,10}, 2};
+IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 9}, 3};
+IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 8}, 4};
+IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 7}, 5};
+IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 6}, 6};
+IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 5}, 7};
+IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 4}, 8};
+IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN = {&MODULE_VADC, IfxVadc_GroupId_3, {&MODULE_P00, 3}, 9};
+
+
+const IfxVadc_Emux_Out *IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS] = {
+ {
+ &IfxVadc_EMUX10_P00_6_OUT,
+ &IfxVadc_EMUX11_P00_7_OUT,
+ &IfxVadc_EMUX12_P00_8_OUT,
+ &IfxVadc_EMUX00_P02_6_OUT,
+ &IfxVadc_EMUX01_P02_7_OUT,
+ &IfxVadc_EMUX02_P02_8_OUT,
+ &IfxVadc_EMUX02_P33_1_OUT,
+ &IfxVadc_EMUX01_P33_2_OUT,
+ &IfxVadc_EMUX00_P33_3_OUT,
+ &IfxVadc_EMUX12_P33_4_OUT,
+ &IfxVadc_EMUX11_P33_5_OUT,
+ &IfxVadc_EMUX10_P33_6_OUT
+ }
+};
+
+const IfxVadc_GxBfl_Out *IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS] = {
+ {
+ {
+ &IfxVadc_G0BFL0_P33_4_OUT,
+ &IfxVadc_G0BFL1_P33_5_OUT,
+ &IfxVadc_G0BFL2_P33_6_OUT,
+ &IfxVadc_G0BFL3_P33_7_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxVadc_G1BFL0_P33_0_OUT,
+ &IfxVadc_G1BFL1_P33_1_OUT,
+ &IfxVadc_G1BFL2_P33_2_OUT,
+ &IfxVadc_G1BFL3_P33_3_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxVadc_G2BFL0_P00_4_OUT,
+ &IfxVadc_G2BFL1_P00_5_OUT,
+ &IfxVadc_G2BFL2_P00_6_OUT,
+ &IfxVadc_G2BFL3_P00_7_OUT,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxVadc_G3BFL0_P10_0_OUT,
+ &IfxVadc_G3BFL1_P10_1_OUT,
+ &IfxVadc_G3BFL2_P10_2_OUT,
+ &IfxVadc_G3BFL3_P10_3_OUT,
+ &IfxVadc_G3BFL0_P10_6_OUT,
+ &IfxVadc_G3BFL1_P10_7_OUT
+ }
+ }
+};
+
+const IfxVadc_Vadcg_In *IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS] = {
+ {
+ {
+ &IfxVadc_G0_0_AN0_IN,
+ &IfxVadc_G0_1_AN1_IN,
+ &IfxVadc_G0_2_AN2_IN,
+ &IfxVadc_G0_3_AN3_IN,
+ &IfxVadc_G0_4_AN4_IN,
+ &IfxVadc_G0_5_AN5_IN,
+ &IfxVadc_G0_6_AN6_IN,
+ &IfxVadc_G0_7_AN7_IN,
+ &IfxVadc_G0_8_AN8_IN,
+ NULL_PTR,
+ &IfxVadc_G0_10_AN10_IN,
+ &IfxVadc_G0_11_AN11_IN,
+ &IfxVadc_G0_12_AN12_IN,
+ &IfxVadc_G0_13_AN13_IN,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxVadc_G1_0_AN16_IN,
+ &IfxVadc_G1_1_AN17_IN,
+ &IfxVadc_G1_2_AN18_IN,
+ &IfxVadc_G1_3_AN19_IN,
+ &IfxVadc_G1_4_AN20_IN,
+ &IfxVadc_G1_5_AN21_IN,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxVadc_G1_8_P40_0_IN,
+ &IfxVadc_G1_9_P40_1_IN,
+ &IfxVadc_G1_10_P40_2_IN,
+ &IfxVadc_G1_11_P40_3_IN,
+ &IfxVadc_G1_12_AN28_IN,
+ &IfxVadc_G1_13_AN29_IN,
+ NULL_PTR,
+ NULL_PTR
+ },
+ {
+ &IfxVadc_G2_0_AN32_IN,
+ &IfxVadc_G2_1_AN33_IN,
+ NULL_PTR,
+ &IfxVadc_G2_3_AN35_IN,
+ &IfxVadc_G2_4_P40_6_IN,
+ &IfxVadc_G2_5_P40_7_IN,
+ &IfxVadc_G2_6_P40_8_IN,
+ &IfxVadc_G2_7_P40_9_IN,
+ NULL_PTR,
+ NULL_PTR,
+ &IfxVadc_G2_10_AN44_IN,
+ &IfxVadc_G2_11_AN45_IN,
+ &IfxVadc_G2_12_AN46_IN,
+ &IfxVadc_G2_13_AN47_IN,
+ &IfxVadc_G2_14_AN48_IN,
+ &IfxVadc_G2_15_AN49_IN
+ },
+ {
+ &IfxVadc_G3_0_P00_12_IN,
+ &IfxVadc_G3_1_P00_11_IN,
+ &IfxVadc_G3_2_P00_10_IN,
+ &IfxVadc_G3_3_P00_9_IN,
+ &IfxVadc_G3_4_P00_8_IN,
+ &IfxVadc_G3_5_P00_7_IN,
+ &IfxVadc_G3_6_P00_6_IN,
+ &IfxVadc_G3_7_P00_5_IN,
+ &IfxVadc_G3_8_P00_4_IN,
+ &IfxVadc_G3_9_P00_3_IN,
+ &IfxVadc_G3_10_P00_2_IN,
+ &IfxVadc_G3_11_P00_1_IN,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR,
+ NULL_PTR
+ }
+ }
+};
diff --git a/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxVadc_PinMap.h b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxVadc_PinMap.h
new file mode 100644
index 0000000..05980a4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/infineon_libraries/iLLD/TC26B/Tricore/_PinMap/IfxVadc_PinMap.h
@@ -0,0 +1,192 @@
+/**
+ * \file IfxVadc_PinMap.h
+ * \brief VADC I/O map
+ * \ingroup IfxLld_Vadc
+ *
+ * \version iLLD_1_0_1_11_0
+ * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Vadc_pinmap VADC Pin Mapping
+ * \ingroup IfxLld_Vadc
+ */
+
+#ifndef IFXVADC_PINMAP_H
+#define IFXVADC_PINMAP_H
+
+#include
+#include <_Impl/IfxVadc_cfg.h>
+#include
+
+/** \addtogroup IfxLld_Vadc_pinmap
+ * \{ */
+
+/** \brief VADC Boundary Flag pin mapping structure */
+typedef const struct
+{
+ Ifx_VADC* module; /**< \brief Base address */
+ IfxVadc_GroupId groupId; /**< \brief Group ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxVadc_GxBfl_Out;
+
+/** \brief VADC External Mux pin mapping structure */
+typedef const struct
+{
+ Ifx_VADC* module; /**< \brief Base address */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ IfxPort_OutputIdx select; /**< \brief Port control code */
+} IfxVadc_Emux_Out;
+
+/** \brief VADC Analog Input */
+typedef const struct
+{
+ Ifx_VADC* module; /**< \brief Base address */
+ IfxVadc_GroupId groupId; /**< \brief Group ID */
+ IfxPort_Pin pin; /**< \brief Port pin */
+ uint8 channelId; /**< \brief Channel ID */
+} IfxVadc_Vadcg_In;
+
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P02_6_OUT; /**< \brief VADC_EMUX00: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX00_P33_3_OUT; /**< \brief VADC_EMUX00: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P02_7_OUT; /**< \brief VADC_EMUX01: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX01_P33_2_OUT; /**< \brief VADC_EMUX01: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P02_8_OUT; /**< \brief VADC_EMUX02: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX02_P33_1_OUT; /**< \brief VADC_EMUX02: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P00_6_OUT; /**< \brief VADC_EMUX10: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX10_P33_6_OUT; /**< \brief VADC_EMUX10: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P00_7_OUT; /**< \brief VADC_EMUX11: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX11_P33_5_OUT; /**< \brief VADC_EMUX11: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P00_8_OUT; /**< \brief VADC_EMUX12: VADC output */
+IFX_EXTERN IfxVadc_Emux_Out IfxVadc_EMUX12_P33_4_OUT; /**< \brief VADC_EMUX12: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL0_P33_4_OUT; /**< \brief VADC_G0BFL0: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL1_P33_5_OUT; /**< \brief VADC_G0BFL1: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL2_P33_6_OUT; /**< \brief VADC_G0BFL2: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G0BFL3_P33_7_OUT; /**< \brief VADC_G0BFL3: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL0_P33_0_OUT; /**< \brief VADC_G1BFL0: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL1_P33_1_OUT; /**< \brief VADC_G1BFL1: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL2_P33_2_OUT; /**< \brief VADC_G1BFL2: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G1BFL3_P33_3_OUT; /**< \brief VADC_G1BFL3: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL0_P00_4_OUT; /**< \brief VADC_G2BFL0: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL1_P00_5_OUT; /**< \brief VADC_G2BFL1: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL2_P00_6_OUT; /**< \brief VADC_G2BFL2: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G2BFL3_P00_7_OUT; /**< \brief VADC_G2BFL3: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_0_OUT; /**< \brief VADC_G3BFL0: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL0_P10_6_OUT; /**< \brief VADC_G3BFL0: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_1_OUT; /**< \brief VADC_G3BFL1: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL1_P10_7_OUT; /**< \brief VADC_G3BFL1: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL2_P10_2_OUT; /**< \brief VADC_G3BFL2: VADC output */
+IFX_EXTERN IfxVadc_GxBfl_Out IfxVadc_G3BFL3_P10_3_OUT; /**< \brief VADC_G3BFL3: VADC output */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_0_AN0_IN; /**< \brief VADC_G0_0: VADC input channel 0 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_10_AN10_IN; /**< \brief VADC_G0_10: VADC input channel 10 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_11_AN11_IN; /**< \brief VADC_G0_11: VADC input channel 11 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_12_AN12_IN; /**< \brief VADC_G0_12: VADC input channel 12 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_13_AN13_IN; /**< \brief VADC_G0_13: VADC input channel 13 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_1_AN1_IN; /**< \brief VADC_G0_1: VADC input channel 1 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_2_AN2_IN; /**< \brief VADC_G0_2: VADC input channel 2 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_3_AN3_IN; /**< \brief VADC_G0_3: VADC input channel 3 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_4_AN4_IN; /**< \brief VADC_G0_4: VADC input channel 4 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_5_AN5_IN; /**< \brief VADC_G0_5: VADC input channel 5 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_6_AN6_IN; /**< \brief VADC_G0_6: VADC input channel 6 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_7_AN7_IN; /**< \brief VADC_G0_7: VADC input channel 7 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G0_8_AN8_IN; /**< \brief VADC_G0_8: VADC input channel 8 of group 0 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_0_AN16_IN; /**< \brief VADC_G1_0: VADC input channel 0 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_AN26_IN; /**< \brief VADC_G1_10: VADC input channel 10 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_10_P40_2_IN; /**< \brief VADC_G1_10: VADC input channel 10 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_AN27_IN; /**< \brief VADC_G1_11: VADC input channel 11 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_11_P40_3_IN; /**< \brief VADC_G1_11: VADC input channel 11 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_12_AN28_IN; /**< \brief VADC_G1_12: VADC input channel 12 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_13_AN29_IN; /**< \brief VADC_G1_13: VADC input channel 13 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_1_AN17_IN; /**< \brief VADC_G1_1: VADC input channel 1 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_2_AN18_IN; /**< \brief VADC_G1_2: VADC input channel 2 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_3_AN19_IN; /**< \brief VADC_G1_3: VADC input channel 3 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_4_AN20_IN; /**< \brief VADC_G1_4: VADC input channel 4 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_5_AN21_IN; /**< \brief VADC_G1_5: VADC input channel 5 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_AN24_IN; /**< \brief VADC_G1_8: VADC input channel 8 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_8_P40_0_IN; /**< \brief VADC_G1_8: VADC input channel 8 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_AN25_IN; /**< \brief VADC_G1_9: VADC input channel 9of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G1_9_P40_1_IN; /**< \brief VADC_G1_9: VADC input channel 9 of group 1 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_0_AN32_IN; /**< \brief VADC_G2_0: VADC input channel 0 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_10_AN44_IN; /**< \brief VADC_G2_10: VADC input channel 10 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_11_AN45_IN; /**< \brief VADC_G2_11: VADC input channel 11 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_12_AN46_IN; /**< \brief VADC_G2_12: VADC input channel 12 of group 24 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_13_AN47_IN; /**< \brief VADC_G2_13: VADC input channel 13 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_14_AN48_IN; /**< \brief VADC_G2_14: VADC input channel 14 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_15_AN49_IN; /**< \brief VADC_G2_15: VADC input channel 15 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_1_AN33_IN; /**< \brief VADC_G2_1: VADC input channel 1 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_3_AN35_IN; /**< \brief VADC_G2_3: VADC input channel 3 of group 2 (mtm) */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_AN36_IN; /**< \brief VADC_G2_4: VADC input channel 4 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_4_P40_6_IN; /**< \brief VADC_G2_4: VADC input channel 4 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_AN37_IN; /**< \brief VADC_G2_5: VADC input channel 5 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_5_P40_7_IN; /**< \brief VADC_G2_5: VADC input channel 5 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_AN38_IN; /**< \brief VADC_G2_6: VADC input channel 6 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_6_P40_8_IN; /**< \brief VADC_G2_6: VADC input channel 6 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_AN39_IN; /**< \brief VADC_G2_7: VADC input channel 7 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G2_7_P40_9_IN; /**< \brief VADC_G2_7: VADC input channel 7 of group 2 */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_0_P00_12_IN; /**< \brief VADC_G3_0: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_10_P00_2_IN; /**< \brief VADC_G3_10: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_11_P00_1_IN; /**< \brief VADC_G3_11: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_1_P00_11_IN; /**< \brief VADC_G3_1: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_2_P00_10_IN; /**< \brief VADC_G3_2: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_3_P00_9_IN; /**< \brief VADC_G3_3: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_4_P00_8_IN; /**< \brief VADC_G3_4: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_5_P00_7_IN; /**< \brief VADC_G3_5: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_6_P00_6_IN; /**< \brief VADC_G3_6: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_7_P00_5_IN; /**< \brief VADC_G3_7: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_8_P00_4_IN; /**< \brief VADC_G3_8: VADC input */
+IFX_EXTERN IfxVadc_Vadcg_In IfxVadc_G3_9_P00_3_IN; /**< \brief VADC_G3_9: VADC input */
+
+/** \brief Table dimensions */
+#define IFXVADC_PINMAP_NUM_MODULES 1
+#define IFXVADC_PINMAP_NUM_GROUPS 4
+#define IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS 12
+#define IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS 6
+#define IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS 16
+
+
+/** \brief IfxVadc_Emux_Out table */
+IFX_EXTERN const IfxVadc_Emux_Out *IfxVadc_Emux_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_EMUX_OUT_NUM_ITEMS];
+
+/** \brief IfxVadc_GxBfl_Out table */
+IFX_EXTERN const IfxVadc_GxBfl_Out *IfxVadc_GxBfl_Out_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_GXBFL_OUT_NUM_ITEMS];
+
+/** \brief IfxVadc_Vadcg_In table */
+IFX_EXTERN const IfxVadc_Vadcg_In *IfxVadc_Vadcg_In_pinTable[IFXVADC_PINMAP_NUM_MODULES][IFXVADC_PINMAP_NUM_GROUPS][IFXVADC_PINMAP_VADCG_IN_NUM_ITEMS];
+
+/** \} */
+
+#endif /* IFXVADC_PINMAP_H */
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_clock.c b/Example/E15_fft_demo/libraries/zf_common/zf_common_clock.c
new file mode 100644
index 0000000..16b9e1c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_clock.c
@@ -0,0 +1,111 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_clock
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IfxScuEru.h"
+#include "Ifxstm.h"
+#include "Cpu0_Main.h"
+#include "Cpu/Std/IfxCpu.h"
+#include "zf_common_interrupt.h"
+#include "zf_common_clock.h"
+
+App_Cpu0 g_AppCpu0; // 频率信息变量
+
+IFX_ALIGN(4) IfxCpu_syncEvent g_cpuSyncEvent = 0; // 事件同步变量
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置系统频率
+// 返回类型 void
+// 使用示例 set_clock();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void set_clock (void)
+{
+ IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu_0, (float32)AURIX_MCU_FREQUENCY);
+ IfxScuCcu_setCpuFrequency(IfxCpu_ResourceCpu_1, (float32)AURIX_MCU_FREQUENCY);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取系统频率
+// 返回类型 void
+// 使用示例 get_clock();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void get_clock (void)
+{
+ // 获取时钟频率，便于查看当前系统运行频率
+ g_AppCpu0.info.pllFreq = IfxScuCcu_getPllFrequency();
+ g_AppCpu0.info.cpuFreq = IfxScuCcu_getCpuFrequency(IfxCpu_getCoreIndex());
+ g_AppCpu0.info.sysFreq = IfxScuCcu_getSpbFrequency();
+ g_AppCpu0.info.stmFreq = IfxStm_getFrequency(&MODULE_STM0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 关闭看门狗
+// 返回类型 void
+// 使用示例 disable_Watchdog();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void disable_Watchdog (void)
+{
+ IfxScuWdt_disableCpuWatchdog(IfxScuWdt_getCpuWatchdogPassword());
+ IfxScuWdt_disableSafetyWatchdog(IfxScuWdt_getSafetyWatchdogPassword());
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 时钟初始化
+// 返回类型 void
+// 使用示例 clock_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void clock_init (void)
+{
+ interrupt_global_disable(); // 关闭总中断
+ disable_Watchdog(); // 关闭看门狗
+ get_clock(); // 获取系统频率
+ interrupt_global_enable(0); // 打开全局中断
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 等待所有核心初始化完毕
+// 返回类型 void
+// 使用示例 cpu_wait_event_ready();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void cpu_wait_event_ready (void)
+{
+ IfxCpu_emitEvent(&g_cpuSyncEvent);
+ IfxCpu_waitEvent(&g_cpuSyncEvent, 0xFFFF);
+}
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_clock.h b/Example/E15_fft_demo/libraries/zf_common/zf_common_clock.h
new file mode 100644
index 0000000..47cfde1
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_clock.h
@@ -0,0 +1,48 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_clock
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_common_clock_h_
+#define _zf_common_clock_h_
+
+#include "zf_common_typedef.h"
+
+#define AURIX_MCU_FREQUENCY (200*1000*1000) // 设置单片机频率为200M 200M(默认频率)
+
+void set_clock (void); // 设置系统频率
+void get_clock (void); // 获取系统频率
+void disable_Watchdog (void); // 关闭看门狗
+void clock_init (void); // 时钟初始化
+void cpu_wait_event_ready (void); // 等待所有核心初始化完毕
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_debug.c b/Example/E15_fft_demo/libraries/zf_common/zf_common_debug.c
new file mode 100644
index 0000000..3c0ea6f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_debug.c
@@ -0,0 +1,432 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_debug
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_common_interrupt.h"
+#include "zf_common_fifo.h"
+#include "zf_driver_uart.h"
+#include "zf_common_debug.h"
+
+static debug_output_struct debug_output_info;
+static volatile uint8 zf_debug_init_flag = 0;
+static volatile uint8 zf_debug_assert_enable = 1;
+
+#if DEBUG_UART_USE_INTERRUPT // 如果启用 debug uart 接收中断
+uint8 debug_uart_buffer[DEBUG_RING_BUFFER_LEN]; // 数据存放数组
+uint8 debug_uart_data;
+fifo_struct debug_uart_fifo;
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 软延时函数 在 200MHz 下是一秒多的时间 各单片机需要根据各自时钟试验
+// 参数说明 void
+// 返回参数 void
+// 使用示例 debug_delay();
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+static void debug_delay (void)
+{
+ vuint32 loop_1 = 0, loop_2 = 0;
+ for(loop_1 = 0; loop_1 <= 0xFFF; loop_1 ++)
+ for(loop_2 = 0; loop_2 <= 0x1FFF; loop_2 ++);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 串口输出接口
+// 参数说明 *str 需要输出的字符串
+// 返回参数 void
+// 使用示例 debug_uart_str_output("Log message");
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+static void debug_uart_str_output (const char *str)
+{
+ uart_write_string(DEBUG_UART_INDEX, str);
+}
+
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 输出接口
+// 参数说明 *type log 类型
+// 参数说明 *file 文件名
+// 参数说明 line 目标行数
+// 参数说明 *str 信息
+// 返回参数 void
+// 使用示例 debug_output("Log message", file, line, str);
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+static void debug_output (char *type, char *file, int line, char *str)
+{
+ char *file_str;
+ vuint16 i = 0, j = 0;
+ vint32 len_origin = 0;
+ vint16 show_len = 0;
+ vint16 show_line_index = 0;
+ len_origin = strlen(file);
+
+ char output_buffer[256];
+ char file_path_buffer[64];
+
+ if(debug_output_info.type_index)
+ {
+ debug_output_info.output_screen_clear();
+ }
+
+ if(zf_debug_init_flag)
+ {
+ if(debug_output_info.type_index)
+ {
+ // 需要分行将文件的路径和行数输出
+ // <不输出完整路径 只输出一级目录 例如 src/main.c>
+ // 输出 line : xxxx
+ debug_output_info.output_screen(0, show_line_index ++, type);
+
+ file_str = file;
+ len_origin = strlen(file);
+ show_len = (debug_output_info.display_x_max / debug_output_info.font_x_size);
+
+ while(*file_str++ != '\0');
+
+ // 只取一级目录 如果文件放在盘符根目录 或者 MDK 的工程根目录 就会直接输出当前目录
+ for(j = 0; (j < 2) && (len_origin >= 0); len_origin --) // 查找两个 '/'
+ {
+ file_str --;
+ if((*file_str == '/') || (*file_str == 0x5C))
+ {
+ j ++;
+ }
+ }
+
+ // 文件路径保存到数组中
+ if(len_origin >= 0)
+ {
+ file_str ++;
+ sprintf(output_buffer, "file: %s", file_str);
+ }
+ else
+ {
+ if(0 == j)
+ {
+ sprintf(output_buffer, "file: mdk/%s", file_str);
+ }
+ else
+ {
+ sprintf(output_buffer, "file: %s", file_str);
+ }
+ }
+
+ // 屏幕显示路径
+ for(i = 0; i < ((strlen(output_buffer) / show_len) + 1); i ++)
+ {
+ for(j = 0; j < show_len; j ++)
+ {
+ if(strlen(output_buffer) < (j + i * show_len))
+ {
+ break;
+ }
+ file_path_buffer[j] = output_buffer[j + i * show_len];
+ }
+
+ file_path_buffer[j] = '\0'; // 末尾添加\0
+
+ debug_output_info.output_screen(0, debug_output_info.font_y_size * show_line_index ++, file_path_buffer);
+ }
+
+ // 屏幕显示行号
+ sprintf(output_buffer, "line: %d", line);
+ debug_output_info.output_screen(0, debug_output_info.font_y_size * show_line_index ++, output_buffer);
+
+ // 屏幕显示 Log 如果有的话
+ if(NULL != str)
+ {
+ for(i = 0; i < ((strlen(str) / show_len) + 1); i ++)
+ {
+ for(j = 0; j < show_len; j ++)
+ {
+ if(strlen(str) < (j + i * show_len))
+ {
+ break;
+ }
+ file_path_buffer[j] = str[j + i * show_len];
+ }
+
+ file_path_buffer[j] = '\0'; // 末尾添加\0
+
+ debug_output_info.output_screen(0, debug_output_info.font_y_size * show_line_index ++, file_path_buffer);
+ }
+ }
+ }
+ else
+ {
+ char output_buffer[256];
+ memset(output_buffer, 0, 256);
+ debug_output_info.output_uart(type);
+ if(NULL != str)
+ {
+ sprintf(output_buffer, "\r\nfile %s line %d: %s.\r\n", file, line, str);
+ }
+ else
+ {
+ sprintf(output_buffer, "\r\nfile %s line %d.\r\n", file, line);
+ }
+ debug_output_info.output_uart(output_buffer);
+ }
+ }
+}
+
+#if DEBUG_UART_USE_INTERRUPT // 条件编译 只有在启用串口中断才编译
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 读取 debug 环形缓冲区数据
+// 参数说明 *data 读出数据存放的数组指针
+// 返回参数 uint32 读出数据的实际长度
+// 使用示例 uint8 data[64]; uint32 len = debug_read_ring_buffer(data);
+// 备注信息 本函数需要开启 DEBUG_UART_USE_INTERRUPT 宏定义才可使用
+//-------------------------------------------------------------------------------------------------------------------
+uint32 debug_read_ring_buffer (uint8 *data)
+{
+ uint32 data_len = sizeof(data);
+ fifo_read_buffer(&debug_uart_fifo, data, &data_len, FIFO_READ_AND_CLEAN);
+ return data_len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 串口中断处理函数 isr.c 中对应串口中断服务函数调用
+// 参数说明 void
+// 返回参数 void
+// 使用示例 debug_interrupr_handler();
+// 备注信息 本函数需要开启 DEBUG_UART_USE_INTERRUPT 宏定义才可使用
+// 并且本函数默认放置在 UART1 的串口接收中断处理处
+//-------------------------------------------------------------------------------------------------------------------
+void debug_interrupr_handler (void)
+{
+ if(zf_debug_init_flag)
+ {
+ uart_query_byte(DEBUG_UART_INDEX, &debug_uart_data); // 读取串口数据
+ fifo_write_buffer(&debug_uart_fifo, &debug_uart_data, 1); // 存入 FIFO
+ }
+}
+
+#endif
+
+
+//------------------------------------------------------------------------- // printf 重定向 此部分不允许用户更改
+//-------------------------------------------------------------------------------------------------------------------
+// @brief 重定向printf 到串口
+// @param ch 需要打印的字节
+// @param stream 数据流
+// @note 此函数由编译器自带库里的printf所调用
+//-------------------------------------------------------------------------------------------------------------------
+int fputc(int ch, FILE *stream)
+{
+ uart_write_byte(DEBUG_UART_INDEX, (char)ch);
+ return(ch);
+}
+//-------------------------------------------------------------------------------------------------------------------
+// @brief 重定向printf 到串口
+// @param ch 需要打印的字节
+// @param stream 数据流
+// @note 此函数由编译器自带库里的printf所调用
+//-------------------------------------------------------------------------------------------------------------------
+int fgetc(FILE *f)
+{
+ return uart_read_byte(DEBUG_UART_INDEX);
+}
+//------------------------------------------------------------------------- // printf 重定向 此部分不允许用户更改
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 启用断言
+// 参数说明 void
+// 返回参数 void
+// 使用示例 debug_assert_enable();
+// 备注信息 断言默认开启 建议开启断言
+//-------------------------------------------------------------------------------------------------------------------
+void debug_assert_enable (void)
+{
+ zf_debug_assert_enable = 1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 禁用断言
+// 参数说明 void
+// 返回参数 void
+// 使用示例 debug_assert_disable();
+// 备注信息 断言默认开启 不建议禁用断言
+//-------------------------------------------------------------------------------------------------------------------
+void debug_assert_disable (void)
+{
+ zf_debug_assert_enable = 0;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 断言处理函数
+// 参数说明 pass 判断是否触发断言
+// 参数说明 *file 文件名
+// 参数说明 line 目标行数
+// 返回参数 void
+// 使用示例 zf_assert(0);
+// 备注信息 这个函数不是直接调用的 此部分不允许用户更改
+// 使用 zf_commmon_debug.h 中的 zf_assert(x) 接口
+//-------------------------------------------------------------------------------------------------------------------
+void debug_assert_handler (uint8 pass, char *file, int line)
+{
+ if(pass || !zf_debug_assert_enable)
+ {
+ return;
+ }
+
+ static uint8 assert_nest_index = 0;
+
+ if(0 != assert_nest_index)
+ {
+ while(TRUE);
+ }
+ assert_nest_index ++;
+
+ assert_interrupt_config();
+
+ while(TRUE)
+ {
+ // 如果代码跳转到这里停住了
+ // 一般你的函数参数传递出错了
+ // 或者你自己调用的 zf_assert(x) 接口处报错了
+
+ // 如果调用了 debug_init 初始化了 log 输出
+ // 就在对应串口输出去查看是哪个文件的哪一行报错
+
+ // 如果没有初始化 debug
+ // 那就看看这个 file 的字符串值和 line 的行数
+ // 那代表报错的文件路径名称和对应报错行数
+
+ // 再去调试看看是为什么参数出错
+ debug_output("Assert error", file, line, NULL);
+ debug_delay();
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 调试信息处理函数
+// 参数说明 pass 判断是否触发断言
+// 参数说明 *str 输出的信息
+// 参数说明 *file 文件名
+// 参数说明 line 目标行数
+// 返回参数 void
+// 使用示例 zf_log(0, "Log Message");
+// 备注信息 这个函数不是直接调用的 此部分不允许用户更改
+// 使用 zf_commmon_debug.h 中的 zf_log(x, str) 接口
+//-------------------------------------------------------------------------------------------------------------------
+void debug_log_handler (uint8 pass, char *str, char *file, int line)
+{
+ if(pass)
+ {
+ return;
+ }
+ if(zf_debug_init_flag)
+ {
+ debug_output("Log message", file, line, str);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 输出绑定信息初始化
+// 参数说明 *info debug 输出的信息结构体
+// 返回参数 void
+// 使用示例 debug_output_struct_init(info);
+// 备注信息 这个函数一般不由用户调用
+//-------------------------------------------------------------------------------------------------------------------
+void debug_output_struct_init (debug_output_struct *info)
+{
+ info->type_index = 0; // 屏幕信息输出标志
+
+ info->display_x_max = 0xFFFF; // 屏幕显示X轴最大值
+ info->display_y_max = 0xFFFF; // 屏幕显示Y轴最大值
+
+ info->font_x_size = 0xFF; // 字体X轴最大值
+ info->font_y_size = 0xFF; // 字体Y轴最大值
+
+ info->output_uart = NULL; // 输出调试信息的串口
+ info->output_screen = NULL; // 输出调试信息的屏幕
+ info->output_screen_clear = NULL; // 屏幕清屏
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 输出绑定初始化
+// 参数说明 *info debug 输出的信息结构体
+// 返回参数 void
+// 使用示例 debug_output_init(info);
+// 备注信息 这个函数一般不由用户调用
+//-------------------------------------------------------------------------------------------------------------------
+void debug_output_init (debug_output_struct *info)
+{
+ debug_output_info.type_index = info->type_index;
+
+ debug_output_info.display_x_max = info->display_x_max;
+ debug_output_info.display_y_max = info->display_y_max;
+
+ debug_output_info.font_x_size = info->font_x_size;
+ debug_output_info.font_y_size = info->font_y_size;
+
+ debug_output_info.output_uart = info->output_uart;
+ debug_output_info.output_screen = info->output_screen;
+ debug_output_info.output_screen_clear = info->output_screen_clear;
+
+ zf_debug_init_flag = 1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 debug 串口初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 debug_init();
+// 备注信息 开源库示例默认调用 但默认禁用中断接收
+//-------------------------------------------------------------------------------------------------------------------
+void debug_init (void)
+{
+ debug_output_struct info; // 声明调试信息结构体
+ debug_output_struct_init(&info); // 初始化断言调试信息
+ info.output_uart = debug_uart_str_output; // 配置断言输出串口
+ debug_output_init(&info);
+
+ uart_init(DEBUG_UART_INDEX, // 在 zf_common_debug.h 中查看对应值
+ DEBUG_UART_BAUDRATE, // 在 zf_common_debug.h 中查看对应值
+ DEBUG_UART_TX_PIN, // 在 zf_common_debug.h 中查看对应值
+ DEBUG_UART_RX_PIN); // 在 zf_common_debug.h 中查看对应值
+#if DEBUG_UART_USE_INTERRUPT // 条件编译 只有在启用串口中断才编译
+ fifo_init(&debug_uart_fifo, FIFO_DATA_8BIT, debug_uart_buffer, DEBUG_RING_BUFFER_LEN);
+ uart_rx_interrupt(DEBUG_UART_INDEX, 1); // 使能对应串口接收中断
+#endif
+}
+
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_debug.h b/Example/E15_fft_demo/libraries/zf_common/zf_common_debug.h
new file mode 100644
index 0000000..d235093
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_debug.h
@@ -0,0 +1,111 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_debug
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_common_debug_h_
+#define _zf_common_debug_h_
+
+#include "zf_common_typedef.h"
+
+#define DEBUG_UART_INDEX (UART_0) // 指定 debug uart 所使用的的串口
+#define DEBUG_UART_BAUDRATE (115200) // 指定 debug uart 所使用的的串口波特率
+#define DEBUG_UART_TX_PIN (UART0_TX_P14_0) // 指定 debug uart 所使用的的串口引脚
+#define DEBUG_UART_RX_PIN (UART0_RX_P14_1) // 指定 debug uart 所使用的的串口引脚
+#define DEBUG_UART_USE_INTERRUPT (0) // 是否启用 debug uart 接收中断
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 断言
+// 参数说明 x 判断是否触发断言 0-触发断言 1-不触发断言
+// 返回参数 void
+// 使用示例 zf_assert(0);
+// 备注信息 一般用于参数判断 zf_assert(0) 就断言报错
+// 默认情况下会在 Debug UART 输出
+// 但如果使用开源库内屏幕接口初始化了屏幕 则会在屏幕上显示
+//-------------------------------------------------------------------------------------------------------------------
+#define zf_assert(x) (debug_assert_handler((x), __FILE__, __LINE__)) // 断言 一般用于参数判断 zf_assert(0) 就断言报错
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 Log 信息输出
+// 参数说明 x 判断是否触发输出 0-触发输出 1-不触发输出
+// 参数说明 *str 需要输出的 Log 信息
+// 返回参数 void
+// 使用示例 zf_log(0, "Error");
+// 备注信息 调试信息输出 用来做一些报错或者警告之类的输出
+// 默认情况下会在 Debug UART 输出
+// 但如果使用开源库内屏幕接口初始化了屏幕 则会在屏幕上显示
+//-------------------------------------------------------------------------------------------------------------------
+#define zf_log(x, str) (debug_log_handler((x), (str), __FILE__, __LINE__)) // 调试信息输出 用来做一些报错或者警告之类的输出
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 CPU报错接管
+// 返回参数 void
+// 备注信息 当触发CPU报错时会通过log信息输出来提醒用户
+//-------------------------------------------------------------------------------------------------------------------
+#define IFX_CFG_CPU_TRAP_BE_HOOK(x) zf_log(0, "Memory access failure or Use an uninitialized peripheral, please check"); while(1);
+#define IFX_CFG_CPU_TRAP_IPE_HOOK(x) zf_log(0, "Accessing an null address, array access may be out of bounds, please check"); while(1);
+
+
+typedef struct
+{
+ uint16 type_index;
+
+ uint16 display_x_max;
+ uint16 display_y_max;
+
+ uint8 font_x_size;
+ uint8 font_y_size;
+
+ void (*output_uart) (const char *str);
+ void (*output_screen) (uint16 x, uint16 y, const char *str);
+ void (*output_screen_clear) (void);
+}debug_output_struct;
+
+
+#if DEBUG_UART_USE_INTERRUPT // 如果启用 debug uart 接收中断
+#define DEBUG_RING_BUFFER_LEN (64) // 定义环形缓冲区大小 默认 64byte
+void debug_interrupr_handler (void);
+uint32 debug_read_ring_buffer (uint8 *data);
+#endif
+
+
+void debug_assert_enable (void);
+void debug_assert_disable (void);
+void debug_assert_handler (uint8 pass, char *file, int line);
+void debug_log_handler (uint8 pass, char *str, char *file, int line);
+void debug_output_struct_init (debug_output_struct *info);
+void debug_output_init (debug_output_struct *info);
+void debug_init (void);
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_fifo.c b/Example/E15_fft_demo/libraries/zf_common/zf_common_fifo.c
new file mode 100644
index 0000000..439a216
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_fifo.c
@@ -0,0 +1,537 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_fifo
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_common_fifo.h"
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 FIFO 头指针位移
+// 参数说明 *fifo FIFO 对象指针
+// 参数说明 offset 偏移量
+// 返回参数 void
+// 使用示例 fifo_head_offset(fifo, 1);
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+static void fifo_head_offset (fifo_struct *fifo, uint32 offset)
+{
+ fifo->head += offset;
+
+ while(fifo->max <= fifo->head) // 如果范围超过则减缓冲区大小 直到小于最大缓冲区大小
+ {
+ fifo->head -= fifo->max;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 FIFO 尾指针位移
+// 参数说明 *fifo FIFO 对象指针
+// 参数说明 offset 偏移量
+// 返回参数 void
+// 使用示例 fifo_end_offset(fifo, 1);
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+static void fifo_end_offset (fifo_struct *fifo, uint32 offset)
+{
+ fifo->end += offset;
+
+ while(fifo->max <= fifo->end) // 如果范围超过则减缓冲区大小 直到小于最大缓冲区大小
+ {
+ fifo->end -= fifo->max;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 FIFO 重置缓冲器
+// 参数说明 *fifo FIFO 对象指针
+// 返回参数 void
+// 使用示例 fifo_clear(fifo);
+// 备注信息 清空当前 FIFO 对象的内存
+//-------------------------------------------------------------------------------------------------------------------
+fifo_state_enum fifo_clear (fifo_struct *fifo)
+{
+ fifo_state_enum return_state = FIFO_SUCCESS;
+ do
+ {
+ if(FIFO_CLEAR & fifo->execution)
+ {
+ return_state = FIFO_CLEAR_UNDO;
+ break;
+ }
+ fifo->execution |= FIFO_CLEAR;
+ fifo->head = 0;
+ fifo->end = 0;
+ fifo->size = fifo->max;
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ memset(fifo->buffer, 0, fifo->max);
+ break;
+ case FIFO_DATA_16BIT:
+ memset(fifo->buffer, 0, fifo->max * 2);
+ break;
+ case FIFO_DATA_32BIT:
+ memset(fifo->buffer, 0, fifo->max * 4);
+ break;
+ }
+ fifo->execution &= ~FIFO_CLEAR;
+ }while(0);
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 FIFO 查询当前数据个数
+// 参数说明 *fifo FIFO 对象指针
+// 返回参数 uint32 已使用长度
+// 使用示例 uint32 len = fifo_used(fifo);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 fifo_used (fifo_struct *fifo)
+{
+ return (fifo->max - fifo->size);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 向 FIFO 中写入数据
+// 参数说明 *fifo FIFO 对象指针
+// 参数说明 dat 数据
+// 返回参数 fifo_state_enum 操作状态
+// 使用示例 zf_log(fifo_write_element(&fifo, data) == FIFO_SUCCESS, "fifo_write_byte error");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+fifo_state_enum fifo_write_element (fifo_struct *fifo, uint32 dat)
+{
+ fifo_state_enum return_state = FIFO_SUCCESS;
+
+ do
+ {
+ if(FIFO_WRITE & fifo->execution)
+ {
+ return_state = FIFO_WRITE_UNDO;
+ break;
+ }
+ fifo->execution |= FIFO_WRITE;
+
+ if(1 <= fifo->size) // 剩余空间足够装下本次数据
+ {
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ ((uint8 *)fifo->buffer)[fifo->head] = dat & 0xFF;
+ break;
+ case FIFO_DATA_16BIT:
+ ((uint16 *)fifo->buffer)[fifo->head] = dat & 0xFFFF;
+ break;
+ case FIFO_DATA_32BIT:
+ ((uint32 *)fifo->buffer)[fifo->head] = dat;
+ break;
+ }
+ fifo_head_offset(fifo, 1); // 头指针偏移
+ fifo->size -= 1; // 缓冲区剩余长度减小
+ }
+ else
+ {
+ return_state = FIFO_SPACE_NO_ENOUGH;
+ }
+ fifo->execution &= ~FIFO_WRITE;
+ }while(0);
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 向 FIFO 中写入数据
+// 参数说明 *fifo FIFO 对象指针
+// 参数说明 *dat 数据来源缓冲区指针
+// 参数说明 length 需要写入的数据长度
+// 返回参数 fifo_state_enum 操作状态
+// 使用示例 zf_log(fifo_write_buffer(&fifo, data, 32) == FIFO_SUCCESS, "fifo_write_buffer error");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+fifo_state_enum fifo_write_buffer (fifo_struct *fifo, void *dat, uint32 length)
+{
+ fifo_state_enum return_state = FIFO_SUCCESS;
+ uint32 temp_length = 0;
+
+ do
+ {
+ if(NULL == dat)
+ {
+ return_state = FIFO_BUFFER_NULL;
+ break;
+ }
+ if(FIFO_WRITE & fifo->execution)
+ {
+ return_state = FIFO_WRITE_UNDO;
+ break;
+ }
+ fifo->execution |= FIFO_WRITE;
+
+ if(length <= fifo->size) // 剩余空间足够装下本次数据
+ {
+ temp_length = fifo->max - fifo->head; // 计算头指针距离缓冲区尾还有多少空间
+
+ if(length > temp_length) // 距离缓冲区尾长度不足写入数据 环形缓冲区分段操作
+ {
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ memcpy(
+ &(((uint8 *)fifo->buffer)[fifo->head]),
+ dat, temp_length); // 拷贝第一段数据
+ fifo_head_offset(fifo, temp_length); // 头指针偏移
+ memcpy(
+ &(((uint8 *)fifo->buffer)[fifo->head]),
+ &(((uint8 *)dat)[temp_length]),
+ length - temp_length); // 拷贝第二段数据
+ fifo_head_offset(fifo, length - temp_length); // 头指针偏移
+ break;
+ case FIFO_DATA_16BIT:
+ memcpy(
+ &(((uint16 *)fifo->buffer)[fifo->head]),
+ dat, temp_length * 2); // 拷贝第一段数据
+ fifo_head_offset(fifo, temp_length); // 头指针偏移
+ memcpy(
+ &(((uint16 *)fifo->buffer)[fifo->head]),
+ &(((uint16 *)dat)[temp_length]),
+ (length - temp_length) * 2); // 拷贝第二段数据
+ fifo_head_offset(fifo, length - temp_length); // 头指针偏移
+ break;
+ case FIFO_DATA_32BIT:
+ memcpy(
+ &(((uint32 *)fifo->buffer)[fifo->head]),
+ dat, temp_length * 4); // 拷贝第一段数据
+ fifo_head_offset(fifo, temp_length); // 头指针偏移
+ memcpy(
+ &(((uint32 *)fifo->buffer)[fifo->head]),
+ &(((uint32 *)dat)[temp_length]),
+ (length - temp_length) * 4); // 拷贝第二段数据
+ fifo_head_offset(fifo, length - temp_length); // 头指针偏移
+ break;
+ }
+ }
+ else
+ {
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ memcpy(
+ &(((uint8 *)fifo->buffer)[fifo->head]),
+ dat, length); // 一次完整写入
+ fifo_head_offset(fifo, length); // 头指针偏移
+ break;
+ case FIFO_DATA_16BIT:
+ memcpy(
+ &(((uint16 *)fifo->buffer)[fifo->head]),
+ dat, length * 2); // 一次完整写入
+ fifo_head_offset(fifo, length); // 头指针偏移
+ break;
+ case FIFO_DATA_32BIT:
+ memcpy(
+ &(((uint32 *)fifo->buffer)[fifo->head]),
+ dat, length * 4); // 一次完整写入
+ fifo_head_offset(fifo, length); // 头指针偏移
+ break;
+ }
+// memcpy(&fifo->buffer[fifo->head], dat, length); // 一次完整写入
+// fifo_head_offset(fifo, length); // 头指针偏移
+ }
+
+ fifo->size -= length; // 缓冲区剩余长度减小
+ }
+ else
+ {
+ return_state = FIFO_SPACE_NO_ENOUGH;
+ }
+ fifo->execution &= ~FIFO_WRITE;
+ }while(0);
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 从 FIFO 读取数据
+// 参数说明 *fifo FIFO 对象指针
+// 参数说明 *dat 目标缓冲区指针
+// 参数说明 flag 是否变更 FIFO 状态 可选择是否清空读取的数据
+// 返回参数 fifo_state_enum 操作状态
+// 使用示例 zf_log(fifo_read_element(&fifo, data, FIFO_READ_ONLY) == FIFO_SUCCESS, "fifo_read_byte error");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+fifo_state_enum fifo_read_element (fifo_struct *fifo, void *dat, fifo_operation_enum flag)
+{
+ fifo_state_enum return_state = FIFO_SUCCESS;
+
+ do
+ {
+ if(NULL == dat)
+ {
+ return_state = FIFO_BUFFER_NULL;
+ break;
+ }
+ fifo->execution |= FIFO_READ;
+
+ if(1 > fifo_used(fifo))
+ {
+ return_state = FIFO_DATA_NO_ENOUGH; // 标志数据不够
+ }
+
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ *((uint8 *)dat) = ((uint8 *)fifo->buffer)[fifo->end];
+ break;
+ case FIFO_DATA_16BIT:
+ *((uint16 *)dat) = ((uint16 *)fifo->buffer)[fifo->end];
+ break;
+ case FIFO_DATA_32BIT:
+ *((uint32 *)dat) = ((uint32 *)fifo->buffer)[fifo->end];
+ break;
+ }
+
+ if(flag == FIFO_READ_AND_CLEAN) // 如果选择读取并更改 FIFO 状态
+ {
+ if(FIFO_CLEAR & fifo->execution)
+ {
+ return_state = FIFO_CLEAR_UNDO;
+ break;
+ }
+ fifo->execution |= FIFO_CLEAR;
+ fifo_end_offset(fifo, 1); // 移动 FIFO 头指针
+ fifo->size += 1;
+ fifo->execution &= ~FIFO_CLEAR;
+ }
+ }while(0);
+ fifo->execution &= FIFO_READ;
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 从 FIFO 读取数据
+// 参数说明 *fifo FIFO 对象指针
+// 参数说明 *dat 目标缓冲区指针
+// 参数说明 *length 读取的数据长度 如果没有这么多数据这里会被修改
+// 参数说明 flag 是否变更 FIFO 状态 可选择是否清空读取的数据
+// 返回参数 fifo_state_enum 操作状态
+// 使用示例 zf_log(fifo_read_buffer(&fifo, data, &length, FIFO_READ_ONLY) == FIFO_SUCCESS, "fifo_read_buffer error");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+fifo_state_enum fifo_read_buffer (fifo_struct *fifo, void *dat, uint32 *length, fifo_operation_enum flag)
+{
+ fifo_state_enum return_state = FIFO_SUCCESS;
+ uint32 temp_length;
+
+ do
+ {
+ if(NULL == dat)
+ {
+ return_state = FIFO_BUFFER_NULL;
+ break;
+ }
+ fifo->execution |= FIFO_READ;
+
+ if(*length > fifo_used(fifo))
+ {
+ *length = (fifo->max - fifo->size); // 纠正读取的长度
+ return_state = FIFO_DATA_NO_ENOUGH; // 标志数据不够
+ }
+
+ temp_length = fifo->max - fifo->end; // 计算尾指针距离缓冲区尾还有多少空间
+ if(*length <= temp_length) // 足够一次性读取完毕
+ {
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ memcpy(dat, &(((uint8 *)fifo->buffer)[fifo->end]), *length);
+ break;
+ case FIFO_DATA_16BIT:
+ memcpy(dat, &(((uint16 *)fifo->buffer)[fifo->end]), *length * 2);
+ break;
+ case FIFO_DATA_32BIT:
+ memcpy(dat, &(((uint32 *)fifo->buffer)[fifo->end]), *length * 4);
+ break;
+ }
+ }
+ else
+ {
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ memcpy(dat, &(((uint8 *)fifo->buffer)[fifo->end]), temp_length);
+ memcpy(&(((uint8 *)dat)[temp_length]), fifo->buffer, *length - temp_length);
+ break;
+ case FIFO_DATA_16BIT:
+ memcpy(dat, &(((uint16 *)fifo->buffer)[fifo->end]), temp_length * 2);
+ memcpy(&(((uint16 *)dat)[temp_length]), fifo->buffer, (*length - temp_length) * 2);
+ break;
+ case FIFO_DATA_32BIT:
+ memcpy(dat, &(((uint32 *)fifo->buffer)[fifo->end]), temp_length * 4);
+ memcpy(&(((uint32 *)dat)[temp_length]), fifo->buffer, (*length - temp_length) * 4);
+ break;
+ }
+ }
+
+ if(flag == FIFO_READ_AND_CLEAN) // 如果选择读取并更改 FIFO 状态
+ {
+ if(FIFO_CLEAR & fifo->execution)
+ {
+ return_state = FIFO_CLEAR_UNDO;
+ break;
+ }
+ fifo->execution |= FIFO_CLEAR;
+ fifo_end_offset(fifo, *length); // 移动 FIFO 头指针
+ fifo->size += *length;
+ fifo->execution &= ~FIFO_CLEAR;
+ }
+ }while(0);
+ fifo->execution &= FIFO_READ;
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 从 FIFO 尾部读取指定长度 buffer
+// 参数说明 *fifo FIFO 对象指针
+// 参数说明 *dat 目标缓冲区指针
+// 参数说明 *length 读取的数据长度 如果没有这么多数据这里会被修改
+// 参数说明 flag 是否变更 FIFO 状态 可选择是否清空读取的数据
+// 返回参数 fifo_state_enum 操作状态
+// 使用示例 zf_log(fifo_read_tail_buffer(&fifo, data, &length, FIFO_READ_ONLY) == FIFO_SUCCESS, "fifo_read_buffer error");
+// 备注信息 如果使用 FIFO_READ_AND_CLEAN 操作 将会丢弃所有数据并清空整个 FIFO
+// 如果使用 FIFO_READ_AND_CLEAN 操作 将会丢弃所有数据并清空整个 FIFO
+// 如果使用 FIFO_READ_AND_CLEAN 操作 将会丢弃所有数据并清空整个 FIFO
+//-------------------------------------------------------------------------------------------------------------------
+fifo_state_enum fifo_read_tail_buffer (fifo_struct *fifo, void *dat, uint32 *length, fifo_operation_enum flag)
+{
+ fifo_state_enum return_state = FIFO_SUCCESS;
+ uint32 temp_length;
+
+ do
+ {
+ if(NULL == dat)
+ {
+ return_state = FIFO_BUFFER_NULL;
+ break;
+ }
+ fifo->execution |= FIFO_READ;
+
+ if(*length > fifo_used(fifo))
+ {
+ *length = (fifo->max - fifo->size); // 纠正读取的长度
+ return_state = FIFO_DATA_NO_ENOUGH; // 标志数据不够
+ }
+
+ if((fifo->head > fifo->end) || (fifo->head >= *length))
+ {
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ memcpy(dat, &(((uint8 *)fifo->buffer)[fifo->head - *length]), *length);
+ break;
+ case FIFO_DATA_16BIT:
+ memcpy(dat, &(((uint16 *)fifo->buffer)[fifo->head - *length]), *length * 2);
+ break;
+ case FIFO_DATA_32BIT:
+ memcpy(dat, &(((uint32 *)fifo->buffer)[fifo->head - *length]), *length * 4);
+ break;
+ }
+ }
+ else
+ {
+ temp_length = *length - fifo->head; // 计算尾指针距离缓冲区尾还有多少空间
+ switch(fifo->type)
+ {
+ case FIFO_DATA_8BIT:
+ memcpy(dat, &(((uint8 *)fifo->buffer)[fifo->max - temp_length]), temp_length);
+ memcpy(&(((uint8 *)dat)[temp_length]), &(((uint8 *)fifo->buffer)[fifo->head - *length]), (*length - temp_length));
+ break;
+ case FIFO_DATA_16BIT:
+ memcpy(dat, &(((uint16 *)fifo->buffer)[fifo->max - temp_length]), temp_length * 2);
+ memcpy(&(((uint16 *)dat)[temp_length]), &(((uint16 *)fifo->buffer)[fifo->head - *length]), (*length - temp_length) * 2);
+ break;
+ case FIFO_DATA_32BIT:
+ memcpy(dat, &(((uint32 *)fifo->buffer)[fifo->max - temp_length]), temp_length * 4);
+ memcpy(&(((uint32 *)dat)[temp_length]), &(((uint32 *)fifo->buffer)[fifo->head - *length]), (*length - temp_length) * 4);
+ break;
+ }
+ }
+
+ if(flag == FIFO_READ_AND_CLEAN) // 如果选择读取并更改 FIFO 状态
+ {
+ if(FIFO_CLEAR & fifo->execution)
+ {
+ return_state = FIFO_CLEAR_UNDO;
+ break;
+ }
+ fifo->execution |= FIFO_CLEAR;
+ fifo_end_offset(fifo, (fifo->max - fifo->size));
+ fifo->size = fifo->max;
+ fifo->execution &= ~FIFO_CLEAR;
+ }
+ }while(0);
+ fifo->execution &= FIFO_READ;
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 FIFO 初始化 挂载对应缓冲区
+// 参数说明 *fifo FIFO 对象指针
+// 参数说明 type FIFO 数据位数
+// 参数说明 *buffer_addr 要挂载的缓冲区
+// 参数说明 size 缓冲区大小
+// 返回参数 fifo_state_enum 操作状态
+// 使用示例 fifo_init(&user_fifo, user_buffer, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+fifo_state_enum fifo_init (fifo_struct *fifo, fifo_data_type_enum type, void *buffer_addr, uint32 size)
+{
+ fifo_state_enum return_value = FIFO_SUCCESS;
+ do
+ {
+ if(NULL == buffer_addr)
+ {
+ return_value = FIFO_BUFFER_NULL;
+ break;
+ }
+ fifo->buffer = buffer_addr;
+ fifo->execution = FIFO_IDLE;
+ fifo->type = type;
+ fifo->head = 0;
+ fifo->end = 0;
+ fifo->size = size;
+ fifo->max = size;
+ }while(0);
+ return return_value;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_fifo.h b/Example/E15_fft_demo/libraries/zf_common/zf_common_fifo.h
new file mode 100644
index 0000000..383f407
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_fifo.h
@@ -0,0 +1,95 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_fifo
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_common_fifo_h_
+#define _zf_common_fifo_h_
+
+#include "zf_common_typedef.h"
+
+typedef enum
+{
+ FIFO_SUCCESS,
+
+ FIFO_WRITE_UNDO,
+ FIFO_CLEAR_UNDO,
+ FIFO_BUFFER_NULL,
+ FIFO_SPACE_NO_ENOUGH,
+ FIFO_DATA_NO_ENOUGH,
+}fifo_state_enum;
+
+typedef enum
+{
+ FIFO_IDLE = 0x00,
+ FIFO_CLEAR = 0x01,
+ FIFO_WRITE = 0x02,
+ FIFO_READ = 0x04,
+}fifo_execution_enum;
+
+typedef enum
+{
+ FIFO_READ_AND_CLEAN,
+ FIFO_READ_ONLY,
+}fifo_operation_enum;
+
+typedef enum
+{
+ FIFO_DATA_8BIT,
+ FIFO_DATA_16BIT,
+ FIFO_DATA_32BIT,
+}fifo_data_type_enum;
+
+typedef struct
+{
+ uint8 execution; // 执行步骤
+ fifo_data_type_enum type; // 数据类型
+ void *buffer; // 缓存指针
+ uint32 head; // 缓存头指针 总是指向空的缓存
+ uint32 end; // 缓存尾指针 总是指向非空缓存（缓存全空除外）
+ uint32 size; // 缓存剩余大小
+ uint32 max; // 缓存总大小
+}fifo_struct;
+
+fifo_state_enum fifo_clear (fifo_struct *fifo);
+uint32 fifo_used (fifo_struct *fifo);
+
+fifo_state_enum fifo_write_element (fifo_struct *fifo, uint32 dat);
+fifo_state_enum fifo_write_buffer (fifo_struct *fifo, void *dat, uint32 length);
+fifo_state_enum fifo_read_element (fifo_struct *fifo, void *dat, fifo_operation_enum flag);
+fifo_state_enum fifo_read_buffer (fifo_struct *fifo, void *dat, uint32 *length, fifo_operation_enum flag);
+fifo_state_enum fifo_read_tail_buffer (fifo_struct *fifo, void *dat, uint32 *length, fifo_operation_enum flag);
+
+fifo_state_enum fifo_init (fifo_struct *fifo, fifo_data_type_enum type, void *buffer_addr, uint32 size);
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_font.c b/Example/E15_fft_demo/libraries/zf_common/zf_common_font.c
new file mode 100644
index 0000000..9af2919
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_font.c
@@ -0,0 +1,2721 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_font
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_common_font.h"
+
+const uint8 ascii_font_8x16[][16]=
+{
+ // <阴码> <列行式> <逆向> <8*16>
+ // <纵向 8bit 为一个数据模型> <横向取模>
+
+ // 字模数据储存格式为：{byte1, byte2,....byte16}
+
+ // 字模数据与像素对应关系
+ // byte 1 2 3 4 5 6 7 8
+ // bit [ 0] [ 8] [ 16] [ 24] [ 32] [ 40] [ 48] [ 56]
+ // bit [ 1] [ 9] [ 17] [ 25] [ 33] [ 41] [ 49] [ 57]
+ // bit [ 2] [ 10] [ 18] [ 26] [ 34] [ 42] [ 50] [ 58]
+ // bit [ 3] [ 11] [ 19] [ 37] [ 35] [ 43] [ 51] [ 59]
+ // bit [ 4] [ 12] [ 20] [ 38] [ 36] [ 44] [ 52] [ 60]
+ // bit [ 5] [ 13] [ 21] [ 39] [ 37] [ 45] [ 53] [ 61]
+ // bit [ 6] [ 14] [ 22] [ 30] [ 38] [ 46] [ 54] [ 62]
+ // bit [ 7] [ 15] [ 23] [ 31] [ 39] [ 47] [ 55] [ 63]
+
+ // byte 9 10 11 12 13 14 15 16
+ // bit [ 64] [ 72] [ 80] [ 88] [ 96] [104] [112] [120]
+ // bit [ 65] [ 73] [ 81] [ 89] [ 97] [105] [113] [121]
+ // bit [ 66] [ 74] [ 82] [ 90] [ 98] [106] [114] [122]
+ // bit [ 67] [ 75] [ 83] [ 91] [ 99] [107] [115] [123]
+ // bit [ 68] [ 76] [ 84] [ 92] [100] [108] [116] [124]
+ // bit [ 69] [ 77] [ 85] [ 93] [101] [109] [117] [125]
+ // bit [ 70] [ 78] [ 86] [ 94] [102] [110] [118] [126]
+ // bit [ 71] [ 79] [ 87] [ 95] [103] [111] [119] [127]
+
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // 0
+ {0x00,0x00,0x00,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x33,0x30,0x00,0x00,0x00}, // ! 1
+ {0x00,0x10,0x0C,0x06,0x10,0x0C,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // " 2
+ {0x40,0xC0,0x78,0x40,0xC0,0x78,0x40,0x00,0x04,0x3F,0x04,0x04,0x3F,0x04,0x04,0x00}, // # 3
+ {0x00,0x70,0x88,0xFC,0x08,0x30,0x00,0x00,0x00,0x18,0x20,0xFF,0x21,0x1E,0x00,0x00}, // $ 4
+ {0xF0,0x08,0xF0,0x00,0xE0,0x18,0x00,0x00,0x00,0x21,0x1C,0x03,0x1E,0x21,0x1E,0x00}, // % 5
+ {0x00,0xF0,0x08,0x88,0x70,0x00,0x00,0x00,0x1E,0x21,0x23,0x24,0x19,0x27,0x21,0x10}, // & 6
+ {0x10,0x16,0x0E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ' 7
+ {0x00,0x00,0x00,0xE0,0x18,0x04,0x02,0x00,0x00,0x00,0x00,0x07,0x18,0x20,0x40,0x00}, // ( 8
+ {0x00,0x02,0x04,0x18,0xE0,0x00,0x00,0x00,0x00,0x40,0x20,0x18,0x07,0x00,0x00,0x00}, // ) 9
+ {0x40,0x40,0x80,0xF0,0x80,0x40,0x40,0x00,0x02,0x02,0x01,0x0F,0x01,0x02,0x02,0x00}, // * 10
+ {0x00,0x00,0x00,0xF0,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x1F,0x01,0x01,0x01,0x00}, // + 11
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xB0,0x70,0x00,0x00,0x00,0x00,0x00}, // , 12
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x01,0x01,0x01,0x01,0x01,0x01}, // - 13
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00,0x00,0x00}, // . 14
+ {0x00,0x00,0x00,0x00,0x80,0x60,0x18,0x04,0x00,0x60,0x18,0x06,0x01,0x00,0x00,0x00}, // / 15
+ {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x0F,0x10,0x20,0x20,0x10,0x0F,0x00}, // 0 16
+ {0x00,0x10,0x10,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00}, // 1 17
+ {0x00,0x70,0x08,0x08,0x08,0x88,0x70,0x00,0x00,0x30,0x28,0x24,0x22,0x21,0x30,0x00}, // 2 18
+ {0x00,0x30,0x08,0x88,0x88,0x48,0x30,0x00,0x00,0x18,0x20,0x20,0x20,0x11,0x0E,0x00}, // 3 19
+ {0x00,0x00,0xC0,0x20,0x10,0xF8,0x00,0x00,0x00,0x07,0x04,0x24,0x24,0x3F,0x24,0x00}, // 4 20
+ {0x00,0xF8,0x08,0x88,0x88,0x08,0x08,0x00,0x00,0x19,0x21,0x20,0x20,0x11,0x0E,0x00}, // 5 21
+ {0x00,0xE0,0x10,0x88,0x88,0x18,0x00,0x00,0x00,0x0F,0x11,0x20,0x20,0x11,0x0E,0x00}, // 6 22
+ {0x00,0x38,0x08,0x08,0xC8,0x38,0x08,0x00,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00}, // 7 23
+ {0x00,0x70,0x88,0x08,0x08,0x88,0x70,0x00,0x00,0x1C,0x22,0x21,0x21,0x22,0x1C,0x00}, // 8 24
+ {0x00,0xE0,0x10,0x08,0x08,0x10,0xE0,0x00,0x00,0x00,0x31,0x22,0x22,0x11,0x0F,0x00}, // 9 25
+ {0x00,0x00,0x00,0xC0,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x30,0x00,0x00,0x00}, // : 26
+ {0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x60,0x00,0x00,0x00,0x00}, // ; 27
+ {0x00,0x00,0x80,0x40,0x20,0x10,0x08,0x00,0x00,0x01,0x02,0x04,0x08,0x10,0x20,0x00}, // < 28
+ {0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x00,0x04,0x04,0x04,0x04,0x04,0x04,0x04,0x00}, // = 29
+ {0x00,0x08,0x10,0x20,0x40,0x80,0x00,0x00,0x00,0x20,0x10,0x08,0x04,0x02,0x01,0x00}, // > 30
+ {0x00,0x70,0x48,0x08,0x08,0x08,0xF0,0x00,0x00,0x00,0x00,0x30,0x36,0x01,0x00,0x00}, // ? 31
+ {0xC0,0x30,0xC8,0x28,0xE8,0x10,0xE0,0x00,0x07,0x18,0x27,0x24,0x23,0x14,0x0B,0x00}, // @ 32
+ {0x00,0x00,0xC0,0x38,0xE0,0x00,0x00,0x00,0x20,0x3C,0x23,0x02,0x02,0x27,0x38,0x20}, // A 33
+ {0x08,0xF8,0x88,0x88,0x88,0x70,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x11,0x0E,0x00}, // B 34
+ {0xC0,0x30,0x08,0x08,0x08,0x08,0x38,0x00,0x07,0x18,0x20,0x20,0x20,0x10,0x08,0x00}, // C 35
+ {0x08,0xF8,0x08,0x08,0x08,0x10,0xE0,0x00,0x20,0x3F,0x20,0x20,0x20,0x10,0x0F,0x00}, // D 36
+ {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x20,0x23,0x20,0x18,0x00}, // E 37
+ {0x08,0xF8,0x88,0x88,0xE8,0x08,0x10,0x00,0x20,0x3F,0x20,0x00,0x03,0x00,0x00,0x00}, // F 38
+ {0xC0,0x30,0x08,0x08,0x08,0x38,0x00,0x00,0x07,0x18,0x20,0x20,0x22,0x1E,0x02,0x00}, // G 39
+ {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x20,0x3F,0x21,0x01,0x01,0x21,0x3F,0x20}, // H 40
+ {0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00}, // I 41
+ {0x00,0x00,0x08,0x08,0xF8,0x08,0x08,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00,0x00}, // J 42
+ {0x08,0xF8,0x88,0xC0,0x28,0x18,0x08,0x00,0x20,0x3F,0x20,0x01,0x26,0x38,0x20,0x00}, // K 43
+ {0x08,0xF8,0x08,0x00,0x00,0x00,0x00,0x00,0x20,0x3F,0x20,0x20,0x20,0x20,0x30,0x00}, // L 44
+ {0x08,0xF8,0xF8,0x00,0xF8,0xF8,0x08,0x00,0x20,0x3F,0x00,0x3F,0x00,0x3F,0x20,0x00}, // M 45
+ {0x08,0xF8,0x30,0xC0,0x00,0x08,0xF8,0x08,0x20,0x3F,0x20,0x00,0x07,0x18,0x3F,0x00}, // N 46
+ {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x10,0x20,0x20,0x20,0x10,0x0F,0x00}, // O 47
+ {0x08,0xF8,0x08,0x08,0x08,0x08,0xF0,0x00,0x20,0x3F,0x21,0x01,0x01,0x01,0x00,0x00}, // P 48
+ {0xE0,0x10,0x08,0x08,0x08,0x10,0xE0,0x00,0x0F,0x18,0x24,0x24,0x38,0x50,0x4F,0x00}, // Q 49
+ {0x08,0xF8,0x88,0x88,0x88,0x88,0x70,0x00,0x20,0x3F,0x20,0x00,0x03,0x0C,0x30,0x20}, // R 50
+ {0x00,0x70,0x88,0x08,0x08,0x08,0x38,0x00,0x00,0x38,0x20,0x21,0x21,0x22,0x1C,0x00}, // S 51
+ {0x18,0x08,0x08,0xF8,0x08,0x08,0x18,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00}, // T 52
+ {0x08,0xF8,0x08,0x00,0x00,0x08,0xF8,0x08,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00}, // U 53
+ {0x08,0x78,0x88,0x00,0x00,0xC8,0x38,0x08,0x00,0x00,0x07,0x38,0x0E,0x01,0x00,0x00}, // V 54
+ {0xF8,0x08,0x00,0xF8,0x00,0x08,0xF8,0x00,0x03,0x3C,0x07,0x00,0x07,0x3C,0x03,0x00}, // W 55
+ {0x08,0x18,0x68,0x80,0x80,0x68,0x18,0x08,0x20,0x30,0x2C,0x03,0x03,0x2C,0x30,0x20}, // X 56
+ {0x08,0x38,0xC8,0x00,0xC8,0x38,0x08,0x00,0x00,0x00,0x20,0x3F,0x20,0x00,0x00,0x00}, // Y 57
+ {0x10,0x08,0x08,0x08,0xC8,0x38,0x08,0x00,0x20,0x38,0x26,0x21,0x20,0x20,0x18,0x00}, // Z 58
+ {0x00,0x00,0x00,0xFE,0x02,0x02,0x02,0x00,0x00,0x00,0x00,0x7F,0x40,0x40,0x40,0x00}, // [ 59
+ {0x00,0x0C,0x30,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x06,0x38,0xC0,0x00}, // \ 60
+ {0x00,0x02,0x02,0x02,0xFE,0x00,0x00,0x00,0x00,0x40,0x40,0x40,0x7F,0x00,0x00,0x00}, // ] 61
+ {0x00,0x00,0x04,0x02,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ^ 62
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80}, // _ 63
+ {0x00,0x02,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}, // ` 64
+ {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x19,0x24,0x22,0x22,0x22,0x3F,0x20}, // a 65
+ {0x08,0xF8,0x00,0x80,0x80,0x00,0x00,0x00,0x00,0x3F,0x11,0x20,0x20,0x11,0x0E,0x00}, // b 66
+ {0x00,0x00,0x00,0x80,0x80,0x80,0x00,0x00,0x00,0x0E,0x11,0x20,0x20,0x20,0x11,0x00}, // c 67
+ {0x00,0x00,0x00,0x80,0x80,0x88,0xF8,0x00,0x00,0x0E,0x11,0x20,0x20,0x10,0x3F,0x20}, // d 68
+ {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x22,0x22,0x22,0x22,0x13,0x00}, // e 69
+ {0x00,0x80,0x80,0xF0,0x88,0x88,0x88,0x18,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00}, // f 70
+ {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x6B,0x94,0x94,0x94,0x93,0x60,0x00}, // g 71
+ {0x08,0xF8,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20}, // h 72
+ {0x00,0x80,0x98,0x98,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00}, // i 73
+ {0x00,0x00,0x00,0x80,0x98,0x98,0x00,0x00,0x00,0xC0,0x80,0x80,0x80,0x7F,0x00,0x00}, // j 74
+ {0x08,0xF8,0x00,0x00,0x80,0x80,0x80,0x00,0x20,0x3F,0x24,0x02,0x2D,0x30,0x20,0x00}, // k 75
+ {0x00,0x08,0x08,0xF8,0x00,0x00,0x00,0x00,0x00,0x20,0x20,0x3F,0x20,0x20,0x00,0x00}, // l 76
+ {0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x20,0x3F,0x20,0x00,0x3F,0x20,0x00,0x3F}, // m 77
+ {0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x3F,0x21,0x00,0x00,0x20,0x3F,0x20}, // n 78
+ {0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x00,0x1F,0x20,0x20,0x20,0x20,0x1F,0x00}, // o 79
+ {0x80,0x80,0x00,0x80,0x80,0x00,0x00,0x00,0x80,0xFF,0xA1,0x20,0x20,0x11,0x0E,0x00}, // p 80
+ {0x00,0x00,0x00,0x80,0x80,0x80,0x80,0x00,0x00,0x0E,0x11,0x20,0x20,0xA0,0xFF,0x80}, // q 81
+ {0x80,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x20,0x20,0x3F,0x21,0x20,0x00,0x01,0x00}, // r 82
+ {0x00,0x00,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x33,0x24,0x24,0x24,0x24,0x19,0x00}, // s 83
+ {0x00,0x80,0x80,0xE0,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x1F,0x20,0x20,0x00,0x00}, // t 84
+ {0x80,0x80,0x00,0x00,0x00,0x80,0x80,0x00,0x00,0x1F,0x20,0x20,0x20,0x10,0x3F,0x20}, // u 85
+ {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x00,0x01,0x0E,0x30,0x08,0x06,0x01,0x00}, // v 86
+ {0x80,0x80,0x00,0x80,0x00,0x80,0x80,0x80,0x0F,0x30,0x0C,0x03,0x0C,0x30,0x0F,0x00}, // w 87
+ {0x00,0x80,0x80,0x00,0x80,0x80,0x80,0x00,0x00,0x20,0x31,0x2E,0x0E,0x31,0x20,0x00}, // x 88
+ {0x80,0x80,0x80,0x00,0x00,0x80,0x80,0x80,0x80,0x81,0x8E,0x70,0x18,0x06,0x01,0x00}, // y 89
+ {0x00,0x80,0x80,0x80,0x80,0x80,0x80,0x00,0x00,0x21,0x30,0x2C,0x22,0x21,0x30,0x00}, // z 90
+ {0x00,0x00,0x00,0x00,0x80,0x7C,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x3F,0x40,0x40}, // { 91
+ {0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00}, // | 92
+ {0x00,0x02,0x02,0x7C,0x80,0x00,0x00,0x00,0x00,0x40,0x40,0x3F,0x00,0x00,0x00,0x00}, // } 93
+ {0x00,0x06,0x01,0x01,0x02,0x02,0x04,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} // ~ 94
+};
+
+const uint8 ascii_font_6x8[][6] =
+{
+ // <阴码> <列行式> <逆向> <6*8>
+ // <纵向 8bit 为一个数据模型> <横向取模>
+
+ // 字模数据储存格式为：{byte1, byte2,....byte6}
+
+ // 字模数据与像素对应关系
+ // byte 1 2 3 4 5 6
+ // bit [ 0] [ 8] [ 16] [ 24] [ 32] [ 40]
+ // bit [ 1] [ 9] [ 17] [ 25] [ 33] [ 41]
+ // bit [ 2] [ 10] [ 18] [ 26] [ 34] [ 42]
+ // bit [ 3] [ 11] [ 19] [ 37] [ 35] [ 43]
+ // bit [ 4] [ 12] [ 20] [ 38] [ 36] [ 44]
+ // bit [ 5] [ 13] [ 21] [ 39] [ 37] [ 45]
+ // bit [ 6] [ 14] [ 22] [ 30] [ 38] [ 46]
+ // bit [ 7] [ 15] [ 23] [ 31] [ 39] [ 47]
+
+
+ { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }, // 0
+ { 0x00, 0x00, 0x00, 0x2f, 0x00, 0x00 }, // ! 1
+ { 0x00, 0x00, 0x07, 0x00, 0x07, 0x00 }, // " 2
+ { 0x00, 0x14, 0x7f, 0x14, 0x7f, 0x14 }, // # 3
+ { 0x00, 0x24, 0x2a, 0x7f, 0x2a, 0x12 }, // $ 4
+ { 0x00, 0x62, 0x64, 0x08, 0x13, 0x23 }, // % 5
+ { 0x00, 0x36, 0x49, 0x55, 0x22, 0x50 }, // & 6
+ { 0x00, 0x00, 0x05, 0x03, 0x00, 0x00 }, // ' 7
+ { 0x00, 0x00, 0x1c, 0x22, 0x41, 0x00 }, // ( 8
+ { 0x00, 0x00, 0x41, 0x22, 0x1c, 0x00 }, // ) 9
+ { 0x00, 0x14, 0x08, 0x3E, 0x08, 0x14 }, // * 10
+ { 0x00, 0x08, 0x08, 0x3E, 0x08, 0x08 }, // + 11
+ { 0x00, 0x00, 0x00, 0xA0, 0x60, 0x00 }, // , 12
+ { 0x00, 0x08, 0x08, 0x08, 0x08, 0x08 }, // - 13
+ { 0x00, 0x00, 0x60, 0x60, 0x00, 0x00 }, // . 14
+ { 0x40, 0x20, 0x10, 0x08, 0x04, 0x02 }, // / 15
+ { 0x00, 0x3E, 0x51, 0x49, 0x45, 0x3E }, // 0 16
+ { 0x00, 0x00, 0x42, 0x7F, 0x40, 0x00 }, // 1 17
+ { 0x00, 0x42, 0x61, 0x51, 0x49, 0x46 }, // 2 18
+ { 0x00, 0x21, 0x41, 0x45, 0x4B, 0x31 }, // 3 19
+ { 0x00, 0x18, 0x14, 0x12, 0x7F, 0x10 }, // 4 20
+ { 0x00, 0x27, 0x45, 0x45, 0x45, 0x39 }, // 5 21
+ { 0x00, 0x3C, 0x4A, 0x49, 0x49, 0x30 }, // 6 22
+ { 0x00, 0x01, 0x71, 0x09, 0x05, 0x03 }, // 7 23
+ { 0x00, 0x36, 0x49, 0x49, 0x49, 0x36 }, // 8 24
+ { 0x00, 0x06, 0x49, 0x49, 0x29, 0x1E }, // 9 25
+ { 0x00, 0x00, 0x36, 0x36, 0x00, 0x00 }, // : 26
+ { 0x00, 0x00, 0x56, 0x36, 0x00, 0x00 }, // ; 27
+ { 0x00, 0x08, 0x14, 0x22, 0x41, 0x00 }, // < 28
+ { 0x00, 0x14, 0x14, 0x14, 0x14, 0x14 }, // = 29
+ { 0x00, 0x00, 0x41, 0x22, 0x14, 0x08 }, // > 30
+ { 0x00, 0x02, 0x01, 0x51, 0x09, 0x06 }, // ? 31
+ { 0x00, 0x32, 0x49, 0x59, 0x51, 0x3E }, // @ 32
+ { 0x00, 0x7C, 0x12, 0x11, 0x12, 0x7C }, // A 33
+ { 0x00, 0x7F, 0x49, 0x49, 0x49, 0x36 }, // B 34
+ { 0x00, 0x3E, 0x41, 0x41, 0x41, 0x22 }, // C 35
+ { 0x00, 0x7F, 0x41, 0x41, 0x22, 0x1C }, // D 36
+ { 0x00, 0x7F, 0x49, 0x49, 0x49, 0x41 }, // E 37
+ { 0x00, 0x7F, 0x09, 0x09, 0x09, 0x01 }, // F 38
+ { 0x00, 0x3E, 0x41, 0x49, 0x49, 0x7A }, // G 39
+ { 0x00, 0x7F, 0x08, 0x08, 0x08, 0x7F }, // H 40
+ { 0x00, 0x00, 0x41, 0x7F, 0x41, 0x00 }, // I 41
+ { 0x00, 0x20, 0x40, 0x41, 0x3F, 0x01 }, // J 42
+ { 0x00, 0x7F, 0x08, 0x14, 0x22, 0x41 }, // K 43
+ { 0x00, 0x7F, 0x40, 0x40, 0x40, 0x40 }, // L 44
+ { 0x00, 0x7F, 0x02, 0x0C, 0x02, 0x7F }, // M 45
+ { 0x00, 0x7F, 0x04, 0x08, 0x10, 0x7F }, // N 46
+ { 0x00, 0x3E, 0x41, 0x41, 0x41, 0x3E }, // O 47
+ { 0x00, 0x7F, 0x09, 0x09, 0x09, 0x06 }, // P 48
+ { 0x00, 0x3E, 0x41, 0x51, 0x21, 0x5E }, // Q 49
+ { 0x00, 0x7F, 0x09, 0x19, 0x29, 0x46 }, // R 50
+ { 0x00, 0x46, 0x49, 0x49, 0x49, 0x31 }, // S 51
+ { 0x00, 0x01, 0x01, 0x7F, 0x01, 0x01 }, // T 52
+ { 0x00, 0x3F, 0x40, 0x40, 0x40, 0x3F }, // U 53
+ { 0x00, 0x1F, 0x20, 0x40, 0x20, 0x1F }, // V 54
+ { 0x00, 0x3F, 0x40, 0x38, 0x40, 0x3F }, // W 55
+ { 0x00, 0x63, 0x14, 0x08, 0x14, 0x63 }, // X 56
+ { 0x00, 0x07, 0x08, 0x70, 0x08, 0x07 }, // Y 57
+ { 0x00, 0x61, 0x51, 0x49, 0x45, 0x43 }, // Z 58
+ { 0x00, 0x00, 0x7F, 0x41, 0x41, 0x00 }, // [ 59
+ { 0x02, 0x04, 0x08, 0x10, 0x20, 0x40 }, // \ 60
+ { 0x00, 0x00, 0x41, 0x41, 0x7F, 0x00 }, // ] 61
+ { 0x00, 0x04, 0x02, 0x01, 0x02, 0x04 }, // ^ 62
+ { 0x00, 0x40, 0x40, 0x40, 0x40, 0x40 }, // _ 63
+ { 0x00, 0x00, 0x01, 0x02, 0x04, 0x00 }, // ` 64
+ { 0x00, 0x20, 0x54, 0x54, 0x54, 0x78 }, // a 65
+ { 0x00, 0x7F, 0x48, 0x44, 0x44, 0x38 }, // b 66
+ { 0x00, 0x38, 0x44, 0x44, 0x44, 0x20 }, // c 67
+ { 0x00, 0x38, 0x44, 0x44, 0x48, 0x7F }, // d 68
+ { 0x00, 0x38, 0x54, 0x54, 0x54, 0x18 }, // e 69
+ { 0x00, 0x08, 0x7E, 0x09, 0x01, 0x02 }, // f 70
+ { 0x00, 0x18, 0xA4, 0xA4, 0xA4, 0x7C }, // g 71
+ { 0x00, 0x7F, 0x08, 0x04, 0x04, 0x78 }, // h 72
+ { 0x00, 0x00, 0x44, 0x7D, 0x40, 0x00 }, // i 73
+ { 0x00, 0x40, 0x80, 0x84, 0x7D, 0x00 }, // j 74
+ { 0x00, 0x7F, 0x10, 0x28, 0x44, 0x00 }, // k 75
+ { 0x00, 0x00, 0x41, 0x7F, 0x40, 0x00 }, // l 76
+ { 0x00, 0x7C, 0x04, 0x18, 0x04, 0x78 }, // m 77
+ { 0x00, 0x7C, 0x08, 0x04, 0x04, 0x78 }, // n 78
+ { 0x00, 0x38, 0x44, 0x44, 0x44, 0x38 }, // o 79
+ { 0x00, 0xFC, 0x24, 0x24, 0x24, 0x18 }, // p 80
+ { 0x00, 0x18, 0x24, 0x24, 0x18, 0xFC }, // q 81
+ { 0x00, 0x7C, 0x08, 0x04, 0x04, 0x08 }, // r 82
+ { 0x00, 0x48, 0x54, 0x54, 0x54, 0x20 }, // s 83
+ { 0x00, 0x04, 0x3F, 0x44, 0x40, 0x20 }, // t 84
+ { 0x00, 0x3C, 0x40, 0x40, 0x20, 0x7C }, // u 85
+ { 0x00, 0x1C, 0x20, 0x40, 0x20, 0x1C }, // v 86
+ { 0x00, 0x3C, 0x40, 0x30, 0x40, 0x3C }, // w 87
+ { 0x00, 0x44, 0x28, 0x10, 0x28, 0x44 }, // x 88
+ { 0x00, 0x1C, 0xA0, 0xA0, 0xA0, 0x7C }, // y 89
+ { 0x00, 0x44, 0x64, 0x54, 0x4C, 0x44 }, // z 90
+ { 0x14, 0x14, 0x14, 0x14, 0x14, 0x14 } // horiz lines
+};
+
+//-------------------------------------------------------------------------------------------------------------------
+// 使用PCtoLCD2002软件取模
+// 阴码、逐行式、顺向 16*16
+//-------------------------------------------------------------------------------------------------------------------
+const uint8 chinese_test[8][16] =
+{
+ {0x00,0x00,0x23,0xFC,0x10,0x40,0x10,0x80,0x01,0x44,0x06,0x68,0xF0,0xB0,0x11,0x28},
+ {0x16,0x68,0x10,0xA4,0x11,0x24,0x16,0x20,0x10,0xA0,0x28,0x40,0x47,0xFE,0x00,0x00},/*"逐",0*/
+ {0x00,0x00,0xFF,0xC0,0x00,0x40,0x00,0x44,0x00,0x48,0x00,0x50,0x00,0x60,0x00,0x50},
+ {0x00,0x48,0x00,0x44,0x00,0x20,0x00,0x20,0x00,0x12,0x00,0x0A,0x00,0x06,0x00,0x02},/*"飞",1*/
+ {0x08,0x10,0x1D,0x10,0xF0,0x90,0x10,0x90,0x10,0x10,0xFD,0x10,0x10,0x90,0x38,0x90},
+ {0x34,0x10,0x50,0x1E,0x53,0xF0,0x90,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10},/*"科",2*/
+ {0x10,0x20,0x10,0x20,0x10,0x20,0x13,0xFE,0xFC,0x20,0x10,0x20,0x10,0x20,0x15,0xFC},
+ {0x18,0x84,0x30,0x88,0xD0,0x48,0x10,0x50,0x10,0x20,0x10,0x50,0x51,0x88,0x26,0x06},/*"技",3*/
+};
+
+//-------------------------------------------------------------------------------------------------------------------
+// 使用PCtoLCD2002软件取模
+// 阴码、列行式、逆向 16*16
+//-------------------------------------------------------------------------------------------------------------------
+const uint8 oled_16x16_chinese[][16]=
+{
+ {0x40,0x40,0x42,0xCC,0x00,0x20,0x22,0x92,0x4A,0x36,0xE2,0x42,0xA2,0x12,0x00,0x00},
+ {0x00,0x40,0x20,0x1F,0x20,0x49,0x49,0x44,0x52,0x61,0x5F,0x40,0x41,0x46,0x40,0x00},/*"逐",0*/
+ {0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0x02,0xFE,0x40,0xA0,0x10,0x08,0x00,0x00},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x0C,0x10,0x21,0x42,0xF0,0x00},/*"飞",1*/
+ {0x24,0x24,0xA4,0xFE,0xA3,0x22,0x00,0x22,0xCC,0x00,0x00,0xFF,0x00,0x00,0x00,0x00},
+ {0x08,0x06,0x01,0xFF,0x00,0x01,0x04,0x04,0x04,0x04,0x04,0xFF,0x02,0x02,0x02,0x00},/*"科",2*/
+ {0x10,0x10,0x10,0xFF,0x10,0x90,0x08,0x88,0x88,0x88,0xFF,0x88,0x88,0x88,0x08,0x00},
+ {0x04,0x44,0x82,0x7F,0x01,0x80,0x80,0x40,0x43,0x2C,0x10,0x28,0x46,0x81,0x80,0x00},/*"技",3*/
+};
+
+//16位BMP 240*80 逐飞科技logo图像取模数据
+//Image2LCD取模选项设置
+//水平扫描
+//16位
+//240*80
+//不包含图像头数据
+//自左至右
+//自顶至底
+//低位在前
+IFX_ALIGN(4) const unsigned char gImage_seekfree_logo[38400] = { /* 0X00,0X10,0XF0,0X00,0X50,0X00,0X01,0X1B, */
+0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
+0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
+0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
+0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,0XFF,
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+};
+
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_font.h b/Example/E15_fft_demo/libraries/zf_common/zf_common_font.h
new file mode 100644
index 0000000..716e38f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_font.h
@@ -0,0 +1,68 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_font
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_common_font_h
+#define _zf_common_font_h
+
+#include "zf_common_typedef.h"
+
+//-------常用颜色----------
+typedef enum
+{
+ RGB565_WHITE = (0xFFFF), // 白色
+ RGB565_BLACK = (0x0000), // 黑色
+ RGB565_BLUE = (0x001F), // 蓝色
+ RGB565_PURPLE = (0xF81F), // 紫色
+ RGB565_PINK = (0xFE19), // 粉色
+ RGB565_RED = (0xF800), // 红色
+ RGB565_MAGENTA = (0xF81F), // 品红
+ RGB565_GREEN = (0x07E0), // 绿色
+ RGB565_CYAN = (0x07FF), // 青色
+ RGB565_YELLOW = (0xFFE0), // 黄色
+ RGB565_BROWN = (0xBC40), // 棕色
+ RGB565_GRAY = (0x8430), // 灰色
+
+ RGB565_39C5BB = (0x3616),
+ RGB565_66CCFF = (0x665F),
+}rgb565_color_enum;
+
+extern const uint8 ascii_font_8x16[][16];
+extern const uint8 ascii_font_6x8[][6];
+extern const uint8 chinese_test[8][16];
+extern const uint8 oled_16x16_chinese[][16];
+extern const uint8 gImage_seekfree_logo[38400];
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_function.c b/Example/E15_fft_demo/libraries/zf_common/zf_common_function.c
new file mode 100644
index 0000000..a6b9009
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_function.c
@@ -0,0 +1,905 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_function
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_common_function.h"
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取整型数的最大公约数 九章算术之更相减损术
+// 参数说明 num1 数字1
+// 参数说明 num2 数字2
+// 返回参数 uint32 最大公约数
+// 使用示例 return func_get_greatest_common_divisor(144, 36); // 获取 144 与 36 的最大公约数
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 func_get_greatest_common_divisor (uint32 num1, uint32 num2)
+{
+ while(num1 != num2)
+ {
+ if(num1 > num2)
+ {
+ num1 = num1 - num2;
+ }
+ if(num1 < num2)
+ {
+ num2 = num2 - num1;
+ }
+ }
+ return num1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件延时
+// 参数说明 t 延时时间
+// 返回参数 void
+// 使用示例 func_soft_delay(100);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void func_soft_delay (volatile long t)
+{
+ while(t --);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 字符串转整形数字 数据范围是 [-32768,32767]
+// 参数说明 *str 传入字符串 可带符号
+// 返回参数 int32 转换后的数据
+// 使用示例 int32 dat = func_str_to_int("-100");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+int32 func_str_to_int (char *str)
+{
+ zf_assert(str != NULL);
+ uint8 sign = 0; // 标记符号 0-正数 1-负数
+ int32 temp = 0; // 临时计算变量
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ if('-' == *str) // 如果第一个字符是负号
+ {
+ sign = 1; // 标记负数
+ str ++;
+ }
+ else if('+' == *str) // 如果第一个字符是正号
+ {
+ str ++;
+ }
+
+ while(('0' <= *str) && ('9' >= *str)) // 确定这是个数字
+ {
+ temp = temp * 10 + ((uint8)(*str) - 0x30); // 计算数值
+ str ++;
+ }
+
+ if(sign)
+ {
+ temp = -temp;
+ }
+ }while(0);
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 整形数字转字符串 数据范围是 [-32768,32767]
+// 参数说明 *str 字符串指针
+// 参数说明 number 传入的数据
+// 返回参数 void
+// 使用示例 func_int_to_str(data_buffer, -300);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void func_int_to_str (char *str, int32 number)
+{
+ zf_assert(str != NULL);
+ uint8 data_temp[16]; // 缓冲区
+ uint8 bit = 0; // 数字位数
+ int32 number_temp = 0;
+
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ if(0 > number) // 负数
+ {
+ *str ++ = '-';
+ number = -number;
+ }
+ else if(0 == number) // 或者这是个 0
+ {
+ *str = '0';
+ break;
+ }
+
+ while(0 != number) // 循环直到数值归零
+ {
+ number_temp = number % 10;
+ data_temp[bit ++] = func_abs(number_temp); // 倒序将数值提取出来
+ number /= 10; // 削减被提取的个位数
+ }
+ while(0 != bit) // 提取的数字个数递减处理
+ {
+ *str ++ = (data_temp[bit - 1] + 0x30); // 将数字从倒序数组中倒序取出 变成正序放入字符串
+ bit --;
+ }
+ }while(0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 字符串转整形数字 数据范围是 [0,65535]
+// 参数说明 *str 传入字符串 无符号
+// 返回参数 uint32 转换后的数据
+// 使用示例 uint32 dat = func_str_to_uint("100");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 func_str_to_uint (char *str)
+{
+ zf_assert(str != NULL);
+ uint32 temp = 0; // 临时计算变量
+
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ while(('0' <= *str) && ('9' >= *str)) // 确定这是个数字
+ {
+ temp = temp * 10 + ((uint8)(*str) - 0x30); // 计算数值
+ str ++;
+ }
+ }while(0);
+
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 整形数字转字符串 数据范围是 [0,65535]
+// 参数说明 *str 字符串指针
+// 参数说明 number 传入的数据
+// 返回参数 void
+// 使用示例 func_uint_to_str(data_buffer, 300);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void func_uint_to_str (char *str, uint32 number)
+{
+ zf_assert(str != NULL);
+ int8 data_temp[16]; // 缓冲区
+ uint8 bit = 0; // 数字位数
+
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ if(0 == number) // 这是个 0
+ {
+ *str = '0';
+ break;
+ }
+
+ while(0 != number) // 循环直到数值归零
+ {
+ data_temp[bit ++] = (number % 10); // 倒序将数值提取出来
+ number /= 10; // 削减被提取的个位数
+ }
+ while(0 != bit) // 提取的数字个数递减处理
+ {
+ *str ++ = (data_temp[bit - 1] + 0x30); // 将数字从倒序数组中倒序取出 变成正序放入字符串
+ bit --;
+ }
+ }while(0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 字符串转浮点数 有效累计精度为小数点后六位
+// 参数说明 *str 传入字符串 可带符号
+// 返回参数 float 转换后的数据
+// 使用示例 float dat = func_str_to_float("-100.2");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float func_str_to_float (char *str)
+{
+ zf_assert(str != NULL);
+ uint8 sign = 0; // 标记符号 0-正数 1-负数
+ float temp = 0.0; // 临时计算变量 整数部分
+ float temp_point = 0.0; // 临时计算变量 小数部分
+ float point_bit = 1; // 小数累计除数
+
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ if('-' == *str) // 负数
+ {
+ sign = 1; // 标记负数
+ str ++;
+ }
+ else if('+' == *str) // 如果第一个字符是正号
+ {
+ str ++;
+ }
+
+ // 提取整数部分
+ while(('0' <= *str) && ('9' >= *str)) // 确定这是个数字
+ {
+ temp = temp * 10 + ((uint8)(*str) - 0x30); // 将数值提取出来
+ str ++;
+ }
+ if('.' == *str)
+ {
+ str ++;
+ while(('0' <= *str) && ('9' >= *str) && point_bit < 1000000.0) // 确认这是个数字 并且精度控制还没到六位
+ {
+ temp_point = temp_point * 10 + ((uint8)(*str) - 0x30); // 提取小数部分数值
+ point_bit *= 10; // 计算这部分小数的除数
+ str ++;
+ }
+ temp_point /= point_bit; // 计算小数
+ }
+ temp += temp_point; // 将数值拼合
+
+ if(sign)
+ {
+ temp = -temp;
+ }
+ }while(0);
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 浮点数字转字符串
+// 参数说明 *str 字符串指针
+// 参数说明 number 传入的数据
+// 参数说明 point_bit 小数点精度
+// 返回参数 void
+// 使用示例 func_float_to_str(data_buffer, 3.1415, 2); // 结果输出 data_buffer = "3.14"
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void func_float_to_str (char *str, float number, uint8 point_bit)
+{
+ zf_assert(str != NULL);
+ int data_int = 0; // 整数部分
+ int data_float = 0.0; // 小数部分
+ int data_temp[8]; // 整数字符缓冲
+ int data_temp_point[6]; // 小数字符缓冲
+ uint8 bit = point_bit; // 转换精度位数
+
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ // 提取整数部分
+ data_int = (int)number; // 直接强制转换为 int
+ if(0 > number) // 判断源数据是正数还是负数
+ {
+ *str ++ = '-';
+ }
+ else if(0.0 == number) // 如果是个 0
+ {
+ *str ++ = '0';
+ *str ++ = '.';
+ *str = '0';
+ break;
+ }
+
+ // 提取小数部分
+ number = number - data_int; // 减去整数部分即可
+ while(bit --)
+ {
+ number = number * 10; // 将需要的小数位数提取到整数部分
+ }
+ data_float = (int)number; // 获取这部分数值
+
+ // 整数部分转为字符串
+ bit = 0;
+ do
+ {
+ data_temp[bit ++] = data_int % 10; // 将整数部分倒序写入字符缓冲区
+ data_int /= 10;
+ }while(0 != data_int);
+ while(0 != bit)
+ {
+ *str ++ = (func_abs(data_temp[bit - 1]) + 0x30); // 再倒序将倒序的数值写入字符串 得到正序数值
+ bit --;
+ }
+
+ // 小数部分转为字符串
+ if(point_bit != 0)
+ {
+ bit = 0;
+ *str ++ = '.';
+ if(0 == data_float)
+ {
+ *str = '0';
+ }
+ else
+ {
+ while(0 != point_bit) // 判断有效位数
+ {
+ data_temp_point[bit ++] = data_float % 10; // 倒序写入字符缓冲区
+ data_float /= 10;
+ point_bit --;
+ }
+ while(0 != bit)
+ {
+ *str ++ = (func_abs(data_temp_point[bit - 1]) + 0x30); // 再倒序将倒序的数值写入字符串 得到正序数值
+ bit --;
+ }
+ }
+ }
+ }while(0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 字符串转浮点数 有效累计精度为小数点后九位
+// 参数说明 str 传入字符串 可带符号
+// 返回参数 double 转换后的数据
+// 使用示例 double dat = func_str_to_double("-100.2");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+double func_str_to_double (char *str)
+{
+ zf_assert(str != NULL);
+ uint8 sign = 0; // 标记符号 0-正数 1-负数
+ double temp = 0.0; // 临时计算变量 整数部分
+ double temp_point = 0.0; // 临时计算变量 小数部分
+ double point_bit = 1; // 小数累计除数
+
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ if('-' == *str) // 负数
+ {
+ sign = 1; // 标记负数
+ str ++;
+ }
+ else if('+' == *str) // 如果第一个字符是正号
+ {
+ str ++;
+ }
+
+ // 提取整数部分
+ while(('0' <= *str) && ('9' >= *str)) // 确定这是个数字
+ {
+ temp = temp * 10 + ((uint8)(*str) - 0x30); // 将数值提取出来
+ str ++;
+ }
+ if('.' == *str)
+ {
+ str ++;
+ while(('0' <= *str) && ('9' >= *str) && point_bit < 1000000000.0) // 确认这是个数字 并且精度控制还没到九位
+ {
+ temp_point = temp_point * 10 + ((uint8)(*str) - 0x30); // 提取小数部分数值
+ point_bit *= 10; // 计算这部分小数的除数
+ str ++;
+ }
+ temp_point /= point_bit; // 计算小数
+ }
+ temp += temp_point; // 将数值拼合
+
+ if(sign)
+ {
+ temp = -temp;
+ }
+ }while(0);
+ return temp;
+
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 浮点数字转字符串
+// 参数说明 *str 字符串指针
+// 参数说明 number 传入的数据
+// 参数说明 point_bit 小数点精度
+// 返回参数 void
+// 使用示例 func_double_to_str(data_buffer, 3.1415, 2); // 结果输出 data_buffer = "3.14"
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void func_double_to_str (char *str, double number, uint8 point_bit)
+{
+ zf_assert(str != NULL);
+ int data_int = 0; // 整数部分
+ int data_float = 0.0; // 小数部分
+ int data_temp[12]; // 整数字符缓冲
+ int data_temp_point[9]; // 小数字符缓冲
+ uint8 bit = point_bit; // 转换精度位数
+
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ // 提取整数部分
+ data_int = (int)number; // 直接强制转换为 int
+ if(0 > number) // 判断源数据是正数还是负数
+ {
+ *str ++ = '-';
+ }
+ else if(0.0 == number) // 如果是个 0
+ {
+ *str ++ = '0';
+ *str ++ = '.';
+ *str = '0';
+ break;
+ }
+
+ // 提取小数部分
+ number = number - data_int; // 减去整数部分即可
+ while(bit --)
+ {
+ number = number * 10; // 将需要的小数位数提取到整数部分
+ }
+ data_float = (int)number; // 获取这部分数值
+
+ // 整数部分转为字符串
+ bit = 0;
+ do
+ {
+ data_temp[bit ++] = data_int % 10; // 将整数部分倒序写入字符缓冲区
+ data_int /= 10;
+ }while(0 != data_int);
+ while(0 != bit)
+ {
+ *str ++ = (func_abs(data_temp[bit - 1]) + 0x30); // 再倒序将倒序的数值写入字符串 得到正序数值
+ bit --;
+ }
+
+ // 小数部分转为字符串
+ if(point_bit != 0)
+ {
+ bit = 0;
+ *str ++ = '.';
+ if(0 == data_float)
+ *str = '0';
+ else
+ {
+ while(0 != point_bit) // 判断有效位数
+ {
+ data_temp_point[bit ++] = data_float % 10; // 倒序写入字符缓冲区
+ data_float /= 10;
+ point_bit --;
+ }
+ while(0 != bit)
+ {
+ *str ++ = (func_abs(data_temp_point[bit - 1]) + 0x30); // 再倒序将倒序的数值写入字符串 得到正序数值
+ bit --;
+ }
+ }
+ }
+ }while(0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 字符串转 Hex
+// 参数说明 str 传入字符串 无符号
+// 返回参数 uint32 转换后的数据
+// 使用示例 uint32 dat = func_str_to_hex("0x11");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 func_str_to_hex (char *str)
+{
+ zf_assert(str != NULL);
+ uint32 str_len = strlen(str); // 字符串长
+ uint32 result_data = 0; // 结果缓存
+ uint8 temp = 0; // 计算变量
+ uint8 flag = 0; // 标志位
+
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ if(flag)
+ {
+ if(('a' <= *str) && ('f' >= *str))
+ {
+ temp = (*str - 87);
+ }
+ else if(('A' <= *str) && ('F' >= *str))
+ {
+ temp = (*str - 55);
+ }
+ else if(('0' <= *str) && ('9' >= *str))
+ {
+ temp = (*str - 48);
+ }
+ else
+ {
+ break;
+ }
+ result_data = ((result_data << 4) | (temp & 0x0F));
+ }
+ else
+ {
+// if(strncmp("0x", str, 2))
+ if((*str == '0') && (*(str + 1) == 'x'))
+ {
+ str ++;
+ flag = 1;
+ }
+ }
+ str ++;
+ }while(str_len --);
+
+ return result_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 Hex 转字符串
+// 参数说明 *str 字符串指针
+// 参数说明 number 传入的数据
+// 返回参数 void
+// 使用示例 func_hex_to_str(data_buffer, 0x11); // 结果输出 data_buffer = "0x11"
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void func_hex_to_str (char *str, uint32 number)
+{
+ zf_assert(str != NULL);
+ const char hex_index[16] = {
+ '0', '1', '2', '3',
+ '4', '5', '6', '7',
+ '8', '9', 'A', 'B',
+ 'C', 'D', 'E', 'F'};
+ int8 data_temp[12]; // 缓冲区
+ uint8 bit = 0; // 数字位数
+
+ *str++ = '0';
+ *str++ = 'x';
+ do
+ {
+ if(NULL == str)
+ {
+ break;
+ }
+
+ if(0 == number) // 这是个 0
+ {
+ *str = '0';
+ break;
+ }
+
+ while(0 != number) // 循环直到数值归零
+ {
+ data_temp[bit ++] = (number & 0xF); // 倒序将数值提取出来
+ number >>= 4; // 削减被提取的个位数
+ }
+ while(0 != bit) // 提取的数字个数递减处理
+ {
+ *str ++ = hex_index[data_temp[bit - 1]]; // 将数字从倒序数组中倒序取出 变成正序放入字符串
+ bit --;
+ }
+ }while(0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 数字转换为 ASCII 值
+// 参数说明 dat 传入的数据
+// 参数说明 *p 数据缓冲
+// 参数说明 neg_type 数据类型
+// 参数说明 radix 进制
+// 返回参数 uint8 数据
+// 使用示例 number_conversion_ascii((uint32)ival, vstr, 1, 10);
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 number_conversion_ascii (uint32 dat, int8 *p, uint8 neg_type, uint8 radix)
+{
+ int32 neg_dat;
+ uint32 pos_dat;
+ uint8 temp_data = 0;
+ uint8 valid_num = 0;
+
+ if(neg_type)
+ {
+ neg_dat = (int32)dat;
+ if(0 > neg_dat)
+ {
+ neg_dat = -neg_dat;
+ }
+ while(1)
+ {
+ *p = neg_dat%radix + '0';
+ neg_dat = neg_dat/radix;
+ valid_num ++;
+
+ if(!neg_dat)
+ {
+ break;
+ }
+ p ++;
+ }
+ }
+ else
+ {
+ pos_dat = dat;
+ while(1)
+ {
+ temp_data = pos_dat%radix;
+ if(10 <= temp_data)
+ {
+ temp_data += 'A'-10;
+ }
+ else
+ {
+ temp_data += '0';
+ }
+
+ *p = temp_data;
+
+ pos_dat = pos_dat/radix;
+ valid_num ++;
+
+ if(!pos_dat)
+ {
+ break;
+ }
+ p ++;
+ }
+ }
+ return valid_num;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 printf 显示转换
+// 参数说明 *d_buff 缓冲区
+// 参数说明 len 长度
+// 返回参数 void
+// 使用示例 printf_reverse_order(vstr, vlen);
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+static void printf_reverse_order (int8 *d_buff, uint32 len)
+{
+ uint32 i;
+ int8 temp_data;
+ for(i = 0; len / 2 > i; i ++)
+ {
+ temp_data = d_buff[len - 1 - i];
+ d_buff[len - 1 -i ] = d_buff[i];
+ d_buff[i] = temp_data;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 sprintf 函数实现
+// 参数说明 *buff 缓冲区
+// 参数说明 *format 源字符串
+// 参数说明 ... 可变参数列表
+// 返回参数 uint32 处理后数据长
+// 使用示例 zf_sprintf(buff, "Data : %d", 100);
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+uint32 zf_sprintf (int8 *buff, const int8 *format, ...)
+{
+ uint32 buff_len = 0;
+ va_list arg;
+ va_start(arg, format);
+
+ while (*format)
+ {
+ int8 ret = *format;
+ if ('%' == ret)
+ {
+ switch (*++ format)
+ {
+ case 'a':// 十六进制p计数法输出浮点数 暂未实现
+ {
+ }
+ break;
+
+ case 'c':// 一个字符
+ {
+ int8 ch = (int8)va_arg(arg, uint32);
+ *buff = ch;
+ buff ++;
+ buff_len ++;
+ }
+ break;
+
+ case 'd':
+ case 'i':// 有符号十进制整数
+ {
+ int8 vstr[33];
+ int32 ival = (int32)va_arg(arg, int32);
+ uint8 vlen = number_conversion_ascii((uint32)ival, vstr, 1, 10);
+
+ if(0 > ival)
+ {
+ vstr[vlen] = '-';
+ vlen ++;
+ }
+ printf_reverse_order(vstr, vlen);
+ memcpy(buff, vstr, vlen);
+ buff += vlen;
+ buff_len += vlen;
+ }
+ break;
+
+ case 'f':// 浮点数，输出小数点后六位 不能指定输出精度
+ case 'F':// 浮点数，输出小数点后六位 不能指定输出精度
+ {
+ int8 vstr[33];
+ double ival = (double)va_arg(arg, double);
+ uint8 vlen = number_conversion_ascii((uint32)(int32)ival, vstr, 1, 10);
+
+ if(0 > ival)
+ {
+ vstr[vlen] = '-';
+ vlen ++;
+ }
+ printf_reverse_order(vstr, vlen);
+ memcpy(buff, vstr, vlen);
+ buff += vlen;
+ buff_len += vlen;
+
+ ival = ((double)ival - (int32)ival)*1000000;
+ if(ival)
+ {
+ vlen = number_conversion_ascii((uint32)(int32)ival, vstr, 1, 10);
+ }
+ else
+ {
+ vstr[0] = vstr[1] = vstr[2] = vstr[3] = vstr[4] = vstr[5] = '0';
+ vlen = 6;
+ }
+
+ while(6 > vlen)
+ {
+ vstr[vlen] = '0';
+ vlen ++;
+ }
+
+ vstr[vlen] = '.';
+ vlen ++;
+
+ printf_reverse_order(vstr, vlen);
+ memcpy(buff, vstr, vlen);
+ buff_len += vlen;
+ }
+ break;
+
+ case 'u':// 无符号十进制整数
+ {
+ int8 vstr[33];
+ uint32 ival = (uint32)va_arg(arg, uint32);
+ uint8 vlen = number_conversion_ascii(ival, vstr, 0, 10);
+
+ printf_reverse_order(vstr, vlen);
+ memcpy(buff, vstr, vlen);
+ buff += vlen;
+ buff_len += vlen;
+ }
+ break;
+
+ case 'o':// 无符号八进制整数
+ {
+ int8 vstr[33];
+ uint32 ival = (uint32)va_arg(arg, uint32);
+ uint8 vlen = number_conversion_ascii(ival, vstr, 0, 8);
+
+ printf_reverse_order(vstr, vlen);
+ memcpy(buff, vstr, vlen);
+ buff += vlen;
+ buff_len += vlen;
+
+ }
+ break;
+
+ case 'x':// 无符号十六进制整数
+ case 'X':// 无符号十六进制整数
+ {
+ int8 vstr[33];
+ uint32 ival = (uint32)va_arg(arg, uint32);
+ uint8 vlen = number_conversion_ascii(ival, vstr, 0, 16);
+
+ printf_reverse_order(vstr, vlen);
+ memcpy(buff, vstr, vlen);
+ buff += vlen;
+ buff_len += vlen;
+ }
+ break;
+
+ case 's':// 字符串
+ {
+ int8 *pc = va_arg(arg, int8 *);
+ while (*pc)
+ {
+ *buff = *pc;
+ buff ++;
+ buff_len ++;
+ pc ++;
+ }
+ }
+ break;
+
+ case 'p':// 以16进制形式输出指针
+ {
+ int8 vstr[33];
+ uint32 ival = (uint32)va_arg(arg, uint32);
+ uint8 vlen = 0;
+ vlen = number_conversion_ascii(ival, vstr, 0, 16);
+ printf_reverse_order(vstr, 8);
+ memcpy(buff, vstr, 8);
+ buff += 8;
+ buff_len += 8;
+ }
+ break;
+
+ case '%':// 输出字符%
+ {
+ *buff = '%';
+ buff ++;
+ buff_len ++;
+ }
+ break;
+
+ default:
+ break;
+ }
+ }
+ else
+ {
+ *buff = (int8)(*format);
+ buff ++;
+ buff_len ++;
+ }
+ format ++;
+ }
+ va_end(arg);
+
+ return buff_len;
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_function.h b/Example/E15_fft_demo/libraries/zf_common/zf_common_function.h
new file mode 100644
index 0000000..f83bd95
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_function.h
@@ -0,0 +1,97 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_function
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_common_function_h_
+#define _zf_common_function_h_
+
+#include "zf_common_typedef.h"
+
+//====================================================宏定义函数区====================================================
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 绝对值函数 数据范围是 [-32767,32767]
+// 参数说明 dat 需要求绝对值的数
+// 返回参数 int 返回绝对值
+// 使用示例 dat = func_abs(dat); // 将dat变成正数
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+#define func_abs(x) ((x) >= 0 ? (x): -(x))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 限幅 数据范围是 [-32768,32767]
+// 参数说明 x 被限幅的数据
+// 参数说明 y 限幅范围(数据会被限制在-y至+y之间)
+// 返回参数 int 限幅之后的数据
+// 使用示例 int dat = func_limit(500, 300); // 数据被限制在-300至+300之间 因此返回的结果是300
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+#define func_limit(x, y) ((x) > (y) ? (y) : ((x) < -(y) ? -(y) : (x)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 双边限幅 数据范围是 [-32768,32767]
+// 参数说明 x 被限幅的数据
+// 参数说明 a 限幅范围左边界
+// 参数说明 b 限幅范围右边界
+// 返回参数 int 限幅之后的数据
+// 使用示例 int dat = func_limit_ab(500, -300, 400); //数据被限制在-300至+400之间 因此返回的结果是400
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+#define func_limit_ab(x, a, b) ((x) < (a) ? (a) : ((x) > (b) ? (b) : (x)))
+
+//====================================================宏定义函数区====================================================
+
+//=====================================================常规函数区=====================================================
+uint32 func_get_greatest_common_divisor (uint32 num1, uint32 num2);
+
+void func_soft_delay (volatile long t);
+
+int32 func_str_to_int (char *str);
+void func_int_to_str (char *str, int32 number);
+uint32 func_str_to_uint (char *str);
+void func_uint_to_str (char *str, uint32 number);
+float func_str_to_float (char *str);
+void func_float_to_str (char *str, float number, uint8 point_bit);
+double func_str_to_double (char *str);
+void func_double_to_str (char *str, double number, uint8 point_bit);
+uint32 func_str_to_hex (char *str);
+void func_hex_to_str (char *str, uint32 number);
+
+uint32 zf_sprintf (int8 *buff, const int8 *format, ...);
+//=====================================================常规函数区=====================================================
+
+
+#endif
+
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_headfile.h b/Example/E15_fft_demo/libraries/zf_common/zf_common_headfile.h
new file mode 100644
index 0000000..4e7194f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_headfile.h
@@ -0,0 +1,108 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_headfile
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_common_headfile_h_
+#define _zf_common_headfile_h_
+
+//===================================================C语言 函数库===================================================
+#include "math.h"
+#include "stdio.h"
+#include "stdint.h"
+#include "stdbool.h"
+#include "string.h"
+//===================================================C语言 函数库===================================================
+
+//===================================================芯片 SDK 底层===================================================
+#include "ifxAsclin_reg.h"
+#include "SysSe/Bsp/Bsp.h"
+#include "IfxCcu6_Timer.h"
+#include "IfxScuEru.h"
+//===================================================芯片 SDK 底层===================================================
+
+//====================================================开源库公共层====================================================
+#include "zf_common_typedef.h"
+#include "zf_common_clock.h"
+#include "zf_common_debug.h"
+#include "zf_common_fifo.h"
+#include "zf_common_font.h"
+#include "zf_common_function.h"
+#include "zf_common_interrupt.h"
+//====================================================开源库公共层====================================================
+
+//===================================================芯片外设驱动层===================================================
+#include "zf_driver_adc.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_dma.h"
+#include "zf_driver_encoder.h"
+#include "zf_driver_exti.h"
+#include "zf_driver_flash.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_pit.h"
+#include "zf_driver_pwm.h"
+#include "zf_driver_soft_iic.h"
+#include "zf_driver_spi.h"
+#include "zf_driver_soft_spi.h"
+#include "zf_driver_uart.h"
+#include "zf_driver_timer.h"
+//===================================================芯片外设驱动层===================================================
+
+//===================================================外接设备驱动层===================================================
+#include "zf_device_absolute_encoder.h"
+#include "zf_device_bluetooth_ch9141.h"
+#include "zf_device_gps_tau1201.h"
+#include "zf_device_camera.h"
+#include "zf_device_dl1a.h"
+#include "zf_device_icm20602.h"
+#include "zf_device_imu660ra.h"
+#include "zf_device_imu963ra.h"
+#include "zf_device_ips114.h"
+#include "zf_device_ips200.h"
+#include "zf_device_key.h"
+#include "zf_device_mpu6050.h"
+#include "zf_device_mt9v03x.h"
+#include "zf_device_oled.h"
+#include "zf_device_ov7725.h"
+#include "zf_device_scc8660.h"
+#include "zf_device_tft180.h"
+#include "zf_device_tsl1401.h"
+#include "zf_device_type.h"
+#include "zf_device_virtual_oscilloscope.h"
+#include "zf_device_wifi_uart.h"
+#include "zf_device_wireless_uart.h"
+//===================================================外接设备驱动层===================================================
+
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_interrupt.c b/Example/E15_fft_demo/libraries/zf_common/zf_common_interrupt.c
new file mode 100644
index 0000000..d077268
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_interrupt.c
@@ -0,0 +1,85 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_interrupt
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "SysSe/Bsp/Bsp.h"
+#include "zf_common_interrupt.h"
+#include "zf_driver_pit.h"
+#include "zf_driver_pwm.h"
+#include "zf_driver_exti.h"
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 全局中断使能
+// 参数说明 void
+// 返回参数 void
+// 使用示例 interrupt_global_enable(1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void interrupt_global_enable (uint32 primask)
+{
+ if(primask == 0)
+ {
+ enableInterrupts();
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 全局中断屏蔽
+// 参数说明 void
+// 返回参数 void
+// 使用示例 uint32 interrupt_num = interrupt_global_disable();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 interrupt_global_disable (void)
+{
+ return (uint32)(!disableInterrupts());
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 断言中断配置
+// 参数说明 void
+// 返回参数 void
+// 使用示例 assert_interrupt_config();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void assert_interrupt_config (void)
+{
+ interrupt_global_disable(); // 全局中断失能
+ pit_all_close(); // 关闭所有pit中断
+ pwm_all_channel_close(); // 关闭PWM所有通道输出
+ exti_all_close(); // 关闭所有外部触发中断
+ interrupt_global_enable(0); // 全局中断使能
+
+}
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_interrupt.h b/Example/E15_fft_demo/libraries/zf_common/zf_common_interrupt.h
new file mode 100644
index 0000000..06bffc3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_interrupt.h
@@ -0,0 +1,46 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_interrupt
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_common_interrupt_h_
+#define _zf_common_interrupt_h_
+
+#include "zf_common_typedef.h"
+
+void interrupt_global_enable (uint32 primask); // 全局中断使能
+uint32 interrupt_global_disable (void); // 全局中断失能
+void assert_interrupt_config (void); // 断言中断配置
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_common/zf_common_typedef.h b/Example/E15_fft_demo/libraries/zf_common/zf_common_typedef.h
new file mode 100644
index 0000000..9e2897f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_common/zf_common_typedef.h
@@ -0,0 +1,77 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_common_typedef
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_common_typedef_h_
+#define _zf_common_typedef_h_
+
+#include "math.h"
+#include "stdio.h"
+#include "stdint.h"
+#include "stdarg.h"
+#include "string.h"
+#include "stdlib.h"
+#include "ifx_types.h"
+#include "PLATFORM_TYPES.H"
+//=================================================== 类型定义 ===================================================
+
+//#define COMPATIBLE_WITH_OLDER_VERSIONS // 兼容旧版开源库接口
+#define USE_ZF_TYPEDEF (1) // 是否启用类型定义申明
+#if USE_ZF_TYPEDEF
+// 数据类型声明
+// 尽量使用 stdint.h 定义的类型名称 避免冲突 这里可以裁剪
+typedef signed char int8; // 有符号 8 bits
+typedef signed short int int16; // 有符号 16 bits
+typedef signed int int32; // 有符号 32 bits
+typedef signed long long int64; // 有符号 64 bits
+
+typedef volatile uint8 vuint8; // 易变性修饰 无符号 8 bits
+typedef volatile uint16 vuint16; // 易变性修饰 无符号 16 bits
+typedef volatile uint32 vuint32; // 易变性修饰 无符号 32 bits
+typedef volatile uint64 vuint64; // 易变性修饰 无符号 64 bits
+
+typedef volatile int8 vint8; // 易变性修饰 有符号 8 bits
+typedef volatile int16 vint16; // 易变性修饰 有符号 16 bits
+typedef volatile int32 vint32; // 易变性修饰 有符号 32 bits
+typedef volatile int64 vint64; // 易变性修饰 有符号 64 bits
+#endif
+
+#define ZF_ENABLE (1)
+#define ZF_DISABLE (0)
+
+#define ZF_TRUE (1)
+#define ZF_FALSE (0)
+//=================================================== 类型定义 ===================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_absolute_encoder.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_absolute_encoder.c
new file mode 100644
index 0000000..9480f32
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_absolute_encoder.c
@@ -0,0 +1,229 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_absolute_encoder
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* SCLK 查看 zf_device_absolute_encoder.h 中 ABSOLUTE_ENCODER_SCLK_PIN 宏定义
+* MOSI 查看 zf_device_absolute_encoder.h 中 ABSOLUTE_ENCODER_MOSI_PIN 宏定义
+* MISO 查看 zf_device_absolute_encoder.h 中 ABSOLUTE_ENCODER_MISO_PIN 宏定义
+* CS 查看 zf_device_absolute_encoder.h 中 ABSOLUTE_ENCODER_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+
+#include "zf_common_debug.h"
+#include "zf_common_function.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_soft_spi.h"
+#include "zf_driver_spi.h"
+
+#include "zf_device_absolute_encoder.h"
+
+static int16 now_location = 0;
+static int16 last_location = 0;
+
+#if ABSOLUTE_ENCODER_USE_SOFT_SPI
+static soft_spi_info_struct absolute_encoder_spi;
+#define absolute_encoder_read() (soft_spi_read_8bit(&absolute_encoder_spi))
+#define absolute_encoder_write(data) (soft_spi_write_8bit(&absolute_encoder_spi, (data)))
+#else
+#define absolute_encoder_read() (spi_read_8bit(ABSOLUTE_ENCODER_SPI))
+#define absolute_encoder_write(data) (spi_write_8bit(ABSOLUTE_ENCODER_SPI, (data)))
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 绝对值编码器写寄存器
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 absolute_encoder_write_register(i + 1, dat[i]);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void absolute_encoder_write_register(uint8 reg, uint8 data)
+{
+ ABSOLUTE_ENCODER_CSN(0); // 片选拉低选中
+ absolute_encoder_write(reg | ABSOLUTE_ENCODER_SPI_W); // 寄存器
+ absolute_encoder_write(data); // 数据
+ ABSOLUTE_ENCODER_CSN(1); // 片选拉高释放
+ system_delay_us(1); // 必要操作
+ ABSOLUTE_ENCODER_CSN(0); // 片选拉低选中
+ absolute_encoder_read(); // 这里会返回写入是否成功 但不作判断
+ absolute_encoder_read(); // 必要操作
+ ABSOLUTE_ENCODER_CSN(1); // 片选拉高释放
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 绝对值编码器读寄存器 内部调用
+// 参数说明 reg 寄存器地址
+// 返回参数 uint8 数据
+// 使用示例 absolute_encoder_read_register(6);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 absolute_encoder_read_register(uint8 reg)
+{
+ uint8 data = 0;
+ ABSOLUTE_ENCODER_CSN(0); // 片选拉低选中
+ absolute_encoder_write(reg | ABSOLUTE_ENCODER_SPI_R); // 寄存器
+ absolute_encoder_write(0x00); // 占位
+ ABSOLUTE_ENCODER_CSN(1); // 片选拉高释放
+ system_delay_us(1); // 必要操作
+ ABSOLUTE_ENCODER_CSN(0); // 片选拉低选中
+ data = absolute_encoder_read(); // 获取读取的数据
+ absolute_encoder_read(); // 必要操作
+ ABSOLUTE_ENCODER_CSN(1); // 片选拉高释放
+ return data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 绝对值编码器读位置 内部调用
+// 参数说明 void
+// 返回参数 uint16 位置值
+// 使用示例 absolute_encoder_read_data();
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint16 absolute_encoder_read_data (void)
+{
+ uint16 data = 0;
+ ABSOLUTE_ENCODER_CSN(0); // 片选拉低选中
+ data = absolute_encoder_read(); // 获取高八位数据
+ data = (data & 0x00FF) << 8; // 数据位移
+ data |= absolute_encoder_read(); // 获取低八位数据
+ ABSOLUTE_ENCODER_CSN(1); // 片选拉高释放
+ return data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 绝对值编码器自检 内部调用
+// 参数说明 void
+// 返回参数 uint8 自检状态
+// 使用示例 absolute_encoder_self_check();
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 absolute_encoder_self_check (void)
+{
+ uint8 i = 0, return_state = 0;
+ uint8 dat[6] = {0, 0, 0, 0xC0, 0xFF, 0x1C};
+ uint16 time_count = 0;
+ while(0x1C != absolute_encoder_read_register(6)) // 获取状态寄存器
+ {
+ for(i = 0; i < 6; i ++)
+ {
+ absolute_encoder_write_register(i + 1, dat[i]); // 写入默认配置参数
+ system_delay_ms(1);
+ }
+ if(time_count ++ > ABSOLUTE_ENCODER_TIMEOUT_COUNT) // 等待超时
+ {
+ return_state = 1;
+ break;
+ }
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 绝对值编码器获取当前角度值
+// 参数说明 void
+// 返回参数 int16 角度值
+// 使用示例 absolute_encoder_get_location();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+int16 absolute_encoder_get_location (void)
+{
+ last_location = now_location;
+ now_location = absolute_encoder_read_data() >> 4;
+ return now_location;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 绝对值编码器获取相较上次位置的偏移值
+// 参数说明 void
+// 返回参数 int16 偏移值
+// 使用示例 absolute_encoder_get_offset();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+int16 absolute_encoder_get_offset (void)
+{
+ int16 result_data = 0;
+ if(func_abs(now_location - last_location) > 2048)
+ {
+ result_data = (now_location > 2048 ? (now_location - 4096 - last_location) : (now_location + 4096 - last_location));
+ }
+ else
+ {
+ result_data = (now_location - last_location);
+ }
+ return result_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 绝对值编码器初始化
+// 参数说明 void
+// 返回参数 uint8 初始化状态 0-成功 1-失败
+// 使用示例 absolute_encoder_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 absolute_encoder_init (void)
+{
+ uint8 return_state = 0;
+ uint16 zero_position = ABSOLUTE_ENCODER_DEFAULT_ZERO;
+#if ABSOLUTE_ENCODER_USE_SOFT_SPI
+ soft_spi_init(&absolute_encoder_spi, 0, ABSOLUTE_ENCODER_SOFT_SPI_DELAY, ABSOLUTE_ENCODER_SCLK_PIN, ABSOLUTE_ENCODER_MOSI_PIN, ABSOLUTE_ENCODER_MISO_PIN, SOFT_SPI_PIN_NULL);
+#else
+ spi_init(ABSOLUTE_ENCODER_SPI, SPI_MODE0, ABSOLUTE_ENCODER_SPI_SPEED, ABSOLUTE_ENCODER_SCLK_PIN, ABSOLUTE_ENCODER_MOSI_PIN, ABSOLUTE_ENCODER_MISO_PIN, SPI_CS_NULL);
+#endif
+ gpio_init(ABSOLUTE_ENCODER_CS_PIN, GPO, GPIO_LOW, GPO_PUSH_PULL);
+
+ do
+ {
+ if(absolute_encoder_self_check())
+ {
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是绝对值编码器自检出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ return_state = 1;
+ zf_log(0, "absolute encoder init errror.");
+ break;
+ }
+ absolute_encoder_write_register(ABSOLUTE_ENCODER_DIR_REG, 0x00); // 设置旋转方向 正转数值变小：0x00 反转数值变大：0x80
+ zero_position = (uint16)(4096 - zero_position);
+ zero_position = zero_position << 4;
+ absolute_encoder_write_register(ABSOLUTE_ENCODER_ZERO_L_REG, (uint8)zero_position); // 设置零位
+ absolute_encoder_write_register(ABSOLUTE_ENCODER_ZERO_H_REG, zero_position >> 8);
+ }while(0);
+ return return_state;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_absolute_encoder.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_absolute_encoder.h
new file mode 100644
index 0000000..768078c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_absolute_encoder.h
@@ -0,0 +1,93 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_absolute_encoder
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* SCLK 查看 zf_device_absolute_encoder.h 中 ABSOLUTE_ENCODER_SCLK_PIN 宏定义
+* MOSI 查看 zf_device_absolute_encoder.h 中 ABSOLUTE_ENCODER_MOSI_PIN 宏定义
+* MISO 查看 zf_device_absolute_encoder.h 中 ABSOLUTE_ENCODER_MISO_PIN 宏定义
+* CS 查看 zf_device_absolute_encoder.h 中 ABSOLUTE_ENCODER_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_absolute_encoder_h_
+#define _zf_device_absolute_encoder_h_
+
+#include "zf_common_typedef.h"
+
+#define ABSOLUTE_ENCODER_USE_SOFT_SPI (0) // 默认使用硬件 SPI 方式驱动
+#if ABSOLUTE_ENCODER_USE_SOFT_SPI // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 SPI 驱动====================================================
+#define ABSOLUTE_ENCODER_SOFT_SPI_DELAY (1) // 软件 SPI 的时钟延时周期 数值越小 SPI 通信速率越快
+#define ABSOLUTE_ENCODER_SCLK_PIN (P20_11) // 软件 SPI SCK 引脚
+#define ABSOLUTE_ENCODER_MOSI_PIN (P20_14) // 软件 SPI MOSI 引脚
+#define ABSOLUTE_ENCODER_MISO_PIN (P20_12) // 软件 SPI MISO 引脚
+//====================================================软件 SPI 驱动====================================================
+#else
+//====================================================硬件 SPI 驱动====================================================
+#define ABSOLUTE_ENCODER_SPI_SPEED (10*1000*1000) // 硬件 SPI 速率
+#define ABSOLUTE_ENCODER_SPI (SPI_0) // 硬件 SPI 号
+#define ABSOLUTE_ENCODER_SCLK_PIN (SPI0_SCLK_P20_11) // 硬件 SPI SCK 引脚
+#define ABSOLUTE_ENCODER_MOSI_PIN (SPI0_MOSI_P20_14) // 硬件 SPI MOSI 引脚
+#define ABSOLUTE_ENCODER_MISO_PIN (SPI0_MISO_P20_12) // 硬件 SPI MISO 引脚
+//====================================================硬件 SPI 驱动====================================================
+#endif
+
+#define ABSOLUTE_ENCODER_CS_PIN (P20_13)
+#define ABSOLUTE_ENCODER_CSN(x) ((x) ? (gpio_high(ABSOLUTE_ENCODER_CS_PIN)): (gpio_low(ABSOLUTE_ENCODER_CS_PIN)))
+
+#define ABSOLUTE_ENCODER_TIMEOUT_COUNT (100)
+#define ABSOLUTE_ENCODER_DEFAULT_ZERO (0)
+
+//====================================================角度传感器参数====================================================
+#define ABSOLUTE_ENCODER_SPI_W (0x80)
+#define ABSOLUTE_ENCODER_SPI_R (0x40)
+
+#define ABSOLUTE_ENCODER_ZERO_L_REG (0x00)
+#define ABSOLUTE_ENCODER_ZERO_H_REG (0x01)
+#define ABSOLUTE_ENCODER_DIR_REG (0X09)
+//====================================================角度传感器参数====================================================
+
+
+//==================================================角度传感器 基础函数====================================================
+int16 absolute_encoder_get_location (void);
+int16 absolute_encoder_get_offset (void);
+uint8 absolute_encoder_init (void);
+//==================================================角度传感器 基础函数====================================================
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_bluetooth_ch9141.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_bluetooth_ch9141.c
new file mode 100644
index 0000000..d5bf430
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_bluetooth_ch9141.c
@@ -0,0 +1,254 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_bluetooth_ch9141
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 蓝牙转串口 单片机
+* RX 查看zf_device_bluetooth_ch9141.h文件中的BLUETOOTH_CH9141_TX_PIN宏定义
+* TX 查看zf_device_bluetooth_ch9141.h文件中的BLUETOOTH_CH9141_RX_PIN宏定义
+* RTS 查看zf_device_bluetooth_ch9141.h文件中的BLUETOOTH_CH9141_RTS_PIN宏定义
+* CTS 悬空
+* CMD 悬空或者上拉
+* ------------------------------------
+*********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_common_fifo.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_uart.h"
+#include "zf_driver_delay.h"
+#include "zf_device_type.h"
+
+#include "zf_device_bluetooth_ch9141.h"
+
+static fifo_struct bluetooth_ch9141_fifo;
+static uint8 bluetooth_ch9141_buffer[BLUETOOTH_CH9141_BUFFER_SIZE]; // 数据存放数组
+
+static uint8 bluetooth_ch9141_data;
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 蓝牙转串口模块发送数组
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 参数说明 *buff 要发送的数组地址
+// 参数说明 len 发送长度
+// 返回参数 void
+// 使用示例 bluetooth_ch9141_write_buffer(UART_1, &a[0], 5);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+static void bluetooth_ch9141_write_buffer (uart_index_enum uart_n, const uint8 *buff, uint32 len)
+{
+ while(len)
+ {
+ uart_write_byte_wait(uart_n, *buff);
+ len--;
+ buff++;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 蓝牙转串口模块 发送数据
+// 参数说明 data 8bit 数据
+// 返回参数 uint32 剩余发送长度
+// 使用示例 bluetooth_ch9141_send_byte(0x5A);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 bluetooth_ch9141_send_byte (const uint8 data)
+{
+ uint16 time_count = BLUETOOTH_CH9141_TIMEOUT_COUNT;
+ while(time_count)
+ {
+ if(!gpio_get_level(BLUETOOTH_CH9141_RTS_PIN))
+ {
+ uart_write_byte_wait(BLUETOOTH_CH9141_INDEX, data); // 发送数据
+ break;
+ }
+ time_count --;
+ system_delay_ms(1);
+ }
+ return (0 < time_count);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 蓝牙转串口模块 发送函数
+// 参数说明 buff 需要发送的数据地址
+// 返回参数 len 发送长度
+// 使用示例 uint32 剩余未发送的字节数
+// 使用示例 bluetooth_ch9141_send_buff(buff, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 bluetooth_ch9141_send_buff (const uint8 *buff, uint32 len)
+{
+ zf_assert(buff != NULL);
+ uint16 time_count = 0;
+ while(0 != len)
+ {
+ if(!gpio_get_level(BLUETOOTH_CH9141_RTS_PIN)) // 如果RTS为低电平 则继续发送数据
+ {
+ if(30 <= len) // 数据分 30byte 每包发送
+ {
+ bluetooth_ch9141_write_buffer(BLUETOOTH_CH9141_INDEX, buff, 30); // 发送数据
+ buff += 30; // 地址偏移
+ len -= 30; // 数量
+ time_count = 0;
+ }
+ else // 不足 30byte 的数据一次性发送完毕
+ {
+ bluetooth_ch9141_write_buffer(BLUETOOTH_CH9141_INDEX, buff, len); // 发送数据
+ len = 0;
+ break;
+ }
+ }
+ else // 如果RTS为高电平 则模块忙
+ {
+ if(BLUETOOTH_CH9141_TIMEOUT_COUNT <= (++ time_count)) // 超出了最大等待时间
+ {
+ break; // 退出发送
+ }
+ system_delay_ms(1);
+ }
+ }
+ return len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 蓝牙转串口模块 发送字符串
+// 参数说明 *str 要发送的字符串地址
+// 返回参数 uint32 剩余发送长度
+// 使用示例 bluetooth_ch9141_send_string("Trust yourself.");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 bluetooth_ch9141_send_string (const char *str)
+{
+ zf_assert(str != NULL);
+ uint16 time_count = 0;
+ uint32 len = strlen(str);
+ while(0 != len)
+ {
+ if(!gpio_get_level(BLUETOOTH_CH9141_RTS_PIN)) // 如果RTS为低电平 则继续发送数据
+ {
+ if(30 <= len) // 数据分 30byte 每包发送
+ {
+ bluetooth_ch9141_write_buffer(BLUETOOTH_CH9141_INDEX, (const uint8 *)str, 30); // 发送数据
+ str += 30; // 地址偏移
+ len -= 30; // 数量
+ time_count = 0;
+ }
+ else // 不足 30byte 的数据一次性发送完毕
+ {
+ bluetooth_ch9141_write_buffer(BLUETOOTH_CH9141_INDEX, (const uint8 *)str, len);// 发送数据
+ len = 0;
+ break;
+ }
+ }
+ else // 如果RTS为高电平 则模块忙
+ {
+ if(BLUETOOTH_CH9141_TIMEOUT_COUNT <= (++ time_count)) // 超出了最大等待时间
+ {
+ break; // 退出发送
+ }
+ system_delay_ms(1);
+ }
+ }
+ return len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 蓝牙转串口模块 发送摄像头图像至上位机查看图像
+// 参数说明 *image_addr 需要发送的图像地址
+// 参数说明 image_size 图像的大小
+// 返回参数 void
+// 使用示例 bluetooth_ch9141_send_image(&mt9v03x_image[0][0], MT9V03X_IMAGE_SIZE);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void bluetooth_ch9141_send_image (const uint8 *image_addr, uint32 image_size)
+{
+ zf_assert(image_addr != NULL);
+
+ extern uint8 camera_send_image_frame_header[4];
+ bluetooth_ch9141_send_buff(camera_send_image_frame_header, 4);
+ bluetooth_ch9141_send_buff((uint8 *)image_addr, image_size);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 蓝牙转串口模块 读取函数
+// 参数说明 buff 存储的数据地址
+// 参数说明 len 长度
+// 返回参数 uint32 实际读取字节数
+// 使用示例 bluetooth_ch9141_read_buff(buff, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 bluetooth_ch9141_read_buff (uint8 *buff, uint32 len)
+{
+ zf_assert(buff != NULL);
+ uint32 data_len = len;
+ fifo_read_buffer(&bluetooth_ch9141_fifo, buff, &data_len, FIFO_READ_AND_CLEAN);
+ return data_len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 蓝牙转串口模块 串口中断回调函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例
+// 备注信息 该函数在 ISR 文件的串口中断程序被调用
+// 由串口中断服务函数调用 wireless_module_uart_handler() 函数
+// 再由 wireless_module_uart_handler() 函数调用本函数
+//-------------------------------------------------------------------------------------------------------------------
+void bluetooth_ch9141_uart_callback (void)
+{
+ uart_query_byte(BLUETOOTH_CH9141_INDEX, &bluetooth_ch9141_data); // 读取串口数据
+ fifo_write_buffer(&bluetooth_ch9141_fifo, &bluetooth_ch9141_data, 1); // 存入 FIFO
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 蓝牙转串口模块 初始化
+// 参数说明 void
+// 返回参数 uint8 初始化状态 0-成功 1-失败
+// 使用示例 bluetooth_ch9141_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 bluetooth_ch9141_init (void)
+{
+ uint8 return_state = 0;
+ set_wireless_type(BLUETOOTH_CH9141, bluetooth_ch9141_uart_callback);
+
+ fifo_init(&bluetooth_ch9141_fifo, FIFO_DATA_8BIT, bluetooth_ch9141_buffer, BLUETOOTH_CH9141_BUFFER_SIZE);
+ // 本函数使用的波特率为115200 为蓝牙转串口模块的默认波特率 如需其他波特率请使用上位机修改模块参数
+ gpio_init(BLUETOOTH_CH9141_RTS_PIN, GPI, 1, GPI_PULL_UP); // 初始化流控引脚
+ uart_init(BLUETOOTH_CH9141_INDEX, BLUETOOTH_CH9141_BUAD_RATE, BLUETOOTH_CH9141_RX_PIN, BLUETOOTH_CH9141_TX_PIN);
+ uart_rx_interrupt(BLUETOOTH_CH9141_INDEX, 1);
+
+ return return_state;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_bluetooth_ch9141.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_bluetooth_ch9141.h
new file mode 100644
index 0000000..e01764c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_bluetooth_ch9141.h
@@ -0,0 +1,77 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 main
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 蓝牙转串口 单片机
+* RX 查看zf_device_bluetooth_ch9141.h文件中的BLUETOOTH_CH9141_TX_PIN宏定义
+* TX 查看zf_device_bluetooth_ch9141.h文件中的BLUETOOTH_CH9141_RX_PIN宏定义
+* RTS 查看zf_device_bluetooth_ch9141.h文件中的BLUETOOTH_CH9141_RTS_PIN宏定义
+* CTS 悬空
+* CMD 悬空或者上拉
+* ------------------------------------
+*********************************************************************************************************************/
+
+#ifndef _zf_device_bluetooth_ch9141_h_
+#define _zf_device_bluetooth_ch9141_h_
+
+#include "zf_common_typedef.h"
+
+
+//=================================================9141蓝牙 驱动配置====================================================
+#define BLUETOOTH_CH9141_INDEX (UART_2) // 蓝牙模块对应使用的串口号
+#define BLUETOOTH_CH9141_BUAD_RATE (115200) // 蓝牙模块对应使用的串口波特率
+#define BLUETOOTH_CH9141_TX_PIN (UART2_RX_P10_6) // 蓝牙模块对应模块的 TX 要接到单片机的 RX
+#define BLUETOOTH_CH9141_RX_PIN (UART2_TX_P10_5) // 蓝牙模块对应模块的 RX 要接到单片机的 TX
+#define BLUETOOTH_CH9141_RTS_PIN (P10_2) // 蓝牙模块对应模块的 RTS 引脚
+//=================================================9141蓝牙 驱动配置====================================================
+
+#define BLUETOOTH_CH9141_BUFFER_SIZE (64)
+#define BLUETOOTH_CH9141_TIMEOUT_COUNT (500)
+
+//=================================================9141蓝牙 基础函数====================================================
+uint32 bluetooth_ch9141_send_byte (const uint8 data);
+uint32 bluetooth_ch9141_send_buff (const uint8 *buff, uint32 len);
+uint32 bluetooth_ch9141_send_string (const char *str);
+void bluetooth_ch9141_send_image (const uint8 *image_addr, uint32 image_size);
+
+uint32 bluetooth_ch9141_read_buff (uint8 *buff, uint32 len);
+
+void bluetooth_ch9141_uart_callback (void);
+
+uint8 bluetooth_ch9141_init (void);
+//=================================================9141蓝牙 基础函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_camera.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_camera.c
new file mode 100644
index 0000000..2d65397
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_camera.c
@@ -0,0 +1,169 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_camera
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_common_interrupt.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_dma.h"
+#include "zf_driver_exti.h"
+#include "zf_device_mt9v03x.h"
+#include "zf_device_ov7725.h"
+#include "zf_device_scc8660.h"
+#include "zf_device_camera.h"
+
+
+fifo_struct camera_receiver_fifo;
+uint8 camera_receiver_buffer[CAMERA_RECEIVER_BUFFER_SIZE];
+uint8 camera_send_image_frame_header[4] = {0x00, 0xFF, 0x01, 0x01};
+
+//-------------------------------------------------------------------------------------------------------------------
+// @brief 摄像头二进制图像数据解压为十六进制八位数据 小钻风用
+// @param *data1 摄像头图像数组
+// @param *data2 存放解压数据的地址
+// @param image_size 图像的大小
+// @return void
+// Sample usage: camera_binary_image_decompression(&ov7725_image_binary[0][0], &data_buffer[0][0], OV7725_SIZE);
+//-------------------------------------------------------------------------------------------------------------------
+void camera_binary_image_decompression (const uint8 *data1, uint8 *data2, uint32 image_size)
+{
+ uint8 i = 8;
+ zf_assert(data1 != NULL);
+ zf_assert(data2 != NULL);
+ while(image_size --)
+ {
+ i = 8;
+ while(i --)
+ {
+ *data2 ++ = (((*data1 >> i) & 0x01) ? 255 : 0);
+ }
+ data1 ++;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// @brief 摄像头图像发送至上位机查看图像
+// @param uartn 使用的串口号
+// @param *image_addr 需要发送的图像地址
+// @param image_size 图像的大小
+// @return void
+// Sample usage: camera_send_image(DEBUG_UART_INDEX, &mt9v03x_image[0][0], MT9V03X_IMAGE_SIZE);
+//-------------------------------------------------------------------------------------------------------------------
+void camera_send_image (uart_index_enum uartn, const uint8 *image_addr, uint32 image_size)
+{
+ zf_assert(image_addr != NULL);
+ // 发送命令
+ uart_write_buffer(uartn, camera_send_image_frame_header, 4);
+
+ // 发送图像
+ uart_write_buffer(uartn, (uint8 *)image_addr, image_size);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 摄像头串口 FIFO 初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 camera_fifo_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void camera_fifo_init (void)
+{
+ fifo_init(&camera_receiver_fifo, FIFO_DATA_8BIT, camera_receiver_buffer, CAMERA_RECEIVER_BUFFER_SIZE);
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// @brief 摄像头初始化
+// @param image_size 图像的大小
+// @return void
+// @param image_size 图像的大小
+// @param data_addr 数据来源外设地址
+// @param buffer_addr 图像缓冲区地址
+// @return void
+// Sample usage: camera_init();
+//-------------------------------------------------------------------------------------------------------------------
+uint8 camera_init (uint8 *source_addr, uint8 *destination_addr, uint16 image_size)
+{
+ uint8 num;
+ uint8 link_list_num;
+ switch(camera_type)
+ {
+ case CAMERA_BIN_IIC: // IIC 小钻风
+ case CAMERA_BIN_UART: // UART 小钻风
+ for(num = 0; num < 8; num ++)
+ {
+ gpio_init((gpio_pin_enum)(OV7725_DATA_PIN + num), GPI, GPIO_LOW, GPI_FLOATING_IN);
+ }
+ link_list_num = dma_init(OV7725_DMA_CH,
+ source_addr,
+ destination_addr,
+ OV7725_PCLK_PIN,
+ EXTI_TRIGGER_FALLING,
+ image_size);
+ exti_init(OV7725_VSYNC_PIN, EXTI_TRIGGER_FALLING); //初始化场中断，并设置为下降沿触发中断
+ break;
+ case CAMERA_GRAYSCALE: // 总钻风
+ for(num = 0; num < 8; num ++)
+ {
+ gpio_init((gpio_pin_enum)(MT9V03X_DATA_PIN + num), GPI, GPIO_LOW, GPI_FLOATING_IN);
+ }
+ link_list_num = dma_init(MT9V03X_DMA_CH,
+ source_addr,
+ destination_addr,
+ MT9V03X_PCLK_PIN,
+ EXTI_TRIGGER_RISING,
+ image_size); // 如果超频到300M 倒数第二个参数请设置为FALLING
+
+ exti_init(MT9V03X_VSYNC_PIN, EXTI_TRIGGER_FALLING); // 初始化场中断，并设置为下降沿触发中断
+ break;
+ case CAMERA_COLOR: // 凌瞳
+ for(num=0; num<8; num++)
+ {
+ gpio_init((gpio_pin_enum)(SCC8660_DATA_PIN + num), GPI, GPIO_LOW, GPI_FLOATING_IN);
+ }
+
+ link_list_num = dma_init(SCC8660_DMA_CH,
+ source_addr,
+ destination_addr,
+ SCC8660_PCLK_PIN,
+ EXTI_TRIGGER_RISING,
+ image_size); // 如果超频到300M 倒数第二个参数请设置为FALLING
+
+ exti_init(SCC8660_VSYNC_PIN, EXTI_TRIGGER_FALLING); // 初始化场中断，并设置为下降沿触发中断
+ break;
+ default:
+ break;
+ }
+ return link_list_num;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_camera.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_camera.h
new file mode 100644
index 0000000..b35f7bb
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_camera.h
@@ -0,0 +1,55 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_camera
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_device_camera_h_
+#define _zf_device_camera_h_
+
+#include "zf_common_fifo.h"
+#include "zf_common_typedef.h"
+#include "zf_driver_uart.h"
+#include "zf_device_type.h"
+
+#define CAMERA_RECEIVER_BUFFER_SIZE (8)
+
+extern fifo_struct camera_receiver_fifo;
+
+//================================================摄像头公共库 基础函数====================================================
+void camera_binary_image_decompression (const uint8 *data1, uint8 *data2, uint32 image_size);
+void camera_send_image (uart_index_enum uartn, const uint8 *image_addr, uint32 image_size);
+void camera_fifo_init (void);
+uint8 camera_init (uint8 *source_addr, uint8 *destination_addr, uint16 image_size);
+//================================================摄像头公共库 基础函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_config.a b/Example/E15_fft_demo/libraries/zf_device/zf_device_config.a
new file mode 100644
index 0000000..30a199d
Binary files /dev/null and b/Example/E15_fft_demo/libraries/zf_device/zf_device_config.a differ
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_config.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_config.h
new file mode 100644
index 0000000..7812a05
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_config.h
@@ -0,0 +1,49 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_config
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_device_config_h_
+#define _zf_device_config_h_
+
+
+
+
+extern const unsigned char imu660ra_config_file[8192];
+
+unsigned char mt9v03x_set_config_sccb (void *soft_iic_obj, short int buff[10][2]);
+unsigned char mt9v03x_set_exposure_time_sccb (unsigned short int light);
+unsigned char mt9v03x_set_reg_sccb (unsigned char addr, unsigned short int data);
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_dl1a.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_dl1a.c
new file mode 100644
index 0000000..e5477ed
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_dl1a.c
@@ -0,0 +1,752 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_dl1a
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* SCL 查看 zf_device_dl1a.h 中 DL1A_SCL_PIN 宏定义
+* SDA 查看 zf_device_dl1a.h 中 DL1A_SDA_PIN 宏定义
+* VCC 5V 电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_soft_iic.h"
+#include "zf_device_dl1a.h"
+
+uint8 dl1a_finsh_flag;
+uint16 dl1a_distance_mm;
+
+#if DL1A_USE_SOFT_IIC
+static soft_iic_info_struct dl1a_iic_struct;
+
+#define dl1a_write_array(data, len) (soft_iic_write_8bit_array(&dl1a_iic_struct, (data), (len)))
+#define dl1a_write_register(reg, data) (soft_iic_write_8bit_register(&dl1a_iic_struct, (reg), (data)))
+#define dl1a_read_register(reg) (soft_iic_read_8bit_register(&dl1a_iic_struct, (reg)))
+#define dl1a_read_registers(reg, data, len) (soft_iic_read_8bit_registers(&dl1a_iic_struct, (reg), (data), (len)))
+#else
+#define dl1a_write_array(data, len) (iic_write_8bit_array(DL1A_IIC, DL1A_DEV_ADDR, (data), (len)))
+#define dl1a_write_register(reg, data) (iic_write_8bit_register(DL1A_IIC, DL1A_DEV_ADDR, (reg), (data)))
+#define dl1a_read_register(reg) (iic_read_8bit_register(DL1A_IIC, DL1A_DEV_ADDR, (reg)))
+#define dl1a_read_registers(reg, data, len) (iic_read_8bit_registers(DL1A_IIC, DL1A_DEV_ADDR, (reg), (data), (len)))
+#endif
+
+// 这个速率表示从目标反射并被设备检测到的信号的振幅
+// 设置此限制可以确定传感器报告有效读数所需的最小测量值
+// 设置一个较低的限制可以增加传感器的测量范围
+// 但似乎也增加了 <由于来自目标以外的物体的不需要的反射导致> 得到不准确读数的可能性
+// 默认为 0.25 MCPS 可预设范围为 0 - 511.99
+#define DL1A_DEFAULT_RATE_LIMIT (0.25)
+
+// 从寄存器数据解码 PCLKs 中 VCSEL (vertical cavity surface emitting laser) 的脉宽周期
+#define decode_vcsel_period(reg_val) (((reg_val) + 1) << 1)
+
+// 从 PCLK 中的 VCSEL 周期计算宏周期 (以 *纳秒为单位)
+// PLL_period_ps = 1655
+// macro_period_vclks = 2304
+#define calc_macro_period(vcsel_period_pclks) ((((uint32)2304 * (vcsel_period_pclks) * 1655) + 500) / 1000)
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取设备 SPAD 信息
+// 参数说明 index 索引
+// 参数说明 type 类型值
+// 返回参数 uint8 是否成功 0-成功 1-失败
+// 使用示例 dl1a_get_spad_info(index, type_is_aperture);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 dl1a_get_spad_info (uint8 *index, uint8 *type_is_aperture)
+{
+ uint8 tmp = 0;
+ uint8 return_state = 0;
+ volatile uint16 loop_count = 0;
+
+ do
+ {
+ dl1a_write_register(0x80, 0x01);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x00, 0x00);
+
+ dl1a_write_register(0xFF, 0x06);
+ dl1a_read_registers(0x83, &tmp, 1);
+ dl1a_write_register(0x83, tmp | 0x04);
+ dl1a_write_register(0xFF, 0x07);
+ dl1a_write_register(0x81, 0x01);
+
+ dl1a_write_register(0x80, 0x01);
+
+ dl1a_write_register(0x94, 0x6b);
+ dl1a_write_register(0x83, 0x00);
+
+ tmp = 0x00;
+ while(tmp == 0x00 || tmp == 0xFF)
+ {
+ system_delay_ms(1);
+ dl1a_read_registers(0x83, &tmp, 1);
+ if(loop_count++ > DL1A_TIMEOUT_COUNT)
+ {
+ return_state = 1;
+ break;
+ }
+
+ }
+ if(return_state)
+ {
+ break;
+ }
+ dl1a_write_register(0x83, 0x01);
+ dl1a_read_registers(0x92, &tmp, 1);
+
+ *index = tmp & 0x7f;
+ *type_is_aperture = (tmp >> 7) & 0x01;
+
+ dl1a_write_register(0x81, 0x00);
+ dl1a_write_register(0xFF, 0x06);
+ dl1a_read_registers(0x83, &tmp, 1);
+ dl1a_write_register(0x83, tmp);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x00, 0x01);
+
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x80, 0x00);
+ }while(0);
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将超时数值从 MCLKs 转换到对应的 ms
+// 参数说明 timeout_period_mclks 超时周期 MCLKs
+// 参数说明 vcsel_period_pclks PCLK 值
+// 返回参数 uint32 返回超时数值
+// 使用示例 dl1a_timeout_mclks_to_microseconds(timeout_period_mclks, vcsel_period_pclks);
+// 备注信息 将序列步骤超时从具有给定 VCSEL 周期的 MCLK (以 PCLK 为单位)转换为微秒
+//-------------------------------------------------------------------------------------------------------------------
+static uint32 dl1a_timeout_mclks_to_microseconds (uint16 timeout_period_mclks, uint8 vcsel_period_pclks)
+{
+ uint32 macro_period_ns = calc_macro_period(vcsel_period_pclks);
+
+ return ((timeout_period_mclks * macro_period_ns) + (macro_period_ns / 2)) / 1000;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将超时数值从 ms 转换到对应的 MCLKs
+// 参数说明 timeout_period_us 超时周期 微秒单位
+// 参数说明 vcsel_period_pclks PCLK 值
+// 返回参数 uint32 返回超时数值
+// 使用示例 dl1a_timeout_microseconds_to_mclks(timeout_period_us, vcsel_period_pclks);
+// 备注信息 将序列步骤超时从微秒转换为具有给定 VCSEL 周期的 MCLK (以 PCLK 为单位)
+//-------------------------------------------------------------------------------------------------------------------
+static uint32 dl1a_timeout_microseconds_to_mclks (uint32 timeout_period_us, uint8 vcsel_period_pclks)
+{
+ uint32 macro_period_ns = calc_macro_period(vcsel_period_pclks);
+
+ return (((timeout_period_us * 1000) + (macro_period_ns / 2)) / macro_period_ns);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 对超时数值进行解码
+// 参数说明 reg_val 超时时长 寄存器值
+// 返回参数 uint16 返回超时数值
+// 使用示例 dl1a_decode_timeout(reg_val);
+// 备注信息 从寄存器值解码 MCLK 中的序列步骤超时
+//-------------------------------------------------------------------------------------------------------------------
+static uint16 dl1a_decode_timeout (uint16 reg_val)
+{
+ // 格式: (LSByte * 2 ^ MSByte) + 1
+ return (uint16)((reg_val & 0x00FF) <<
+ (uint16)((reg_val & 0xFF00) >> 8)) + 1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 对超时数值进行编码
+// 参数说明 timeout_mclks 超时时长 -MCLKs 值
+// 返回参数 uint16 返回编码值
+// 使用示例 dl1a_encode_timeout(timeout_mclks);
+// 备注信息 在 MCLK 中对超时的序列步骤超时寄存器值进行编码
+//-------------------------------------------------------------------------------------------------------------------
+static uint16 dl1a_encode_timeout (uint16 timeout_mclks)
+{
+ uint32 ls_byte = 0;
+ uint16 ms_byte = 0;
+ uint16 return_data = 0;
+
+ if (timeout_mclks > 0)
+ {
+ // 格式: (LSByte * 2 ^ MSByte) + 1
+ ls_byte = timeout_mclks - 1;
+ while ((ls_byte & 0xFFFFFF00) > 0)
+ {
+ ls_byte >>= 1;
+ ms_byte++;
+ }
+ return_data = (ms_byte << 8) | ((uint16)ls_byte & 0xFF);
+ }
+ return return_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取序列步骤使能设置
+// 参数说明 enables 序列使能步骤结构体
+// 返回参数 void
+// 使用示例 dl1a_get_sequence_step_enables(enables);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+static void dl1a_get_sequence_step_enables(dl1a_sequence_enables_step_struct *enables)
+{
+ uint8 sequence_config = 0;
+ dl1a_read_registers(DL1A_SYSTEM_SEQUENCE_CONFIG, &sequence_config, 1);
+
+ enables->tcc = (sequence_config >> 4) & 0x1;
+ enables->dss = (sequence_config >> 3) & 0x1;
+ enables->msrc = (sequence_config >> 2) & 0x1;
+ enables->pre_range = (sequence_config >> 6) & 0x1;
+ enables->final_range = (sequence_config >> 7) & 0x1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取脉冲周期
+// 参数说明 type 预量程类型
+// 返回参数 uint8 返回的周期值
+// 使用示例 dl1a_get_vcsel_pulse_period(DL1A_VCSEL_PERIOD_PER_RANGE);
+// 备注信息 在 PCLKs 中获取给定周期类型的 VCSEL 脉冲周期
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 dl1a_get_vcsel_pulse_period (dl1a_vcsel_period_type_enum type)
+{
+ uint8 data_buffer = 0;
+ if (type == DL1A_VCSEL_PERIOD_PER_RANGE)
+ {
+ dl1a_read_registers(DL1A_PRE_RANGE_CONFIG_VCSEL_PERIOD, &data_buffer, 1);
+ data_buffer = decode_vcsel_period(data_buffer);
+ }
+ else if (type == DL1A_VCSEL_PERIOD_FINAL_RANGE)
+ {
+ dl1a_read_registers(DL1A_FINAL_RANGE_CONFIG_VCSEL_PERIOD, &data_buffer, 1);
+ data_buffer = decode_vcsel_period(data_buffer);
+ }
+ else
+ {
+ data_buffer = 255;
+ }
+ return data_buffer;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取序列步骤超时设置
+// 参数说明 enables 序列使能步骤结构体
+// 参数说明 timeouts 序列超时步骤结构体
+// 返回参数 void
+// 使用示例 dl1a_get_sequence_step_timeouts(enables, timeouts);
+// 备注信息 获取所有超时而不仅仅是请求的超时 并且还存储中间值
+//-------------------------------------------------------------------------------------------------------------------
+static void dl1a_get_sequence_step_timeouts (dl1a_sequence_enables_step_struct const *enables, dl1a_sequence_timeout_step_struct *timeouts)
+{
+ uint8 reg_buffer[2];
+ uint16 reg16_buffer = 0;
+
+ timeouts->pre_range_vcsel_period_pclks = dl1a_get_vcsel_pulse_period(DL1A_VCSEL_PERIOD_PER_RANGE);
+
+ dl1a_read_registers(DL1A_MSRC_CONFIG_TIMEOUT_MACROP, reg_buffer, 1);
+ timeouts->msrc_dss_tcc_mclks = reg_buffer[0] + 1;
+ timeouts->msrc_dss_tcc_us = dl1a_timeout_mclks_to_microseconds(timeouts->msrc_dss_tcc_mclks, (uint8)timeouts->pre_range_vcsel_period_pclks);
+
+ dl1a_read_registers(DL1A_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI, reg_buffer, 2);
+ reg16_buffer = ((uint16) reg_buffer[0] << 8) | reg_buffer[1];
+ timeouts->pre_range_mclks = dl1a_decode_timeout(reg16_buffer);
+ timeouts->pre_range_us = dl1a_timeout_mclks_to_microseconds(timeouts->pre_range_mclks, (uint8)timeouts->pre_range_vcsel_period_pclks);
+
+ timeouts->final_range_vcsel_period_pclks = dl1a_get_vcsel_pulse_period(DL1A_VCSEL_PERIOD_FINAL_RANGE);
+
+ dl1a_read_registers(DL1A_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI, reg_buffer, 2);
+ reg16_buffer = ((uint16) reg_buffer[0] << 8) | reg_buffer[1];
+ timeouts->final_range_mclks = dl1a_decode_timeout(reg16_buffer);
+
+ if (enables->pre_range)
+ {
+ timeouts->final_range_mclks -= timeouts->pre_range_mclks;
+ }
+
+ timeouts->final_range_us = dl1a_timeout_mclks_to_microseconds(timeouts->final_range_mclks, (uint8)timeouts->final_range_vcsel_period_pclks);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 执行单次参考校准
+// 参数说明 vhv_init_byte 预设校准值
+// 返回参数 uint8 操作是否成功 0-成功 1-失败
+// 使用示例 dl1a_get_vcsel_pulse_period(DL1A_VCSEL_PERIOD_PER_RANGE);
+// 备注信息 在 PCLKs 中获取给定周期类型的 VCSEL 脉冲周期
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 dl1a_perform_single_ref_calibration (uint8 vhv_init_byte)
+{
+ uint8 return_state = 0;
+ uint8 data_buffer = 0;
+ volatile uint16 loop_count = 0;
+ do
+ {
+ dl1a_write_register(DL1A_SYSRANGE_START, 0x01 | vhv_init_byte);
+ dl1a_read_registers(DL1A_MSRC_CONFIG_TIMEOUT_MACROP, &data_buffer, 1);
+ while ((data_buffer & 0x07) == 0)
+ {
+ system_delay_ms(1);
+ dl1a_read_registers(DL1A_MSRC_CONFIG_TIMEOUT_MACROP, &data_buffer, 1);
+ if (loop_count ++ > DL1A_TIMEOUT_COUNT)
+ {
+ return_state = 1;
+ break;
+ }
+ }
+ if(return_state)
+ {
+ break;
+ }
+ dl1a_write_register(DL1A_SYSTEM_INTERRUPT_CLEAR, 0x01);
+ dl1a_write_register(DL1A_SYSRANGE_START, 0x00);
+ }while(0);
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置测量定时预算 (以微秒为单位)
+// 参数说明 budget_us 设定的测量允许的时间
+// 返回参数 uint8 操作结果 0-成功 1-失败
+// 使用示例 dl1a_set_measurement_timing_budget(measurement_timing_budget_us);
+// 备注信息 这是一次测量允许的时间
+// 即在测距序列的子步骤之间分配时间预算
+// 更长的时间预算允许更精确的测量
+// 增加一个N倍的预算可以减少一个sqrt(N)倍的范围测量标准偏差
+// 默认为33毫秒 最小值为20 ms
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 dl1a_set_measurement_timing_budget (uint32 budget_us)
+{
+ uint8 return_state = 0;
+ uint8 data_buffer[3];
+ uint16 data = 0;
+
+ dl1a_sequence_enables_step_struct enables;
+ dl1a_sequence_timeout_step_struct timeouts;
+
+ do
+ {
+ if (budget_us < DL1A_MIN_TIMING_BUDGET)
+ {
+ return_state = 1;
+ break;
+ }
+
+ uint32 used_budget_us = DL1A_SET_START_OVERHEAD + DL1A_END_OVERHEAD;
+ dl1a_get_sequence_step_enables(&enables);
+ dl1a_get_sequence_step_timeouts(&enables, &timeouts);
+
+ if (enables.tcc)
+ {
+ used_budget_us += (timeouts.msrc_dss_tcc_us + DL1A_TCC_OVERHEAD);
+ }
+
+ if (enables.dss)
+ {
+ used_budget_us += 2 * (timeouts.msrc_dss_tcc_us + DL1A_DSS_OVERHEAD);
+ }
+ else if (enables.msrc)
+ {
+ used_budget_us += (timeouts.msrc_dss_tcc_us + DL1A_MSRC_OVERHEAD);
+ }
+
+ if (enables.pre_range)
+ {
+ used_budget_us += (timeouts.pre_range_us + DL1A_PRERANGE_OVERHEAD);
+ }
+
+ if (enables.final_range)
+ {
+ // 请注意 最终范围超时由计时预算和序列中所有其他超时的总和决定
+ // 如果没有空间用于最终范围超时 则将设置错误
+ // 否则 剩余时间将应用于最终范围
+ used_budget_us += DL1A_FINALlRANGE_OVERHEAD;
+ if (used_budget_us > budget_us)
+ {
+ // 请求的超时太大
+ return_state = 1;
+ break;
+ }
+
+ // 对于最终超时范围 必须添加预量程范围超时
+ // 为此 最终超时和预量程超时必须以宏周期 MClks 表示
+ // 因为它们具有不同的 VCSEL 周期
+ uint32 final_range_timeout_us = budget_us - used_budget_us;
+ uint16 final_range_timeout_mclks =
+ (uint16)dl1a_timeout_microseconds_to_mclks(final_range_timeout_us,
+ (uint8)timeouts.final_range_vcsel_period_pclks);
+
+ if (enables.pre_range)
+ {
+ final_range_timeout_mclks += timeouts.pre_range_mclks;
+ }
+
+ data = dl1a_encode_timeout(final_range_timeout_mclks);
+ data_buffer[0] = DL1A_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI;
+ data_buffer[1] = ((data >> 8) & 0xFF);
+ data_buffer[2] = (data & 0xFF);
+ dl1a_write_array(data_buffer, 3);
+ }
+ }while(0);
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取测量定时预算 (以微秒为单位)
+// 参数说明 void
+// 返回参数 uint32 已设定的测量允许的时间
+// 使用示例 dl1a_get_measurement_timing_budget();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+static uint32 dl1a_get_measurement_timing_budget (void)
+{
+ dl1a_sequence_enables_step_struct enables;
+ dl1a_sequence_timeout_step_struct timeouts;
+
+ // 开始和结束开销时间始终存在
+ uint32 budget_us = DL1A_GET_START_OVERHEAD + DL1A_END_OVERHEAD;
+
+ dl1a_get_sequence_step_enables(&enables);
+ dl1a_get_sequence_step_timeouts(&enables, &timeouts);
+
+ if (enables.tcc)
+ {
+ budget_us += (timeouts.msrc_dss_tcc_us + DL1A_TCC_OVERHEAD);
+ }
+
+ if (enables.dss)
+ {
+ budget_us += 2 * (timeouts.msrc_dss_tcc_us + DL1A_DSS_OVERHEAD);
+ }
+ else if (enables.msrc)
+ {
+ budget_us += (timeouts.msrc_dss_tcc_us + DL1A_MSRC_OVERHEAD);
+ }
+
+ if (enables.pre_range)
+ {
+ budget_us += (timeouts.pre_range_us + DL1A_PRERANGE_OVERHEAD);
+ }
+
+ if (enables.final_range)
+ {
+ budget_us += (timeouts.final_range_us + DL1A_FINALlRANGE_OVERHEAD);
+ }
+
+ return budget_us;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置返回信号速率限制 该值单位为 MCPS (百万次每秒)
+// 参数说明 limit_mcps 设置的最小速率
+// 返回参数 void
+// 使用示例 dl1a_set_signal_rate_limit(0.25);
+// 备注信息 这个速率表示从目标反射并被设备检测到的信号的振幅
+// 设置此限制可以确定传感器报告有效读数所需的最小测量值
+// 设置一个较低的限制可以增加传感器的测量范围
+// 但似乎也增加了 <由于来自目标以外的物体的不需要的反射导致> 得到不准确读数的可能性
+// 默认为 0.25 MCPS 可预设范围为 0 - 511.99
+//-------------------------------------------------------------------------------------------------------------------
+static void dl1a_set_signal_rate_limit (float limit_mcps)
+{
+ zf_assert(limit_mcps >= 0 || limit_mcps <= 511.99);
+ uint8 data_buffer[3];
+ uint16 limit_mcps_16bit = (limit_mcps * (1 << 7));
+
+ data_buffer[0] = DL1A_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT;
+ data_buffer[1] = ((limit_mcps_16bit >> 8) & 0xFF);
+ data_buffer[2] = (limit_mcps_16bit & 0xFF);
+
+ dl1a_write_array(data_buffer, 3);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 返回以毫米为单位的范围读数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 dl1a_get_distance();
+// 备注信息 在开始单次射程测量后也调用此函数
+//-------------------------------------------------------------------------------------------------------------------
+void dl1a_get_distance (void)
+{
+ uint8 reg_databuffer[3];
+
+ dl1a_read_registers(DL1A_RESULT_INTERRUPT_STATUS, reg_databuffer, 1);
+ if((reg_databuffer[0] & 0x07) != 0)
+ {
+ // 假设线性度校正增益为默认值 1000 且未启用分数范围
+ dl1a_read_registers(DL1A_RESULT_RANGE_STATUS + 10, reg_databuffer, 2);
+ dl1a_distance_mm = ((uint16_t)reg_databuffer[0] << 8);
+ dl1a_distance_mm |= reg_databuffer[1];
+
+ dl1a_write_register(DL1A_SYSTEM_INTERRUPT_CLEAR, 0x01);
+ dl1a_finsh_flag = 1;
+ }
+ if(reg_databuffer[0] & 0x10)
+ {
+ dl1a_read_registers(DL1A_RESULT_RANGE_STATUS + 10, reg_databuffer, 2);
+ dl1a_write_register(DL1A_SYSTEM_INTERRUPT_CLEAR, 0x01);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 初始化 DL1A
+// 参数说明 void
+// 返回参数 uint8 1-初始化失败 0-初始化成功
+// 使用示例 dl1a_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 dl1a_init (void)
+{
+ uint32 measurement_timing_budget_us;
+ uint8 stop_variable;
+ uint8 return_state = 0;
+ uint8 reg_data_buffer ;
+ uint8 ref_spad_map[6];
+ uint8 data_buffer[7];
+
+ memset(ref_spad_map, 0, 6);
+ memset(data_buffer, 0, 7);
+
+#if DL1A_USE_SOFT_IIC
+ soft_iic_init(&dl1a_iic_struct, DL1A_DEV_ADDR, DL1A_SOFT_IIC_DELAY, DL1A_SCL_PIN, DL1A_SDA_PIN);
+#else
+ iic_init(DL1A_IIC, DL1A_DEV_ADDR, DL1A_IIC_SPEED, DL1A_SCL_PIN, DL1A_SDA_PIN);
+#endif
+ gpio_init(DL1A_XSHUT_PIN, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+
+ do
+ {
+ system_delay_ms(100);
+ gpio_low(DL1A_XSHUT_PIN);
+ system_delay_ms(50);
+ gpio_high(DL1A_XSHUT_PIN);
+ system_delay_ms(100);
+
+ // -------------------------------- DL1A 启动初始化 --------------------------------
+ reg_data_buffer = dl1a_read_register(DL1A_IO_VOLTAGE_CONFIG); // 传感器默认 IO 为 1.8V 模式
+ dl1a_write_register(DL1A_IO_VOLTAGE_CONFIG, reg_data_buffer | 0x01); // 配置 IO 为 2.8V 模式
+
+ dl1a_write_register(0x88, 0x00); // 设置为标准 IIC 模式
+
+ dl1a_write_register(0x80, 0x01);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x00, 0x00);
+
+ dl1a_read_registers(0x91, &stop_variable , 1);
+
+ dl1a_write_register(0x00, 0x01);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x80, 0x00);
+
+ // 禁用 SIGNAL_RATE_MSRC(bit1) 和 SIGNAL_RATE_PRE_RANGE(bit4) 限制检查
+ reg_data_buffer = dl1a_read_register(DL1A_MSRC_CONFIG);
+ dl1a_write_register(DL1A_MSRC_CONFIG, reg_data_buffer | 0x12);
+
+ dl1a_set_signal_rate_limit(DL1A_DEFAULT_RATE_LIMIT); // 设置信号速率限制
+ dl1a_write_register(DL1A_SYSTEM_SEQUENCE_CONFIG, 0xFF);
+ // -------------------------------- DL1A 启动初始化 --------------------------------
+
+ // -------------------------------- DL1A 配置初始化 --------------------------------
+ if (dl1a_get_spad_info(&data_buffer[0], &data_buffer[1]))
+ {
+ return_state = 1;
+ zf_log(0, "DL1A self check error.");
+ break;
+ }
+
+ // 从 GLOBAL_CONFIG_SPAD_ENABLES_REF_[0-6] 获取 SPAD map (RefGoodSpadMap) 数据
+ dl1a_read_registers(DL1A_GLOBAL_CONFIG_SPAD_ENABLES_REF_0, ref_spad_map, 6);
+
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(DL1A_DYNAMIC_SPAD_REF_EN_START_OFFSET, 0x00);
+ dl1a_write_register(DL1A_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD, 0x2C);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(DL1A_GLOBAL_CONFIG_REF_EN_START_SELECT, 0xB4);
+
+ data_buffer[2] = data_buffer[1] ? 12 : 0; // 12 is the first aperture spad
+ for (uint8 i = 0; i < 48; i++)
+ {
+ if (i < data_buffer[2] || data_buffer[3] == data_buffer[0])
+ {
+ // 此位低于应启用的第一个位
+ // 或者 (eference_spad_count) 位已启用
+ // 因此此位为零
+ ref_spad_map[i / 8] &= ~(1 << (i % 8));
+ }
+ else if ((ref_spad_map[i / 8] >> (i % 8)) & 0x1)
+ {
+ data_buffer[3]++;
+ }
+ }
+
+ data_buffer[0] = DL1A_GLOBAL_CONFIG_SPAD_ENABLES_REF_0;
+ for(uint8 i = 1; i < 7; i++)
+ {
+ data_buffer[1] = ref_spad_map[i-1];
+ }
+ dl1a_write_array(data_buffer, 7);
+
+ // 默认转换设置 version 02/11/2015_v36
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x00, 0x00);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x09, 0x00);
+ dl1a_write_register(0x10, 0x00);
+ dl1a_write_register(0x11, 0x00);
+ dl1a_write_register(0x24, 0x01);
+ dl1a_write_register(0x25, 0xFF);
+ dl1a_write_register(0x75, 0x00);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x4E, 0x2C);
+ dl1a_write_register(0x48, 0x00);
+ dl1a_write_register(0x30, 0x20);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x30, 0x09);
+ dl1a_write_register(0x54, 0x00);
+ dl1a_write_register(0x31, 0x04);
+ dl1a_write_register(0x32, 0x03);
+ dl1a_write_register(0x40, 0x83);
+ dl1a_write_register(0x46, 0x25);
+ dl1a_write_register(0x60, 0x00);
+ dl1a_write_register(0x27, 0x00);
+ dl1a_write_register(0x50, 0x06);
+ dl1a_write_register(0x51, 0x00);
+ dl1a_write_register(0x52, 0x96);
+ dl1a_write_register(0x56, 0x08);
+ dl1a_write_register(0x57, 0x30);
+ dl1a_write_register(0x61, 0x00);
+ dl1a_write_register(0x62, 0x00);
+ dl1a_write_register(0x64, 0x00);
+ dl1a_write_register(0x65, 0x00);
+ dl1a_write_register(0x66, 0xA0);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x22, 0x32);
+ dl1a_write_register(0x47, 0x14);
+ dl1a_write_register(0x49, 0xFF);
+ dl1a_write_register(0x4A, 0x00);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x7A, 0x0A);
+ dl1a_write_register(0x7B, 0x00);
+ dl1a_write_register(0x78, 0x21);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x23, 0x34);
+ dl1a_write_register(0x42, 0x00);
+ dl1a_write_register(0x44, 0xFF);
+ dl1a_write_register(0x45, 0x26);
+ dl1a_write_register(0x46, 0x05);
+ dl1a_write_register(0x40, 0x40);
+ dl1a_write_register(0x0E, 0x06);
+ dl1a_write_register(0x20, 0x1A);
+ dl1a_write_register(0x43, 0x40);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x34, 0x03);
+ dl1a_write_register(0x35, 0x44);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x31, 0x04);
+ dl1a_write_register(0x4B, 0x09);
+ dl1a_write_register(0x4C, 0x05);
+ dl1a_write_register(0x4D, 0x04);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x44, 0x00);
+ dl1a_write_register(0x45, 0x20);
+ dl1a_write_register(0x47, 0x08);
+ dl1a_write_register(0x48, 0x28);
+ dl1a_write_register(0x67, 0x00);
+ dl1a_write_register(0x70, 0x04);
+ dl1a_write_register(0x71, 0x01);
+ dl1a_write_register(0x72, 0xFE);
+ dl1a_write_register(0x76, 0x00);
+ dl1a_write_register(0x77, 0x00);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x0D, 0x01);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x80, 0x01);
+ dl1a_write_register(0x01, 0xF8);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x8E, 0x01);
+ dl1a_write_register(0x00, 0x01);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x80, 0x00);
+
+ // 将中断配置设置为新样品就绪
+ dl1a_write_register(DL1A_SYSTEM_INTERRUPT_GPIO_CONFIG, 0x04);
+ reg_data_buffer = dl1a_read_register(DL1A_GPIO_HV_MUX_ACTIVE_HIGH);
+ dl1a_write_register(DL1A_GPIO_HV_MUX_ACTIVE_HIGH, reg_data_buffer & ~0x10);
+ dl1a_write_register(DL1A_SYSTEM_INTERRUPT_CLEAR, 0x01);
+
+ measurement_timing_budget_us = dl1a_get_measurement_timing_budget();
+
+ // 默认情况下禁用 MSRC 和 TCC
+ // MSRC = Minimum Signal Rate Check
+ // TCC = Target CentreCheck
+ dl1a_write_register(DL1A_SYSTEM_SEQUENCE_CONFIG, 0xE8);
+ dl1a_set_measurement_timing_budget(measurement_timing_budget_us); // 重新计算时序预算
+ // -------------------------------- DL1A 配置初始化 --------------------------------
+
+ dl1a_write_register(DL1A_SYSTEM_SEQUENCE_CONFIG, 0x01);
+ if (dl1a_perform_single_ref_calibration(0x40))
+ {
+ return_state = 1;
+ zf_log(0, "DL1A perform single reference calibration error.");
+ break;
+ }
+ dl1a_write_register(DL1A_SYSTEM_SEQUENCE_CONFIG, 0x02);
+ if (dl1a_perform_single_ref_calibration(0x00))
+ {
+ return_state = 1;
+ zf_log(0, "DL1A perform single reference calibration error.");
+ break;
+ }
+ dl1a_write_register(DL1A_SYSTEM_SEQUENCE_CONFIG, 0xE8); // 恢复以前的序列配置
+
+ system_delay_ms(100);
+
+ dl1a_write_register(0x80, 0x01);
+ dl1a_write_register(0xFF, 0x01);
+ dl1a_write_register(0x00, 0x00);
+ dl1a_write_register(0x91, stop_variable);
+ dl1a_write_register(0x00, 0x01);
+ dl1a_write_register(0xFF, 0x00);
+ dl1a_write_register(0x80, 0x00);
+
+ dl1a_write_register(DL1A_SYSRANGE_START, 0x02);
+ }while(0);
+
+ return return_state;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_dl1a.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_dl1a.h
new file mode 100644
index 0000000..bc834bb
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_dl1a.h
@@ -0,0 +1,199 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_dl1a
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* SCL 查看 zf_device_dl1a.h 中 DL1A_SCL_PIN 宏定义
+* SDA 查看 zf_device_dl1a.h 中 DL1A_SDA_PIN 宏定义
+* VCC 5V 电源
+* GND 电源地
+* ------------------------------------
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _ZF_DEVICE_DL1A_H_
+#define _ZF_DEVICE_DL1A_H_
+
+#include "zf_common_typedef.h"
+
+
+// 需要注意的是 DL1A 最高支持 400KHz 的 IIC 通信速率
+// 需要注意的是 DL1A 最高支持 400KHz 的 IIC 通信速率
+// 需要注意的是 DL1A 最高支持 400KHz 的 IIC 通信速率
+
+#define DL1A_USE_SOFT_IIC (1) // 默认使用软件 IIC 方式驱动 建议使用软件 IIC 方式
+#if DL1A_USE_SOFT_IIC // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 IIC 驱动====================================================
+#define DL1A_SOFT_IIC_DELAY (100) // 软件 IIC 的时钟延时周期 数值越小 IIC 通信速率越快
+#define DL1A_SCL_PIN (P33_4) // 软件 IIC SCL 引脚 连接 VL53L0X 的 SCL 引脚
+#define DL1A_SDA_PIN (P33_5) // 软件 IIC SDA 引脚 连接 VL53L0X 的 SDA 引脚
+//====================================================软件 IIC 驱动====================================================
+#else
+#error "暂不支持硬件IIC通讯"
+#endif
+
+#define DL1A_XSHUT_PIN (P20_10)
+#define DL1A_TIMEOUT_COUNT (0x00FF) // VL53L0X 超时计数
+
+//================================================定义 DL1A 内部地址================================================
+#define DL1A_DEV_ADDR (0x52 >> 1) // 0b0101001
+
+#define DL1A_SYSRANGE_START (0x00)
+
+#define DL1A_SYSTEM_SEQUENCE_CONFIG (0x01)
+#define DL1A_SYSTEM_INTERMEASUREMENT_PERIOD (0x04)
+#define DL1A_SYSTEM_RANGE_CONFIG (0x09)
+#define DL1A_SYSTEM_INTERRUPT_GPIO_CONFIG (0x0A)
+#define DL1A_SYSTEM_INTERRUPT_CLEAR (0x0B)
+#define DL1A_SYSTEM_THRESH_HIGH (0x0C)
+#define DL1A_SYSTEM_THRESH_LOW (0x0E)
+#define DL1A_SYSTEM_HISTOGRAM_BIN (0x81)
+
+#define DL1A_RESULT_INTERRUPT_STATUS (0x13)
+#define DL1A_RESULT_RANGE_STATUS (0x14)
+#define DL1A_RESULT_PEAK_SIGNAL_RATE_REF (0xB6)
+#define DL1A_RESULT_CORE_AMBIENT_WINDOW_EVENTS_RTN (0xBC)
+#define DL1A_RESULT_CORE_RANGING_TOTAL_EVENTS_RTN (0xC0)
+#define DL1A_RESULT_CORE_AMBIENT_WINDOW_EVENTS_REF (0xD0)
+#define DL1A_RESULT_CORE_RANGING_TOTAL_EVENTS_REF (0xD4)
+
+#define DL1A_PRE_RANGE_CONFIG_MIN_SNR (0x27)
+#define DL1A_PRE_RANGE_CONFIG_VCSEL_PERIOD (0x50)
+#define DL1A_PRE_RANGE_CONFIG_TIMEOUT_MACROP_HI (0x51)
+#define DL1A_PRE_RANGE_CONFIG_TIMEOUT_MACROP_LO (0x52)
+#define DL1A_PRE_RANGE_CONFIG_VALID_PHASE_LOW (0x56)
+#define DL1A_PRE_RANGE_CONFIG_VALID_PHASE_HIGH (0x57)
+#define DL1A_PRE_RANGE_CONFIG_SIGMA_THRESH_HI (0x61)
+#define DL1A_PRE_RANGE_CONFIG_SIGMA_THRESH_LO (0x62)
+#define DL1A_PRE_RANGE_MIN_COUNT_RATE_RTN_LIMIT (0x64)
+
+#define DL1A_FINAL_RANGE_CONFIG_VALID_PHASE_LOW (0x47)
+#define DL1A_FINAL_RANGE_CONFIG_VALID_PHASE_HIGH (0x48)
+#define DL1A_FINAL_RANGE_CONFIG_MIN_COUNT_RATE_RTN_LIMIT (0x44)
+#define DL1A_FINAL_RANGE_CONFIG_MIN_SNR (0x67)
+#define DL1A_FINAL_RANGE_CONFIG_VCSEL_PERIOD (0x70)
+#define DL1A_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_HI (0x71)
+#define DL1A_FINAL_RANGE_CONFIG_TIMEOUT_MACROP_LO (0x72)
+
+#define DL1A_GLOBAL_CONFIG_VCSEL_WIDTH (0x32)
+#define DL1A_GLOBAL_CONFIG_SPAD_ENABLES_REF_0 (0xB0)
+#define DL1A_GLOBAL_CONFIG_SPAD_ENABLES_REF_1 (0xB1)
+#define DL1A_GLOBAL_CONFIG_SPAD_ENABLES_REF_2 (0xB2)
+#define DL1A_GLOBAL_CONFIG_SPAD_ENABLES_REF_3 (0xB3)
+#define DL1A_GLOBAL_CONFIG_SPAD_ENABLES_REF_4 (0xB4)
+#define DL1A_GLOBAL_CONFIG_SPAD_ENABLES_REF_5 (0xB5)
+#define DL1A_GLOBAL_CONFIG_REF_EN_START_SELECT (0xB6)
+
+#define DL1A_ALGO_PART_TO_PART_RANGE_OFFSET_MM (0x28)
+#define DL1A_ALGO_PHASECAL_LIM (0x30)
+#define DL1A_ALGO_PHASECAL_CONFIG_TIMEOUT (0x30)
+
+#define DL1A_HISTOGRAM_CONFIG_INITIAL_PHASE_SELECT (0x33)
+#define DL1A_HISTOGRAM_CONFIG_READOUT_CTRL (0x55)
+
+#define DL1A_DYNAMIC_SPAD_NUM_REQUESTED_REF_SPAD (0x4E)
+#define DL1A_DYNAMIC_SPAD_REF_EN_START_OFFSET (0x4F)
+
+#define DL1A_MSRC_CONFIG_TIMEOUT_MACROP (0x46)
+#define DL1A_MSRC_CONFIG (0x60)
+
+#define DL1A_IDENTIFICATION_MODEL_ID (0xC0)
+#define DL1A_IDENTIFICATION_REVISION_ID (0xC2)
+
+#define DL1A_CROSSTALK_COMPENSATION_PEAK_RATE_MCPS (0x20)
+
+#define DL1A_POWER_MANAGEMENT_GO1_POWER_FORCE (0x80)
+
+#define DL1A_GPIO_HV_MUX_ACTIVE_HIGH (0x84)
+
+#define DL1A_I2C_SLAVE_DEVICE_ADDRESS (0x8A)
+
+#define DL1A_SOFT_RESET_GO2_SOFT_RESET_N (0xBF)
+
+#define DL1A_OSC_CALIBRATE_VAL (0xF8)
+
+#define DL1A_IO_VOLTAGE_CONFIG (0x89) // IO 电压设置寄存器地址 默认 1V8 使用修改为 2V8
+
+//================================================定义 DL1A 内部地址================================================
+
+#define DL1A_MIN_TIMING_BUDGET (20000)
+
+#define DL1A_GET_START_OVERHEAD (1910)
+#define DL1A_SET_START_OVERHEAD (1320)
+#define DL1A_END_OVERHEAD (960 )
+#define DL1A_TCC_OVERHEAD (590 )
+#define DL1A_DSS_OVERHEAD (690 )
+#define DL1A_MSRC_OVERHEAD (660 )
+#define DL1A_PRERANGE_OVERHEAD (660 )
+#define DL1A_FINALlRANGE_OVERHEAD (550 )
+
+typedef enum
+{
+ DL1A_VCSEL_PERIOD_PER_RANGE,
+ DL1A_VCSEL_PERIOD_FINAL_RANGE,
+}dl1a_vcsel_period_type_enum;
+
+typedef struct
+{
+ uint8 tcc;
+ uint8 msrc;
+ uint8 dss;
+ uint8 pre_range;
+ uint8 final_range;
+}dl1a_sequence_enables_step_struct;
+
+typedef struct
+{
+ uint16 pre_range_vcsel_period_pclks;
+ uint16 final_range_vcsel_period_pclks;
+
+ uint16 msrc_dss_tcc_mclks;
+ uint16 pre_range_mclks;
+ uint16 final_range_mclks;
+ uint32 msrc_dss_tcc_us;
+ uint32 pre_range_us;
+ uint32 final_range_us;
+}dl1a_sequence_timeout_step_struct;
+
+extern uint8 dl1a_finsh_flag;
+extern uint16 dl1a_distance_mm;
+
+void dl1a_get_distance (void);
+
+uint8 dl1a_init (void);
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_gps_tau1201.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_gps_tau1201.c
new file mode 100644
index 0000000..d6138ea
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_gps_tau1201.c
@@ -0,0 +1,542 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_gps_tau1201
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* RX 查看 zf_device_gps_tau1201.h 中 GPS_TAU1201_RX 宏定义
+* TX 查看 zf_device_gps_tau1201.h 中 GPS_TAU1201_TX 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_function.h"
+#include "zf_common_fifo.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_uart.h"
+#include "zf_device_type.h"
+#include "zf_device_gps_tau1201.h"
+
+#define GPS_TAU1201_BUFFER_SIZE (128)
+
+uint8 gps_tau1201_flag; // 1：采集完成等待处理数据 0：没有采集完成
+gps_info_struct gps_tau1201; // GPS解析之后的数据
+
+static uint8 gps_tau1201_state = 0; // 1：GPS初始化完成
+static fifo_struct gps_tau1201_receiver_fifo; //
+static uint8 gps_tau1201_receiver_buffer[GPS_TAU1201_BUFFER_SIZE]; // 数据存放数组
+
+gps_state_enum gps_gga_state; // gga语句状态
+gps_state_enum gps_rmc_state; // rmc语句状态
+
+static uint8 gps_gga_buffer[GPS_TAU1201_BUFFER_SIZE];
+static uint8 gps_rmc_buffer[GPS_TAU1201_BUFFER_SIZE];
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取指定 ',' 后面的索引
+// 参数说明 num 第几个逗号
+// 参数说明 *str 字符串
+// 返回参数 uint8 返回索引
+// 使用示例 get_parameter_index(1, s);
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 get_parameter_index (uint8 num, char *str)
+{
+ uint8 i, j = 0;
+ char *temp;
+ uint8 len = 0, len1;
+
+ temp = strchr(str, '\n');
+ if(NULL != temp)
+ {
+ len = (uint8)((uint32)temp - (uint32)str + 1);
+ }
+
+ for(i = 0; i < len; i ++)
+ {
+ if(str[i] == ',')
+ {
+ j ++;
+ }
+ if(j == num)
+ {
+ len1 = i + 1;
+ break;
+ }
+ }
+
+ return len1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 给定字符串第一个 ',' 之前的数据转换为int
+// 参数说明 *s 字符串
+// 返回参数 float 返回数值
+// 使用示例 get_int_number(&buf[get_parameter_index(7, buf)]);
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static int get_int_number (char *s)
+{
+ char buf[10];
+ uint8 i;
+ int return_value;
+ i = get_parameter_index(1, s);
+ i = i - 1;
+ strncpy(buf, s, i);
+ buf[i] = 0;
+ return_value = func_str_to_int(buf);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 给定字符串第一个 ',' 之前的数据转换为float
+// 参数说明 *s 字符串
+// 返回参数 float 返回数值
+// 使用示例 get_float_number(&buf[get_parameter_index(8, buf)]);
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static float get_float_number (char *s)
+{
+ uint8 i;
+ char buf[15];
+ float return_value;
+
+ i = get_parameter_index(1, s);
+ i = i - 1;
+ strncpy(buf, s, i);
+ buf[i] = 0;
+ return_value = (float)func_str_to_double(buf);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 给定字符串第一个 ',' 之前的数据转换为double
+// 参数说明 *s 字符串
+// 返回参数 double 返回数值
+// 使用示例 get_double_number(&buf[get_parameter_index(3, buf)]);
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static double get_double_number (char *s)
+{
+ uint8 i;
+ char buf[15];
+ double return_value;
+
+ i = get_parameter_index(1, s);
+ i = i - 1;
+ strncpy(buf, s, i);
+ buf[i] = 0;
+ return_value = func_str_to_double(buf);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 世界时间转换为北京时间
+// 参数说明 *time 保存的时间
+// 返回参数 void
+// 使用示例 utc_to_btc(&gps->time);
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static void utc_to_btc (gps_time_struct *time)
+{
+ uint8 day_num;
+
+ time->hour = time->hour + 8;
+ if(time->hour > 23)
+ {
+ time->hour -= 24;
+ time->day += 1;
+
+ if(2 == time->month)
+ {
+ day_num = 28;
+ if((time->year % 4 == 0 && time->year % 100 != 0) || time->year % 400 == 0) // 判断是否为闰年
+ {
+ day_num ++; // 闰月 2月为29天
+ }
+ }
+ else
+ {
+ day_num = 31; // 1 3 5 7 8 10 12这些月份为31天
+ if(4 == time->month || 6 == time->month || 9 == time->month || 11 == time->month )
+ {
+ day_num = 30;
+ }
+ }
+
+ if(time->day > day_num)
+ {
+ time->day = 1;
+ time->month ++;
+ if(time->month > 12)
+ {
+ time->month -= 12;
+ time->year ++;
+ }
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 RMC语句解析
+// 参数说明 *line 接收到的语句信息
+// 参数说明 *gps 保存解析后的数据
+// 返回参数 uint8 1：解析成功 0：数据有问题不能解析
+// 使用示例 gps_gnrmc_parse((char *)data_buffer, &gps_tau1201);
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 gps_gnrmc_parse (char *line, gps_info_struct *gps)
+{
+ uint8 state, temp;
+
+ double latitude; // 纬度
+ double longitude; // 经度
+
+ float lati_cent_tmp, lati_second_tmp;
+ float long_cent_tmp, long_second_tmp;
+ float speed_tmp;
+ char *buf = line;
+ uint8 return_state = 0;
+
+ state = buf[get_parameter_index(2, buf)];
+
+ gps->state = 0;
+ if (state == 'A') // 如果数据有效 则解析数据
+ {
+ return_state = 1;
+ gps->state = 1;
+ gps -> ns = buf[get_parameter_index(4, buf)];
+ gps -> ew = buf[get_parameter_index(6, buf)];
+
+ latitude = get_double_number(&buf[get_parameter_index(3, buf)]);
+ longitude = get_double_number(&buf[get_parameter_index(5, buf)]);
+
+ gps->latitude_degree = (int)latitude / 100; // 纬度转换为度分秒
+ lati_cent_tmp = (latitude - gps->latitude_degree * 100);
+ gps->latitude_cent = (int)lati_cent_tmp;
+ lati_second_tmp = (lati_cent_tmp - gps->latitude_cent) * 10000;
+ gps->latitude_second = (int)lati_second_tmp;
+
+ gps->longitude_degree = (int)longitude / 100; // 经度转换为度分秒
+ long_cent_tmp = (longitude - gps->longitude_degree * 100);
+ gps->longitude_cent = (int)long_cent_tmp;
+ long_second_tmp = (long_cent_tmp - gps->longitude_cent) * 10000;
+ gps->longitude_second = (int)long_second_tmp;
+
+ gps->latitude = gps->latitude_degree + (double)gps->latitude_cent / 60 + (double)gps->latitude_second / 600000;
+ gps->longitude = gps->longitude_degree + (double)gps->longitude_cent / 60 + (double)gps->longitude_second / 600000;
+
+ speed_tmp = get_float_number(&buf[get_parameter_index(7, buf)]); // 速度(海里/小时)
+ gps->speed = speed_tmp * 1.85f; // 转换为公里/小时
+ gps->direction = get_float_number(&buf[get_parameter_index(8, buf)]); // 角度
+ }
+
+ // 在定位没有生效前也是有时间数据的，可以直接解析
+ gps->time.hour = (buf[7] - '0') * 10 + (buf[8] - '0'); // 时间
+ gps->time.minute = (buf[9] - '0') * 10 + (buf[10] - '0');
+ gps->time.second = (buf[11] - '0') * 10 + (buf[12] - '0');
+ temp = get_parameter_index(9, buf);
+ gps->time.day = (buf[temp + 0] - '0') * 10 + (buf[temp + 1] - '0'); // 日期
+ gps->time.month = (buf[temp + 2] - '0') * 10 + (buf[temp + 3] - '0');
+ gps->time.year = (buf[temp + 4] - '0') * 10 + (buf[temp + 5] - '0') + 2000;
+
+ utc_to_btc(&gps->time);
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 GGA语句解析
+// 参数说明 *line 接收到的语句信息
+// 参数说明 *gps 保存解析后的数据
+// 返回参数 uint8 1：解析成功 0：数据有问题不能解析
+// 使用示例 gps_gngga_parse((char *)data_buffer, &gps_tau1201);
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 gps_gngga_parse (char *line, gps_info_struct *gps)
+{
+ uint8 state;
+ char *buf = line;
+ uint8 return_state = 0;
+
+ state = buf[get_parameter_index(2, buf)];
+
+ if (state != ',')
+ {
+ gps->satellite_used = (uint8)get_int_number(&buf[get_parameter_index(7, buf)]);
+ gps->height = get_float_number(&buf[get_parameter_index(9, buf)]) + get_float_number(&buf[get_parameter_index(11, buf)]); // 高度 = 海拔高度 + 地球椭球面相对大地水准面的高度
+ return_state = 1;
+ }
+
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 计算从第一个点到第二个点的距离
+// 参数说明 latitude1 第一个点的纬度
+// 参数说明 longitude1 第一个点的经度
+// 参数说明 latitude2 第二个点的纬度
+// 参数说明 longitude2 第二个点的经度
+// 返回参数 double 返回两点距离
+// 使用示例 get_two_points_distance(latitude1_1, longitude1, latitude2, longitude2);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+double get_two_points_distance (double latitude1, double longitude1, double latitude2, double longitude2)
+{
+ const double EARTH_RADIUS = 6378137; // 地球半径(单位：m)
+ double rad_latitude1;
+ double rad_latitude2;
+ double rad_longitude1;
+ double rad_longitude2;
+ double distance;
+ double a;
+ double b;
+
+ rad_latitude1 = ANGLE_TO_RAD(latitude1); // 根据角度计算弧度
+ rad_latitude2 = ANGLE_TO_RAD(latitude2);
+ rad_longitude1 = ANGLE_TO_RAD(longitude1);
+ rad_longitude2 = ANGLE_TO_RAD(longitude2);
+
+ a = rad_latitude1 - rad_latitude2;
+ b = rad_longitude1 - rad_longitude2;
+
+ distance = 2 * asin(sqrt(pow(sin(a / 2), 2) + cos(rad_latitude1) * cos(rad_latitude2) * pow(sin(b / 2), 2))); // google maps 里面实现的算法
+ distance = distance * EARTH_RADIUS;
+
+ return distance;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 计算从第一个点到第二个点的方位角
+// 参数说明 latitude1 第一个点的纬度
+// 参数说明 longitude1 第一个点的经度
+// 参数说明 latitude2 第二个点的纬度
+// 参数说明 longitude2 第二个点的经度
+// 返回参数 double 返回方位角（0至360）
+// 使用示例 get_two_points_azimuth(latitude1_1, longitude1, latitude2, longitude2);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+double get_two_points_azimuth (double latitude1, double longitude1, double latitude2, double longitude2)
+{
+ latitude1 = ANGLE_TO_RAD(latitude1);
+ latitude2 = ANGLE_TO_RAD(latitude2);
+ longitude1 = ANGLE_TO_RAD(longitude1);
+ longitude2 = ANGLE_TO_RAD(longitude2);
+
+ double x = sin(longitude2 - longitude1) * cos(latitude2);
+ double y = cos(latitude1) * sin(latitude2) - sin(latitude1) * cos(latitude2) * cos(longitude2 - longitude1);
+ double angle = RAD_TO_ANGLE(atan2(x, y));
+ return ((angle > 0) ? angle : (angle + 360));
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 解析GPS数据
+// 参数说明 void
+// 返回参数 uint8 0-解析成功 1-解析失败 可能数据包错误
+// 使用示例 gps_data_parse();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 gps_data_parse (void)
+{
+ uint8 return_state = 0;
+ uint8 check_buffer[5] = {'0', 'x', 0x00, 0x00, 0x00};
+ uint8 bbc_xor_origin = 0;
+ uint8 bbc_xor_calculation = 0;
+ uint32 data_len;
+
+ do
+ {
+ if(GPS_STATE_RECEIVED == gps_rmc_state)
+ {
+ gps_rmc_state = GPS_STATE_PARSING;
+ strncpy((char *)&check_buffer[2], strchr((const char *)gps_rmc_buffer, '*')+1, 2);
+ bbc_xor_origin = (uint8)func_str_to_hex((char *)check_buffer);
+ for(bbc_xor_calculation = gps_rmc_buffer[1], data_len = 2; gps_rmc_buffer[data_len] != '*'; data_len ++)
+ {
+ bbc_xor_calculation ^= gps_rmc_buffer[data_len];
+ }
+ if(bbc_xor_calculation != bbc_xor_origin)
+ {
+ // 数据校验失败
+ return_state = 1;
+ break;
+ }
+
+ gps_gnrmc_parse((char *)gps_rmc_buffer, &gps_tau1201);
+ }
+ gps_rmc_state = GPS_STATE_RECEIVING;
+
+ if(GPS_STATE_RECEIVED == gps_gga_state)
+ {
+ gps_gga_state = GPS_STATE_PARSING;
+ strncpy((char *)&check_buffer[2], strchr((const char *)gps_gga_buffer, '*')+1, 2);
+ bbc_xor_origin = (uint8)func_str_to_hex((char *)check_buffer);
+
+ for(bbc_xor_calculation = gps_gga_buffer[1], data_len = 2; gps_gga_buffer[data_len] != '*'; data_len ++)
+ {
+ bbc_xor_calculation ^= gps_gga_buffer[data_len];
+ }
+ if(bbc_xor_calculation != bbc_xor_origin)
+ {
+ // 数据校验失败
+ return_state = 1;
+ break;
+ }
+
+ gps_gngga_parse((char *)gps_gga_buffer, &gps_tau1201);
+ }
+ gps_gga_state = GPS_STATE_RECEIVING;
+
+ }while(0);
+ return return_state;
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 GPS串口回调函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 gps_uart_callback();
+// 备注信息 此函数需要在串口接收中断内进行调用
+//-------------------------------------------------------------------------------------------------------------------
+void gps_uart_callback (void)
+{
+ uint8 temp_gps[6];
+ uint32 temp_length;
+
+ if(gps_tau1201_state)
+ {
+ uint8 dat;
+ while(uart_query_byte(GPS_TAU1201_UART, &dat))
+ {
+ fifo_write_buffer(&gps_tau1201_receiver_fifo, &dat, 1);
+ }
+
+ if('\n' == dat)
+ {
+ // 读取前6个数据 用于判断语句类型
+ temp_length = 6;
+ fifo_read_buffer(&gps_tau1201_receiver_fifo, temp_gps, &temp_length, FIFO_READ_ONLY);
+
+ // 根据不同类型将数据拷贝到不同的缓冲区
+ if(0 == strncmp((char *)&temp_gps[3], "RMC", 3))
+ {
+ // 如果没有在解析数据则更新缓冲区的数据
+ if(GPS_STATE_PARSING != gps_rmc_state)
+ {
+ gps_rmc_state = GPS_STATE_RECEIVED;
+ temp_length = fifo_used(&gps_tau1201_receiver_fifo);
+ fifo_read_buffer(&gps_tau1201_receiver_fifo, gps_rmc_buffer, &temp_length, FIFO_READ_AND_CLEAN);
+ }
+ }
+ else if(0 == strncmp((char *)&temp_gps[3], "GGA", 3))
+ {
+ // 如果没有在解析数据则更新缓冲区的数据
+ if(GPS_STATE_PARSING != gps_gga_state)
+ {
+ gps_gga_state = GPS_STATE_RECEIVED;
+ temp_length = fifo_used(&gps_tau1201_receiver_fifo);
+ fifo_read_buffer(&gps_tau1201_receiver_fifo, gps_gga_buffer, &temp_length, FIFO_READ_AND_CLEAN);
+ }
+ }
+
+ // 统一将FIFO清空
+ fifo_clear(&gps_tau1201_receiver_fifo);
+
+ gps_tau1201_flag = 1;
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 GPS初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 gps_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 gps_init (void)
+{
+ const uint8 set_rate[] = {0xF1, 0xD9, 0x06, 0x42, 0x14, 0x00, 0x00, 0x0A, 0x05, 0x00, 0x64, 0x00, 0x00, 0x00, 0x60, 0xEA, 0x00, 0x00, 0xD0, 0x07, 0x00, 0x00, 0xC8, 0x00, 0x00, 0x00, 0xB8, 0xED};
+ const uint8 open_gga[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x00, 0x01, 0xFB, 0x10};
+ const uint8 open_rmc[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x05, 0x01, 0x00, 0x1A};
+
+ const uint8 close_gll[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x01, 0x00, 0xFB, 0x11};
+ const uint8 close_gsa[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x02, 0x00, 0xFC, 0x13};
+ const uint8 close_grs[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x03, 0x00, 0xFD, 0x15};
+ const uint8 close_gsv[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x04, 0x00, 0xFE, 0x17};
+ const uint8 close_vtg[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x06, 0x00, 0x00, 0x1B};
+ const uint8 close_zda[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x07, 0x00, 0x01, 0x1D};
+ const uint8 close_gst[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x08, 0x00, 0x02, 0x1F};
+ const uint8 close_txt[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x40, 0x00, 0x3A, 0x8F};
+ const uint8 close_txt_ant[] = {0xF1, 0xD9, 0x06, 0x01, 0x03, 0x00, 0xF0, 0x20, 0x00, 0x1A, 0x4F};
+
+ fifo_init(&gps_tau1201_receiver_fifo, FIFO_DATA_8BIT, gps_tau1201_receiver_buffer, GPS_TAU1201_BUFFER_SIZE);
+ system_delay_ms(500); // 等待GPS启动后开始初始化
+ uart_init(GPS_TAU1201_UART, 115200, GPS_TAU1201_RX, GPS_TAU1201_TX);
+ uart_rx_interrupt(GPS_TAU1201_UART, 0);
+
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)set_rate, sizeof(set_rate)); // 设置GPS更新速率为10hz 如果不调用此语句则默认为1hz
+ system_delay_ms(200);
+
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)open_rmc, sizeof(open_rmc)); // 开启rmc语句
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)open_gga, sizeof(open_gga)); // 开启gga语句
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_gll, sizeof(close_gll));
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_gsa, sizeof(close_gsa));
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_grs, sizeof(close_grs));
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_gsv, sizeof(close_gsv));
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_vtg, sizeof(close_vtg));
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_zda, sizeof(close_zda));
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_gst, sizeof(close_gst));
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_txt, sizeof(close_txt));
+ system_delay_ms(50);
+ uart_write_buffer(GPS_TAU1201_UART, (uint8 *)close_txt_ant, sizeof(close_txt_ant));
+ system_delay_ms(50);
+
+ gps_tau1201_state = 1;
+ uart_rx_interrupt(GPS_TAU1201_UART, 1);
+
+ return 0;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_gps_tau1201.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_gps_tau1201.h
new file mode 100644
index 0000000..0416e14
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_gps_tau1201.h
@@ -0,0 +1,116 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_gps_tau1201
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* RX 查看 zf_device_gps_tau1201.h 中 GPS_TAU1201_RX 宏定义
+* TX 查看 zf_device_gps_tau1201.h 中 GPS_TAU1201_TX 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_gps_tau1201_h_
+#define _zf_device_gps_tau1201_h_
+
+#include "zf_common_typedef.h"
+
+//===============================================GPS 驱动配置====================================================
+#define GPS_TAU1201_UART (UART_3)
+#define GPS_TAU1201_RX (UART3_TX_P15_6) // GPS RX引脚连接到单片机此
+#define GPS_TAU1201_TX (UART3_RX_P15_7) // GPS TX串口引脚
+//===============================================GPS 驱动配置====================================================
+
+#define ANGLE_TO_RAD(x) ((x) * PI / 180.0) // 角度转换为弧度
+#define RAD_TO_ANGLE(x) ((x) * 180.0 / PI) // 弧度转换为角度
+#define PI (3.1415926535898)
+
+//=============================================定义 GPS 数据结构体==================================================
+typedef struct
+{
+ uint16 year;
+ uint8 month;
+ uint8 day;
+ uint8 hour;
+ uint8 minute;
+ uint8 second;
+}gps_time_struct;
+
+typedef struct
+{
+ gps_time_struct time; // 时间-
+ uint8 state; // 有效状态 1：定位有效 0：定位无效
+ uint16 latitude_degree; // 度
+ uint16 latitude_cent; // 分
+ uint16 latitude_second; // 秒
+ uint16 longitude_degree; // 度
+ uint16 longitude_cent; // 分
+ uint16 longitude_second; // 秒
+ double latitude; // 纬度
+ double longitude; // 经度
+ int8 ns; // 纬度半球 N（北半球）或 S（南半球）
+ int8 ew; // 经度半球 E（东经）或 W（西经）
+ float speed; // 速度（公里/每小时）
+ float direction; // 地面航向（000.0~359.9 度，以真北方为参考基准）
+ // 下面两个个信息从GNGGA语句中获取
+ uint8 satellite_used; // 用于定位的卫星数量
+ float height; // 高度
+}gps_info_struct;
+
+typedef enum
+{
+ GPS_STATE_RECEIVING, // 正在接收数据
+ GPS_STATE_RECEIVED, // 数据接收完成
+ GPS_STATE_PARSING, // 正在解析
+}gps_state_enum;
+//=============================================定义 GPS 数据结构体==================================================
+
+//==============================================声明 GPS 数据变量===================================================
+extern gps_info_struct gps_tau1201;
+extern uint8 gps_tau1201_flag;
+//==============================================声明 GPS 数据变量===================================================
+
+//================================================GPS 基础函数====================================================
+double get_two_points_distance (double lat1, double lng1, double lat2, double lng2); // 计算从第一个点到第二个点的距离(单位：m)
+double get_two_points_azimuth (double lat1, double lon1, double lat2, double lon2); // 计算从第一个点到第二个点的方位角(单位：°)
+
+uint8 gps_data_parse (void); // 解析GPS数据
+void gps_uart_callback (void); // GPS回调函数
+
+uint8 gps_init (void); // GPS初始化
+//================================================GPS 基础函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_icm20602.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_icm20602.c
new file mode 100644
index 0000000..77233d4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_icm20602.c
@@ -0,0 +1,324 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_icm20602
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 硬件 SPI 引脚
+* SCL/SPC 查看 zf_device_icm20602.h 中 ICM20602_SPC_PIN 宏定义
+* SDA/DSI 查看 zf_device_icm20602.h 中 ICM20602_SDI_PIN 宏定义
+* SA0/SDO 查看 zf_device_icm20602.h 中 ICM20602_SDO_PIN 宏定义
+* CS 查看 zf_device_icm20602.h 中 ICM20602_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+*
+* // 软件 IIC 引脚
+* SCL/SPC 查看 zf_device_icm20602.h 中 ICM20602_SCL_PIN 宏定义
+* SDA/DSI 查看 zf_device_icm20602.h 中 ICM20602_SDA_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_spi.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_soft_iic.h"
+#include "zf_device_icm20602.h"
+
+int16 icm20602_gyro_x = 0, icm20602_gyro_y = 0, icm20602_gyro_z = 0; // 三轴陀螺仪数据 gyro (陀螺仪)
+int16 icm20602_acc_x = 0, icm20602_acc_y = 0, icm20602_acc_z = 0; // 三轴加速度计数据 acc (accelerometer 加速度计)
+
+#if ICM20602_USE_SOFT_IIC
+static soft_iic_info_struct icm20602_iic_struct;
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ICM20602 写寄存器
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 icm20602_write_register(ICM20602_PWR_MGMT_1, 0x80);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define icm20602_write_register(reg, data) (soft_iic_write_8bit_register(&icm20602_iic_struct, (reg), (data)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ICM20602 读寄存器
+// 参数说明 reg 寄存器地址
+// 返回参数 uint8 数据
+// 使用示例 icm20602_read_register(ICM20602_WHO_AM_I);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define icm20602_read_register(reg) (soft_iic_read_8bit_register(&icm20602_iic_struct, (reg)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ICM20602 读数据
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据缓冲区
+// 参数说明 len 数据长度
+// 返回参数 void
+// 使用示例 icm20602_read_registers(ICM20602_ACCEL_XOUT_H, dat, 6);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define icm20602_read_registers(reg, data, len) (soft_iic_read_8bit_registers(&icm20602_iic_struct, (reg), (data), (len)))
+#else
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ICM20602 写寄存器
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 icm20602_write_register(ICM20602_PWR_MGMT_1, 0x80);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void icm20602_write_register(uint8 reg, uint8 data)
+{
+ ICM20602_CS(0);
+ spi_write_8bit_register(ICM20602_SPI, reg | ICM20602_SPI_W, data);
+ ICM20602_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ICM20602 读寄存器
+// 参数说明 reg 寄存器地址
+// 返回参数 uint8 数据
+// 使用示例 icm20602_read_register(ICM20602_WHO_AM_I);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 icm20602_read_register(uint8 reg)
+{
+ uint8 data = 0;
+ ICM20602_CS(0);
+ data = spi_read_8bit_register(ICM20602_SPI, reg | ICM20602_SPI_R);
+ ICM20602_CS(1);
+ return data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ICM20602 读数据
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据缓冲区
+// 参数说明 len 数据长度
+// 返回参数 void
+// 使用示例 icm20602_read_registers(ICM20602_ACCEL_XOUT_H, dat, 6);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void icm20602_read_registers(uint8 reg, uint8 *data, uint32 len)
+{
+ ICM20602_CS(0);
+ spi_read_8bit_registers(ICM20602_SPI, reg | ICM20602_SPI_R, data, len);
+ ICM20602_CS(1);
+}
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ICM20602 自检
+// 参数说明 void
+// 返回参数 uint8 1-自检失败 0-自检成功
+// 使用示例 icm20602_self_check();
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 icm20602_self_check (void)
+{
+ uint8 dat = 0, return_state = 0;
+ uint16 timeout_count = 0;
+
+ while(0x12 != dat) // 判断 ID 是否正确
+ {
+ if(timeout_count ++ > ICM20602_TIMEOUT_COUNT)
+ {
+ return_state = 1;
+ break;
+ }
+ dat = icm20602_read_register(ICM20602_WHO_AM_I);
+ system_delay_ms(10);
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 ICM20602 加速度计数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 icm20602_get_acc(); // 执行该函数后，直接查看对应的变量即可
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void icm20602_get_acc (void)
+{
+ uint8 dat[6];
+
+ icm20602_read_registers(ICM20602_ACCEL_XOUT_H, dat, 6);
+ icm20602_acc_x = (int16)(((uint16)dat[0] << 8 | dat[1]));
+ icm20602_acc_y = (int16)(((uint16)dat[2] << 8 | dat[3]));
+ icm20602_acc_z = (int16)(((uint16)dat[4] << 8 | dat[5]));
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 ICM20602 陀螺仪数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 icm20602_get_gyro(); // 执行该函数后，直接查看对应的变量即可
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void icm20602_get_gyro (void)
+{
+ uint8 dat[6];
+
+ icm20602_read_registers(ICM20602_GYRO_XOUT_H, dat, 6);
+ icm20602_gyro_x = (int16)(((uint16)dat[0] << 8 | dat[1]));
+ icm20602_gyro_y = (int16)(((uint16)dat[2] << 8 | dat[3]));
+ icm20602_gyro_z = (int16)(((uint16)dat[4] << 8 | dat[5]));
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 ICM20602 加速度计数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的加速度计数据
+// 返回参数 void
+// 使用示例 float data = icm20602_acc_transition(imu660ra_acc_x); //单位为 g(m/s^2)
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float icm20602_acc_transition (int16 acc_value)
+{
+ float acc_data = 0;
+ switch(ICM20602_ACC_SAMPLE)
+ {
+ case 0x00: acc_data = (float)acc_value / 16384; break; // 0x00 加速度计量程为:±2g 获取到的加速度计数据 除以16384 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x08: acc_data = (float)acc_value / 8192; break; // 0x08 加速度计量程为:±4g 获取到的加速度计数据 除以8192 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x10: acc_data = (float)acc_value / 4096; break; // 0x10 加速度计量程为:±8g 获取到的加速度计数据 除以4096 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x18: acc_data = (float)acc_value / 2048; break; // 0x18 加速度计量程为:±16g 获取到的加速度计数据 除以2048 可以转化为带物理单位的数据，单位：g(m/s^2)
+ default: break;
+ }
+ return acc_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 ICM20602 陀螺仪数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的陀螺仪数据
+// 返回参数 void
+// 使用示例 float data = icm20602_gyro_transition(imu660ra_gyro_x); // 单位为°/s
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float icm20602_gyro_transition (int16 gyro_value)
+{
+ float gyro_data = 0;
+ switch(ICM20602_GYR_SAMPLE)
+ {
+ case 0x00: gyro_data = (float)gyro_value / 131.2f; break; // 0x00 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131 可以转化为带物理单位的数据，单位为：°/s
+ case 0x08: gyro_data = (float)gyro_value / 65.6f; break; // 0x08 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.5 可以转化为带物理单位的数据，单位为：°/s
+ case 0x10: gyro_data = (float)gyro_value / 32.8f; break; // 0x10 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+ case 0x18: gyro_data = (float)gyro_value / 16.4f; break; // 0x18 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+ default: break;
+ }
+ return gyro_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 初始化 ICM20602
+// 参数说明 void
+// 返回参数 uint8 1-初始化失败 0-初始化成功
+// 使用示例 icm20602_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 icm20602_init (void)
+{
+ uint8 val = 0x0, return_state = 0;
+ uint16 timeout_count = 0;
+
+ system_delay_ms(10); // 上电延时
+
+#if ICM20602_USE_SOFT_IIC
+ soft_iic_init(&icm20602_iic_struct, ICM20602_DEV_ADDR, ICM20602_SOFT_IIC_DELAY, ICM20602_SCL_PIN, ICM20602_SDA_PIN);
+#else
+ spi_init(ICM20602_SPI, SPI_MODE0, ICM20602_SPI_SPEED, ICM20602_SPC_PIN, ICM20602_SDI_PIN, ICM20602_SDO_PIN, SPI_CS_NULL);
+ gpio_init(ICM20602_CS_PIN, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+#endif
+
+ do
+ {
+ if(icm20602_self_check())
+ {
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是 ICM20602 自检出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "icm20602 self check error.");
+ return_state = 1;
+ break;
+ }
+
+ icm20602_write_register(ICM20602_PWR_MGMT_1, 0x80); // 复位设备
+ system_delay_ms(2);
+
+ do
+ { // 等待复位成功
+ val = icm20602_read_register(ICM20602_PWR_MGMT_1);
+ if(timeout_count ++ > ICM20602_TIMEOUT_COUNT)
+ {
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是 ICM20602 自检出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "icm20602 reset error.");
+ return_state = 1;
+ break;
+ }
+ }while(0x41 != val);
+ if(1 == return_state)
+ {
+ break;
+ }
+
+ icm20602_write_register(ICM20602_PWR_MGMT_1, 0x01); // 时钟设置
+ icm20602_write_register(ICM20602_PWR_MGMT_2, 0x00); // 开启陀螺仪和加速度计
+ icm20602_write_register(ICM20602_CONFIG, 0x01); // 176HZ 1KHZ
+ icm20602_write_register(ICM20602_SMPLRT_DIV, 0x07); // 采样速率 SAMPLE_RATE = INTERNAL_SAMPLE_RATE / (1 + SMPLRT_DIV)
+ icm20602_write_register(ICM20602_GYRO_CONFIG, ICM20602_GYR_SAMPLE); // ±2000 dps
+ icm20602_write_register(ICM20602_ACCEL_CONFIG, ICM20602_ACC_SAMPLE); // ±8g
+ icm20602_write_register(ICM20602_ACCEL_CONFIG_2, 0x03); // Average 4 samples 44.8HZ //0x23 Average 16 samples
+ // ICM20602_GYR_CONFIG寄存器
+ // 设置为:0x00 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131.2 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x08 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.6 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x10 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x18 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+
+ // ICM20602_ACCEL_CONFIG寄存器
+ // 设置为:0x00 加速度计量程为:±2g 获取到的加速度计数据 除以16384 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x08 加速度计量程为:±4g 获取到的加速度计数据 除以8192 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x10 加速度计量程为:±8g 获取到的加速度计数据 除以4096 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x18 加速度计量程为:±16g 获取到的加速度计数据 除以2048 可以转化为带物理单位的数据，单位：g(m/s^2)
+ }while(0);
+ return return_state;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_icm20602.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_icm20602.h
new file mode 100644
index 0000000..66fb233
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_icm20602.h
@@ -0,0 +1,182 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_icm20602
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 硬件 SPI 引脚
+* SCL/SPC 查看 zf_device_icm20602.h 中 ICM20602_SPC_PIN 宏定义
+* SDA/DSI 查看 zf_device_icm20602.h 中 ICM20602_SDI_PIN 宏定义
+* SA0/SDO 查看 zf_device_icm20602.h 中 ICM20602_SDO_PIN 宏定义
+* CS 查看 zf_device_icm20602.h 中 ICM20602_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+*
+* // 软件 IIC 引脚
+* SCL/SPC 查看 zf_device_icm20602.h 中 ICM20602_SCL_PIN 宏定义
+* SDA/DSI 查看 zf_device_icm20602.h 中 ICM20602_SDA_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+#ifndef _zf_device_icm20602_h_
+#define _zf_device_icm20602_h_
+
+#include "zf_common_typedef.h"
+
+#define ICM20602_USE_SOFT_IIC (0) // 默认使用硬件 SPI 方式驱动
+#if ICM20602_USE_SOFT_IIC // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 IIC 驱动====================================================
+#define ICM20602_SOFT_IIC_DELAY (59 ) // 软件 IIC 的时钟延时周期 数值越小 IIC 通信速率越快
+#define ICM20602_SCL_PIN (P20_11) // 软件 IIC SCL 引脚 连接 ICM20602 的 SCL 引脚
+#define ICM20602_SDA_PIN (P20_14) // 软件 IIC SDA 引脚 连接 ICM20602 的 SDA 引脚
+//====================================================软件 IIC 驱动====================================================
+#else
+
+//====================================================硬件 SPI 驱动====================================================
+#define ICM20602_SPI_SPEED (10 * 1000 * 1000) // 硬件 SPI 速率
+#define ICM20602_SPI (SPI_0) // 硬件 SPI 号
+#define ICM20602_SPC_PIN (SPI0_SCLK_P20_11) // 硬件 SPI SCK 引脚
+#define ICM20602_SDI_PIN (SPI0_MOSI_P20_14) // 硬件 SPI MOSI 引脚
+#define ICM20602_SDO_PIN (SPI0_MISO_P20_12) // 硬件 SPI MISO 引脚
+//====================================================硬件 SPI 驱动====================================================
+#endif
+
+#define ICM20602_CS_PIN (P20_13) // CS 片选引脚
+#define ICM20602_CS(x) ((x) ? (gpio_high(ICM20602_CS_PIN)) : (gpio_low(ICM20602_CS_PIN)))
+#define ICM20602_TIMEOUT_COUNT (0x00FF) // ICM20602 超时计数
+
+//================================================定义 ICM20602 内部地址================================================
+#define ICM20602_DEV_ADDR (0x69) // SA0接地：0x68 SA0上拉：0x69 模块默认上拉
+#define ICM20602_SPI_W (0x00)
+#define ICM20602_SPI_R (0x80)
+
+#define ICM20602_XG_OFFS_TC_H (0x04)
+#define ICM20602_XG_OFFS_TC_L (0x05)
+#define ICM20602_YG_OFFS_TC_H (0x07)
+#define ICM20602_YG_OFFS_TC_L (0x08)
+#define ICM20602_ZG_OFFS_TC_H (0x0A)
+#define ICM20602_ZG_OFFS_TC_L (0x0B)
+#define ICM20602_SELF_TEST_X_ACCEL (0x0D)
+#define ICM20602_SELF_TEST_Y_ACCEL (0x0E)
+#define ICM20602_SELF_TEST_Z_ACCEL (0x0F)
+#define ICM20602_XG_OFFS_USRH (0x13)
+#define ICM20602_XG_OFFS_USRL (0x14)
+#define ICM20602_YG_OFFS_USRH (0x15)
+#define ICM20602_YG_OFFS_USRL (0x16)
+#define ICM20602_ZG_OFFS_USRH (0x17)
+#define ICM20602_ZG_OFFS_USRL (0x18)
+#define ICM20602_SMPLRT_DIV (0x19)
+#define ICM20602_CONFIG (0x1A)
+#define ICM20602_GYRO_CONFIG (0x1B)
+#define ICM20602_ACCEL_CONFIG (0x1C)
+#define ICM20602_ACCEL_CONFIG_2 (0x1D)
+#define ICM20602_LP_MODE_CFG (0x1E)
+#define ICM20602_ACCEL_WOM_X_THR (0x20)
+#define ICM20602_ACCEL_WOM_Y_THR (0x21)
+#define ICM20602_ACCEL_WOM_Z_THR (0x22)
+#define ICM20602_FIFO_EN (0x23)
+#define ICM20602_FSYNC_INT (0x36)
+#define ICM20602_INT_PIN_CFG (0x37)
+#define ICM20602_INT_ENABLE (0x38)
+#define ICM20602_FIFO_WM_INT_STATUS (0x39)
+#define ICM20602_INT_STATUS (0x3A)
+#define ICM20602_ACCEL_XOUT_H (0x3B)
+#define ICM20602_ACCEL_XOUT_L (0x3C)
+#define ICM20602_ACCEL_YOUT_H (0x3D)
+#define ICM20602_ACCEL_YOUT_L (0x3E)
+#define ICM20602_ACCEL_ZOUT_H (0x3F)
+#define ICM20602_ACCEL_ZOUT_L (0x40)
+#define ICM20602_TEMP_OUT_H (0x41)
+#define ICM20602_TEMP_OUT_L (0x42)
+#define ICM20602_GYRO_XOUT_H (0x43)
+#define ICM20602_GYRO_XOUT_L (0x44)
+#define ICM20602_GYRO_YOUT_H (0x45)
+#define ICM20602_GYRO_YOUT_L (0x46)
+#define ICM20602_GYRO_ZOUT_H (0x47)
+#define ICM20602_GYRO_ZOUT_L (0x48)
+#define ICM20602_SELF_TEST_X_GYRO (0x50)
+#define ICM20602_SELF_TEST_Y_GYRO (0x51)
+#define ICM20602_SELF_TEST_Z_GYRO (0x52)
+#define ICM20602_FIFO_WM_TH1 (0x60)
+#define ICM20602_FIFO_WM_TH2 (0x61)
+#define ICM20602_SIGNAL_PATH_RESET (0x68)
+#define ICM20602_ACCEL_INTEL_CTRL (0x69)
+#define ICM20602_USER_CTRL (0x6A)
+#define ICM20602_PWR_MGMT_1 (0x6B)
+#define ICM20602_PWR_MGMT_2 (0x6C)
+#define ICM20602_I2C_IF (0x70)
+#define ICM20602_FIFO_COUNTH (0x72)
+#define ICM20602_FIFO_COUNTL (0x73)
+#define ICM20602_FIFO_R_W (0x74)
+#define ICM20602_WHO_AM_I (0x75)
+#define ICM20602_XA_OFFSET_H (0x77)
+#define ICM20602_XA_OFFSET_L (0x78)
+#define ICM20602_YA_OFFSET_H (0x7A)
+#define ICM20602_YA_OFFSET_L (0x7B)
+#define ICM20602_ZA_OFFSET_H (0x7D)
+#define ICM20602_ZA_OFFSET_L (0x7E)
+
+#define ICM20602_ACC_SAMPLE (0x10) // 加速度计量程
+// 设置为:0x00 加速度计量程为:±2g 获取到的加速度计数据 除以16384 可以转化为带物理单位的数据，单位：g(m/s^2)
+// 设置为:0x08 加速度计量程为:±4g 获取到的加速度计数据 除以8192 可以转化为带物理单位的数据，单位：g(m/s^2)
+// 设置为:0x10 加速度计量程为:±8g 获取到的加速度计数据 除以4096 可以转化为带物理单位的数据，单位：g(m/s^2)
+// 设置为:0x18 加速度计量程为:±16g 获取到的加速度计数据 除以2048 可以转化为带物理单位的数据，单位：g(m/s^2)
+
+#define ICM20602_GYR_SAMPLE (0x18) // 陀螺仪量程
+// 设置为:0x00 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x08 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.5 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x10 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x18 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+
+//================================================定义 ICM20602 内部地址================================================
+
+//===============================================声明 ICM20602 数据存储变量==============================================
+extern int16 icm20602_gyro_x, icm20602_gyro_y, icm20602_gyro_z; // 三轴陀螺仪数据
+extern int16 icm20602_acc_x, icm20602_acc_y, icm20602_acc_z; // 三轴加速度计数据
+//===============================================声明 ICM20602 数据存储变量==============================================
+
+//==================================================ICM20602 基础函数==================================================
+void icm20602_get_acc (void); // 获取 ICM20602 加速度计数据
+void icm20602_get_gyro (void); // 获取ICM20602陀螺仪数据
+float icm20602_gyro_transition (int16 gyro_value); // 将 ICM20602 陀螺仪数据转换为实际物理数据
+float icm20602_acc_transition (int16 acc_value); // 将 ICM20602 加速度计数据转换为实际物理数据
+uint8 icm20602_init (void); // 初始化 ICM20602
+//==================================================ICM20602 基础函数==================================================
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_imu660ra.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_imu660ra.c
new file mode 100644
index 0000000..e3404df
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_imu660ra.c
@@ -0,0 +1,311 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_imu660ra
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 硬件 SPI 引脚
+* SCL/SPC 查看 zf_device_imu660ra.h 中 IMU660RA_SPC_PIN 宏定义
+* SDA/DSI 查看 zf_device_imu660ra.h 中 IMU660RA_SDI_PIN 宏定义
+* SA0/SDO 查看 zf_device_imu660ra.h 中 IMU660RA_SDO_PIN 宏定义
+* CS 查看 zf_device_imu660ra.h 中 IMU660RA_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+*
+* // 软件 IIC 引脚
+* SCL/SPC 查看 zf_device_imu660ra.h 中 IMU660RA_SCL_PIN 宏定义
+* SDA/DSI 查看 zf_device_imu660ra.h 中 IMU660RA_SDA_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_spi.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_soft_iic.h"
+#include "zf_device_config.h"
+#include "zf_device_imu660ra.h"
+
+int16 imu660ra_gyro_x = 0, imu660ra_gyro_y = 0, imu660ra_gyro_z = 0; // 三轴陀螺仪数据 gyro (陀螺仪)
+int16 imu660ra_acc_x = 0, imu660ra_acc_y = 0, imu660ra_acc_z = 0; // 三轴加速度计数据 acc (accelerometer 加速度计)
+
+#if IMU660RA_USE_SOFT_IIC
+static soft_iic_info_struct imu660ra_iic_struct;
+
+#define imu660ra_write_register(reg, data) (soft_iic_write_8bit_register (&imu660ra_iic_struct, (reg), (data)))
+#define imu660ra_write_registers(reg, data, len) (soft_iic_write_8bit_registers(&imu660ra_iic_struct, (reg), (data), (len)))
+#define imu660ra_read_register(reg) (soft_iic_read_8bit_register (&imu660ra_iic_struct, (reg)))
+#define imu660ra_read_registers(reg, data, len) (soft_iic_read_8bit_registers (&imu660ra_iic_struct, (reg), (data), (len)))
+#else
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU660RA 写寄存器
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 imu660ra_write_register(IMU660RA_PWR_CONF, 0x00); // 关闭高级省电模式
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void imu660ra_write_register(uint8 reg, uint8 data)
+{
+ IMU660RA_CS(0);
+ spi_write_8bit_register(IMU660RA_SPI, reg | IMU660RA_SPI_W, data);
+ IMU660RA_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU660RA 写数据
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 imu660ra_write_registers(IMU660RA_INIT_DATA, imu660ra_config_file, sizeof(imu660ra_config_file));
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void imu660ra_write_registers(uint8 reg, const uint8 *data, uint32 len)
+{
+ IMU660RA_CS(0);
+ spi_write_8bit_registers(IMU660RA_SPI, reg | IMU660RA_SPI_W, data, len);
+ IMU660RA_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU660RA 读寄存器
+// 参数说明 reg 寄存器地址
+// 返回参数 uint8 数据
+// 使用示例 imu660ra_read_register(IMU660RA_CHIP_ID);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 imu660ra_read_register(uint8 reg)
+{
+ uint8 data[2];
+ IMU660RA_CS(0);
+ spi_read_8bit_registers(IMU660RA_SPI, reg | IMU660RA_SPI_R, data, 2);
+ IMU660RA_CS(1);
+ return data[1];
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU660RA 读数据
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据缓冲区
+// 参数说明 len 数据长度
+// 返回参数 void
+// 使用示例 imu660ra_read_registers(IMU660RA_ACC_ADDRESS, dat, 6);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void imu660ra_read_registers(uint8 reg, uint8 *data, uint32 len)
+{
+ uint8 temp_data[7];
+ IMU660RA_CS(0);
+ spi_read_8bit_registers(IMU660RA_SPI, reg | IMU660RA_SPI_R, temp_data, len + 1);
+ IMU660RA_CS(1);
+ for(int i = 0; i < len; i ++)
+ {
+ *(data ++) = temp_data[i + 1];
+ }
+}
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU660RA 自检
+// 参数说明 void
+// 返回参数 uint8 1-自检失败 0-自检成功
+// 使用示例 imu660ra_self_check();
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 imu660ra_self_check (void)
+{
+ uint8 dat = 0, return_state = 0;
+ uint16 timeout_count = 0;
+ do
+ {
+ if(timeout_count ++ > IMU660RA_TIMEOUT_COUNT)
+ {
+ return_state = 1;
+ break;
+ }
+ dat = imu660ra_read_register(IMU660RA_CHIP_ID);
+ system_delay_ms(1);
+ }while(0x24 != dat); // 读取设备ID是否等于0X24，如果不是0X24则认为没检测到设备
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 IMU660RA 加速度计数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 imu660ra_get_acc(); // 执行该函数后，直接查看对应的变量即可
+// 备注信息 使用 SPI 的采集时间为69us
+// 使用 IIC 的采集时间为126us 采集加速度计的时间与采集陀螺仪的时间一致的原因是都只是读取寄存器数据
+//-------------------------------------------------------------------------------------------------------------------
+void imu660ra_get_acc (void)
+{
+ uint8 dat[6];
+
+ imu660ra_read_registers(IMU660RA_ACC_ADDRESS, dat, 6);
+ imu660ra_acc_x = (int16)(((uint16)dat[1]<<8 | dat[0]));
+ imu660ra_acc_y = (int16)(((uint16)dat[3]<<8 | dat[2]));
+ imu660ra_acc_z = (int16)(((uint16)dat[5]<<8 | dat[4]));
+}
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 IMU660RA 陀螺仪数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 imu660ra_get_gyro(); // 执行该函数后，直接查看对应的变量即可
+// 备注信息 使用 SPI 的采集时间为69us
+// 使用 IIC 的采集时间为126us
+//-------------------------------------------------------------------------------------------------------------------
+void imu660ra_get_gyro (void)
+{
+ uint8 dat[6];
+
+ imu660ra_read_registers(IMU660RA_GYRO_ADDRESS, dat, 6);
+ imu660ra_gyro_x = (int16)(((uint16)dat[1]<<8 | dat[0]));
+ imu660ra_gyro_y = (int16)(((uint16)dat[3]<<8 | dat[2]));
+ imu660ra_gyro_z = (int16)(((uint16)dat[5]<<8 | dat[4]));
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 IMU660RA 加速度计数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的加速度计数据
+// 返回参数 void
+// 使用示例 float data = imu660ra_acc_transition(imu660ra_acc_x); //单位为 g(m/s^2)
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float imu660ra_acc_transition (int16 acc_value)
+{
+ float acc_data = 0;
+ switch(IMU660RA_ACC_SAMPLE)
+ {
+ case 0x00: acc_data = (float)acc_value / 16384; break; // 0x00 加速度计量程为:±2g 获取到的加速度计数据 除以16384 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x01: acc_data = (float)acc_value / 8192; break; // 0x01 加速度计量程为:±4g 获取到的加速度计数据 除以8192 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x02: acc_data = (float)acc_value / 4096; break; // 0x02 加速度计量程为:±8g 获取到的加速度计数据 除以4096 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x03: acc_data = (float)acc_value / 2048; break; // 0x03 加速度计量程为:±16g 获取到的加速度计数据 除以2048 可以转化为带物理单位的数据，单位：g(m/s^2)
+ default: break;
+ }
+ return acc_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 IMU660RA 陀螺仪数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的陀螺仪数据
+// 返回参数 void
+// 使用示例 float data = imu660ra_gyro_transition(imu660ra_gyro_x); // 单位为°/s
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float imu660ra_gyro_transition (int16 gyro_value)
+{
+ float gyro_data = 0;
+ switch(IMU660RA_GYR_SAMPLE)
+ {
+ case 0x00: gyro_data = (float)gyro_value / 16.4f; break; // 0x00 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+ case 0x01: gyro_data = (float)gyro_value / 32.8f; break; // 0x01 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+ case 0x02: gyro_data = (float)gyro_value / 65.6f; break; // 0x02 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.6 可以转化为带物理单位的数据，单位为：°/s
+ case 0x03: gyro_data = (float)gyro_value / 131.2f; break; // 0x03 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131.2 可以转化为带物理单位的数据，单位为：°/s
+ case 0x04: gyro_data = (float)gyro_value / 262.4f; break; // 0x04 陀螺仪量程为:±125 dps 获取到的陀螺仪数据除以262.4 可以转化为带物理单位的数据，单位为：°/s
+ default: break;
+ }
+ return gyro_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 初始化 IMU660RA
+// 参数说明 void
+// 返回参数 uint8 1-初始化失败 0-初始化成功
+// 使用示例 imu660ra_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 imu660ra_init (void)
+{
+ uint8 return_state = 0;
+ system_delay_ms(20); // 等待设备上电成功
+#if IMU660RA_USE_SOFT_IIC
+ soft_iic_init(&imu660ra_iic_struct, IMU660RA_DEV_ADDR, IMU660RA_SOFT_IIC_DELAY, IMU660RA_SCL_PIN, IMU660RA_SDA_PIN); // 配置 IMU660RA 的 IIC端口
+#else
+ spi_init(IMU660RA_SPI, SPI_MODE0, IMU660RA_SPI_SPEED, IMU660RA_SPC_PIN, IMU660RA_SDI_PIN, IMU660RA_SDO_PIN, SPI_CS_NULL); // 配置 IMU660RA 的 SPI端口
+ gpio_init(IMU660RA_CS_PIN, GPO, GPIO_HIGH, GPO_PUSH_PULL); // 配置 IMU660RA 的 CS端口
+ imu660ra_read_register(IMU660RA_CHIP_ID); // 读取一下设备ID，将设备设置为SPI模式
+#endif
+ do{
+ if(imu660ra_self_check()) // IMU660RA自检
+ {
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是 imu660ra 自检出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "imu660ra self check error.");
+ return_state = 1;
+ break;
+ }
+ imu660ra_write_register(IMU660RA_PWR_CONF, 0x00); // 关闭高级省电模式
+ system_delay_ms(1);
+ imu660ra_write_register(IMU660RA_INIT_CTRL, 0x00); // 开始对模块进行初始化配置
+ imu660ra_write_registers(IMU660RA_INIT_DATA, imu660ra_config_file, sizeof(imu660ra_config_file)); // 输出配置文件
+ imu660ra_write_register(IMU660RA_INIT_CTRL, 0x01); // 初始化配置结束
+ system_delay_ms(20);
+ if(imu660ra_read_register(IMU660RA_INT_STA) == 0) // 检查是否配置完成
+ {
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是 imu660ra 配置初始化文件出错了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "imu660ra init error.");
+ return_state = 1;
+ break;
+ }
+ imu660ra_write_register(IMU660RA_PWR_CTRL, 0x0E); // 开启性能模式 使能陀螺仪、加速度、温度传感器
+ imu660ra_write_register(IMU660RA_ACC_CONF, 0xA7); // 加速度采集配置 性能模式 正常采集 50Hz 采样频率
+ imu660ra_write_register(IMU660RA_GYR_CONF, 0xA9); // 陀螺仪采集配置 性能模式 正常采集 200Hz采样频率
+ imu660ra_write_register(IMU660RA_ACC_RANGE, IMU660RA_ACC_SAMPLE); // 加速度量程配置 配置量程为:±8g
+ imu660ra_write_register(IMU660RA_GYR_RANGE, IMU660RA_GYR_SAMPLE); // 陀螺仪量程配置 配置量程为:±2000dps
+
+ // IMU660RA_GYR_RANGE寄存器
+ // 设置为:0x00 加速度计量程为:±2g 获取到的加速度计数据 除以16384 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x01 加速度计量程为:±4g 获取到的加速度计数据 除以8192 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x02 加速度计量程为:±8g 获取到的加速度计数据 除以4096 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x03 加速度计量程为:±16g 获取到的加速度计数据 除以2048 可以转化为带物理单位的数据，单位：g(m/s^2)
+
+ // IMU660RA_ACC_SAMPLE寄存器
+ // 设置为:0x00 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x01 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x02 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.6 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x03 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131.2 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x04 陀螺仪量程为:±125 dps 获取到的陀螺仪数据除以262.4 可以转化为带物理单位的数据，单位为：°/s
+ }while(0);
+ return return_state;
+}
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_imu660ra.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_imu660ra.h
new file mode 100644
index 0000000..47cce03
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_imu660ra.h
@@ -0,0 +1,132 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_imu660ra
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 硬件 SPI 引脚
+* SCL/SPC 查看 zf_device_imu660ra.h 中 IMU660RA_SPC_PIN 宏定义
+* SDA/DSI 查看 zf_device_imu660ra.h 中 IMU660RA_SDI_PIN 宏定义
+* SA0/SDO 查看 zf_device_imu660ra.h 中 IMU660RA_SDO_PIN 宏定义
+* CS 查看 zf_device_imu660ra.h 中 IMU660RA_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+*
+* // 软件 IIC 引脚
+* SCL/SPC 查看 zf_device_imu660ra.h 中 IMU660RA_SCL_PIN 宏定义
+* SDA/DSI 查看 zf_device_imu660ra.h 中 IMU660RA_SDA_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_imu660ra_h_
+#define _zf_device_imu660ra_h_
+
+#include "zf_common_typedef.h"
+
+
+// IMU660RA_USE_SOFT_IIC定义为0表示使用硬件SPI驱动 定义为1表示使用软件IIC驱动
+// 当更改IMU660RA_USE_SOFT_IIC定义后，需要先编译并下载程序，单片机与模块需要断电重启才能正常通讯
+#define IMU660RA_USE_SOFT_IIC (0) // 默认使用硬件 SPI 方式驱动
+#if IMU660RA_USE_SOFT_IIC // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 IIC 驱动====================================================
+#define IMU660RA_SOFT_IIC_DELAY (59 ) // 软件 IIC 的时钟延时周期 数值越小 IIC 通信速率越快
+#define IMU660RA_SCL_PIN (P20_11) // 软件 IIC SCL 引脚 连接 IMU660RA 的 SCL 引脚
+#define IMU660RA_SDA_PIN (P20_14) // 软件 IIC SDA 引脚 连接 IMU660RA 的 SDA 引脚
+//====================================================软件 IIC 驱动====================================================
+#else
+
+//====================================================硬件 SPI 驱动====================================================
+#define IMU660RA_SPI_SPEED (10 * 1000 * 1000) // 硬件 SPI 速率
+#define IMU660RA_SPI (SPI_0) // 硬件 SPI 号
+#define IMU660RA_SPC_PIN (SPI0_SCLK_P20_11) // 硬件 SPI SCK 引脚
+#define IMU660RA_SDI_PIN (SPI0_MOSI_P20_14) // 硬件 SPI MOSI 引脚
+#define IMU660RA_SDO_PIN (SPI0_MISO_P20_12) // 硬件 SPI MISO 引脚
+//====================================================硬件 SPI 驱动====================================================
+#endif
+#define IMU660RA_CS_PIN (P20_13) // CS 片选引脚
+#define IMU660RA_CS(x) ((x) ? (gpio_high(IMU660RA_CS_PIN)) : (gpio_low(IMU660RA_CS_PIN)))
+#define IMU660RA_TIMEOUT_COUNT (0x00FF) // IMU660 超时计数
+
+//================================================定义 IMU660RA 内部地址================================================
+#define IMU660RA_DEV_ADDR (0x69) // SA0接地：0x68 SA0上拉：0x69 模块默认上拉
+#define IMU660RA_SPI_W (0x00)
+#define IMU660RA_SPI_R (0x80)
+
+#define IMU660RA_CHIP_ID (0x00)
+#define IMU660RA_PWR_CONF (0x7C)
+#define IMU660RA_PWR_CTRL (0x7D)
+#define IMU660RA_INIT_CTRL (0x59)
+#define IMU660RA_INIT_DATA (0x5E)
+#define IMU660RA_INT_STA (0x21)
+#define IMU660RA_ACC_ADDRESS (0x0C)
+#define IMU660RA_GYRO_ADDRESS (0x12)
+#define IMU660RA_ACC_CONF (0x40)
+#define IMU660RA_ACC_RANGE (0x41)
+#define IMU660RA_GYR_CONF (0x42)
+#define IMU660RA_GYR_RANGE (0x43)
+#define IMU660RA_ACC_SAMPLE (0x02) // 加速度计量程
+// 设置为:0x00 陀螺仪量程为:±2000dps 获取到的陀螺仪数据 除以 16.4 可以转化为带物理单位的数据 单位为：°/s
+// 设置为:0x01 陀螺仪量程为:±1000dps 获取到的陀螺仪数据 除以 32.8 可以转化为带物理单位的数据 单位为：°/s
+// 设置为:0x02 陀螺仪量程为:±500 dps 获取到的陀螺仪数据 除以 65.6 可以转化为带物理单位的数据 单位为：°/s
+// 设置为:0x03 陀螺仪量程为:±250 dps 获取到的陀螺仪数据 除以 131.2 可以转化为带物理单位的数据 单位为：°/s
+// 设置为:0x04 陀螺仪量程为:±125 dps 获取到的陀螺仪数据 除以 262.4 可以转化为带物理单位的数据 单位为：°/s
+
+#define IMU660RA_GYR_SAMPLE (0x00) // 陀螺仪量程
+// 设置为:0x00 加速度计量程为:±2g 获取到的加速度计数据 除以 16384 可以转化为带物理单位的数据 单位：g(m/s^2)
+// 设置为:0x01 加速度计量程为:±4g 获取到的加速度计数据 除以 8192 可以转化为带物理单位的数据 单位：g(m/s^2)
+// 设置为:0x02 加速度计量程为:±8g 获取到的加速度计数据 除以 4096 可以转化为带物理单位的数据 单位：g(m/s^2)
+// 设置为:0x03 加速度计量程为:±16g 获取到的加速度计数据 除以 2048 可以转化为带物理单位的数据 单位：g(m/s^2)
+
+//================================================定义 IMU660RA 内部地址================================================
+
+//===============================================声明 IMU660RA 数据存储变量===============================================
+extern int16 imu660ra_gyro_x, imu660ra_gyro_y, imu660ra_gyro_z; // 三轴陀螺仪数据 gyro (陀螺仪)
+extern int16 imu660ra_acc_x, imu660ra_acc_y, imu660ra_acc_z; // 三轴加速度计数据 acc (accelerometer 加速度计)
+//===============================================声明 IMU660RA 数据存储变量===============================================
+
+//==================================================IMU660RA 基础函数==================================================
+void imu660ra_get_acc (void); // 获取 IMU660RA 加速度计数据
+void imu660ra_get_gyro (void); // 获取 IMU660RA 陀螺仪数据
+float imu660ra_acc_transition (int16 acc_value); // 将 IMU660RA 加速度计数据转换为实际物理数据
+float imu660ra_gyro_transition (int16 gyro_value); // 将 IMU660RA 陀螺仪数据转换为实际物理数据
+uint8 imu660ra_init (void); // 初始化 IMU660RA
+//==================================================IMU660RA 基础函数===================================================
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_imu963ra.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_imu963ra.c
new file mode 100644
index 0000000..ef770d9
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_imu963ra.c
@@ -0,0 +1,498 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_imu963ra
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 硬件 SPI 引脚
+* SCL/SPC 查看 zf_device_imu963ra.h 中 IMU963RA_SPC_PIN 宏定义
+* SDA/DSI 查看 zf_device_imu963ra.h 中 IMU963RA_SDI_PIN 宏定义
+* SA0/SDO 查看 zf_device_imu963ra.h 中 IMU963RA_SDO_PIN 宏定义
+* CS 查看 zf_device_imu963ra.h 中 IMU963RA_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+*
+* // 软件 IIC 引脚
+* SCL/SPC 查看 zf_device_imu963ra.h 中 IMU963RA_SCL_PIN 宏定义
+* SDA/DSI 查看 zf_device_imu963ra.h 中 IMU963RA_SDA_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_spi.h"
+#include "zf_driver_soft_iic.h"
+#include "zf_device_imu963ra.h"
+
+int16 imu963ra_gyro_x = 0, imu963ra_gyro_y = 0, imu963ra_gyro_z = 0;
+int16 imu963ra_acc_x = 0, imu963ra_acc_y = 0, imu963ra_acc_z = 0;
+int16 imu963ra_mag_x = 0, imu963ra_mag_y = 0, imu963ra_mag_z = 0;
+
+#if IMU963RA_USE_SOFT_IIC
+static soft_iic_info_struct imu963ra_iic_struct;
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 写寄存器
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 imu963ra_write_acc_gyro_register(IMU963RA_SLV0_CONFIG, 0x00);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define imu963ra_write_acc_gyro_register(reg,data) (soft_iic_write_8bit_register(&imu963ra_iic_struct,reg,data))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 读寄存器
+// 参数说明 reg 寄存器地址
+// 返回参数 uint8 数据
+// 使用示例 imu963ra_read_acc_gyro_register(IMU963RA_STATUS_MASTER);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define imu963ra_read_acc_gyro_register(reg) (soft_iic_sccb_read_register(&imu963ra_iic_struct,reg))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 读数据 内部调用
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据缓冲区
+// 参数说明 len 数据长度
+// 返回参数 void
+// 使用示例 imu963ra_read_acc_gyro_registers(IMU963RA_OUTX_L_A, dat, 6);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define imu963ra_read_acc_gyro_registers(reg,data,len) (soft_iic_read_8bit_registers(&imu963ra_iic_struct,reg,data,len))
+#else
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 写寄存器
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 imu963ra_write_acc_gyro_register(IMU963RA_SLV0_CONFIG, 0x00);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void imu963ra_write_acc_gyro_register(uint8 reg, uint8 data)
+{
+ IMU963RA_CS(0);
+ spi_write_8bit_register(IMU963RA_SPI, reg | IMU963RA_SPI_W, data);
+
+ IMU963RA_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 读寄存器
+// 参数说明 reg 寄存器地址
+// 返回参数 uint8 数据
+// 使用示例 imu963ra_read_acc_gyro_register(IMU963RA_STATUS_MASTER);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 imu963ra_read_acc_gyro_register(uint8 reg)
+{
+ uint8 data = 0;
+ IMU963RA_CS(0);
+ data = spi_read_8bit_register(IMU963RA_SPI, reg | IMU963RA_SPI_R);
+
+ IMU963RA_CS(1);
+ return data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 读数据 内部调用
+// 参数说明 reg 寄存器地址
+// 参数说明 data 数据缓冲区
+// 参数说明 len 数据长度
+// 返回参数 void
+// 使用示例 imu963ra_read_acc_gyro_registers(IMU963RA_OUTX_L_A, dat, 6);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void imu963ra_read_acc_gyro_registers(uint8 reg, uint8 *data, uint32 len)
+{
+ IMU963RA_CS(0);
+ spi_read_8bit_registers(IMU963RA_SPI, reg | IMU963RA_SPI_R, data, len);
+
+ IMU963RA_CS(1);
+}
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 作为 IIC 主机向磁力计写数据
+// 参数说明 addr 目标地址
+// 参数说明 reg 目标寄存器
+// 参数说明 data 数据
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 imu963ra_write_mag_register(IMU963RA_MAG_ADDR, IMU963RA_MAG_CONTROL2, 0x80);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 imu963ra_write_mag_register (uint8 addr, uint8 reg, uint8 data)
+{
+ uint8 return_state = 0;
+ uint16 timeout_count = 0;
+
+ addr = addr << 1;
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_CONFIG, 0x00); // 从机0配置清除
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_ADD, addr | 0); // 设置地磁计地址（注意这里需要设置8位的I2C地址） 0x2C
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_SUBADD, reg); // 需要写入的寄存器地址
+ imu963ra_write_acc_gyro_register(IMU963RA_DATAWRITE_SLV0, data); // 需要写入的数据
+ imu963ra_write_acc_gyro_register(IMU963RA_MASTER_CONFIG, 0x4C); // 仅在第一个周期启用通讯 开启上拉 I2C主机使能
+
+ // 等待通讯成功
+ while(0 == (0x80 & imu963ra_read_acc_gyro_register(IMU963RA_STATUS_MASTER)))
+ {
+ if(timeout_count ++ > IMU963RA_TIMEOUT_COUNT)
+ {
+ return_state = 1;
+ break;
+ }
+ system_delay_ms(2);
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 作为 IIC 主机向磁力计读数据
+// 参数说明 addr 目标地址
+// 参数说明 reg 目标寄存器
+// 返回参数 uint8 读取的数据
+// 使用示例 imu963ra_read_mag_register(IMU963RA_MAG_ADDR, IMU963RA_MAG_CHIP_ID);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 imu963ra_read_mag_register (uint8 addr, uint8 reg)
+{
+ uint16 timeout_count = 0;
+
+ addr = addr << 1;
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_ADD, addr | 1); // 设置地磁计地址（注意这里需要设置8位的I2C地址） 0x2C
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_SUBADD, reg); // 需要读取的寄存器地址
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_CONFIG, 0x01);
+ imu963ra_write_acc_gyro_register(IMU963RA_MASTER_CONFIG, 0x4C); // 仅在第一个周期启用通讯 开启上拉 I2C主机使能
+
+ // 等待通讯成功
+ while(0 == (0x01 & imu963ra_read_acc_gyro_register(IMU963RA_STATUS_MASTER)))
+ {
+ if(timeout_count ++ > IMU963RA_TIMEOUT_COUNT)
+ {
+ break;
+ }
+ system_delay_ms(2);
+ }
+
+ return (imu963ra_read_acc_gyro_register(IMU963RA_SENSOR_HUB_1)); // 返回读取到的数据
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 作为 IIC 主机向磁力计自动写数据
+// 参数说明 addr 目标地址
+// 参数说明 reg 目标寄存器
+// 返回参数 void
+// 使用示例 imu963ra_connect_mag(IMU963RA_MAG_ADDR, IMU963RA_MAG_OUTX_L);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void imu963ra_connect_mag (uint8 addr, uint8 reg)
+{
+ addr = addr << 1;
+
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_ADD, addr | 1); // 设置地磁计地址（注意这里需要设置8位的I2C地址） 0x2C
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_SUBADD, reg); // 需要读取的寄存器地址
+ imu963ra_write_acc_gyro_register(IMU963RA_SLV0_CONFIG, 0x06);
+ imu963ra_write_acc_gyro_register(IMU963RA_MASTER_CONFIG, 0x6C); // 仅在第一个周期启用通讯 开启上拉 I2C主机使能
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 六轴自检 内部调用
+// 参数说明 void
+// 返回参数 uint8 1-自检失败 0-自检成功
+// 使用示例 imu963ra_acc_gyro_self_check();
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 imu963ra_acc_gyro_self_check (void)
+{
+ uint8 return_state = 0;
+ uint8 dat = 0;
+ uint16 timeout_count = 0;
+
+ while(0x6B != dat) // 判断 ID 是否正确
+ {
+ if(timeout_count++ > IMU963RA_TIMEOUT_COUNT)
+ {
+ return_state = 1;
+ break;
+ }
+ dat = imu963ra_read_acc_gyro_register(IMU963RA_WHO_AM_I);
+ system_delay_ms(10);
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IMU963RA 磁力计自检 内部调用
+// 参数说明 void
+// 返回参数 uint8 1-自检失败 0-自检成功
+// 使用示例 imu963ra_mag_self_check();
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 imu963ra_mag_self_check (void)
+{
+ uint8 return_state = 0;
+ uint8 dat = 0;
+ uint16 timeout_count = 0;
+
+ while(0xff != dat) // 判断 ID 是否正确
+ {
+ if(timeout_count++ > IMU963RA_TIMEOUT_COUNT)
+ {
+ return_state = 1;
+ break;
+ }
+ dat = imu963ra_read_mag_register(IMU963RA_MAG_ADDR, IMU963RA_MAG_CHIP_ID);
+ system_delay_ms(10);
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 IMU963RA 加速度计数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 imu963ra_get_acc();
+// 备注信息 执行该函数后，直接查看对应的变量即可
+//-------------------------------------------------------------------------------------------------------------------
+void imu963ra_get_acc (void)
+{
+ uint8 dat[6];
+
+ imu963ra_read_acc_gyro_registers(IMU963RA_OUTX_L_A, dat, 6);
+ imu963ra_acc_x = (int16)(((uint16)dat[1]<<8 | dat[0]));
+ imu963ra_acc_y = (int16)(((uint16)dat[3]<<8 | dat[2]));
+ imu963ra_acc_z = (int16)(((uint16)dat[5]<<8 | dat[4]));
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 IMU963RA 陀螺仪数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 imu963ra_get_gyro();
+// 备注信息 执行该函数后，直接查看对应的变量即可
+//-------------------------------------------------------------------------------------------------------------------
+void imu963ra_get_gyro (void)
+{
+ uint8 dat[6];
+
+ imu963ra_read_acc_gyro_registers(IMU963RA_OUTX_L_G, dat, 6);
+ imu963ra_gyro_x = (int16)(((uint16)dat[1]<<8 | dat[0]));
+ imu963ra_gyro_y = (int16)(((uint16)dat[3]<<8 | dat[2]));
+ imu963ra_gyro_z = (int16)(((uint16)dat[5]<<8 | dat[4]));
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 IMU963RA 磁力计数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 imu963ra_get_mag();
+// 备注信息 执行该函数后，直接查看对应的变量即可
+//-------------------------------------------------------------------------------------------------------------------
+void imu963ra_get_mag (void)
+{
+ uint8 temp_status;
+ uint8 dat[6];
+
+ imu963ra_write_acc_gyro_register(IMU963RA_FUNC_CFG_ACCESS, 0x40);
+ temp_status = imu963ra_read_acc_gyro_register(IMU963RA_STATUS_MASTER);
+ if(0x01 & temp_status)
+ {
+ imu963ra_read_acc_gyro_registers(IMU963RA_SENSOR_HUB_1, dat, 6);
+ imu963ra_mag_x = (int16)(((uint16)dat[1]<<8 | dat[0]));
+ imu963ra_mag_y = (int16)(((uint16)dat[3]<<8 | dat[2]));
+ imu963ra_mag_z = (int16)(((uint16)dat[5]<<8 | dat[4]));
+ }
+ imu963ra_write_acc_gyro_register(IMU963RA_FUNC_CFG_ACCESS, 0x00);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 IMU963RA 加速度计数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的加速度计数据
+// 返回参数 void
+// 使用示例 float data = imu963ra_acc_transition(imu963ra_acc_x); //单位为 g(m/s^2)
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float imu963ra_acc_transition (int16 acc_value)
+{
+ float acc_data = 0;
+ switch(IMU963RA_ACC_SAMPLE)
+ {
+ case 0x30: acc_data = (float)acc_value / 16393; break; // 0x30 加速度量程为:±2G 获取到的加速度计数据 除以16393，可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x38: acc_data = (float)acc_value / 8197; break; // 0x38 加速度量程为:±4G 获取到的加速度计数据 除以8197， 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x3C: acc_data = (float)acc_value / 4098; break; // 0x3C 加速度量程为:±8G 获取到的加速度计数据 除以4098， 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x34: acc_data = (float)acc_value / 2049; break; // 0x34 加速度量程为:±16G 获取到的加速度计数据 除以2049， 可以转化为带物理单位的数据，单位：g(m/s^2)
+ default: break;
+ }
+ return acc_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 IMU963RA 陀螺仪数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的陀螺仪数据
+// 返回参数 void
+// 使用示例 float data = imu963ra_gyro_transition(imu963ra_gyro_x); // 单位为°/s
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float imu963ra_gyro_transition (int16 gyro_value)
+{
+ float gyro_data = 0;
+ switch(IMU963RA_GYR_SAMPLE)
+ {
+ case 0x52: gyro_data = (float)gyro_value / 228.6f; break; // 0x52 陀螺仪量程为:±125dps 获取到的陀螺仪数据除以228.6， 可以转化为带物理单位的数据，单位为：°/s
+ case 0x50: gyro_data = (float)gyro_value / 114.3f; break; // 0x50 陀螺仪量程为:±250dps 获取到的陀螺仪数据除以114.3， 可以转化为带物理单位的数据，单位为：°/s
+ case 0x54: gyro_data = (float)gyro_value / 57.1f; break; // 0x54 陀螺仪量程为:±500dps 获取到的陀螺仪数据除以57.1， 可以转化为带物理单位的数据，单位为：°/s
+ case 0x58: gyro_data = (float)gyro_value / 28.6f; break; // 0x58 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以28.6， 可以转化为带物理单位的数据，单位为：°/s
+ case 0x5C: gyro_data = (float)gyro_value / 14.3f; break; // 0x5C 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以14.3， 可以转化为带物理单位的数据，单位为：°/s
+ case 0x51: gyro_data = (float)gyro_value / 7.1f; break; // 0x51 陀螺仪量程为:±4000dps 获取到的陀螺仪数据除以7.1， 可以转化为带物理单位的数据，单位为：°/s
+ default: break;
+ }
+ return gyro_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 IMU963RA 地磁计数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的地磁计数据
+// 返回参数 void
+// 使用示例 float data = imu963ra_mag_transition(imu963ra_mag_x); // 单位为°/s
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float imu963ra_mag_transition (int16 mag_value)
+{
+ float mag_data = 0;
+ switch(IMU963RA_MAG_SAMPLE)
+ {
+ case 0x19: mag_data = (float)mag_value / 3000; break; // 0x19 磁力计量程为:8G 获取到的加速度计数据 除以3000， 可以转化为带物理单位的数据，单位：G(高斯)
+ case 0x09: mag_data = (float)mag_value / 12000; break; // 0x09 磁力计量程为:2G 获取到的加速度计数据 除以12000，可以转化为带物理单位的数据，单位：G(高斯)
+ default: break;
+ }
+ return mag_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 初始化 IMU963RA
+// 参数说明 void
+// 返回参数 uint8 1-初始化失败 0-初始化成功
+// 使用示例 imu963ra_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 imu963ra_init (void)
+{
+ uint8 return_state = 0;
+ system_delay_ms(10); // 上电延时
+
+#if IMU963RA_USE_SOFT_IIC
+ soft_iic_init(&imu963ra_iic_struct, IMU963RA_DEV_ADDR, IMU963RA_SOFT_IIC_DELAY, IMU963RA_SCL_PIN, IMU963RA_SDA_PIN);
+#else
+ spi_init(IMU963RA_SPI, SPI_MODE0, IMU963RA_SPI_SPEED, IMU963RA_SPC_PIN, IMU963RA_SDI_PIN, IMU963RA_SDO_PIN, SPI_CS_NULL);
+ gpio_init(IMU963RA_CS_PIN, GPO, GPIO_LOW, GPO_PUSH_PULL);
+#endif
+
+ do
+ {
+ imu963ra_write_acc_gyro_register(IMU963RA_FUNC_CFG_ACCESS, 0x00); // 关闭HUB寄存器访问
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL3_C, 0x01); // 复位设备
+ system_delay_ms(2);
+ imu963ra_write_acc_gyro_register(IMU963RA_FUNC_CFG_ACCESS, 0x00); // 关闭HUB寄存器访问
+ if(imu963ra_acc_gyro_self_check())
+ {
+ zf_log(0, "IMU963RA acc and gyro self check error.");
+ return_state = 1;
+ break;
+ }
+
+ imu963ra_write_acc_gyro_register(IMU963RA_INT1_CTRL, 0x03); // 开启陀螺仪 加速度数据就绪中断
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL1_XL, IMU963RA_ACC_SAMPLE); // 设置加速度计量程±8G以及数据输出速率52hz 以及加速度信息从第一级滤波器输出
+ // IMU963RA_CTRL1_XL 寄存器
+ // 设置为:0x30 加速度量程为:±2G 获取到的加速度计数据 除以16393，可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x38 加速度量程为:±4G 获取到的加速度计数据 除以8197， 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x3C 加速度量程为:±8G 获取到的加速度计数据 除以4098， 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x34 加速度量程为:±16G 获取到的加速度计数据 除以2049， 可以转化为带物理单位的数据，单位：g(m/s^2)
+
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL2_G, IMU963RA_GYR_SAMPLE); // 设置陀螺仪计量程 ±2000dps 以及数据输出速率 208hz
+ // IMU963RA_CTRL2_G 寄存器
+ // 设置为:0x52 陀螺仪量程为:±125dps 获取到的陀螺仪数据除以228.6， 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x50 陀螺仪量程为:±250dps 获取到的陀螺仪数据除以114.3， 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x54 陀螺仪量程为:±500dps 获取到的陀螺仪数据除以57.1， 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x58 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以28.6， 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x5C 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以14.3， 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x51 陀螺仪量程为:±4000dps 获取到的陀螺仪数据除以7.1， 可以转化为带物理单位的数据，单位为：°/s
+
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL3_C, 0x44); // 使能陀螺仪数字低通滤波器
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL4_C, 0x02); // 使能数字低通滤波器
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL5_C, 0x00); // 加速度计与陀螺仪四舍五入
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL6_C, 0x00); // 开启加速度计高性能模式 陀螺仪低通滤波 133hz
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL7_G, 0x00); // 开启陀螺仪高性能模式 关闭高通滤波
+ imu963ra_write_acc_gyro_register(IMU963RA_CTRL9_XL, 0x01); // 关闭I3C接口
+
+ imu963ra_write_acc_gyro_register(IMU963RA_FUNC_CFG_ACCESS, 0x40); // 开启HUB寄存器访问 用于配置地磁计
+ imu963ra_write_acc_gyro_register(IMU963RA_MASTER_CONFIG, 0x80); // 复位I2C主机
+ system_delay_ms(2);
+ imu963ra_write_acc_gyro_register(IMU963RA_MASTER_CONFIG, 0x00); // 清除复位标志
+ system_delay_ms(2);
+
+ imu963ra_write_mag_register(IMU963RA_MAG_ADDR, IMU963RA_MAG_CONTROL2, 0x80); // 复位连接的外设
+ system_delay_ms(2);
+ imu963ra_write_mag_register(IMU963RA_MAG_ADDR, IMU963RA_MAG_CONTROL2, 0x00);
+ system_delay_ms(2);
+
+
+ if(imu963ra_mag_self_check())
+ {
+ zf_log(0, "IMU963RA mag self check error.");
+ return_state = 1;
+ break;
+ }
+
+ imu963ra_write_mag_register(IMU963RA_MAG_ADDR, IMU963RA_MAG_CONTROL1, IMU963RA_MAG_SAMPLE); // 设置磁力计量程8G 输出速率100hz 连续模式
+ // IMU963RA_MAG_ADDR 寄存器
+ // 设置为:0x19 磁力计量程为:8G 获取到的加速度计数据 除以3000， 可以转化为带物理单位的数据，单位：G(高斯)
+ // 设置为:0x09 磁力计量程为:2G 获取到的加速度计数据 除以12000，可以转化为带物理单位的数据，单位：G(高斯)
+
+ imu963ra_write_mag_register(IMU963RA_MAG_ADDR, IMU963RA_MAG_FBR, 0x01);
+ imu963ra_connect_mag(IMU963RA_MAG_ADDR, IMU963RA_MAG_OUTX_L);
+
+ imu963ra_write_acc_gyro_register(IMU963RA_FUNC_CFG_ACCESS, 0x00); // 关闭HUB寄存器访问
+
+ system_delay_ms(20); // 等待磁力计获取数据
+ }while(0);
+ return return_state;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_imu963ra.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_imu963ra.h
new file mode 100644
index 0000000..d581bf5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_imu963ra.h
@@ -0,0 +1,156 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_imu963ra
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 硬件 SPI 引脚
+* SCL/SPC 查看 zf_device_imu963ra.h 中 IMU963RA_SPC_PIN 宏定义
+* SDA/DSI 查看 zf_device_imu963ra.h 中 IMU963RA_SDI_PIN 宏定义
+* SA0/SDO 查看 zf_device_imu963ra.h 中 IMU963RA_SDO_PIN 宏定义
+* CS 查看 zf_device_imu963ra.h 中 IMU963RA_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+*
+* // 软件 IIC 引脚
+* SCL/SPC 查看 zf_device_imu963ra.h 中 IMU963RA_SCL_PIN 宏定义
+* SDA/DSI 查看 zf_device_imu963ra.h 中 IMU963RA_SDA_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_imu963ra_h_
+#define _zf_device_imu963ra_h_
+
+#include "zf_common_typedef.h"
+
+#define IMU963RA_USE_SOFT_IIC (0) // 默认使用硬件 SPI 方式驱动
+#if IMU963RA_USE_SOFT_IIC // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 IIC 驱动====================================================
+#define IMU963RA_SOFT_IIC_DELAY (59 ) // 软件 IIC 的时钟延时周期 数值越小 IIC 通信速率越快
+#define IMU963RA_SCL_PIN (P20_11) // 软件 IIC SCL 引脚 连接 IMU963RA 的 SCL 引脚
+#define IMU963RA_SDA_PIN (P20_14) // 软件 IIC SDA 引脚 连接 IMU963RA 的 SDA 引脚
+//====================================================软件 IIC 驱动====================================================
+#else
+//====================================================硬件 SPI 驱动====================================================
+#define IMU963RA_SPI_SPEED (10 * 1000 * 1000) // 硬件 SPI 速率
+#define IMU963RA_SPI (SPI_0 ) // 硬件 SPI 号
+#define IMU963RA_SPC_PIN (SPI0_SCLK_P20_11) // 硬件 SPI SCK 引脚
+#define IMU963RA_SDI_PIN (SPI0_MOSI_P20_14) // 硬件 SPI MOSI 引脚
+#define IMU963RA_SDO_PIN (SPI0_MISO_P20_12) // 硬件 SPI MISO 引脚
+//====================================================硬件 SPI 驱动====================================================
+#endif
+
+#define IMU963RA_CS_PIN (P20_13) // CS 片选引脚
+#define IMU963RA_CS(x) (x? (gpio_high(IMU963RA_CS_PIN)): (gpio_low(IMU963RA_CS_PIN)))
+
+#define IMU963RA_TIMEOUT_COUNT (0x00FF) // IMU963RA 超时计数
+
+//================================================定义 IMU963RA 内部地址================================================
+#define IMU963RA_DEV_ADDR (0x6B) // SA0接地：0x6A SA0上拉：0x6B 模块默认上拉
+#define IMU963RA_SPI_W (0x00)
+#define IMU963RA_SPI_R (0x80)
+
+#define IMU963RA_FUNC_CFG_ACCESS (0x01)
+#define IMU963RA_INT1_CTRL (0x0D)
+#define IMU963RA_WHO_AM_I (0x0F)
+#define IMU963RA_CTRL1_XL (0x10)
+#define IMU963RA_CTRL2_G (0x11)
+#define IMU963RA_CTRL3_C (0x12)
+#define IMU963RA_CTRL4_C (0x13)
+#define IMU963RA_CTRL5_C (0x14)
+#define IMU963RA_CTRL6_C (0x15)
+#define IMU963RA_CTRL7_G (0x16)
+#define IMU963RA_CTRL9_XL (0x18)
+#define IMU963RA_OUTX_L_G (0x22)
+#define IMU963RA_OUTX_L_A (0x28)
+
+//集线器功能相关寄存器 需要将FUNC_CFG_ACCESS的SHUB_REG_ACCESS位设置为1才能正确访问
+#define IMU963RA_SENSOR_HUB_1 (0x02)
+#define IMU963RA_MASTER_CONFIG (0x14)
+#define IMU963RA_SLV0_ADD (0x15)
+#define IMU963RA_SLV0_SUBADD (0x16)
+#define IMU963RA_SLV0_CONFIG (0x17)
+#define IMU963RA_DATAWRITE_SLV0 (0x21)
+#define IMU963RA_STATUS_MASTER (0x22)
+
+#define IMU963RA_MAG_ADDR (0x0D) // 7位IIC地址
+#define IMU963RA_MAG_OUTX_L (0x00)
+#define IMU963RA_MAG_CONTROL1 (0x09)
+#define IMU963RA_MAG_CONTROL2 (0x0A)
+#define IMU963RA_MAG_FBR (0x0B)
+#define IMU963RA_MAG_CHIP_ID (0x0D)
+
+#define IMU963RA_ACC_SAMPLE (0x3C) // 加速度计量程
+// 设置为:0x30 加速度量程为:±2G 获取到的加速度计数据 除以16393，可以转化为带物理单位的数据，单位：g(m/s^2)
+// 设置为:0x38 加速度量程为:±4G 获取到的加速度计数据 除以8197， 可以转化为带物理单位的数据，单位：g(m/s^2)
+// 设置为:0x3C 加速度量程为:±8G 获取到的加速度计数据 除以4098， 可以转化为带物理单位的数据，单位：g(m/s^2)
+// 设置为:0x34 加速度量程为:±16G 获取到的加速度计数据 除以2049， 可以转化为带物理单位的数据，单位：g(m/s^2)
+
+#define IMU963RA_GYR_SAMPLE (0x5C) // 陀螺仪量程
+// 设置为:0x52 陀螺仪量程为:±125dps 获取到的陀螺仪数据除以228.6， 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x50 陀螺仪量程为:±250dps 获取到的陀螺仪数据除以114.3， 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x54 陀螺仪量程为:±500dps 获取到的陀螺仪数据除以57.1， 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x58 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以28.6， 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x5C 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以14.3， 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x51 陀螺仪量程为:±4000dps 获取到的陀螺仪数据除以7.1， 可以转化为带物理单位的数据，单位为：°/s
+
+#define IMU963RA_MAG_SAMPLE (0x19) // 地磁计量程
+// 设置为:0x19 磁力计量程为:8G 获取到的加速度计数据 除以3000， 可以转化为带物理单位的数据，单位：G(高斯)
+// 设置为:0x09 磁力计量程为:2G 获取到的加速度计数据 除以12000，可以转化为带物理单位的数据，单位：G(高斯)
+
+//================================================定义 IMU963RA 内部地址================================================
+
+//===============================================声明 IMU963RA 数据存储变量===============================================
+extern int16 imu963ra_acc_x, imu963ra_acc_y, imu963ra_acc_z; // 三轴陀螺仪数据
+extern int16 imu963ra_gyro_x, imu963ra_gyro_y, imu963ra_gyro_z; // 三轴加速度计数据
+extern int16 imu963ra_mag_x, imu963ra_mag_y, imu963ra_mag_z; // 三轴地磁计数据
+//===============================================声明 IMU963RA 数据存储变量===============================================
+
+//==================================================IMU963RA 基础函数==================================================
+void imu963ra_get_acc (void); // 获取 IMU963RA 加速度计数据
+void imu963ra_get_gyro (void); // 获取 IMU963RA 陀螺仪数据
+void imu963ra_get_mag (void); // 获取 IMU963RA 磁力计数据
+float imu963ra_acc_transition (int16 acc_value); // 将 IMU963RA 加速度计数据转换为实际物理数据
+float imu963ra_gyro_transition (int16 gyro_value); // 将 IMU963RA 陀螺仪数据转换为实际物理数据
+float imu963ra_mag_transition (int16 mag_value); // 将 IMU963RA 地磁计数据转换为实际物理数据
+uint8 imu963ra_init (void); // 初始化 IMU963RA
+//==================================================IMU963RA 基础函数==================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_ips114.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_ips114.c
new file mode 100644
index 0000000..9a14f5a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_ips114.c
@@ -0,0 +1,1001 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_ips114
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* SCL 查看 zf_device_ips114.h 中 IPS114_SCL_PIN 宏定义
+* SDA 查看 zf_device_ips114.h 中 IPS114_SDA_PIN 宏定义
+* RST 查看 zf_device_ips114.h 中 IPS114_RST_PIN 宏定义
+* DC 查看 zf_device_ips114.h 中 IPS114_DC_PIN 宏定义
+* CS 查看 zf_device_ips114.h 中 IPS114_CS_PIN 宏定义
+* BLK 查看 zf_device_ips114.h 中 IPS114_BLK_PIN 宏定义
+* VCC 3 .3V电源
+* GND 电源地
+* 最大分辨率 135 * 240
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_common_font.h"
+#include "zf_common_function.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_soft_spi.h"
+#include "zf_driver_spi.h"
+#include "zf_device_ips114.h"
+
+static uint16 ips114_pencolor = IPS114_DEFAULT_PENCOLOR;
+static uint16 ips114_bgcolor = IPS114_DEFAULT_BGCOLOR;
+
+static ips114_dir_enum ips114_display_dir = IPS114_DEFAULT_DISPLAY_DIR;
+static ips114_font_size_enum ips114_display_font = IPS114_DEFAULT_DISPLAY_FONT;
+static uint8 ips114_x_max = 240;
+static uint8 ips114_y_max = 135;
+
+#if IPS114_USE_SOFT_SPI
+static soft_spi_info_struct ips114_spi;
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 SPI 写 8bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips114_write_8bit_data(dat);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define ips114_write_8bit_data(data) (soft_spi_write_8bit(&ips114_spi, (data)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 SPI 写 16bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips114_write_16bit_data(x1 + 52);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define ips114_write_16bit_data(data) (soft_spi_write_16bit(&ips114_spi, (data)))
+#else
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 SPI 写 8bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips114_write_8bit_data(dat);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define ips114_write_8bit_data(data) (spi_write_8bit(IPS114_SPI, (data)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 SPI 写 16bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips114_write_16bit_data(x1 + 52);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define ips114_write_16bit_data(data) (spi_write_16bit(IPS114_SPI, (data)))
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 写命令
+// 参数说明 dat 数据
+// 返回参数 void
+// 使用示例 ips114_write_index(0x2a);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void ips114_write_index (const uint8 dat)
+{
+ IPS114_DC(0);
+ ips114_write_8bit_data(dat);
+ IPS114_DC(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示区域
+// 参数说明 x1 起始x轴坐标
+// 参数说明 y1 起始y轴坐标
+// 参数说明 x2 结束x轴坐标
+// 参数说明 y2 结束y轴坐标
+// 返回参数 void
+// 使用示例 ips114_set_region(0, 0, ips114_x_max - 1, ips114_y_max - 1);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void ips114_set_region (const uint16 x1, const uint16 y1, const uint16 x2, const uint16 y2)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x1 < ips114_x_max);
+ zf_assert(y1 < ips114_y_max);
+ zf_assert(x2 < ips114_x_max);
+ zf_assert(y2 < ips114_y_max);
+
+ if(ips114_display_dir == IPS114_PORTAIT)
+ {
+ ips114_write_index(0x2a); // 列地址设置
+ ips114_write_16bit_data(x1 + 52);
+ ips114_write_16bit_data(x2 + 52);
+ ips114_write_index(0x2b); // 行地址设置
+ ips114_write_16bit_data(y1 + 40);
+ ips114_write_16bit_data(y2 + 40);
+ ips114_write_index(0x2c); // 储存器写
+ }
+ else if(ips114_display_dir == IPS114_PORTAIT_180)
+ {
+ ips114_write_index(0x2a); // 列地址设置
+ ips114_write_16bit_data(x1 + 53);
+ ips114_write_16bit_data(x2 + 53);
+ ips114_write_index(0x2b); // 行地址设置
+ ips114_write_16bit_data(y1 + 40);
+ ips114_write_16bit_data(y2 + 40);
+ ips114_write_index(0x2c); // 储存器写
+ }
+ else if(ips114_display_dir == IPS114_CROSSWISE)
+ {
+ ips114_write_index(0x2a); // 列地址设置
+ ips114_write_16bit_data(x1 + 40);
+ ips114_write_16bit_data(x2 + 40);
+ ips114_write_index(0x2b); // 行地址设置
+ ips114_write_16bit_data(y1 + 53);
+ ips114_write_16bit_data(y2 + 53);
+ ips114_write_index(0x2c); // 储存器写
+ }
+ else
+ {
+ ips114_write_index(0x2a); // 列地址设置
+ ips114_write_16bit_data(x1 + 40);
+ ips114_write_16bit_data(x2 + 40);
+ ips114_write_index(0x2b); // 行地址设置
+ ips114_write_16bit_data(y1 + 52);
+ ips114_write_16bit_data(y2 + 52);
+ ips114_write_index(0x2c); // 储存器写
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 1.14寸 IPS 液晶显示DEBUG信息初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ips114_debug_init();
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static void ips114_debug_init (void)
+{
+ debug_output_struct info;
+ debug_output_struct_init(&info);
+
+ info.type_index = 1;
+ info.display_x_max = ips114_x_max;
+ info.display_y_max = ips114_y_max;
+
+ switch(ips114_display_font)
+ {
+ case IPS114_6X8_FONT:
+ info.font_x_size = 6;
+ info.font_y_size = 8;
+ break;
+ case IPS114_8X16_FONT:
+ info.font_x_size = 8;
+ info.font_y_size = 16;
+ break;
+ case IPS114_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ info.output_screen = ips114_show_string;
+ info.output_screen_clear = ips114_clear;
+
+ debug_output_init(&info);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 清屏函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ips114_clear();
+// 备注信息 将屏幕清空成背景颜色
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_clear (void)
+{
+ uint32 i = ips114_x_max * ips114_y_max;
+
+ IPS114_CS(0);
+ ips114_set_region(0, 0, ips114_x_max - 1, ips114_y_max - 1);
+ for( ; i > 0; i --)
+ {
+ ips114_write_16bit_data(ips114_bgcolor);
+ }
+ IPS114_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 屏幕填充函数
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips114_full(RGB565_BLACK);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_full (const uint16 color)
+{
+ uint32 i = ips114_x_max * ips114_y_max;
+
+ IPS114_CS(0);
+ ips114_set_region(0, 0, ips114_x_max - 1, ips114_y_max - 1);
+ for( ; i > 0; i --)
+ {
+ ips114_write_16bit_data(color);
+ }
+ IPS114_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示方向
+// 参数说明 dir 显示方向 参照 zf_device_ips114.h 内 ips114_dir_enum 枚举体定义
+// 返回参数 void
+// 使用示例 ips114_set_dir(IPS114_CROSSWISE);
+// 备注信息 这个函数只有在初始化屏幕之前调用才生效
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_set_dir (ips114_dir_enum dir)
+{
+ ips114_display_dir = dir;
+ if(dir < 2)
+ {
+ ips114_x_max = 135;
+ ips114_y_max = 240;
+ }
+ else
+ {
+ ips114_x_max = 240;
+ ips114_y_max = 135;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示字体
+// 参数说明 dir 显示方向 参照 zf_device_ips114.h 内 ips114_font_size_enum 枚举体定义
+// 返回参数 void
+// 使用示例 ips114_set_font(IPS114_8x16_FONT);
+// 备注信息 字体可以随时自由设置 设置后生效 后续显示就是新的字体大小
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_set_font (ips114_font_size_enum font)
+{
+ ips114_display_font = font;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示颜色
+// 参数说明 pen 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 参数说明 bgcolor 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips114_set_color(RGB565_WHITE, RGB565_BLACK);
+// 备注信息 字体颜色和背景颜色也可以随时自由设置 设置后生效
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_set_color (const uint16 pen, const uint16 bgcolor)
+{
+ ips114_pencolor = pen;
+ ips114_bgcolor = bgcolor;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 画点
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips114_draw_point(0, 0, RGB565_RED); // 坐标 0,0 画一个红色的点
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_draw_point (uint16 x, uint16 y, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+
+ IPS114_CS(0);
+ ips114_set_region(x, y, x, y);
+ ips114_write_16bit_data(color);
+ IPS114_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 画线
+// 参数说明 x_start 坐标x方向的起点
+// 参数说明 y_start 坐标y方向的起点
+// 参数说明 x_end 坐标x方向的终点
+// 参数说明 y_end 坐标y方向的终点
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips114_draw_line(0, 0, 10, 10, RGB565_RED); // 坐标 0,0 到 10,10 画一条红色的线
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_draw_line (uint16 x_start, uint16 y_start, uint16 x_end, uint16 y_end, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x_start < ips114_x_max);
+ zf_assert(y_start < ips114_y_max);
+ zf_assert(x_end < ips114_x_max);
+ zf_assert(y_end < ips114_y_max);
+
+ int16 x_dir = (x_start < x_end ? 1 : -1);
+ int16 y_dir = (y_start < y_end ? 1 : -1);
+ float temp_rate = 0;
+ float temp_b = 0;
+
+ do
+ {
+ if(x_start != x_end)
+ {
+ temp_rate = (float)(y_start - y_end) / (float)(x_start - x_end);
+ temp_b = (float)y_start - (float)x_start * temp_rate;
+ }
+ else
+ {
+ while(y_start != y_end)
+ {
+ ips114_draw_point(x_start, y_start, color);
+ y_start += y_dir;
+ }
+ break;
+ }
+ if(func_abs(y_start - y_end) > func_abs(x_start - x_end))
+ {
+ while(y_start != y_end)
+ {
+ ips114_draw_point(x_start, y_start, color);
+ y_start += y_dir;
+ x_start = (int16)(((float)y_start - temp_b) / temp_rate);
+ }
+ }
+ else
+ {
+ while(x_start != x_end)
+ {
+ ips114_draw_point(x_start, y_start, color);
+ x_start += x_dir;
+ y_start = (int16)((float)x_start * temp_rate + temp_b);
+ }
+ }
+ }while(0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示字符
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 dat 需要显示的字符
+// 返回参数 void
+// 使用示例 ips114_show_char(0, 0, 'x'); // 坐标 0,0 写一个字符 x
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_char (uint16 x, uint16 y, const char dat)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+
+ uint8 i, j;
+
+ IPS114_CS(0);
+ switch(ips114_display_font)
+ {
+ case IPS114_6X8_FONT:
+ for(i = 0; i < 6; i ++)
+ {
+ ips114_set_region(x + i, y, x + i, y + 8);
+ // 减 32 因为是取模是从空格开始取得 空格在 ascii 中序号是 32
+ uint8 temp_top = ascii_font_6x8[dat - 32][i];
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_top & 0x01)
+ {
+ ips114_write_16bit_data(ips114_pencolor);
+ }
+ else
+ {
+ ips114_write_16bit_data(ips114_bgcolor);
+ }
+ temp_top >>= 1;
+ }
+ }
+ break;
+ case IPS114_8X16_FONT:
+ for(i = 0; i < 8; i ++)
+ {
+ ips114_set_region(x + i, y, x + i, y + 15);
+ // 减 32 因为是取模是从空格开始取得 空格在 ascii 中序号是 32
+ uint8 temp_top = ascii_font_8x16[dat - 32][i];
+ uint8 temp_bottom = ascii_font_8x16[dat - 32][i + 8];
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_top & 0x01)
+ {
+ ips114_write_16bit_data(ips114_pencolor);
+ }
+ else
+ {
+ ips114_write_16bit_data(ips114_bgcolor);
+ }
+ temp_top >>= 1;
+ }
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_bottom & 0x01)
+ {
+ ips114_write_16bit_data(ips114_pencolor);
+ }
+ else
+ {
+ ips114_write_16bit_data(ips114_bgcolor);
+ }
+ temp_bottom >>= 1;
+ }
+ }
+ break;
+ case IPS114_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ IPS114_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示字符串
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 dat 需要显示的字符串
+// 返回参数 void
+// 使用示例 ips114_show_string(0, 0, "seekfree");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_string (uint16 x, uint16 y, const char dat[])
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+
+ uint16 j = 0;
+ while(dat[j] != '\0')
+ {
+ switch(ips114_display_font)
+ {
+ case IPS114_6X8_FONT:
+ ips114_show_char(x + 6 * j, y, dat[j]);
+ j ++;
+ break;
+ case IPS114_8X16_FONT:
+ ips114_show_char(x + 8 * j, y, dat[j]);
+ j ++;
+ break;
+ case IPS114_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示32位有符号 (去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 dat 需要显示的变量 数据类型 int32
+// 参数说明 num 需要显示的位数 最高10位 不包含正负号
+// 返回参数 void
+// 使用示例 ips114_show_int(0, 0, x, 3); // x 可以为 int32 int16 int8 类型
+// 备注信息 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_int (uint16 x, uint16 y, const int32 dat, uint8 num)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 10);
+
+ int32 dat_temp = dat;
+ int32 offset = 1;
+ char data_buffer[12];
+
+ memset(data_buffer, 0, 12);
+ memset(data_buffer, ' ', num + 1);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp %= offset;
+ }
+ func_int_to_str(data_buffer, dat_temp);
+ ips114_show_string(x, y, (const char *)&data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示32位无符号 (去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 dat 需要显示的变量 数据类型 uint32
+// 参数说明 num 需要显示的位数 最高10位 不包含正负号
+// 返回参数 void
+// 使用示例 ips114_show_uint(0, 0, x, 3); // x 可以为 uint32 uint16 uint8 类型
+// 备注信息 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_uint (uint16 x, uint16 y, const uint32 dat, uint8 num)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 10);
+
+ uint32 dat_temp = dat;
+ int32 offset = 1;
+ char data_buffer[12];
+ memset(data_buffer, 0, 12);
+ memset(data_buffer, ' ', num);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp %= offset;
+ }
+ func_uint_to_str(data_buffer, dat_temp);
+ ips114_show_string(x, y, (const char *)&data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示浮点数 (去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 dat 需要显示的变量 数据类型 float 或 double
+// 参数说明 num 整数位显示长度 最高8位
+// 参数说明 pointnum 小数位显示长度 最高6位
+// 返回参数 void
+// 使用示例 ips114_show_float(0, 0, x, 2, 3); // 显示浮点数 整数显示 2 位 小数显示 3 位
+// 备注信息 特别注意当发现小数部分显示的值与你写入的值不一样的时候，
+// 可能是由于浮点数精度丢失问题导致的，这并不是显示函数的问题，
+// 有关问题的详情，请自行百度学习 浮点数精度丢失问题。
+// 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_float (uint16 x, uint16 y, const float dat, uint8 num, uint8 pointnum)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 8);
+ zf_assert(pointnum > 0);
+ zf_assert(pointnum <= 6);
+
+ float dat_temp = dat;
+ float offset = 1.0;
+ char data_buffer[17];
+ memset(data_buffer, 0, 17);
+ memset(data_buffer, ' ', num + pointnum + 2);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp = dat_temp - ((int)dat_temp / (int)offset) * offset;
+ }
+ func_float_to_str(data_buffer, dat_temp, pointnum);
+ ips114_show_string(x, y, data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示二值图像 数据每八个点组成一个字节数据
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, ips114_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, ips114_y_max]
+// 返回参数 void
+// 使用示例 ips114_show_binary_image(0, 0, ov7725_image_binary[0], OV7725_W, OV7725_H, OV7725_W, OV7725_H);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_binary_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint8 temp = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ IPS114_CS(0);
+ ips114_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ temp = *(image + height_index * width / 8 + width_index / 8); // 读取像素点
+ if(0x80 & (temp << (width_index % 8)))
+ {
+ ips114_write_16bit_data(RGB565_WHITE);
+ }
+ else
+ {
+ ips114_write_16bit_data(RGB565_BLACK);
+ }
+ }
+ }
+ IPS114_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示 8bit 灰度图像 带二值化阈值
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, ips114_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, ips114_y_max]
+// 参数说明 threshold 二值化显示阈值 0-不开启二值化
+// 返回参数 void
+// 使用示例 ips114_show_gray_image(0, 0, mt9v03x_image[0], MT9V03X_W, MT9V03X_H, MT9V03X_W, MT9V03X_H, 0);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_gray_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 threshold)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint16 color = 0,temp = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ IPS114_CS(0);
+ ips114_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ temp = *(image + height_index * width + width_index); // 读取像素点
+ if(threshold == 0)
+ {
+ color = (0x001f & ((temp) >> 3)) << 11;
+ color = color | (((0x003f) & ((temp) >> 2)) << 5);
+ color = color | (0x001f & ((temp) >> 3));
+ ips114_write_16bit_data(color);
+ }
+ else if(temp < threshold)
+ {
+ ips114_write_16bit_data(RGB565_BLACK);
+ }
+ else
+ {
+ ips114_write_16bit_data(RGB565_WHITE);
+ }
+ }
+ }
+ IPS114_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示 RGB565 彩色图像
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, ips114_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, ips114_y_max]
+// 参数说明 color_mode 色彩模式 0-低位在前 1-高位在前
+// 返回参数 void
+// 使用示例 ips114_show_rgb565_image(0, 0, scc8660_image[0], SCC8660_W, SCC8660_H, SCC8660_W, SCC8660_H, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_rgb565_image (uint16 x, uint16 y, const uint16 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 color_mode)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint16 color = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ IPS114_CS(0);
+ ips114_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ color = *(image + height_index * width + width_index); // 读取像素点
+ if(color_mode)
+ {
+ color = ((color & 0xff) << 8) | (color >> 8);
+ }
+ ips114_write_16bit_data(color);
+ }
+ }
+ IPS114_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示波形
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 *wave 波形数组指针
+// 参数说明 width 波形实际宽度
+// 参数说明 value_max 波形实际最大值
+// 参数说明 dis_width 波形显示宽度 参数范围 [0, ips114_x_max]
+// 参数说明 dis_value_max 波形显示最大值 参数范围 [0, ips114_y_max]
+// 返回参数 void
+// 使用示例 ips114_show_wave(56,35,data,128,64,128,64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_wave (uint16 x, uint16 y, const uint16 *wave, uint16 width, uint16 value_max, uint16 dis_width, uint16 dis_value_max)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+ zf_assert(wave != NULL);
+
+ uint32 i = 0, j = 0;
+ uint32 width_index = 0, value_max_index = 0;
+
+ IPS114_CS(0);
+ ips114_set_region(x, y, x + dis_width - 1, y + dis_value_max - 1); // 设置显示区域
+ for(i = 0; i < dis_value_max; i ++)
+ {
+ for(j = 0; j < dis_width; j ++)
+ {
+ ips114_write_16bit_data(ips114_bgcolor);
+ }
+ }
+ IPS114_CS(1);
+
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ value_max_index = *(wave + width_index) * (dis_value_max - 1) / value_max;
+ ips114_draw_point((uint16)(i + x), (uint16)((dis_value_max - 1) - value_max_index + y), ips114_pencolor);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 汉字显示
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 size 取模的时候设置的汉字字体大小 也就是一个汉字占用的点阵长宽为多少个点 取模的时候需要长宽是一样的
+// 参数说明 *chinese_buffer 需要显示的汉字数组
+// 参数说明 number 需要显示多少位
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips114_show_chinese(0, 0, 16, chinese_test[0], 4, RGB565_RED);// 显示font文件里面的 示例
+// 备注信息 使用PCtoLCD2002软件取模 阴码、逐行式、顺向 16*16
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_show_chinese (uint16 x, uint16 y, uint8 size, const uint8 *chinese_buffer, uint8 number, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips114_x_max);
+ zf_assert(y < ips114_y_max);
+ zf_assert(chinese_buffer != NULL);
+
+ int i, j, k;
+ uint8 temp, temp1, temp2;
+ const uint8 *p_data;
+
+ temp2 = size / 8;
+
+ IPS114_CS(0);
+ ips114_set_region(x, y, number * size - 1 + x, y + size - 1);
+
+ for(i = 0; i < size; i ++)
+ {
+ temp1 = number;
+ p_data = chinese_buffer + i * temp2;
+ while(temp1 --)
+ {
+ for(k = 0; k < temp2; k ++)
+ {
+ for(j = 8; j > 0; j --)
+ {
+ temp = (*p_data >> (j - 1)) & 0x01;
+ if(temp)
+ {
+ ips114_write_16bit_data(color);
+ }
+ else
+ {
+ ips114_write_16bit_data(ips114_bgcolor);
+ }
+ }
+ p_data ++;
+ }
+ p_data = p_data - temp2 + temp2 * size;
+ }
+ }
+ IPS114_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 1.14寸 IPS液晶初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ips114_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips114_init (void)
+{
+#if IPS114_USE_SOFT_SPI
+ soft_spi_init(&ips114_spi, 0, IPS114_SOFT_SPI_DELAY, IPS114_SCL_PIN, IPS114_SDA_PIN, SOFT_SPI_PIN_NULL, SOFT_SPI_PIN_NULL);
+#else
+ spi_init(IPS114_SPI, SPI_MODE0, IPS114_SPI_SPEED, IPS114_SCL_PIN, IPS114_SDA_PIN, IPS114_SDA_IN_PIN, SPI_CS_NULL);
+#endif
+
+ gpio_init(IPS114_DC_PIN, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS114_RST_PIN, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS114_CS_PIN, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+ gpio_init(IPS114_BLK_PIN, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+
+ ips114_set_dir(ips114_display_dir);
+ ips114_set_color(ips114_pencolor, ips114_bgcolor);
+ ips114_debug_init();
+
+ IPS114_RST(0);
+ system_delay_ms(200);
+
+ IPS114_RST(1);
+ system_delay_ms(100);
+
+ IPS114_CS(0);
+ ips114_write_index(0x36);
+ system_delay_ms(100);
+ if(ips114_display_dir == 0)
+ {
+ ips114_write_8bit_data(0x00);
+ }
+ else if(ips114_display_dir == 1)
+ {
+ ips114_write_8bit_data(0xC0);
+ }
+ else if(ips114_display_dir == 2)
+ {
+ ips114_write_8bit_data(0x70);
+ }
+ else
+ {
+ ips114_write_8bit_data(0xA0);
+ }
+
+ ips114_write_index(0x3A);
+ ips114_write_8bit_data(0x05);
+
+ ips114_write_index(0xB2);
+ ips114_write_8bit_data(0x0C);
+ ips114_write_8bit_data(0x0C);
+ ips114_write_8bit_data(0x00);
+ ips114_write_8bit_data(0x33);
+ ips114_write_8bit_data(0x33);
+
+ ips114_write_index(0xB7);
+ ips114_write_8bit_data(0x35);
+
+ ips114_write_index(0xBB);
+ ips114_write_8bit_data(0x37);
+
+ ips114_write_index(0xC0);
+ ips114_write_8bit_data(0x2C);
+
+ ips114_write_index(0xC2);
+ ips114_write_8bit_data(0x01);
+
+ ips114_write_index(0xC3);
+ ips114_write_8bit_data(0x12);
+
+ ips114_write_index(0xC4);
+ ips114_write_8bit_data(0x20);
+
+ ips114_write_index(0xC6);
+ ips114_write_8bit_data(0x0F);
+
+ ips114_write_index(0xD0);
+ ips114_write_8bit_data(0xA4);
+ ips114_write_8bit_data(0xA1);
+
+ ips114_write_index(0xE0);
+ ips114_write_8bit_data(0xD0);
+ ips114_write_8bit_data(0x04);
+ ips114_write_8bit_data(0x0D);
+ ips114_write_8bit_data(0x11);
+ ips114_write_8bit_data(0x13);
+ ips114_write_8bit_data(0x2B);
+ ips114_write_8bit_data(0x3F);
+ ips114_write_8bit_data(0x54);
+ ips114_write_8bit_data(0x4C);
+ ips114_write_8bit_data(0x18);
+ ips114_write_8bit_data(0x0D);
+ ips114_write_8bit_data(0x0B);
+ ips114_write_8bit_data(0x1F);
+ ips114_write_8bit_data(0x23);
+
+ ips114_write_index(0xE1);
+ ips114_write_8bit_data(0xD0);
+ ips114_write_8bit_data(0x04);
+ ips114_write_8bit_data(0x0C);
+ ips114_write_8bit_data(0x11);
+ ips114_write_8bit_data(0x13);
+ ips114_write_8bit_data(0x2C);
+ ips114_write_8bit_data(0x3F);
+ ips114_write_8bit_data(0x44);
+ ips114_write_8bit_data(0x51);
+ ips114_write_8bit_data(0x2F);
+ ips114_write_8bit_data(0x1F);
+ ips114_write_8bit_data(0x1F);
+ ips114_write_8bit_data(0x20);
+ ips114_write_8bit_data(0x23);
+
+ ips114_write_index(0x21);
+
+ ips114_write_index(0x11);
+ system_delay_ms(120);
+
+ ips114_write_index(0x29);
+ IPS114_CS(1);
+
+ ips114_clear();
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_ips114.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_ips114.h
new file mode 100644
index 0000000..331b3ff
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_ips114.h
@@ -0,0 +1,166 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_ips114
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* SCL 查看 zf_device_ips114.h 中 IPS114_SCL_PIN 宏定义
+* SDA 查看 zf_device_ips114.h 中 IPS114_SDA_PIN 宏定义
+* RST 查看 zf_device_ips114.h 中 IPS114_RST_PIN 宏定义
+* DC 查看 zf_device_ips114.h 中 IPS114_DC_PIN 宏定义
+* CS 查看 zf_device_ips114.h 中 IPS114_CS_PIN 宏定义
+* BLK 查看 zf_device_ips114.h 中 IPS114_BLK_PIN 宏定义
+* VCC 3 .3V电源
+* GND 电源地
+* 最大分辨率 135 * 240
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_ips114_h_
+#define _zf_device_ips114_h_
+
+#include "zf_common_typedef.h"
+
+#define IPS114_USE_SOFT_SPI (0) // 默认使用硬件 SPI 方式驱动 建议使用硬件 SPI 方式驱动
+#if IPS114_USE_SOFT_SPI // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 SPI 驱动==================================================
+#define IPS114_SOFT_SPI_DELAY (0 ) // 软件 SPI 的时钟延时周期 数值越小 SPI 通信速率越快
+#define IPS114_SCL_PIN (P15_3) // 软件 SPI SCK 引脚
+#define IPS114_SDA_PIN (P15_5) // 软件 SPI MOSI 引脚
+//====================================================软件 SPI 驱动==================================================
+#else
+//====================================================硬件 SPI 驱动==================================================
+#define IPS114_SPI_SPEED (60*1000*1000) // 硬件 SPI 速率
+#define IPS114_SPI (SPI_2) // 硬件 SPI 号
+#define IPS114_SCL_PIN (SPI2_SCLK_P15_3) // 硬件 SPI SCK 引脚
+#define IPS114_SDA_PIN (SPI2_MOSI_P15_5) // 硬件 SPI MOSI 引脚
+#define IPS114_SDA_IN_PIN (SPI2_MISO_P15_4) // 定义SPI_MISO引脚 IPS没有MISO引脚，但是这里任然需要定义，在spi的初始化时需要使用
+//====================================================硬件 SPI 驱动==================================================
+#endif
+
+#define IPS114_RST_PIN (P15_1) // 液晶复位引脚定义
+#define IPS114_DC_PIN (P15_0 ) // 液晶命令位引脚定义
+#define IPS114_CS_PIN (P15_2) // CS 片选引脚
+#define IPS114_BLK_PIN (P15_4) // 液晶背光引脚定义
+
+#define IPS114_DEFAULT_DISPLAY_DIR (IPS114_CROSSWISE_180) // 默认的显示方向
+#define IPS114_DEFAULT_PENCOLOR (RGB565_RED) // 默认的画笔颜色
+#define IPS114_DEFAULT_BGCOLOR (RGB565_WHITE) // 默认的背景颜色
+#define IPS114_DEFAULT_DISPLAY_FONT (IPS114_8X16_FONT) // 默认的字体模式
+
+#define IPS114_DC(x) ((x) ? (gpio_high(IPS114_DC_PIN)) : (gpio_low(IPS114_DC_PIN)))
+#define IPS114_RST(x) ((x) ? (gpio_high(IPS114_RST_PIN)) : (gpio_low(IPS114_RST_PIN)))
+#define IPS114_CS(x) ((x) ? (gpio_high(IPS114_CS_PIN)) : (gpio_low(IPS114_CS_PIN)))
+#define IPS114_BLK(x) ((x) ? (gpio_high(IPS114_BLK_PIN)) : (gpio_low(IPS114_BLK_PIN)))
+
+//=================================================定义 IPS114 参数结构体===============================================
+typedef enum
+{
+ IPS114_PORTAIT = 0, // 竖屏模式
+ IPS114_PORTAIT_180 = 1, // 竖屏模式 旋转180
+ IPS114_CROSSWISE = 2, // 横屏模式
+ IPS114_CROSSWISE_180 = 3, // 横屏模式 旋转180
+}ips114_dir_enum;
+
+typedef enum
+{
+ IPS114_6X8_FONT = 0, // 6x8 字体
+ IPS114_8X16_FONT = 1, // 8x16 字体
+ IPS114_16X16_FONT = 2, // 16x16 字体 目前不支持
+}ips114_font_size_enum;
+//=================================================定义 IPS114 参数结构体===============================================
+
+//===================================================IPS114 基础函数==================================================
+void ips114_clear (void);
+void ips114_full (const uint16 color);
+void ips114_set_dir (ips114_dir_enum dir);
+void ips114_set_font (ips114_font_size_enum font);
+void ips114_set_color (const uint16 pen, const uint16 bgcolor);
+void ips114_draw_point (uint16 x, uint16 y, const uint16 color);
+void ips114_draw_line (uint16 x_start, uint16 y_start, uint16 x_end, uint16 y_end, const uint16 color);
+
+void ips114_show_char (uint16 x, uint16 y, const char dat);
+void ips114_show_string (uint16 x, uint16 y, const char dat[]);
+void ips114_show_int (uint16 x,uint16 y, const int32 dat, uint8 num);
+void ips114_show_uint (uint16 x,uint16 y, const uint32 dat, uint8 num);
+void ips114_show_float (uint16 x,uint16 y, const float dat, uint8 num, uint8 pointnum);
+
+void ips114_show_binary_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height);
+void ips114_show_gray_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 threshold);
+void ips114_show_rgb565_image (uint16 x, uint16 y, const uint16 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 color_mode);
+
+void ips114_show_wave (uint16 x, uint16 y, const uint16 *wave, uint16 width, uint16 value_max, uint16 dis_width, uint16 dis_value_max);
+void ips114_show_chinese (uint16 x, uint16 y, uint8 size, const uint8 *chinese_buffer, uint8 number, const uint16 color);
+void ips114_init (void);
+//===================================================IPS114 基础函数==================================================
+
+
+//===================================================IPS114 扩展函数==================================================
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示小钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 ips114_displayimage7725(ov7725_image_binary[0], OV7725_W, OV7725_H);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define ips114_displayimage7725(p, width, height) (ips114_show_binary_image(0, 0, (p), OV7725_W, OV7725_H, (width), (height)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示总钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 ips114_displayimage03x(mt9v03x_image[0], MT9V03X_W, MT9V03X_H);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define ips114_displayimage03x(p, width, height) (ips114_show_gray_image(0, 0, (p), MT9V03X_W, MT9V03X_H, (width), (height), 0))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 显示凌瞳图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 ips114_displayimage8660(scc8660_image[0], SCC8660_W, SCC8660_H);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define ips114_displayimage8660(p, width, height) (ips114_show_rgb565_image(0, 0, (p), SCC8660_W, SCC8660_H, (width), (height), 1))
+
+//===================================================IPS114 扩展函数==================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_ips200.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_ips200.c
new file mode 100644
index 0000000..0170435
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_ips200.c
@@ -0,0 +1,1152 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_ips200
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 双排排针 并口两寸屏 硬件引脚
+* RD 查看 zf_device_ips200.h 中 IPS200_RD_PIN_PARALLEL8 宏定义
+* WR 查看 zf_device_ips200.h 中 IPS200_WR_PIN_PARALLEL8 宏定义
+* RS 查看 zf_device_ips200.h 中 IPS200_RS_PIN_PARALLEL8 宏定义
+* RST 查看 zf_device_ips200.h 中 IPS200_RST_PIN_PARALLEL8 宏定义
+* CS 查看 zf_device_ips200.h 中 IPS200_CS_PIN_PARALLEL8 宏定义
+* BL 查看 zf_device_ips200.h 中 IPS200_BL_PIN_PARALLEL8 宏定义
+* D0-D7 查看 zf_device_ips200.h 中 IPS200_Dx_PIN_PARALLEL8 宏定义
+* VCC 3.3V电源
+* GND 电源地
+*
+* // 单排排针 SPI 两寸屏 硬件引脚
+* SCL 查看 zf_device_ips200.h 中 IPS200_SCL_PIN_SPI 宏定义
+* SDA 查看 zf_device_ips200.h 中 IPS200_SDA_PIN_SPI 宏定义
+* RST 查看 zf_device_ips200.h 中 IPS200_RST_PIN_SPI 宏定义
+* DC 查看 zf_device_ips200.h 中 IPS200_DC_PIN_SPI 宏定义
+* CS 查看 zf_device_ips200.h 中 IPS200_CS_PIN_SPI 宏定义
+* BLk 查看 zf_device_ips200.h 中 IPS200_BLk_PIN_SPI 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 最大分辨率 320 * 240
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_common_font.h"
+#include "zf_common_function.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_soft_spi.h"
+#include "zf_driver_spi.h"
+#include "zf_device_ips200.h"
+
+static uint16 ips200_pencolor = IPS200_DEFAULT_PENCOLOR;
+static uint16 ips200_bgcolor = IPS200_DEFAULT_BGCOLOR;
+
+static ips200_type_enum ips200_display_type = IPS200_TYPE_SPI;
+static ips200_dir_enum ips200_display_dir = IPS200_DEFAULT_DISPLAY_DIR;
+static ips200_font_size_enum ips200_display_font = IPS200_DEFAULT_DISPLAY_FONT;
+
+static uint16 ips200_x_max = 240;
+static uint16 ips200_y_max = 320;
+
+static gpio_pin_enum ips_rst_pin = IPS200_RST_PIN_SPI;
+static gpio_pin_enum ips_bl_pin = IPS200_BLk_PIN_SPI;
+
+#if IPS200_USE_SOFT_SPI
+static soft_spi_info_struct ips200_spi;
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 SPI 写 8bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips200_write_8bit_data_spi(command);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define ips200_write_8bit_data_spi(data) (soft_spi_write_8bit(&ips200_spi, (data)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 SPI 写 16bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips200_write_16bit_data_spi(dat);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define ips200_write_16bit_data_spi(data) (soft_spi_write_16bit(&ips200_spi, (data)))
+#else
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 SPI 写 8bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips200_write_8bit_data_spi(command);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define ips200_write_8bit_data_spi(data) (spi_write_8bit(IPS200_SPI, (data)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 SPI 写 16bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips200_write_16bit_data_spi(dat);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define ips200_write_16bit_data_spi(data) (spi_write_16bit(IPS200_SPI, (data)))
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// @brief 内部调用，用户无需关心
+// @param dat 数据
+// @return
+// @since v1.0
+// Sample usage:
+//-------------------------------------------------------------------------------------------------------------------
+static void ips200_write_data(uint8 dat)
+{
+ IPS200_DATAPORT1 = (dat << DATA_START_NUM1) | (IPS200_DATAPORT1 & ~((uint32)(0x0F << DATA_START_NUM1)) );
+ IPS200_DATAPORT2 = ((dat>>4) << DATA_START_NUM2) | (IPS200_DATAPORT2 & ~((uint32)(0x0F << DATA_START_NUM2)) );
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// @brief IPS200 写命令 内部调用
+// @param command 命令
+// @return void
+// @note 内部调用 用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void ips200_write_command (const uint8 command)
+{
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_DC(0);
+ ips200_write_8bit_data_spi(command);
+ IPS200_DC(1);
+ }
+ else
+ {
+ IPS200_CS(0);
+ IPS200_RS(0);
+ IPS200_RD(1);
+ IPS200_WR(0);
+ ips200_write_data(command);
+ IPS200_WR(1);
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// @brief IPS200 向液晶屏写 8bit 数据 内部调用
+// @param dat 数据
+// @return void
+// @note 内部调用 用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void ips200_write_8bit_data (const uint8 dat)
+{
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ ips200_write_8bit_data_spi(dat);
+ }
+ else
+ {
+ IPS200_CS(0);
+ IPS200_RS(1);
+ IPS200_RD(1);
+ IPS200_WR(0);
+ ips200_write_data(dat);
+ IPS200_WR(1);
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// @brief IPS200 向液晶屏写 16bit 数据 内部调用
+// @param dat 数据
+// @return void
+// @note 内部调用 用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_write_16bit_data (const uint16 dat)
+{
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ ips200_write_16bit_data_spi(dat);
+ }
+ else
+ {
+ IPS200_CS(0);
+ IPS200_RS(1);
+ IPS200_RD(1);
+ IPS200_WR(0);
+ ips200_write_data((uint8)(dat >> 8));
+ IPS200_WR(1);
+ IPS200_WR(0);
+ ips200_write_data((uint8)(dat & 0x00FF));
+ IPS200_WR(1);
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示区域
+// 参数说明 x1 起始x轴坐标
+// 参数说明 y1 起始y轴坐标
+// 参数说明 x2 结束x轴坐标
+// 参数说明 y2 结束y轴坐标
+// 返回参数 void
+// 使用示例 ips200_set_region(0, 0, ips200_x_max - 1, ips200_y_max - 1);
+// 备注信息 内部调用 用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void ips200_set_region (uint16 x1, uint16 y1, uint16 x2, uint16 y2)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x1 < ips200_x_max);
+ zf_assert(y1 < ips200_y_max);
+ zf_assert(x2 < ips200_x_max);
+ zf_assert(y2 < ips200_y_max);
+
+ ips200_write_command(0x2a);
+ ips200_write_16bit_data(x1);
+ ips200_write_16bit_data(x2);
+
+ ips200_write_command(0x2b);
+ ips200_write_16bit_data(y1);
+ ips200_write_16bit_data(y2);
+
+ ips200_write_command(0x2c);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示DEBUG信息初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ips200_debug_init();
+// 备注信息 内部使用 用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void ips200_debug_init (void)
+{
+ debug_output_struct info;
+ debug_output_struct_init(&info);
+
+ info.type_index = 1;
+ info.display_x_max = ips200_x_max;
+ info.display_y_max = ips200_y_max;
+
+ switch(ips200_display_font)
+ {
+ case IPS200_6X8_FONT:
+ info.font_x_size = 6;
+ info.font_y_size = 8;
+ break;
+ case IPS200_8X16_FONT:
+ info.font_x_size = 8;
+ info.font_y_size = 16;
+ break;
+ case IPS200_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ info.output_screen = ips200_show_string;
+ info.output_screen_clear = ips200_clear;
+
+ debug_output_init(&info);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 清屏函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ips200_clear();
+// 备注信息 将屏幕清空成背景颜色
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_clear (void)
+{
+ uint16 i, j;
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ ips200_set_region(0, 0, ips200_x_max - 1, ips200_y_max - 1);
+ for(i = 0; i < ips200_x_max; i ++)
+ {
+ for (j = 0; j < ips200_y_max; j ++)
+ {
+ ips200_write_16bit_data(ips200_bgcolor);
+ }
+ }
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 屏幕填充函数
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips200_full(RGB565_BLACK);
+// 备注信息 将屏幕填充成指定颜色
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_full (const uint16 color)
+{
+ uint16 i, j;
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ ips200_set_region(0, 0, ips200_x_max - 1, ips200_y_max - 1);
+ for(i = 0; i < ips200_x_max; i ++)
+ {
+ for (j = 0; j < ips200_y_max; j ++)
+ {
+ ips200_write_16bit_data(color);
+ }
+ }
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示方向
+// 参数说明 dir 显示方向 参照 zf_device_ips200.h 内 ips200_dir_enum 枚举体定义
+// 返回参数 void
+// 使用示例 ips200_set_dir(IPS200_PORTAIT);
+// 备注信息 这个函数只有在初始化屏幕之前调用才生效
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_set_dir (ips200_dir_enum dir)
+{
+ ips200_display_dir = dir;
+ if(dir < 2)
+ {
+ ips200_x_max = 240;
+ ips200_y_max = 320;
+ }
+ else
+ {
+ ips200_x_max = 320;
+ ips200_y_max = 240;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示字体
+// 参数说明 dir 显示方向 参照 zf_device_ips200.h 内 ips200_font_size_enum 枚举体定义
+// 返回参数 void
+// 使用示例 ips200_set_font(IPS200_8x16_FONT);
+// 备注信息 字体可以随时自由设置 设置后生效 后续显示就是新的字体大小
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_set_font (ips200_font_size_enum font)
+{
+ ips200_display_font = font;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示颜色
+// 参数说明 pen 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 参数说明 bgcolor 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips200_set_color(RGB565_RED, RGB565_GRAY);
+// 备注信息 字体颜色和背景颜色也可以随时自由设置 设置后生效
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_set_color (const uint16 pen, const uint16 bgcolor)
+{
+ ips200_pencolor = pen;
+ ips200_bgcolor = bgcolor;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 画点
+// 参数说明 x 坐标x方向的起点 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 [0, ips200_y_max-1]
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips200_draw_point(0, 0, RGB565_RED); //坐标0,0画一个红色的点
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_draw_point (uint16 x, uint16 y, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ ips200_set_region(x, y, x, y);
+ ips200_write_16bit_data(color);
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 画线
+// 参数说明 x_start 坐标x方向的起点 [0, ips200_x_max-1]
+// 参数说明 y_start 坐标y方向的起点 [0, ips200_y_max-1]
+// 参数说明 x_end 坐标x方向的终点 [0, ips200_x_max-1]
+// 参数说明 y_end 坐标y方向的终点 [0, ips200_y_max-1]
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips200_draw_line(0, 0, 10, 10, RGB565_RED); // 坐标 0,0 到 10,10 画一条红色的线
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_draw_line (uint16 x_start, uint16 y_start, uint16 x_end, uint16 y_end, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x_start < ips200_x_max);
+ zf_assert(y_start < ips200_y_max);
+ zf_assert(x_end < ips200_x_max);
+ zf_assert(y_end < ips200_y_max);
+
+ int16 x_dir = (x_start < x_end ? 1 : -1);
+ int16 y_dir = (y_start < y_end ? 1 : -1);
+ float temp_rate = 0;
+ float temp_b = 0;
+
+ do
+ {
+ if(x_start != x_end)
+ {
+ temp_rate = (float)(y_start - y_end) / (float)(x_start - x_end);
+ temp_b = (float)y_start - (float)x_start * temp_rate;
+ }
+ else
+ {
+ while(y_start != y_end)
+ {
+ ips200_draw_point(x_start, y_start, color);
+ y_start += y_dir;
+ }
+ break;
+ }
+ if(func_abs(y_start - y_end) > func_abs(x_start - x_end))
+ {
+ while(y_start != y_end)
+ {
+ ips200_draw_point(x_start, y_start, color);
+ y_start += y_dir;
+ x_start = (int16)(((float)y_start - temp_b) / temp_rate);
+ }
+ }
+ else
+ {
+ while(x_start != x_end)
+ {
+ ips200_draw_point(x_start, y_start, color);
+ x_start += x_dir;
+ y_start = (int16)((float)x_start * temp_rate + temp_b);
+ }
+ }
+ }while(0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示字符
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 dat 需要显示的字符
+// 返回参数 void
+// 使用示例 ips200_show_char(0, 0, 'x'); // 坐标0,0写一个字符x
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_char (uint16 x, uint16 y, const char dat)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+
+ uint8 i, j;
+
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ switch(ips200_display_font)
+ {
+ case IPS200_6X8_FONT:
+ for(i = 0; i < 6; i ++)
+ {
+ ips200_set_region(x + i, y, x + i, y + 8);
+ // 减 32 因为是取模是从空格开始取得 空格在 ascii 中序号是 32
+ uint8 temp_top = ascii_font_6x8[dat - 32][i];
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_top & 0x01)
+ {
+ ips200_write_16bit_data(ips200_pencolor);
+ }
+ else
+ {
+ ips200_write_16bit_data(ips200_bgcolor);
+ }
+ temp_top >>= 1;
+ }
+ }
+ break;
+ case IPS200_8X16_FONT:
+ for(i = 0; i < 8; i ++)
+ {
+ ips200_set_region(x + i, y, x + i, y + 15);
+ // 减 32 因为是取模是从空格开始取得 空格在 ascii 中序号是 32
+ uint8 temp_top = ascii_font_8x16[dat - 32][i];
+ uint8 temp_bottom = ascii_font_8x16[dat - 32][i + 8];
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_top & 0x01)
+ {
+ ips200_write_16bit_data(ips200_pencolor);
+ }
+ else
+ {
+ ips200_write_16bit_data(ips200_bgcolor);
+ }
+ temp_top >>= 1;
+ }
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_bottom & 0x01)
+ {
+ ips200_write_16bit_data(ips200_pencolor);
+ }
+ else
+ {
+ ips200_write_16bit_data(ips200_bgcolor);
+ }
+ temp_bottom >>= 1;
+ }
+ }
+ break;
+ case IPS200_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示字符串
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 dat 需要显示的字符串
+// 返回参数 void
+// 使用示例 ips200_show_string(0, 0, "seekfree");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_string (uint16 x, uint16 y, const char dat[])
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+
+ uint16 j = 0;
+ while(dat[j] != '\0')
+ {
+ switch(ips200_display_font)
+ {
+ case IPS200_6X8_FONT:
+ ips200_show_char(x + 6 * j, y, dat[j]);
+ j ++;
+ break;
+ case IPS200_8X16_FONT:
+ ips200_show_char(x + 8 * j, y, dat[j]);
+ j ++;
+ break;
+ case IPS200_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示32位有符号 (去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 dat 需要显示的变量 数据类型 int32
+// 参数说明 num 需要显示的位数 最高10位 不包含正负号
+// 返回参数 void
+// 使用示例 ips200_show_int(0, 0, x, 3); // x 可以为 int32 int16 int8 类型
+// 备注信息 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_int (uint16 x, uint16 y, const int32 dat, uint8 num)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 10);
+
+ int32 dat_temp = dat;
+ int32 offset = 1;
+ char data_buffer[12];
+
+ memset(data_buffer, 0, 12);
+ memset(data_buffer, ' ', num+1);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp %= offset;
+ }
+ func_int_to_str(data_buffer, dat_temp);
+ ips200_show_string(x, y, (const char *)&data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示32位无符号 (去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips114_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips114_y_max-1]
+// 参数说明 dat 需要显示的变量 数据类型 uint32
+// 参数说明 num 需要显示的位数 最高10位 不包含正负号
+// 返回参数 void
+// 使用示例 ips200_show_uint(0, 0, x, 3); // x 可以为 uint32 uint16 uint8 类型
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_uint (uint16 x, uint16 y, const uint32 dat, uint8 num)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 10);
+
+ uint32 dat_temp = dat;
+ int32 offset = 1;
+ char data_buffer[12];
+ memset(data_buffer, 0, 12);
+ memset(data_buffer, ' ', num);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp %= offset;
+ }
+ func_uint_to_str(data_buffer, dat_temp);
+ ips200_show_string(x, y, (const char *)&data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示浮点数(去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 dat 需要显示的变量，数据类型float或double
+// 参数说明 num 整数位显示长度 最高8位
+// 参数说明 pointnum 小数位显示长度 最高6位
+// 返回参数 void
+// 使用示例 ips200_show_float(0, 0, x, 2, 3); // 显示浮点数 整数显示2位 小数显示三位
+// 备注信息 特别注意当发现小数部分显示的值与你写入的值不一样的时候，
+// 可能是由于浮点数精度丢失问题导致的，这并不是显示函数的问题，
+// 有关问题的详情，请自行百度学习 浮点数精度丢失问题。
+// 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_float (uint16 x, uint16 y, const float dat, uint8 num, uint8 pointnum)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 8);
+ zf_assert(pointnum > 0);
+ zf_assert(pointnum <= 6);
+
+ float dat_temp = dat;
+ float offset = 1.0;
+ char data_buffer[17];
+ memset(data_buffer, 0, 17);
+ memset(data_buffer, ' ', num+pointnum+2);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp = dat_temp - ((int)dat_temp / (int)offset) * offset;
+ }
+ func_float_to_str(data_buffer, dat_temp, pointnum);
+ ips200_show_string(x, y, data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示二值图像 数据每八个点组成一个字节数据
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, ips200_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, ips200_y_max]
+// 返回参数 void
+// 使用示例 ips200_show_binary_image(0, 0, ov7725_image_binary[0], OV7725_W, OV7725_H, OV7725_W, OV7725_H);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_binary_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint8 temp = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ ips200_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ temp = *(image + height_index * width / 8 + width_index / 8); // 读取像素点
+ if(0x80 & (temp << (width_index % 8)))
+ {
+ ips200_write_16bit_data(RGB565_WHITE);
+ }
+ else
+ {
+ ips200_write_16bit_data(RGB565_BLACK);
+ }
+ }
+ }
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示 8bit 灰度图像 带二值化阈值
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, ips200_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, ips200_y_max]
+// 参数说明 threshold 二值化显示阈值 0-不开启二值化
+// 返回参数 void
+// 使用示例 ips200_show_gray_image(0, 0, mt9v03x_image[0], MT9V03X_W, MT9V03X_H, MT9V03X_W, MT9V03X_H, 0);
+// 备注信息 最后一个参数可以选填一个二值化阈值 把图像显示为二值化图像
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_gray_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 threshold)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint16 color = 0,temp = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ ips200_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ temp = *(image + height_index * width + width_index); // 读取像素点
+ if(threshold == 0)
+ {
+ color = (0x001f & ((temp) >> 3)) << 11;
+ color = color | (((0x003f) & ((temp) >> 2)) << 5);
+ color = color | (0x001f & ((temp) >> 3));
+ ips200_write_16bit_data(color);
+ }
+ else if(temp < threshold)
+ {
+ ips200_write_16bit_data(RGB565_BLACK);
+ }
+ else
+ {
+ ips200_write_16bit_data(RGB565_WHITE);
+ }
+ }
+ }
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示 RGB565 彩色图像
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, ips200_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, ips200_y_max]
+// 参数说明 color_mode 色彩模式 0-低位在前 1-高位在前
+// 返回参数 void
+// 使用示例 ips200_show_rgb565_image(0, 0, scc8660_image[0], SCC8660_W, SCC8660_H, SCC8660_W, SCC8660_H, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_rgb565_image (uint16 x, uint16 y, const uint16 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 color_mode)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint16 color = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ ips200_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ color = *((uint16 *)(image + height_index * width + width_index)); // 读取像素点
+ if(color_mode)
+ {
+ color = ((color & 0xff) << 8) | (color >> 8);
+ }
+ ips200_write_16bit_data(color);
+ }
+ }
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示波形
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 *wave 波形数组指针
+// 参数说明 width 波形实际宽度
+// 参数说明 value_max 波形实际最大值
+// 参数说明 dis_width 波形显示宽度 参数范围 [0, ips200_x_max]
+// 参数说明 dis_value_max 波形显示最大值 参数范围 [0, ips200_y_max]
+// 返回参数 void
+// 使用示例 ips200_show_wave(0, 0, data, 128, 64, 64, 32);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_wave (uint16 x, uint16 y, const uint16 *wave, uint16 width, uint16 value_max, uint16 dis_width, uint16 dis_value_max)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+ zf_assert(wave != NULL);
+
+ uint32 i = 0, j = 0;
+ uint32 width_index = 0, value_max_index = 0;
+
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ ips200_set_region(x, y, x + dis_width - 1, y + dis_value_max - 1); // 设置显示区域
+ for(i = 0; i < dis_value_max; i ++)
+ {
+ for(j = 0; j < dis_width; j ++)
+ {
+ ips200_write_16bit_data(ips200_bgcolor);
+ }
+ }
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ value_max_index = *(wave + width_index) * (dis_value_max - 1) / value_max;
+ ips200_draw_point((uint16)(i + x), (uint16)((dis_value_max - 1) - value_max_index + y), ips200_pencolor);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 汉字显示
+// 参数说明 x 坐标x方向的起点 参数范围 [0, ips200_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, ips200_y_max-1]
+// 参数说明 size 取模的时候设置的汉字字体大小 也就是一个汉字占用的点阵长宽为多少个点 取模的时候需要长宽是一样的
+// 参数说明 *chinese_buffer 需要显示的汉字数组
+// 参数说明 number 需要显示多少位
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内 rgb565_color_enum 枚举值或者自行写入
+// 返回参数 void
+// 使用示例 ips200_show_chinese(0, 0, 16, chinese_test[0], 4, RGB565_RED);//显示font文件里面的 示例
+// 备注信息 使用PCtoLCD2002软件取模 阴码、逐行式、顺向 16*16
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_show_chinese (uint16 x, uint16 y, uint8 size, const uint8 *chinese_buffer, uint8 number, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < ips200_x_max);
+ zf_assert(y < ips200_y_max);
+ zf_assert(chinese_buffer != NULL);
+
+ int i, j, k;
+ uint8 temp, temp1, temp2;
+ const uint8 *p_data;
+
+ temp2 = size / 8;
+
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+ ips200_set_region(x, y, number * size - 1 + x, y + size - 1);
+
+ for(i = 0; i < size; i ++)
+ {
+ temp1 = number;
+ p_data = chinese_buffer + i * temp2;
+ while(temp1 --)
+ {
+ for(k = 0; k < temp2; k ++)
+ {
+ for(j = 8; j > 0; j --)
+ {
+ temp = (*p_data >> (j - 1)) & 0x01;
+ if(temp)
+ {
+ ips200_write_16bit_data(color);
+ }
+ else
+ {
+ ips200_write_16bit_data(ips200_bgcolor);
+ }
+ }
+ p_data ++;
+ }
+ p_data = p_data - temp2 + temp2 * size;
+ }
+ }
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 2寸 IPS液晶初始化
+// 参数说明 type_select 两寸屏接口类型 IPS200_TYPE_SPI 为 SPI 接口串口两寸屏 IPS200_TYPE_PARALLEL8 为 8080 协议八位并口两寸屏
+// 返回参数 void
+// 使用示例 ips200_init(IPS200_TYPE_PARALLEL8);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void ips200_init (ips200_type_enum type_select)
+{
+ ips200_set_dir(ips200_display_dir);
+ ips200_set_color(ips200_pencolor, ips200_bgcolor);
+
+ if(IPS200_TYPE_SPI == type_select)
+ {
+ ips200_display_type = IPS200_TYPE_SPI;
+ ips_rst_pin = IPS200_RST_PIN_SPI;
+ ips_bl_pin = IPS200_BLk_PIN_SPI;
+#if IPS200_USE_SOFT_SPI
+ soft_spi_init(&ips200_spi, 0, IPS200_SOFT_SPI_DELAY, IPS200_SCL_PIN, IPS200_SDA_PIN, SOFT_SPI_PIN_NULL, SOFT_SPI_PIN_NULL);
+#else
+ spi_init(IPS200_SPI, SPI_MODE0, IPS200_SPI_SPEED, IPS200_SCL_PIN_SPI, IPS200_SDA_PIN_SPI, IPS200_SDA_IN_PIN_SPI, SPI_CS_NULL);
+#endif
+
+ gpio_init(IPS200_DC_PIN_SPI, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(ips_rst_pin, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_CS_PIN_SPI, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+ gpio_init(ips_bl_pin, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+ }
+ else
+ {
+ ips200_display_type = IPS200_TYPE_PARALLEL8;
+ ips_rst_pin = IPS200_RST_PIN_PARALLEL8;
+ ips_bl_pin = IPS200_BL_PIN_PARALLEL8;
+
+ gpio_init(ips_rst_pin, GPO, GPIO_LOW, GPO_PUSH_PULL); // RTS
+ gpio_init(ips_bl_pin, GPO, GPIO_LOW, GPO_PUSH_PULL); // BL
+ gpio_init(IPS200_CS_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_RS_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_RD_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_WR_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+
+ gpio_init(IPS200_D0_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_D1_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_D2_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_D3_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_D4_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_D5_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_D6_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(IPS200_D7_PIN_PARALLEL8, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ }
+
+ ips200_set_dir(ips200_display_dir);
+ ips200_set_color(ips200_pencolor, ips200_bgcolor);
+ ips200_debug_init();
+
+ IPS200_BL(1);
+ IPS200_RST(0);
+ system_delay_ms(5);
+ IPS200_RST(1);
+ system_delay_ms(120);
+
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(0);
+ }
+
+ ips200_write_command(0x11);
+ system_delay_ms(120);
+
+ ips200_write_command(0x36);
+ switch(ips200_display_dir)
+ {
+ case 0: ips200_write_8bit_data(0x00); break;
+ case 1: ips200_write_8bit_data(0xC0); break;
+ case 2: ips200_write_8bit_data(0x70); break;
+ default:ips200_write_8bit_data(0xA0); break;
+ }
+
+ ips200_write_command(0x3A);
+ ips200_write_8bit_data(0x05);
+
+ ips200_write_command(0xB2);
+ ips200_write_8bit_data(0x0C);
+ ips200_write_8bit_data(0x0C);
+ ips200_write_8bit_data(0x00);
+ ips200_write_8bit_data(0x33);
+ ips200_write_8bit_data(0x33);
+
+ ips200_write_command(0xB7);
+ ips200_write_8bit_data(0x35);
+
+ ips200_write_command(0xBB);
+ ips200_write_8bit_data(0x29); // 32 Vcom=1.35V
+
+ ips200_write_command(0xC2);
+ ips200_write_8bit_data(0x01);
+
+ ips200_write_command(0xC3);
+ ips200_write_8bit_data(0x19); // GVDD=4.8V
+
+ ips200_write_command(0xC4);
+ ips200_write_8bit_data(0x20); // VDV, 0x20:0v
+
+ ips200_write_command(0xC5);
+ ips200_write_8bit_data(0x1A); // VCOM Offset Set
+
+ ips200_write_command(0xC6);
+ ips200_write_8bit_data(0x01F); // 0x0F:60Hz
+
+ ips200_write_command(0xD0);
+ ips200_write_8bit_data(0xA4);
+ ips200_write_8bit_data(0xA1);
+
+ ips200_write_command(0xE0);
+ ips200_write_8bit_data(0xD0);
+ ips200_write_8bit_data(0x08);
+ ips200_write_8bit_data(0x0E);
+ ips200_write_8bit_data(0x09);
+ ips200_write_8bit_data(0x09);
+ ips200_write_8bit_data(0x05);
+ ips200_write_8bit_data(0x31);
+ ips200_write_8bit_data(0x33);
+ ips200_write_8bit_data(0x48);
+ ips200_write_8bit_data(0x17);
+ ips200_write_8bit_data(0x14);
+ ips200_write_8bit_data(0x15);
+ ips200_write_8bit_data(0x31);
+ ips200_write_8bit_data(0x34);
+
+ ips200_write_command(0xE1);
+ ips200_write_8bit_data(0xD0);
+ ips200_write_8bit_data(0x08);
+ ips200_write_8bit_data(0x0E);
+ ips200_write_8bit_data(0x09);
+ ips200_write_8bit_data(0x09);
+ ips200_write_8bit_data(0x15);
+ ips200_write_8bit_data(0x31);
+ ips200_write_8bit_data(0x33);
+ ips200_write_8bit_data(0x48);
+ ips200_write_8bit_data(0x17);
+ ips200_write_8bit_data(0x14);
+ ips200_write_8bit_data(0x15);
+ ips200_write_8bit_data(0x31);
+ ips200_write_8bit_data(0x34);
+
+ ips200_write_command(0x21);
+
+ ips200_write_command(0x29);
+ if(IPS200_TYPE_SPI == ips200_display_type)
+ {
+ IPS200_CS(1);
+ }
+
+ ips200_clear(); // 初始化为白屏
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_ips200.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_ips200.h
new file mode 100644
index 0000000..97bd024
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_ips200.h
@@ -0,0 +1,227 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_ips200
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 双排排针 并口两寸屏 硬件引脚
+* RD 查看 zf_device_ips200.h 中 IPS200_RD_PIN_PARALLEL8 宏定义
+* WR 查看 zf_device_ips200.h 中 IPS200_WR_PIN_PARALLEL8 宏定义
+* RS 查看 zf_device_ips200.h 中 IPS200_RS_PIN_PARALLEL8 宏定义
+* RST 查看 zf_device_ips200.h 中 IPS200_RST_PIN_PARALLEL8 宏定义
+* CS 查看 zf_device_ips200.h 中 IPS200_CS_PIN_PARALLEL8 宏定义
+* BL 查看 zf_device_ips200.h 中 IPS200_BL_PIN_PARALLEL8 宏定义
+* D0-D7 查看 zf_device_ips200.h 中 IPS200_Dx_PIN_PARALLEL8 宏定义
+* VCC 3.3V电源
+* GND 电源地
+*
+* // 单排排针 SPI 两寸屏 硬件引脚
+* SCL 查看 zf_device_ips200.h 中 IPS200_SCL_PIN_SPI 宏定义
+* SDA 查看 zf_device_ips200.h 中 IPS200_SDA_PIN_SPI 宏定义
+* RST 查看 zf_device_ips200.h 中 IPS200_RST_PIN_SPI 宏定义
+* DC 查看 zf_device_ips200.h 中 IPS200_DC_PIN_SPI 宏定义
+* CS 查看 zf_device_ips200.h 中 IPS200_CS_PIN_SPI 宏定义
+* BLk 查看 zf_device_ips200.h 中 IPS200_BLk_PIN_SPI 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 最大分辨率 320 * 240
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_ips200_h_
+#define _zf_device_ips200_h_
+
+#include "zf_common_typedef.h"
+
+#define IPS200_USE_SOFT_SPI (0 ) // 默认使用硬件 SPI 方式驱动 建议使用硬件 SPI 方式驱动
+#if IPS200_USE_SOFT_SPI // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 SPI 驱动====================================================
+// 如果使用的是单排排针的两寸屏幕 SPI 驱动控制引脚 可以修改
+#define IPS200_SOFT_SPI_DELAY (0 ) // 软件 SPI 的时钟延时周期 数值越小 SPI 通信速率越快
+#define IPS200_SCL_PIN (P15_3) // 软件 SPI SCK 引脚
+#define IPS200_SDA_PIN (P15_5) // 软件 SPI MOSI 引脚
+//====================================================软件 SPI 驱动====================================================
+#else
+//====================================================硬件 SPI 驱动====================================================
+// 如果使用的是单排排针的两寸屏幕 SPI 驱动控制引脚 可以修改
+#define IPS200_SPI_SPEED (60*1000*1000) // 硬件 SPI 速率
+#define IPS200_SPI (SPI_2 ) // 硬件 SPI 号
+#define IPS200_SCL_PIN_SPI (SPI2_SCLK_P15_3 ) // 硬件 SPI SCK 引脚
+#define IPS200_SDA_PIN_SPI (SPI2_MOSI_P15_5 ) // 硬件 SPI MOSI 引脚
+#define IPS200_SDA_IN_PIN_SPI (SPI2_MISO_P15_4 ) // 硬件 SPI MISO 引脚 IPS没有MISO引脚，但是这里任然需要定义，在spi的初始化时需要使用
+//====================================================硬件 SPI 驱动====================================================
+#endif
+// 如果使用的是单排排针的两寸屏幕 SPI 驱动控制引脚 可以修改
+#define IPS200_RST_PIN_SPI (P15_1) // 液晶复位引脚定义
+#define IPS200_DC_PIN_SPI (P15_0) // 液晶命令位引脚定义
+#define IPS200_CS_PIN_SPI (P15_2)
+#define IPS200_BLk_PIN_SPI (P15_4)
+
+// 如果使用的是双排排针的两寸屏幕 并口驱动控制引脚 可以修改
+#define IPS200_RST_PIN_PARALLEL8 (P15_0)
+#define IPS200_BL_PIN_PARALLEL8 (P15_4)
+
+//如果使用的是双排排针的两寸屏幕 并口驱动控制引脚 可以修改
+#define IPS200_RD_PIN_PARALLEL8 (P15_3)
+#define IPS200_WR_PIN_PARALLEL8 (P15_5)
+#define IPS200_RS_PIN_PARALLEL8 (P15_1)
+#define IPS200_CS_PIN_PARALLEL8 (P15_2)
+
+//并口驱动数据引脚 可以修改 如果你的屏幕是双排排针 这里的引脚用得到
+//D0-D3四个数据引脚必须连续 例如C0-C3,C1-C4等等，
+//D4-D7四个数据引脚必须连续 例如B0-B3,B1-B4等等。
+//可以连接到不同端口的意思就是屏幕的D0-D3与C1-C4连接，D4-D7与B2-B5连接。
+//切换引脚后注意修改IPS200_DATA_PORT1和IPS200_DATA_PORT2宏定义
+#define IPS200_D0_PIN_PARALLEL8 (P11_9 )
+#define IPS200_D1_PIN_PARALLEL8 (P11_10)
+#define IPS200_D2_PIN_PARALLEL8 (P11_11)
+#define IPS200_D3_PIN_PARALLEL8 (P11_12)
+#define IPS200_D4_PIN_PARALLEL8 (P13_0 )
+#define IPS200_D5_PIN_PARALLEL8 (P13_1 )
+#define IPS200_D6_PIN_PARALLEL8 (P13_2 )
+#define IPS200_D7_PIN_PARALLEL8 (P13_3 )
+
+#define IPS200_DEFAULT_DISPLAY_DIR (IPS200_PORTAIT) // 默认的显示方向
+#define IPS200_DEFAULT_PENCOLOR (RGB565_RED ) // 默认的画笔颜色
+#define IPS200_DEFAULT_BGCOLOR (RGB565_WHITE ) // 默认的背景颜色
+#define IPS200_DEFAULT_DISPLAY_FONT (IPS200_8X16_FONT) // 默认的字体模式
+
+//定义数据端口所在PORT，切换引脚后务必根据引脚所在PORT进行更改
+#define IPS200_DATA_PORT1 (3) //0：P00端口 1：P02端口 2：P10端口 3：P11端口 4：P13端口 5：P14端口 6：P15端口 7：P20端口 8：P21端口 9：P22端口 10：P23端口 11：P32端口 12：P33端口
+#define IPS200_DATAPORT1 (get_port_out_addr(IPS200_DATA_PORT1))
+#define DATA_START_NUM1 (IPS200_D0_PIN_PARALLEL8&0x1f) // 宏定义数据引脚的起始编号
+
+
+#define IPS200_DATA_PORT2 (4) //0：P00端口 1：P02端口 2：P10端口 3：P11端口 4：P13端口 5：P14端口 6：P15端口 7：P20端口 8：P21端口 9：P22端口 10：P23端口 11：P32端口 12：P33端口
+#define IPS200_DATAPORT2 (get_port_out_addr(IPS200_DATA_PORT2))
+#define DATA_START_NUM2 (IPS200_D4_PIN_PARALLEL8&0x1f) //宏定义数据引脚的起始编号
+
+// 控制语句
+#define IPS200_RD(x) ((x) ? (gpio_high(IPS200_RD_PIN_PARALLEL8)) : (gpio_low(IPS200_RD_PIN_PARALLEL8)))
+#define IPS200_WR(x) ((x) ? (gpio_high(IPS200_WR_PIN_PARALLEL8)) : (gpio_low(IPS200_WR_PIN_PARALLEL8)))
+#define IPS200_RST(x) ((x) ? (gpio_high(ips_rst_pin)) : (gpio_low(ips_rst_pin)))
+#define IPS200_BL(x) ((x) ? (gpio_high(ips_bl_pin)) : (gpio_low(ips_bl_pin)))
+#define IPS200_RS(x) ((x) ? (gpio_high(IPS200_RS_PIN_PARALLEL8)) : (gpio_low(IPS200_RS_PIN_PARALLEL8)))
+#define IPS200_DC(x) ((x) ? (gpio_high(IPS200_DC_PIN_SPI)) : (gpio_low(IPS200_DC_PIN_SPI)))
+#define IPS200_CS(x) ((x) ? (gpio_high(IPS200_CS_PIN_SPI)) : (gpio_low(IPS200_CS_PIN_SPI)))
+
+//=================================================定义 IPS200 参数结构体===============================================
+typedef enum
+{
+ IPS200_TYPE_SPI, // SPI 驱动
+ IPS200_TYPE_PARALLEL8, // 并口驱动
+}ips200_type_enum;
+
+typedef enum
+{
+ IPS200_PORTAIT = 0, // 竖屏模式
+ IPS200_PORTAIT_180 = 1, // 竖屏模式 旋转180
+ IPS200_CROSSWISE = 2, // 横屏模式
+ IPS200_CROSSWISE_180 = 3, // 横屏模式 旋转180
+}ips200_dir_enum;
+
+typedef enum
+{
+ IPS200_6X8_FONT = 0, // 6x8 字体
+ IPS200_8X16_FONT = 1, // 8x16 字体
+ IPS200_16X16_FONT = 2, // 16x16 字体 目前不支持
+}ips200_font_size_enum;
+//=================================================定义 IPS200 参数结构体===============================================
+
+//===================================================IPS200 基础函数==================================================
+void ips200_clear (void);
+void ips200_full (const uint16 color);
+void ips200_set_dir (ips200_dir_enum dir);
+void ips200_set_font (ips200_font_size_enum font);
+void ips200_set_color (const uint16 pen, const uint16 bgcolor);
+void ips200_draw_point (uint16 x, uint16 y, const uint16 color);
+void ips200_draw_line (uint16 x_start, uint16 y_start, uint16 x_end, uint16 y_end, const uint16 color);
+
+void ips200_show_char (uint16 x, uint16 y, const char dat);
+void ips200_show_string (uint16 x, uint16 y, const char dat[]);
+void ips200_show_int (uint16 x, uint16 y, const int32 dat, uint8 num);
+void ips200_show_uint (uint16 x, uint16 y, const uint32 dat, uint8 num);
+void ips200_show_float (uint16 x, uint16 y, const float dat, uint8 num, uint8 pointnum);
+
+void ips200_show_binary_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height);
+void ips200_show_gray_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 threshold);
+void ips200_show_rgb565_image (uint16 x, uint16 y, const uint16 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 color_mode);
+
+void ips200_show_wave (uint16 x, uint16 y, const uint16 *wave, uint16 width, uint16 value_max, uint16 dis_width, uint16 dis_value_max);
+void ips200_show_chinese (uint16 x, uint16 y, uint8 size, const uint8 *chinese_buffer, uint8 number, const uint16 color);
+
+void ips200_init (ips200_type_enum type_select);
+//===================================================IPS200 基础函数==================================================
+
+
+//===================================================IPS200 扩展函数==================================================
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示小钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 ips200_displayimage7725(ov7725_image_binary[0], OV7725_W, OV7725_H);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define ips200_displayimage7725(p, width, height) (ips200_show_binary_image(0, 0, (p), OV7725_W, OV7725_H, (width), (height)))
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示总钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 ips200_displayimage03x(mt9v03x_image[0], MT9V03X_W, MT9V03X_H);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define ips200_displayimage03x(p, width, height) (ips200_show_gray_image(0, 0, (p), MT9V03X_W, MT9V03X_H, (width), (height), 0))
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS200 显示凌瞳图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 ips200_displayimage8660(scc8660_image[0], SCC8660_W, SCC8660_W);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define ips200_displayimage8660(p, width, height) (ips200_show_rgb565_image(0, 0, (p), SCC8660_W, SCC8660_H, (width), (height), 1))
+
+//===================================================IPS200 扩展函数==================================================
+
+
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_key.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_key.c
new file mode 100644
index 0000000..dbae80b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_key.c
@@ -0,0 +1,144 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_key
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 一般是主板按键对应的引脚
+* KEY1/S1 查看 zf_device_key.h 中 KEY_LIST[0]
+* KEY2/S2 查看 zf_device_key.h 中 KEY_LIST[1]
+* KEY3/S3 查看 zf_device_key.h 中 KEY_LIST[2]
+* KEY4/S4 查看 zf_device_key.h 中 KEY_LIST[3]
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+
+#include "zf_device_key.h"
+
+static uint32 scanner_period = 0; // 按键的扫描周期
+static uint32 key_press_time[KEY_NUMBER]; // 按键信号持续时长
+static key_state_enum key_state[KEY_NUMBER]; // 按键状态
+
+static const gpio_pin_enum key_index[KEY_NUMBER] = KEY_LIST;
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 按键状态扫描
+// 参数说明 void
+// 返回参数 void
+// 使用示例 key_scanner();
+// 备注信息 这个函数放在主循环或者 PIT 中断中
+//-------------------------------------------------------------------------------------------------------------------
+void key_scanner (void)
+{
+ uint8 i = 0;
+ for(i = 0; i < KEY_NUMBER; i ++)
+ {
+ if(KEY_RELEASE_LEVEL != gpio_get_level(key_index[i])) // 按键按下
+ {
+ key_press_time[i] ++;
+ if(key_press_time[i] >= KEY_LONG_PRESS_PERIOD / scanner_period)
+ {
+ key_state[i] = KEY_LONG_PRESS;
+ }
+ }
+ else // 按键释放
+ {
+ if(key_state[i] != KEY_LONG_PRESS && key_press_time[i] >= KEY_MAX_SHOCK_PERIOD / scanner_period)
+ {
+ key_state[i] = KEY_SHORT_PRESS;
+ }
+ key_press_time[i] = 0;
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取按键状态
+// 参数说明 key_n 按键索引
+// 返回参数 key_state_enum 按键状态
+// 使用示例 key_get_state(KEY_1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+key_state_enum key_get_state (key_index_enum key_n)
+{
+ return key_state[key_n];
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 清除对应按键状态
+// 参数说明 key_n 按键索引
+// 返回参数 void 无
+// 使用示例 key_clear_state(KEY_1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void key_clear_state (key_index_enum key_n)
+{
+ key_state[key_n] = KEY_RELEASE;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 清除所有按键状态
+// 参数说明 void 无
+// 返回参数 void 无
+// 使用示例 key_clear_all_state();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void key_clear_all_state (void)
+{
+ key_state[0] = KEY_RELEASE;
+ key_state[1] = KEY_RELEASE;
+ key_state[2] = KEY_RELEASE;
+ key_state[3] = KEY_RELEASE;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 按键初始化
+// 参数说明 period 按键扫描周期 以毫秒为单位
+// 返回参数 void
+// 使用示例 key_init(10);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void key_init (uint32 period)
+{
+ zf_assert(0 < period);
+ uint8 loop_temp = 0;
+ for(loop_temp = 0; loop_temp < KEY_NUMBER; loop_temp ++)
+ {
+ gpio_init(key_index[loop_temp], GPI, GPIO_HIGH, GPI_PULL_UP);
+ key_state[loop_temp] = KEY_RELEASE;
+ }
+ scanner_period = period;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_key.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_key.h
new file mode 100644
index 0000000..adf917a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_key.h
@@ -0,0 +1,84 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_key
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* // 一般是主板按键对应的引脚
+* KEY1/S1 查看 zf_device_key.h 中 KEY_LIST[0]
+* KEY2/S2 查看 zf_device_key.h 中 KEY_LIST[1]
+* KEY3/S3 查看 zf_device_key.h 中 KEY_LIST[2]
+* KEY4/S4 查看 zf_device_key.h 中 KEY_LIST[3]
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_key_h_
+#define _zf_device_key_h_
+
+#include "zf_common_debug.h"
+#include "zf_driver_gpio.h"
+
+// 定义按键引脚 用户可以新增可以修改 默认定义四个按键
+// 定义按键顺序对应下方 key_index_enum 枚举体中定义的顺序
+// 如果用户可以新增按键 那么需要同步在下方 key_index_enum 枚举体中新增按键
+#define KEY_LIST {P20_6, P20_7, P20_8, P20_9}
+
+#define KEY_RELEASE_LEVEL (GPIO_HIGH) // 按键的默认状态 也就是按键释放状态的电平
+#define KEY_MAX_SHOCK_PERIOD (10 ) // 按键消抖检测时长 单位毫秒 低于这个时长的信号会被认为是杂波抖动
+#define KEY_LONG_PRESS_PERIOD (1000 ) // 最小长按时长 单位毫秒 高于这个时长的信号会被认为是长按动作
+
+typedef enum
+{
+ KEY_1,
+ KEY_2,
+ KEY_3,
+ KEY_4,
+ KEY_NUMBER,
+}key_index_enum; // 按键索引 对应上方定义的按键引脚个数 默认定义四个按键
+
+typedef enum
+{
+ KEY_RELEASE, // 按键释放状态
+ KEY_SHORT_PRESS, // 按键短按状态
+ KEY_LONG_PRESS, // 按键长按状态
+}key_state_enum;
+
+void key_scanner (void);
+key_state_enum key_get_state (key_index_enum key_n);
+void key_clear_state (key_index_enum key_n);
+void key_clear_all_state (void);
+void key_init (uint32 period);
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_mpu6050.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_mpu6050.c
new file mode 100644
index 0000000..925cd2c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_mpu6050.c
@@ -0,0 +1,225 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_mpu6050
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* 软件 IIC 通信引脚对应关系
+* SCL 查看 zf_device_mpu6050.h 中 MPU6050_SOFT_IIC_SCL 宏定义
+* SDA 查看 zf_device_mpu6050.h 中 MPU6050_SOFT_IIC_SDA 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+*
+* 硬件 IIC 通信引脚应关系
+* SCL 查看 zf_device_mpu6050.h 中 MPU6050_IIC_SCL 宏定义
+* SDA 查看 zf_device_mpu6050.h 中 MPU6050_IIC_SDA 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_soft_iic.h"
+#include "zf_device_mpu6050.h"
+
+int16 mpu6050_gyro_x = 0, mpu6050_gyro_y = 0, mpu6050_gyro_z = 0; // 三轴陀螺仪数据 gyro (陀螺仪)
+int16 mpu6050_acc_x = 0, mpu6050_acc_y = 0, mpu6050_acc_z = 0; // 三轴加速度计数据 acc (accelerometer 加速度计)
+
+#if MPU6050_USE_SOFT_IIC
+static soft_iic_info_struct mpu6050_iic_struct;
+
+#define mpu6050_write_register(reg, data) (soft_iic_write_8bit_register(&mpu6050_iic_struct, (reg), (data)))
+#define mpu6050_read_register(reg) (soft_iic_read_8bit_register(&mpu6050_iic_struct, (reg)))
+#define mpu6050_read_registers(reg, data, len) (soft_iic_read_8bit_registers(&mpu6050_iic_struct, (reg), (data), (len)))
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 MPU6050 自检
+// 参数说明 void
+// 返回参数 uint8 1-自检失败 0-自检成功
+// 使用示例 if(mpu6050_self1_check())
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 mpu6050_self1_check (void)
+{
+ uint8 dat = 0, return_state = 0;
+ uint16 timeout_count = 0;
+
+ mpu6050_write_register(MPU6050_PWR_MGMT_1, 0x00); // 解除休眠状态
+ mpu6050_write_register(MPU6050_SMPLRT_DIV, 0x07); // 125HZ采样率
+ while(0x07 != dat)
+ {
+ if(timeout_count ++ > MPU6050_TIMEOUT_COUNT)
+ {
+ return_state = 1;
+ break;
+ }
+ dat = mpu6050_read_register(MPU6050_SMPLRT_DIV);
+ system_delay_ms(10);
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 MPU6050 加速度计数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 mpu6050_get_acc(); // 执行该函数后，直接查看对应的变量即可
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void mpu6050_get_acc (void)
+{
+ uint8 dat[6];
+
+ mpu6050_read_registers(MPU6050_ACCEL_XOUT_H, dat, 6);
+ mpu6050_acc_x = (int16)(((uint16)dat[0] << 8 | dat[1]));
+ mpu6050_acc_y = (int16)(((uint16)dat[2] << 8 | dat[3]));
+ mpu6050_acc_z = (int16)(((uint16)dat[4] << 8 | dat[5]));
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取 MPU6050 陀螺仪数据
+// 参数说明 void
+// 返回参数 void
+// 使用示例 mpu6050_get_gyro(); // 执行该函数后，直接查看对应的变量即可
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void mpu6050_get_gyro (void)
+{
+ uint8 dat[6];
+
+ mpu6050_read_registers(MPU6050_GYRO_XOUT_H, dat, 6);
+ mpu6050_gyro_x = (int16)(((uint16)dat[0] << 8 | dat[1]));
+ mpu6050_gyro_y = (int16)(((uint16)dat[2] << 8 | dat[3]));
+ mpu6050_gyro_z = (int16)(((uint16)dat[4] << 8 | dat[5]));
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 MPU6050 加速度计数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的加速度计数据
+// 返回参数 void
+// 使用示例 float data = mpu6050_acc_transition(imu660ra_acc_x); //单位为 g(m/s^2)
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float mpu6050_acc_transition (int16 acc_value)
+{
+ float acc_data = 0;
+ switch(MPU6050_ACC_SAMPLE)
+ {
+ case 0x00: acc_data = (float)acc_value / 16384; break; // 0x00 加速度计量程为:±2g 获取到的加速度计数据 除以16384 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x08: acc_data = (float)acc_value / 8192; break; // 0x08 加速度计量程为:±4g 获取到的加速度计数据 除以8192 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x10: acc_data = (float)acc_value / 4096; break; // 0x10 加速度计量程为:±8g 获取到的加速度计数据 除以4096 可以转化为带物理单位的数据，单位：g(m/s^2)
+ case 0x18: acc_data = (float)acc_value / 2048; break; // 0x18 加速度计量程为:±16g 获取到的加速度计数据 除以2048 可以转化为带物理单位的数据，单位：g(m/s^2)
+ default: break;
+ }
+ return acc_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 将 MPU6050 陀螺仪数据转换为实际物理数据
+// 参数说明 gyro_value // 任意轴的陀螺仪数据
+// 返回参数 void
+// 使用示例 float data = mpu6050_gyro_transition(imu660ra_gyro_x); // 单位为°/s
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+float mpu6050_gyro_transition (int16 gyro_value)
+{
+ float gyro_data = 0;
+ switch(MPU6050_GYR_SAMPLE)
+ {
+ case 0x00: gyro_data = (float)gyro_value / 131.2f; break; // 0x00 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131 可以转化为带物理单位的数据，单位为：°/s
+ case 0x08: gyro_data = (float)gyro_value / 65.6f; break; // 0x08 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.5 可以转化为带物理单位的数据，单位为：°/s
+ case 0x10: gyro_data = (float)gyro_value / 32.8f; break; // 0x10 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+ case 0x18: gyro_data = (float)gyro_value / 16.4f; break; // 0x18 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+ default: break;
+ }
+ return gyro_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 初始化 MPU6050
+// 参数说明 void
+// 返回参数 uint8 1-初始化失败 0-初始化成功
+// 使用示例 mpu6050_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 mpu6050_init (void)
+{
+ uint8 return_state = 0;
+#if MPU6050_USE_SOFT_IIC
+ soft_iic_init(&mpu6050_iic_struct, MPU6050_DEV_ADDR, MPU6050_SOFT_IIC_DELAY, MPU6050_SCL_PIN, MPU6050_SDA_PIN);
+#else
+ iic_init(MPU6050_IIC, MPU6050_DEV_ADDR, MPU6050_IIC_SPEED, MPU6050_SCL_PIN, MPU6050_SDA_PIN);
+#endif
+ system_delay_ms(100); // 上电延时
+
+ do
+ {
+ if(mpu6050_self1_check())
+ {
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是 MPU6050 自检出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "MPU6050 self check error.");
+ return_state = 1;
+ break;
+ }
+ mpu6050_write_register(MPU6050_PWR_MGMT_1, 0x00); // 解除休眠状态
+ mpu6050_write_register(MPU6050_SMPLRT_DIV, 0x07); // 125HZ采样率
+ mpu6050_write_register(MPU6050_CONFIG, 0x04);
+ mpu6050_write_register(MPU6050_GYRO_CONFIG, MPU6050_GYR_SAMPLE); // 2000°/s
+ mpu6050_write_register(MPU6050_ACCEL_CONFIG, MPU6050_ACC_SAMPLE); // 8g(m/s^2)
+ mpu6050_write_register(MPU6050_USER_CONTROL, 0x00);
+ mpu6050_write_register(MPU6050_INT_PIN_CFG, 0x02);
+
+ // MPU6050_GYRO_CONFIG寄存器
+ // 设置为:0x00 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131.2 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x08 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.6 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x10 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+ // 设置为:0x18 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+
+ // MPU6050_ACCEL_CONFIG寄存器
+ // 设置为:0x00 加速度计量程为:±2g 获取到的加速度计数据 除以16384 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x08 加速度计量程为:±4g 获取到的加速度计数据 除以8192 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x10 加速度计量程为:±8g 获取到的加速度计数据 除以4096 可以转化为带物理单位的数据，单位：g(m/s^2)
+ // 设置为:0x18 加速度计量程为:±16g 获取到的加速度计数据 除以2048 可以转化为带物理单位的数据，单位：g(m/s^2)
+
+
+ }while(0);
+ return return_state;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_mpu6050.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_mpu6050.h
new file mode 100644
index 0000000..5b26c2a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_mpu6050.h
@@ -0,0 +1,112 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_mpu6050
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* 软件 IIC 通信引脚对应关系
+* SCL 查看 zf_device_mpu6050.h 中 MPU6050_SOFT_IIC_SCL 宏定义
+* SDA 查看 zf_device_mpu6050.h 中 MPU6050_SOFT_IIC_SDA 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+*
+* 硬件 IIC 通信引脚应关系
+* SCL 查看 zf_device_mpu6050.h 中 MPU6050_IIC_SCL 宏定义
+* SDA 查看 zf_device_mpu6050.h 中 MPU6050_IIC_SDA 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_mpu6050_h_
+#define _zf_device_mpu6050_h_
+
+#include "zf_common_typedef.h"
+
+#define MPU6050_USE_SOFT_IIC (1) // 默认使用软件 IIC 方式驱动 建议使用软件 IIC 方式
+#if MPU6050_USE_SOFT_IIC // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 IIC 驱动====================================================
+#define MPU6050_SOFT_IIC_DELAY (59 ) // 软件 IIC 的时钟延时周期 数值越小 IIC 通信速率越快
+#define MPU6050_SCL_PIN (P20_11) // 软件 IIC SCL 引脚 连接 MPU6050 的 SCL 引脚
+#define MPU6050_SDA_PIN (P20_14) // 软件 IIC SDA 引脚 连接 MPU6050 的 SDA 引脚
+//====================================================软件 IIC 驱动====================================================
+#endif
+
+#define MPU6050_TIMEOUT_COUNT (0x00FF) // MPU6050 超时计数
+
+//================================================定义 MPU6050 内部地址================================================
+#define MPU6050_DEV_ADDR (0xD0>>1) // IIC写入时的地址字节数据，+1为读取
+
+#define MPU6050_SMPLRT_DIV (0x19) // 陀螺仪采样率，典型值：0x07(125Hz)
+#define MPU6050_CONFIG (0x1A) // 低通滤波频率，典型值：0x06(5Hz)
+#define MPU6050_GYRO_CONFIG (0x1B) // 陀螺仪自检及测量范围，典型值：0x18(不自检，2000deg/s)
+#define MPU6050_ACCEL_CONFIG (0x1C) // 加速计自检、测量范围及高通滤波频率，典型值：0x01(不自检，2G，5Hz)
+#define MPU6050_INT_PIN_CFG (0x37) // 设置6050辅助I2C为直通模式寄存器
+#define MPU6050_ACCEL_XOUT_H (0x3B)
+#define MPU6050_GYRO_XOUT_H (0x43)
+#define MPU6050_USER_CONTROL (0x6A) // 关闭6050对辅助I2C设备的控制
+#define MPU6050_PWR_MGMT_1 (0x6B) // 电源管理，典型值：0x00(正常启用)
+#define MPU6050_WHO_AM_I (0x75) // IIC地址寄存器(默认数值0x68，只读)
+
+#define MPU6050_ACC_SAMPLE (0x10) // 加速度计量程
+// 设置为:0x00 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131.2 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x08 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.6 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x10 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x18 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+
+#define MPU6050_GYR_SAMPLE (0x18) // 陀螺仪量程
+// 设置为:0x00 陀螺仪量程为:±250 dps 获取到的陀螺仪数据除以131.2 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x08 陀螺仪量程为:±500 dps 获取到的陀螺仪数据除以65.6 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x10 陀螺仪量程为:±1000dps 获取到的陀螺仪数据除以32.8 可以转化为带物理单位的数据，单位为：°/s
+// 设置为:0x18 陀螺仪量程为:±2000dps 获取到的陀螺仪数据除以16.4 可以转化为带物理单位的数据，单位为：°/s
+
+//================================================定义 MPU6050 内部地址================================================
+
+//================================================声明 MPU6050 数据存储变量==============================================
+extern int16 mpu6050_gyro_x, mpu6050_gyro_y, mpu6050_gyro_z; // 三轴陀螺仪数据 gyro (陀螺仪)
+extern int16 mpu6050_acc_x, mpu6050_acc_y, mpu6050_acc_z; // 三轴加速度计数据 acc (accelerometer 加速度计)
+//================================================声明 MPU6050 数据存储变量==============================================
+
+//===================================================MPU6050 基础函数=================================================
+void mpu6050_get_acc (void); // 获取 MPU6050 加速度计数据
+void mpu6050_get_gyro (void); // 获取 MPU6050 陀螺仪数据
+float mpu6050_acc_transition (int16 acc_value); // 将 MPU6050 加速度计数据转换为实际物理数据
+float mpu6050_gyro_transition (int16 gyro_value); // 将 MPU6050 陀螺仪数据转换为实际物理数据
+uint8 mpu6050_init (void); // 初始化 MPU6050
+//===================================================MPU6050 基础函数=================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_mt9v03x.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_mt9v03x.c
new file mode 100644
index 0000000..e77e62e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_mt9v03x.c
@@ -0,0 +1,502 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_mt9v03x
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* TXD 查看 zf_device_mt9v03x.h 中 MT9V03X_COF_UART_TX 宏定义
+* RXD 查看 zf_device_mt9v03x.h 中 MT9V03X_COF_UART_RX 宏定义
+* PCLK 查看 zf_device_mt9v03x.h 中 MT9V03X_PCLK_PIN 宏定义
+* VSY 查看 zf_device_mt9v03x.h 中 MT9V03X_VSYNC_PIN 宏定义
+* D0-D7 查看 zf_device_mt9v03x.h 中 MT9V03X_DATA_PIN 宏定义 从该定义开始的连续八个引脚
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_interrupt.h"
+#include "zf_common_debug.h"
+#include "zf_common_fifo.h"
+#include "zf_driver_soft_iic.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_dma.h"
+#include "zf_driver_exti.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_uart.h"
+#include "zf_device_camera.h"
+#include "zf_device_config.h"
+#include "zf_device_mt9v03x.h"
+
+vuint8 mt9v03x_finish_flag = 0; // 一场图像采集完成标志位
+IFX_ALIGN(4) uint8 mt9v03x_image[MT9V03X_H][MT9V03X_W]; // 必须4字节对齐
+
+static m9v03x_type_enum mt9v03x_type;
+static uint16 mt9v03x_version = 0x00;
+
+
+int16 timeout = MT9V03X_INIT_TIMEOUT;
+
+uint8 mt9v03x_lost_flag = 1; // 图像丢失标志位
+uint8 mt9v03x_dma_int_num; // 当前DMA中断次数
+uint8 mt9v03x_dma_init_flag; // 是否需要重新初始化
+uint8 mt9v03x_link_list_num;
+
+// 需要配置到摄像头的数据 不允许在这修改参数
+static int16 mt9v03x_set_confing_buffer[MT9V03X_CONFIG_FINISH][2]=
+{
+ {MT9V03X_INIT, 0}, // 摄像头开始初始化
+
+ {MT9V03X_AUTO_EXP, MT9V03X_AUTO_EXP_DEF}, // 自动曝光设置 范围1-63 0为关闭 如果自动曝光开启 EXP_TIME命令设置的数据将会变为最大曝光时间，也就是自动曝光时间的上限
+ {MT9V03X_EXP_TIME, MT9V03X_EXP_TIME_DEF}, // 曝光时间 摄像头收到后会自动计算出最大曝光时间，如果设置过大则设置为计算出来的最大曝光值
+ {MT9V03X_FPS, MT9V03X_FPS_DEF}, // 图像帧率 摄像头收到后会自动计算出最大FPS，如果过大则设置为计算出来的最大FPS
+ {MT9V03X_SET_COL, MT9V03X_W}, // 图像列数量 范围1-752
+ {MT9V03X_SET_ROW, MT9V03X_H}, // 图像行数量 范围1-480
+ {MT9V03X_LR_OFFSET, MT9V03X_LR_OFFSET_DEF}, // 图像左右偏移量 正值 右偏移 负值 左偏移 列为188 376 752时无法设置偏移 摄像头收偏移数据后会自动计算最大偏移，如果超出则设置计算出来的最大偏移
+ {MT9V03X_UD_OFFSET, MT9V03X_UD_OFFSET_DEF}, // 图像上下偏移量 正值 上偏移 负值 下偏移 行为120 240 480时无法设置偏移 摄像头收偏移数据后会自动计算最大偏移，如果超出则设置计算出来的最大偏移
+ {MT9V03X_GAIN, MT9V03X_GAIN_DEF}, // 图像增益 范围16-64 增益可以在曝光时间固定的情况下改变图像亮暗程度
+ {MT9V03X_PCLK_MODE, MT9V03X_PCLK_MODE_DEF}, // 像素时钟模式 仅总钻风MT9V034 V2.0以及以上版本支持该命令
+};
+
+// 从摄像头内部获取到的配置数据 不允许在这修改参数
+static int16 mt9v03x_get_confing_buffer[MT9V03X_CONFIG_FINISH - 1][2]=
+{
+ {MT9V03X_AUTO_EXP, 0}, // 自动曝光设置
+ {MT9V03X_EXP_TIME, 0}, // 曝光时间
+ {MT9V03X_FPS, 0}, // 图像帧率
+ {MT9V03X_SET_COL, 0}, // 图像列数量
+ {MT9V03X_SET_ROW, 0}, // 图像行数量
+ {MT9V03X_LR_OFFSET, 0}, // 图像左右偏移量
+ {MT9V03X_UD_OFFSET, 0}, // 图像上下偏移量
+ {MT9V03X_GAIN, 0}, // 图像增益
+ {MT9V03X_PCLK_MODE, 0}, // 像素时钟模式命令 PCLK模式 < 仅总钻风 MT9V034 V1.5 以及以上版本支持该命令 >
+};
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 配置摄像头内部配置信息
+// 参数说明 buff 发送配置信息的地址
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 mt9v03x_set_config(mt9v03x_set_confing_buffer);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 mt9v03x_set_config (int16 buff[MT9V03X_CONFIG_FINISH][2])
+{
+ uint8 return_state = 1;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 loop_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ switch(mt9v03x_version)
+ {
+ case 0x0230: loop_count = MT9V03X_PCLK_MODE; break;
+ default: loop_count = MT9V03X_GAIN; break;
+ }
+ // 设置参数 具体请参看问题锦集手册
+ // 开始配置摄像头并重新初始化
+ for(; loop_count < MT9V03X_SET_DATA; loop_count --)
+ {
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = (uint8)buff[loop_count][0];
+ temp = buff[loop_count][1];
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(MT9V03X_COF_UART, uart_buffer, 4);
+
+ system_delay_ms(2);
+ }
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ if((0xff == uart_buffer[1]) || (0xff == uart_buffer[2]))
+ {
+ return_state = 0;
+ break;
+ }
+ }
+ system_delay_ms(1);
+ }while(MT9V03X_INIT_TIMEOUT > timeout_count ++);
+ // 以上部分对摄像头配置的数据全部都会保存在摄像头上51单片机的eeprom中
+ // 利用set_exposure_time函数单独配置的曝光数据不存储在eeprom中
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取摄像头内部配置信息
+// 参数说明 buff 接收配置信息的地址
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 mt9v03x_get_config(mt9v03x_get_confing_buffer);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 mt9v03x_get_config (int16 buff[MT9V03X_CONFIG_FINISH - 1][2])
+{
+ uint8 return_state = 0;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 loop_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ switch(mt9v03x_version)
+ {
+ case 0x0230: loop_count = MT9V03X_PCLK_MODE; break;
+ default: loop_count = MT9V03X_GAIN; break;
+ }
+
+ for(loop_count = loop_count - 1; loop_count >= 1; loop_count --)
+ {
+ if(mt9v03x_version < 0x0230 && buff[loop_count][0] == MT9V03X_PCLK_MODE)
+ {
+ continue;
+ }
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = MT9V03X_GET_STATUS;
+ temp = buff[loop_count][0];
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(MT9V03X_COF_UART, uart_buffer, 4);
+
+ timeout_count = 0;
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ buff[loop_count][1] = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(MT9V03X_INIT_TIMEOUT > timeout_count ++);
+ if(timeout_count > MT9V03X_INIT_TIMEOUT) // 超时
+ {
+ return_state = 1;
+ break;
+ }
+ }
+ return return_state;
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 MT9V03X摄像头串口通信回调
+// 参数说明 void
+// 返回参数 void
+// 使用示例 mt9v03x_uart_callback();
+//-------------------------------------------------------------------------------------------------------------------
+static void mt9v03x_uart_callback (void)
+{
+ uint8 data = 0;
+ uart_query_byte(MT9V03X_COF_UART, &data);
+ if(0xA5 == data)
+ {
+ fifo_clear(&camera_receiver_fifo);
+ }
+ fifo_write_element(&camera_receiver_fifo, data);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 MT9V03X摄像头场中断
+// 参数说明 void
+// 返回参数 void
+// 使用示例 mt9v03x_vsync_handler();
+//-------------------------------------------------------------------------------------------------------------------
+static void mt9v03x_vsync_handler(void)
+{
+ exti_flag_clear(MT9V03X_VSYNC_PIN);
+ mt9v03x_dma_int_num = 0;
+ if(mt9v03x_dma_init_flag )
+ {
+ mt9v03x_dma_init_flag = 0;
+ IfxDma_resetChannel(&MODULE_DMA, MT9V03X_DMA_CH);
+ mt9v03x_link_list_num = dma_init(MT9V03X_DMA_CH,
+ MT9V03X_DATA_ADD,
+ mt9v03x_image[0],
+ MT9V03X_PCLK_PIN,
+ EXTI_TRIGGER_RISING,
+ MT9V03X_IMAGE_SIZE); // 如果超频到300M 倒数第二个参数请设置为FALLING
+ dma_enable(MT9V03X_DMA_CH);
+ }
+ else
+ {
+ if(1 == mt9v03x_link_list_num)
+ {
+ dma_set_destination(MT9V03X_DMA_CH, mt9v03x_image[0]); // 没有采用链接传输模式 重新设置目的地址
+ }
+ dma_enable(MT9V03X_DMA_CH);
+ }
+ mt9v03x_lost_flag = 1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 MT9V03X摄像头DMA完成中断
+// 参数说明 void
+// 返回参数 void
+// 使用示例 mt9v03x_dma_handler();
+//-------------------------------------------------------------------------------------------------------------------
+static void mt9v03x_dma_handler(void)
+{
+ clear_dma_flag(MT9V03X_DMA_CH);
+
+ if(IfxDma_getChannelTransactionRequestLost(&MODULE_DMA, MT9V03X_DMA_CH)) // 图像错位判断
+ {
+ mt9v03x_finish_flag = 0;
+ dma_disable(MT9V03X_DMA_CH);
+ IfxDma_clearChannelTransactionRequestLost(&MODULE_DMA, MT9V03X_DMA_CH);
+ mt9v03x_dma_init_flag = 1;
+ }
+ else
+ {
+ mt9v03x_dma_int_num++;
+ if(mt9v03x_dma_int_num >= mt9v03x_link_list_num)
+ {
+ // 采集完成
+ // 一副图像从采集开始到采集结束耗时3.8MS左右(50FPS、188*120分辨率)
+ mt9v03x_dma_int_num = 0;
+ mt9v03x_lost_flag = 0;
+ mt9v03x_finish_flag = 1;
+ dma_disable(MT9V03X_DMA_CH);
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取摄像头固件版本
+// 参数说明 void
+// 返回参数 uint16 0-获取错误 N-版本号
+// 使用示例 mt9v03x_get_version(); // 调用该函数前请先初始化串口
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 mt9v03x_get_version (void)
+{
+ uint16 temp;
+ uint8 uart_buffer[4];
+ uint16 timeout_count = 0;
+ uint16 return_value = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = MT9V03X_GET_STATUS;
+ temp = MT9V03X_GET_VERSION;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(MT9V03X_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ return_value = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(MT9V03X_INIT_TIMEOUT > timeout_count ++);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 单独设置摄像头曝光时间
+// 参数说明 light 设定曝光时间
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 mt9v03x_set_exposure_time(100); // 调用该函数前请先初始化串口
+// 备注信息 设置曝光时间越大图像越亮
+// 摄像头收到后会根据分辨率及FPS计算最大曝光时间如果设置的数据过大
+// 那么摄像头将会设置这个最大值
+//-------------------------------------------------------------------------------------------------------------------
+uint8 mt9v03x_set_exposure_time (uint16 light)
+{
+ uint8 return_state = 0;
+ if(MT9V03X_UART == mt9v03x_type)
+ {
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 uart_buffer_index = 0;
+ set_camera_type(CAMERA_GRAYSCALE, mt9v03x_vsync_handler, mt9v03x_dma_handler, mt9v03x_uart_callback); // 设置连接摄像头类型
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = MT9V03X_SET_EXP_TIME;
+ temp = light;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(MT9V03X_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ temp = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(MT9V03X_INIT_TIMEOUT > timeout_count ++);
+ if((temp != light) || (MT9V03X_INIT_TIMEOUT <= timeout_count))
+ {
+ return_state = 1;
+ }
+ }
+ else
+ {
+ return_state = mt9v03x_set_exposure_time_sccb(light);
+ }
+ set_camera_type(CAMERA_GRAYSCALE, mt9v03x_vsync_handler, mt9v03x_dma_handler, NULL); // 设置连接摄像头类型
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 对摄像头内部寄存器进行写操作
+// 参数说明 addr 摄像头内部寄存器地址
+// 参数说明 data 需要写入的数据
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 mt9v03x_set_reg(addr, data); // 调用该函数前请先初始化串口
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 mt9v03x_set_reg (uint8 addr, uint16 data)
+{
+ uint8 return_state = 0;
+ if(MT9V03X_UART == mt9v03x_type)
+ {
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 uart_buffer_index = 0;
+ set_camera_type(CAMERA_GRAYSCALE, mt9v03x_vsync_handler, mt9v03x_dma_handler, mt9v03x_uart_callback); // 设置连接摄像头类型
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = MT9V03X_SET_ADDR;
+ temp = addr;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(MT9V03X_COF_UART, uart_buffer, 4);
+
+ system_delay_ms(10);
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = MT9V03X_SET_DATA;
+ temp = data;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(MT9V03X_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ temp = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(MT9V03X_INIT_TIMEOUT > timeout_count ++);
+ if((temp != data) || (MT9V03X_INIT_TIMEOUT <= timeout_count))
+ {
+ return_state = 1;
+ }
+ }
+ else
+ {
+ return_state = mt9v03x_set_reg_sccb(addr, data);
+ }
+ set_camera_type(CAMERA_GRAYSCALE, mt9v03x_vsync_handler, mt9v03x_dma_handler, NULL); // 设置连接摄像头类型
+ return return_state;
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 MT9V03X 摄像头初始化
+// 参数说明 void
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 zf_log(mt9v03x_init(), "mt9v03x init error");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 mt9v03x_init (void)
+{
+ uint8 return_state = 0;
+ soft_iic_info_struct mt9v03x_iic_struct;
+ do
+ {
+ system_delay_ms(500);
+ set_camera_type(CAMERA_GRAYSCALE, NULL, NULL, NULL); // 设置连接摄像头类型
+ // 首先尝试SCCB通讯
+ mt9v03x_type = MT9V03X_SCCB;
+ soft_iic_init(&mt9v03x_iic_struct, 0, MT9V03X_COF_IIC_DELAY, MT9V03X_COF_IIC_SCL, MT9V03X_COF_IIC_SDA);
+ if(mt9v03x_set_config_sccb(&mt9v03x_iic_struct, mt9v03x_set_confing_buffer))
+ {
+ // SCCB通讯失败，尝试串口通讯
+ mt9v03x_type = MT9V03X_UART;
+ camera_fifo_init();
+ set_camera_type(CAMERA_GRAYSCALE, NULL, NULL, mt9v03x_uart_callback); // 设置连接摄像头类型
+ uart_init (MT9V03X_COF_UART, MT9V03X_COF_BAUR, MT9V03X_COF_UART_RX, MT9V03X_COF_UART_TX); //初始换串口 配置摄像头
+ uart_rx_interrupt(MT9V03X_COF_UART, 1);
+ fifo_clear(&camera_receiver_fifo);
+ mt9v03x_version = mt9v03x_get_version(); // 获取配置的方式
+
+ if(mt9v03x_set_config(mt9v03x_set_confing_buffer))
+ {
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是通信出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "MT9V03X set config error.");
+ set_camera_type(NO_CAMERE, NULL, NULL, NULL);
+ return_state = 1;
+ break;
+ }
+
+ // 获取配置便于查看配置是否正确
+ if(mt9v03x_get_config(mt9v03x_get_confing_buffer))
+ {
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是串口通信出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "MT9V03X get config error.");
+ set_camera_type(NO_CAMERE, NULL, NULL, NULL);
+ return_state = 1;
+ break;
+ }
+ }
+ set_camera_type(CAMERA_GRAYSCALE, mt9v03x_vsync_handler, mt9v03x_dma_handler, NULL); // 设置连接摄像头类型
+ mt9v03x_link_list_num = camera_init(MT9V03X_DATA_ADD, mt9v03x_image[0], MT9V03X_IMAGE_SIZE);
+ }while(0);
+
+ return return_state;
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_mt9v03x.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_mt9v03x.h
new file mode 100644
index 0000000..d6f592b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_mt9v03x.h
@@ -0,0 +1,144 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_mt9v03x
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* TXD 查看 zf_device_mt9v03x.h 中 MT9V03X_COF_UART_TX 宏定义
+* RXD 查看 zf_device_mt9v03x.h 中 MT9V03X_COF_UART_RX 宏定义
+* PCLK 查看 zf_device_mt9v03x.h 中 MT9V03X_PCLK_PIN 宏定义
+* VSY 查看 zf_device_mt9v03x.h 中 MT9V03X_VSYNC_PIN 宏定义
+* D0-D7 查看 zf_device_mt9v03x.h 中 MT9V03X_DATA_PIN 宏定义 从该定义开始的连续八个引脚
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_mt9v03x_h_
+#define _zf_device_mt9v03x_h_
+
+#include "zf_common_typedef.h"
+#include "zf_device_type.h"
+
+//=================================================MT9V03X 驱动配置====================================================
+#define MT9V03X_COF_UART (UART_1) // 配置摄像头所使用到的串口
+#define MT9V03X_COF_BAUR (9600) // 总钻风配置串口波特率
+#define MT9V03X_COF_UART_TX (UART1_RX_P02_3) // 总钻风 UART-TX 引脚 要接在单片机 RX 上
+#define MT9V03X_COF_UART_RX (UART1_TX_P02_2) // 总钻风 UART-RX 引脚 要接在单片机 TX 上
+
+#define MT9V03X_COF_IIC_DELAY (800) // 总钻风 IIC 延时
+#define MT9V03X_COF_IIC_SCL (P02_3) // 总钻风 IIC-SCL 引脚
+#define MT9V03X_COF_IIC_SDA (P02_2) // 总钻风 IIC-SDA 引脚
+
+#define MT9V03X_DMA_CH (IfxDma_ChannelId_5)
+
+#define MT9V03X_PCLK_PIN (ERU_CH2_REQ14_P02_1) // PCLK 触发信号 TIM_ETR 引脚禁止随意修改
+
+#define MT9V03X_VSYNC_PIN (ERU_CH3_REQ6_P02_0) // 场中断引脚
+
+#define MT9V03X_DATA_PIN (P00_0) // 数据引脚 这里是 只能是 GPIOx0 或者 GPIOx8 开始 连续八个引脚例如 P00_0-P00_7
+#define MT9V03X_DATA_ADD (get_port_in_addr(MT9V03X_DATA_PIN))
+
+#define MT9V03X_INIT_TIMEOUT (0x0080) // 默认的摄像头初始化超时时间 毫秒为单位
+//=================================================MT9V03X 驱动配置====================================================
+
+//=================================================MT9V03X 参数配置====================================================
+#define MT9V03X_W (188) // 图像宽度 范围 [1-752]
+#define MT9V03X_H (120) // 图像高度 范围 [1-480]
+
+#define MT9V03X_IMAGE_SIZE (MT9V03X_W * MT9V03X_H) // 整体图像大小不能超过 65535
+
+#define MT9V03X_AUTO_EXP_DEF (0 ) // 自动曝光设置 默认不开启自动曝光设置 范围 [0-63] 0为关闭
+ // 如果自动曝光开启 EXP_TIME命令设置自动曝光时间的上限
+ // 一般情况是不需要开启自动曝光设置 如果遇到光线非常不均匀的情况可以尝试设置自动曝光，增加图像稳定性
+#define MT9V03X_EXP_TIME_DEF (200) // 曝光时间 摄像头收到后会自动计算出最大曝光时间，如果设置过大则设置为计算出来的最大曝光值
+#define MT9V03X_FPS_DEF (50 ) // 图像帧率 摄像头收到后会自动计算出最大FPS，如果过大则设置为计算出来的最大FPS
+#define MT9V03X_LR_OFFSET_DEF (0 ) // 图像左右偏移量 正值 右偏移 负值 左偏移 列为188 376 752时无法设置偏移
+ // 摄像头收偏移数据后会自动计算最大偏移，如果超出则设置计算出来的最大偏移
+#define MT9V03X_UD_OFFSET_DEF (0 ) // 图像上下偏移量 正值 上偏移 负值 下偏移 行为120 240 480时无法设置偏移
+ // 摄像头收偏移数据后会自动计算最大偏移，如果超出则设置计算出来的最大偏移
+#define MT9V03X_GAIN_DEF (32 ) // 图像增益 范围 [16-64] 增益可以在曝光时间固定的情况下改变图像亮暗程度
+#define MT9V03X_PCLK_MODE_DEF (0 ) // 像素时钟模式 范围 [0-1] 默认：0 可选参数为：[0：不输出消隐信号,1：输出消隐信号]
+ // 通常都设置为0，如果使用CH32V307的DVP接口或STM32的DCMI接口采集需要设置为1
+ // 仅总钻风 MT9V034 V1.5 以及以上版本支持该命令
+//=================================================MT9V03X 参数配置====================================================
+
+
+//==============================================定义 MT9V03X 命令枚举体==================================================
+typedef enum
+{
+ MT9V03X_INIT = 0, // 摄像头初始化命令
+ MT9V03X_AUTO_EXP, // 自动曝光命令
+ MT9V03X_EXP_TIME, // 曝光时间命令
+ MT9V03X_FPS, // 摄像头帧率命令
+ MT9V03X_SET_COL, // 图像列命令
+ MT9V03X_SET_ROW, // 图像行命令
+ MT9V03X_LR_OFFSET, // 图像左右偏移命令
+ MT9V03X_UD_OFFSET, // 图像上下偏移命令
+ MT9V03X_GAIN, // 图像偏移命令
+ MT9V03X_PCLK_MODE, // 像素时钟模式命令(仅总钻风MT9V034 V1.5以及以上版本支持该命令)
+ MT9V03X_CONFIG_FINISH, // 非命令位，主要用来占位计数
+
+ MT9V03X_COLOR_GET_WHO_AM_I = 0xEF,
+ MT9V03X_SET_EXP_TIME = 0XF0, // 单独设置曝光时间命令
+ MT9V03X_GET_STATUS, // 获取摄像头配置命令
+ MT9V03X_GET_VERSION, // 固件版本号命令
+
+ MT9V03X_SET_ADDR = 0XFE, // 寄存器地址命令
+ MT9V03X_SET_DATA // 寄存器数据命令
+}m9v03x_cmd_enum;
+
+// 摄像头接口类型枚举
+typedef enum
+{
+ MT9V03X_UART, // 通过串口配置参数
+ MT9V03X_SCCB, // 通过SCCB配置参数
+}m9v03x_type_enum;
+//==============================================定义 MT9V03X 命令枚举体==================================================
+
+//==============================================声明 MT9V03X 数据存储变量=================================================
+extern vuint8 mt9v03x_finish_flag; // 一场图像采集完成标志位
+extern uint8 mt9v03x_image[MT9V03X_H][MT9V03X_W]; // 图像数据存储数组
+//==============================================声明 MT9V03X 数据存储变量=================================================
+
+//===================================================MT9V03X 基础函数==================================================
+uint16 mt9v03x_get_version (void); // 获取摄像头固件版本
+uint8 mt9v03x_set_exposure_time (uint16 light); // 单独设置摄像头曝光时间
+uint8 mt9v03x_set_reg (uint8 addr, uint16 data); // 对摄像头内部寄存器进行写操作
+uint8 mt9v03x_init (void); // MT9V03X 摄像头初始化
+//===================================================MT9V03X 基础函数==================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_oled.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_oled.c
new file mode 100644
index 0000000..0fc0b3b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_oled.c
@@ -0,0 +1,749 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_oled
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* D0 查看 zf_device_oled.h 中 OLED_D0_PIN 宏定义
+* D1 查看 zf_device_oled.h 中 OLED_D1_PIN 宏定义
+* RES 查看 zf_device_oled.h 中 OLED_RES_PIN 宏定义
+* DC 查看 zf_device_oled.h 中 OLED_DC_PIN 宏定义
+* CS 查看 zf_device_oled.h 中 OLED_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_common_font.h"
+#include "zf_common_function.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_soft_spi.h"
+#include "zf_driver_spi.h"
+#include "zf_device_oled.h"
+
+#if OLED_USE_SOFT_SPI
+static soft_spi_info_struct oled_spi;
+#define oled_spi_write_8bit(data) (soft_spi_write_8bit(&oled_spi, (data)))
+#else
+#define oled_spi_write_8bit(data) (spi_write_8bit(OLED_SPI, (data)))
+#endif
+
+static oled_dir_enum oled_display_dir = OLED_DEFAULT_DISPLAY_DIR;
+static oled_font_size_enum oled_display_font = OLED_DEFAULT_DISPLAY_FONT;
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 写8位数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 oled_write_data(color);
+// 备注信息 内部调用 用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void oled_write_data (const uint8 data)
+{
+ OLED_DC(1);
+ oled_spi_write_8bit(data);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 写命令
+// 参数说明 cmd 命令
+// 返回参数 void
+// 使用示例 oled_write_command(0xb0 + y);
+// 备注信息 内部调用 用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void oled_write_command (const uint8 command)
+{
+ OLED_DC(0);
+ oled_spi_write_8bit(command);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED显示坐标设置
+// 参数说明 x x轴坐标设置0-127
+// 参数说明 y y轴坐标设置0-7
+// 返回参数 void
+// 使用示例 oled_set_coordinate(x, y);
+// 备注信息 内部使用用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void oled_set_coordinate (uint16 x, uint16 y)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+
+ oled_write_command(0xb0 + y);
+ oled_write_command(((x & 0xf0) >> 4) | 0x10);
+ oled_write_command((x & 0x0f) | 0x00);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED显示DEBUG信息初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 oled_debug_init();
+// 备注信息 内部使用用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void oled_debug_init (void)
+{
+ debug_output_struct info;
+ debug_output_struct_init(&info);
+
+ info.type_index = 1;
+
+ info.display_x_max = OLED_X_MAX;
+ info.display_y_max = OLED_Y_MAX;
+ switch(oled_display_font)
+ {
+ case OLED_6X8_FONT:
+ info.font_x_size = 6;
+ info.font_y_size = 1;
+ break;
+ case OLED_8X16_FONT:
+ info.font_x_size = 8;
+ info.font_y_size = 2;
+ break;
+ case OLED_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ info.output_screen = oled_show_string;
+ info.output_screen_clear = oled_clear;
+
+ debug_output_init(&info);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 清屏函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 oled_clear();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_clear (void)
+{
+ uint8 y, x;
+
+ OLED_CS(0);
+ for(y = 0; y < 8; y ++)
+ {
+ oled_write_command(0xb0 + y);
+ oled_write_command(0x01);
+ oled_write_command(0x10);
+ for(x = 0; x < OLED_X_MAX; x ++)
+ {
+ oled_write_data(0x00);
+ }
+ }
+ OLED_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 屏幕填充函数
+// 参数说明 color 填充颜色选着(0x00 or 0xff)
+// 返回参数 void
+// 使用示例 oled_full(0x00);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_full (const uint8 color)
+{
+ uint8 y, x;
+
+ OLED_CS(0);
+ for(y = 0; y < 8; y ++)
+ {
+ oled_write_command(0xb0 + y);
+ oled_write_command(0x01);
+ oled_write_command(0x10);
+ for(x = 0; x < OLED_X_MAX; x ++)
+ {
+ oled_write_data(color);
+ }
+ }
+ OLED_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示方向
+// 参数说明 dir 显示方向 参照 zf_device_oled.h 内 oled_dir_enum 枚举体定义
+// 返回参数 void
+// 使用示例 oled_set_dir(OLED_CROSSWISE);
+// 备注信息 这个函数只有在初始化屏幕之前调用才生效
+//-------------------------------------------------------------------------------------------------------------------
+void oled_set_dir (oled_dir_enum dir)
+{
+ oled_display_dir = dir;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示字体
+// 参数说明 dir 显示方向 参照 zf_device_oled.h 内 oled_font_size_enum 枚举体定义
+// 返回参数 void
+// 使用示例 oled_set_font(OLED_8x16_FONT);
+// 备注信息 字体可以随时自由设置 设置后生效 后续显示就是新的字体大小
+//-------------------------------------------------------------------------------------------------------------------
+void oled_set_font (oled_font_size_enum font)
+{
+ oled_display_font = font;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 画点函数
+// 参数说明 x x 轴坐标设置 0-127
+// 参数说明 y y 轴坐标设置 0-7
+// 参数说明 color 8 个点数据
+// 返回参数 void
+// 使用示例 oled_draw_point(0, 0, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_draw_point (uint16 x, uint16 y, const uint8 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+
+ OLED_CS(0);
+ oled_set_coordinate(x, y);
+ oled_write_command(0xb0 + y);
+ oled_write_command(((x & 0xf0) >> 4) | 0x10);
+ oled_write_command((x & 0x0f) | 0x00);
+ oled_write_data(color);
+ OLED_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示字符串
+// 参数说明 x x 轴坐标设置 0-127
+// 参数说明 y y 轴坐标设置 0-7
+// 参数说明 ch[] 字符串
+// 返回参数 void
+// 使用示例 oled_show_string(0, 0, "SEEKFREE");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_show_string (uint16 x, uint16 y, const char ch[])
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+
+ OLED_CS(0);
+ uint8 c = 0, i = 0, j = 0;
+ while (ch[j] != '\0')
+ {
+ switch(oled_display_font)
+ {
+ case OLED_6X8_FONT:
+ c = ch[j] - 32;
+ if(x > 126)
+ {
+ x = 0;
+ y ++;
+ }
+ oled_set_coordinate(x, y);
+ for(i = 0; i < 6; i ++)
+ {
+ oled_write_data(ascii_font_6x8[c][i]);
+ }
+ x += 6;
+ j ++;
+ break;
+ case OLED_8X16_FONT:
+ c = ch[j] - 32;
+ if(x > 120)
+ {
+ x = 0;
+ y ++;
+ }
+ oled_set_coordinate(x, y);
+ for(i = 0; i < 8; i ++)
+ {
+ oled_write_data(ascii_font_8x16[c][i]);
+ }
+
+ oled_set_coordinate(x, y + 1);
+ for(i = 0; i < 8; i ++)
+ {
+ oled_write_data(ascii_font_8x16[c][i + 8]);
+ }
+ x += 8;
+ j ++;
+ break;
+ case OLED_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ }
+ OLED_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示32位有符号 (去除整数部分无效的0)
+// 参数说明 x x轴坐标设置 0-127
+// 参数说明 y y轴坐标设置 0-7
+// 参数说明 dat 需要显示的变量 数据类型 int32
+// 参数说明 num 需要显示的位数 最高10位 不包含正负号
+// 返回参数 void
+// 使用示例 oled_show_int(0, 0, x, 3); // x 可以为 int32 int16 int8 类型
+// 备注信息 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void oled_show_int (uint16 x, uint16 y, const int32 dat, uint8 num)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+
+ zf_assert(num > 0);
+ zf_assert(num <= 10);
+
+ int32 dat_temp = dat;
+ int32 offset = 1;
+ char data_buffer[12];
+
+ memset(data_buffer, 0, 12);
+ memset(data_buffer, ' ', num + 1);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp %= offset;
+ }
+ func_int_to_str(data_buffer, dat_temp);
+ oled_show_string(x, y, (const char *)&data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示32位无符号 (去除整数部分无效的0)
+// 参数说明 x x 轴坐标设置 0-127
+// 参数说明 y y 轴坐标设置 0-7
+// 参数说明 dat 需要显示的变量 数据类型 uint32
+// 参数说明 num 需要显示的位数 最高10位 不包含正负号
+// 返回参数 void
+// 使用示例 oled_show_uint(0, 0, x, 3); // x 可以为 uint32 uint16 uint8 类型
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_show_uint (uint16 x,uint16 y,const uint32 dat,uint8 num)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+
+ zf_assert(num > 0);
+ zf_assert(num <= 10);
+
+ uint32 dat_temp = dat;
+ int32 offset = 1;
+ char data_buffer[12];
+ memset(data_buffer, 0, 12);
+ memset(data_buffer, ' ', num);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp %= offset;
+ }
+ func_uint_to_str(data_buffer, dat_temp);
+ oled_show_string(x, y, (const char *)&data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示浮点数 (去除整数部分无效的0)
+// 参数说明 x x 轴坐标设置 0-127
+// 参数说明 y y 轴坐标设置 0-7
+// 参数说明 dat 需要显示的变量，数据类型float或double
+// 参数说明 num 整数位显示长度 最高8位
+// 参数说明 pointnum 小数位显示长度 最高6位
+// 返回参数 void
+// 使用示例 oled_show_float(0, 0, x, 2, 3); // 显示浮点数 整数显示2位 小数显示三位
+// 备注信息 特别注意当发现小数部分显示的值与你写入的值不一样的时候，
+// 可能是由于浮点数精度丢失问题导致的，这并不是显示函数的问题，
+// 有关问题的详情，请自行百度学习 浮点数精度丢失问题。
+// 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void oled_show_float (uint16 x,uint16 y,const float dat,uint8 num,uint8 pointnum)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+
+ zf_assert(num > 0);
+ zf_assert(num <= 8);
+ zf_assert(pointnum > 0);
+ zf_assert(pointnum <= 6);
+
+ float dat_temp = dat;
+ float offset = 1.0;
+ char data_buffer[17];
+ memset(data_buffer, 0, 17);
+ memset(data_buffer, ' ', num + pointnum + 2);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ {
+ offset *= 10;
+ }
+ dat_temp = dat_temp - ((int)dat_temp / (int)offset) * offset;
+ }
+ func_float_to_str(data_buffer, dat_temp, pointnum);
+ oled_show_string(x, y, data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示二值图像 数据每八个点组成一个字节数据
+// 参数说明 x x 轴坐标设置 0-127
+// 参数说明 y y 轴坐标设置 0-7
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, 128]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, 64]
+// 返回参数 void
+// 使用示例 oled_show_binary_image(0, 0, ov7725_image_binary[0], OV7725_W, OV7725_H, OV7725_W, OV7725_H);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_show_binary_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0, z = 0;
+ uint8 dat;
+ uint32 width_index = 0, height_index = 0;
+
+ OLED_CS(0);
+ dis_height = dis_height - dis_height % 8;
+ dis_width = dis_width - dis_width % 8;
+ for(j = 0; j < dis_height; j += 8)
+ {
+ oled_set_coordinate(x + 0, (uint16)(y + j / 8));
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i += 8)
+ {
+ width_index = i * width / dis_width / 8;
+ for(z = 0; z < 8; z ++)
+ {
+ dat = 0;
+ if(*(image + height_index * width / 8 + width_index + width / 8 * 0) & (0x80 >> z))
+ {
+ dat |= 0x01;
+ }
+ if(*(image + height_index * width / 8 + width_index + width / 8 * 1) & (0x80 >> z))
+ {
+ dat |= 0x02;
+ }
+ if(*(image + height_index * width / 8 + width_index + width / 8 * 2) & (0x80 >> z))
+ {
+ dat |= 0x04;
+ }
+ if(*(image + height_index * width / 8 + width_index + width / 8 * 3) & (0x80 >> z))
+ {
+ dat |= 0x08;
+ }
+ if(*(image + height_index * width / 8 + width_index + width / 8 * 4) & (0x80 >> z))
+ {
+ dat |= 0x10;
+ }
+ if(*(image + height_index * width / 8 + width_index + width / 8 * 5) & (0x80 >> z))
+ {
+ dat |= 0x20;
+ }
+ if(*(image + height_index * width / 8 + width_index + width / 8 * 6) & (0x80 >> z))
+ {
+ dat |= 0x40;
+ }
+ if(*(image + height_index * width / 8 + width_index + width / 8 * 7) & (0x80 >> z))
+ {
+ dat |= 0x80;
+ }
+ oled_write_data(dat);
+ }
+ }
+ }
+ OLED_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示 8bit 灰度图像 带二值化阈值
+// 参数说明 x x 轴坐标设置 0-127
+// 参数说明 y y 轴坐标设置 0-7
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, 128]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, 64]
+// 参数说明 threshold 二值化显示阈值 0-不开启二值化
+// 返回参数 void
+// 使用示例 oled_show_gray_image(0, 0, mt9v03x_image[0], width, height, 128, 64, x);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_show_gray_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 threshold)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+ zf_assert(image != NULL);
+
+ int16 i, j;
+ uint8 dat;
+ uint32 width_index = 0, height_index = 0;
+
+ OLED_CS(0);
+ dis_height = dis_height - dis_height % 8;
+ for(j = 0; j < dis_height; j += 8)
+ {
+ oled_set_coordinate(x + 0, y + j / 8);
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ dat = 0;
+ if(*(image + height_index * width + width_index + width * 0) > threshold)
+ {
+ dat |= 0x01;
+ }
+ if(*(image + height_index * width + width_index + width * 1) > threshold)
+ {
+ dat |= 0x02;
+ }
+ if(*(image + height_index * width + width_index + width * 2) > threshold)
+ {
+ dat |= 0x04;
+ }
+ if(*(image + height_index * width + width_index + width * 3) > threshold)
+ {
+ dat |= 0x08;
+ }
+ if(*(image + height_index * width + width_index + width * 4) > threshold)
+ {
+ dat |= 0x10;
+ }
+ if(*(image + height_index * width + width_index + width * 5) > threshold)
+ {
+ dat |= 0x20;
+ }
+ if(*(image + height_index * width + width_index + width * 6) > threshold)
+ {
+ dat |= 0x40;
+ }
+ if(*(image + height_index * width + width_index + width * 7) > threshold)
+ {
+ dat |= 0x80;
+ }
+ oled_write_data(dat);
+ }
+ }
+ OLED_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示波形
+// 参数说明 x x 轴坐标设置 0-127
+// 参数说明 y y 轴坐标设置 0-7
+// 参数说明 *wave 波形数组指针
+// 参数说明 width 波形实际宽度
+// 参数说明 value_max 波形实际最大值
+// 参数说明 dis_width 波形显示宽度 参数范围 [0, 128]
+// 参数说明 dis_value_max 波形显示最大值 参数范围 [0, 64]
+// 返回参数 void
+// 使用示例 oled_show_wave(0, 0, data, 128, 64, 128, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_show_wave (uint16 x, uint16 y, const uint16 *wave, uint16 width, uint16 value_max, uint16 dis_width, uint16 dis_value_max)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+ zf_assert(wave != NULL);
+
+ uint32 i = 0;
+ uint32 width_index = 0, value_max_index = 0;
+ uint8 dis_h = 0;
+
+ uint32 x_temp = 0;
+ uint32 y_temp = 0;
+
+ OLED_CS(0);
+ for(y_temp = 0; y_temp < dis_value_max; y_temp += 8)
+ {
+ oled_set_coordinate(x + 0, (uint16)(y + y_temp / 8));
+ for(x_temp = 0; x_temp < dis_width; x_temp ++)
+ oled_write_data(0x00);
+ }
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ value_max_index = *(wave + width_index) * (dis_value_max - 1) / value_max;
+
+ dis_h = (uint8)((dis_value_max - 1) - value_max_index);
+ oled_set_coordinate((uint16)(i + x), dis_h / 8 + y);
+ dis_h = (0x01 << dis_h % 8);
+ oled_write_data(dis_h);
+ }
+ OLED_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 汉字显示
+// 参数说明 x 横坐标 0-127
+// 参数说明 y 纵坐标 0-7
+// 参数说明 size 取模的时候设置的汉字字体大小，也就是一个汉字占用的点阵长宽为多少个点，取模的时候需要长宽是一样的。
+// 参数说明 *chinese_buffer 需要显示的汉字数组
+// 参数说明 number 需要显示多少位
+// 返回参数 void
+// 使用示例 oled_show_chinese(0, 6, 16, (const uint8 *)oled_16x16_chinese, 4);
+// 备注信息 使用PCtoLCD2002软件取模 阴码、逐行式、顺向 16*16
+//-------------------------------------------------------------------------------------------------------------------
+void oled_show_chinese (uint16 x, uint16 y, uint8 size, const uint8 *chinese_buffer, uint8 number)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x < 128);
+ zf_assert(y < 8);
+ zf_assert(chinese_buffer != NULL);
+
+ int16 i, j, k;
+
+ OLED_CS(0);
+ for(i = 0; i < number; i ++)
+ {
+ for(j = 0; j < (size / 8); j ++)
+ {
+ oled_set_coordinate(x + i * size, y + j);
+ for(k = 0; k < 16; k ++)
+ {
+ oled_write_data(*chinese_buffer);
+ chinese_buffer ++;
+ }
+ }
+ }
+ OLED_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED初始化函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 oled_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void oled_init (void)
+{
+#if OLED_USE_SOFT_SPI
+ soft_spi_init(&oled_spi, 0, OLED_SOFT_SPI_DELAY, OLED_D0_PIN, OLED_D1_PIN, SOFT_SPI_PIN_NULL, SOFT_SPI_PIN_NULL);
+#else
+ spi_init(OLED_SPI, SPI_MODE0, OLED_SPI_SPEED, OLED_D0_PIN, OLED_D1_PIN, OLED_D1_PIN_IN, SPI_CS_NULL);
+#endif
+ gpio_init(OLED_RES_PIN, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+ gpio_init(OLED_DC_PIN , GPO, GPIO_HIGH, GPO_PUSH_PULL);
+ gpio_init(OLED_CS_PIN , GPO, GPIO_HIGH, GPO_PUSH_PULL);
+
+ oled_set_dir(oled_display_dir);
+ oled_debug_init();
+
+ OLED_CS(0);
+ OLED_RES(0);
+ system_delay_ms(50);
+ OLED_RES(1);
+
+ oled_write_command(0xae); // --turn off oled panel
+ oled_write_command(0x00); // ---set low column address
+ oled_write_command(0x10); // ---set high column address
+ oled_write_command(0x40); // --set start line address Set Mapping RAM Display Start Line (0x00~0x3F)
+ oled_write_command(0x81); // --set contrast control register
+ oled_write_command(OLED_BRIGHTNESS); // Set SEG Output Current Brightness
+
+ if (oled_display_dir == OLED_CROSSWISE)
+ {
+ oled_write_command(0xa1); // --Set SEG/Column Mapping 0xa0左右反置 0xa1正常
+ oled_write_command(0xc8); // Set COM/Row Scan Direction 0xc0上下反置 0xc8正常
+ }
+ else
+ {
+ oled_write_command(0xa0); // --Set SEG/Column Mapping 0xa0左右反置 0xa1正常
+ oled_write_command(0xc0); // Set COM/Row Scan Direction 0xc0上下反置 0xc8正常
+ }
+
+ oled_write_command(0xa6); // --set normal display
+ oled_write_command(0xa8); // --set multiplex ratio(1 to 64)
+ oled_write_command(0x3f); // --1/64 duty
+ oled_write_command(0xd3); // -set display offset Shift Mapping RAM Counter (0x00~0x3F)
+ oled_write_command(0x00); // -not offset
+ oled_write_command(0xd5); // --set display clock divide ratio/oscillator frequency
+ oled_write_command(0x80); // --set divide ratio, Set Clock as 100 Frames/Sec
+ oled_write_command(0xd9); // --set pre-charge period
+ oled_write_command(0xf1); // Set Pre-Charge as 15 Clocks & Discharge as 1 Clock
+ oled_write_command(0xda); // --set com pins hardware configuration
+ oled_write_command(0x12);
+ oled_write_command(0xdb); // --set vcomh
+ oled_write_command(0x40); // Set VCOM Deselect Level
+ oled_write_command(0x20); // -Set Page Addressing Mode (0x00/0x01/0x02)
+ oled_write_command(0x02); //
+ oled_write_command(0x8d); // --set Charge Pump enable/disable
+ oled_write_command(0x14); // --set(0x10) disable
+ oled_write_command(0xa4); // Disable Entire Display On (0xa4/0xa5)
+ oled_write_command(0xa6); // Disable Inverse Display On (0xa6/a7)
+ oled_write_command(0xaf); // --turn on oled panel
+ OLED_CS(1);
+
+ oled_clear(); // 初始清屏
+ oled_set_coordinate(0, 0);
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_oled.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_oled.h
new file mode 100644
index 0000000..e164bff
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_oled.h
@@ -0,0 +1,161 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_oled
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* D0 查看 zf_device_oled.h 中 OLED_D0_PIN 宏定义
+* D1 查看 zf_device_oled.h 中 OLED_D1_PIN 宏定义
+* RES 查看 zf_device_oled.h 中 OLED_RES_PIN 宏定义
+* DC 查看 zf_device_oled.h 中 OLED_DC_PIN 宏定义
+* CS 查看 zf_device_oled.h 中 OLED_CS_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_oled_h_
+#define _zf_device_oled_h_
+
+#include "zf_device_type.h"
+
+#define OLED_USE_SOFT_SPI (0 ) // 默认使用硬件 SPI 方式驱动 建议使用硬件 SPI 方式驱动
+#if OLED_USE_SOFT_SPI // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 SPI 驱动====================================================
+#define OLED_SOFT_SPI_DELAY (0 ) // 软件 SPI 的时钟延时周期 数值越小 SPI 通信速率越快
+#define OLED_D0_PIN (P15_3) // 软件 SPI SCK 引脚
+#define OLED_D1_PIN (P15_5) // 软件 SPI MOSI 引脚
+//====================================================软件 SPI 驱动====================================================
+#else
+//====================================================硬件 SPI 驱动====================================================
+#define OLED_SPI_SPEED (30*1000*1000) // 硬件 SPI 速率
+#define OLED_SPI (SPI_2) // 硬件 SPI 号
+#define OLED_D0_PIN (SPI2_SCLK_P15_3 ) // 硬件 SPI SCK 引脚
+#define OLED_D1_PIN (SPI2_MOSI_P15_5) // 硬件 SPI MOSI 引脚
+#define OLED_D1_PIN_IN (SPI2_MISO_P15_4) // 硬件 SPI MISO 引脚 OLED没有MISO引脚，但是这里任然需要定义，在spi的初始化时需要使用
+//====================================================硬件 SPI 驱动====================================================
+#endif
+
+
+#define OLED_RES_PIN (P15_1) // 液晶复位引脚定义
+#define OLED_DC_PIN (P15_0 ) // 液晶命令位引脚定义
+#define OLED_CS_PIN (P15_2 ) // CS 片选引脚
+
+#define OLED_RES(x) ((x) ? (gpio_high(OLED_RES_PIN)) : (gpio_low(OLED_RES_PIN)))
+#define OLED_DC(x) ((x) ? (gpio_high(OLED_DC_PIN)) : (gpio_low(OLED_DC_PIN)))
+#define OLED_CS(x) ((x) ? (gpio_high(OLED_CS_PIN)) : (gpio_low(OLED_CS_PIN)))
+
+#define OLED_BRIGHTNESS (0x7f) // 设置OLED亮度 越大越亮 范围0-0XFF
+#define OLED_DEFAULT_DISPLAY_DIR (OLED_CROSSWISE) // 默认的显示方向
+#define OLED_DEFAULT_DISPLAY_FONT (OLED_6X8_FONT ) // 默认的字体模式
+#define OLED_X_MAX (128)
+#define OLED_Y_MAX (64 )
+
+//=================================================定义 OLED 参数结构体===============================================
+typedef enum
+{
+ OLED_CROSSWISE = 0, // 横屏模式
+ OLED_CROSSWISE_180 = 1, // 横屏模式 旋转180
+}oled_dir_enum;
+
+typedef enum
+{
+ OLED_6X8_FONT = 0, // 6x8 字体
+ OLED_8X16_FONT = 1, // 8x16 字体
+ OLED_16X16_FONT = 2, // 16x16 字体 目前不支持
+}oled_font_size_enum;
+//=================================================定义 OLED 参数结构体===============================================
+
+//===================================================OLED 基础函数==================================================
+void oled_clear (void);
+void oled_full (const uint8 color);
+void oled_set_dir (oled_dir_enum dir);
+void oled_set_font (oled_font_size_enum font);
+void oled_draw_point (uint16 x, uint16 y, const uint8 color);
+
+void oled_show_string (uint16 x, uint16 y, const char ch[]);
+void oled_show_int (uint16 x, uint16 y, const int32 dat, uint8 num);
+void oled_show_uint (uint16 x, uint16 y, const uint32 dat, uint8 num);
+void oled_show_float (uint16 x, uint16 y, const float dat, uint8 num, uint8 pointnum);
+
+void oled_show_binary_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height);
+void oled_show_gray_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 threshold);
+
+void oled_show_wave (uint16 x, uint16 y, const uint16 *image, uint16 width, uint16 value_max, uint16 dis_width, uint16 dis_value_max);
+void oled_show_chinese (uint16 x, uint16 y, uint8 size, const uint8 *chinese_buffer, uint8 number);
+void oled_init (void);
+//===================================================OLED 基础函数==================================================
+
+//===================================================OLED 扩展函数==================================================
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示小钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 oled_displayimage7725(ov7725_image_binary[0], OV7725_W, OV7725_H);
+// 备注信息 拓展的一键显示函数，默认缩放至64x128显示
+//-------------------------------------------------------------------------------------------------------------------
+#define oled_displayimage7725(p,width,height) (oled_show_binary_image(0, 0, (p), (width), (height), 128, 64))
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示总钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 x 对比度（OLED屏幕无法显示灰度，必须二值化）
+// 返回参数 void
+// 使用示例 oled_displayimage03x(mt9v03x_image[0], MT9V03X_W, MT9V03X_H, 100);
+// 备注信息 拓展的一键显示函数，默认缩放至64x128显示
+//-------------------------------------------------------------------------------------------------------------------
+#define oled_displayimage03x(p,width,height,x) (oled_show_gray_image(0, 0, (p), (width), (height), 128, 64, (x)))
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OLED 显示总钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像缩放宽度
+// 参数说明 dis_height 图像缩放高度
+// 参数说明 x 对比度（OLED屏幕无法显示灰度，必须二值化）
+// 返回参数 void
+// 使用示例 oled_displayimage03x_zoom(mt9v03x_image[0], 78, 50, 100);
+// 备注信息 拓展的一键显示函数，用户可以自定义缩放后显示的图像大小
+//-------------------------------------------------------------------------------------------------------------------
+#define oled_displayimage03x_zoom(p,width,height,dis_width,dis_height,x) (oled_show_gray_image(0, 0, (p), (width), (height), (dis_width,) (dis_height), (x)))
+
+//===================================================OLED 扩展函数==================================================
+
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_ov7725.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_ov7725.c
new file mode 100644
index 0000000..9e07da1
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_ov7725.c
@@ -0,0 +1,544 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_ov7725
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* TXD/SCL 查看 zf_device_ov7725.h 中 OV7725_COF_UART_TX 或 OV7725_COF_IIC_SCL 宏定义
+* RXD/SDA 查看 zf_device_ov7725.h 中 OV7725_COF_UART_RX 或 OV7725_COF_IIC_SDA 宏定义
+* PCLK 查看 zf_device_ov7725.h 中 OV7725_PCLK_PIN 宏定义
+* VSY 查看 zf_device_ov7725.h 中 OV7725_VSYNC_PIN 宏定义
+* D0-D7 查看 zf_device_ov7725.h 中 OV7725_DATA_PIN 宏定义 从该定义开始的连续八个引脚
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_interrupt.h"
+#include "zf_common_debug.h"
+#include "zf_common_fifo.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_dma.h"
+#include "zf_driver_exti.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_soft_iic.h"
+#include "zf_driver_uart.h"
+#include "zf_device_camera.h"
+#include "zf_device_type.h"
+#include "zf_device_ov7725.h"
+
+vuint8 ov7725_finish_flag = 0;
+uint8 ov7725_image_binary [OV7725_H][OV7725_W / 8]; // 图像保存数组
+
+uint8 ov7725_uart_dma_init_flag; // 重新初始化DMA的标志位
+uint8 ov7725_dma_int_num = 0;
+uint8 ov7725_lost_flag = 1;
+uint8 ov7725_link_list_num = 0;
+// 需要配置到摄像头的数据 不允许在这修改参数
+static uint16 ov7725_set_confing_buffer [OV7725_CONFIG_FINISH][2]=
+{
+ {OV7725_INIT, 0}, // 初始化命令
+
+ {OV7725_RESERVE, 0}, // 保留
+ {OV7725_CONTRAST, OV7725_CONTRAST_DEF}, // 阈值设置
+ {OV7725_FPS, OV7725_FPS_DEF}, // 帧率
+ {OV7725_COL, OV7725_W}, // 图像宽度
+ {OV7725_ROW, OV7725_H} // 图像高度
+};
+
+// 从摄像头内部获取到的配置数据 不允许在这修改参数
+static uint16 ov7725_get_confing_buffer [OV7725_CONFIG_FINISH - 1][2]=
+{
+ {OV7725_RESERVE, 0}, // 保留
+ {OV7725_CONTRAST, 0}, // 阈值设置
+ {OV7725_FPS, 0}, // 帧率
+ {OV7725_COL, 0}, // 图像宽度
+ {OV7725_ROW, 0} // 图像高度
+};
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 配置摄像头内部配置信息
+// 参数说明 buff 发送配置信息的地址
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 if(ov7725_set_config(ov7725_set_confing_buffer)){}
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 ov7725_set_config (uint16 buff[OV7725_CONFIG_FINISH][2])
+{
+ uint8 return_state = 1;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 loop_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ for(loop_count = OV7725_ROW; loop_count < OV7725_SET_DATA; loop_count --)
+ {
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = (uint8)buff[loop_count][0];
+ temp = buff[loop_count][1];
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+
+ uart_write_buffer(OV7725_COF_UART, uart_buffer, 4);
+ system_delay_ms(10);
+ }
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ if((0xff == uart_buffer[1]) || (0xff == uart_buffer[2]))
+ {
+ return_state = 0;
+ break;
+ }
+ }
+ system_delay_ms(1);
+ }while(OV7725_INIT_TIMEOUT > timeout_count ++);
+
+ // 以上部分对摄像头配置的数据全部都会保存在摄像头上51单片机的eeprom中
+ // 利用set_exposure_time函数单独配置的曝光数据不存储在eeprom中
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取摄像头内部配置信息
+// 参数说明 buff 接收配置信息的地址
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 if(ov7725_get_config(ov7725_get_confing_buffer)){}
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 ov7725_get_config (uint16 buff[OV7725_CONFIG_FINISH - 1][2])
+{
+ uint8 return_state = 0;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 loop_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ for(loop_count = OV7725_ROW - 1; loop_count >= 1; loop_count --)
+ {
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = OV7725_GET_STATUS;
+ temp = buff[loop_count][0];
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+
+ uart_write_buffer(OV7725_COF_UART, uart_buffer, 4);
+
+ system_delay_ms(10);
+
+ timeout_count = 0;
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ buff[loop_count][1] = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(OV7725_INIT_TIMEOUT > timeout_count ++);
+ if(timeout_count > OV7725_INIT_TIMEOUT) // 超时
+ {
+ return_state = 1;
+ break;
+ }
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 小钻风摄像头内部寄存器初始化
+// 参数说明 void
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 if(ov7725_iic_init()){}
+// 备注信息 内部使用 用户无需调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 ov7725_iic_init (void)
+{
+ soft_iic_info_struct ov7725_iic_struct;
+ uint8 ov7725_idcode = 0;
+ uint8 return_state = 0;
+
+ uart_rx_interrupt(OV7725_COF_UART, 0);
+
+ soft_iic_init(&ov7725_iic_struct, OV7725_DEV_ADD, OV7725_COF_IIC_DELAY, OV7725_COF_IIC_SCL, OV7725_COF_IIC_SDA);
+
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_COM7, 0x80); // 复位摄像头
+ system_delay_ms(50);
+
+ do
+ {
+ ov7725_idcode = soft_iic_sccb_read_register(&ov7725_iic_struct, OV7725_VER);
+ if( ov7725_idcode != OV7725_ID )
+ {
+ return_state = 1; // 校验摄像头ID号
+ break;
+ }
+
+ // ID号确认无误 然后配置寄存器
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_COM4 , 0xC1);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_CLKRC , 0x01);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_COM2 , 0x03);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_COM3 , 0xD0);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_COM7 , 0x40);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_COM8 , 0xCE); // 0xCE:关闭自动曝光 0xCF：开启自动曝光
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_HSTART , 0x3F);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_HSIZE , 0x50);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_VSTRT , 0x03);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_VSIZE , 0x78);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_HREF , 0x00);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_SCAL0 , 0x0A);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_AWB_Ctrl0 , 0xE0);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_DSPAuto , 0xff);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_DSP_Ctrl2 , 0x0C);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_DSP_Ctrl3 , 0x00);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_DSP_Ctrl4 , 0x00);
+
+ if(OV7725_W == 80)
+ {
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_HOutSize, 0x14);
+ }
+ else if(OV7725_W == 160)
+ {
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_HOutSize, 0x28);
+ }
+ else if(OV7725_W == 240)
+ {
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_HOutSize, 0x3c);
+ }
+ else if(OV7725_W == 320)
+ {
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_HOutSize, 0x50);
+ }
+
+ if(OV7725_H == 60)
+ {
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_VOutSize, 0x1E);
+ }
+ else if(OV7725_H == 120)
+ {
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_VOutSize, 0x3c);
+ }
+ else if(OV7725_H == 180)
+ {
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_VOutSize, 0x5a);
+ }
+ else if(OV7725_H == 240)
+ {
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_VOutSize, 0x78);
+ }
+
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_REG28 , 0x01);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_EXHCH , 0x10);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_EXHCL , 0x1F);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM1 , 0x0c);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM2 , 0x16);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM3 , 0x2a);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM4 , 0x4e);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM5 , 0x61);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM6 , 0x6f);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM7 , 0x7b);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM8 , 0x86);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM9 , 0x8e);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM10 , 0x97);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM11 , 0xa4);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM12 , 0xaf);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM13 , 0xc5);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM14 , 0xd7);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_GAM15 , 0xe8);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_SLOP , 0x20);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_LC_RADI , 0x00);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_LC_COEF , 0x13);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_LC_XC , 0x08);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_LC_COEFB , 0x14);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_LC_COEFR , 0x17);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_LC_CTR , 0x05);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_BDBase , 0x99);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_BDMStep , 0x03);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_SDE , 0x04);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_BRIGHT , 0x00);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_CNST , 0x40);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_SIGN , 0x06);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_UVADJ0 , 0x11);
+ soft_iic_sccb_write_register(&ov7725_iic_struct, OV7725_UVADJ1 , 0x02);
+ }while(0);
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 小钻风摄像头串口通信回调
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ov7725_uart_callback();
+//-------------------------------------------------------------------------------------------------------------------
+static void ov7725_uart_callback (void)
+{
+ uint8 data = 0;
+ uart_query_byte(OV7725_COF_UART, &data);
+ if(0xA5 == data)
+ {
+ fifo_clear(&camera_receiver_fifo);
+ }
+ fifo_write_element(&camera_receiver_fifo, data);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 小钻风摄像头场中断
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ov7725_vsync_handler();
+//-------------------------------------------------------------------------------------------------------------------
+static void ov7725_vsync_handler(void)
+{
+ exti_flag_clear(OV7725_VSYNC_PIN);
+ ov7725_dma_int_num = 0;
+ if((ov7725_uart_dma_init_flag || ov7725_lost_flag) && camera_type == CAMERA_BIN_UART)
+ {
+ ov7725_uart_dma_init_flag = 0;
+ IfxDma_resetChannel(&MODULE_DMA, OV7725_DMA_CH);
+ ov7725_link_list_num = dma_init(OV7725_DMA_CH,
+ OV7725_DATA_ADD,
+ ov7725_image_binary[0],
+ OV7725_PCLK_PIN,
+ EXTI_TRIGGER_RISING,
+ OV7725_IMAGE_SIZE);
+ dma_enable(OV7725_DMA_CH);
+ }
+ else
+ {
+ if(ov7725_link_list_num == 1)
+ {
+ dma_set_destination(OV7725_DMA_CH, ov7725_image_binary[0]);
+ }
+ dma_enable(OV7725_DMA_CH);
+ }
+ ov7725_lost_flag = 1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 小钻风摄像头DMA完成中断
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ov7725_dma_handler();
+//-------------------------------------------------------------------------------------------------------------------
+static void ov7725_dma_handler(void)
+{
+ clear_dma_flag(OV7725_DMA_CH);
+ if(IfxDma_getChannelTransactionRequestLost(&MODULE_DMA, OV7725_DMA_CH))
+ {//图像有错位
+ ov7725_finish_flag = 0;
+ dma_disable(OV7725_DMA_CH);
+ IfxDma_clearChannelTransactionRequestLost(&MODULE_DMA, OV7725_DMA_CH);
+ ov7725_uart_dma_init_flag = 1;
+ }
+ else
+ {
+ ov7725_dma_int_num++;
+ if(ov7725_dma_int_num >= ov7725_link_list_num)
+ {
+ ov7725_dma_int_num = 0;
+ ov7725_lost_flag = 0;
+ ov7725_finish_flag = 1;
+ dma_disable(OV7725_DMA_CH);
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取摄像头固件 ID
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ov7725_uart_get_id(); // 调用该函数前请先初始化串口
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 ov7725_uart_get_id (void)
+{
+ uint16 temp;
+ uint8 uart_buffer[4];
+ uint16 timeout_count = 0;
+ uint16 return_value = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = OV7725_GET_WHO_AM_I;
+ temp = 0;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+
+ uart_write_buffer(OV7725_COF_UART, uart_buffer, 4);
+
+ temp = 0;
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ return_value = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(OV7725_INIT_TIMEOUT > timeout_count ++);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取摄像头固件版本
+// 参数说明 void
+// 返回参数 void
+// 使用示例 ov7725_get_version(); // 调用该函数前请先初始化串口
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 ov7725_get_version (void)
+{
+ uint16 temp;
+ uint8 uart_buffer[4];
+ uint16 timeout_count = 0;
+ uint16 return_value = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = OV7725_GET_STATUS;
+ temp = OV7725_GET_VERSION;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+
+ uart_write_buffer(OV7725_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ return_value = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(OV7725_INIT_TIMEOUT > timeout_count ++);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 OV7725 摄像头初始化
+// 参数说明 NULL
+// 返回参数 void
+// 使用示例 ov7725_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 ov7725_init (void)
+{
+ uint8 num = 0;
+ uint8 return_state = 0;
+
+ gpio_init(OV7725_VSYNC_PORT_PIN, GPI, GPIO_LOW, GPI_FLOATING_IN);
+ while(!num)
+ {
+ num = gpio_get_level(OV7725_VSYNC_PORT_PIN);
+ system_delay_ms(1);
+ }
+
+
+ if(0 == return_state)
+ {
+ uart_init(OV7725_COF_UART, OV7725_COF_BAUR, OV7725_COF_UART_RX, OV7725_COF_UART_TX);
+ uart_rx_interrupt(OV7725_COF_UART, 1);
+ system_delay_ms(200);
+
+ set_camera_type(CAMERA_BIN_UART, ov7725_vsync_handler, ov7725_dma_handler, ov7725_uart_callback); // 设置连接摄像头类型
+ camera_fifo_init();
+ do
+ {
+ // 获取所有参数
+ if(ov7725_get_config(ov7725_get_confing_buffer))
+ {
+ set_camera_type(CAMERA_BIN_IIC, ov7725_vsync_handler, ov7725_dma_handler, ov7725_uart_callback); // 设置连接摄像头类型
+ if(ov7725_iic_init())
+ {
+ set_camera_type(NO_CAMERE, NULL, NULL, NULL);
+ return_state = 1;
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是 IIC 出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "ov7725 set config error.");
+ break;
+ }
+ }
+ else
+ {
+ // 设置所有参数
+ if(ov7725_set_config(ov7725_set_confing_buffer))
+ {
+ set_camera_type(NO_CAMERE, NULL, NULL, NULL);
+ return_state = 1;
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是串口通信出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "ov7725 set config error.");
+ break;
+ }
+
+ // 获取所有参数
+ if(ov7725_get_config(ov7725_get_confing_buffer))
+ {
+ set_camera_type(NO_CAMERE, NULL, NULL, NULL);
+ return_state = 1;
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是串口通信出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "ov7725 set config error.");
+ break;
+ }
+ }
+ ov7725_link_list_num = camera_init(OV7725_DATA_ADD, ov7725_image_binary[0], OV7725_IMAGE_SIZE);
+ }while(0);
+ }
+
+ return return_state;
+}
+
+
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_ov7725.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_ov7725.h
new file mode 100644
index 0000000..d424e1b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_ov7725.h
@@ -0,0 +1,272 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_ov7725
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* TXD/SCL 查看 zf_device_ov7725.h 中 OV7725_COF_UART_TX 或 OV7725_COF_IIC_SCL 宏定义
+* RXD/SDA 查看 zf_device_ov7725.h 中 OV7725_COF_UART_RX 或 OV7725_COF_IIC_SDA 宏定义
+* PCLK 查看 zf_device_ov7725.h 中 OV7725_PCLK_PIN 宏定义
+* VSY 查看 zf_device_ov7725.h 中 OV7725_VSYNC_PIN 宏定义
+* D0-D7 查看 zf_device_ov7725.h 中 OV7725_DATA_PIN 宏定义 从该定义开始的连续八个引脚
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_ov7725_h_
+#define _zf_device_ov7725_h_
+
+#include "zf_device_type.h"
+
+//=================================================OV7725 驱动配置====================================================
+#define OV7725_COF_UART (UART_1) // 小钻风配置串口
+#define OV7725_COF_BAUR (9600) // 小钻风配置串口波特率
+#define OV7725_COF_UART_TX (UART1_RX_P02_3) // 小钻风 UART-TX 引脚 要接在单片机 RX 上
+#define OV7725_COF_UART_RX (UART1_TX_P02_2) // 小钻风 UART-RX 引脚 要接在单片机 TX 上
+
+#define OV7725_COF_IIC_DELAY (640 ) // 小钻风 IIC 延时
+#define OV7725_COF_IIC_SCL (P02_3) // 小钻风 IIC-SCL 引脚
+#define OV7725_COF_IIC_SDA (P02_2) // 小钻风 IIC-SDA 引脚
+
+#define OV7725_DMA_CH (IfxDma_ChannelId_5) // ERU触发DMA通道禁止随意修改
+
+#define OV7725_PCLK_PIN (ERU_CH2_REQ14_P02_1) // GPIO触发TIM引脚禁止随意修改
+
+#define OV7725_VSYNC_PIN (ERU_CH3_REQ6_P02_0 ) // 场中断引脚
+#define OV7725_VSYNC_PORT_PIN (P02_0 ) // 场中断引脚
+
+#define OV7725_DATA_PIN (P00_0 ) // 数据引脚 这里是 只能是 GPIOx0 或者 GPIOx8 开始 连续八个引脚例如 F0-F7
+#define OV7725_DATA_ADD get_port_in_addr(OV7725_DATA_PIN)
+
+#define OV7725_INIT_TIMEOUT (0x0080) // 默认的摄像头初始化超时时间 毫秒为单位
+//=================================================OV7725 驱动配置====================================================
+
+//=================================================OV7725 参数配置====================================================
+#define OV7725_W (160) // 图像宽度 80/160/240/320
+#define OV7725_H (120) // 图像高度 60/120/180/240
+#define OV7725_IMAGE_SIZE (OV7725_W * OV7725_H / 8) // 整体图像大小 OV7725_IMAGE_SIZE 不能超过 65535
+
+#define OV7725_CONTRAST_DEF (0x30) // 阈值设置 摄像头二值化阈值 过大和过小的数值会被摄像头自动修正
+#define OV7725_FPS_DEF (50 ) // 帧率设置 最高 150 帧 但最小分辨率才能达到最高帧率
+//=================================================OV7725 参数配置====================================================
+
+//==========================================IIC 版本小钻风寄存器 本部分不允许用户更改============================================
+#define OV7725_ID (0x21) // 摄像头ID号
+#define OV7725_GAIN (0x00) // 以下为摄像头寄存器
+#define OV7725_BLUE (0x01)
+#define OV7725_RED (0x02)
+#define OV7725_GREEN (0x03)
+#define OV7725_BAVG (0x05)
+#define OV7725_GAVG (0x06)
+#define OV7725_RAVG (0x07)
+#define OV7725_AECH (0x08)
+#define OV7725_COM2 (0x09)
+#define OV7725_PID (0x0A)
+#define OV7725_VER (0x0B)
+#define OV7725_COM3 (0x0C)
+#define OV7725_COM4 (0x0D)
+#define OV7725_COM5 (0x0E)
+#define OV7725_COM6 (0x0F)
+#define OV7725_AEC (0x10)
+#define OV7725_CLKRC (0x11)
+#define OV7725_COM7 (0x12)
+#define OV7725_COM8 (0x13)
+#define OV7725_COM9 (0x14)
+#define OV7725_COM10 (0x15)
+#define OV7725_REG16 (0x16)
+#define OV7725_HSTART (0x17)
+#define OV7725_HSIZE (0x18)
+#define OV7725_VSTRT (0x19)
+#define OV7725_VSIZE (0x1A)
+#define OV7725_PSHFT (0x1B)
+#define OV7725_MIDH (0x1C)
+#define OV7725_MIDL (0x1D)
+#define OV7725_LAEC (0x1F)
+#define OV7725_COM11 (0x20)
+#define OV7725_BDBase (0x22)
+#define OV7725_BDMStep (0x23)
+#define OV7725_AEW (0x24)
+#define OV7725_AEB (0x25)
+#define OV7725_VPT (0x26)
+#define OV7725_REG28 (0x28)
+#define OV7725_HOutSize (0x29)
+#define OV7725_EXHCH (0x2A)
+#define OV7725_EXHCL (0x2B)
+#define OV7725_VOutSize (0x2C)
+#define OV7725_ADVFL (0x2D)
+#define OV7725_ADVFH (0x2E)
+#define OV7725_YAVE (0x2F)
+#define OV7725_LumHTh (0x30)
+#define OV7725_LumLTh (0x31)
+#define OV7725_HREF (0x32)
+#define OV7725_DM_LNL (0x33)
+#define OV7725_DM_LNH (0x34)
+#define OV7725_ADoff_B (0x35)
+#define OV7725_ADoff_R (0x36)
+#define OV7725_ADoff_Gb (0x37)
+#define OV7725_ADoff_Gr (0x38)
+#define OV7725_Off_B (0x39)
+#define OV7725_Off_R (0x3A)
+#define OV7725_Off_Gb (0x3B)
+#define OV7725_Off_Gr (0x3C)
+#define OV7725_COM12 (0x3D)
+#define OV7725_COM13 (0x3E)
+#define OV7725_COM14 (0x3F)
+#define OV7725_COM16 (0x41)
+#define OV7725_TGT_B (0x42)
+#define OV7725_TGT_R (0x43)
+#define OV7725_TGT_Gb (0x44)
+#define OV7725_TGT_Gr (0x45)
+#define OV7725_LC_CTR (0x46)
+#define OV7725_LC_XC (0x47)
+#define OV7725_LC_YC (0x48)
+#define OV7725_LC_COEF (0x49)
+#define OV7725_LC_RADI (0x4A)
+#define OV7725_LC_COEFB (0x4B)
+#define OV7725_LC_COEFR (0x4C)
+#define OV7725_FixGain (0x4D)
+#define OV7725_AREF1 (0x4F)
+#define OV7725_AREF6 (0x54)
+#define OV7725_UFix (0x60)
+#define OV7725_VFix (0x61)
+#define OV7725_AWBb_blk (0x62)
+#define OV7725_AWB_Ctrl0 (0x63)
+#define OV7725_DSP_Ctrl1 (0x64)
+#define OV7725_DSP_Ctrl2 (0x65)
+#define OV7725_DSP_Ctrl3 (0x66)
+#define OV7725_DSP_Ctrl4 (0x67)
+#define OV7725_AWB_bias (0x68)
+#define OV7725_AWBCtrl1 (0x69)
+#define OV7725_AWBCtrl2 (0x6A)
+#define OV7725_AWBCtrl3 (0x6B)
+#define OV7725_AWBCtrl4 (0x6C)
+#define OV7725_AWBCtrl5 (0x6D)
+#define OV7725_AWBCtrl6 (0x6E)
+#define OV7725_AWBCtrl7 (0x6F)
+#define OV7725_AWBCtrl8 (0x70)
+#define OV7725_AWBCtrl9 (0x71)
+#define OV7725_AWBCtrl10 (0x72)
+#define OV7725_AWBCtrl11 (0x73)
+#define OV7725_AWBCtrl12 (0x74)
+#define OV7725_AWBCtrl13 (0x75)
+#define OV7725_AWBCtrl14 (0x76)
+#define OV7725_AWBCtrl15 (0x77)
+#define OV7725_AWBCtrl16 (0x78)
+#define OV7725_AWBCtrl17 (0x79)
+#define OV7725_AWBCtrl18 (0x7A)
+#define OV7725_AWBCtrl19 (0x7B)
+#define OV7725_AWBCtrl20 (0x7C)
+#define OV7725_AWBCtrl21 (0x7D)
+#define OV7725_GAM1 (0x7E)
+#define OV7725_GAM2 (0x7F)
+#define OV7725_GAM3 (0x80)
+#define OV7725_GAM4 (0x81)
+#define OV7725_GAM5 (0x82)
+#define OV7725_GAM6 (0x83)
+#define OV7725_GAM7 (0x84)
+#define OV7725_GAM8 (0x85)
+#define OV7725_GAM9 (0x86)
+#define OV7725_GAM10 (0x87)
+#define OV7725_GAM11 (0x88)
+#define OV7725_GAM12 (0x89)
+#define OV7725_GAM13 (0x8A)
+#define OV7725_GAM14 (0x8B)
+#define OV7725_GAM15 (0x8C)
+#define OV7725_SLOP (0x8D)
+#define OV7725_DNSTh (0x8E)
+#define OV7725_EDGE0 (0x8F)
+#define OV7725_EDGE1 (0x90)
+#define OV7725_DNSOff (0x91)
+#define OV7725_EDGE2 (0x92)
+#define OV7725_EDGE3 (0x93)
+#define OV7725_MTX1 (0x94)
+#define OV7725_MTX2 (0x95)
+#define OV7725_MTX3 (0x96)
+#define OV7725_MTX4 (0x97)
+#define OV7725_MTX5 (0x98)
+#define OV7725_MTX6 (0x99)
+#define OV7725_MTX_Ctrl (0x9A)
+#define OV7725_BRIGHT (0x9B)
+#define OV7725_CNST (0x9C)
+#define OV7725_UVADJ0 (0x9E)
+#define OV7725_UVADJ1 (0x9F)
+#define OV7725_SCAL0 (0xA0)
+#define OV7725_SCAL1 (0xA1)
+#define OV7725_SCAL2 (0xA2)
+#define OV7725_SDE (0xA6)
+#define OV7725_USAT (0xA7)
+#define OV7725_VSAT (0xA8)
+#define OV7725_HUECOS (0xA9)
+#define OV7725_HUESIN (0xAA)
+#define OV7725_SIGN (0xAB)
+#define OV7725_DSPAuto (0xAC)
+#define OV7725_DEV_ADD (0x42 >> 1)
+//==========================================IIC 版本小钻风寄存器 本部分不允许用户更改============================================
+
+//==============================================定义 OV7725 命令枚举体==================================================
+typedef enum
+{
+ OV7725_INIT = 0x00,
+ OV7725_RESERVE,
+ OV7725_CONTRAST,
+ OV7725_FPS,
+ OV7725_COL,
+ OV7725_ROW,
+ OV7725_CONFIG_FINISH,
+
+ OV7725_GET_WHO_AM_I = 0xEF,
+ OV7725_GET_STATUS = 0xF1,
+ OV7725_GET_VERSION = 0xF2,
+
+ OV7725_SET_ADDR = 0xFE,
+ OV7725_SET_DATA = 0xFF,
+}ov7725_cmd_enum;
+//==============================================定义 OV7725 命令枚举体==================================================
+
+//==============================================声明 OV7725 数据存储变量=================================================
+extern vuint8 ov7725_finish_flag; // 一场图像采集完成标志位
+extern uint8 ov7725_image_binary[OV7725_H][OV7725_W / 8]; // 图像保存数组
+//==============================================声明 OV7725 数据存储变量=================================================
+
+//=================================================OV7725 基础函数===================================================
+uint16 ov7725_uart_get_id (void); // 获取摄像头固件 ID
+uint16 ov7725_get_version (void); // 获取摄像头固件版本
+uint8 ov7725_init (void); // OV7725 摄像头初始化
+//=================================================OV7725 基础函数===================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_scc8660.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_scc8660.c
new file mode 100644
index 0000000..2536b2d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_scc8660.c
@@ -0,0 +1,576 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_scc8660
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* TXD 查看 zf_device_scc8660.h 中 SCC8660_COF_UART_TX 宏定义
+* RXD 查看 zf_device_scc8660.h 中 SCC8660_COF_UART_RX 宏定义
+* PCLK 查看 zf_device_scc8660.h 中 SCC8660_PCLK_PIN 宏定义
+* VSY 查看 zf_device_scc8660.h 中 SCC8660_VSYNC_PIN 宏定义
+* D0-D7 查看 zf_device_scc8660.h 中 SCC8660_DATA_PIN 宏定义 从该定义开始的连续八个引脚
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_interrupt.h"
+#include "zf_common_debug.h"
+#include "zf_common_fifo.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_dma.h"
+#include "zf_driver_exti.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_uart.h"
+#include "zf_device_camera.h"
+#include "zf_device_scc8660.h"
+#include "zf_device_type.h"
+
+vuint8 scc8660_finish_flag = 0; // 一场图像采集完成标志位
+IFX_ALIGN(4) uint16 scc8660_image[SCC8660_H][SCC8660_W];
+
+uint8 scc8660_link_list_num;
+
+uint8 scc8660_lost_flag = 1; // 图像丢失标志位
+uint8 scc8660_dma_int_num; // 当前DMA中断次数
+uint8 scc8660_dma_init_flag; // 是否需要重新初始化
+
+
+// 需要配置到摄像头的数据 不允许在这修改参数
+static int16 scc8660_set_confing_buffer[SCC8660_CONFIG_FINISH][2]=
+{
+ {SCC8660_INIT, 0}, // 摄像头开始初始化
+
+ {SCC8660_AUTO_EXP, SCC8660_AUTO_EXP_DEF}, // 自动曝光
+ {SCC8660_BRIGHT, SCC8660_BRIGHT_DEF}, // 亮度设置
+ {SCC8660_FPS, SCC8660_FPS_DEF}, // 图像帧率
+ {SCC8660_SET_COL, SCC8660_W}, // 图像列数
+ {SCC8660_SET_ROW, SCC8660_H}, // 图像行数
+ {SCC8660_PCLK_DIV, SCC8660_PCLK_DIV_DEF}, // PCLK分频系数
+ {SCC8660_PCLK_MODE, SCC8660_PCLK_MODE_DEF}, // PCLK模式
+ {SCC8660_COLOR_MODE, SCC8660_COLOR_MODE_DEF}, // 图像色彩模式
+ {SCC8660_DATA_FORMAT, SCC8660_DATA_FORMAT_DEF}, // 输出数据格式
+ {SCC8660_MANUAL_WB, SCC8660_MANUAL_WB_DEF} // 手动白平衡
+};
+
+// 从摄像头内部获取到的配置数据 不允许在这修改参数
+static int16 scc8660_get_confing_buffer[SCC8660_CONFIG_FINISH - 1][2]=
+{
+ {SCC8660_AUTO_EXP, 0},
+ {SCC8660_BRIGHT, 0}, // 亮度设置
+ {SCC8660_FPS, 0}, // 图像帧率
+ {SCC8660_SET_COL, 0}, // 图像列数
+ {SCC8660_SET_ROW, 0}, // 图像行数
+ {SCC8660_PCLK_DIV, 0}, // PCLK分频系数
+ {SCC8660_PCLK_MODE, 0}, // PCLK模式
+ {SCC8660_COLOR_MODE, 0}, // 图像色彩模式
+ {SCC8660_DATA_FORMAT, 0}, // 输出数据格式
+ {SCC8660_MANUAL_WB, 0}, // 白平衡设置
+};
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 配置摄像头内部配置信息 内部调用
+// 参数说明 buff 发送配置信息的地址
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 if(scc8660_set_config(scc8660_set_confing_buffer)){}
+// 备注信息 调用该函数前请先初始化串口
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 scc8660_set_config (int16 buff[SCC8660_CONFIG_FINISH][2])
+{
+ uint8 return_state = 1;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 loop_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ // 设置参数 具体请参看问题锦集手册
+ // 开始配置摄像头并重新初始化
+ for(loop_count = SCC8660_MANUAL_WB; loop_count < SCC8660_SET_REG_DATA; loop_count --)
+ {
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = (uint8)buff[loop_count][0];
+ temp = buff[loop_count][1];
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ system_delay_ms(2);
+ }
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ if((0xff == uart_buffer[1]) || (0xff == uart_buffer[2]))
+ {
+ return_state = 0;
+ break;
+ }
+ }
+ system_delay_ms(1);
+ }while(SCC8660_INIT_TIMEOUT > timeout_count ++);
+
+ // 以上部分对摄像头配置的数据全部都会保存在摄像头上51单片机的eeprom中
+ // 利用set_exposure_time函数单独配置的曝光数据不存储在eeprom中
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取摄像头内部配置信息 内部调用
+// 参数说明 buff 接收配置信息的地址
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 if(scc8660_get_config(scc8660_get_confing_buffer)){}
+// 备注信息 调用该函数前请先初始化串口
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 scc8660_get_config (int16 buff[SCC8660_CONFIG_FINISH-1][2])
+{
+ uint8 return_state = 0;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 loop_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ for(loop_count = SCC8660_MANUAL_WB - 1; loop_count >= 1; loop_count --)
+ {
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = SCC8660_GET_STATUS;
+ temp = buff[loop_count][0];
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ timeout_count = 0;
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ buff[loop_count][1] = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(SCC8660_INIT_TIMEOUT > timeout_count ++);
+ if(timeout_count > SCC8660_INIT_TIMEOUT) // 超时
+ {
+ return_state = 1;
+ break;
+ }
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SCC8660摄像头串口通信回调
+// 参数说明 void
+// 返回参数 void
+// 使用示例 scc8660_uart_callback();
+//-------------------------------------------------------------------------------------------------------------------
+static void scc8660_uart_callback (void)
+{
+ uint8 data = 0;
+ uart_query_byte(SCC8660_COF_UART, &data);
+ if(0xA5 == data)
+ {
+ fifo_clear(&camera_receiver_fifo);
+ }
+ fifo_write_element(&camera_receiver_fifo, data);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SCC8660摄像头场中断
+// 参数说明 void
+// 返回参数 void
+// 使用示例 scc8660_vsync_handler();
+//-------------------------------------------------------------------------------------------------------------------
+static void scc8660_vsync_handler(void)
+{
+ exti_flag_clear(SCC8660_VSYNC_PIN);
+ scc8660_dma_int_num = 0;
+ if(scc8660_dma_init_flag || scc8660_lost_flag)
+ {
+ scc8660_dma_init_flag = 0;
+ IfxDma_resetChannel(&MODULE_DMA, SCC8660_DMA_CH);
+ scc8660_link_list_num = dma_init(SCC8660_DMA_CH,
+ SCC8660_DATA_ADD,
+ (uint8 *)scc8660_image[0],
+ SCC8660_PCLK_PIN,
+ EXTI_TRIGGER_RISING,
+ SCC8660_IMAGE_SIZE); // 如果超频到300M 倒数第二个参数请设置为FALLING
+ dma_enable(SCC8660_DMA_CH);
+ }
+ else
+ {
+ if(1 == scc8660_link_list_num)
+ {
+ dma_set_destination(SCC8660_DMA_CH, (uint8 *)scc8660_image[0]); // 没有采用链接传输模式 重新设置目的地址
+ }
+ dma_enable(SCC8660_DMA_CH);
+ }
+ scc8660_lost_flag = 1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SCC8660摄像头DMA完成中断
+// 参数说明 void
+// 返回参数 void
+// 使用示例 scc8660_dma_handler();
+//-------------------------------------------------------------------------------------------------------------------
+static void scc8660_dma_handler(void)
+{
+ clear_dma_flag(SCC8660_DMA_CH);
+
+ if(IfxDma_getChannelTransactionRequestLost(&MODULE_DMA, SCC8660_DMA_CH)) // 图像错位判断
+ {
+ scc8660_finish_flag = 0;
+ dma_disable(SCC8660_DMA_CH);
+ IfxDma_clearChannelTransactionRequestLost(&MODULE_DMA, SCC8660_DMA_CH);
+ scc8660_dma_init_flag = 1;
+ }
+ else
+ {
+ scc8660_dma_int_num++;
+ if(scc8660_dma_int_num >= scc8660_link_list_num)
+ {
+ // 采集完成
+ // 一副图像从采集开始到采集结束耗时3.8MS左右(50FPS、188*120分辨率)
+ scc8660_dma_int_num = 0;
+ scc8660_lost_flag = 0;
+ scc8660_finish_flag = 1;
+ dma_disable(SCC8660_DMA_CH);
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取摄像头 ID
+// 参数说明 void
+// 返回参数 uint16 0-获取错误 N-版本号
+// 使用示例 scc8660_get_id();
+// 备注信息 调用该函数前请先初始化串口
+//-------------------------------------------------------------------------------------------------------------------
+uint16 scc8660_get_id (void)
+{
+ uint16 temp;
+ uint8 uart_buffer[4];
+ uint16 timeout_count = 0;
+ uint16 return_value = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = SCC8660_GET_WHO_AM_I;
+ temp = 0;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ return_value = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(SCC8660_INIT_TIMEOUT > timeout_count ++);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 单独设置摄像头曝光时间
+// 参数说明 light 设置曝光时间越大图像越亮，摄像头收到后会根据分辨率及FPS计算最大曝光时间如果设置的数据过大，那么摄像头将会设置这个最大值
+// 返回参数 uint16 数据
+// 使用示例 scc8660_get_parameter();
+// 备注信息 调用该函数前请先初始化串口
+//-------------------------------------------------------------------------------------------------------------------
+uint16 scc8660_get_parameter (uint16 config)
+{
+ uint8 uart_buffer[4];
+ uint16 timeout_count = 0;
+ uint16 return_value = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = SCC8660_GET_WHO_AM_I;
+ uart_buffer[2] = 0x00;
+ uart_buffer[3] = (uint8)config;
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ return_value = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(SCC8660_INIT_TIMEOUT > timeout_count ++);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取彩色摄像头固件版本
+// 参数说明 void
+// 返回参数 uint16 版本号
+// 使用示例 scc8660_get_version();
+// 备注信息 调用该函数前请先初始化摄像头配置串口
+//-------------------------------------------------------------------------------------------------------------------
+uint16 scc8660_get_version (void)
+{
+ uint16 temp;
+ uint8 uart_buffer[4];
+ uint16 timeout_count = 0;
+ uint16 return_value = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = SCC8660_GET_STATUS;
+ temp = SCC8660_GET_VERSION;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ return_value = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(SCC8660_INIT_TIMEOUT > timeout_count ++);
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 单独设置图像亮度
+// 参数说明 data 需要设置的亮度值
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 scc8660_set_bright(data);
+// 备注信息 调用该函数前请先初始化摄像头配置串口 通过该函数设置的参数，不会被51单片机保存
+//-------------------------------------------------------------------------------------------------------------------
+uint8 scc8660_set_bright (uint16 data)
+{
+ uint8 return_state = 0;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = SCC8660_SET_BRIGHT;
+ uart_buffer[2] = data >> 8;
+ uart_buffer[3] = (uint8)data;
+
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ temp = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(SCC8660_INIT_TIMEOUT > timeout_count ++);
+ if((temp != data) || (SCC8660_INIT_TIMEOUT <= timeout_count))
+ {
+ return_state = 1;
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 单独设置白平衡
+// 参数说明 data 需要设置的亮度值
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 scc8660_set_white_balance(data);
+// 备注信息 通过该函数设置的参数，不会被51单片机保存 调用该函数前请先初始化摄像头配置串口
+//-------------------------------------------------------------------------------------------------------------------
+uint8 scc8660_set_white_balance (uint16 data)
+{
+ uint8 return_state = 0;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = SCC8660_SET_MANUAL_WB;
+ uart_buffer[2] = data >> 8;
+ uart_buffer[3] = (uint8)data;
+
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ temp = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(SCC8660_INIT_TIMEOUT > timeout_count ++);
+ if((temp != data) || (SCC8660_INIT_TIMEOUT <= timeout_count))
+ {
+ return_state = 1;
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 对摄像头内部寄存器进行写操作
+// 参数说明 addr 摄像头内部寄存器地址
+// 参数说明 data 需要写入的数据
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 scc8660_set_reg(addr, data);
+// 备注信息 调用该函数前请先初始化串口
+//-------------------------------------------------------------------------------------------------------------------
+uint8 scc8660_set_reg (uint8 addr, uint16 data)
+{
+ uint8 return_state = 0;
+ uint8 uart_buffer[4];
+ uint16 temp;
+ uint16 timeout_count = 0;
+ uint32 uart_buffer_index = 0;
+
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = SCC8660_SET_REG_ADDR;
+ uart_buffer[2] = 0x00;
+ uart_buffer[3] = (uint8)addr;
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ system_delay_ms(10);
+ uart_buffer[0] = 0xA5;
+ uart_buffer[1] = SCC8660_SET_REG_DATA;
+ temp = data;
+ uart_buffer[2] = temp >> 8;
+ uart_buffer[3] = (uint8)temp;
+ uart_write_buffer(SCC8660_COF_UART, uart_buffer, 4);
+
+ do
+ {
+ if(3 <= fifo_used(&camera_receiver_fifo))
+ {
+ uart_buffer_index = 3;
+ fifo_read_buffer(&camera_receiver_fifo, uart_buffer, &uart_buffer_index, FIFO_READ_AND_CLEAN);
+ temp = uart_buffer[1] << 8 | uart_buffer[2];
+ break;
+ }
+ system_delay_ms(1);
+ }while(SCC8660_INIT_TIMEOUT > timeout_count ++);
+ if((temp != data) || (SCC8660_INIT_TIMEOUT <= timeout_count))
+ {
+ return_state = 1;
+ }
+ return return_state;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SCC8660 摄像头初始化
+// 参数说明 void
+// 返回参数 uint8 1-失败 0-成功
+// 使用示例 scc8660_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 scc8660_init (void)
+{
+ uint8 return_state = 0;
+ uint16 scc8660_version = 0;
+
+ gpio_init(P02_0, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+ gpio_init(P02_1, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+
+ // 初始换串口 配置摄像头
+ uart_init(SCC8660_COF_UART, SCC8660_COF_BAUR, SCC8660_COF_UART_RX, SCC8660_COF_UART_TX);
+ uart_rx_interrupt(SCC8660_COF_UART, 1);
+
+ system_delay_ms(200);
+
+ set_camera_type(CAMERA_COLOR, scc8660_vsync_handler, scc8660_dma_handler, scc8660_uart_callback); // 设置连接摄像头类型
+ camera_fifo_init();
+ do
+ {
+ // 等待摄像头上电初始化成功 方式有两种：延时或者通过获取配置的方式 二选一
+ // system_delay_ms(1000); // 延时方式
+ scc8660_version = scc8660_get_version(); // 获取配置的方式
+ if(scc8660_set_config(scc8660_set_confing_buffer))
+ {
+ set_camera_type(NO_CAMERE, NULL, NULL, NULL);
+ return_state = 1;
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是串口通信出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "SCC8660 set config error.");
+ break;
+ }
+
+ if(0 == return_state)
+ {
+ // 获取配置便于查看配置是否正确
+ if(scc8660_get_config(scc8660_get_confing_buffer))
+ {
+ set_camera_type(NO_CAMERE, NULL, NULL, NULL);
+ return_state = 1;
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么就是串口通信出错并超时退出了
+ // 检查一下接线有没有问题 如果没问题可能就是坏了
+ zf_log(0, "SCC8660 set config error.");
+ break;
+ }
+
+ scc8660_link_list_num = camera_init(SCC8660_DATA_ADD, (uint8 *)scc8660_image[0], SCC8660_IMAGE_SIZE);
+ }
+ }while(0);
+
+ return return_state;
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_scc8660.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_scc8660.h
new file mode 100644
index 0000000..3bd82cd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_scc8660.h
@@ -0,0 +1,133 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_scc8660
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* TXD 查看 zf_device_scc8660.h 中 SCC8660_COF_UART_TX 宏定义
+* RXD 查看 zf_device_scc8660.h 中 SCC8660_COF_UART_RX 宏定义
+* PCLK 查看 zf_device_scc8660.h 中 SCC8660_PCLK_PIN 宏定义
+* VSY 查看 zf_device_scc8660.h 中 SCC8660_VSYNC_PIN 宏定义
+* D0-D7 查看 zf_device_scc8660.h 中 SCC8660_DATA_PIN 宏定义 从该定义开始的连续八个引脚
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_scc8660_h_
+#define _zf_device_scc8660_h_
+
+#include "zf_device_type.h"
+
+//=================================================SCC8660 驱动配置====================================================
+#define SCC8660_COF_UART (UART_1) // 配置摄像头所使用到的串口
+#define SCC8660_COF_BAUR (9600 ) // 凌瞳 配置串口波特率
+#define SCC8660_COF_UART_TX (UART1_RX_P02_3) // 凌瞳 UART-TX 引脚 要接在单片机 RX 上
+#define SCC8660_COF_UART_RX (UART1_TX_P02_2) // 凌瞳 UART-RX 引脚 要接在单片机 TX 上
+
+#define SCC8660_DMA_CH (IfxDma_ChannelId_5)
+
+#define SCC8660_PCLK_PIN (ERU_CH2_REQ14_P02_1) // PCLK 触发信号 TIM_ETR 引脚禁止随意修改
+
+#define SCC8660_VSYNC_PIN (ERU_CH3_REQ6_P02_0 ) // 场中断引脚
+
+#define SCC8660_DATA_PIN (P00_0) // 数据引脚 这里是 只能是 GPIOx0 或者 GPIOx8 开始 连续八个引脚例如 F0-F7
+#define SCC8660_DATA_ADD (get_port_in_addr(SCC8660_DATA_PIN))
+
+#define SCC8660_INIT_TIMEOUT (0x00F0) // 默认的摄像头初始化超时时间 毫秒为单位
+//=================================================SCC8660 驱动配置====================================================
+
+//=================================================SCC8660 参数配置====================================================
+#define SCC8660_W (160) // 实际图像分辨率宽度 可选参数为：160 180
+#define SCC8660_H (120) // 实际图像分辨率高度 可选参数为：120 160
+#define SCC8660_IMAGE_SIZE (SCC8660_W * 2 * SCC8660_H) // 整体图像大小 SCC8660_W*2*SCC8660_H 不能超过 65535
+
+#define SCC8660_AUTO_EXP_DEF (1 ) // 自动曝光 默认不开启自动曝光设置 范围 [0-1] 0为关闭
+#define SCC8660_BRIGHT_DEF (100) // 亮度设置 手动曝光默认：300 手动曝光时：参数范围0-65535 自动曝光推荐值：100 自动曝光时参数设置范围0-255
+#define SCC8660_FPS_DEF (50 ) // 图像帧率 默认：50 可选参数为：60 50 30 25。 实际帧率还需要看SCC8660_PCLK_DIV参数的设置
+#define SCC8660_PCLK_DIV_DEF (5 ) // PCLK分频系数 默认：5 可选参数为：<0:1/1> <1:2/3> <2:1/2> <3:1/3> <4:1/4> <5:1/8>
+ // 分频系数越大，PCLK频率越低，降低PCLK可以减轻DVP接口的干扰，但降低PCLK频率则会影响帧率。若无特殊需求请保持默认。
+ // 例如设置FPS为50帧，但是pclk分频系数选择的为5，则摄像头输出的帧率为50*（1/8）=6.25帧
+ // 其他参数不变的情况下，SCC8660_PCLK_DIV参数越大图像会越亮
+#define SCC8660_PCLK_MODE_DEF (0 ) // PCLK模式 默认：0 可选参数为：[0,1] 0：不输出消隐信号 1：输出消隐信号 <通常都设置为0，如果使用STM32的DCMI接口采集需要设置为1>
+#define SCC8660_COLOR_MODE_DEF (1 ) // 图像色彩模式 默认：0 可选参数为：[0,1] 0：正常彩色模式 1：鲜艳模式（色彩饱和度提高）
+#define SCC8660_DATA_FORMAT_DEF (1 ) // 输出数据格式 默认：0 可选参数为：[0-3] 0：RGB565 1：RGB565(字节交换) 2：YUV422(YUYV) 3：YUV422(UYVY)
+#define SCC8660_MANUAL_WB_DEF (0 ) // 手动白平衡 默认：0 可选参数为：[0,0x65-0xa0] 0：关闭手动白平衡，启用自动白平衡 其他：手动白平衡 手动白平衡时 参数范围0x65-0xa0
+//=================================================SCC8660 参数配置====================================================
+
+//==============================================定义 SCC8660 命令枚举体==================================================
+typedef enum
+{
+ SCC8660_INIT = 0x00, // 摄像头初始化命令
+ SCC8660_AUTO_EXP, // 自动曝光命令
+ SCC8660_BRIGHT, // 亮度命令
+ SCC8660_FPS, // 摄像头帧率命令
+ SCC8660_SET_COL, // 图像列命令
+ SCC8660_SET_ROW, // 图像行命令
+ SCC8660_PCLK_DIV, // 像素时钟分频命令
+ SCC8660_PCLK_MODE, // 像素时钟模式命令
+ SCC8660_COLOR_MODE, // 色彩模式命令
+ SCC8660_DATA_FORMAT, // 数据格式命令
+ SCC8660_MANUAL_WB, // 手动白平衡命令
+ SCC8660_CONFIG_FINISH, // 非命令位，主要用来占位计数
+
+ SCC8660_GET_WHO_AM_I = 0xEF, // 我是谁命令，用于判断摄像头型号
+ SCC8660_SET_BRIGHT = 0xF0, // 单独设置亮度
+ SCC8660_GET_STATUS = 0XF1, // 获取摄像头配置命令
+ SCC8660_GET_VERSION = 0xF2, // 固件版本号
+ SCC8660_SET_MANUAL_WB = 0xF3, // 单独设置手动白平衡
+
+ SCC8660_SET_REG_ADDR = 0xFE,
+ SCC8660_SET_REG_DATA = 0xFF,
+}scc8660_cmd_enum;
+//==============================================定义 SCC8660 命令枚举体==================================================
+
+//==============================================声明 SCC8660 数据存储变量=================================================
+extern vuint8 scc8660_finish_flag; // 一场图像采集完成标志位
+extern uint16 scc8660_image[SCC8660_H][SCC8660_W]; // 图像保存数组
+//==============================================声明 SCC8660 数据存储变量=================================================
+
+//=================================================SCC8660 基础函数===================================================
+uint16 scc8660_get_id (void); // 获取摄像头 ID
+uint16 scc8660_get_parameter (uint16 config); // 单独设置摄像头曝光时间
+uint16 scc8660_get_version (void); // 获取彩色摄像头固件版本
+uint8 scc8660_set_bright (uint16 data); // 单独设置图像亮度
+uint8 scc8660_set_white_balance (uint16 data); // 单独设置白平衡
+uint8 scc8660_set_reg (uint8 addr, uint16 data); // 对摄像头内部寄存器进行写操作
+uint8 scc8660_init (void); // SCC8660 摄像头初始化
+//=================================================SCC8660 基础函数===================================================
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_tft180.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_tft180.c
new file mode 100644
index 0000000..5187013
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_tft180.c
@@ -0,0 +1,984 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_tft180
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* SCL 查看 zf_device_tft180.h 中 TFT180_SCL_PIN 宏定义
+* SDA 查看 zf_device_tft180.h 中 TFT180_SDA_PIN 宏定义
+* RES 查看 zf_device_tft180.h 中 TFT180_RES_PIN 宏定义
+* DC 查看 zf_device_tft180.h 中 TFT180_DC_PIN 宏定义
+* CS 查看 zf_device_tft180.h 中 TFT180_CS_PIN 宏定义
+* BL 查看 zf_device_tft180.h 中 TFT180_BL_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 最大分辨率160*128
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_common_font.h"
+#include "zf_common_function.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_soft_spi.h"
+#include "zf_driver_spi.h"
+#include "zf_device_tft180.h"
+
+static uint16 tft180_pencolor = TFT180_DEFAULT_PENCOLOR;
+static uint16 tft180_bgcolor = TFT180_DEFAULT_BGCOLOR;
+
+static tft180_dir_enum tft180_display_dir = TFT180_DEFAULT_DISPLAY_DIR;
+static tft180_font_size_enum tft180_display_font = TFT180_DEFAULT_DISPLAY_FONT;
+
+static uint8 tft180_x_max = 160;
+static uint8 tft180_y_max = 128;
+
+#if TFT180_USE_SOFT_SPI
+static soft_spi_info_struct tft180_spi;
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 SPI 写 8bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 tft180_write_8bit_data(dat);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define tft180_write_8bit_data(data) (soft_spi_write_8bit(&tft180_spi, (data)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 SPI 写 16bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 tft180_write_16bit_data(x1 + 52);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define tft180_write_16bit_data(data) (soft_spi_write_16bit(&tft180_spi, (data)))
+#else
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 SPI 写 8bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 tft180_write_8bit_data(dat);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define tft180_write_8bit_data(data) (spi_write_8bit(TFT180_SPI, (data)))
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 IPS114 SPI 写 16bit 数据
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 ips114_write_16bit_data(x1 + 52);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define tft180_write_16bit_data(data) (spi_write_16bit(TFT180_SPI, (data)))
+#endif
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 写命令
+// 参数说明 dat 数据
+// 返回参数 void
+// 使用示例 tft180_write_index(0x2a);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void tft180_write_index (const uint8 dat)
+{
+ TFT180_DC(0);
+ tft180_write_8bit_data(dat);
+ TFT180_DC(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示区域 内部调用
+// 参数说明 x1 起始x轴坐标
+// 参数说明 y1 起始y轴坐标
+// 参数说明 x2 结束x轴坐标
+// 参数说明 y2 结束y轴坐标
+// 返回参数 void
+// 使用示例 tft180_set_region(0, 0, tft180_x_max - 1, tft180_y_max - 1);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void tft180_set_region (uint16 x1, uint16 y1, uint16 x2, uint16 y2)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ // 检查一下你的显示调用的函数 自己计算一下哪里超过了屏幕显示范围
+ zf_assert(x1 < tft180_x_max);
+ zf_assert(y1 < tft180_y_max);
+ zf_assert(x2 < tft180_x_max);
+ zf_assert(y2 < tft180_y_max);
+
+ if(tft180_display_dir == TFT180_PORTAIT || tft180_display_dir == TFT180_PORTAIT_180)
+ {
+ tft180_write_index(0x2a);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(x1 + 2);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(x2 + 2);
+
+ tft180_write_index(0x2b);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(y1 + 1);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(y2 + 1);
+ }
+ else
+ {
+ tft180_write_index(0x2a);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(x1 + 1);
+ tft180_write_8bit_data(0x0);
+ tft180_write_8bit_data(x2 + 1);
+
+ tft180_write_index(0x2b);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(y1 + 2);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(y2 + 2);
+ }
+ tft180_write_index(0x2c);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示DEBUG信息初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 tft180_debug_init();
+// 备注信息 内部使用
+//-------------------------------------------------------------------------------------------------------------------
+static void tft180_debug_init(void)
+{
+ debug_output_struct info;
+ debug_output_struct_init(&info);
+
+ info.type_index = 1;
+ info.display_x_max = tft180_x_max;
+ info.display_y_max = tft180_y_max;
+
+ switch(tft180_display_font)
+ {
+ case TFT180_6X8_FONT:
+ info.font_x_size = 6;
+ info.font_y_size = 8;
+ break;
+ case TFT180_8X16_FONT:
+ info.font_x_size = 8;
+ info.font_y_size = 16;
+ break;
+ case TFT180_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ info.output_screen = tft180_show_string;
+ info.output_screen_clear = tft180_clear;
+
+ debug_output_init(&info);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 清屏函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 tft180_clear();
+// 备注信息 将屏幕清空成背景颜色
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_clear (void)
+{
+ uint32 i = tft180_x_max * tft180_y_max;
+
+ TFT180_CS(0);
+ tft180_set_region(0, 0, tft180_x_max - 1, tft180_y_max - 1);
+ for( ; i > 0; i --)
+ {
+ tft180_write_16bit_data(tft180_bgcolor);
+ }
+ TFT180_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 清屏函数
+// 参数说明 color 颜色格式 RGB565 或者可以使用 zf_common_font.h 内常用颜色宏定义
+// 返回参数 void
+// 使用示例 tft180_full(RGB565_YELLOW);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_full (const uint16 color)
+{
+ uint32 i = tft180_x_max * tft180_y_max;
+
+ TFT180_CS(0);
+ tft180_set_region(0, 0, tft180_x_max - 1, tft180_y_max - 1);
+ for( ; i > 0; i --)
+ {
+ tft180_write_16bit_data(color);
+ }
+ TFT180_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示方向
+// 参数说明 dir 显示方向 参照 zf_device_ips114.h 内 tft180_dir_enum 枚举体定义
+// 返回参数 void
+// 使用示例 tft180_set_dir(TFT180_CROSSWISE);
+// 备注信息 这个函数只有在初始化屏幕之前调用才生效
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_set_dir (tft180_dir_enum dir)
+{
+ tft180_display_dir = dir;
+ if(dir < 2)
+ {
+ tft180_x_max = 128;
+ tft180_y_max = 160;
+ }
+ else
+ {
+ tft180_x_max = 160;
+ tft180_y_max = 128;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示字体
+// 参数说明 dir 显示方向 参照 zf_device_tft180.h 内 tft180_font_size_enum 枚举体定义
+// 返回参数 void
+// 使用示例 tft180_set_font(TFT180_8x16_FONT);
+// 备注信息 字体可以随时自由设置 设置后生效 后续显示就是新的字体大小
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_set_font (tft180_font_size_enum font)
+{
+ tft180_display_font = font;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置显示颜色
+// 参数说明 pen 颜色格式 RGB565 或者可以使用 zf_common_font.h 内常用颜色宏定义
+// 参数说明 bgcolor 颜色格式 RGB565 或者可以使用 zf_common_font.h 内常用颜色宏定义
+// 返回参数 void
+// 使用示例 tft180_set_color(RGB565_WHITE, RGB565_BLACK);
+// 备注信息 字体颜色和背景颜色也可以随时自由设置 设置后生效
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_set_color (uint16 pen, const uint16 bgcolor)
+{
+ tft180_pencolor = pen;
+ tft180_bgcolor = bgcolor;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 画点
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 dat 需要显示的颜色
+// 返回参数 void
+// 使用示例 tft180_draw_point(0, 0, RGB565_RED); // 坐标 0,0 画一个红色的点
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_draw_point (uint16 x, uint16 y, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+
+ TFT180_CS(0);
+ tft180_set_region(x, y, x, y);
+ tft180_write_16bit_data(color);
+ TFT180_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 画线
+// 参数说明 x_start 坐标x方向的起点
+// 参数说明 y_start 坐标y方向的起点
+// 参数说明 x_end 坐标x方向的终点
+// 参数说明 y_end 坐标y方向的终点
+// 参数说明 dat 需要显示的颜色
+// 返回参数 void
+// 使用示例 tft180_draw_line(0, 0, 10, 10,RGB565_RED); // 坐标 0,0 到 10,10 画一条红色的线
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_draw_line (uint16 x_start, uint16 y_start, uint16 x_end, uint16 y_end, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x_start < tft180_x_max);
+ zf_assert(y_start < tft180_y_max);
+ zf_assert(x_end < tft180_x_max);
+ zf_assert(y_end < tft180_y_max);
+
+ int16 x_dir = (x_start < x_end ? 1 : -1);
+ int16 y_dir = (y_start < y_end ? 1 : -1);
+ float temp_rate = 0;
+ float temp_b = 0;
+ if(x_start != x_end)
+ {
+ temp_rate = (float)(y_start - y_end) / (float)(x_start - x_end);
+ temp_b = (float)y_start - (float)x_start * temp_rate;
+ }
+ else
+ {
+ while(y_start != y_end)
+ {
+ tft180_draw_point(x_start, y_start, color);
+ y_start += y_dir;
+ }
+ return;
+ }
+
+ if(func_abs(y_start - y_end) > func_abs(x_start - x_end))
+ {
+ while(y_start != y_end)
+ {
+ tft180_draw_point(x_start, y_start, color);
+ y_start += y_dir;
+ x_start = (int16)(((float)y_start - temp_b) / temp_rate);
+ }
+ }
+ else
+ {
+ while(x_start != x_end)
+ {
+ tft180_draw_point(x_start, y_start, color);
+ x_start += x_dir;
+ y_start = (int16)((float)x_start * temp_rate + temp_b);
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示字符
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 dat 需要显示的字符
+// 返回参数 void
+// 使用示例 tft180_show_char(0, 0, 'x'); // 坐标 0,0 写一个字符 x
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_char (uint16 x, uint16 y, const char dat)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+
+ uint8 i,j;
+
+ TFT180_CS(0);
+ switch(tft180_display_font)
+ {
+ case TFT180_6X8_FONT:
+ for(i = 0; i < 6; i ++)
+ {
+ tft180_set_region(x + i, y, x + i, y + 8);
+ // 减 32 因为是取模是从空格开始取得 空格在 ascii 中序号是 32
+ uint8 temp_top = ascii_font_6x8[dat - 32][i];
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_top & 0x01)
+ {
+ tft180_write_16bit_data(tft180_pencolor);
+ }
+ else
+ {
+ tft180_write_16bit_data(tft180_bgcolor);
+ }
+ temp_top >>= 1;
+ }
+ }
+ break;
+ case TFT180_8X16_FONT:
+ for(i = 0; i < 8; i ++)
+ {
+ tft180_set_region(x + i, y, x + i, y + 15);
+ // 减 32 因为是取模是从空格开始取得 空格在 ascii 中序号是 32
+ uint8 temp_top = ascii_font_8x16[dat - 32][i];
+ uint8 temp_bottom = ascii_font_8x16[dat - 32][i + 8];
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_top & 0x01)
+ {
+ tft180_write_16bit_data(tft180_pencolor);
+ }
+ else
+ {
+ tft180_write_16bit_data(tft180_bgcolor);
+ }
+ temp_top >>= 1;
+ }
+ for(j = 0; j < 8; j ++)
+ {
+ if(temp_bottom & 0x01)
+ {
+ tft180_write_16bit_data(tft180_pencolor);
+ }
+ else
+ {
+ tft180_write_16bit_data(tft180_bgcolor);
+ }
+ temp_bottom >>= 1;
+ }
+ }
+ break;
+ case TFT180_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ TFT180_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示字符串
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 dat 需要显示的字符串
+// 返回参数 void
+// 使用示例 tft180_show_string(0, 0, "seekfree");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_string (uint16 x, uint16 y, const char dat[])
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+
+ uint16 j = 0;
+ while(dat[j] != '\0')
+ {
+ switch(tft180_display_font)
+ {
+ case TFT180_6X8_FONT:
+ tft180_show_char(x + 6 * j, y, dat[j]);
+ j ++;
+ break;
+ case TFT180_8X16_FONT:
+ tft180_show_char(x + 8 * j, y, dat[j]);
+ j ++;
+ break;
+ case TFT180_16X16_FONT:
+ // 暂不支持
+ break;
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示32位有符号 (去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 dat 需要显示的变量 数据类型 int32
+// 参数说明 num 需要显示的位数 最高10位 不包含正负号
+// 返回参数 void
+// 使用示例 tft180_show_int(0, 0, x, 3); // x 可以为 int32 int16 int8 类型
+// 备注信息 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_int (uint16 x, uint16 y, const int32 dat, uint8 num)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 10);
+
+ int32 dat_temp = dat;
+ int32 offset = 1;
+ char data_buffer[12];
+
+ memset(data_buffer, 0, 12);
+ memset(data_buffer, ' ', num + 1);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ offset *= 10;
+ dat_temp %= offset;
+ }
+ func_int_to_str(data_buffer, dat_temp);
+ tft180_show_string(x, y, (const char *)&data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示32位无符号 (去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 dat 需要显示的变量 数据类型 uint32
+// 参数说明 num 需要显示的位数 最高10位 不包含正负号
+// 返回参数 void
+// 使用示例 tft180_show_uint(0, 0, x, 3); // x 可以为 uint32 uint16 uint8 类型
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_uint (uint16 x, uint16 y, const uint32 dat, uint8 num)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 10);
+
+ uint32 dat_temp = dat;
+ int32 offset = 1;
+ char data_buffer[12];
+ memset(data_buffer, 0, 12);
+ memset(data_buffer, ' ', num);
+
+ if(num < 10)
+ {
+ for(; num > 0; num --)
+ offset *= 10;
+ dat_temp %= offset;
+ }
+ func_uint_to_str(data_buffer, dat_temp);
+ tft180_show_string(x, y, (const char *)&data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示浮点数(去除整数部分无效的0)
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 dat 需要显示的变量，数据类型float或double
+// 参数说明 num 整数位显示长度 最高8位
+// 参数说明 pointnum 小数位显示长度 最高6位
+// 返回参数 void
+// 使用示例 tft180_show_float(0, 0, x, 2, 3); // 显示浮点数 整数显示2位 小数显示三位
+// 备注信息 特别注意当发现小数部分显示的值与你写入的值不一样的时候，
+// 可能是由于浮点数精度丢失问题导致的，这并不是显示函数的问题，
+// 有关问题的详情，请自行百度学习 浮点数精度丢失问题。
+// 负数会显示一个 ‘-’号 正数显示一个空格
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_float (uint16 x, uint16 y, const float dat, uint8 num, uint8 pointnum)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+ zf_assert(num > 0);
+ zf_assert(num <= 8);
+ zf_assert(pointnum > 0);
+ zf_assert(pointnum <= 6);
+
+ float dat_temp = dat;
+ float offset = 1.0;
+ char data_buffer[17];
+ memset(data_buffer, 0, 17);
+ memset(data_buffer, ' ', num + pointnum + 2);
+
+ if(num < 10)
+ {
+ for(; num > 0; num--)
+ offset *= 10;
+ dat_temp = dat_temp - ((int)dat_temp / (int)offset) * offset;
+ }
+ func_float_to_str(data_buffer, dat_temp, pointnum);
+ tft180_show_string(x, y, data_buffer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示二值图像 数据每八个点组成一个字节数据
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, tft180_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, tft180_y_max]
+// 返回参数 void
+// 使用示例 tft180_show_binary_image(0, 0, ov7725_image_binary[0], OV7725_W, OV7725_H, OV7725_W / 2, OV7725_H / 2);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_binary_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint8 temp = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ TFT180_CS(0);
+ tft180_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ temp = *(image + height_index * width / 8 + width_index / 8); // 读取像素点
+ if(0x80 & (temp << (width_index % 8)))
+ tft180_write_16bit_data(RGB565_WHITE);
+ else
+ tft180_write_16bit_data(RGB565_BLACK);
+ }
+ }
+ TFT180_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示 8bit 灰度图像 带二值化阈值
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, tft180_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, tft180_y_max]
+// 参数说明 threshold 二值化显示阈值 0-不开启二值化
+// 返回参数 void
+// 使用示例 tft180_show_gray_image(0, 0, mt9v03x_image[0], MT9V03X_W, MT9V03X_H, MT9V03X_W / 2, MT9V03X_H / 2, 0);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_gray_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 threshold)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint16 color = 0,temp = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ TFT180_CS(0);
+ tft180_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ temp = *(image + height_index * width + width_index); // 读取像素点
+ if(threshold == 0)
+ {
+ color = (0x001f & ((temp) >> 3)) << 11;
+ color = color | (((0x003f) & ((temp) >> 2)) << 5);
+ color = color | (0x001f & ((temp) >> 3));
+ tft180_write_16bit_data(color);
+ }
+ else if(temp < threshold)
+ tft180_write_16bit_data(RGB565_BLACK);
+ else
+ tft180_write_16bit_data(RGB565_WHITE);
+ }
+ }
+ TFT180_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示 RGB565 彩色图像
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 *image 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 参数说明 dis_width 图像显示宽度 参数范围 [0, tft180_x_max]
+// 参数说明 dis_height 图像显示高度 参数范围 [0, tft180_y_max]
+// 参数说明 color_mode 色彩模式 0-低位在前 1-高位在前
+// 返回参数 void
+// 使用示例 tft180_show_rgb565_image(0, 0, scc8660_image[0], SCC8660_W, SCC8660_H, SCC8660_W / 2, SCC8660_H / 2, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_rgb565_image (uint16 x, uint16 y, const uint16 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 color_mode)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+ zf_assert(image != NULL);
+
+ uint32 i = 0, j = 0;
+ uint16 color = 0;
+ uint32 width_index = 0, height_index = 0;
+
+ TFT180_CS(0);
+ tft180_set_region(x, y, x + dis_width - 1, y + dis_height - 1); // 设置显示区域
+
+ for(j = 0; j < dis_height; j ++)
+ {
+ height_index = j * height / dis_height;
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ color = *(image + height_index * width + width_index); // 读取像素点
+ if(color_mode)
+ color = ((color & 0xff) << 8) | (color >> 8);
+ tft180_write_16bit_data(color);
+ }
+ }
+ TFT180_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示波形
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 *wave 波形数组指针
+// 参数说明 width 波形实际宽度
+// 参数说明 value_max 波形实际最大值
+// 参数说明 dis_width 波形显示宽度 参数范围 [0, tft180_x_max]
+// 参数说明 dis_value_max 波形显示最大值 参数范围 [0, tft180_y_max]
+// 返回参数 void
+// 使用示例 tft180_show_wave(32, 64, data, 128, 64, 64, 32);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_wave (uint16 x, uint16 y, const uint16 *wave, uint16 width, uint16 value_max, uint16 dis_width, uint16 dis_value_max)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+ zf_assert(wave != NULL);
+
+ uint32 i = 0, j = 0;
+ uint32 width_index = 0, value_max_index = 0;
+
+ TFT180_CS(0);
+ tft180_set_region(x, y, x + dis_width - 1, y + dis_value_max - 1); // 设置显示区域
+ for(i = 0; i < dis_value_max; i ++)
+ {
+ for(j = 0; j < dis_width; j ++)
+ {
+ tft180_write_16bit_data(tft180_bgcolor);
+ }
+ }
+ TFT180_CS(1);
+
+ for(i = 0; i < dis_width; i ++)
+ {
+ width_index = i * width / dis_width;
+ value_max_index = *(wave + width_index) * (dis_value_max - 1) / value_max;
+ tft180_draw_point((uint16)(i + x), (uint16)((dis_value_max - 1) - value_max_index + y), tft180_pencolor);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 汉字显示
+// 参数说明 x 坐标x方向的起点 参数范围 [0, tft180_x_max-1]
+// 参数说明 y 坐标y方向的起点 参数范围 [0, tft180_y_max-1]
+// 参数说明 size 取模的时候设置的汉字字体大小 也就是一个汉字占用的点阵长宽为多少个点 取模的时候需要长宽是一样的
+// 参数说明 *chinese_buffer 需要显示的汉字数组
+// 参数说明 number 需要显示多少位
+// 参数说明 color 显示颜色
+// 返回参数 void
+// 使用示例 tft180_show_chinese(0, 0, 16, chinese_test[0], 4, RGB565_RED);//显示font文件里面的 示例
+// 备注信息 使用PCtoLCD2002软件取模 阴码、逐行式、顺向 16*16
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_show_chinese (uint16 x, uint16 y, uint8 size, const uint8 *chinese_buffer, uint8 number, const uint16 color)
+{
+ // 如果程序在输出了断言信息 并且提示出错位置在这里
+ // 那么一般是屏幕显示的时候超过屏幕分辨率范围了
+ zf_assert(x < tft180_x_max);
+ zf_assert(y < tft180_y_max);
+ zf_assert(chinese_buffer != NULL);
+
+ int i, j, k;
+ uint8 temp, temp1, temp2;
+ const uint8 *p_data;
+
+ temp2 = size / 8;
+
+ TFT180_CS(0);
+ tft180_set_region(x, y, number * size - 1 + x, y + size - 1);
+
+ for(i = 0; i < size; i ++)
+ {
+ temp1 = number;
+ p_data = chinese_buffer + i * temp2;
+ while(temp1 --)
+ {
+ for(k = 0; k < temp2; k ++)
+ {
+ for(j = 8; j > 0; j --)
+ {
+ temp = (*p_data >> (j - 1)) & 0x01;
+ if(temp) tft180_write_16bit_data(color);
+ else tft180_write_16bit_data(tft180_bgcolor);
+ }
+ p_data ++;
+ }
+ p_data = p_data - temp2 + temp2 * size;
+ }
+ }
+ TFT180_CS(1);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 初始化
+// 返回参数 void
+// 返回参数 void
+// 使用示例 tft180_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tft180_init (void)
+{
+#if TFT180_USE_SOFT_SPI
+ soft_spi_init(&tft180_spi, 0, TFT180_SOFT_SPI_DELAY, TFT180_SCL_PIN, TFT180_SDA_PIN, SOFT_SPI_PIN_NULL, SOFT_SPI_PIN_NULL);
+#else
+ spi_init(TFT180_SPI, SPI_MODE0, TFT180_SPI_SPEED, TFT180_SCL_PIN, TFT180_SDA_PIN, TFT180_SDA_PIN_IN, SPI_CS_NULL);
+#endif
+
+ gpio_init(TFT180_DC_PIN, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(TFT180_RES_PIN, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(TFT180_CS_PIN, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+ gpio_init(TFT180_BL_PIN, GPO, GPIO_HIGH, GPO_PUSH_PULL);
+
+ tft180_set_dir(tft180_display_dir);
+ tft180_set_color(tft180_pencolor, tft180_bgcolor);
+ tft180_debug_init();
+
+ TFT180_RST(0);
+ system_delay_ms(10);
+
+ TFT180_RST(1);
+ system_delay_ms(120);
+ TFT180_CS(0);
+
+ tft180_write_index(0x11);
+ system_delay_ms(120);
+
+ tft180_write_index(0xB1);
+ tft180_write_8bit_data(0x01);
+ tft180_write_8bit_data(0x2C);
+ tft180_write_8bit_data(0x2D);
+
+ tft180_write_index(0xB2);
+ tft180_write_8bit_data(0x01);
+ tft180_write_8bit_data(0x2C);
+ tft180_write_8bit_data(0x2D);
+
+ tft180_write_index(0xB3);
+ tft180_write_8bit_data(0x01);
+ tft180_write_8bit_data(0x2C);
+ tft180_write_8bit_data(0x2D);
+ tft180_write_8bit_data(0x01);
+ tft180_write_8bit_data(0x2C);
+ tft180_write_8bit_data(0x2D);
+
+ tft180_write_index(0xB4);
+ tft180_write_8bit_data(0x07);
+
+ tft180_write_index(0xC0);
+ tft180_write_8bit_data(0xA2);
+ tft180_write_8bit_data(0x02);
+ tft180_write_8bit_data(0x84);
+ tft180_write_index(0xC1);
+ tft180_write_8bit_data(0xC5);
+
+ tft180_write_index(0xC2);
+ tft180_write_8bit_data(0x0A);
+ tft180_write_8bit_data(0x00);
+
+ tft180_write_index(0xC3);
+ tft180_write_8bit_data(0x8A);
+ tft180_write_8bit_data(0x2A);
+ tft180_write_index(0xC4);
+ tft180_write_8bit_data(0x8A);
+ tft180_write_8bit_data(0xEE);
+
+ tft180_write_index(0xC5);
+ tft180_write_8bit_data(0x0E);
+
+ tft180_write_index(0x36);
+ switch(tft180_display_dir) // y x v
+ {
+ case 0: tft180_write_8bit_data(1<<7 | 1<<6 | 0<<5); break; // 竖屏模式
+ case 1: tft180_write_8bit_data(0<<7 | 0<<6 | 0<<5); break; // 竖屏模式 旋转180
+ case 2: tft180_write_8bit_data(1<<7 | 0<<6 | 1<<5); break; // 横屏模式
+ case 3: tft180_write_8bit_data(0<<7 | 1<<6 | 1<<5); break; // 横屏模式 旋转180
+ }
+
+ tft180_write_index(0xe0);
+ tft180_write_8bit_data(0x0f);
+ tft180_write_8bit_data(0x1a);
+ tft180_write_8bit_data(0x0f);
+ tft180_write_8bit_data(0x18);
+ tft180_write_8bit_data(0x2f);
+ tft180_write_8bit_data(0x28);
+ tft180_write_8bit_data(0x20);
+ tft180_write_8bit_data(0x22);
+ tft180_write_8bit_data(0x1f);
+ tft180_write_8bit_data(0x1b);
+ tft180_write_8bit_data(0x23);
+ tft180_write_8bit_data(0x37);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(0x07);
+ tft180_write_8bit_data(0x02);
+ tft180_write_8bit_data(0x10);
+
+ tft180_write_index(0xe1);
+ tft180_write_8bit_data(0x0f);
+ tft180_write_8bit_data(0x1b);
+ tft180_write_8bit_data(0x0f);
+ tft180_write_8bit_data(0x17);
+ tft180_write_8bit_data(0x33);
+ tft180_write_8bit_data(0x2c);
+ tft180_write_8bit_data(0x29);
+ tft180_write_8bit_data(0x2e);
+ tft180_write_8bit_data(0x30);
+ tft180_write_8bit_data(0x30);
+ tft180_write_8bit_data(0x39);
+ tft180_write_8bit_data(0x3f);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(0x07);
+ tft180_write_8bit_data(0x03);
+ tft180_write_8bit_data(0x10);
+
+ tft180_write_index(0x2a);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(0x00 + 2);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(0x80 + 2);
+
+ tft180_write_index(0x2b);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(0x00 + 3);
+ tft180_write_8bit_data(0x00);
+ tft180_write_8bit_data(0x80 + 3);
+
+ tft180_write_index(0xF0);
+ tft180_write_8bit_data(0x01);
+ tft180_write_index(0xF6);
+ tft180_write_8bit_data(0x00);
+
+ tft180_write_index(0x3A);
+ tft180_write_8bit_data(0x05);
+ tft180_write_index(0x29);
+ TFT180_CS(1);
+
+ tft180_clear();
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_tft180.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_tft180.h
new file mode 100644
index 0000000..f1c3b9c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_tft180.h
@@ -0,0 +1,165 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_tft180
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* SCL 查看 zf_device_tft180.h 中 TFT180_SCL_PIN 宏定义
+* SDA 查看 zf_device_tft180.h 中 TFT180_SDA_PIN 宏定义
+* RES 查看 zf_device_tft180.h 中 TFT180_RES_PIN 宏定义
+* DC 查看 zf_device_tft180.h 中 TFT180_DC_PIN 宏定义
+* CS 查看 zf_device_tft180.h 中 TFT180_CS_PIN 宏定义
+* BL 查看 zf_device_tft180.h 中 TFT180_BL_PIN 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 最大分辨率160*128
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_tft180_h_
+#define _zf_device_tft180_h_
+
+#include "zf_device_type.h"
+
+#define TFT180_USE_SOFT_SPI (0) // 默认使用硬件 SPI 方式驱动 建议使用硬件 SPI 方式驱动
+#if TFT180_USE_SOFT_SPI // 这两段 颜色正常的才是正确的 颜色灰的就是没有用的
+//====================================================软件 SPI 驱动====================================================
+#define TFT180_SOFT_SPI_DELAY (0 ) // 软件 SPI 的时钟延时周期 数值越小 SPI 通信速率越快
+#define TFT180_SCL_PIN (P15_3) // 软件 SPI SCK 引脚
+#define TFT180_SDA_PIN (P15_5) // 软件 SPI MOSI 引脚
+//====================================================软件 SPI 驱动====================================================
+#else
+//====================================================硬件 SPI 驱动====================================================
+#define TFT180_SPI_SPEED (60*1000*1000) // 硬件 SPI 速率
+#define TFT180_SPI (SPI_2) // 硬件 SPI 号
+#define TFT180_SCL_PIN (SPI2_SCLK_P15_3) // 硬件 SPI SCK 引脚
+#define TFT180_SDA_PIN (SPI2_MOSI_P15_5) // 硬件 SPI MOSI 引脚
+#define TFT180_SDA_PIN_IN (SPI2_MISO_P15_4) // 硬件 SPI MISO 引脚 TFT没有MISO引脚，但是这里任然需要定义，在spi的初始化时需要使用
+//====================================================硬件 SPI 驱动====================================================
+#endif
+
+#define TFT180_RES_PIN (P15_1) // 液晶复位引脚定义
+#define TFT180_DC_PIN (P15_0) // 液晶命令位引脚定义
+#define TFT180_CS_PIN (P15_2) // CS 片选引脚
+#define TFT180_BL_PIN (P15_4) // 液晶背光引脚定义
+
+#define TFT180_DEFAULT_DISPLAY_DIR (TFT180_PORTAIT) // 默认的显示方向
+#define TFT180_DEFAULT_PENCOLOR (RGB565_RED) // 默认的画笔颜色
+#define TFT180_DEFAULT_BGCOLOR (RGB565_WHITE) // 默认的背景颜色
+#define TFT180_DEFAULT_DISPLAY_FONT (TFT180_8X16_FONT) // 默认的字体模式
+
+#define TFT180_DC(x) ((x) ? (gpio_high(TFT180_DC_PIN)) : (gpio_low(TFT180_DC_PIN)))
+#define TFT180_RST(x) ((x) ? (gpio_high(TFT180_RES_PIN)) : (gpio_low(TFT180_RES_PIN)))
+#define TFT180_CS(x) ((x) ? (gpio_high(TFT180_CS_PIN)) : (gpio_low(TFT180_CS_PIN)))
+#define TFT180_BLK(x) ((x) ? (gpio_high(TFT180_BL_PIN)) : (gpio_low(TFT180_BL_PIN)))
+
+//=================================================定义 TFT180 参数结构体===============================================
+typedef enum
+{
+ TFT180_PORTAIT = 0, // 竖屏模式
+ TFT180_PORTAIT_180 = 1, // 竖屏模式 旋转180
+ TFT180_CROSSWISE = 2, // 横屏模式
+ TFT180_CROSSWISE_180 = 3, // 横屏模式 旋转180
+}tft180_dir_enum;
+
+typedef enum
+{
+ TFT180_6X8_FONT = 0, // 6x8 字体
+ TFT180_8X16_FONT = 1, // 8x16 字体
+ TFT180_16X16_FONT = 2, // 16x16 字体 目前不支持
+}tft180_font_size_enum;
+//=================================================定义 TFT180 参数结构体===============================================
+
+//===================================================TFT180 基础函数==================================================
+void tft180_clear (void);
+void tft180_full (const uint16 color);
+void tft180_set_dir (tft180_dir_enum dir);
+void tft180_set_font (tft180_font_size_enum font);
+void tft180_set_color (const uint16 pen, const uint16 bgcolor);
+void tft180_draw_point (uint16 x, uint16 y, const uint16 color);
+void tft180_draw_line (uint16 x_start, uint16 y_start, uint16 x_end, uint16 y_end, const uint16 color);
+
+void tft180_show_char (uint16 x, uint16 y, const char dat);
+void tft180_show_string (uint16 x, uint16 y, const char dat[]);
+void tft180_show_int (uint16 x,uint16 y, const int32 dat, uint8 num);
+void tft180_show_uint (uint16 x,uint16 y, const uint32 dat, uint8 num);
+void tft180_show_float (uint16 x,uint16 y, const float dat, uint8 num, uint8 pointnum);
+
+void tft180_show_binary_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height);
+void tft180_show_gray_image (uint16 x, uint16 y, const uint8 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 threshold);
+void tft180_show_rgb565_image (uint16 x, uint16 y, const uint16 *image, uint16 width, uint16 height, uint16 dis_width, uint16 dis_height, uint8 color_mode);
+
+void tft180_show_wave (uint16 x, uint16 y, const uint16 *wave, uint16 width, uint16 value_max, uint16 dis_width, uint16 dis_value_max);
+void tft180_show_chinese (uint16 x, uint16 y, uint8 size, const uint8 *chinese_buffer, uint8 number, const uint16 color);
+
+void tft180_init (void);
+//===================================================TFT180 基础函数==================================================
+
+//===================================================TFT180 扩展函数==================================================
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示小钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 tft180_displayimage7725(ov7725_image_binary[0], OV7725_W, OV7725_H);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define tft180_displayimage7725(p, width, height) (tft180_show_binary_image(0, 0, (p), OV7725_W, OV7725_H, (width), (height)))
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示总钻风图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 tft180_displayimage03x(mt9v03x_image[0], MT9V03X_W, MT9V03X_H);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define tft180_displayimage03x(p, width, height) (tft180_show_gray_image(0, 0, (p), MT9V03X_W, MT9V03X_H, (width), (height), 0))
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TFT180 显示凌瞳图像
+// 参数说明 p 图像数组指针
+// 参数说明 width 图像实际宽度
+// 参数说明 height 图像实际高度
+// 返回参数 void
+// 使用示例 tft180_displayimage8660(scc8660_image[0], SCC8660_W, SCC8660_H);
+// 备注信息 拓展的一键显示函数，默认无缩放，从屏幕坐标起始点开始显示
+//-------------------------------------------------------------------------------------------------------------------
+#define tft180_displayimage8660(p, width, height) (tft180_show_rgb565_image(0, 0, (p), SCC8660_W, SCC8660_H, (width), (height), 1))
+
+//===================================================TFT180 扩展函数==================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_tsl1401.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_tsl1401.c
new file mode 100644
index 0000000..3688ce9
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_tsl1401.c
@@ -0,0 +1,134 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_tsl1401
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* CLK 查看 zf_device_tsl1401.h 中 TSL1401_CLK_PIN 宏定义
+* SI 查看 zf_device_tsl1401.h 中 TSL1401_SI_PIN 宏定义
+* AO[x] 查看 zf_device_tsl1401.h 中 TSL1401_AO_PIN_BUFFER 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_driver_adc.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_pit.h"
+#include "zf_driver_uart.h"
+#include "zf_device_tsl1401.h"
+
+uint16 tsl1401_data[2][TSL1401_DATA_LEN]; // TSL1401 数据存放数组
+
+static uint8 tsl1401_init_state = 0;
+vuint8 tsl1401_finish_flag; // TSL1401 数据准备就绪标志位
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TSL1401 线阵 CCD 数据采集
+// 参数说明 void
+// 返回参数 void
+// 使用示例 tsl1401_collect_pit_handler();
+// 备注信息 该函数在 isr.c 中对应 TSL1401_PIT_INDEX 的中断服务函数调用
+//-------------------------------------------------------------------------------------------------------------------
+void tsl1401_collect_pit_handler (void)
+{
+ if(!tsl1401_init_state) return;
+
+ uint8 i = 0;
+
+ TSL1401_CLK(1);
+ TSL1401_SI (0);
+ TSL1401_CLK(0);
+ TSL1401_SI (1);
+ TSL1401_CLK(1);
+ TSL1401_SI (0);
+
+ for(i = 0; i < TSL1401_DATA_LEN; i ++)
+ {
+ TSL1401_CLK(0);
+ tsl1401_data[0][i] = adc_convert(TSL1401_AO_PIN);
+ tsl1401_data[1][i] = adc_convert(TSL1401_AO_PIN1);
+ TSL1401_CLK(1);
+ }
+
+ tsl1401_finish_flag = 1; // 采集完成标志位置1
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TSL1401 线阵 CCD 图像发送至上位机查看图像
+// 参数说明 uart_n 串口号
+// 参数说明 index 对应接入的哪个 TSL1401 [0-1]
+// 返回参数 void
+// 使用示例 tsl1401_send_data(DEBUG_UART_INDEX, 1);
+// 备注信息 调用该函数前请先初始化串口
+//-------------------------------------------------------------------------------------------------------------------
+void tsl1401_send_data (uart_index_enum uart_n, uint8 index)
+{
+ uint8 i;
+ uart_write_byte(uart_n, 0x00);
+ uart_write_byte(uart_n, 0xff);
+ uart_write_byte(uart_n, 0x01);
+ uart_write_byte(uart_n, 0x00);
+
+ for(i=0; i> 2)); break;
+ case ADC_12BIT: uart_write_byte(uart_n, (uint8)(tsl1401_data[index][i] >> 4)); break;
+ }
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 TSL1401 线阵 CCD 初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 tsl1401_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void tsl1401_init (void)
+{
+ adc_init(TSL1401_AO_PIN, TSL1401_AD_RESOLUTION);
+ adc_init(TSL1401_AO_PIN1, TSL1401_AD_RESOLUTION);
+ gpio_init(TSL1401_CLK_PIN, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ gpio_init(TSL1401_SI_PIN, GPO, GPIO_LOW, GPO_PUSH_PULL);
+ pit_ms_init(TSL1401_PIT_INDEX, TSL1401_EXPOSURE_TIME);
+ tsl1401_init_state = 1;
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_tsl1401.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_tsl1401.h
new file mode 100644
index 0000000..0af9380
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_tsl1401.h
@@ -0,0 +1,82 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_tsl1401
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* CLK 查看 zf_device_tsl1401.h 中 TSL1401_CLK_PIN 宏定义
+* SI 查看 zf_device_tsl1401.h 中 TSL1401_SI_PIN 宏定义
+* AO[x] 查看 zf_device_tsl1401.h 中 TSL1401_AO_PIN_BUFFER 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_tsl1401_h_
+#define _zf_device_tsl1401_h_
+
+#include "zf_device_type.h"
+
+//=================================================TSL1401 驱动配置====================================================
+#define TSL1401_AO_PIN (ADC0_CH4_A4) // 对应第一个 TSL1401 的 AO 引脚
+#define TSL1401_AO_PIN1 (ADC0_CH5_A5) // 对应第二个 TSL1401 的 AO 引脚
+// TSL1401 的控制引脚定义 多个 TSL1401 建议将控制引脚直接并联
+#define TSL1401_CLK_PIN (P00_0) // TSL1401 的 CLK 引脚定义
+#define TSL1401_SI_PIN (P00_1) // TSL1401 的 SI 引脚定义
+#define TSL1401_CLK(x) ((x) ? (gpio_high(TSL1401_CLK_PIN)) : (gpio_low(TSL1401_CLK_PIN)))
+#define TSL1401_SI(x) ((x) ? (gpio_high(TSL1401_SI_PIN)) : (gpio_low(TSL1401_SI_PIN)))
+
+// TSL1401 的周期采集部分定义 使用到哪个 PIT 就要把 放在哪个 PIT 的中断服务函数下
+#define TSL1401_EXPOSURE_TIME (10 ) // 定义 TSL1401 曝光时间 单位 MS
+#define TSL1401_PIT_INDEX (CCU61_CH1) // 使用周期中断
+#define TSL1401_AD_RESOLUTION (ADC_8BIT) // ADC 精度 8bit
+#define TSL1401_DATA_LEN (128 ) // TSL1401 数据长度
+//=================================================TSL1401 驱动配置====================================================
+
+
+//==============================================声明 TSL1401 数据存储变量=================================================
+extern uint16 tsl1401_data[2][TSL1401_DATA_LEN]; // TSL1401 数据存放数组
+extern vuint8 tsl1401_finish_flag; // TSL1401 数据采集完成标志
+//==============================================声明 TSL1401 数据存储变量=================================================
+
+
+//=================================================TSL1401 基础函数===================================================
+void tsl1401_collect_pit_handler (void); // TSL1401 线阵 CCD 数据采集
+void tsl1401_send_data (uart_index_enum uart_n, uint8 index); // TSL1401 线阵 CCD 图像发送至上位机查看图像
+void tsl1401_init (void); // TSL1401 线阵 CCD 初始化
+//=================================================TSL1401 基础函数===================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_type.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_type.c
new file mode 100644
index 0000000..01559f4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_type.c
@@ -0,0 +1,90 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_type
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_device_type.h"
+
+static void type_default_callback(void);
+
+camera_type_enum camera_type = NO_CAMERE; // 摄像头类型变量
+callback_function camera_dma_handler = type_default_callback; // DMA完成中断函数指针，根据初始化时设置的函数进行跳转
+callback_function camera_vsync_handler = type_default_callback; // 场中断函数指针，根据初始化时设置的函数进行跳转
+callback_function camera_uart_handler = type_default_callback; // 串口通讯中断函数指针，根据初始化时设置的函数进行跳转
+
+wireless_type_enum wireless_type = NO_WIRELESS;
+callback_function wireless_module_uart_handler = type_default_callback; // 无线串口接收中断函数指针，根据初始化时设置的函数进行跳转
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 默认回调函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 type_default_callback();
+// 备注信息 保护性冗余设计 防止在没有初始化设备的时候跑飞
+//-------------------------------------------------------------------------------------------------------------------
+static void type_default_callback (void)
+{
+
+}
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置摄像头类型
+// 参数说明 type_set 选定的摄像头类型
+// 返回参数 void
+// 使用示例 set_camera_type(CAMERA_GRAYSCALE);
+// 备注信息 一般由各摄像头初始化内部调用
+//-------------------------------------------------------------------------------------------------------------------
+void set_camera_type (camera_type_enum type_set, callback_function vsync_callback, callback_function dma_callback, callback_function uart_callback)
+{
+ camera_type = type_set;
+ if(vsync_callback == NULL) camera_dma_handler = type_default_callback;
+ else camera_dma_handler = dma_callback;
+ if(dma_callback == NULL) camera_vsync_handler = type_default_callback;
+ else camera_vsync_handler = vsync_callback;
+ if(uart_callback == NULL) camera_uart_handler = type_default_callback;
+ else camera_uart_handler = uart_callback;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置无线模块类型
+// 参数说明 type_set 选定的无线模块类型
+// 返回参数 void
+// 使用示例 set_wireless_type(WIRELESS_UART);
+// 备注信息 一般由各摄像头初始化内部调用
+//-------------------------------------------------------------------------------------------------------------------
+void set_wireless_type (wireless_type_enum type_set, callback_function uart_callback)
+{
+ wireless_type = type_set;
+ if(uart_callback == NULL) wireless_module_uart_handler = type_default_callback;
+ else wireless_module_uart_handler = uart_callback;
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_type.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_type.h
new file mode 100644
index 0000000..57278bf
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_type.h
@@ -0,0 +1,77 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_type
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_device_type_h_
+#define _zf_device_type_h_
+
+#include "zf_common_debug.h"
+
+//==============================================定义 外设 枚举体==================================================
+typedef enum
+{
+ NO_CAMERE = 0, // 无摄像头
+ CAMERA_BIN_IIC, // 小钻风 IIC 版本
+ CAMERA_BIN_UART, // 小钻风 UART 版本
+ CAMERA_GRAYSCALE, // 总钻风
+ CAMERA_COLOR, // 凌瞳
+}camera_type_enum;
+
+typedef enum
+{
+ NO_WIRELESS = 0, // 无设备
+ WIRELESS_UART, // 无线串口
+ BLUETOOTH_CH9141, // 蓝牙 CH9141
+ WIFI_UART,
+}wireless_type_enum;
+//==============================================定义 外设 枚举体==================================================
+
+typedef void (*callback_function)(void);
+
+//===========================================声明回调函数指针及外设类型==================================================
+extern wireless_type_enum wireless_type;
+extern callback_function wireless_module_uart_handler; // 无线串口接收中断函数指针，根据初始化时设置的函数进行跳转
+
+extern camera_type_enum camera_type;
+extern callback_function camera_dma_handler; // 串口通讯中断函数指针，根据初始化时设置的函数进行跳转
+extern callback_function camera_vsync_handler; // 串口通讯中断函数指针，根据初始化时设置的函数进行跳转
+extern callback_function camera_uart_handler; // 串口通讯中断函数指针，根据初始化时设置的函数进行跳转
+//===========================================声明回调函数指针及外设类型==================================================
+
+//=============================================中断回调 基础函数===================================================
+void set_camera_type (camera_type_enum type_set, callback_function vsync_callback, callback_function dma_callback, callback_function uart_callback);
+void set_wireless_type (wireless_type_enum type_set, callback_function uart_callback);
+//=============================================中断回调 基础函数===================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_virtual_oscilloscope.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_virtual_oscilloscope.c
new file mode 100644
index 0000000..90075a8
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_virtual_oscilloscope.c
@@ -0,0 +1,103 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_virtual_oscilloscope
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_device_virtual_oscilloscope.h"
+
+uint8 virtual_oscilloscope_data[10];
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 CRC 校验
+// 参数说明 buff 需要进行 CRC 计算的数据地址
+// 参数说明 crc_cnt 需要进行 CRC 计算的数据个数
+// 返回参数 uint16 CRC 校验结果
+// 使用示例 crc_16 = crc_check(virtual_oscilloscope_data, 8);
+// 备注信息 内部使用 用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static uint16 crc_check (uint8 *buff, uint8 crc_cnt)
+{
+ uint16 crc_temp;
+ uint8 i, j;
+ crc_temp = 0xffff;
+
+ for(i = 0; i < crc_cnt; i ++)
+ {
+ crc_temp ^= buff[i];
+ for(j = 0; j < 8; j ++)
+ {
+ if (crc_temp & 0x01)
+ {
+ crc_temp = (crc_temp >> 1) ^ 0xa001;
+ }
+ else
+ {
+ crc_temp = crc_temp >> 1;
+ }
+ }
+ }
+ return(crc_temp);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 虚拟示波器数据转换函数
+// 参数说明 data1 要发送的第一个数据
+// 参数说明 data2 要发送的第二个数据
+// 参数说明 data3 要发送的第三个数据
+// 参数说明 data4 要发送的第四个数据
+// 返回参数 void
+// 使用示例 uint8 data_buffer[10];
+// virtual_oscilloscope_data_conversion(100, 200, 300, 400, data_buffer);
+// wireless_uart_send_buff(data_buffer, 10);
+// 备注信息 这个函数不带发送 他只是处理数据
+//-------------------------------------------------------------------------------------------------------------------
+void virtual_oscilloscope_data_conversion (const int16 data1, const int16 data2, const int16 data3, const int16 data4)
+{
+ uint16 crc_16 = 0;
+
+ virtual_oscilloscope_data[0] = (uint8)((uint16)data1 & 0xff);
+ virtual_oscilloscope_data[1] = (uint8)((uint16)data1 >> 8);
+
+ virtual_oscilloscope_data[2] = (uint8)((uint16)data2 & 0xff);
+ virtual_oscilloscope_data[3] = (uint8)((uint16)data2 >> 8);
+
+ virtual_oscilloscope_data[4] = (uint8)((uint16)data3 & 0xff);
+ virtual_oscilloscope_data[5] = (uint8)((uint16)data3>>8);
+
+ virtual_oscilloscope_data[6] = (uint8)((uint16)data4 & 0xff);
+ virtual_oscilloscope_data[7] = (uint8)((uint16)data4 >> 8);
+
+ crc_16 = crc_check(virtual_oscilloscope_data, 8);
+ virtual_oscilloscope_data[8] = (uint8)(crc_16 & 0xff);
+ virtual_oscilloscope_data[9] = (uint8)(crc_16 >> 8);
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_virtual_oscilloscope.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_virtual_oscilloscope.h
new file mode 100644
index 0000000..6b5690c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_virtual_oscilloscope.h
@@ -0,0 +1,47 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_virtual_oscilloscope
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_device_virtual_oscilloscope_h_
+#define _zf_device_virtual_oscilloscope_h_
+
+#include "zf_common_typedef.h"
+
+extern uint8 virtual_oscilloscope_data[10];
+
+void virtual_oscilloscope_data_conversion (const int16 data1, const int16 data2, const int16 data3, const int16 data4);
+
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_wifi_uart.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_wifi_uart.c
new file mode 100644
index 0000000..47a6f17
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_wifi_uart.c
@@ -0,0 +1,1210 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_wifi_uart
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* RX 查看 zf_device_wifi_uart.h 中 WIFI_UART_RX_PIN 宏定义
+* TX 查看 zf_device_wifi_uart.h 中 WIFI_UART_TX_PIN 宏定义
+* RTS 查看 zf_device_wifi_uart.h 中 WIFI_UART_RTS_PIN 宏定义
+* RST 查看 zf_device_wifi_uart.h 中 WIFI_UART_RST_PIN 宏定义
+* VCC 5V 电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+*********************************************************************************************************************/
+
+#include "zf_common_clock.h"
+#include "zf_common_debug.h"
+#include "zf_common_fifo.h"
+#include "zf_common_function.h"
+#include "zf_common_interrupt.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_uart.h"
+#include "zf_device_type.h"
+#include "zf_device_wifi_uart.h"
+
+#define WAIT_TIME_OUT (10000) // 单指令等待时间 单位：ms
+
+wifi_uart_information_struct wifi_uart_information; // 模块自身参数
+
+static fifo_struct wifi_uart_fifo;
+static uint8 wifi_uart_buffer[WIFI_UART_BUFFER_SIZE]; // 数据存放数组
+static uint8 wifi_uart_data;
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 等待模块响应
+// 参数说明 *wait_buffer 等待的响应的字符串
+// 参数说明 timeout 超时时间
+// 返回参数 uint8 0：模块响应指定数据 1：模块未响应指定数据或超时
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_wait_ack (char *wait_buffer, uint32 timeout)
+{
+ uint8 return_state = 1;
+ char receiver_buffer[8] = {0, 0, 0, 0, 0, 0, 0, 0};
+ uint32 receiver_len = 8;
+
+ do
+ {
+ system_delay_ms(1);
+ // 判断接收缓冲区内是否有需要响应的指定数据 如果有 则跳出循环并且返回0
+ receiver_len = 8;
+ fifo_read_tail_buffer(&wifi_uart_fifo, (uint8 *)receiver_buffer, &receiver_len, FIFO_READ_ONLY);
+ if(strstr(receiver_buffer, wait_buffer))
+ {
+ return_state = 0;
+ break;
+ }
+ else if(strstr(receiver_buffer, "ERROR") || strstr(receiver_buffer, "busy"))
+ {
+ // 如果接收到报错或者模块忙 则跳出循环并且返回1
+ return_state = 1;
+ break;
+ }
+ }while(timeout --);
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 清除WiFi接收缓冲区内容
+// 参数说明 void
+// 返回参数 void
+// 使用示例 wifi_uart_clear_receive_buffer();
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static void wifi_uart_clear_receive_buffer (void)
+{
+ // 清空WiFi接收缓冲区
+ fifo_clear(&wifi_uart_fifo);
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 模块数据解析
+// 参数说明 *target_buffer 目标存放地址指针 字符串数组
+// 参数说明 *origin_buffer 数据来源地址指针 字符串数组
+// 参数说明 start_char 起始提取字节 例如从 "1234" 中从 '2' 开始提取 就应该填入 '2'
+// 参数说明 end_char 结束提取字节 例如从 "1234" 中在 '4' 结束提取 就应该填入 '\0'(0x00 空字符 一般是字符串结尾)
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_data_parse(wifi_uart_information.mac, wifi_uart_receive_buffer, '"', '"'); // 调用获取本机mac地址后，调用此函数提取mac地址
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_data_parse (uint8 *target_buffer, uint8 *origin_buffer, char start_char, char end_char)
+{
+ uint8 return_state = 0;
+ char *location1;
+ char *location2;
+ location1 = strchr((char *)origin_buffer, start_char);
+ if(location1)
+ {
+ location1 ++;
+ location2 = strchr(location1, end_char);
+ if(location2)
+ {
+ memcpy(target_buffer, location1, location2-location1);
+ }
+ else
+ {
+ return_state = 1;
+ }
+ }
+ else
+ {
+ return_state = 1;
+ }
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 查看模块版本信息
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_get_version();
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_get_version (void)
+{
+ char *location1;
+ uint8 return_state = 0;
+ uint8 receiver_buffer[256];
+ uint32 receiver_len = 256;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+GMR\r\n");
+ do
+ {
+
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ break;
+ }
+
+ fifo_read_buffer(&wifi_uart_fifo, receiver_buffer, &receiver_len, FIFO_READ_ONLY);
+ location1 = strrchr((char *)receiver_buffer, ':');
+ if(wifi_data_parse(wifi_uart_information.wifi_uart_version, (uint8 *)location1, ':', '('))
+ {
+ return_state = 1;
+ break;
+ }
+ }while(0);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 模块回显设置
+// 参数说明 model 0:关闭模块的回写功能 其他：开启模块回写
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_echo_set("1");//开启模块回写功能
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_echo_set (char *model)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "ATE");
+ uart_write_string(WIFI_UART_INDEX, model);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 设置模块的串口配置
+// 参数说明 baudrate 波特率 支持范围为 80 ~ 5000000
+// 参数说明 databits 数据位 5：5 bit 数据位----6：6 bit 数据位----7：7 bit 数据位----8：8 bit 数据位
+// 参数说明 stopbits 停止位 1：1 bit 停止位----2：1.5 bit 停止位----3：2 bit 停止位
+// 参数说明 parity 校验位 0：None----1：Odd----2：Even
+// 参数说明 flow_control 流控 0：不使能流控----1：使能 RTS----2：使能 CTS----3：同时使能 RTS 和 CTS
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_uart_config_set("115200", "8", "1", "0", "1");
+// 备注信息 内部调用 临时设置 掉电不保存
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_uart_config_set (char *baudrate, char *databits, char *stopbits, char *parity, char *flow_control)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+UART_CUR=");
+ uart_write_string(WIFI_UART_INDEX, baudrate);
+ uart_write_string(WIFI_UART_INDEX, ",");
+ uart_write_string(WIFI_UART_INDEX, databits);
+ uart_write_string(WIFI_UART_INDEX, ",");
+ uart_write_string(WIFI_UART_INDEX, stopbits);
+ uart_write_string(WIFI_UART_INDEX, ",");
+ uart_write_string(WIFI_UART_INDEX, parity);
+ uart_write_string(WIFI_UART_INDEX, ",");
+ uart_write_string(WIFI_UART_INDEX, flow_control);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 查询模块自身 的 MAC 地址
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 if(wifi_uart_get_mac()){}
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_get_mac (void)
+{
+ uint8 return_state = 0;
+ uint8 receiver_buffer[64];
+ uint32 receiver_len = 64;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPAPMAC?\r\n");
+ do
+ {
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ break;
+ }
+
+ fifo_read_buffer(&wifi_uart_fifo, receiver_buffer, &receiver_len, FIFO_READ_ONLY);
+ if(wifi_data_parse(wifi_uart_information.wifi_uart_mac, receiver_buffer, '"', '"'))
+ {
+ return_state = 1;
+ break;
+ }
+ }while(0);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 查询模块或者目标WIFI 的 IP 地址(取决于模块当前的工作模式)
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 if(wifi_uart_get_ip()){}
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_get_ip (void)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ if(wifi_uart_information.wifi_uart_mode == WIFI_UART_STATION)
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSTA?\r\n");
+ }
+ else if(wifi_uart_information.wifi_uart_mode == WIFI_UART_SOFTAP)
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPAP?\r\n");
+ }
+
+ do
+ {
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ break;
+ }
+ uint8 receiver_buffer[128];
+ uint32 receiver_len = 128;
+ fifo_read_buffer(&wifi_uart_fifo, receiver_buffer, &receiver_len, FIFO_READ_ONLY);
+ if(wifi_data_parse(wifi_uart_information.wifi_uart_local_ip, receiver_buffer, '"', '"'))
+ {
+ return_state = 1;
+ break;
+ }
+ }while(0);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 查询模块的相关信息
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 if(wifi_uart_get_information()){}
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_get_information (void)
+{
+ uint8 return_state = 0;
+ do
+ {
+ // 获取模块版本号
+ if(wifi_uart_get_version())
+ {
+ return_state = 1;
+ break;
+ }
+ // 获取模块IP地址
+ if(wifi_uart_get_ip())
+ {
+ return_state = 1;
+ break;
+ }
+ // 获取模块MAC信息
+ if(wifi_uart_get_mac())
+ {
+ return_state = 1;
+ break;
+ }
+ memcpy(wifi_uart_information.wifi_uart_local_port, "no port", 7);
+ }while(0);
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 连接 WiFi
+// 参数说明 wifi_ssid WiFi名称
+// 参数说明 pass_word WiFi密码
+// 参数说明 model 0:查询WiFi连接情况 其他：连接WiFi
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_get_or_connect_wifi("WiFi_name", "Pass_word", 1);
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_set_wifi (char *wifi_ssid, char *pass_word)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ if(wifi_uart_information.wifi_uart_mode == WIFI_UART_SOFTAP)
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CWSAP=\"");
+ uart_write_string(WIFI_UART_INDEX, wifi_ssid);
+ uart_write_string(WIFI_UART_INDEX, "\",\"");
+ uart_write_string(WIFI_UART_INDEX, pass_word);
+ uart_write_string(WIFI_UART_INDEX, "\",5,3\r\n");
+ }
+ else
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CWJAP=\"");
+ uart_write_string(WIFI_UART_INDEX, wifi_ssid);
+ uart_write_string(WIFI_UART_INDEX, "\",\"");
+ uart_write_string(WIFI_UART_INDEX, pass_word);
+ uart_write_string(WIFI_UART_INDEX, "\"\r\n");
+ }
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 上电是否自动连接WiFi
+// 参数说明 model 0:上电不自动连接wifi 其他：上电自动连接wifi
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_auto_connect_wifi(0); //上电不自动连接wifi
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_auto_connect_wifi (char *model)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CWAUTOCONN=");
+ uart_write_string(WIFI_UART_INDEX, model);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 设置连接模式
+// 参数说明 model 0: 单连接模式 1：多连接模式
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_set_connect_model("1");
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_set_connect_model (char *model)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPMUX=");
+ uart_write_string(WIFI_UART_INDEX, model);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 设置传输模式
+// 参数说明 model – 0: 普通传输模式 IP断开后不重新连接
+// – 1: Wi-Fi 透传接收模式，仅支持 TCP 单连接、UDP 固定通信对端、SSL 单连接的情况 IP断开后会不断尝试重新连接
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_set_transfer_model("1");
+// 备注信息 内部调用
+//--------------------------------------------------------------------------------------------------
+static uint8 wifi_uart_set_transfer_model (char *model)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPMODE=");
+ uart_write_string(WIFI_UART_INDEX, model);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 模块软件复位
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_soft_reset();
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_soft_reset (void)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "+++");
+ system_delay_ms(100);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+ system_delay_ms(100);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+RST\r\n");
+ return_state = wifi_uart_wait_ack("ready", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 模块硬件复位
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_reset();
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_reset (void)
+{
+#if WIFI_UART_HARDWARE_RST
+ uint8 return_state = 0;
+
+ gpio_set_level(WIFI_UART_RST_PIN, 0);
+ system_delay_ms(50);
+ gpio_set_level(WIFI_UART_RST_PIN, 1);
+ system_delay_ms(200);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ return_state = wifi_uart_wait_ack("ready", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+#else
+ return wifi_uart_soft_reset();
+#endif
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 设置模块模式 (Station/SoftAP/Station+SoftAP)
+// 参数说明 state 0:无 Wi-Fi 模式，并且关闭 Wi-Fi RF----1: Station 模式----2: SoftAP 模式----3: SoftAP+Station 模式
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_set_model("1");
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_set_model (wifi_uart_mode_enum mode)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ if(mode == WIFI_UART_SOFTAP)
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CWMODE=2\r\n");
+ }
+ else
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CWMODE=1\r\n");
+ }
+ // 设置模块工作模式
+ wifi_uart_information.wifi_uart_mode = mode;
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 断开与wifi的连接
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_disconnected_wifi();
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_disconnected_wifi (void)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CWQAP\r\n");
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 进入打开透传模式
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_entry_serianet();
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_entry_serianet (void)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSEND\r\n");
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 退出透传模式
+// 参数说明 model 0:关闭透传模式 其他：开启透传模式
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_exit_serianet();
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_exit_serianet (void)
+{
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ system_delay_ms(20);
+ uart_write_string(WIFI_UART_INDEX, "+++");
+ system_delay_ms(1000);
+
+ return 0;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 建立TCP连接
+// 参数说明 ip 远端 IPv4 地址、IPv6 地址，或域名
+// 参数说明 port 远端端口值
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_connect_tcp_servers("192.168.101.110", "8080");
+// 备注信息 如果总是连接不上电脑的TCP服务器 可以尝试使用网线连接电脑
+// 如果是使用WiFi连接 可能会导致模块连接TCP服务器等待较长时间
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_connect_tcp_servers (char *ip, char *port, wifi_uart_transfer_mode_enum mode)
+{
+ zf_assert(ip != NULL);
+ zf_assert(port != NULL);
+
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ do
+ {
+ if(wifi_uart_set_connect_model("0"))
+ {
+ return_state = 1;
+ break;
+ }
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSTARTEX=\"TCP\",\"");
+ uart_write_string(WIFI_UART_INDEX, ip);
+ uart_write_string(WIFI_UART_INDEX, "\",");
+ uart_write_string(WIFI_UART_INDEX, port);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ wifi_uart_information.wifi_uart_connect_state = WIFI_UART_SERVER_OFF;
+ break;
+ }
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ // 设置传输模式
+ if(wifi_uart_set_transfer_model(mode == WIFI_UART_COMMAND ? "0" : "1"))
+ {
+ return_state = 1;
+ break;
+ }
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSTATE?\r\n");
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ break;
+ }
+ else
+ {
+ uint8 receiver_buffer[128];
+ uint32 receiver_len = 128;
+ fifo_read_buffer(&wifi_uart_fifo, receiver_buffer, &receiver_len, FIFO_READ_ONLY);
+ char* buffer_index = (char *)receiver_buffer;
+ char* end_index;
+
+ buffer_index += 22;
+ buffer_index += strlen(ip);
+ buffer_index += strlen(port);
+ end_index = strchr(buffer_index, ',');
+
+ memcpy(wifi_uart_information.wifi_uart_local_port, " ", 9);
+ memcpy(wifi_uart_information.wifi_uart_local_port, buffer_index, (end_index - buffer_index));
+ }
+
+ wifi_uart_information.wifi_uart_connect_state = WIFI_UART_SERVER_ON;
+ wifi_uart_information.wifi_uart_connect_mode = WIFI_UART_TCP_CLIENT;
+ wifi_uart_information.wifi_uart_transfer_mode = mode;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ if(mode == WIFI_UART_SERIANET) // 透传模式下直接开启透传
+ {
+ if(wifi_uart_entry_serianet())
+ {
+ return_state = 1;
+ break;
+ }
+ }
+ wifi_uart_send_buffer((uint8 *)"TCP connect!", 12);
+ }while(0);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 建立UDP连接
+// 参数说明 *ip 远端 IPv4 地址、IPv6 地址 或域名 字符串形式
+// 参数说明 *port 远端端口值 字符串形式
+// 参数说明 *local_port 远端 IPv4 地址、IPv6 地址 或域名 字符串形式
+// 参数说明 mode 模块数据通信模式
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_connect_udp_client("192.168.101.110", "8080", "8080", WIFI_UART_COMMAND);
+// 备注信息 自动分配ID
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_connect_udp_client (char *ip, char *port, char *local_port, wifi_uart_transfer_mode_enum mode)
+{
+ zf_assert(ip != NULL);
+ zf_assert(port != NULL);
+ zf_assert(local_port != NULL);
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ do
+ {
+ if(wifi_uart_set_connect_model("0"))
+ {
+ return_state = 1;
+ break;
+ }
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSTARTEX=\"UDP\",\"");
+ uart_write_string(WIFI_UART_INDEX, ip);
+ uart_write_string(WIFI_UART_INDEX, "\",");
+ uart_write_string(WIFI_UART_INDEX, port);
+ uart_write_string(WIFI_UART_INDEX, ",");
+ uart_write_string(WIFI_UART_INDEX, local_port);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ wifi_uart_information.wifi_uart_connect_state = WIFI_UART_SERVER_OFF;
+ break;
+ }
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ if(wifi_uart_set_transfer_model(mode == WIFI_UART_COMMAND ? "0" : "1")) // 设置传输模式
+ {
+ return_state = 1;
+ break;
+ }
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ if(mode == WIFI_UART_SERIANET) // 透传模式下直接开启透传
+ {
+ if(wifi_uart_entry_serianet())
+ {
+ return_state = 1;
+ break;
+ }
+ }
+ memcpy(wifi_uart_information.wifi_uart_local_port, " ", 7);
+ memcpy(wifi_uart_information.wifi_uart_local_port, local_port, strlen(local_port));
+ wifi_uart_information.wifi_uart_connect_state = WIFI_UART_SERVER_ON;
+ wifi_uart_information.wifi_uart_connect_mode = WIFI_UART_UDP_CLIENT;
+ wifi_uart_information.wifi_uart_transfer_mode = mode;
+ wifi_uart_send_buffer((uint8 *)"UDP connect!", 12);
+ }while(0);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 断开连接 TCP Server 使用本接口将会断开所有连接
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_disconnect_link();
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_disconnect_link (void)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ do
+ {
+ if(WIFI_UART_TCP_SERVER == wifi_uart_information.wifi_uart_connect_mode)
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPCLOSE=5\r\n");
+ }
+ else
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPCLOSE\r\n");
+ }
+
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ wifi_uart_information.wifi_uart_connect_state = WIFI_UART_SERVER_OFF;
+ break;
+ }
+ }while(0);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 TCP Server 断开指定连接 TCP/UDP Client 将不会有反应
+// 参数说明 link_id 将要断开的目标连接
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_disconnect_link_with_id(WIFI_UART_LINK_0);
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_disconnect_link_with_id (wifi_uart_link_id_enum link_id)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ do
+ {
+ if(WIFI_UART_TCP_SERVER == wifi_uart_information.wifi_uart_connect_mode)
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPCLOSE=");
+ uart_write_byte(WIFI_UART_INDEX, link_id + 0x30);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+ }
+ else
+ {
+ return_state = 1;
+ break;
+ }
+
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ wifi_uart_information.wifi_uart_connect_state = WIFI_UART_SERVER_OFF;
+ break;
+ }
+ }while(0);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 建立 TCP 服务器
+// 参数说明 *port 端口值 字符串形式
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_entry_tcp_servers("80");
+// 备注信息 自动分配ID
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_entry_tcp_servers (char *port)
+{
+ zf_assert(port != NULL);
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ do
+ {
+ if(wifi_uart_set_transfer_model("0")) // 设置传输模式为普通传输模式
+ {
+ return_state = 1;
+ break;
+ }
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ if(wifi_uart_set_connect_model("1")) // 设置连接模式为多连接模式
+ {
+ return_state = 1;
+ break;
+ }
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSERVER=1,");
+ uart_write_string(WIFI_UART_INDEX, port);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT))
+ {
+ return_state = 1;
+ wifi_uart_information.wifi_uart_connect_state = WIFI_UART_SERVER_OFF;
+ break;
+ }
+ memcpy(wifi_uart_information.wifi_uart_local_port, " ", 7);
+ memcpy(wifi_uart_information.wifi_uart_local_port, port, strlen(port));
+ wifi_uart_information.wifi_uart_connect_state = WIFI_UART_SERVER_ON;
+ wifi_uart_information.wifi_uart_transfer_mode = WIFI_UART_COMMAND;
+ wifi_uart_information.wifi_uart_connect_mode = WIFI_UART_TCP_SERVER;
+ }while(0);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 关闭 TCP 服务器
+// 参数说明 void
+// 返回参数 uint8 0：成功 1：失败
+// 使用示例 wifi_uart_exit_tcp_servers();
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_exit_tcp_servers (void)
+{
+ uint8 return_state = 0;
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSERVER=0,1\r\n");
+ return_state = wifi_uart_wait_ack("OK", WAIT_TIME_OUT);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ return return_state;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 TCP Server 模式下检查当前链接数量 并获取 IP
+// 参数说明 void
+// 返回参数 uint8 当前建立的连接数量
+// 使用示例 wifi_uart_tcp_servers_check_link();
+// 备注信息
+//--------------------------------------------------------------------------------------------------
+uint8 wifi_uart_tcp_servers_check_link (void)
+{
+ uint8 return_value = 0;
+ uint8 loop_temp = 0;
+ uint8 linke_index = 0;
+
+ uint8 receiver_buffer[256];
+ uint32 receiver_len = 256;
+
+ char* buffer_index;
+ char* start_index;
+ char* end_index;
+
+ for(loop_temp = 0; loop_temp < 5; loop_temp ++)
+ {
+ memset(wifi_uart_information.wifi_uart_remote_ip[loop_temp], 0, 15);
+ }
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSTATE?\r\n");
+
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT) == 0)
+ {
+ fifo_read_buffer(&wifi_uart_fifo, receiver_buffer, &receiver_len, FIFO_READ_ONLY);
+ buffer_index = (char *)receiver_buffer;
+ for(loop_temp = 0; loop_temp < 5; loop_temp ++)
+ {
+ start_index = strchr(buffer_index, ':');
+ if(NULL == start_index)
+ {
+ break;
+ }
+ start_index ++;
+ linke_index = *(start_index) - 0x30;
+ start_index += 9;
+ end_index = strchr((const char *)(start_index), '"');
+ memset(wifi_uart_information.wifi_uart_remote_ip[linke_index], 0, 15);
+ memcpy(wifi_uart_information.wifi_uart_remote_ip[linke_index], start_index, (end_index - start_index));
+ buffer_index = end_index;
+ }
+ }
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ return return_value;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 WiFi 模块 发送函数
+// 参数说明 buff 需要发送的数据地址
+// 参数说明 len 发送长度
+// 返回参数 uint16 剩余未发送数据长度
+// 使用示例 wifi_uart_send_buffer("123", 3);
+// 备注信息 当模块作为TCP服务器时，发送数据函数默认将数据发送至第一个连接模块的客户端
+//-------------------------------------------------------------------------------------------------------------------
+uint32 wifi_uart_send_buffer (uint8 *buff, uint32 len)
+{
+ zf_assert(buff != NULL);
+ int32 timeout = WAIT_TIME_OUT;
+
+ char lenth[32] = {0};
+
+ if(wifi_uart_information.wifi_uart_connect_state == WIFI_UART_SERVER_ON)
+ {
+ if(wifi_uart_information.wifi_uart_transfer_mode == WIFI_UART_COMMAND)
+ {
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ func_int_to_str(lenth,len);
+ if(len > 8192)
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSENDL=");
+ }
+ else
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSEND=");
+ }
+ if(wifi_uart_information.wifi_uart_connect_mode == WIFI_UART_TCP_SERVER)
+ {
+ uart_write_string(WIFI_UART_INDEX, "0,");
+ }
+
+ uart_write_string(WIFI_UART_INDEX, lenth);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT) == 0) // 等待模块响应
+ {
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_buffer(WIFI_UART_INDEX, buff, len);
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT) == 0) // 等待模块响应
+ {
+ len = 0;
+ }
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ }
+
+ }
+ else
+ {
+ while(len--)
+ {
+ while(gpio_get_level(WIFI_UART_RTS_PIN) && 0 < timeout -- ); // 如果RTS为低电平，则发送数据
+ if(0 >= timeout)
+ {
+ break;
+ }
+ uart_write_byte(WIFI_UART_INDEX, *buff); // 发送最后的数据
+ buff ++;
+ }
+ }
+ }
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ return len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 WiFi 模块作为 TCP 服务器 向指定目标设备发送函数
+// 参数说明 buff 需要发送的数据地址
+// 参数说明 len 发送长度
+// 参数说明 id 目标 client id
+// 返回参数 uint16 剩余未发送数据长度
+// 使用示例 wifi_uart_tcp_servers_send_buffer("123", 3, WIFI_UART_LINK_0);
+// 备注信息 当模块作为TCP服务器时，发送数据函数默认将数据发送至第一个连接模块的客户端
+//-------------------------------------------------------------------------------------------------------------------
+uint32 wifi_uart_tcp_servers_send_buffer (uint8 *buff, uint32 len, wifi_uart_link_id_enum id)
+{
+ zf_assert(buff != NULL);
+ char lenth[32] = {0};
+
+ if( wifi_uart_information.wifi_uart_transfer_mode == WIFI_UART_COMMAND && \
+ wifi_uart_information.wifi_uart_connect_mode == WIFI_UART_TCP_SERVER)
+ {
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+
+ func_int_to_str(lenth,len);
+ if(len > 8192)
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSENDL=");
+ }
+ else
+ {
+ uart_write_string(WIFI_UART_INDEX, "AT+CIPSEND=");
+ }
+
+ uart_write_byte(WIFI_UART_INDEX, (id + '0'));
+ uart_write_string(WIFI_UART_INDEX, ",");
+
+ uart_write_string(WIFI_UART_INDEX, lenth);
+ uart_write_string(WIFI_UART_INDEX, "\r\n");
+
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT) == 0) // 等待模块响应
+ {
+ // 模块允许发送数据
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ uart_write_buffer(WIFI_UART_INDEX, buff, len);
+ if(wifi_uart_wait_ack("OK", WAIT_TIME_OUT) == 0) // 等待模块响应
+ {
+ len = 0;
+ }
+ }
+ }
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ return len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 WiFi 模块数据接收函数
+// 参数说明 buffer 接收数据的存放地址
+// 参数说明 len 数组长度，可直接填写或者使用sizeof求得
+// 返回参数 uint16 返回实际接收到的数据长度
+// 使用示例 uint8 test_buffer[256]; wifi_uart_read_buffer(&test_buffer[0], sizeof(test_buffer));
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 wifi_uart_read_buffer (uint8 *buffer, uint32 len)
+{
+ zf_assert(buffer != NULL);
+ uint32 read_len = len;
+ fifo_read_buffer(&wifi_uart_fifo, buffer, &read_len, FIFO_READ_AND_CLEAN);
+ return read_len;
+}
+
+//--------------------------------------------------------------------------------------------------
+// 函数简介 WiFi 串口回调函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 wireless_uart_callback();
+// 备注信息 该函数在 ISR 文件 串口中断程序被调用
+// 由串口中断服务函数调用 wireless_module_uart_handler() 函数
+// 再由 wireless_module_uart_handler() 函数调用本函数
+//--------------------------------------------------------------------------------------------------
+void wifi_uart_callback (void)
+{
+ uart_query_byte(WIFI_UART_INDEX, &wifi_uart_data); // 读取串口数据
+ fifo_write_buffer(&wifi_uart_fifo, &wifi_uart_data, 1); // 存入 FIFO
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 WiFi 模块初始化
+// 参数说明 *wifi_ssid 目标连接的 WiFi 的名称 字符串形式
+// 参数说明 *pass_word 目标连接的 WiFi 的密码 字符串形式
+// 参数说明 wifi_mode 模块的工作模式 参照 zf_device_wireless_uart.h 中 wifi_uart_mode_enum 枚举
+// 返回参数 uint8 模块初始化状态 0-成功 1-错误
+// 使用示例 wifi_uart_init("SEEKFREE_2.4G", "SEEKFREEV2", WIFI_UART_STATION);
+// 备注信息 初始化会首先设置串口配置，之后会对模块进行基本参数配置
+// 具体的配置信息可以在 zf_device_wireless_uart.h 文件中修改
+//-------------------------------------------------------------------------------------------------------------------
+uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi_mode)
+{
+ zf_assert(wifi_ssid != NULL);
+ zf_assert(pass_word != NULL);
+ char uart_baud[32] = {0};
+ uint8 return_state = 0;
+
+ // 设置模块类型
+ set_wireless_type(WIFI_UART, wifi_uart_callback);
+ fifo_init(&wifi_uart_fifo, FIFO_DATA_8BIT, wifi_uart_buffer, WIFI_UART_BUFFER_SIZE);
+ gpio_init(WIFI_UART_RTS_PIN, GPI, 0, GPI_PULL_UP); // 初始化流控引脚
+#if WIFI_UART_HARDWARE_RST
+ gpio_init(WIFI_UART_RST_PIN, GPO, 1, GPO_PUSH_PULL); // 初始化复位引脚
+#endif
+ uart_init(WIFI_UART_INDEX, 115200, WIFI_UART_RX_PIN, WIFI_UART_TX_PIN); // 初始化WiFi模块所使用的串口
+ uart_rx_interrupt(WIFI_UART_INDEX, 1);
+ do
+ {
+ if(wifi_uart_reset()) // 重启模块
+ {
+ // 检查一下 RST 引脚的连接
+ // 如果没有接 RST 引脚又启用了硬件复位
+ // 就会一直报错
+ // 如果禁用了硬件复位 使用软件复位
+ // 反复报错无法复位的话就断电重启一下
+ zf_log(0, "reset failed");
+ return_state = 1;
+ break;
+ }
+ func_int_to_str(uart_baud, WIFI_UART_BAUD); // 更改WiFi模块所使用的波尔率参数
+ if(wifi_uart_uart_config_set(uart_baud, "8", "1", "0", "1")) // 调用接口重设模块的工作串口参数
+ {
+ zf_log(0, "set config failed");
+ return_state = 1;
+ break;
+ }
+ // 重新初始化WiFi模块所使用的串口
+ uart_init(WIFI_UART_INDEX, WIFI_UART_BAUD, WIFI_UART_RX_PIN, WIFI_UART_TX_PIN);
+ uart_rx_interrupt(WIFI_UART_INDEX, 1);
+ system_delay_ms(100);
+
+ if(wifi_uart_echo_set("0")) // 关闭模块回写
+ {
+ zf_log(0, "exit echo failed");
+ return_state = 1;
+ break;
+ }
+
+ if(wifi_uart_auto_connect_wifi("0")) // 关闭自动连接
+ {
+ zf_log(0, "close auto connect failed");
+ return_state = 1;
+ break;
+ }
+
+ if(wifi_uart_set_model(wifi_mode)) // 设置运行模式
+ {
+ zf_log(0, "set run mode failed");
+ return_state = 1;
+ break;
+ }
+
+ if(wifi_uart_set_wifi((char *)wifi_ssid, (char *)pass_word)) // 连接 wifi 或者开启热点
+ {
+ zf_log(0, "wifi set failed");
+ return_state = 1;
+ break;
+ }
+
+ if(wifi_uart_get_information()) // 模块基本参数获取
+ {
+ zf_log(0, "get module information failed");
+ return_state = 1;
+ break;
+ }
+#if WIFI_UART_AUTO_CONNECT == 1
+ if(wifi_uart_connect_tcp_servers(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT,WIFI_UART_COMMAND)) // 连接TCP服务器
+ {
+ zf_log(0, "connect TCP server failed");
+ return_state = 1;
+ break;
+ }
+#endif
+#if WIFI_UART_AUTO_CONNECT == 2
+ if(wifi_uart_connect_udp_client(WIFI_UART_TARGET_IP, WIFI_UART_TARGET_PORT, WIFI_UART_LOCAL_PORT, WIFI_UART_COMMAND)) // 建立UDP连接
+ {
+ zf_log(0, "connect UDP server failed");
+ return_state = 1;
+ break;
+ }
+#endif
+#if WIFI_UART_AUTO_CONNECT == 3
+ if(wifi_uart_entry_tcp_servers(WIFI_UART_LOCAL_PORT)) // 建立TCP服务器
+ {
+ zf_log(0, "build TCP server failed");
+ return_state = 1;
+ break;
+ }
+#endif
+ }while(0);
+
+ wifi_uart_clear_receive_buffer(); // 清空WiFi接收缓冲区
+ return return_state;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_wifi_uart.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_wifi_uart.h
new file mode 100644
index 0000000..a898b4b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_wifi_uart.h
@@ -0,0 +1,153 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_wifi_uart
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* RX 查看 zf_device_wifi_uart.h 中 WIFI_UART_RX_PIN 宏定义
+* TX 查看 zf_device_wifi_uart.h 中 WIFI_UART_TX_PIN 宏定义
+* RTS 查看 zf_device_wifi_uart.h 中 WIFI_UART_RTS_PIN 宏定义
+* RST 查看 zf_device_wifi_uart.h 中 WIFI_UART_RST_PIN 宏定义
+* VCC 5V 电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+*********************************************************************************************************************/
+
+#ifndef _zf_device_wifi_uart_h_
+#define _zf_device_wifi_uart_h_
+
+#include "zf_common_typedef.h"
+
+//=================================================WIFI_UART 驱动配置====================================================
+#define WIFI_UART_INDEX (UART_2) // WIFI 模块 所使用到的串口
+#define WIFI_UART_TX_PIN (UART2_RX_P10_6) // 连接 WIFI 模块 TX
+#define WIFI_UART_RX_PIN (UART2_TX_P10_5) // 连接 WIFI 模块 RX
+#define WIFI_UART_BAUD (115200) // 模块工作波特率
+#define WIFI_UART_RTS_PIN (P10_2) // 定义流控位引脚 指示当前模块是否可以接受数据 0-可以继续接收 1-不可以继续接收
+#define WIFI_UART_HARDWARE_RST (1) // 定义是否使用硬件复位引脚 0-使用软件复位 1-使用硬件 RST
+#if WIFI_UART_HARDWARE_RST // 建议使用硬件复位引脚 否则容易出现单片机复位后无法正常初始化模块
+#define WIFI_UART_RST_PIN (P11_6) // 定义硬件复位引脚
+#endif
+//=================================================WIFI_UART 驱动配置====================================================
+
+//=================================================WIFI_UART 参数配置====================================================
+#define WIFI_UART_BUFFER_SIZE (256) // 定义接收缓存区大小
+
+#define WIFI_UART_AUTO_CONNECT (0) // 定义是否初始化时建立TCP或者UDP连接 0-不连接 1-自动连接TCP服务器 2-自动连接UDP服务器 3：自动建立TCP服务器
+
+#if (WIFI_UART_AUTO_CONNECT > 3)
+#error "WIFI_UART_AUTO_CONNECT 的值只能为 [0,1,2,3]"
+#else
+#define WIFI_UART_TARGET_IP "192.168.137.1" // 连接目标的 IP
+#define WIFI_UART_TARGET_PORT "8080" // 连接目标的端口
+#define WIFI_UART_LOCAL_PORT "8080" // 本机端口
+#endif
+//=================================================WIFI_UART 参数配置====================================================
+
+//=================================================WIFI_UART 参数枚举====================================================
+typedef enum
+{
+ WIFI_UART_STATION, // 设备模式
+ WIFI_UART_SOFTAP, // AP模式
+}wifi_uart_mode_enum;
+
+typedef enum
+{
+ WIFI_UART_COMMAND, // 使用命令的方式发送数据
+ WIFI_UART_SERIANET, // 使用透传的方式发送数据
+}wifi_uart_transfer_mode_enum;
+
+typedef enum
+{
+ WIFI_UART_TCP_CLIENT, // 模块连接TCP服务器
+ WIFI_UART_TCP_SERVER, // 模块作为TCP服务器
+ WIFI_UART_UDP_CLIENT, // 模块启用UDP连接
+}wifi_uart_connect_mode_enum;
+
+typedef enum
+{
+ WIFI_UART_SERVER_OFF, // 模块未连接服务器
+ WIFI_UART_SERVER_ON, // 模块已经连接服务器
+}wifi_uart_connect_state_enum;
+
+typedef enum
+{
+ WIFI_UART_LINK_0, // 模块当前链接 0
+ WIFI_UART_LINK_1, // 模块当前链接 1
+ WIFI_UART_LINK_2, // 模块当前链接 2
+ WIFI_UART_LINK_3, // 模块当前链接 3
+ WIFI_UART_LINK_4, // 模块当前链接 4
+}wifi_uart_link_id_enum;
+
+typedef struct
+{
+ uint8 wifi_uart_version[12]; // 固件版本 字符串形式
+ uint8 wifi_uart_mac[20]; // 本机 MAC 地址 字符串形式
+ uint8 wifi_uart_local_ip[17]; // 本机 IP 地址 字符串形式
+ uint8 wifi_uart_local_port[10]; // 本机端口号 字符串形式
+ uint8 wifi_uart_remote_ip[5][15]; // 远端 IP 地址 字符串形式
+ wifi_uart_mode_enum wifi_uart_mode; // WIFI 模式
+ wifi_uart_transfer_mode_enum wifi_uart_transfer_mode; // 当前传输模式
+ wifi_uart_connect_mode_enum wifi_uart_connect_mode; // 网络连接模式
+ wifi_uart_connect_state_enum wifi_uart_connect_state; // 服务器连接情况
+}wifi_uart_information_struct;
+//=================================================WIFI_UART 参数枚举====================================================
+
+extern wifi_uart_information_struct wifi_uart_information;
+
+//=================================================WIFI_UART 基础函数====================================================
+uint8 wifi_uart_disconnected_wifi (void); // 断开 WIFI 连接
+uint8 wifi_uart_entry_serianet (void); // 打开透传模式
+uint8 wifi_uart_exit_serianet (void); // 关闭透传模式
+
+uint8 wifi_uart_connect_tcp_servers (char *ip, char *port, wifi_uart_transfer_mode_enum mode); // 建立 TCP 连接
+uint8 wifi_uart_connect_udp_client (char *ip, char *port, char *local_port, wifi_uart_transfer_mode_enum mode); // 建立 UDP 传输
+uint8 wifi_uart_disconnect_link (void); // 断开连接 TCP Server 使用本接口将会断开所有连接
+uint8 wifi_uart_disconnect_link_with_id (wifi_uart_link_id_enum link_id); // TCP Server 断开指定连接 TCP/UDP Client 将不会有反应
+
+uint8 wifi_uart_entry_tcp_servers (char *port); // 建立 TCP 服务器
+uint8 wifi_uart_exit_tcp_servers (void); // 关闭 TCP 服务器
+uint8 wifi_uart_tcp_servers_check_link (void); // TCP Server 模式下检查当前链接数量 并获取 IP
+
+uint32 wifi_uart_send_buffer (uint8 *buff, uint32 len); // WIFI 模块数据发送函数
+uint32 wifi_uart_tcp_servers_send_buffer (uint8 *buff, uint32 len, wifi_uart_link_id_enum id); // WIFI 模块作为 TCP Server 指定目标设备发送函数
+uint32 wifi_uart_read_buffer (uint8 *buff, uint32 len); // WIFI 模块数据接收函数
+
+void wifi_uart_callback (void); // WIFI 模块串口回调函数
+uint8 wifi_uart_init (char *wifi_ssid, char *pass_word, wifi_uart_mode_enum wifi_mode); // WIFI 模块初始化函数
+//=================================================WIFI_UART 基础函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_wireless_uart.c b/Example/E15_fft_demo/libraries/zf_device/zf_device_wireless_uart.c
new file mode 100644
index 0000000..14d0f31
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_wireless_uart.c
@@ -0,0 +1,303 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_wireless_uart
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* RX 查看 zf_device_wireless_uart.h 中 WIRELESS_UART_RX_PINx 宏定义
+* TX 查看 zf_device_wireless_uart.h 中 WIRELESS_UART_TX_PINx 宏定义
+* RTS 查看 zf_device_wireless_uart.h 中 WIRELESS_UART_RTS_PINx 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_common_fifo.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_uart.h"
+#include "zf_device_type.h"
+#include "zf_device_wireless_uart.h"
+
+static fifo_struct wireless_uart_fifo;
+static uint8 wireless_uart_buffer[WIRELESS_UART_BUFFER_SIZE]; // 数据存放数组
+
+static uint8 wireless_uart_data;
+volatile uint32 wireless_auto_baud_flag = 0;
+volatile uint8 wireless_auto_baud_data[3] = {0x00, 0x01, 0x03};
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 无线转串口模块 发送数据
+// 参数说明 data 8bit 数据
+// 返回参数 uint32 剩余发送长度
+// 使用示例 wireless_uart_send_byte(data);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 wireless_uart_send_byte (const uint8 data)
+{
+ uint16 time_count = WIRELESS_UART_TIMEOUT_COUNT;
+ while(time_count)
+ {
+ if(!gpio_get_level(WIRELESS_UART_RTS_PIN))
+ {
+ uart_write_byte(WIRELESS_UART_INDEX, data); // 发送数据
+ break;
+ }
+ time_count --;
+ system_delay_ms(1);
+ }
+ return (0 < time_count);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 无线转串口模块 发送数据块
+// 参数说明 *buff 发送缓冲区
+// 参数说明 len 发送数据长度
+// 返回参数 uint32 剩余发送长度
+// 使用示例 wireless_uart_send_buff(buff, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 wireless_uart_send_buff (const uint8 *buff, uint32 len)
+{
+ zf_assert(buff != NULL);
+ uint16 time_count = 0;
+ while(0 != len)
+ {
+ if(!gpio_get_level(WIRELESS_UART_RTS_PIN)) // 如果RTS为低电平 则继续发送数据
+ {
+ if(30 <= len) // 数据分 30byte 每包发送
+ {
+ uart_write_buffer(WIRELESS_UART_INDEX, buff, 30); // 发送数据
+ buff += 30; // 地址偏移
+ len -= 30; // 数量
+ time_count = 0;
+ }
+ else // 不足 30byte 的数据一次性发送完毕
+ {
+ uart_write_buffer(WIRELESS_UART_INDEX, buff, len); // 发送数据
+ len = 0;
+ break;
+ }
+ }
+ else // 如果RTS为高电平 则模块忙
+ {
+ if(WIRELESS_UART_TIMEOUT_COUNT <= (++ time_count)) // 超出了最大等待时间
+ {
+ break; // 退出发送
+ }
+ system_delay_ms(1);
+ }
+ }
+ return len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 无线转串口模块 发送字符串
+// 参数说明 *str 要发送的字符串地址
+// 返回参数 uint32 剩余发送长度
+// 使用示例 wireless_uart_send_string("Believe in yourself.");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 wireless_uart_send_string (const char *str)
+{
+ zf_assert(str != NULL);
+ uint16 time_count = 0;
+ uint32 len = strlen(str);
+ while(0 != len)
+ {
+ if(!gpio_get_level(WIRELESS_UART_RTS_PIN)) // 如果RTS为低电平 则继续发送数据
+ {
+ if(30 <= len) // 数据分 30byte 每包发送
+ {
+ uart_write_buffer(WIRELESS_UART_INDEX, (const uint8 *)str, 30); // 发送数据
+ str += 30; // 地址偏移
+ len -= 30; // 数量
+ time_count = 0;
+ }
+ else // 不足 30byte 的数据一次性发送完毕
+ {
+ uart_write_buffer(WIRELESS_UART_INDEX, (const uint8 *)str, len); // 发送数据
+ len = 0;
+ break;
+ }
+ }
+ else // 如果RTS为高电平 则模块忙
+ {
+ if(WIRELESS_UART_TIMEOUT_COUNT <= (++ time_count)) // 超出了最大等待时间
+ {
+ break; // 退出发送
+ }
+ system_delay_ms(1);
+ }
+ }
+ return len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 无线转串口模块 发送摄像头图像至上位机查看图像
+// 参数说明 *image_addr 需要发送的图像地址
+// 参数说明 image_size 图像的大小
+// 返回参数 void
+// 使用示例 wireless_uart_send_image(&mt9v03x_image[0][0], MT9V03X_IMAGE_SIZE);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void wireless_uart_send_image (const uint8 *image_addr, uint32 image_size)
+{
+ zf_assert(image_addr != NULL);
+ extern uint8 camera_send_image_frame_header[4];
+ wireless_uart_send_buff(camera_send_image_frame_header, 4);
+ wireless_uart_send_buff((uint8 *)image_addr, image_size);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 无线转串口模块 读取缓冲
+// 参数说明 *buff 接收缓冲区
+// 参数说明 len 读取数据长度
+// 返回参数 uint32 实际读取数据长度
+// 使用示例 wireless_uart_read_buff(buff, 32);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint32 wireless_uart_read_buff (uint8 *buff, uint32 len)
+{
+ zf_assert(buff != NULL);
+ uint32 data_len = len;
+ fifo_read_buffer(&wireless_uart_fifo, buff, &data_len, FIFO_READ_AND_CLEAN);
+ return data_len;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 无线转串口模块 串口中断回调函数
+// 参数说明 void
+// 返回参数 void
+// 使用示例 wireless_uart_callback();
+// 备注信息 该函数在 ISR 文件 串口中断程序被调用
+// 由串口中断服务函数调用 wireless_module_uart_handler() 函数
+// 再由 wireless_module_uart_handler() 函数调用本函数
+//-------------------------------------------------------------------------------------------------------------------
+void wireless_uart_callback (void)
+{
+ uart_query_byte(WIRELESS_UART_INDEX, &wireless_uart_data);
+ fifo_write_buffer(&wireless_uart_fifo, &wireless_uart_data, 1);
+#if WIRELESS_UART_AUTO_BAUD_RATE // 开启自动波特率
+ if(wireless_auto_baud_flag == 1 && fifo_used(&wireless_uart_fifo) == 3)
+ {
+ wireless_auto_baud_flag = 3;
+ fifo_read_buffer(&wireless_uart_fifo, (uint8 *)wireless_auto_baud_data, (uint32 *)&wireless_auto_baud_flag, FIFO_READ_AND_CLEAN);
+ }
+#endif
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 无线转串口模块 初始化
+// 参数说明 void
+// 返回参数 void
+// 使用示例 wireless_uart_init();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 wireless_uart_init (void)
+{
+ uint8 return_state = 0;
+ set_wireless_type(WIRELESS_UART, wireless_uart_callback);
+
+ fifo_init(&wireless_uart_fifo, FIFO_DATA_8BIT, wireless_uart_buffer, WIRELESS_UART_BUFFER_SIZE);
+ gpio_init(WIRELESS_UART_RTS_PIN, GPI, GPIO_HIGH, GPI_PULL_UP);
+#if(0 == WIRELESS_UART_AUTO_BAUD_RATE) // 关闭自动波特率
+ // 本函数使用的波特率为115200 为无线转串口模块的默认波特率 如需其他波特率请自行配置模块并修改串口的波特率
+ uart_init (WIRELESS_UART_INDEX, WIRELESS_UART_BUAD_RATE, WIRELESS_UART_RX_PIN, WIRELESS_UART_TX_PIN); // 初始化串口
+ uart_rx_interrupt(WIRELESS_UART_INDEX, 1);
+#elif(1 == WIRELESS_UART_AUTO_BAUD_RATE) // 开启自动波特率
+ uint8 rts_init_status;
+ uint16 time_count = 0;
+
+ wireless_auto_baud_flag = 0;
+ wireless_auto_baud_data[0] = 0;
+ wireless_auto_baud_data[1] = 1;
+ wireless_auto_baud_data[2] = 3;
+
+ rts_init_status = gpio_get_level(WIRELESS_UART_RTS_PIN);
+ gpio_init(WIRELESS_UART_RTS_PIN, GPO, rts_init_status, GPO_PUSH_PULL); // 初始化流控引脚
+
+ uart_init (WIRELESS_UART_INDEX, WIRELESS_UART_BUAD_RATE, WIRELESS_UART_RX_PIN, WIRELESS_UART_TX_PIN); // 初始化串口
+ uart_rx_interrupt(WIRELESS_UART_INDEX, 1);
+
+ system_delay_ms(5); // 模块上电之后需要延时等待
+ gpio_set_level(WIRELESS_UART_RTS_PIN, !rts_init_status); // RTS引脚拉高，进入自动波特率模式
+ system_delay_ms(100); // RTS拉高之后必须延时20ms
+ gpio_toggle(WIRELESS_UART_RTS_PIN); // RTS引脚取反
+
+ wireless_auto_baud_flag = 1;
+
+ uart_write_byte(WIRELESS_UART_INDEX, wireless_auto_baud_data[0]); // 发送特定数据 用于模块自动判断波特率
+ uart_write_byte(WIRELESS_UART_INDEX, wireless_auto_baud_data[1]); // 发送特定数据 用于模块自动判断波特率
+ uart_write_byte(WIRELESS_UART_INDEX, wireless_auto_baud_data[2]); // 发送特定数据 用于模块自动判断波特率
+ system_delay_ms(20);
+
+ time_count = 0;
+ do
+ {
+ if(3 != wireless_auto_baud_flag) // 检验自动波特率是否完成
+ {
+ while(time_count ++)
+ system_delay_ms(1);
+ }
+ if(time_count >= WIRELESS_UART_TIMEOUT_COUNT)
+ {
+ return_state = 1; // 如果程序进入到此语句内 说明自动波特率失败了
+ break;
+ }
+
+ time_count = 0;
+ if( 0xa5 != wireless_auto_baud_data[0] && // 检验自动波特率是否正确
+ 0xff != wireless_auto_baud_data[1] && // 检验自动波特率是否正确
+ 0xff != wireless_auto_baud_data[2] ) // 检验自动波特率是否正确
+ {
+ while(time_count ++)
+ system_delay_ms(1);
+ }
+ if(time_count >= WIRELESS_UART_TIMEOUT_COUNT)
+ {
+ return_state = 1; // 如果程序进入到此语句内 说明自动波特率失败了
+ break;
+ }
+ wireless_auto_baud_flag = 0;
+
+ gpio_init(WIRELESS_UART_RTS_PIN, GPI, 0, GPI_PULL_UP); // 初始化流控引脚
+ system_delay_ms(10); // 延时等待 模块准备就绪
+ }while(0);
+#endif
+ return return_state;
+}
diff --git a/Example/E15_fft_demo/libraries/zf_device/zf_device_wireless_uart.h b/Example/E15_fft_demo/libraries/zf_device/zf_device_wireless_uart.h
new file mode 100644
index 0000000..bef336d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_device/zf_device_wireless_uart.h
@@ -0,0 +1,93 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_device_wireless_uart
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+/*********************************************************************************************************************
+* 接线定义：
+* ------------------------------------
+* 模块管脚 单片机管脚
+* RX 查看 zf_device_wireless_uart.h 中 WIRELESS_UART_RX_PINx 宏定义
+* TX 查看 zf_device_wireless_uart.h 中 WIRELESS_UART_TX_PINx 宏定义
+* RTS 查看 zf_device_wireless_uart.h 中 WIRELESS_UART_RTS_PINx 宏定义
+* VCC 3.3V电源
+* GND 电源地
+* 其余引脚悬空
+* ------------------------------------
+********************************************************************************************************************/
+
+#ifndef _zf_device_wireless_uart_h_
+#define _zf_device_wireless_uart_h_
+
+#include "zf_common_typedef.h"
+//=================================================无线串口 驱动配置====================================================
+#define WIRELESS_UART_INDEX (UART_2) // 无线串口对应使用的串口号
+#define WIRELESS_UART_BUAD_RATE (115200) // 无线串口对应使用的串口波特率
+#define WIRELESS_UART_TX_PIN (UART2_RX_P10_6) // 无线串口对应模块的 TX 要接到单片机的 RX
+#define WIRELESS_UART_RX_PIN (UART2_TX_P10_5) // 无线串口对应模块的 RX 要接到单片机的 TX
+#define WIRELESS_UART_RTS_PIN (P10_2) // 无线串口对应模块的 RTS 引脚
+//=================================================无线串口 驱动配置====================================================
+
+//================================================无线串口 自动波特率====================================================
+// 注意事项1：无线转串口模块版本是V2.0以下的是无法开启自动波特率的。
+// 注意事项2：开启自动波特率务必连接RTS引脚 否则会开启失败。
+// 注意事项3：模块自动波特率失败的话 可以尝试断电重启
+
+// 开启自动波特率务必阅读上面两条 注意事项
+// 开启自动波特率务必阅读上面两条 注意事项
+// 开启自动波特率务必阅读上面两条 注意事项
+
+// 0：关闭自动波特率
+// 1：开启自动波特率 自动波特率的作用是修改 WIRELESS_UART_BAUD 之后不需要对模块进行配置 模块会自动设置为对应的波特率
+
+#define WIRELESS_UART_AUTO_BAUD_RATE (0)
+//================================================无线串口 自动波特率====================================================
+
+#define WIRELESS_UART_BUFFER_SIZE (64 )
+#define WIRELESS_UART_TIMEOUT_COUNT (0x64)
+
+//=================================================无线串口 基础函数====================================================
+uint32 wireless_uart_send_byte (const uint8 data);
+uint32 wireless_uart_send_buff (const uint8 *buff, uint32 len);
+uint32 wireless_uart_send_string (const char *str);
+void wireless_uart_send_image (const uint8 *image_addr, uint32 image_size);
+
+uint32 wireless_uart_read_buff (uint8 *buff, uint32 len);
+
+void wireless_uart_callback (void);
+
+uint8 wireless_uart_init (void);
+//=================================================无线串口 基础函数====================================================
+
+#endif
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_adc.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_adc.c
new file mode 100644
index 0000000..a8c48b9
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_adc.c
@@ -0,0 +1,153 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_adc
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "Vadc/Adc/IfxVadc_Adc.h"
+#include "zf_common_debug.h"
+#include "zf_driver_adc.h"
+
+#define ADC_SAMPLE_FREQUENCY 10000000 // 最大10Mhz
+
+uint8 adc_resolution[50];
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ADC 转换一次
+// 参数说明 ch 选择 ADC 通道 (详见 zf_driver_adc.h 中枚举 adc_channel_enum 定义)
+// 返回参数 uint16 转换的 ADC 值
+// 使用示例 adc_convert(ADC1_CH0_A0);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 adc_convert (adc_channel_enum vadc_chn)
+{
+ Ifx_VADC_RES result;
+ uint8 temp;
+ do
+ {
+ result = IfxVadc_getResult(&MODULE_VADC.G[(vadc_chn / 16)], vadc_chn%16);
+ } while(!result.B.VF);
+
+ temp = 4 - (adc_resolution[vadc_chn] * 2);
+
+ return((result.U&0x0fff)>>temp);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 ADC 均值滤波转换
+// 参数说明 ch 选择 ADC 通道 (详见 zf_driver_adc.h 中枚举 adc_channel_enum 定义)
+// 参数说明 count 均值滤波次数
+// 返回参数 uint16 转换的 ADC 值
+// 使用示例 adc_mean_filter_convert(ADC1_CH0_A0, 5); // 采集5次 然后返回平均值
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 adc_mean_filter_convert (adc_channel_enum vadc_chn, uint8 count)
+{
+ uint8 i;
+ uint32 sum;
+
+ zf_assert(count);// 断言次数不能为0
+
+ sum = 0;
+ for(i=0; i
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_adc
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_adc_h
+#define _zf_driver_adc_h
+
+#include "zf_common_typedef.h"
+
+typedef enum // 枚举ADC通道
+{
+ // ADC0可选引脚
+ ADC0_CH0_A0 = 0*16 + 0,
+ ADC0_CH1_A1,
+ ADC0_CH2_A2,
+ ADC0_CH3_A3,
+ ADC0_CH4_A4,
+ ADC0_CH5_A5,
+ ADC0_CH6_A6,
+ ADC0_CH7_A7,
+ ADC0_CH8_A8,
+ ADC0_CH10_A10 = 0*16 + 10,
+ ADC0_CH11_A11,
+ ADC0_CH12_A12,
+ ADC0_CH13_A13,
+
+ // ADC1可选引脚
+ ADC1_CH0_A16 = 1*16 + 0,
+ ADC1_CH1_A17 = 1*16 + 1,
+ ADC1_CH4_A20 = 1*16 + 4,
+ ADC1_CH5_A21 = 1*16 + 5,
+ ADC1_CH8_A24 = 1*16 + 8,
+ ADC1_CH9_A25 = 1*16 + 9,
+
+ // ADC2可选引脚
+ ADC2_CH3_A35 = 2*16 + 3,
+ ADC2_CH4_A36,
+ ADC2_CH5_A37,
+ ADC2_CH6_A38,
+ ADC2_CH7_A39,
+ ADC2_CH10_A44 = 2*16 + 10,
+ ADC2_CH11_A45,
+ ADC2_CH12_A46,
+ ADC2_CH13_A47,
+ ADC2_CH14_A48,
+ ADC2_CH15_A49,
+}adc_channel_enum;
+
+// 此枚举定义不允许用户修改
+typedef enum // 枚举ADC通道
+{
+ ADC_8BIT, // 8位分辨率
+ ADC_10BIT, // 10位分辨率
+ ADC_12BIT, // 12位分辨率
+}adc_resolution_enum;
+
+//====================================================ADC 基础函数====================================================
+uint16 adc_convert (adc_channel_enum vadc_chn); // ADC转换一次
+uint16 adc_mean_filter_convert (adc_channel_enum vadc_chn, uint8 count); // ADC均值滤波
+void adc_init (adc_channel_enum vadc_chn, adc_resolution_enum resolution); // ADC初始化
+//====================================================ADC 基础函数====================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_delay.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_delay.c
new file mode 100644
index 0000000..6930f55
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_delay.c
@@ -0,0 +1,62 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_delay
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IfxStm.h"
+#include "IFXSTM_CFG.h"
+#include "zf_driver_delay.h"
+
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 systick延时函数
+// 参数说明 time 延时一轮的时间（单位为纳秒，可设置范围0-20000000）
+// 参数说明 num 延时多少轮
+// 返回参数 void
+// 使用示例 无需用户调用，用户请使用h文件中的宏定义
+//-------------------------------------------------------------------------------------------------------------------
+void system_delay (uint32 time, uint32 num)
+{
+ uint32 stm_clk;
+ uint32 delay_time;
+ stm_clk = IfxStm_getFrequency(IfxStm_getAddress((IfxStm_Index)(IfxCpu_getCoreId())));
+ delay_time = (uint32)(stm_clk/1000000*time/1000);
+
+ while(num--)
+ {
+ IfxStm_waitTicks(IfxStm_getAddress((IfxStm_Index)(IfxCpu_getCoreId())), delay_time);
+ }
+}
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_delay.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_delay.h
new file mode 100644
index 0000000..98c11dc
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_delay.h
@@ -0,0 +1,51 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_delay
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_delay_h_
+#define _zf_driver_delay_h_
+
+#include "zf_common_typedef.h"
+
+
+void system_delay (uint32 time, uint32 num);
+
+//====================================================延时 基础函数====================================================
+#define system_delay_ms(time) system_delay((1000000), (time)) // 设置延时时间 单位ms
+#define system_delay_us(time) system_delay((time*1000), (1)) // 设置延时时间 单位us
+#define system_delay_ns(time) system_delay((time), (1)) // 设置延时时间 单位ns
+//====================================================延时 基础函数====================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_dma.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_dma.c
new file mode 100644
index 0000000..646f03a
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_dma.c
@@ -0,0 +1,198 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_dma
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IfxDma_Dma.h"
+#include "IfxScuEru.h"
+#include "isr_config.h"
+#include "zf_common_debug.h"
+#include "zf_driver_dma.h"
+
+typedef struct
+{
+ Ifx_DMA_CH linked_list[8]; // DMA链表
+ IfxDma_Dma_Channel channel; // DMA通道句柄
+}DMA_LINK;
+
+#if(0 == DMA_INT_SERVICE)
+#pragma section all "cpu0_dsram"
+IFX_ALIGN(256) DMA_LINK dma_link_list;
+
+#elif(1 == DMA_INT_SERVICE)
+#pragma section all "cpu1_dsram"
+IFX_ALIGN(256) DMA_LINK dma_link_list;
+
+#endif
+#pragma section all restore
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 dma初始化
+// 参数说明 dma_ch 选择DMA通道
+// 参数说明 source_addr 设置源地址
+// 参数说明 destination_addr 设置目的地址
+// 参数说明 exti_pin 设置触发的eru通道
+// 参数说明 trigger 设置触发方式
+// 参数说明 dma_count 设置dma搬移次数
+// 返回参数 uint8
+// 使用示例 dma_init(MT9V03X_DMA_CH, MT9V03X_DATA_ADD, mt9v03x_image[0], MT9V03X_PCLK_PIN, EXTI_TRIGGER_RISING, MT9V03X_IMAGE_SIZE);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, exti_pin_enum exti_pin, exti_trigger_enum trigger, uint16 dma_count)
+{
+ IfxDma_Dma_Channel dmaChn;
+
+ exti_init(exti_pin, trigger); // eru触发DMA通道号 在eru文件中设置eru的优先级，即为触发的通道
+
+ IfxDma_Dma_Config dmaConfig;
+ IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
+
+ IfxDma_Dma dma;
+ IfxDma_Dma_initModule(&dma, &dmaConfig);
+
+ IfxDma_Dma_ChannelConfig cfg;
+ IfxDma_Dma_initChannelConfig(&cfg, &dma);
+
+ uint8 list_num, i;
+ uint16 single_channel_dma_count;
+
+ zf_assert(!(dma_count%8)); // 传输次数必须为8的倍数
+
+
+ list_num = 1;
+ single_channel_dma_count = dma_count / list_num;
+ if(16384 < single_channel_dma_count)
+ {
+ while(TRUE)
+ {
+ single_channel_dma_count = dma_count / list_num;
+ if((single_channel_dma_count <= 16384) && !(dma_count % list_num))
+ {
+ break;
+ }
+ list_num++;
+ if(list_num > 8)
+ {
+ zf_assert(FALSE);
+ }
+ }
+ }
+
+
+ if(1 == list_num)
+ {
+ cfg.shadowControl = IfxDma_ChannelShadow_none;
+ cfg.operationMode = IfxDma_ChannelOperationMode_single;
+ cfg.shadowAddress = 0;
+ }
+ else
+ {
+ cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
+ cfg.operationMode = IfxDma_ChannelOperationMode_continuous;
+ cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[1]);
+ }
+
+ cfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
+ cfg.moveSize = IfxDma_ChannelMoveSize_8bit;
+ cfg.busPriority = IfxDma_ChannelBusPriority_high;
+
+ cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), source_addr);
+ cfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
+ cfg.sourceCircularBufferEnabled = TRUE;
+
+ cfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1;
+
+ cfg.channelId = (IfxDma_ChannelId)dma_ch;
+ cfg.hardwareRequestEnabled = FALSE;
+ cfg.channelInterruptEnabled = TRUE;
+ cfg.channelInterruptPriority = DMA_INT_PRIO;
+ cfg.channelInterruptTypeOfService = DMA_INT_SERVICE;
+
+
+
+ cfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr);
+
+ cfg.transferCount = single_channel_dma_count;
+
+ IfxDma_Dma_initChannel(&dmaChn, &cfg);
+
+ if(1 < list_num)
+ {
+ i = 0;
+ while(i < list_num)
+ {
+ cfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr + single_channel_dma_count * i);
+ if(i == (list_num - 1))
+ {
+ cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[0]);
+ }
+ else
+ {
+ cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[i+1]);
+ }
+ cfg.transferCount = single_channel_dma_count;
+
+ IfxDma_Dma_initLinkedListEntry((void *)&dma_link_list.linked_list[i], &cfg);
+ i++;
+ }
+ }
+
+ IfxDma_Dma_getSrcPointer(&dma_link_list.channel)->B.CLRR = 1;
+
+ return list_num;
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 dma 传输禁止
+// 参数说明 ch 选择 dma 通道 (详见 zf_driver_dma.h 中枚举 dma_channel_enum 定义)
+// 返回参数 void
+// 使用示例 dma_disable(MT9V03X_DMA_CH);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void dma_disable (IfxDma_ChannelId dma_ch)
+{
+ IfxDma_disableChannelTransaction(&MODULE_DMA, dma_ch);
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 dma 传输使能
+// 参数说明 ch 选择 dma 通道 (详见 zf_driver_dma.h 中枚举 dma_channel_enum 定义)
+// 返回参数 void
+// 使用示例 dma_enable(MT9V03X_DMA_CH);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void dma_enable (IfxDma_ChannelId dma_ch)
+{
+ IfxDma_enableChannelTransaction(&MODULE_DMA, dma_ch);
+}
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_dma.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_dma.h
new file mode 100644
index 0000000..7a9e923
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_dma.h
@@ -0,0 +1,53 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_dma
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_dma_h_
+#define _zf_driver_dma_h_
+
+#include "IfxDma.h"
+#include "zf_common_typedef.h"
+#include "zf_driver_exti.h"
+
+#define clear_dma_flag(dma_ch) (IfxDma_clearChannelInterrupt(&MODULE_DMA, dma_ch))
+
+#define dma_set_destination(dma_ch, destination_addr) (IfxDma_setChannelDestinationAddress(&MODULE_DMA, (dma_ch), (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (destination_addr))))
+
+//====================================================DMA 基础函数====================================================
+uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, exti_pin_enum eru_pin, exti_trigger_enum trigger, uint16 dma_count);
+void dma_disable (IfxDma_ChannelId dma_ch);
+void dma_enable (IfxDma_ChannelId dma_ch);
+//====================================================DMA 基础函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_encoder.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_encoder.c
new file mode 100644
index 0000000..8ac76d5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_encoder.c
@@ -0,0 +1,228 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_encoder
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IfxGpt12_IncrEnc.h"
+#include "zf_common_debug.h"
+#include "zf_driver_encoder.h"
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 编码器地址设置 内部调用
+// 参数说明 gptn 选择所使用的GPT12定时器
+// 参数说明 count_pin 设置计数引脚
+// 参数说明 dir_pin 设置计数方向引脚
+// 返回参数 void
+// 使用示例 encoder_mapping_set(gptn, ch1_pin, ch2_pin);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+static void encoder_mapping_set (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
+{
+ IfxGpt12_TxIn_In *ch1;
+ IfxGpt12_TxEud_In *ch2;
+
+ switch(encoder_n)
+ {
+ case TIM2_ENCODER:
+ {
+ if (TIM2_ENCODER_CH1_P00_7 == ch1_pin) ch1 = &IfxGpt120_T2INA_P00_7_IN;
+ else if (TIM2_ENCODER_CH1_P33_7 == ch1_pin) ch1 = &IfxGpt120_T2INB_P33_7_IN;
+ else zf_assert(FALSE);
+
+ if (TIM2_ENCODER_CH2_P00_8 == ch2_pin) ch2 = &IfxGpt120_T2EUDA_P00_8_IN;
+ else if (TIM2_ENCODER_CH2_P33_6 == ch2_pin) ch2 = &IfxGpt120_T2EUDB_P33_6_IN;
+ else zf_assert(FALSE);
+ }break;
+
+ case TIM3_ENCODER:
+ {
+ if (TIM3_ENCODER_CH1_P02_6 == ch1_pin) ch1 = &IfxGpt120_T3INA_P02_6_IN;
+ else zf_assert(FALSE);
+
+ if (TIM3_ENCODER_CH2_P02_7 == ch2_pin) ch2 = &IfxGpt120_T3EUDA_P02_7_IN;
+ else zf_assert(FALSE);
+ }break;
+
+ case TIM4_ENCODER:
+ {
+ if (TIM4_ENCODER_CH1_P02_8 == ch1_pin) ch1 = &IfxGpt120_T4INA_P02_8_IN;
+ else zf_assert(FALSE);
+
+ if (TIM4_ENCODER_CH2_P00_9 == ch2_pin) ch2 = &IfxGpt120_T4EUDA_P00_9_IN;
+ else if (TIM4_ENCODER_CH2_P33_5 == ch2_pin) ch2 = &IfxGpt120_T4EUDB_P33_5_IN;
+ else zf_assert(FALSE);
+ }break;
+
+ case TIM5_ENCODER:
+ {
+ if (TIM5_ENCODER_CH1_P21_7 == ch1_pin) ch1 = &IfxGpt120_T5INA_P21_7_IN;
+ else if (TIM5_ENCODER_CH1_P10_3 == ch1_pin) ch1 = &IfxGpt120_T5INB_P10_3_IN;
+ else zf_assert(FALSE);
+
+ if (TIM5_ENCODER_CH2_P21_6 == ch2_pin) ch2 = &IfxGpt120_T5EUDA_P21_6_IN;
+ else if (TIM5_ENCODER_CH2_P10_1 == ch2_pin) ch2 = &IfxGpt120_T5EUDB_P10_1_IN;
+ else zf_assert(FALSE);
+ }break;
+
+ case TIM6_ENCODER:
+ {
+ if (TIM6_ENCODER_CH1_P20_3 == ch1_pin) ch1 = &IfxGpt120_T6INA_P20_3_IN;
+ else if (TIM6_ENCODER_CH1_P10_2 == ch1_pin) ch1 = &IfxGpt120_T6INB_P10_2_IN;
+ else zf_assert(FALSE);
+
+ if (TIM6_ENCODER_CH2_P20_0 == ch2_pin) ch2 = &IfxGpt120_T6EUDA_P20_0_IN;
+ else zf_assert(FALSE);
+ }break;
+ }
+#pragma warning 507
+
+ IfxGpt12_initTxInPinWithPadLevel(ch1, IfxPort_InputMode_pullUp, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+ IfxGpt12_initTxEudInPinWithPadLevel(ch2, IfxPort_InputMode_pullUp, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+
+#pragma warning default
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 编码器数据采集
+// 参数说明 gptn 选择所使用的定时器
+// 返回参数 void
+// 使用示例 int16 speed; speed = encoder_get_count(TIM2_ENCODER); // 使用T2定时器
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+int16 encoder_get_count (encoder_index_enum encoder_n)
+{
+ int16 encoder_data = 0;
+ switch(encoder_n)
+ {
+ case TIM2_ENCODER: encoder_data = (int16)IfxGpt12_T2_getTimerValue(&MODULE_GPT120); break;
+ case TIM3_ENCODER: encoder_data = (int16)IfxGpt12_T3_getTimerValue(&MODULE_GPT120); break;
+ case TIM4_ENCODER: encoder_data = (int16)IfxGpt12_T4_getTimerValue(&MODULE_GPT120); break;
+ case TIM5_ENCODER: encoder_data = (int16)IfxGpt12_T5_getTimerValue(&MODULE_GPT120); break;
+ case TIM6_ENCODER: encoder_data = (int16)IfxGpt12_T6_getTimerValue(&MODULE_GPT120); break;
+ default: encoder_data = 0;
+ }
+ return encoder_data;
+}
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 编码器计数清除
+// 参数说明 gptn 选择所使用的定时器
+// 返回参数 void
+// 使用示例 encoder_clear_count(TIM2_ENCODER);// 使用T2定时器
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void encoder_clear_count (encoder_index_enum encoder_n)
+{
+ switch(encoder_n)
+ {
+ case TIM2_ENCODER: IfxGpt12_T2_setTimerValue(&MODULE_GPT120, 0); break;
+ case TIM3_ENCODER: IfxGpt12_T3_setTimerValue(&MODULE_GPT120, 0); break;
+ case TIM4_ENCODER: IfxGpt12_T4_setTimerValue(&MODULE_GPT120, 0); break;
+ case TIM5_ENCODER: IfxGpt12_T5_setTimerValue(&MODULE_GPT120, 0); break;
+ case TIM6_ENCODER: IfxGpt12_T6_setTimerValue(&MODULE_GPT120, 0); break;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 正交编码器采集初始化
+// 参数说明 encoder_n 选择所使用的GPT12定时器
+// 参数说明 ch1_pin ENCODER 通道 1
+// 参数说明 ch2_pin ENCODER 通道 2
+// 返回参数 void
+// 使用示例 encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// 使用T2定时器 P00_7引脚为A通道 P00_8引脚为B通道
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin)
+{
+ IfxGpt12_enableModule(&MODULE_GPT120);
+ IfxGpt12_setGpt1BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt1BlockPrescaler_4);
+ IfxGpt12_setGpt2BlockPrescaler(&MODULE_GPT120, IfxGpt12_Gpt2BlockPrescaler_4);
+ encoder_mapping_set(encoder_n, count_pin, dir_pin);
+
+ switch(encoder_n)
+ {
+ case TIM2_ENCODER:
+ {
+ IfxGpt12_T2_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
+ IfxGpt12_T2_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
+ IfxGpt12_T2_setMode (&MODULE_GPT120, IfxGpt12_Mode_counter);
+ IfxGpt12_T2_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
+ }break;
+
+ case TIM3_ENCODER:
+ {
+ IfxGpt12_T3_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
+ IfxGpt12_T3_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
+ IfxGpt12_T3_setMode (&MODULE_GPT120, IfxGpt12_Mode_counter);
+ IfxGpt12_T3_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
+ }break;
+
+ case TIM4_ENCODER:
+ {
+ IfxGpt12_T4_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
+ IfxGpt12_T4_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
+ IfxGpt12_T4_setMode (&MODULE_GPT120, IfxGpt12_Mode_counter);
+ IfxGpt12_T4_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
+ }break;
+
+ case TIM5_ENCODER:
+ {
+ IfxGpt12_T5_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
+ IfxGpt12_T5_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
+ IfxGpt12_T5_setMode (&MODULE_GPT120, IfxGpt12_Mode_counter);
+ IfxGpt12_T5_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
+ }break;
+
+ case TIM6_ENCODER:
+ {
+ IfxGpt12_T6_setCounterInputMode(&MODULE_GPT120, IfxGpt12_CounterInputMode_risingEdgeTxIN);
+ IfxGpt12_T6_setDirectionSource (&MODULE_GPT120, IfxGpt12_TimerDirectionSource_external);
+ IfxGpt12_T6_setMode (&MODULE_GPT120, IfxGpt12_Mode_counter);
+ IfxGpt12_T6_run (&MODULE_GPT120, IfxGpt12_TimerRun_start);
+ }break;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 方向编码器采集初始化
+// 参数说明 encoder_n 选择所使用的GPT12定时器
+// 参数说明 ch1_pin 设置计数引脚
+// 参数说明 ch2_pin 设置方向引脚
+// 返回参数 void
+// 使用示例 encoder_quad_init(TIM2_ENCODER, TIM2_ENCODER_CH1_P00_7, TIM2_ENCODER_CH2_P00_8);// 使用T2定时器 P00_7引脚进行计数 计数方向使用P00_8引脚
+// 备注信息 英飞凌系列单片机无需区分正交和方向编码器，此处仅保留接口方便用户使用
+//-------------------------------------------------------------------------------------------------------------------
+void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin)
+{
+ encoder_quad_init(encoder_n, ch1_pin, ch2_pin);
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_encoder.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_encoder.h
new file mode 100644
index 0000000..451e142
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_encoder.h
@@ -0,0 +1,92 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_encoder
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_encoder_h_
+#define _zf_driver_encoder_h_
+
+#include "zf_common_typedef.h"
+
+// 此枚举定义不允许用户修改
+typedef enum // 枚举编码器引脚
+{
+ TIM2_ENCODER_CH1_P00_7, // T2定时器 计数引脚可选范围
+ TIM2_ENCODER_CH1_P33_7,
+
+ TIM3_ENCODER_CH1_P02_6, // T3定时器 计数引脚可选范围
+
+ TIM4_ENCODER_CH1_P02_8, // T4定时器 计数引脚可选范围
+
+ TIM5_ENCODER_CH1_P21_7, // T5定时器 计数引脚可选范围
+ TIM5_ENCODER_CH1_P10_3,
+
+ TIM6_ENCODER_CH1_P20_3, // T6定时器 计数引脚可选范围
+ TIM6_ENCODER_CH1_P10_2,
+}encoder_channel1_enum;
+
+// 此枚举定义不允许用户修改
+typedef enum // 枚举编码器引脚
+{
+ TIM2_ENCODER_CH2_P00_8, // T2定时器 计数方向引脚可选范围
+ TIM2_ENCODER_CH2_P33_6,
+
+ TIM3_ENCODER_CH2_P02_7, // T3定时器 计数方向引脚可选范围
+
+ TIM4_ENCODER_CH2_P00_9, // T4定时器 计数方向引脚可选范围
+ TIM4_ENCODER_CH2_P33_5,
+
+ TIM5_ENCODER_CH2_P21_6, // T5定时器 计数方向引脚可选范围
+ TIM5_ENCODER_CH2_P10_1,
+
+ TIM6_ENCODER_CH2_P20_0, // T6定时器 计数方向引脚可选范围
+}encoder_channel2_enum;
+
+typedef enum // 枚举 定时器编号
+{
+ TIM2_ENCODER,
+ TIM3_ENCODER,
+ TIM4_ENCODER,
+ TIM5_ENCODER,
+ TIM6_ENCODER,
+}encoder_index_enum;
+
+//====================================================编码器 基础函数====================================================
+int16 encoder_get_count (encoder_index_enum encoder_n);
+void encoder_clear_count (encoder_index_enum encoder_n);
+
+void encoder_quad_init (encoder_index_enum encoder_n, encoder_channel1_enum count_pin, encoder_channel2_enum dir_pin);
+void encoder_dir_init (encoder_index_enum encoder_n, encoder_channel1_enum ch1_pin, encoder_channel2_enum ch2_pin);
+//====================================================编码器 基础函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_exti.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_exti.c
new file mode 100644
index 0000000..a457edc
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_exti.c
@@ -0,0 +1,212 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_exti
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "Src/Std/IfxSrc.h"
+#include "SysSe/Bsp/Bsp.h"
+#include "isr_config.h"
+#include "zf_common_debug.h"
+#include "zf_driver_exti.h"
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取端口参数
+// 返回参数 IfxScu_Req_In
+// 使用示例 get_exit_pin(ERU_CH0_REQ4_P10_7);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static IfxScu_Req_In* get_exit_pin (exti_pin_enum exti_pin)
+{
+ IfxScu_Req_In* get_exit_pin_config;
+
+ switch(exti_pin)
+ {
+ case ERU_CH0_REQ0_P15_4: get_exit_pin_config = &IfxScu_REQ0_P15_4_IN; break;
+ case ERU_CH1_REQ10_P14_3: get_exit_pin_config = &IfxScu_REQ10_P14_3_IN; break;
+ case ERU_CH2_REQ7_P00_4: get_exit_pin_config = &IfxScu_REQ7_P00_4_IN; break;
+ case ERU_CH2_REQ14_P02_1: get_exit_pin_config = &IfxScu_REQ14_P02_1_IN; break;
+ case ERU_CH2_REQ2_P10_2: get_exit_pin_config = &IfxScu_REQ2_P10_2_IN; break;
+ case ERU_CH3_REQ6_P02_0: get_exit_pin_config = &IfxScu_REQ6_P02_0_IN; break;
+ case ERU_CH3_REQ3_P10_3: get_exit_pin_config = &IfxScu_REQ3_P10_3_IN; break;
+ case ERU_CH3_REQ15_P14_1: get_exit_pin_config = &IfxScu_REQ15_P14_1_IN; break;
+ case ERU_CH4_REQ13_P15_5: get_exit_pin_config = &IfxScu_REQ13_P15_5_IN; break;
+ case ERU_CH4_REQ8_P33_7: get_exit_pin_config = &IfxScu_REQ8_P33_7_IN; break;
+ case ERU_CH5_REQ1_P15_8: get_exit_pin_config = &IfxScu_REQ1_P15_8_IN; break;
+ case ERU_CH6_REQ12_P11_10: get_exit_pin_config = &IfxScu_REQ12_P11_10_IN; break;
+ case ERU_CH6_REQ9_P20_0: get_exit_pin_config = &IfxScu_REQ9_P20_0_IN; break;
+ case ERU_CH7_REQ16_P15_1: get_exit_pin_config = &IfxScu_REQ16_P15_1_IN; break;
+ case ERU_CH7_REQ11_P20_9: get_exit_pin_config = &IfxScu_REQ11_P20_9_IN; break;
+ default: zf_assert(FALSE); get_exit_pin_config = NULL;
+ }
+
+ return get_exit_pin_config;
+}
+
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 EXTI 中断使能
+// 参数说明 pin 选择 EXTI 引脚 (可选择范围由 zf_driver_exti.h 内 exti_pin_enum 枚举值确定)
+// 返回参数 void
+// 使用示例 exti_enable(ERU_CH0_REQ4_P10_7);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void exti_enable (exti_pin_enum eru_pin)
+{
+ IfxScuEru_OutputChannel outputChannel = (IfxScuEru_OutputChannel)(eru_pin/3);
+
+ volatile Ifx_SRC_SRCR *src = &MODULE_SRC.SCU.SCU.ERU[(int)outputChannel % 4];
+ IfxSrc_enable(src);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 EXTI 中断失能
+// 参数说明 pin 选择 EXTI 引脚 (可选择范围由 zf_driver_exti.h 内 exti_pin_enum 枚举值确定)
+// 返回参数 void
+// 使用示例 exti_disable(A0);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void exti_disable (exti_pin_enum eru_pin)
+{
+ IfxScuEru_OutputChannel outputChannel = (IfxScuEru_OutputChannel)(eru_pin/3);
+
+ volatile Ifx_SRC_SRCR *src = &MODULE_SRC.SCU.SCU.ERU[(int)outputChannel % 4];
+ IfxSrc_disable(src);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 EXTI 失能
+// 返回参数 void
+// 使用示例 exti_disable(ERU_CH0_REQ0_P15_4);
+//-------------------------------------------------------------------------------------------------------------------
+void exti_all_close (void)
+{
+ volatile Ifx_SRC_SRCR *src;
+ int8 channel;
+ for(channel = 0; channel < 4; channel ++)
+ {
+ src = &MODULE_SRC.SCU.SCU.ERU[channel];
+ IfxSrc_deinit(src);
+ }
+}
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 EXTI 中断初始化
+// 参数说明 eru_pin 设置eru通道及引脚
+// 参数说明 trigger 设置触发方式
+// 返回参数 void
+// 使用示例 exti_init(ERU_CH0_REQ0_P15_4, EXTI_TRIGGER_RISING); // eru通道0 使用P15_4引脚，上升沿触发中断
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void exti_init (exti_pin_enum exti_pin, exti_trigger_enum trigger)
+{
+ boolean interrupt_state = disableInterrupts();
+
+ IfxScu_Req_In *reqPin;
+
+ reqPin = get_exit_pin(exti_pin);
+
+ IfxScuEru_initReqPin(reqPin, IfxPort_InputMode_pullUp);
+
+ IfxScuEru_InputChannel inputChannel = (IfxScuEru_InputChannel)reqPin->channelId;
+
+ IfxScuEru_InputNodePointer triggerSelect = (IfxScuEru_InputNodePointer)(exti_pin/3);
+ IfxScuEru_OutputChannel outputChannel = (IfxScuEru_OutputChannel)(exti_pin/3);
+
+ switch(trigger)
+ {
+ case EXTI_TRIGGER_RISING:
+ {
+ IfxScuEru_disableFallingEdgeDetection(inputChannel);
+ IfxScuEru_enableRisingEdgeDetection(inputChannel);
+ }break;
+
+ case EXTI_TRIGGER_FALLING:
+ {
+ IfxScuEru_enableFallingEdgeDetection(inputChannel);
+ IfxScuEru_disableRisingEdgeDetection(inputChannel);
+ }break;
+
+ case EXTI_TRIGGER_BOTH:
+ {
+ IfxScuEru_enableFallingEdgeDetection(inputChannel);
+ IfxScuEru_enableRisingEdgeDetection(inputChannel);
+ }break;
+
+ default: zf_assert(FALSE);
+ }
+
+ IfxScuEru_enableTriggerPulse(inputChannel);
+ IfxScuEru_connectTrigger(inputChannel, triggerSelect);
+
+ IfxScuEru_setFlagPatternDetection(outputChannel, inputChannel, TRUE);
+ IfxScuEru_enablePatternDetectionTrigger(outputChannel);
+ IfxScuEru_setInterruptGatingPattern(outputChannel, IfxScuEru_InterruptGatingPattern_alwaysActive);
+
+
+ volatile Ifx_SRC_SRCR *src = &MODULE_SRC.SCU.SCU.ERU[(int)outputChannel % 4];
+ IfxSrc_Tos exit_service;
+ uint8 exit_priority;
+ switch((exti_pin/3)%4)
+ {
+ case 0:
+ {
+ exit_service = EXTI_CH0_CH4_INT_SERVICE;
+ exit_priority = EXTI_CH0_CH4_INT_PRIO;
+ }break;
+
+ case 1:
+ {
+ exit_service = EXTI_CH1_CH5_INT_SERVICE;
+ exit_priority = EXTI_CH1_CH5_INT_PRIO;
+ }break;
+
+ case 2:
+ {
+ exit_service = EXTI_CH2_CH6_INT_SERVICE;
+ exit_priority = EXTI_CH2_CH6_INT_PRIO;
+ }break;
+
+ case 3:
+ {
+ exit_service = EXTI_CH3_CH7_INT_SERVICE;
+ exit_priority = EXTI_CH3_CH7_INT_PRIO;
+ }break;
+
+ }
+#pragma warning 507
+ IfxSrc_init(src, exit_service, exit_priority);
+#pragma warning default
+ IfxSrc_enable(src);
+
+ restoreInterrupts(interrupt_state);
+}
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_exti.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_exti.h
new file mode 100644
index 0000000..bcbc456
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_exti.h
@@ -0,0 +1,87 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_exti
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_exti_h_
+#define _zf_driver_exti_h_
+
+#include "IfxScuEru.h"
+#include "zf_common_typedef.h"
+
+typedef enum // 枚举ERU通道
+{
+ // 一个通道只能选择其中一个引脚作为 外部中断的输入
+ ERU_CH0_REQ0_P15_4 = 0*3 + 1, // 通道0可选引脚
+ ERU_CH1_REQ10_P14_3 = 1*3 + 1, // 通道1可选引脚
+ // 特别注意通道2 与 通道3都被摄像头占用
+ // 特别注意通道2 与 通道3都被摄像头占用
+ // 特别注意通道2 与 通道3都被摄像头占用
+ ERU_CH2_REQ7_P00_4 = 2*3, ERU_CH2_REQ14_P02_1, ERU_CH2_REQ2_P10_2, // 通道2可选引脚
+ ERU_CH3_REQ6_P02_0 = 3*3, ERU_CH3_REQ3_P10_3, ERU_CH3_REQ15_P14_1, // 通道3可选引脚
+
+ // 通道4与通道0 共用中断函数 在中断内通过判断标志位来识别是哪个通道触发的中断
+ ERU_CH4_REQ13_P15_5 = 4*3, ERU_CH4_REQ8_P33_7, // 通道4可选引脚
+ // 通道5与通道1 共用中断函数
+ ERU_CH5_REQ1_P15_8 = 5*3, // 通道5可选引脚
+ // 通道6与通道2 共用中断函数
+ ERU_CH6_REQ12_P11_10 = 6*3, ERU_CH6_REQ9_P20_0, // 通道6可选引脚
+ // 通道7与通道3 共用中断函数
+ ERU_CH7_REQ16_P15_1 = 7*3, ERU_CH7_REQ11_P20_9, // 通道7可选引脚
+}exti_pin_enum;
+
+
+
+typedef enum // 枚举触发方式
+{
+ EXTI_TRIGGER_RISING, // 上升沿触发模式
+ EXTI_TRIGGER_FALLING, // 下降沿触发模式
+ EXTI_TRIGGER_BOTH, // 双边沿触发模式
+}exti_trigger_enum;
+
+
+
+// 中断标志位获取
+#define exti_flag_get(eru_pin) IfxScuEru_getEventFlagStatus((IfxScuEru_InputChannel)(eru_pin/3))
+// 中断标志位清除
+#define exti_flag_clear(eru_pin) IfxScuEru_clearEventFlag((IfxScuEru_InputChannel)(eru_pin/3))
+
+//====================================================EXIT 基础函数====================================================
+void exti_all_close (void); // EXTI 失能
+void exti_enable (exti_pin_enum eru_pin); // EXTI 中断使能
+void exti_disable (exti_pin_enum eru_pin); // EXTI 中断失能
+void exti_init (exti_pin_enum eru_pin, exti_trigger_enum trigger); // EXTI 中断初始化
+//====================================================EXIT 基础函数====================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_flash.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_flash.c
new file mode 100644
index 0000000..94e306e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_flash.c
@@ -0,0 +1,203 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_flash
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IfxScuWdt.h"
+#include "IfxFlash.h"
+#include "zf_common_debug.h"
+#include "zf_driver_flash.h"
+
+
+
+flash_data_union flash_union_buffer[EEPROM_PAGE_LENGTH]; // FLASH 操作的数据缓冲区
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 校验FLASH页是否有数据
+// 参数说明 sector_num 仅可填写0 此处扇区编号并无实际作用，只是留出接口
+// 参数说明 page_num 需要写入的页编号 参数范围0-11
+// 返回参数 返回1有数据，返回0没有数据，如果需要对有数据的区域写入新的数据则应该对所在扇区进行擦除操作
+// 使用示例 flash_check(0, 0); // 校验0页是否有数据
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 flash_check (uint32 sector_num, uint32 page_num)
+{
+ zf_assert(EEPROM_PAGE_NUM > page_num);
+
+ uint32 sector_addr = IfxFlash_dFlashTableEepLog[page_num].start;
+
+ uint32 num = 0;
+
+ for(num = 0; num < EEPROM_PAGE_LENGTH && *(uint32 *)(sector_addr + num * FLASH_DATA_SIZE) == 0; num ++);
+
+ return num == EEPROM_PAGE_LENGTH ? 0 : 1;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 擦除页
+// 参数说明 sector_num 仅可填写0 此处扇区编号并无实际作用，只是留出接口
+// 参数说明 page_num 需要写入的页编号 参数范围0-11
+// 返回参数 void
+// 使用示例 flash_erase_page(0, 0);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void flash_erase_page (uint32 sector_num, uint32 page_num)
+{
+ zf_assert(EEPROM_PAGE_NUM > page_num);
+
+ uint32 flash = 0;
+ uint16 end_init_sfty_pw;
+ uint32 sector_addr = IfxFlash_dFlashTableEepLog[page_num].start;
+
+ end_init_sfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ IfxScuWdt_clearSafetyEndinit(end_init_sfty_pw);
+ IfxFlash_eraseSector (sector_addr);
+ IfxScuWdt_setSafetyEndinit (end_init_sfty_pw);
+
+ IfxFlash_waitUnbusy(flash, IfxFlash_FlashType_D0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 读取一页
+// 参数说明 sector_num 仅可填写0 此处扇区编号并无实际作用，只是留出接口
+// 参数说明 page_num 当前扇区页的编号 参数范围 <0 - 11>
+// 参数说明 buf 需要读取的数据地址 传入的数组类型必须为uint32
+// 参数说明 len 需要写入的数据长度 参数范围 1-1023
+// 返回参数 void
+// 使用示例 flash_read_page(0, 11, data_buffer, 256);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void flash_read_page(uint32 sector_num, uint32 page_num, uint32 *buf, uint16 len)
+{
+ uint32 data_cont = 0;
+ zf_assert(EEPROM_PAGE_NUM > page_num);
+ zf_assert(EEPROM_PAGE_LENGTH >= len);
+
+ for(data_cont = 0; data_cont < len; data_cont ++)
+ {
+ *buf ++ = *((uint32 *)((EEPROM_BASE_ADDR + page_num * EEPROM_PAGE_SIZE) + (data_cont * FLASH_DATA_SIZE)));
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 编程一页
+// 参数说明 sector_num 仅可填写0 此处扇区编号并无实际作用，只是留出接口
+// 参数说明 page_num 当前扇区页的编号 参数范围 <0 - 11>
+// 参数说明 buf 需要写入的数据地址 传入的数组类型必须为 uint32
+// 参数说明 len 需要写入的数据长度 参数范围 1-1024
+// 返回参数 void
+// 使用示例 flash_write_page(0, 0, buf, 10);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void flash_write_page (uint32 sector_num, uint32 page_num, const uint32 *buf, uint16 len)
+{
+ zf_assert(EEPROM_PAGE_NUM > page_num);
+ zf_assert(EEPROM_PAGE_LENGTH >= len);
+
+ uint16 end_init_sfty_pw;
+ uint32 flash_addr = IfxFlash_dFlashTableEepLog[page_num].start;
+ uint32 data_addr = 0;
+ uint32 data_cont = 0;
+ end_init_sfty_pw = IfxScuWdt_getSafetyWatchdogPassword();
+
+ for(data_cont = 0; data_cont < len; data_cont ++)
+ {
+ data_addr = flash_addr + data_cont * FLASH_DATA_SIZE;
+
+ zf_assert(0 == IfxFlash_enterPageMode(data_addr));
+
+ IfxFlash_waitUnbusy(0, IfxFlash_FlashType_D0);
+
+ IfxFlash_loadPage(data_addr, *buf ++, 0);
+
+ IfxScuWdt_clearSafetyEndinit(end_init_sfty_pw);
+ IfxFlash_writePage (data_addr);
+ IfxScuWdt_setSafetyEndinit (end_init_sfty_pw);
+
+ IfxFlash_waitUnbusy(0, IfxFlash_FlashType_D0);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 从指定 FLASH 的扇区的指定页码读取数据到缓冲区
+// 参数说明 sector_num 仅可填写0 此处扇区编号并无实际作用，只是留出接口
+// 参数说明 page_num 当前扇区页的编号 参数范围 <0 - 11>
+// 返回参数 void
+// 使用示例 flash_read_page_to_buffer(0, 11);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void flash_read_page_to_buffer (uint32 sector_num, uint32 page_num)
+{
+ uint32 data_cont = 0;
+ zf_assert(EEPROM_PAGE_NUM > page_num);
+
+ uint32 flash_addr = IfxFlash_dFlashTableEepLog[page_num].start; // 提取当前 Flash 地址
+
+ for(data_cont = 0; data_cont < EEPROM_PAGE_LENGTH; data_cont ++)
+ {
+ flash_union_buffer[data_cont].uint32_type = *((uint32 *)(flash_addr + (data_cont * FLASH_DATA_SIZE)));
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 向指定 FLASH 的扇区的指定页码写入缓冲区的数据
+// 参数说明 sector_num 仅可填写0 此处扇区编号并无实际作用，只是留出接口
+// 参数说明 page_num 当前扇区页的编号 参数范围 <0 - 11>
+// 返回参数 uint8 1-表示失败 0-表示成功
+// 使用示例 flash_write_page_from_buffer(0, 11);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 flash_write_page_from_buffer (uint32 sector_num, uint32 page_num)
+{
+ uint32 *data_pointer = (uint32 *)flash_union_buffer;
+
+ zf_assert(EEPROM_PAGE_NUM > page_num);
+
+ flash_write_page(0, page_num, data_pointer, EEPROM_PAGE_LENGTH);
+
+ return 0;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 清空数据缓冲区
+// 参数说明 void
+// 返回参数 void
+// 使用示例 flash_buffer_clear();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void flash_buffer_clear (void)
+{
+ memset(flash_union_buffer, 0xFF, EEPROM_PAGE_LENGTH);
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_flash.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_flash.h
new file mode 100644
index 0000000..487be42
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_flash.h
@@ -0,0 +1,75 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_flash
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_flash_h_
+#define _zf_driver_flash_h_
+
+#include "ifxFlash_cfg.h"
+#include "zf_common_typedef.h"
+
+#define EEPROM_BASE_ADDR (IFXFLASH_DFLASH_START)
+#define EEPROM_SIZE (IFXFLASH_DFLASH_SIZE) // 一共有96KB
+#define EEPROM_PAGE_SIZE (EEPROM_SIZE / IFXFLASH_DFLASH_NUM_LOG_SECTORS)
+#define EEPROM_PAGE_NUM (IFXFLASH_DFLASH_NUM_LOG_SECTORS) // 96KB分为了12页
+
+#define FLASH_DATA_SIZE (IFXFLASH_DFLASH_PAGE_LENGTH)
+#define EEPROM_PAGE_LENGTH (EEPROM_PAGE_SIZE/FLASH_DATA_SIZE) // 每页可以存1024个uint32类型的数据
+
+
+typedef union // 固定的数据缓冲单元格式
+{
+ float float_type; // float 类型
+ uint32 uint32_type; // uint32 类型
+ int32 int32_type; // int32 类型
+ uint16 uint16_type; // uint16 类型
+ int16 int16_type; // int16 类型
+ uint8 uint8_type; // uint8 类型
+ int8 int8_type; // int8 类型
+}flash_data_union; // 所有类型数据共用同一个 32bit 地址
+
+extern flash_data_union flash_union_buffer[EEPROM_PAGE_LENGTH];
+
+//====================================================FLASH 基础函数====================================================
+uint8 flash_check (uint32 sector_num, uint32 page_num); // 校验FLASH页是否有数据
+void flash_erase_page (uint32 sector_num, uint32 page_num); // 擦除页
+void flash_read_page (uint32 sector_num, uint32 page_num, uint32 *buf, uint16 len); // 读取一页
+void flash_write_page (uint32 sector_num, uint32 page_num, const uint32 *buf, uint16 len); // 编程一页
+void flash_read_page_to_buffer (uint32 sector_num, uint32 page_num); // 从指定 FLASH 的指定页码读取数据到缓冲区
+uint8 flash_write_page_from_buffer (uint32 sector_num, uint32 page_num); // 向指定 FLASH 的扇区的指定页码写入缓冲区的数据
+void flash_buffer_clear (void); // 清空数据缓冲区
+//====================================================FALSH 基础函数====================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_gpio.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_gpio.c
new file mode 100644
index 0000000..4388646
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_gpio.c
@@ -0,0 +1,195 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_gpio
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_driver_gpio.h"
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取GPIO基地址
+// 参数说明 pin 选择的引脚 (可选择范围由 zf_driver_gpio.h 内gpio_pin_enum枚举值确定)
+// 返回参数 void
+// 使用示例 get_port(P00_0)
+// 备注信息 本函数在文件内部调用 用户不用关注 也不可修改
+//-------------------------------------------------------------------------------------------------------------------
+Ifx_P* get_port (gpio_pin_enum pin)
+{
+ volatile Ifx_P *port;
+
+ switch(pin&0xffe0)
+ {
+ case P00_0: port = &MODULE_P00; break;
+ case P02_0: port = &MODULE_P02; break;
+ case P10_0: port = &MODULE_P10; break;
+ case P11_0: port = &MODULE_P11; break;
+ case P13_0: port = &MODULE_P13; break;
+ case P14_0: port = &MODULE_P14; break;
+ case P15_0: port = &MODULE_P15; break;
+ case P20_0: port = &MODULE_P20; break;
+ case P21_0: port = &MODULE_P21; break;
+ case P22_0: port = &MODULE_P22; break;
+ case P23_0: port = &MODULE_P23; break;
+ case P32_0: port = &MODULE_P32; break;
+ case P33_0: port = &MODULE_P33; break;
+ default:break;
+ }
+#pragma warning 507
+ return port;
+#pragma warning default
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 gpio 输出设置
+// 参数说明 pin 选择的引脚 (可选择范围由 zf_driver_gpio.h 内 gpio_pin_enum 枚举值确定)
+// 参数说明 dat 0：低电平 1：高电平
+// 返回参数 void
+// 使用示例 gpio_set_level(P00_0, 1);// P00_0 输出高电平
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void gpio_set_level (gpio_pin_enum pin, uint8 dat)
+{
+ if(dat)
+ {
+ IfxPort_setPinHigh(get_port(pin), pin&0x1f);
+ }
+ else
+ {
+ IfxPort_setPinLow(get_port(pin), pin&0x1f);
+ }
+}
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 gpio 电平获取
+// 参数说明 pin 选择的引脚 (可选择范围由 zf_driver_gpio.h 内 gpio_pin_enum 枚举值确定)
+// 返回参数 uint8 引脚当前电平
+// 使用示例 uint8 status = gpio_get_level(P00_0);// 获取P00_0引脚电平
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 gpio_get_level (gpio_pin_enum pin)
+{
+ return IfxPort_getPinState(get_port(pin), pin&0x1f);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 gpio 翻转电平
+// 参数说明 pin 选择的引脚 (可选择范围由 zf_driver_gpio.h 内 gpio_pin_enum 枚举值确定)
+// 返回参数 void
+// 使用示例 gpio_toggle_level(P00_0);// P00_0引脚电平翻转
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void gpio_toggle_level (gpio_pin_enum pin)
+{
+ IfxPort_togglePin(get_port(pin), pin&0x1f);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 gpio 方向设置
+// 参数说明 pin 选择的引脚 (可选择范围由 zf_driver_gpio.h 内 gpio_pin_enum 枚举值确定)
+// 参数说明 dir 引脚的方向 输出：GPO 输入：GPI
+// 参数说明 mode 引脚的模式 (可选择范围由 zf_driver_gpio.h 内 gpio_mode_enum 枚举值确定)
+// 返回参数 void
+// 使用示例 gpio_dir(P00_0, GPO, GPO_PUSH_PULL);// 设置P00_0为推挽输出模式
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void gpio_set_dir (gpio_pin_enum pin, gpio_dir_enum dir, gpio_mode_enum pinmode)
+{
+ IfxPort_Mode port_mode;
+ if(dir == GPI)
+ {
+ switch(pinmode)
+ {
+ case GPI_FLOATING_IN:port_mode = IfxPort_Mode_inputNoPullDevice ; break; // 浮空输入
+ case GPI_PULL_DOWN :port_mode = IfxPort_Mode_inputPullDown ; break; // 下拉输入
+ default: port_mode = IfxPort_Mode_inputPullUp ; break; // 默认为上拉输入
+ }
+ }
+ else
+ {
+ switch(pinmode)
+ {
+ case GPO_OPEN_DTAIN :port_mode = IfxPort_Mode_outputOpenDrainGeneral; break;// 开漏输出
+ default: port_mode = IfxPort_Mode_outputPushPullGeneral ; break;// 默认为推挽输出
+ }
+ }
+
+ IfxPort_setPinMode(get_port(pin), pin&0x1f, port_mode);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 gpio 初始化
+// 参数说明 pin 选择的引脚 (可选择范围由 zf_driver_gpio.h 内 gpio_pin_enum 枚举值确定)
+// 参数说明 mode 引脚的方向 [GPI/GPIO]
+// 参数说明 dat 引脚初始化时设置的电平状态，输出时有效 0：低电平 1：高电平 仅在设置为输出模式时有效
+// 参数说明 mode 引脚的模式 (可选择范围由 zf_driver_gpio.h 内 gpio_mode_enum 枚举值确定)
+// 返回参数 void
+// 使用示例 gpio_init(P00_0, GPO, 1, GPO_PUSH_PULL); // P00_0初始化为GPIO功能、输出模式、输出高电平、推挽输出
+// 备注信息 需要特别注意P20_2是不能用于输出的，仅仅只有输入的功能
+//-------------------------------------------------------------------------------------------------------------------
+void gpio_init (gpio_pin_enum pin, gpio_dir_enum dir, uint8 dat, gpio_mode_enum pinmode)
+{
+ IfxPort_Mode port_mode;
+
+ if(dir == GPI)
+ {
+ switch(pinmode)
+ {
+ case GPI_FLOATING_IN:port_mode = IfxPort_Mode_inputNoPullDevice ; break; // 浮空输入
+ case GPI_PULL_DOWN :port_mode = IfxPort_Mode_inputPullDown ; break; // 下拉输入
+ default: port_mode = IfxPort_Mode_inputPullUp ; break; // 默认为上拉输入
+ }
+ }
+ else
+ {
+ switch(pinmode)
+ {
+ case GPO_OPEN_DTAIN :port_mode = IfxPort_Mode_outputOpenDrainGeneral; break;// 开漏输出
+ default: port_mode = IfxPort_Mode_outputPushPullGeneral ; break;// 默认为推挽输出
+ }
+ }
+
+ IfxPort_setPinMode(get_port(pin), pin&0x1f, port_mode);
+
+ IfxPort_setPinPadDriver(get_port(pin), pin&0x1f, IfxPort_PadDriver_cmosAutomotiveSpeed1);
+
+ if(dir == GPO)
+ {
+ if(dat)
+ {
+ IfxPort_setPinHigh(get_port(pin), pin&0x1f);
+ }
+ else
+ {
+ IfxPort_setPinLow(get_port(pin), pin&0x1f);
+ }
+ }
+
+}
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_gpio.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_gpio.h
new file mode 100644
index 0000000..753635e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_gpio.h
@@ -0,0 +1,155 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_gpio
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_gpio_h_
+#define _zf_driver_gpio_h_
+
+#include "IFXPORT.h"
+#include "zf_common_typedef.h"
+
+typedef enum // 枚举端口 此枚举定义不允许用户修改
+{
+ // 在设置IO时请自行根据硬件确认当前芯片是否具有此IO
+
+ // 需要特别注意P20_2是不能用于输出的，仅仅只有输入的功能 TC264DA芯片的21.6无法正常使用
+ // 需要特别注意P20_2是不能用于输出的，仅仅只有输入的功能 TC264DA芯片的21.6无法正常使用
+ // 需要特别注意P20_2是不能用于输出的，仅仅只有输入的功能 TC264DA芯片的21.6无法正常使用
+
+ P00_0 = 0*32, P00_1, P00_2, P00_3, P00_4, P00_5, P00_6, P00_7,
+ P00_8, P00_9, P00_10, P00_11, P00_12, P00_13, P00_14, P00_15,
+
+ P02_0 = 2*32, P02_1, P02_2, P02_3, P02_4, P02_5, P02_6, P02_7,
+ P02_8, P02_9, P02_10, P02_11, P02_12, P02_13, P02_14, P02_15,
+
+ P10_0 = 10*32, P10_1, P10_2, P10_3, P10_4, P10_5, P10_6, P10_7,
+ P10_8, P10_9, P10_10, P10_11, P10_12, P10_13, P10_14, P10_15,
+
+ P11_0 = 11*32, P11_1, P11_2, P11_3, P11_4, P11_5, P11_6, P11_7,
+ P11_8, P11_9, P11_10, P11_11, P11_12, P11_13, P11_14, P11_15,
+
+ P13_0 = 13*32, P13_1, P13_2, P13_3, P13_4, P13_5, P13_6, P13_7,
+ P13_8, P13_9, P13_10, P13_11, P13_12, P13_13, P13_14, P13_15,
+
+ P14_0 = 14*32, P14_1, P14_2, P14_3, P14_4, P14_5, P14_6, P14_7,
+ P14_8, P14_9, P14_10, P14_11, P14_12, P14_13, P14_14, P14_15,
+
+ P15_0 = 15*32, P15_1, P15_2, P15_3, P15_4, P15_5, P15_6, P15_7,
+ P15_8, P15_9, P15_10, P15_11, P15_12, P15_13, P15_14, P15_15,
+
+ P20_0 = 20*32, P20_1, P20_2, P20_3, P20_4, P20_5, P20_6, P20_7,
+ P20_8, P20_9, P20_10, P20_11, P20_12, P20_13, P20_14, P20_15,
+
+ P21_0 = 21*32, P21_1, P21_2, P21_3, P21_4, P21_5, P21_6, P21_7,
+ P21_8, P21_9, P21_10, P21_11, P21_12, P21_13, P21_14, P21_15,
+
+ P22_0 = 22*32, P22_1, P22_2, P22_3, P22_4, P22_5, P22_6, P22_7,
+ P22_8, P22_9, P22_10, P22_11, P22_12, P22_13, P22_14, P22_15,
+
+ P23_0 = 23*32, P23_1, P23_2, P23_3, P23_4, P23_5, P23_6, P23_7,
+ P23_8, P23_9, P23_10, P23_11, P23_12, P23_13, P23_14, P23_15,
+
+ P32_0 = 32*32, P32_1, P32_2, P32_3, P32_4, P32_5, P32_6, P32_7,
+ P32_8, P32_9, P32_10, P32_11, P32_12, P32_13, P32_14, P32_15,
+
+ P33_0 = 33*32, P33_1, P33_2, P33_3, P33_4, P33_5, P33_6, P33_7,
+ P33_8, P33_9, P33_10, P33_11, P33_12, P33_13, P33_14, P33_15,
+
+}gpio_pin_enum;
+
+typedef enum // 枚举端口方向 此枚举定义不允许用户修改
+{
+ GPI = 0, // 定义管脚输入方向
+ GPO = 1, // 定义管脚输出方向
+}gpio_dir_enum;
+
+typedef enum // 枚举端口电平 此枚举定义不允许用户修改
+{
+ GPIO_LOW = 0, // 定义低电平
+ GPIO_HIGH = 1, // 定义高电平
+}gpio_level_enum;
+
+typedef enum // 枚举端口模式 此枚举定义不允许用户修改
+{
+ GPI_FLOATING_IN, // 定义管脚浮空输入
+ GPI_PULL_UP , // 定义管脚上拉输入
+ GPI_PULL_DOWN , // 定义管脚下拉输入
+
+ GPO_PUSH_PULL , // 定义管脚推挽输出
+ GPO_OPEN_DTAIN , // 定义管脚开漏输出
+}gpio_mode_enum;
+
+//====================================================GPIO 快捷函数====================================================
+Ifx_P* get_port (gpio_pin_enum pin);
+#define get_port_in_addr(pin) (uint8 *)(&IfxPort_getAddress((IfxPort_Index)(pin/32))->IN + pin%32/8)
+#define get_port_out_addr(port) (((Ifx_P *)IfxPort_cfg_indexMap[port].module)->OUT.U)
+
+//------------------------------------------------------------------------------------------------------------------
+// 函数简介 对应 IO 置位为高电平
+// 参数说明 x 选择的引脚 (可选择范围由 zf_driver_gpio.h 内 gpio_pin_enum 枚举值确定)
+// 返回参数 void
+// 使用示例 gpio_high(P00_0);// P00_0 输出高电平
+// 备注信息
+//------------------------------------------------------------------------------------------------------------------
+#define gpio_high(x) (get_port(x))->OMR.U = 1 << ((x)&0x1f) // GPIO置位 (get_port(x))->OMR.U = 1 << ((x)&0x1f)
+
+//------------------------------------------------------------------------------------------------------------------
+// 函数简介 对应 IO 置位为低电平
+// 参数说明 x 选择的引脚 (可选择范围由 zf_driver_gpio.h 内 gpio_pin_enum 枚举值确定)
+// 返回参数 void
+// 使用示例 gpio_low(P00_0);// P00_0 输出低电平
+// 备注信息
+//------------------------------------------------------------------------------------------------------------------
+#define gpio_low(x) (get_port(x))->OMR.U = 65536 << ((x)&0x1f) // GPIO复位 (get_port(x))->OMR.U = 65536 << ((x)&0x1f)
+
+//====================================================GPIO 快捷函数====================================================
+
+//====================================================GPIO 基础函数====================================================
+void gpio_set_level (gpio_pin_enum pin, uint8 dat);
+uint8 gpio_get_level (gpio_pin_enum pin);
+void gpio_toggle_level (gpio_pin_enum pin);
+void gpio_set_dir (gpio_pin_enum pin, gpio_dir_enum dir, gpio_mode_enum pinconf);
+void gpio_init (gpio_pin_enum pin, gpio_dir_enum dir, uint8 dat, gpio_mode_enum pinconf);
+//====================================================GPIO 基础函数====================================================
+
+//==================================================兼容旧版本开源库接口名称=================================================
+#ifdef COMPATIBLE_WITH_OLDER_VERSIONS
+#define gpio_set(pin, dat) (gpio_set_level((pin), (dat)))
+#define gpio_get(pin) (gpio_get_level((pin)))
+#define gpio_dir(pin, dir, mode) (gpio_set_dir((pin), (dir), (mode)))
+#define gpio_toggle(pin) (gpio_toggle_level((pin)))
+#endif
+//==================================================兼容旧版本开源库接口名称=================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pit.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pit.c
new file mode 100644
index 0000000..deea36c
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pit.c
@@ -0,0 +1,215 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_pit
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IfxCcu6_Timer.h"
+#include "SysSe/Bsp/Bsp.h"
+#include "isr_config.h"
+#include "zf_driver_pit.h"
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 pit关闭
+// 参数说明 pit_index 选择CCU6模块
+// 返回参数 void
+// 使用示例 pit_close(CCU60_CH0); // 关闭CCU60 通道0的计时器
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void pit_close (pit_index_enum pit_index)
+{
+ volatile Ifx_CCU6 *module;
+ IfxCcu6_Timer g_Ccu6Timer;
+
+ module = IfxCcu6_getAddress((IfxCcu6_Index)(pit_index / 2));
+
+ g_Ccu6Timer.ccu6 = module;
+ g_Ccu6Timer.timer = (IfxCcu6_TimerId)((pit_index % 2));
+
+ IfxCcu6_Timer_stop(&g_Ccu6Timer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 pit启动
+// 参数说明 pit_index 选择CCU6模块
+// 返回参数 void
+// 使用示例 pit_start(CCU60_CH0); // 打开CCU60 通道0的计时器
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void pit_start (pit_index_enum pit_index)
+{
+ volatile Ifx_CCU6 *module;
+ IfxCcu6_Timer g_Ccu6Timer;
+
+ module = IfxCcu6_getAddress((IfxCcu6_Index)(pit_index / 2));
+
+ g_Ccu6Timer.ccu6 = module;
+ g_Ccu6Timer.timer = (IfxCcu6_TimerId)((pit_index % 2));
+
+ IfxCcu6_Timer_start(&g_Ccu6Timer);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 禁止所有pit中断
+// 返回参数 void
+// 使用示例 pit_interrupt_all_close();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void pit_all_close (void)
+{
+ IfxCcu6_disableModule((Ifx_CCU6 *)IfxCcu6_cfg_indexMap[0].module);
+ IfxCcu6_disableModule((Ifx_CCU6 *)IfxCcu6_cfg_indexMap[1].module);
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 失能pit中断
+// 参数说明 pit_index 选择CCU6模块
+// 返回参数 void
+// 使用示例 pit_disable_interrupt(CCU60_CH0); // 禁止CCU60 通道0的中断
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void pit_disable (pit_index_enum pit_index)
+{
+ volatile Ifx_CCU6 *module;
+ module = IfxCcu6_getAddress((IfxCcu6_Index)(pit_index / 2));
+ IfxCcu6_disableInterrupt(module, (pit_index % 2) * 2 + 7);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 使能pit中断
+// 参数说明 pit_index 选择CCU6模块
+// 返回参数 void
+// 使用示例 pit_enable_interrupt(CCU60_CH0); // 开启CCU60 通道0的中断
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void pit_enable (pit_index_enum pit_index)
+{
+ volatile Ifx_CCU6 *module;
+ module = IfxCcu6_getAddress((IfxCcu6_Index)(pit_index / 2));
+ IfxCcu6_enableInterrupt(module, (pit_index % 2) * 2 + 7);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 pit初始化
+// 参数说明 pit_index 选择CCU6模块
+// 参数说明 time 周期时间
+// 返回参数 void
+// 使用示例 pit_init(CCU60_CH0, 5000); // 设置周期中断5000us
+// 备注信息 请使用.h文件中 带时间单位的宏定义函数
+//-------------------------------------------------------------------------------------------------------------------
+void pit_init (pit_index_enum pit_index, uint32 time)
+{
+ uint8 i;
+ volatile Ifx_CCU6 *module;
+ uint64 timer_input_clk;
+ IfxCcu6_Timer g_Ccu6Timer;
+ IfxCcu6_Timer_Config timerConfig;
+ uint32 timer_period;
+
+ boolean interrupt_state = disableInterrupts();
+
+ module = IfxCcu6_getAddress((IfxCcu6_Index)(pit_index/2));
+
+ IfxCcu6_Timer_initModuleConfig(&timerConfig, module);
+
+
+
+ timer_input_clk = IfxScuCcu_getSpbFrequency();
+ i = 0;
+ while(i < 16)
+ {
+ timer_period = (uint32)(timer_input_clk * time / 1000000);
+ if(timer_period < 0xffff) break;
+ timer_input_clk >>= 1;
+ i++;
+ }
+ if(16 <= i) IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+
+ switch(pit_index)
+ {
+ case CCU60_CH0:
+ {
+ timerConfig.interrupt1.typeOfService = CCU6_0_CH0_INT_SERVICE;
+ timerConfig.interrupt1.priority = CCU6_0_CH0_ISR_PRIORITY;
+ break;
+ }
+ case CCU60_CH1:
+ {
+ timerConfig.interrupt2.typeOfService = CCU6_0_CH1_INT_SERVICE;
+ timerConfig.interrupt2.priority = CCU6_0_CH1_ISR_PRIORITY;
+ break;
+ }
+ case CCU61_CH0:
+ {
+ timerConfig.interrupt1.typeOfService = CCU6_1_CH0_INT_SERVICE;
+ timerConfig.interrupt1.priority = CCU6_1_CH0_ISR_PRIORITY;
+ break;
+ }
+ case CCU61_CH1:
+ {
+ timerConfig.interrupt2.typeOfService = CCU6_1_CH1_INT_SERVICE;
+ timerConfig.interrupt2.priority = CCU6_1_CH1_ISR_PRIORITY;
+ break;
+ }
+ }
+
+ if((pit_index % 2) == 0)
+ {
+ timerConfig.timer = IfxCcu6_TimerId_t12;
+ timerConfig.interrupt1.source = IfxCcu6_InterruptSource_t12PeriodMatch;
+ timerConfig.interrupt1.serviceRequest = IfxCcu6_ServiceRequest_1;
+ timerConfig.base.t12Period = timer_period;
+ timerConfig.base.t12Frequency = (float)timer_input_clk;
+ timerConfig.clock.t12countingInputMode = IfxCcu6_CountingInputMode_internal;
+ }
+ else
+ {
+ timerConfig.timer = IfxCcu6_TimerId_t13;
+ timerConfig.interrupt2.source = IfxCcu6_InterruptSource_t13PeriodMatch;
+ timerConfig.interrupt2.serviceRequest = IfxCcu6_ServiceRequest_2;
+ timerConfig.base.t13Period = timer_period;
+ timerConfig.base.t13Frequency = (float)timer_input_clk;
+ timerConfig.clock.t13countingInputMode = IfxCcu6_CountingInputMode_internal;
+ }
+ timerConfig.timer12.counterValue = 0;
+ timerConfig.timer13.counterValue = 0;
+ timerConfig.trigger.t13InSyncWithT12 = FALSE;
+
+ IfxCcu6_Timer_initModule(&g_Ccu6Timer, &timerConfig);
+
+ restoreInterrupts(interrupt_state);
+
+ IfxCcu6_setSuspendMode(module, IfxCcu6_SuspendMode_hard);
+ IfxCcu6_Timer_start(&g_Ccu6Timer);
+}
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pit.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pit.h
new file mode 100644
index 0000000..664fabd
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pit.h
@@ -0,0 +1,80 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_pit
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_pit_h_
+#define _zf_driver_pit_h_
+
+#include "zf_common_typedef.h"
+
+typedef enum // 枚举通道号
+{
+ CCU60_CH0,
+ CCU60_CH1,
+ CCU61_CH0,
+ CCU61_CH1,
+}pit_index_enum;
+
+
+#define pit_clear_flag(pit_index) (IfxCcu6_clearInterruptStatusFlag(IfxCcu6_getAddress((IfxCcu6_Index)(pit_index / 2)), (IfxCcu6_InterruptSource)(7+((pit_index % 2)*2))))
+
+//====================================================PIT 基础函数====================================================
+void pit_close (pit_index_enum pit_index);
+void pit_start (pit_index_enum pit_index);
+void pit_all_close (void);
+void pit_disable (pit_index_enum pit_index);
+void pit_enable (pit_index_enum pit_index);
+void pit_init (pit_index_enum pit_index, uint32 time);
+//====================================================PIT 基础函数====================================================
+
+//====================================================PIT 扩展函数====================================================
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 pit_ms初始化
+// 参数说明 pit_index 选择CCU6模块
+// 参数说明 time 周期时间(单位：毫秒)
+// 返回参数 void
+// 使用示例 pit_ms_init(CCU60_CH0, 5); // 设置周期中断5ms
+//-------------------------------------------------------------------------------------------------------------------
+#define pit_ms_init(pit_index, time) pit_init((pit_index), (time*1000)) // (单位为 毫秒)
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 pit_us初始化
+// 参数说明 pit_index 选择CCU6模块
+// 参数说明 time 周期时间(单位：微秒)
+// 返回参数 void
+// 使用示例 pit_us_init(CCU60_CH0, 5); // 设置周期中断5us
+//-------------------------------------------------------------------------------------------------------------------
+#define pit_us_init(pit_index, time) pit_init((pit_index), (time)) // (单位为 微秒)
+//====================================================PIT 扩展函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pwm.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pwm.c
new file mode 100644
index 0000000..e2f4e12
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pwm.c
@@ -0,0 +1,385 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_pwm
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IfxGtm_Atom_Pwm.h"
+#include "ifxGtm_PinMap.h"
+#include "zf_common_debug.h"
+#include "zf_driver_pwm.h"
+
+#define CMU_CLK_FREQ 20000000.0f // CMU时钟频率
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取端口参数
+// 返回参数 IfxGtm_Atom_ToutMap
+// 使用示例 get_pwm_pin(ATOM0_CH0_P00_0);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static IfxGtm_Atom_ToutMap* get_pwm_pin (pwm_channel_enum atom_pin)
+{
+ IfxGtm_Atom_ToutMap* pwm_pwm_pin_config;
+
+ switch(atom_pin)
+ {
+ case ATOM0_CH0_P00_0: pwm_pwm_pin_config = &IfxGtm_ATOM0_0_TOUT9_P00_0_OUT; break;
+ case ATOM0_CH0_P02_0: pwm_pwm_pin_config = &IfxGtm_ATOM0_0_TOUT0_P02_0_OUT; break;
+ case ATOM0_CH0_P02_8: pwm_pwm_pin_config = &IfxGtm_ATOM0_0_TOUT8_P02_8_OUT; break;
+ case ATOM0_CH0_P14_5: pwm_pwm_pin_config = &IfxGtm_ATOM0_0_TOUT85_P14_5_OUT; break;
+ case ATOM0_CH0_P21_2: pwm_pwm_pin_config = &IfxGtm_ATOM0_0_TOUT53_P21_2_OUT; break;
+ case ATOM0_CH0_P22_1: pwm_pwm_pin_config = &IfxGtm_ATOM0_0_TOUT48_P22_1_OUT; break;
+
+ case ATOM0_CH1_P00_1: pwm_pwm_pin_config = &IfxGtm_ATOM0_1_TOUT10_P00_1_OUT; break;
+ case ATOM0_CH1_P00_2: pwm_pwm_pin_config = &IfxGtm_ATOM0_1_TOUT11_P00_2_OUT; break;
+ case ATOM0_CH1_P02_1: pwm_pwm_pin_config = &IfxGtm_ATOM0_1_TOUT1_P02_1_OUT; break;
+ case ATOM0_CH1_P10_1: pwm_pwm_pin_config = &IfxGtm_ATOM0_1_TOUT103_P10_1_OUT; break;
+ case ATOM0_CH1_P14_4: pwm_pwm_pin_config = &IfxGtm_ATOM0_1_TOUT84_P14_4_OUT; break;
+ case ATOM0_CH1_P21_3: pwm_pwm_pin_config = &IfxGtm_ATOM0_1_TOUT54_P21_3_OUT; break;
+ case ATOM0_CH1_P22_0: pwm_pwm_pin_config = &IfxGtm_ATOM0_1_TOUT47_P22_0_OUT; break;
+ case ATOM0_CH1_P33_9: pwm_pwm_pin_config = &IfxGtm_ATOM0_1_TOUT31_P33_9_OUT; break;
+
+ case ATOM0_CH2_P00_3: pwm_pwm_pin_config = &IfxGtm_ATOM0_2_TOUT12_P00_3_OUT; break;
+ case ATOM0_CH2_P02_2: pwm_pwm_pin_config = &IfxGtm_ATOM0_2_TOUT2_P02_2_OUT; break;
+ case ATOM0_CH2_P10_2: pwm_pwm_pin_config = &IfxGtm_ATOM0_2_TOUT104_P10_2_OUT; break;
+ case ATOM0_CH2_P10_5: pwm_pwm_pin_config = &IfxGtm_ATOM0_2_TOUT107_P10_5_OUT; break;
+ case ATOM0_CH2_P14_3: pwm_pwm_pin_config = &IfxGtm_ATOM0_2_TOUT83_P14_3_OUT; break;
+ case ATOM0_CH2_P21_4: pwm_pwm_pin_config = &IfxGtm_ATOM0_2_TOUT55_P21_4_OUT; break;
+ case ATOM0_CH2_P33_11:pwm_pwm_pin_config = &IfxGtm_ATOM0_2_TOUT33_P33_11_OUT; break;
+
+ case ATOM0_CH3_P00_4: pwm_pwm_pin_config = &IfxGtm_ATOM0_3_TOUT13_P00_4_OUT; break;
+ case ATOM0_CH3_P02_3: pwm_pwm_pin_config = &IfxGtm_ATOM0_3_TOUT3_P02_3_OUT; break;
+ case ATOM0_CH3_P10_3: pwm_pwm_pin_config = &IfxGtm_ATOM0_3_TOUT105_P10_3_OUT; break;
+ case ATOM0_CH3_P10_6: pwm_pwm_pin_config = &IfxGtm_ATOM0_3_TOUT108_P10_6_OUT; break;
+ case ATOM0_CH3_P14_2: pwm_pwm_pin_config = &IfxGtm_ATOM0_3_TOUT82_P14_2_OUT; break;
+ case ATOM0_CH3_P21_5: pwm_pwm_pin_config = &IfxGtm_ATOM0_3_TOUT56_P21_5_OUT; break;
+ case ATOM0_CH3_P22_2: pwm_pwm_pin_config = &IfxGtm_ATOM0_3_TOUT49_P22_2_OUT; break;
+
+ case ATOM0_CH4_P00_5: pwm_pwm_pin_config = &IfxGtm_ATOM0_4_TOUT14_P00_5_OUT; break;
+ case ATOM0_CH4_P02_4: pwm_pwm_pin_config = &IfxGtm_ATOM0_4_TOUT4_P02_4_OUT; break;
+ case ATOM0_CH4_P14_1: pwm_pwm_pin_config = &IfxGtm_ATOM0_4_TOUT81_P14_1_OUT; break;
+ case ATOM0_CH4_P20_3: pwm_pwm_pin_config = &IfxGtm_ATOM0_4_TOUT61_P20_3_OUT; break;
+ case ATOM0_CH4_P21_6: pwm_pwm_pin_config = &IfxGtm_ATOM0_4_TOUT57_P21_6_OUT; break;
+ case ATOM0_CH4_P22_3: pwm_pwm_pin_config = &IfxGtm_ATOM0_4_TOUT50_P22_3_OUT; break;
+
+ case ATOM0_CH5_P00_6: pwm_pwm_pin_config = &IfxGtm_ATOM0_5_TOUT15_P00_6_OUT; break;
+ case ATOM0_CH5_P02_5: pwm_pwm_pin_config = &IfxGtm_ATOM0_5_TOUT5_P02_5_OUT; break;
+ case ATOM0_CH5_P21_7: pwm_pwm_pin_config = &IfxGtm_ATOM0_5_TOUT58_P21_7_OUT; break;
+ case ATOM0_CH5_P32_4: pwm_pwm_pin_config = &IfxGtm_ATOM0_5_TOUT40_P32_4_OUT; break;
+
+ case ATOM0_CH6_P00_7: pwm_pwm_pin_config = &IfxGtm_ATOM0_6_TOUT16_P00_7_OUT; break;
+ case ATOM0_CH6_P02_6: pwm_pwm_pin_config = &IfxGtm_ATOM0_6_TOUT6_P02_6_OUT; break;
+ case ATOM0_CH6_P20_0: pwm_pwm_pin_config = &IfxGtm_ATOM0_6_TOUT59_P20_0_OUT; break;
+ case ATOM0_CH6_P23_1: pwm_pwm_pin_config = &IfxGtm_ATOM0_6_TOUT42_P23_1_OUT; break;
+
+ case ATOM0_CH7_P00_8: pwm_pwm_pin_config = &IfxGtm_ATOM0_7_TOUT17_P00_8_OUT; break;
+ case ATOM0_CH7_P02_7: pwm_pwm_pin_config = &IfxGtm_ATOM0_7_TOUT7_P02_7_OUT; break;
+ case ATOM0_CH7_P20_8: pwm_pwm_pin_config = &IfxGtm_ATOM0_7_TOUT64_P20_8_OUT; break;
+
+ case ATOM1_CH0_P00_0: pwm_pwm_pin_config = &IfxGtm_ATOM1_0_TOUT9_P00_0_OUT; break;
+ case ATOM1_CH0_P02_0: pwm_pwm_pin_config = &IfxGtm_ATOM1_0_TOUT0_P02_0_OUT; break;
+ case ATOM1_CH0_P02_8: pwm_pwm_pin_config = &IfxGtm_ATOM1_0_TOUT8_P02_8_OUT; break;
+ case ATOM1_CH0_P15_5: pwm_pwm_pin_config = &IfxGtm_ATOM1_0_TOUT76_P15_5_OUT; break;
+ case ATOM1_CH0_P15_6: pwm_pwm_pin_config = &IfxGtm_ATOM1_0_TOUT77_P15_6_OUT; break;
+ case ATOM1_CH0_P20_12:pwm_pwm_pin_config = &IfxGtm_ATOM1_0_TOUT68_P20_12_OUT; break;
+ case ATOM1_CH0_P21_2: pwm_pwm_pin_config = &IfxGtm_ATOM1_0_TOUT53_P21_2_OUT; break;
+ case ATOM1_CH0_P22_1: pwm_pwm_pin_config = &IfxGtm_ATOM1_0_TOUT48_P22_1_OUT; break;
+
+ case ATOM1_CH1_P00_1: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT10_P00_1_OUT; break;
+ case ATOM1_CH1_P00_2: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT11_P00_2_OUT; break;
+ case ATOM1_CH1_P02_1: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT1_P02_1_OUT; break;
+ case ATOM1_CH1_P10_1: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT103_P10_1_OUT; break;
+ case ATOM1_CH1_P14_6: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT86_P14_6_OUT; break;
+ case ATOM1_CH1_P15_7: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT78_P15_7_OUT; break;
+ case ATOM1_CH1_P15_8: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT79_P15_8_OUT; break;
+ case ATOM1_CH1_P20_13:pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT69_P20_13_OUT; break;
+ case ATOM1_CH1_P21_3: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT54_P21_3_OUT; break;
+ case ATOM1_CH1_P22_0: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT47_P22_0_OUT; break;
+ case ATOM1_CH1_P33_9: pwm_pwm_pin_config = &IfxGtm_ATOM1_1_TOUT31_P33_9_OUT; break;
+
+ case ATOM1_CH2_P00_3: pwm_pwm_pin_config = &IfxGtm_ATOM1_2_TOUT12_P00_3_OUT; break;
+ case ATOM1_CH2_P02_2: pwm_pwm_pin_config = &IfxGtm_ATOM1_2_TOUT2_P02_2_OUT; break;
+ case ATOM1_CH2_P10_2: pwm_pwm_pin_config = &IfxGtm_ATOM1_2_TOUT104_P10_2_OUT; break;
+ case ATOM1_CH2_P10_5: pwm_pwm_pin_config = &IfxGtm_ATOM1_2_TOUT107_P10_5_OUT; break;
+ case ATOM1_CH2_P14_0: pwm_pwm_pin_config = &IfxGtm_ATOM1_2_TOUT80_P14_0_OUT; break;
+ case ATOM1_CH2_P20_14:pwm_pwm_pin_config = &IfxGtm_ATOM1_2_TOUT70_P20_14_OUT; break;
+ case ATOM1_CH2_P21_4: pwm_pwm_pin_config = &IfxGtm_ATOM1_2_TOUT55_P21_4_OUT; break;
+ case ATOM1_CH2_P33_11:pwm_pwm_pin_config = &IfxGtm_ATOM1_2_TOUT33_P33_11_OUT; break;
+
+ case ATOM1_CH3_P00_4: pwm_pwm_pin_config = &IfxGtm_ATOM1_3_TOUT13_P00_4_OUT; break;
+ case ATOM1_CH3_P02_3: pwm_pwm_pin_config = &IfxGtm_ATOM1_3_TOUT3_P02_3_OUT; break;
+ case ATOM1_CH3_P10_3: pwm_pwm_pin_config = &IfxGtm_ATOM1_3_TOUT105_P10_3_OUT; break;
+ case ATOM1_CH3_P10_6: pwm_pwm_pin_config = &IfxGtm_ATOM1_3_TOUT108_P10_6_OUT; break;
+ case ATOM1_CH3_P15_0: pwm_pwm_pin_config = &IfxGtm_ATOM1_3_TOUT71_P15_0_OUT; break;
+ case ATOM1_CH3_P21_5: pwm_pwm_pin_config = &IfxGtm_ATOM1_3_TOUT56_P21_5_OUT; break;
+ case ATOM1_CH3_P22_2: pwm_pwm_pin_config = &IfxGtm_ATOM1_3_TOUT49_P22_2_OUT; break;
+
+ case ATOM1_CH4_P00_5: pwm_pwm_pin_config = &IfxGtm_ATOM1_4_TOUT14_P00_5_OUT; break;
+ case ATOM1_CH4_P02_4: pwm_pwm_pin_config = &IfxGtm_ATOM1_4_TOUT4_P02_4_OUT; break;
+ case ATOM1_CH4_P15_1: pwm_pwm_pin_config = &IfxGtm_ATOM1_4_TOUT72_P15_1_OUT; break;
+ case ATOM1_CH4_P20_3: pwm_pwm_pin_config = &IfxGtm_ATOM1_4_TOUT61_P20_3_OUT; break;
+ case ATOM1_CH4_P21_6: pwm_pwm_pin_config = &IfxGtm_ATOM1_4_TOUT57_P21_6_OUT; break;
+ case ATOM1_CH4_P22_3: pwm_pwm_pin_config = &IfxGtm_ATOM1_4_TOUT50_P22_3_OUT; break;
+
+ case ATOM1_CH5_P00_6: pwm_pwm_pin_config = &IfxGtm_ATOM1_5_TOUT15_P00_6_OUT; break;
+ case ATOM1_CH5_P02_5: pwm_pwm_pin_config = &IfxGtm_ATOM1_5_TOUT5_P02_5_OUT; break;
+ case ATOM1_CH5_P15_2: pwm_pwm_pin_config = &IfxGtm_ATOM1_5_TOUT73_P15_2_OUT; break;
+ case ATOM1_CH5_P20_9: pwm_pwm_pin_config = &IfxGtm_ATOM1_5_TOUT65_P20_9_OUT; break;
+ case ATOM1_CH5_P21_7: pwm_pwm_pin_config = &IfxGtm_ATOM1_5_TOUT58_P21_7_OUT; break;
+ case ATOM1_CH5_P32_4: pwm_pwm_pin_config = &IfxGtm_ATOM1_5_TOUT40_P32_4_OUT; break;
+
+ case ATOM1_CH6_P00_7: pwm_pwm_pin_config = &IfxGtm_ATOM1_6_TOUT16_P00_7_OUT; break;
+ case ATOM1_CH6_P02_6: pwm_pwm_pin_config = &IfxGtm_ATOM1_6_TOUT6_P02_6_OUT; break;
+ case ATOM1_CH6_P15_3: pwm_pwm_pin_config = &IfxGtm_ATOM1_6_TOUT74_P15_3_OUT; break;
+ case ATOM1_CH6_P20_0: pwm_pwm_pin_config = &IfxGtm_ATOM1_6_TOUT59_P20_0_OUT; break;
+ case ATOM1_CH6_P20_10:pwm_pwm_pin_config = &IfxGtm_ATOM1_6_TOUT66_P20_10_OUT; break;
+ case ATOM1_CH6_P23_1: pwm_pwm_pin_config = &IfxGtm_ATOM1_6_TOUT42_P23_1_OUT; break;
+
+ case ATOM1_CH7_P00_8: pwm_pwm_pin_config = &IfxGtm_ATOM1_7_TOUT17_P00_8_OUT; break;
+ case ATOM1_CH7_P02_7: pwm_pwm_pin_config = &IfxGtm_ATOM1_7_TOUT7_P02_7_OUT; break;
+ case ATOM1_CH7_P15_4: pwm_pwm_pin_config = &IfxGtm_ATOM1_7_TOUT75_P15_4_OUT; break;
+ case ATOM1_CH7_P20_11:pwm_pwm_pin_config = &IfxGtm_ATOM1_7_TOUT67_P20_11_OUT; break;
+
+ case ATOM2_CH0_P00_9: pwm_pwm_pin_config = &IfxGtm_ATOM2_0_TOUT18_P00_9_OUT; break;
+ case ATOM2_CH0_P13_3: pwm_pwm_pin_config = &IfxGtm_ATOM2_0_TOUT94_P13_3_OUT; break;
+ case ATOM2_CH0_P20_12:pwm_pwm_pin_config = &IfxGtm_ATOM2_0_TOUT68_P20_12_OUT; break;
+ case ATOM2_CH0_P33_4: pwm_pwm_pin_config = &IfxGtm_ATOM2_0_TOUT26_P33_4_OUT; break;
+ case ATOM2_CH0_P33_10:pwm_pwm_pin_config = &IfxGtm_ATOM2_0_TOUT32_P33_10_OUT; break;
+
+ case ATOM2_CH1_P11_2: pwm_pwm_pin_config = &IfxGtm_ATOM2_1_TOUT95_P11_2_OUT; break;
+ case ATOM2_CH1_P20_13:pwm_pwm_pin_config = &IfxGtm_ATOM2_1_TOUT69_P20_13_OUT; break;
+ case ATOM2_CH1_P33_5: pwm_pwm_pin_config = &IfxGtm_ATOM2_1_TOUT27_P33_5_OUT; break;
+
+ case ATOM2_CH2_P11_3: pwm_pwm_pin_config = &IfxGtm_ATOM2_2_TOUT96_P11_3_OUT; break;
+ case ATOM2_CH2_P20_14:pwm_pwm_pin_config = &IfxGtm_ATOM2_2_TOUT70_P20_14_OUT; break;
+ case ATOM2_CH2_P33_6: pwm_pwm_pin_config = &IfxGtm_ATOM2_2_TOUT28_P33_6_OUT; break;
+
+ case ATOM2_CH3_P00_12:pwm_pwm_pin_config = &IfxGtm_ATOM2_3_TOUT21_P00_12_OUT; break;
+ case ATOM2_CH3_P11_6: pwm_pwm_pin_config = &IfxGtm_ATOM2_3_TOUT97_P11_6_OUT; break;
+ case ATOM2_CH3_P15_0: pwm_pwm_pin_config = &IfxGtm_ATOM2_3_TOUT71_P15_0_OUT; break;
+ case ATOM2_CH3_P33_7: pwm_pwm_pin_config = &IfxGtm_ATOM2_3_TOUT29_P33_7_OUT; break;
+
+ case ATOM2_CH4_P11_9: pwm_pwm_pin_config = &IfxGtm_ATOM2_4_TOUT98_P11_9_OUT; break;
+ case ATOM2_CH4_P15_1: pwm_pwm_pin_config = &IfxGtm_ATOM2_4_TOUT72_P15_1_OUT; break;
+ case ATOM2_CH4_P33_8: pwm_pwm_pin_config = &IfxGtm_ATOM2_4_TOUT30_P33_8_OUT; break;
+ case ATOM2_CH4_P33_12:pwm_pwm_pin_config = &IfxGtm_ATOM2_4_TOUT34_P33_12_OUT; break;
+
+ case ATOM2_CH5_P11_10:pwm_pwm_pin_config = &IfxGtm_ATOM2_5_TOUT99_P11_10_OUT; break;
+ case ATOM2_CH5_P13_0: pwm_pwm_pin_config = &IfxGtm_ATOM2_5_TOUT91_P13_0_OUT; break;
+ case ATOM2_CH5_P15_2: pwm_pwm_pin_config = &IfxGtm_ATOM2_5_TOUT73_P15_2_OUT; break;
+ case ATOM2_CH5_P20_9: pwm_pwm_pin_config = &IfxGtm_ATOM2_5_TOUT65_P20_9_OUT; break;
+ case ATOM2_CH5_P33_13:pwm_pwm_pin_config = &IfxGtm_ATOM2_5_TOUT35_P33_13_OUT; break;
+
+ case ATOM2_CH6_P11_11:pwm_pwm_pin_config = &IfxGtm_ATOM2_6_TOUT100_P11_11_OUT; break;
+ case ATOM2_CH6_P13_1: pwm_pwm_pin_config = &IfxGtm_ATOM2_6_TOUT92_P13_1_OUT; break;
+ case ATOM2_CH6_P15_3: pwm_pwm_pin_config = &IfxGtm_ATOM2_6_TOUT74_P15_3_OUT; break;
+ case ATOM2_CH6_P20_6: pwm_pwm_pin_config = &IfxGtm_ATOM2_6_TOUT62_P20_6_OUT; break;
+ case ATOM2_CH6_P20_10:pwm_pwm_pin_config = &IfxGtm_ATOM2_6_TOUT66_P20_10_OUT; break;
+ case ATOM2_CH6_P32_0: pwm_pwm_pin_config = &IfxGtm_ATOM2_6_TOUT36_P32_0_OUT; break;
+
+ case ATOM2_CH7_P11_12:pwm_pwm_pin_config = &IfxGtm_ATOM2_7_TOUT101_P11_12_OUT; break;
+ case ATOM2_CH7_P13_2: pwm_pwm_pin_config = &IfxGtm_ATOM2_7_TOUT93_P13_2_OUT; break;
+ case ATOM2_CH7_P15_4: pwm_pwm_pin_config = &IfxGtm_ATOM2_7_TOUT75_P15_4_OUT; break;
+ case ATOM2_CH7_P20_7: pwm_pwm_pin_config = &IfxGtm_ATOM2_7_TOUT63_P20_7_OUT; break;
+ case ATOM2_CH7_P20_8: pwm_pwm_pin_config = &IfxGtm_ATOM2_7_TOUT64_P20_8_OUT; break;
+ case ATOM2_CH7_P20_11:pwm_pwm_pin_config = &IfxGtm_ATOM2_7_TOUT67_P20_11_OUT; break;
+
+ case ATOM3_CH0_P00_9: pwm_pwm_pin_config = &IfxGtm_ATOM3_0_TOUT18_P00_9_OUT; break;
+ case ATOM3_CH0_P13_3: pwm_pwm_pin_config = &IfxGtm_ATOM3_0_TOUT94_P13_3_OUT; break;
+ case ATOM3_CH0_P14_5: pwm_pwm_pin_config = &IfxGtm_ATOM3_0_TOUT85_P14_5_OUT; break;
+ case ATOM3_CH0_P15_5: pwm_pwm_pin_config = &IfxGtm_ATOM3_0_TOUT76_P15_5_OUT; break;
+ case ATOM3_CH0_P15_6: pwm_pwm_pin_config = &IfxGtm_ATOM3_0_TOUT77_P15_6_OUT; break;
+ case ATOM3_CH0_P33_4: pwm_pwm_pin_config = &IfxGtm_ATOM3_0_TOUT26_P33_4_OUT; break;
+ case ATOM3_CH0_P33_10:pwm_pwm_pin_config = &IfxGtm_ATOM3_0_TOUT32_P33_10_OUT; break;
+
+ case ATOM3_CH1_P11_2: pwm_pwm_pin_config = &IfxGtm_ATOM3_1_TOUT95_P11_2_OUT; break;
+ case ATOM3_CH1_P14_4: pwm_pwm_pin_config = &IfxGtm_ATOM3_1_TOUT84_P14_4_OUT; break;
+ case ATOM3_CH1_P14_6: pwm_pwm_pin_config = &IfxGtm_ATOM3_1_TOUT86_P14_6_OUT; break;
+ case ATOM3_CH1_P15_7: pwm_pwm_pin_config = &IfxGtm_ATOM3_1_TOUT78_P15_7_OUT; break;
+ case ATOM3_CH1_P15_8: pwm_pwm_pin_config = &IfxGtm_ATOM3_1_TOUT79_P15_8_OUT; break;
+ case ATOM3_CH1_P33_5: pwm_pwm_pin_config = &IfxGtm_ATOM3_1_TOUT27_P33_5_OUT; break;
+
+ case ATOM3_CH2_P11_3: pwm_pwm_pin_config = &IfxGtm_ATOM3_2_TOUT96_P11_3_OUT; break;
+ case ATOM3_CH2_P14_0: pwm_pwm_pin_config = &IfxGtm_ATOM3_2_TOUT80_P14_0_OUT; break;
+ case ATOM3_CH2_P14_3: pwm_pwm_pin_config = &IfxGtm_ATOM3_2_TOUT83_P14_3_OUT; break;
+ case ATOM3_CH2_P33_6: pwm_pwm_pin_config = &IfxGtm_ATOM3_2_TOUT28_P33_6_OUT; break;
+
+ case ATOM3_CH3_P00_12:pwm_pwm_pin_config = &IfxGtm_ATOM3_3_TOUT21_P00_12_OUT; break;
+ case ATOM3_CH3_P11_6: pwm_pwm_pin_config = &IfxGtm_ATOM3_3_TOUT97_P11_6_OUT; break;
+ case ATOM3_CH3_P14_2: pwm_pwm_pin_config = &IfxGtm_ATOM3_3_TOUT82_P14_2_OUT; break;
+ case ATOM3_CH3_P33_7: pwm_pwm_pin_config = &IfxGtm_ATOM3_3_TOUT29_P33_7_OUT; break;
+
+ case ATOM3_CH4_P11_9: pwm_pwm_pin_config = &IfxGtm_ATOM3_4_TOUT98_P11_9_OUT; break;
+ case ATOM3_CH4_P14_1: pwm_pwm_pin_config = &IfxGtm_ATOM3_4_TOUT81_P14_1_OUT; break;
+ case ATOM3_CH4_P33_8: pwm_pwm_pin_config = &IfxGtm_ATOM3_4_TOUT30_P33_8_OUT; break;
+ case ATOM3_CH4_P33_12:pwm_pwm_pin_config = &IfxGtm_ATOM3_4_TOUT34_P33_12_OUT; break;
+
+ case ATOM3_CH5_P11_10:pwm_pwm_pin_config = &IfxGtm_ATOM3_5_TOUT99_P11_10_OUT; break;
+ case ATOM3_CH5_P13_0: pwm_pwm_pin_config = &IfxGtm_ATOM3_5_TOUT91_P13_0_OUT; break;
+ case ATOM3_CH5_P33_13:pwm_pwm_pin_config = &IfxGtm_ATOM3_5_TOUT35_P33_13_OUT; break;
+
+ case ATOM3_CH6_P11_11:pwm_pwm_pin_config = &IfxGtm_ATOM3_6_TOUT100_P11_11_OUT; break;
+ case ATOM3_CH6_P13_1: pwm_pwm_pin_config = &IfxGtm_ATOM3_6_TOUT92_P13_1_OUT; break;
+ case ATOM3_CH6_P20_6: pwm_pwm_pin_config = &IfxGtm_ATOM3_6_TOUT62_P20_6_OUT; break;
+ case ATOM3_CH6_P32_0: pwm_pwm_pin_config = &IfxGtm_ATOM3_6_TOUT36_P32_0_OUT; break;
+
+ case ATOM3_CH7_P11_12:pwm_pwm_pin_config = &IfxGtm_ATOM3_7_TOUT101_P11_12_OUT; break;
+ case ATOM3_CH7_P13_2: pwm_pwm_pin_config = &IfxGtm_ATOM3_7_TOUT93_P13_2_OUT; break;
+ case ATOM3_CH7_P20_7: pwm_pwm_pin_config = &IfxGtm_ATOM3_7_TOUT63_P20_7_OUT; break;
+
+ default: zf_assert(FALSE); pwm_pwm_pin_config = NULL;
+ }
+ return pwm_pwm_pin_config;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 关闭所有通道的PWM输出
+// 返回参数 void
+// 使用示例 pwm_all_channel_close();
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void pwm_all_channel_close (void)
+{
+ IfxGtm_Atom_Pwm_Config g_atomConfig;
+ IfxGtm_Atom_Pwm_Driver g_atomDriver;
+
+ int index,channel;
+
+ IfxGtm_enable(&MODULE_GTM);
+
+ if(!(MODULE_GTM.CMU.CLK_EN.U & 0x2))
+ {
+ IfxGtm_Cmu_setClkFrequency(&MODULE_GTM, IfxGtm_Cmu_Clk_0, CMU_CLK_FREQ);
+ IfxGtm_Cmu_enableClocks(&MODULE_GTM, IFXGTM_CMU_CLKEN_CLK0);
+ }
+ IfxGtm_Atom_Pwm_initConfig(&g_atomConfig, &MODULE_GTM);
+
+ for(index = 0; index < 4; index++)
+ {
+ for(channel = 0; channel < 8; channel++)
+ {
+ g_atomConfig.atom = index;
+ g_atomConfig.atomChannel = channel;
+ IfxGtm_Atom_Pwm_init(&g_atomDriver, &g_atomConfig);
+ IfxGtm_Atom_Pwm_stop(&g_atomDriver, TRUE);
+ }
+ }
+
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 PWM占空比设置
+// 参数说明 pin 选择 PWM 引脚
+// 参数说明 duty 设置占空比
+// 返回参数 void
+// 使用示例 pwm_set_duty(ATOM0_CH7_P02_7, 5000); // 设置占空比为百分之5000/PWM_DUTY_MAX*100
+// 备注信息 GTM_ATOM0_PWM_DUTY_MAX宏定义在zf_driver_pwm.h 默认为10000
+//-------------------------------------------------------------------------------------------------------------------
+void pwm_set_duty (pwm_channel_enum pwmch, uint32 duty)
+{
+ uint32 period;
+
+ zf_assert(duty <= PWM_DUTY_MAX); // 如果在这里出现了断言，那么说明你输入的占空比已经大于了最大占空比 PWM_DUTY_MAX 宏定义在zf_driver_pwm.h 默认为10000
+
+ IfxGtm_Atom_ToutMap *atom_channel;
+ atom_channel = get_pwm_pin(pwmch);
+
+ period = IfxGtm_Atom_Ch_getCompareZero(&MODULE_GTM.ATOM[atom_channel->atom], atom_channel->channel);
+
+ switch(atom_channel->atom)
+ {
+ case 0: duty = (uint32)((uint64)duty * period / PWM_DUTY_MAX); break;
+ case 1: duty = (uint32)((uint64)duty * period / PWM_DUTY_MAX); break;
+ case 2: duty = (uint32)((uint64)duty * period / PWM_DUTY_MAX); break;
+ case 3: duty = (uint32)((uint64)duty * period / PWM_DUTY_MAX); break;
+ }
+ IfxGtm_Atom_Ch_setCompareOneShadow(&MODULE_GTM.ATOM[atom_channel->atom], atom_channel->channel, duty);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 PWM 初始化
+// 参数说明 pin 选择 PWM 引脚
+// 参数说明 freq 设置频率 同个模块只有最后一次设置生效
+// 参数说明 duty 设置占空比
+// 返回参数 void
+// 使用示例 pwm_init(ATOM0_CH7_P02_7, 50, 1000); // ATOM 0模块的通道7 使用P02_7引脚输出PWM PWM频率50HZ 占空比百分之1000/PWM_DUTY_MAX*100
+// 备注信息 PWM_DUTY_MAX宏定义在zf_driver_pwm.h 默认为10000
+//-------------------------------------------------------------------------------------------------------------------
+void pwm_init (pwm_channel_enum pwmch, uint32 freq, uint32 duty)
+{
+ IfxGtm_Atom_Pwm_Config g_atomConfig;
+ IfxGtm_Atom_Pwm_Driver g_atomDriver;
+
+ IfxGtm_Atom_ToutMap *atom_channel;
+
+ zf_assert(duty <= PWM_DUTY_MAX); // 如果在这里出现了断言，那么说明你输入的占空比已经大于了最大占空比 PWM_DUTY_MAX 宏定义在zf_driver_pwm.h 默认为10000
+
+
+ atom_channel = get_pwm_pin(pwmch);
+
+ switch(atom_channel->atom)
+ {
+ case 0: IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, duty <= PWM_DUTY_MAX); break;
+ case 1: IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, duty <= PWM_DUTY_MAX); break;
+ case 2: IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, duty <= PWM_DUTY_MAX); break;
+ case 3: IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, duty <= PWM_DUTY_MAX); break;
+ }
+
+ IfxGtm_enable(&MODULE_GTM);
+
+ if(!(MODULE_GTM.CMU.CLK_EN.U & 0x2))
+ {
+ IfxGtm_Cmu_setClkFrequency(&MODULE_GTM, IfxGtm_Cmu_Clk_0, CMU_CLK_FREQ);
+ IfxGtm_Cmu_enableClocks(&MODULE_GTM, IFXGTM_CMU_CLKEN_CLK0);
+ }
+
+ IfxGtm_Atom_Pwm_initConfig(&g_atomConfig, &MODULE_GTM);
+
+ g_atomConfig.atom = atom_channel->atom;
+ g_atomConfig.atomChannel = atom_channel->channel;
+ g_atomConfig.period = CMU_CLK_FREQ/freq;
+ g_atomConfig.pin.outputPin = atom_channel;
+ g_atomConfig.synchronousUpdateEnabled = TRUE;
+
+ switch(atom_channel->atom)
+ {
+ case 0: g_atomConfig.dutyCycle = (uint32)((uint64)duty * g_atomConfig.period / PWM_DUTY_MAX); break;
+ case 1: g_atomConfig.dutyCycle = (uint32)((uint64)duty * g_atomConfig.period / PWM_DUTY_MAX); break;
+ case 2: g_atomConfig.dutyCycle = (uint32)((uint64)duty * g_atomConfig.period / PWM_DUTY_MAX); break;
+ case 3: g_atomConfig.dutyCycle = (uint32)((uint64)duty * g_atomConfig.period / PWM_DUTY_MAX); break;
+ }
+
+ IfxGtm_Atom_Pwm_init(&g_atomDriver, &g_atomConfig);
+ IfxGtm_Atom_Pwm_start(&g_atomDriver, TRUE);
+}
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pwm.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pwm.h
new file mode 100644
index 0000000..1b76925
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_pwm.h
@@ -0,0 +1,89 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_pwm
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_pwm_h_
+#define _zf_driver_pwm_h_
+
+#include "zf_common_typedef.h"
+
+#define PWM_DUTY_MAX 10000 // PWM最大占空比 最大占空比越大占空比的步进值越小
+
+// 此枚举定义不允许用户修改
+typedef enum // 枚举PWM引脚
+{
+ ATOM0_CH0_P00_0, ATOM0_CH0_P02_0, ATOM0_CH0_P02_8, ATOM0_CH0_P14_5, ATOM0_CH0_P21_2, ATOM0_CH0_P22_1,
+ ATOM0_CH1_P00_1, ATOM0_CH1_P00_2, ATOM0_CH1_P02_1, ATOM0_CH1_P10_1, ATOM0_CH1_P14_4, ATOM0_CH1_P21_3, ATOM0_CH1_P22_0, ATOM0_CH1_P33_9,
+ ATOM0_CH2_P00_3, ATOM0_CH2_P02_2, ATOM0_CH2_P10_2, ATOM0_CH2_P10_5, ATOM0_CH2_P14_3, ATOM0_CH2_P21_4, ATOM0_CH2_P33_11,
+ ATOM0_CH3_P00_4, ATOM0_CH3_P02_3, ATOM0_CH3_P10_3, ATOM0_CH3_P10_6, ATOM0_CH3_P14_2, ATOM0_CH3_P21_5, ATOM0_CH3_P22_2,
+ ATOM0_CH4_P00_5, ATOM0_CH4_P02_4, ATOM0_CH4_P14_1, ATOM0_CH4_P20_3, ATOM0_CH4_P21_6, ATOM0_CH4_P22_3,
+ ATOM0_CH5_P00_6, ATOM0_CH5_P02_5, ATOM0_CH5_P21_7, ATOM0_CH5_P32_4,
+ ATOM0_CH6_P00_7, ATOM0_CH6_P02_6, ATOM0_CH6_P20_0, ATOM0_CH6_P23_1,
+ ATOM0_CH7_P00_8, ATOM0_CH7_P02_7, ATOM0_CH7_P20_8,
+
+ ATOM1_CH0_P00_0, ATOM1_CH0_P02_0, ATOM1_CH0_P02_8, ATOM1_CH0_P15_5, ATOM1_CH0_P15_6, ATOM1_CH0_P20_12, ATOM1_CH0_P21_2, ATOM1_CH0_P22_1,
+ ATOM1_CH1_P00_1, ATOM1_CH1_P00_2, ATOM1_CH1_P02_1, ATOM1_CH1_P10_1, ATOM1_CH1_P14_6, ATOM1_CH1_P15_7, ATOM1_CH1_P15_8, ATOM1_CH1_P20_13, ATOM1_CH1_P21_3, ATOM1_CH1_P22_0, ATOM1_CH1_P33_9,
+ ATOM1_CH2_P00_3, ATOM1_CH2_P02_2, ATOM1_CH2_P10_2, ATOM1_CH2_P10_5, ATOM1_CH2_P14_0, ATOM1_CH2_P20_14, ATOM1_CH2_P21_4, ATOM1_CH2_P33_11,
+ ATOM1_CH3_P00_4, ATOM1_CH3_P02_3, ATOM1_CH3_P10_3, ATOM1_CH3_P10_6, ATOM1_CH3_P15_0, ATOM1_CH3_P21_5, ATOM1_CH3_P22_2,
+ ATOM1_CH4_P00_5, ATOM1_CH4_P02_4, ATOM1_CH4_P15_1, ATOM1_CH4_P20_3, ATOM1_CH4_P21_6, ATOM1_CH4_P22_3,
+ ATOM1_CH5_P00_6, ATOM1_CH5_P02_5, ATOM1_CH5_P15_2, ATOM1_CH5_P20_9, ATOM1_CH5_P21_7, ATOM1_CH5_P32_4,
+ ATOM1_CH6_P00_7, ATOM1_CH6_P02_6, ATOM1_CH6_P15_3, ATOM1_CH6_P20_0, ATOM1_CH6_P20_10, ATOM1_CH6_P23_1,
+ ATOM1_CH7_P00_8, ATOM1_CH7_P02_7, ATOM1_CH7_P15_4, ATOM1_CH7_P20_11,
+
+ ATOM2_CH0_P00_9, ATOM2_CH0_P13_3, ATOM2_CH0_P20_12, ATOM2_CH0_P33_4, ATOM2_CH0_P33_10,
+ ATOM2_CH1_P11_2, ATOM2_CH1_P20_13, ATOM2_CH1_P33_5,
+ ATOM2_CH2_P11_3, ATOM2_CH2_P20_14, ATOM2_CH2_P33_6,
+ ATOM2_CH3_P00_12, ATOM2_CH3_P11_6, ATOM2_CH3_P15_0, ATOM2_CH3_P33_7,
+ ATOM2_CH4_P11_9, ATOM2_CH4_P15_1, ATOM2_CH4_P33_8, ATOM2_CH4_P33_12,
+ ATOM2_CH5_P11_10, ATOM2_CH5_P13_0, ATOM2_CH5_P15_2, ATOM2_CH5_P20_9, ATOM2_CH5_P33_13,
+ ATOM2_CH6_P11_11, ATOM2_CH6_P13_1, ATOM2_CH6_P15_3, ATOM2_CH6_P20_6, ATOM2_CH6_P20_10, ATOM2_CH6_P32_0,
+ ATOM2_CH7_P11_12, ATOM2_CH7_P13_2, ATOM2_CH7_P15_4, ATOM2_CH7_P20_7, ATOM2_CH7_P20_8, ATOM2_CH7_P20_11,
+
+ ATOM3_CH0_P00_9, ATOM3_CH0_P13_3, ATOM3_CH0_P14_5, ATOM3_CH0_P15_5, ATOM3_CH0_P15_6, ATOM3_CH0_P33_4, ATOM3_CH0_P33_10,
+ ATOM3_CH1_P11_2, ATOM3_CH1_P14_4, ATOM3_CH1_P14_6, ATOM3_CH1_P15_7, ATOM3_CH1_P15_8, ATOM3_CH1_P33_5,
+ ATOM3_CH2_P11_3, ATOM3_CH2_P14_0, ATOM3_CH2_P14_3, ATOM3_CH2_P33_6,
+ ATOM3_CH3_P00_12, ATOM3_CH3_P11_6, ATOM3_CH3_P14_2, ATOM3_CH3_P33_7,
+ ATOM3_CH4_P11_9, ATOM3_CH4_P14_1, ATOM3_CH4_P33_8, ATOM3_CH4_P33_12,
+ ATOM3_CH5_P11_10, ATOM3_CH5_P13_0, ATOM3_CH5_P33_13,
+ ATOM3_CH6_P11_11, ATOM3_CH6_P13_1, ATOM3_CH6_P20_6, ATOM3_CH6_P32_0,
+ ATOM3_CH7_P11_12, ATOM3_CH7_P13_2, ATOM3_CH7_P20_7,
+}pwm_channel_enum;
+
+//====================================================PWM 基础函数====================================================
+void pwm_all_channel_close (void);
+void pwm_init (pwm_channel_enum pwmch, uint32 freq, uint32 duty);
+void pwm_set_duty (pwm_channel_enum pwmch, uint32 duty);
+//====================================================PWM 基础函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_iic.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_iic.c
new file mode 100644
index 0000000..54b0f4d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_iic.c
@@ -0,0 +1,674 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_soft_iic
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_soft_iic.h"
+
+#define soft_iic_gpio_high_scl() ((Ifx_P *)soft_iic_obj->iic_scl)->OMR.U = 1 << ((soft_iic_obj->scl_pin)&0x1f)
+#define soft_iic_gpio_high_sda() ((Ifx_P *)soft_iic_obj->iic_sda)->OMR.U = 1 << ((soft_iic_obj->sda_pin)&0x1f)
+#define soft_iic_gpio_low_scl() ((Ifx_P *)soft_iic_obj->iic_scl)->OMR.U = 65536 << ((soft_iic_obj->scl_pin)&0x1f)
+#define soft_iic_gpio_low_sda() ((Ifx_P *)soft_iic_obj->iic_sda)->OMR.U = 65536 << ((soft_iic_obj->sda_pin)&0x1f)
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 延时
+// 参数说明 delay 延时次数
+// 返回参数 void
+// 使用示例 soft_iic_delay(1);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define soft_iic_delay(x) for(uint32 i = x; i--; )
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC GPIO拉高
+// 参数说明 x 引脚号
+// 返回参数 void
+// 使用示例 soft_iic_soft_iic_gpio_high_scl();
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define soft_iic_gpio_high(x) soft_iic_obj->iic_scl->OMR.U = 1 << ((x)&0x1f)
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC START 信号
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 返回参数 void
+// 使用示例 soft_iic_start(soft_iic_obj);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void soft_iic_start (soft_iic_info_struct *soft_iic_obj)
+{
+ soft_iic_gpio_high_scl(); // SCL 高电平
+ soft_iic_gpio_high_sda(); // SDA 高电平
+
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_low_sda(); // SDA 先拉低
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_low_scl(); // SCL 再拉低
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC STOP 信号
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 返回参数 void
+// 使用示例 soft_iic_stop(soft_iic_obj);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void soft_iic_stop (soft_iic_info_struct *soft_iic_obj)
+{
+ soft_iic_gpio_low_sda(); // SDA 低电平
+ soft_iic_gpio_low_scl(); // SCL 低电平
+
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_high_scl(); // SCL 先拉高
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_high_sda(); // SDA 再拉高
+ soft_iic_delay(soft_iic_obj->delay);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 发送 ACK/NAKC 信号 内部调用
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 ack ACK 电平
+// 返回参数 void
+// 使用示例 soft_iic_send_ack(soft_iic_obj, 1);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static void soft_iic_send_ack (soft_iic_info_struct *soft_iic_obj, uint8 ack)
+{
+ soft_iic_gpio_low_scl(); // SCL 低电平
+
+ if(ack)
+ {
+ soft_iic_gpio_high_sda(); // SDA 拉高
+ }
+ else
+ {
+ soft_iic_gpio_low_sda(); // SDA 拉低
+ }
+
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_high_scl(); // SCL 拉高
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_low_scl(); // SCL 拉低
+ soft_iic_gpio_high_sda(); // SDA 拉高
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 获取 ACK/NAKC 信号
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 返回参数 uint8 ACK 状态
+// 使用示例 soft_iic_wait_ack(soft_iic_obj);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 soft_iic_wait_ack (soft_iic_info_struct *soft_iic_obj)
+{
+ uint8 temp = 0;
+ soft_iic_gpio_low_scl(); // SCL 低电平
+ soft_iic_gpio_high_sda(); // SDA 高电平 释放 SDA
+#if SOFT_IIC_SDA_IO_SWITCH
+ gpio_set_dir(soft_iic_obj->sda_pin, GPI, GPI_FLOATING_IN);
+#endif
+ soft_iic_delay(soft_iic_obj->delay);
+
+ soft_iic_gpio_high_scl(); // SCL 高电平
+ soft_iic_delay(soft_iic_obj->delay);
+
+ if(gpio_get_level(soft_iic_obj->sda_pin))
+ {
+ temp = 1;
+ }
+ soft_iic_gpio_low_scl(); // SCL 低电平
+#if SOFT_IIC_SDA_IO_SWITCH
+ gpio_set_dir(soft_iic_obj->sda_pin, GPO, GPO_OPEN_DTAIN);
+#endif
+ soft_iic_delay(soft_iic_obj->delay);
+
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 发送 8bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 data 数据
+// 返回参数 uint8 ACK 状态
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 soft_iic_send_data (soft_iic_info_struct *soft_iic_obj, const uint8 data)
+{
+ uint8 temp = 0x80;
+ while(temp)
+ {
+ gpio_set_level(soft_iic_obj->sda_pin, data & temp);
+ temp >>= 1;
+
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_high_scl(); // SCL 拉高
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_low_scl(); // SCL 拉低
+ }
+ return ((soft_iic_wait_ack(soft_iic_obj) == 1) ? 0 : 1 );
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 读取 8bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 ack ACK 或 NACK
+// 返回参数 uint8 数据
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 soft_iic_read_data (soft_iic_info_struct *soft_iic_obj, uint8 ack)
+{
+ uint8 data = 0x00;
+ uint8 temp = 8;
+ soft_iic_gpio_low_scl(); // SCL 低电平
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_high_sda(); // SDA 高电平 释放 SDA
+#if SOFT_IIC_SDA_IO_SWITCH
+ gpio_set_dir(soft_iic_obj->sda_pin, GPI, GPI_FLOATING_IN);
+#endif
+
+ while(temp --)
+ {
+ soft_iic_gpio_low_scl(); // SCL 拉低
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_gpio_high_scl(); // SCL 拉高
+ soft_iic_delay(soft_iic_obj->delay);
+ data = ((data << 1) | gpio_get_level(soft_iic_obj->sda_pin));
+ }
+ soft_iic_gpio_low_scl(); // SCL 低电平
+#if SOFT_IIC_SDA_IO_SWITCH
+ gpio_set_dir(soft_iic_obj->sda_pin, GPO, GPO_OPEN_DTAIN);
+#endif
+ soft_iic_delay(soft_iic_obj->delay);
+ soft_iic_send_ack(soft_iic_obj, ack);
+ return data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口写 8bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 data 要写入的数据
+// 返回参数 void
+// 使用示例 soft_iic_write_8bit_register(soft_iic_obj, 0x01);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_write_8bit (soft_iic_info_struct *soft_iic_obj, const uint8 data)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, data);
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口写 8bit 数组
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_iic_write_8bit_array(soft_iic_obj, data, 6);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_write_8bit_array (soft_iic_info_struct *soft_iic_obj, const uint8 *data, uint32 len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ while(len --)
+ {
+ soft_iic_send_data(soft_iic_obj, *data ++);
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口器写 16bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 data 要写入的数据
+// 返回参数 void
+// 使用示例 soft_iic_write_16bit(soft_iic_obj, 0x0101);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_write_16bit (soft_iic_info_struct *soft_iic_obj, const uint16 data)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, (uint8)((data & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(data & 0x00FF));
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口写 16bit 数组
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_iic_write_16bit_array(soft_iic_obj, data, 6);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_write_16bit_array (soft_iic_info_struct *soft_iic_obj, const uint16 *data, uint32 len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ while(len --)
+ {
+ soft_iic_send_data(soft_iic_obj, (uint8)((*data & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(*data ++ & 0x00FF));
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口向传感器寄存器写 8bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 参数说明 data 要写入的数据
+// 返回参数 void
+// 使用示例 soft_iic_write_8bit_register(soft_iic_obj, 0x01, 0x01);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_write_8bit_register (soft_iic_info_struct *soft_iic_obj, const uint8 register_name, const uint8 data)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, register_name);
+ soft_iic_send_data(soft_iic_obj, data);
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口向传感器寄存器写 8bit 数组
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_iic_write_8bit_registers(soft_iic_obj, 0x01, data, 6);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_write_8bit_registers (soft_iic_info_struct *soft_iic_obj, const uint8 register_name, const uint8 *data, uint32 len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, register_name);
+ while(len --)
+ {
+ soft_iic_send_data(soft_iic_obj, *data ++);
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口向传感器寄存器写 16bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 参数说明 data 要写入的数据
+// 返回参数 void
+// 使用示例 soft_iic_write_16bit_register(soft_iic_obj, 0x0101, 0x0101);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_write_16bit_register (soft_iic_info_struct *soft_iic_obj, const uint16 register_name, const uint16 data)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, (uint8)((register_name & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(register_name & 0x00FF));
+ soft_iic_send_data(soft_iic_obj, (uint8)((data & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(data & 0x00FF));
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口向传感器寄存器写 16bit 数组
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_iic_write_16bit_registers(soft_iic_obj, 0x0101, data, 6);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_write_16bit_registers (soft_iic_info_struct *soft_iic_obj, const uint16 register_name, const uint16 *data, uint32 len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, (uint8)((register_name & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(register_name & 0x00FF));
+ while(len--)
+ {
+ soft_iic_send_data(soft_iic_obj, (uint8)((*data & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(*data ++ & 0x00FF));
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口读取 8bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 返回参数 uint8 返回读取的 8bit 数据
+// 使用示例 soft_iic_read_8bit(soft_iic_obj);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 soft_iic_read_8bit (soft_iic_info_struct *soft_iic_obj)
+{
+ uint8 temp = 0;
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ temp = soft_iic_read_data(soft_iic_obj, 1);
+ soft_iic_stop(soft_iic_obj);
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口从传感器寄存器读取 8bit 数组
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 参数说明 *data 要读取的数据的缓冲区指针
+// 参数说明 len 要读取的数据长度
+// 返回参数 void
+// 使用示例 soft_iic_read_8bit_array(soft_iic_obj, data, 8);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_read_8bit_array (soft_iic_info_struct *soft_iic_obj, uint8 *data, uint32 len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ while(len --)
+ {
+ *data ++ = soft_iic_read_data(soft_iic_obj, len == 0);
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口读取 16bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 返回参数 uint16 返回读取的 16bit 数据
+// 使用示例 soft_iic_read_16bit(soft_iic_obj);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 soft_iic_read_16bit (soft_iic_info_struct *soft_iic_obj)
+{
+ uint16 temp = 0;
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ temp = soft_iic_read_data(soft_iic_obj, 0);
+ temp = ((temp << 8)| soft_iic_read_data(soft_iic_obj, 1));
+ soft_iic_stop(soft_iic_obj);
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口读取 16bit 数组
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 *data 要读取的数据的缓冲区指针
+// 参数说明 len 要读取的数据长度
+// 返回参数 void
+// 使用示例 soft_iic_read_16bit_array(soft_iic_obj, data, 8);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_read_16bit_array (soft_iic_info_struct *soft_iic_obj, uint16 *data, uint32 len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ while(len --)
+ {
+ *data = soft_iic_read_data(soft_iic_obj, 0);
+ *data = ((*data << 8)| soft_iic_read_data(soft_iic_obj, len == 0));
+ data ++;
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口从传感器寄存器读取 8bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 返回参数 uint8 返回读取的 8bit 数据
+// 使用示例 soft_iic_read_8bit_register(soft_iic_obj, 0x01);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 soft_iic_read_8bit_register (soft_iic_info_struct *soft_iic_obj, const uint8 register_name)
+{
+ uint8 temp = 0;
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, register_name);
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ temp = soft_iic_read_data(soft_iic_obj, 1);
+ soft_iic_stop(soft_iic_obj);
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口从传感器寄存器读取 8bit 数组
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 参数说明 *data 要读取的数据的缓冲区指针
+// 参数说明 len 要读取的数据长度
+// 返回参数 void
+// 使用示例 soft_iic_read_8bit_registers(soft_iic_obj, 0x01, data, 8);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_read_8bit_registers (soft_iic_info_struct *soft_iic_obj, const uint8 register_name, uint8 *data, uint32 len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, register_name);
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ while(len --)
+ {
+ *data ++ = soft_iic_read_data(soft_iic_obj, len == 0);
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口从传感器寄存器读取 16bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 返回参数 uint16 返回读取的 16bit 数据
+// 使用示例 soft_iic_read_16bit_register(soft_iic_obj, 0x0101);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 soft_iic_read_16bit_register (soft_iic_info_struct *soft_iic_obj, const uint16 register_name)
+{
+ uint16 temp = 0;
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, (uint8)((register_name & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(register_name & 0x00FF));
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ temp = soft_iic_read_data(soft_iic_obj, 0);
+ temp = ((temp << 8)| soft_iic_read_data(soft_iic_obj, 1));
+ soft_iic_stop(soft_iic_obj);
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口从传感器寄存器读取 16bit 数组
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 参数说明 *data 要读取的数据的缓冲区指针
+// 参数说明 len 要读取的数据长度
+// 返回参数 void
+// 使用示例 soft_iic_read_16bit_registers(soft_iic_obj, 0x0101, data, 8);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_read_16bit_registers (soft_iic_info_struct *soft_iic_obj, const uint16 register_name, uint16 *data, uint32 len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, (uint8)((register_name & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(register_name & 0x00FF));
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ while(len --)
+ {
+ *data = soft_iic_read_data(soft_iic_obj, 0);
+ *data = ((*data << 8)| soft_iic_read_data(soft_iic_obj, len == 0));
+ data ++;
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口传输 8bit 数组 先写后读取
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 *write_data 发送数据存放缓冲区
+// 参数说明 write_len 发送缓冲区长度
+// 参数说明 *read_data 读取数据存放缓冲区
+// 参数说明 read_len 读取缓冲区长度
+// 返回参数 void
+// 使用示例 iic_transfer_8bit_array(IIC_1, addr, data, 64, data, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_transfer_8bit_array (soft_iic_info_struct *soft_iic_obj, const uint8 *write_data, uint32 write_len, uint8 *read_data, uint32 read_len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ while(write_len --)
+ {
+ soft_iic_send_data(soft_iic_obj, *write_data ++);
+ }
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ while(read_len --)
+ {
+ *read_data ++ = soft_iic_read_data(soft_iic_obj, read_len == 0);
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口传输 16bit 数组 先写后读取
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 *write_data 发送数据存放缓冲区
+// 参数说明 write_len 发送缓冲区长度
+// 参数说明 *read_data 读取数据存放缓冲区
+// 参数说明 read_len 读取缓冲区长度
+// 返回参数 void
+// 使用示例 iic_transfer_16bit_array(IIC_1, addr, data, 64, data, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_transfer_16bit_array (soft_iic_info_struct *soft_iic_obj, const uint16 *write_data, uint32 write_len, uint16 *read_data, uint32 read_len)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ while(write_len--)
+ {
+ soft_iic_send_data(soft_iic_obj, (uint8)((*write_data & 0xFF00) >> 8));
+ soft_iic_send_data(soft_iic_obj, (uint8)(*write_data ++ & 0x00FF));
+ }
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ while(read_len --)
+ {
+ *read_data = soft_iic_read_data(soft_iic_obj, 0);
+ *read_data = ((*read_data << 8)| soft_iic_read_data(soft_iic_obj, read_len == 0));
+ read_data ++;
+ }
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口 SCCB 模式向传感器寄存器写 8bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 参数说明 data 要写入的数据
+// 返回参数 void
+// 使用示例 soft_iic_sccb_write_register(soft_iic_obj, 0x01, 0x01);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_sccb_write_register (soft_iic_info_struct *soft_iic_obj, const uint8 register_name, uint8 data)
+{
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, register_name);
+ soft_iic_send_data(soft_iic_obj, data);
+ soft_iic_stop(soft_iic_obj);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口 SCCB 模式从传感器寄存器读取 8bit 数据
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息 可以参照 zf_driver_soft_iic.h 里的格式看看
+// 参数说明 register_name 传感器的寄存器地址
+// 返回参数 uint8 返回读取的 8bit 数据
+// 使用示例 soft_iic_sccb_read_register(soft_iic_obj, 0x01);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 soft_iic_sccb_read_register (soft_iic_info_struct *soft_iic_obj, const uint8 register_name)
+{
+ uint8 temp = 0;
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1);
+ soft_iic_send_data(soft_iic_obj, register_name);
+ soft_iic_stop(soft_iic_obj);
+
+ soft_iic_start(soft_iic_obj);
+ soft_iic_send_data(soft_iic_obj, soft_iic_obj->addr << 1 | 0x01);
+ temp = soft_iic_read_data(soft_iic_obj, 1);
+ soft_iic_stop(soft_iic_obj);
+ return temp;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 IIC 接口初始化 默认 MASTER 模式 不提供 SLAVE 模式
+// 参数说明 *soft_iic_obj 软件 IIC 指定信息存放结构体的指针
+// 参数说明 addr 软件 IIC 地址 这里需要注意 标准七位地址 最高位忽略 写入时请务必确认无误
+// 参数说明 delay 软件 IIC 延时 就是时钟高电平时间 越短 IIC 速率越高
+// 参数说明 scl_pin 软件 IIC 时钟引脚 参照 zf_driver_gpio.h 内 gpio_pin_enum 枚举体定义
+// 参数说明 sda_pin 软件 IIC 数据引脚 参照 zf_driver_gpio.h 内 gpio_pin_enum 枚举体定义
+// 返回参数 void
+// 使用示例 soft_iic_init(&soft_iic_obj, addr, 100, B6, B7);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_iic_init (soft_iic_info_struct *soft_iic_obj, uint8 addr, uint32 delay, gpio_pin_enum scl_pin, gpio_pin_enum sda_pin)
+{
+ zf_assert(scl_pin != sda_pin); // 醒醒！ scl_pin 与 sda_pin 怎么能填同一个引脚？
+ soft_iic_obj->scl_pin = scl_pin;
+ soft_iic_obj->sda_pin = sda_pin;
+ soft_iic_obj->addr = addr;
+ soft_iic_obj->delay = delay;
+ soft_iic_obj->iic_scl = (void *)get_port(scl_pin);
+ soft_iic_obj->iic_sda = (void *)get_port(sda_pin);
+ gpio_init(scl_pin, GPO, GPIO_HIGH, GPO_PUSH_PULL); // 提取对应IO索引 AF功能编码
+ gpio_init(sda_pin, GPO, GPIO_HIGH, GPO_OPEN_DTAIN); // 提取对应IO索引 AF功能编码
+}
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_iic.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_iic.h
new file mode 100644
index 0000000..65d239f
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_iic.h
@@ -0,0 +1,84 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_soft_iic
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_soft_iic_h_
+#define _zf_driver_soft_iic_h_
+
+#include "zf_common_typedef.h"
+#include "zf_driver_gpio.h"
+
+typedef struct
+{
+ uint32 scl_pin; // 用于记录对应的引脚编号
+ uint32 sda_pin; // 用于记录对应的引脚编号
+ uint8 addr; // 器件地址 七位地址模式
+ uint32 delay; // 模拟 IIC 软延时时长 0：1370KHz 10：1020KHz 20：757KHz 30: 633KHz 40: 532Khz 50: 448KHz 60: 395KHz 70: 359KHz 80: 324KHz 100: 268KHz 1000：32KHz
+ void *iic_scl; // 记录 SCL 端口地址
+ void *iic_sda; // 记录 SDA 端口地址
+}soft_iic_info_struct;
+
+//==================================================SOFT_IIC 基础函数====================================================
+void soft_iic_write_8bit (soft_iic_info_struct *soft_iic_obj, const uint8 data);
+void soft_iic_write_8bit_array (soft_iic_info_struct *soft_iic_obj, const uint8 *data, uint32 len);
+
+void soft_iic_write_16bit (soft_iic_info_struct *soft_iic_obj, const uint16 data);
+void soft_iic_write_16bit_array (soft_iic_info_struct *soft_iic_obj, const uint16 *data, uint32 len);
+
+void soft_iic_write_8bit_register (soft_iic_info_struct *soft_iic_obj, const uint8 register_name, const uint8 data);
+void soft_iic_write_8bit_registers (soft_iic_info_struct *soft_iic_obj, const uint8 register_name, const uint8 *data, uint32 len);
+
+void soft_iic_write_16bit_register (soft_iic_info_struct *soft_iic_obj, const uint16 register_name, const uint16 data);
+void soft_iic_write_16bit_registers (soft_iic_info_struct *soft_iic_obj, const uint16 register_name, const uint16 *data, uint32 len);
+
+uint8 soft_iic_read_8bit (soft_iic_info_struct *soft_iic_obj);
+void soft_iic_read_8bit_array (soft_iic_info_struct *soft_iic_obj, uint8 *data, uint32 len);
+
+uint16 soft_iic_read_16bit (soft_iic_info_struct *soft_iic_obj);
+void soft_iic_read_16bit_array (soft_iic_info_struct *soft_iic_obj, uint16 *data, uint32 len);
+
+uint8 soft_iic_read_8bit_register (soft_iic_info_struct *soft_iic_obj, const uint8 register_name);
+void soft_iic_read_8bit_registers (soft_iic_info_struct *soft_iic_obj, const uint8 register_name, uint8 *data, uint32 len);
+
+uint16 soft_iic_read_16bit_register (soft_iic_info_struct *soft_iic_obj, const uint16 register_name);
+void soft_iic_read_16bit_registers (soft_iic_info_struct *soft_iic_obj, const uint16 register_name, uint16 *data, uint32 len);
+
+void soft_iic_sccb_write_register (soft_iic_info_struct *soft_iic_obj, const uint8 register_name, uint8 data);
+uint8 soft_iic_sccb_read_register (soft_iic_info_struct *soft_iic_obj, const uint8 register_name);
+
+void soft_iic_init (soft_iic_info_struct *soft_iic_obj, uint8 addr, uint32 delay, gpio_pin_enum scl_pin, gpio_pin_enum sda_pin);
+//==================================================SOFT_IIC 基础函数====================================================
+
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_spi.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_spi.c
new file mode 100644
index 0000000..a854e4e
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_spi.c
@@ -0,0 +1,571 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_soft_spi
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_common_debug.h"
+#include "zf_driver_soft_spi.h"
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 延时
+// 参数说明 void
+// 返回参数 void
+// 使用示例 soft_spi_delay(1);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+#define soft_spi_delay(x) for(uint32 i = x; i --; )
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 8bit 数据读写
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 data 数据
+// 返回参数 uint8 读取的数据
+// 使用示例 soft_spi_8bit_data_handler(soft_spi_obj, 1);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint8 soft_spi_8bit_data_handler (soft_spi_info_struct *soft_spi_obj, const uint8 data)
+{
+ uint8 temp = 0;
+ uint8 write_data = data;
+ uint8 read_data = 0;
+
+ if(soft_spi_obj->config.use_cs)
+ {
+ gpio_low(soft_spi_obj->cs_pin);
+ }
+
+ if(0 == soft_spi_obj->config.mode || 1 == soft_spi_obj->config.mode) // CPOL = 0 SCK 空闲低电平
+ {
+ gpio_low(soft_spi_obj->sck_pin);
+ }
+ else // CPOL = 1 SCK 空闲高电平
+ {
+ gpio_high(soft_spi_obj->sck_pin);
+ }
+
+ if(0 == soft_spi_obj->config.mode % 2) // CPHA = 0 第一个边沿采样
+ {
+ for(temp = 8; temp > 0; temp --)
+ {
+ if(0x80 & write_data)
+ {
+ gpio_high(soft_spi_obj->mosi_pin);
+ }
+ else
+ {
+ gpio_low(soft_spi_obj->mosi_pin);
+ }
+ soft_spi_delay(soft_spi_obj->delay);
+ gpio_toggle_level(soft_spi_obj->sck_pin);
+ write_data = write_data << 1;
+ read_data = read_data << 1;
+ if(soft_spi_obj->config.use_miso)
+ {
+ read_data |= gpio_get_level(soft_spi_obj->miso_pin);
+ }
+ soft_spi_delay(soft_spi_obj->delay);
+ gpio_toggle_level(soft_spi_obj->sck_pin);
+ }
+ }
+ else // CPHA = 1 第二个边沿采样
+ {
+ for(temp = 8; 0 < temp; temp --)
+ {
+ gpio_toggle_level(soft_spi_obj->sck_pin);
+ if(0x80 & write_data)
+ {
+ gpio_high(soft_spi_obj->mosi_pin);
+ }
+ else
+ {
+ gpio_low(soft_spi_obj->mosi_pin);
+ }
+ soft_spi_delay(soft_spi_obj->delay);
+ gpio_toggle_level(soft_spi_obj->sck_pin);
+ write_data = write_data << 1;
+ read_data = read_data << 1;
+ if(soft_spi_obj->config.use_miso)
+ {
+ read_data |= gpio_get_level(soft_spi_obj->miso_pin);
+ }
+ soft_spi_delay(soft_spi_obj->delay);
+ }
+ }
+
+ if(soft_spi_obj->config.use_cs)
+ {
+ gpio_high(soft_spi_obj->cs_pin);
+ }
+ return read_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 16bit 数据读写
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 data 数据
+// 返回参数 uint16 读取的数据
+// 使用示例 soft_spi_16bit_data_handler(soft_spi_obj, 1);
+// 备注信息 内部调用
+//-------------------------------------------------------------------------------------------------------------------
+static uint16 soft_spi_16bit_data_handler (soft_spi_info_struct *soft_spi_obj, const uint16 data)
+{
+ uint8 temp = 0;
+ uint16 write_data = data;
+ uint16 read_data = 0;
+
+ if(soft_spi_obj->config.use_cs)
+ {
+ gpio_low(soft_spi_obj->cs_pin);
+ }
+
+ if(0 == soft_spi_obj->config.mode || 1 == soft_spi_obj->config.mode) // CPOL = 0 SCK 空闲低电平
+ {
+ gpio_low(soft_spi_obj->sck_pin);
+ }
+ else // CPOL = 1 SCK 空闲高电平
+ {
+ gpio_high(soft_spi_obj->sck_pin);
+ }
+
+ if(0 == soft_spi_obj->config.mode % 2) // CPHA = 0 第一个边沿采样
+ {
+ for(temp = 16; 0 < temp; temp --)
+ {
+ if(0x8000 & write_data)
+ {
+ gpio_high(soft_spi_obj->mosi_pin);
+ }
+ else
+ {
+ gpio_low(soft_spi_obj->mosi_pin);
+ }
+ soft_spi_delay(soft_spi_obj->delay);
+ gpio_toggle_level(soft_spi_obj->sck_pin);
+ write_data = write_data << 1;
+ read_data = read_data << 1;
+ if(soft_spi_obj->config.use_miso)
+ {
+ read_data |= gpio_get_level(soft_spi_obj->miso_pin);
+ }
+ soft_spi_delay(soft_spi_obj->delay);
+ gpio_toggle_level(soft_spi_obj->sck_pin);
+ }
+ }
+ else // CPHA = 1 第二个边沿采样
+ {
+ for(temp = 16; 0 < temp; temp --)
+ {
+ gpio_toggle_level(soft_spi_obj->sck_pin);
+ if(write_data & 0x8000)
+ {
+ gpio_high(soft_spi_obj->mosi_pin);
+ }
+ else
+ {
+ gpio_low(soft_spi_obj->mosi_pin);
+ }
+ soft_spi_delay(soft_spi_obj->delay);
+ gpio_toggle_level(soft_spi_obj->sck_pin);
+ write_data = write_data << 1;
+ read_data = read_data << 1;
+ if(soft_spi_obj->config.use_miso)
+ {
+ read_data |= gpio_get_level(soft_spi_obj->miso_pin);
+ }
+ soft_spi_delay(soft_spi_obj->delay);
+ }
+ }
+
+ if(soft_spi_obj->config.use_cs)
+ {
+ gpio_high(soft_spi_obj->cs_pin);
+ }
+ return read_data;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口写 8bit 数据
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 data 发送的数据
+// 返回参数 void
+// 使用示例 soft_spi_write_8bit(&soft_spi_obj, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_write_8bit (soft_spi_info_struct *soft_spi_obj, const uint8 data)
+{
+ soft_spi_8bit_data_handler(soft_spi_obj, data);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口写 8bit 数组
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_spi_write_8bit_array(&soft_spi_obj, buf, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_write_8bit_array (soft_spi_info_struct *soft_spi_obj, const uint8 *data, uint32 len)
+{
+ while(len --)
+ {
+ soft_spi_8bit_data_handler(soft_spi_obj, *data ++);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口写 16bit 数据
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 data 发送的数据
+// 返回参数 void
+// 使用示例 soft_spi_write_16bit(&soft_spi_obj, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_write_16bit (soft_spi_info_struct *soft_spi_obj, uint16 data)
+{
+ soft_spi_16bit_data_handler(soft_spi_obj, data);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口写 16bit 数组
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_spi_write_16bit_array(&soft_spi_obj, buf, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_write_16bit_array (soft_spi_info_struct *soft_spi_obj, const uint16 *data, uint32 len)
+{
+ while(len --)
+ {
+ soft_spi_16bit_data_handler(soft_spi_obj, *data ++);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口向传感器的寄存器写 8bit 数据
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 register_name 寄存器地址
+// 参数说明 data 发送的数据
+// 返回参数 void
+// 使用示例 soft_spi_write_8bit_register(&soft_spi_obj, 1, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_write_8bit_register (soft_spi_info_struct *soft_spi_obj, const uint8 register_name, const uint8 data)
+{
+ soft_spi_8bit_data_handler(soft_spi_obj, register_name);
+ soft_spi_8bit_data_handler(soft_spi_obj, data);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口向传感器的寄存器写 8bit 数组
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 register_name 寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_spi_write_8bit_registers(&soft_spi_obj, 1, buf, 16);
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_write_8bit_registers (soft_spi_info_struct *soft_spi_obj, const uint8 register_name, const uint8 *data, uint32 len)
+{
+ soft_spi_8bit_data_handler(soft_spi_obj, register_name);
+ while(len --)
+ {
+ soft_spi_8bit_data_handler(soft_spi_obj, *data ++);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口向传感器的寄存器写 16bit 数据
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 register_name 寄存器地址
+// 参数说明 data 发送的数据
+// 返回参数 void
+// 使用示例 soft_spi_write_16bit_register(&soft_spi_obj, 1, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_write_16bit_register (soft_spi_info_struct *soft_spi_obj, const uint16 register_name, uint16 data)
+{
+ soft_spi_16bit_data_handler(soft_spi_obj, register_name);
+ soft_spi_16bit_data_handler(soft_spi_obj, data);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口向传感器的寄存器写 16bit 数组
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 register_name 寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_spi_write_16bit_registers(&soft_spi_obj, 1, buf, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_write_16bit_registers (soft_spi_info_struct *soft_spi_obj, const uint16 register_name, const uint16 *data, uint32 len)
+{
+ soft_spi_16bit_data_handler(soft_spi_obj, register_name);
+ while(len --)
+ {
+ soft_spi_16bit_data_handler(soft_spi_obj, *data ++);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口读 8bit 数据
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 data 发送的数据
+// 返回参数 uint8 返回读取的 8bit 数据
+// 使用示例 soft_spi_read_8bit(&soft_spi_obj);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 soft_spi_read_8bit (soft_spi_info_struct *soft_spi_obj)
+{
+ return soft_spi_8bit_data_handler(soft_spi_obj, 0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口读 8bit 数组
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_spi_read_8bit_array(&soft_spi_obj, buf, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_read_8bit_array (soft_spi_info_struct *soft_spi_obj, uint8 *data, uint32 len)
+{
+ while(len --)
+ {
+ *data ++ = soft_spi_8bit_data_handler(soft_spi_obj, 0);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口读 16bit 数据
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 data 发送的数据
+// 返回参数 uint16 返回读取的 16bit 数据
+// 使用示例 soft_spi_read_16bit(&soft_spi_obj);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 soft_spi_read_16bit (soft_spi_info_struct *soft_spi_obj)
+{
+ return soft_spi_16bit_data_handler(soft_spi_obj, 0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口读 16bit 数组
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_spi_read_16bit_array(&soft_spi_obj, buf, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_read_16bit_array (soft_spi_info_struct *soft_spi_obj, uint16 *data, uint32 len)
+{
+ while(len --)
+ {
+ *data ++ = soft_spi_16bit_data_handler(soft_spi_obj, 0);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口从传感器的寄存器读 8bit 数据
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 register_name 寄存器地址
+// 参数说明 data 发送的数据
+// 返回参数 uint8 返回读取的 8bit 数据
+// 使用示例 soft_spi_read_8bit_register(&soft_spi_obj, 0x01, 0x01);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 soft_spi_read_8bit_register (soft_spi_info_struct *soft_spi_obj, const uint8 register_name)
+{
+ soft_spi_8bit_data_handler(soft_spi_obj, register_name);
+ return soft_spi_8bit_data_handler(soft_spi_obj, 0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口从传感器的寄存器读 8bit 数组
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 register_name 寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_spi_read_8bit_registers(&soft_spi_obj, 0x01, buf, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_read_8bit_registers (soft_spi_info_struct *soft_spi_obj, const uint8 register_name, uint8 *data, uint32 len)
+{
+ soft_spi_8bit_data_handler(soft_spi_obj, register_name);
+ while(len --)
+ {
+ *data ++ = soft_spi_8bit_data_handler(soft_spi_obj, 0);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口从传感器的寄存器读 16bit 数据
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 register_name 寄存器地址
+// 参数说明 data 发送的数据
+// 返回参数 uint16 返回读取的 16bit 数据
+// 使用示例 soft_spi_read_16bit_register(&soft_spi_obj, 0x0101);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 soft_spi_read_16bit_register (soft_spi_info_struct *soft_spi_obj, const uint16 register_name)
+{
+ soft_spi_16bit_data_handler(soft_spi_obj, register_name);
+ return soft_spi_16bit_data_handler(soft_spi_obj, 0);
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口从传感器的寄存器读 16bit 数组
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 register_name 寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 soft_spi_read_16bit_registers(&soft_spi_obj, 0x0101, buf, 16);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_read_16bit_registers (soft_spi_info_struct *soft_spi_obj, const uint16 register_name, uint16 *data, uint32 len)
+{
+ soft_spi_16bit_data_handler(soft_spi_obj, register_name);
+ while(len --)
+ {
+ *data ++ = soft_spi_16bit_data_handler(soft_spi_obj, 0);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 8bit 数据传输 发送与接收数据是同时进行的
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 write_buffer 发送的数据缓冲区地址
+// 参数说明 read_buffer 发送数据时接收到的数据的存储地址(不需要接收则传 NULL)
+// 参数说明 len 发送的字节数
+// 返回参数 void
+// 使用示例 soft_spi_8bit_transfer(&soft_spi_obj, buf, buf, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_8bit_transfer (soft_spi_info_struct *soft_spi_obj, const uint8 *write_buffer, uint8 *read_buffer, uint32 len)
+{
+ while(len --)
+ {
+ *read_buffer = soft_spi_8bit_data_handler(soft_spi_obj, *write_buffer);
+ write_buffer ++;
+ read_buffer ++;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 16bit 数据传输 发送与接收数据是同时进行的
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 write_buffer 发送的数据缓冲区地址
+// 参数说明 read_buffer 发送数据时接收到的数据的存储地址(不需要接收则传 NULL)
+// 参数说明 len 发送的字节数
+// 返回参数 void
+// 使用示例 soft_spi_16bit_transfer(&soft_spi_obj, buf, buf, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_16bit_transfer (soft_spi_info_struct *soft_spi_obj, const uint16 *write_buffer, uint16 *read_buffer, uint32 len)
+{
+ while(len --)
+ {
+ *read_buffer = soft_spi_16bit_data_handler(soft_spi_obj, *write_buffer);
+ write_buffer ++;
+ read_buffer ++;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 软件 SPI 接口初始化
+// 参数说明 *soft_spi_obj 软件 SPI 指定信息存放结构体的指针
+// 参数说明 mode SPI 模式 参照 zf_driver_spi.h 内 spi_mode_enum 枚举体定义
+// 参数说明 delay 软件 SPI 延时 就是时钟高电平时间 越短 SPI 速率越高
+// 参数说明 sck_pin 选择 SCK 引脚 参照 zf_driver_gpio.h 内 gpio_pin_enum 枚举体定义
+// 参数说明 mosi_pin 选择 MOSI 引脚 参照 zf_driver_gpio.h 内 gpio_pin_enum 枚举体定义
+// 参数说明 miso_pin 选择 MISO 引脚 如果不需要这个引脚 就填 SOFT_SPI_PIN_NULL
+// 参数说明 cs_pin 选择 CS 引脚 如果不需要这个引脚 就填 SOFT_SPI_PIN_NULL
+// 返回参数 void
+// 使用示例 spi_init(SPI_1, 0, 1*1000*1000, A5, A7, A6, A4);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void soft_spi_init (soft_spi_info_struct *soft_spi_obj, uint8 mode, uint32 delay, gpio_pin_enum sck_pin, gpio_pin_enum mosi_pin, uint32 miso_pin, uint32 cs_pin)
+{
+ zf_assert(sck_pin != mosi_pin); // sck_pin 与 mosi_pin 怎么能填同一个引脚？
+ zf_assert(sck_pin != miso_pin); // sck_pin 与 miso_pin 怎么能填同一个引脚？
+ zf_assert(sck_pin != cs_pin); // sck_pin 与 cs_pin 怎么能填同一个引脚？
+ zf_assert(mosi_pin != miso_pin); // mosi_pin 与 miso_pin 怎么能填同一个引脚？
+ zf_assert(mosi_pin != cs_pin); // mosi_pin 与 cs_pin 怎么能填同一个引脚？
+ zf_assert((miso_pin != cs_pin) || (cs_pin == SOFT_SPI_PIN_NULL)); // miso_pin 与 cs_pin 怎么能填同一个引脚？
+
+ zf_assert(4 > mode); // 参照 zf_driver_spi.h 内 spi_mode_enum 枚举体定义
+
+ soft_spi_obj->config.mode = mode;
+ soft_spi_obj->delay = delay;
+
+ soft_spi_obj->sck_pin = sck_pin;
+ soft_spi_obj->mosi_pin = mosi_pin;
+ if(0 == mode || 1 == mode)
+ {
+ gpio_init(sck_pin, GPO, GPIO_LOW, GPO_PUSH_PULL); // IO 初始化
+ }
+ else
+ {
+ gpio_init(sck_pin, GPO, GPIO_HIGH, GPO_PUSH_PULL); // IO 初始化
+ }
+ gpio_init(mosi_pin, GPO, GPIO_HIGH, GPO_PUSH_PULL); // IO 初始化
+
+ if(SOFT_SPI_PIN_NULL == miso_pin)
+ {
+ soft_spi_obj->config.use_miso = 0;
+ }
+ else
+ {
+ soft_spi_obj->config.use_miso = 1;
+ soft_spi_obj->miso_pin = (gpio_pin_enum)miso_pin;
+ gpio_init(soft_spi_obj->miso_pin, GPI, GPIO_HIGH, GPI_FLOATING_IN); // IO 初始化
+ }
+ if(SOFT_SPI_PIN_NULL == cs_pin)
+ {
+ soft_spi_obj->config.use_cs = 0;
+ }
+ else
+ {
+ soft_spi_obj->config.use_cs = 1;
+ soft_spi_obj->cs_pin = (gpio_pin_enum)cs_pin;
+ gpio_init(soft_spi_obj->cs_pin, GPO, GPIO_HIGH, GPO_PUSH_PULL); // IO 初始化
+ }
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_spi.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_spi.h
new file mode 100644
index 0000000..9b06fc5
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_soft_spi.h
@@ -0,0 +1,94 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_soft_spi
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_soft_spi_h_
+#define _zf_driver_soft_spi_h_
+
+#include "zf_common_typedef.h"
+#include "zf_driver_gpio.h"
+
+#define SOFT_SPI_PIN_NULL (0xFFFF) // 用于区分是否分配引脚
+
+
+typedef struct //枚举模块号
+{
+ uint8 mode :6; // SPI 模式
+ uint8 use_miso :1; // 是否使用 MISO 引脚
+ uint8 use_cs :1; // 是否使用 CS 引脚
+}spi_config_info_struct;
+
+typedef struct
+{
+ spi_config_info_struct config; // 配置整体数据
+ gpio_pin_enum sck_pin; // 用于记录对应的引脚编号
+ gpio_pin_enum mosi_pin; // 用于记录对应的引脚编号
+ gpio_pin_enum miso_pin; // 用于记录对应的引脚编号
+ gpio_pin_enum cs_pin; // 用于记录对应的引脚编号
+ uint32 delay; // 模拟 SPI 软延时时长
+}soft_spi_info_struct;
+
+//==================================================SOFT_SPI 基础函数====================================================
+void soft_spi_write_8bit (soft_spi_info_struct *soft_spi_obj, const uint8 data);
+void soft_spi_write_8bit_array (soft_spi_info_struct *soft_spi_obj, const uint8 *data, uint32 len);
+
+void soft_spi_write_16bit (soft_spi_info_struct *soft_spi_obj, const uint16 data);
+void soft_spi_write_16bit_array (soft_spi_info_struct *soft_spi_obj, const uint16 *data, uint32 len);
+
+void soft_spi_write_8bit_register (soft_spi_info_struct *soft_spi_obj, const uint8 register_name, const uint8 data);
+void soft_spi_write_8bit_registers (soft_spi_info_struct *soft_spi_obj, const uint8 register_name, const uint8 *data, uint32 len);
+
+void soft_spi_write_16bit_register (soft_spi_info_struct *soft_spi_obj, const uint16 register_name, const uint16 data);
+void soft_spi_write_16bit_registers (soft_spi_info_struct *soft_spi_obj, const uint16 register_name, const uint16 *data, uint32 len);
+
+uint8 soft_spi_read_8bit (soft_spi_info_struct *soft_spi_obj);
+void soft_spi_read_8bit_array (soft_spi_info_struct *soft_spi_obj, uint8 *data, uint32 len);
+
+uint16 soft_spi_read_16bit (soft_spi_info_struct *soft_spi_obj);
+void soft_spi_read_16bit_array (soft_spi_info_struct *soft_spi_obj, uint16 *data, uint32 len);
+
+uint8 soft_spi_read_8bit_register (soft_spi_info_struct *soft_spi_obj, const uint8 register_name);
+void soft_spi_read_8bit_registers (soft_spi_info_struct *soft_spi_obj, const uint8 register_name, uint8 *data, uint32 len);
+
+uint16 soft_spi_read_16bit_register (soft_spi_info_struct *soft_spi_obj, const uint16 register_name);
+void soft_spi_read_16bit_registers (soft_spi_info_struct *soft_spi_obj, const uint16 register_name, uint16 *data, uint32 len);
+
+void soft_spi_transfer_8bit (soft_spi_info_struct *soft_spi_obj, const uint8 *write_buffer, uint8 *read_buffer, uint32 len);
+void soft_spi_transfer_16bit (soft_spi_info_struct *soft_spi_obj, const uint16 *write_buffer, uint16 *read_buffer, uint32 len);
+
+void soft_spi_init (soft_spi_info_struct *soft_spi_obj, uint8 mode, uint32 delay, gpio_pin_enum sck_pin, gpio_pin_enum mosi_pin, uint32 miso_pin, uint32 cs_pin);
+//==================================================SOFT_SPI 基础函数====================================================
+
+#endif
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_spi.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_spi.c
new file mode 100644
index 0000000..6c3fdb3
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_spi.c
@@ -0,0 +1,1070 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_spi
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IFXQSPI_REGDEF.h"
+#include "IfxQspi_SpiMaster.h"
+#include "IfxQspi.h"
+#include "zf_common_debug.h"
+#include "zf_driver_gpio.h"
+#include "zf_driver_delay.h"
+#include "zf_driver_spi.h"
+
+#define MAX_BAUD 50000000
+Ifx_QSPI_BACON bacon;
+spi_cs_pin_enum spi_cs_pin;
+
+void spi_mux (spi_index_enum spi_n, spi_sck_pin_enum sck_pin, spi_mosi_pin_enum mosi_pin, spi_miso_pin_enum miso_pin, spi_cs_pin_enum cs_pin, IfxQspi_SpiMaster_Pins *set_pin, IfxQspi_SpiMaster_Output *set_cs)
+{
+ set_pin->mrstMode = IfxPort_InputMode_pullDown;
+ set_pin->mtsrMode = IfxPort_OutputMode_pushPull;
+ set_pin->sclkMode = IfxPort_OutputMode_pushPull;
+ set_pin->pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+
+ set_cs->driver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+ set_cs->mode = IfxPort_OutputMode_pushPull;
+
+ switch(spi_n)
+ {
+ case SPI_0:
+ {
+ if (SPI0_SCLK_P20_11 == sck_pin) set_pin->sclk = &IfxQspi0_SCLK_P20_11_OUT;
+ else if (SPI0_SCLK_P20_13 == sck_pin) set_pin->sclk = &IfxQspi0_SCLK_P20_13_OUT;
+ else zf_assert(FALSE);
+
+ if (SPI0_MOSI_P20_12 == mosi_pin) set_pin->mtsr = &IfxQspi0_MTSR_P20_12_OUT;
+ else if (SPI0_MOSI_P20_14 == mosi_pin) set_pin->mtsr = &IfxQspi0_MTSR_P20_14_OUT;
+ else zf_assert(FALSE);
+
+ if (SPI0_MISO_P20_12 == miso_pin) set_pin->mrst = &IfxQspi0_MRSTA_P20_12_IN;
+ else zf_assert(FALSE);
+
+ if (SPI0_CS0_P20_8 == cs_pin ||
+ SPI_CS_NULL == cs_pin) set_cs->pin = &IfxQspi0_SLSO0_P20_8_OUT;
+ else if (SPI0_CS1_P20_9 == cs_pin) set_cs->pin = &IfxQspi0_SLSO1_P20_9_OUT;
+ else if (SPI0_CS2_P20_13 == cs_pin) set_cs->pin = &IfxQspi0_SLSO2_P20_13_OUT;
+ else if (SPI0_CS3_P11_10 == cs_pin) set_cs->pin = &IfxQspi0_SLSO3_P11_10_OUT;
+ else if (SPI0_CS4_P11_11 == cs_pin) set_cs->pin = &IfxQspi0_SLSO4_P11_11_OUT;
+ else if (SPI0_CS5_P11_2 == cs_pin) set_cs->pin = &IfxQspi0_SLSO5_P11_2_OUT;
+ else if (SPI0_CS6_P20_10 == cs_pin) set_cs->pin = &IfxQspi0_SLSO6_P20_10_OUT;
+ else if (SPI0_CS7_P33_5 == cs_pin) set_cs->pin = &IfxQspi0_SLSO7_P33_5_OUT;
+ else if (SPI0_CS8_P20_6 == cs_pin) set_cs->pin = &IfxQspi0_SLSO8_P20_6_OUT;
+ else if (SPI0_CS9_P20_3 == cs_pin) set_cs->pin = &IfxQspi0_SLSO9_P20_3_OUT;
+ else if (SPI0_CS13_P15_0 == cs_pin) set_cs->pin = &IfxQspi0_SLSO13_P15_0_OUT;
+ else zf_assert(FALSE);
+
+ }break;
+
+ case SPI_1:
+ {
+ if (SPI1_SCLK_P10_2 == sck_pin) set_pin->sclk = &IfxQspi1_SCLK_P10_2_OUT;
+ else if (SPI1_SCLK_P11_6 == sck_pin) set_pin->sclk = &IfxQspi1_SCLK_P11_6_OUT;
+ else zf_assert(FALSE);
+
+ if (SPI1_MOSI_P10_1 == mosi_pin) set_pin->mtsr = &IfxQspi1_MTSR_P10_1_OUT;
+ else if (SPI1_MOSI_P10_3 == mosi_pin) set_pin->mtsr = &IfxQspi1_MTSR_P10_3_OUT;
+ else if (SPI1_MOSI_P11_9 == mosi_pin) set_pin->mtsr = &IfxQspi1_MTSR_P11_9_OUT;
+ else zf_assert(FALSE);
+
+ if (SPI1_MISO_P10_1 == miso_pin) set_pin->mrst = &IfxQspi1_MRSTA_P10_1_IN;
+ else if (SPI1_MISO_P11_3 == miso_pin) set_pin->mrst = &IfxQspi1_MRSTB_P11_3_IN;
+ else zf_assert(FALSE);
+
+ if (SPI1_CS0_P20_8 == cs_pin ||
+ SPI_CS_NULL == cs_pin) set_cs->pin = &IfxQspi1_SLSO0_P20_8_OUT;
+ else if (SPI1_CS1_P20_9 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO1_P20_9_OUT;
+ else if (SPI1_CS2_P20_13 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO2_P20_13_OUT;
+ else if (SPI1_CS3_P11_10 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO3_P11_10_OUT;
+ else if (SPI1_CS4_P11_11 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO4_P11_11_OUT;
+ else if (SPI1_CS5_P11_2 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO5_P11_2_OUT;
+ else if (SPI1_CS6_P33_10 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO6_P33_10_OUT;
+ else if (SPI1_CS7_P33_5 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO7_P33_5_OUT;
+ else if (SPI1_CS8_P10_4 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO8_P10_4_OUT;
+ else if (SPI1_CS9_P10_5 == cs_pin ) set_cs->pin = &IfxQspi1_SLSO9_P10_5_OUT;
+ else zf_assert(FALSE);
+ }break;
+
+ case SPI_2:
+ {
+ if (SPI2_SCLK_P13_0 == sck_pin) set_pin->sclk = &IfxQspi2_SCLKN_P13_0_OUT;
+ else if (SPI2_SCLK_P13_1 == sck_pin) set_pin->sclk = &IfxQspi2_SCLKP_P13_1_OUT;
+ else if (SPI2_SCLK_P15_3 == sck_pin) set_pin->sclk = &IfxQspi2_SCLK_P15_3_OUT;
+ else if (SPI2_SCLK_P15_6 == sck_pin) set_pin->sclk = &IfxQspi2_SCLK_P15_6_OUT;
+ else if (SPI2_SCLK_P15_8 == sck_pin) set_pin->sclk = &IfxQspi2_SCLK_P15_8_OUT;
+ else zf_assert(FALSE);
+
+ if (SPI2_MOSI_P13_3 == mosi_pin) set_pin->mtsr = &IfxQspi2_MTSRP_P13_3_OUT;
+ else if (SPI2_MOSI_P15_5 == mosi_pin) set_pin->mtsr = &IfxQspi2_MTSR_P15_5_OUT;
+ else if (SPI2_MOSI_P15_6 == mosi_pin) set_pin->mtsr = &IfxQspi2_MTSR_P15_6_OUT;
+ else zf_assert(FALSE);
+
+ if (SPI2_MISO_P15_2 == miso_pin) set_pin->mrst = &IfxQspi2_MRSTE_P15_2_IN;
+ else if (SPI2_MISO_P15_4 == miso_pin) set_pin->mrst = &IfxQspi2_MRSTA_P15_4_IN;
+ else if (SPI2_MISO_P15_7 == miso_pin) set_pin->mrst = &IfxQspi2_MRSTB_P15_7_IN;
+ else if (SPI2_MISO_P21_2 == miso_pin) set_pin->mrst = &IfxQspi2_MRSTCN_P21_2_IN;
+ else if (SPI2_MISO_P21_3 == miso_pin) set_pin->mrst = &IfxQspi2_MRSTCP_P21_3_IN;
+ else zf_assert(FALSE);
+
+ if (SPI2_CS0_P15_2 == cs_pin ||
+ SPI_CS_NULL == cs_pin) set_cs->pin = &IfxQspi2_SLSO0_P15_2_OUT;
+ else if (SPI2_CS1_P14_2 == cs_pin) set_cs->pin = &IfxQspi2_SLSO1_P14_2_OUT;
+ else if (SPI2_CS2_P14_6 == cs_pin) set_cs->pin = &IfxQspi2_SLSO2_P14_6_OUT;
+ else if (SPI2_CS3_P14_3 == cs_pin) set_cs->pin = &IfxQspi2_SLSO3_P14_3_OUT;
+ else if (SPI2_CS5_P15_1 == cs_pin) set_cs->pin = &IfxQspi2_SLSO5_P15_1_OUT;
+ else if (SPI2_CS6_P33_13 == cs_pin) set_cs->pin = &IfxQspi2_SLSO6_P33_13_OUT;
+ else if (SPI2_CS7_P20_10 == cs_pin) set_cs->pin = &IfxQspi2_SLSO7_P20_10_OUT;
+ else if (SPI2_CS8_P20_6 == cs_pin) set_cs->pin = &IfxQspi2_SLSO8_P20_6_OUT;
+ else if (SPI2_CS9_P20_3 == cs_pin) set_cs->pin = &IfxQspi2_SLSO9_P20_3_OUT;
+ else zf_assert(FALSE);
+ }break;
+
+ case SPI_3:
+ {
+ if (SPI3_SCLK_P02_7 == sck_pin) set_pin->sclk = &IfxQspi3_SCLK_P02_7_OUT;
+ else if (SPI3_SCLK_P22_0 == sck_pin) set_pin->sclk = &IfxQspi3_SCLKN_P22_0_OUT;
+ else if (SPI3_SCLK_P22_1 == sck_pin) set_pin->sclk = &IfxQspi3_SCLKP_P22_1_OUT;
+ else if (SPI3_SCLK_P22_3 == sck_pin) set_pin->sclk = &IfxQspi3_SCLK_P22_3_OUT;
+ else if (SPI3_SCLK_P33_11 == sck_pin) set_pin->sclk = &IfxQspi3_SCLK_P33_11_OUT;
+ else zf_assert(FALSE);
+
+ if (SPI3_MOSI_P02_6 == mosi_pin) set_pin->mtsr = &IfxQspi3_MTSR_P02_6_OUT;
+ else if (SPI3_MOSI_P10_6 == mosi_pin) set_pin->mtsr = &IfxQspi3_MTSR_P10_6_OUT;
+ else if (SPI3_MOSI_P22_0 == mosi_pin) set_pin->mtsr = &IfxQspi3_MTSR_P22_0_OUT;
+ else if (SPI3_MOSI_P22_3 == mosi_pin) set_pin->mtsr = &IfxQspi3_MTSRP_P22_3_OUT;
+ else if (SPI3_MOSI_P33_12 == mosi_pin) set_pin->mtsr = &IfxQspi3_MTSR_P33_12_OUT;
+ else zf_assert(FALSE);
+
+ if (SPI3_MISO_P02_5 == miso_pin) set_pin->mrst = &IfxQspi3_MRSTA_P02_5_IN;
+ else if (SPI3_MISO_P22_1 == miso_pin) set_pin->mrst = &IfxQspi3_MRSTE_P22_1_IN;
+ else if (SPI3_MISO_P21_2 == miso_pin) set_pin->mrst = &IfxQspi3_MRSTFN_P21_2_IN;
+ else if (SPI3_MISO_P21_3 == miso_pin) set_pin->mrst = &IfxQspi3_MRSTFP_P21_3_IN;
+ else if (SPI3_MISO_P33_13 == miso_pin) set_pin->mrst = &IfxQspi3_MRSTD_P33_13_IN;
+ else zf_assert(FALSE);
+
+ if (SPI3_CS0_P02_4 == cs_pin ||
+ SPI_CS_NULL == cs_pin) set_cs->pin = &IfxQspi3_SLSO0_P02_4_OUT;
+ else if (SPI3_CS1_P02_0 == cs_pin) set_cs->pin = &IfxQspi3_SLSO1_P02_0_OUT;
+ else if (SPI3_CS1_P33_9 == cs_pin) set_cs->pin = &IfxQspi3_SLSO1_P33_9_OUT;
+ else if (SPI3_CS2_P02_1 == cs_pin) set_cs->pin = &IfxQspi3_SLSO2_P02_1_OUT;
+ else if (SPI3_CS2_P33_8 == cs_pin) set_cs->pin = &IfxQspi3_SLSO2_P33_8_OUT;
+ else if (SPI3_CS3_P02_2 == cs_pin) set_cs->pin = &IfxQspi3_SLSO3_P02_2_OUT;
+ else if (SPI3_CS4_P02_3 == cs_pin) set_cs->pin = &IfxQspi3_SLSO4_P02_3_OUT;
+ else if (SPI3_CS5_P02_8 == cs_pin) set_cs->pin = &IfxQspi3_SLSO5_P02_8_OUT;
+ else if (SPI3_CS6_P00_8 == cs_pin) set_cs->pin = &IfxQspi3_SLSO6_P00_8_OUT;
+ else if (SPI3_CS7_P00_9 == cs_pin) set_cs->pin = &IfxQspi3_SLSO7_P00_9_OUT;
+ else if (SPI3_CS7_P33_7 == cs_pin) set_cs->pin = &IfxQspi3_SLSO7_P33_7_OUT;
+ else if (SPI3_CS8_P10_5 == cs_pin) set_cs->pin = &IfxQspi3_SLSO8_P10_5_OUT;
+ else if (SPI3_CS11_P33_10 == cs_pin) set_cs->pin = &IfxQspi3_SLSO11_P33_10_OUT;
+ else if (SPI3_CS12_P22_2 == cs_pin) set_cs->pin = &IfxQspi3_SLSO12_P22_2_OUT;
+ else if (SPI3_CS13_P23_1 == cs_pin) set_cs->pin = &IfxQspi3_SLSO13_P23_1_OUT;
+ else zf_assert(FALSE);
+ }break;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI清除接收缓存区数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 返回参数 void
+// 使用示例 spi_clear_fifo(SPI_1);
+// 备注信息 内部调用，用户无需关心
+//-------------------------------------------------------------------------------------------------------------------
+static void spi_clear_fifo (Ifx_QSPI *moudle)
+{
+ uint32 fifo_num;
+ // 将之前fifo中的数据全读读取出来
+ fifo_num = moudle->STATUS.B.RXFIFOLEVEL;
+ while(fifo_num --)
+ {
+ (uint8)IfxQspi_readReceiveFifo(moudle);
+ }
+
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口写 8bit 数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 spi_write_8bit(SPI_1, 0x11);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_write_8bit (spi_index_enum spi_n, const uint8 data)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+
+ IfxQspi_writeTransmitFifo(moudle, data); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口写 8bit 数组
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 spi_write_8bit_array(SPI_1, data, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_write_8bit_array (spi_index_enum spi_n, const uint8 *data, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U);// 发送数据后CS继续保持为低
+
+ do
+ {
+ if(len == 1)
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, *data ++); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口写 16bit 数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 spi_write_16bit(SPI_1, 0x1101);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_write_16bit (spi_index_enum spi_n, const uint16 data)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U);// 发送数据后CS继续保持为低
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)((data & 0xFF00) >> 8)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(data & 0x00FF)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口写 16bit 数组
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 spi_write_16bit_array(SPI_1, data, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_write_16bit_array (spi_index_enum spi_n, const uint16 *data, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ do
+ {
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)((*data & 0xFF00) >> 8)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ if(len == 1) // 最后一个数据
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(*data++ & 0x00FF)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口向传感器的寄存器写 8bit 数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 spi_write_8bit_register(SPI_1, 0x11, 0x01);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_write_8bit_register (spi_index_enum spi_n, const uint8 register_name, const uint8 data)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeTransmitFifo(moudle, register_name); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+
+ IfxQspi_writeTransmitFifo(moudle, data); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口向传感器的寄存器写 8bit 数组
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 spi_write_8bit_registers(SPI_1, 0x11, data, 32);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_write_8bit_registers (spi_index_enum spi_n, const uint8 register_name, const uint8 *data, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ IfxQspi_writeTransmitFifo(moudle, register_name); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ do
+ {
+ if(len == 1) // 最后一个数据
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, *data ++); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口向传感器的寄存器写 16bit 数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 参数说明 data 数据
+// 返回参数 void
+// 使用示例 spi_write_16bit_register(SPI_1, 0x1011, 0x0101);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_write_16bit_register (spi_index_enum spi_n, const uint16 register_name, const uint16 data)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U);// 发送数据后CS继续保持为低
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)((register_name & 0xFF00) >> 8)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(register_name & 0x00FF)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)((data & 0xFF00) >> 8)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(data & 0x00FF)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口向传感器的寄存器写 16bit 数组
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 spi_write_16bit_registers(SPI_1, 0x1011, data, 32);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_write_16bit_registers (spi_index_enum spi_n, const uint16 register_name, const uint16 *data, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U);// 发送数据后CS继续保持为低
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)((register_name & 0xFF00) >> 8)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(register_name & 0x00FF)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ do
+ {
+ IfxQspi_writeTransmitFifo(moudle, (uint8)((*data & 0xFF00) >> 8)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ if(len == 1) // 最后一个数据
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(*data ++ & 0x00FF)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口读 8bit 数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 返回参数 uint8 数据
+// 使用示例 spi_read_8bit(SPI_1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 spi_read_8bit (spi_index_enum spi_n)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+
+ return (uint8)IfxQspi_readReceiveFifo(moudle); // 返回接收到的数据
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口读 8bit 数组
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 发送缓冲区长度
+// 返回参数 void
+// 使用示例 spi_read_8bit_array(SPI_1, data, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_read_8bit_array (spi_index_enum spi_n, uint8 *data, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U);// 发送数据后CS继续保持为低
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ do
+ {
+ if(len == 1) // 最后一个数据
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ *data++ = (uint8)IfxQspi_readReceiveFifo(moudle); // 保存接收到的数据
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口读 16bit 数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 返回参数 uint16 数据
+// 使用示例 spi_read_16bit(SPI_1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 spi_read_16bit (spi_index_enum spi_n)
+{
+ uint16 data = 0;
+
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U);// 发送数据后CS继续保持为低
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ data = (uint16)IfxQspi_readReceiveFifo(moudle); // 保存接收到的数据
+
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ data = ((data << 8) | (uint16)IfxQspi_readReceiveFifo(moudle)); // 拟合接收到的数据
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+
+ return data; // 返回接收到的数据
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口读 16bit 数组
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 发送缓冲区长度
+// 返回参数 void
+// 使用示例 spi_read_16bit_array(SPI_1, data, 64);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_read_16bit_array (spi_index_enum spi_n, uint16 *data, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ do
+ {
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ *data = (uint16)IfxQspi_readReceiveFifo(moudle); // 保存接收到的数据
+
+ if(len == 1)
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ *data = ((*data << 8) | (uint16)IfxQspi_readReceiveFifo(moudle)); // 拟合接收到的数据
+
+ data ++;
+
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口从传感器的寄存器读 8bit 数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 返回参数 uint8 数据
+// 使用示例 spi_read_8bit_register(SPI_1, 0x11);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 spi_read_8bit_register (spi_index_enum spi_n, const uint8 register_name)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ IfxQspi_writeTransmitFifo(moudle, register_name); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+
+ return (uint8)IfxQspi_readReceiveFifo(moudle); // 返回接收到的数据
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口从传感器的寄存器读 8bit 数组
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 发送缓冲区长度
+// 返回参数 void
+// 使用示例 spi_read_8bit_registers(SPI_1, 0x11, data, 32);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_read_8bit_registers (spi_index_enum spi_n, const uint8 register_name, uint8 *data, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ IfxQspi_writeTransmitFifo(moudle, register_name); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ do
+ {
+ if(len == 1)
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ *data ++ = (uint8)IfxQspi_readReceiveFifo(moudle); // 保存接收到的数据
+
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口从传感器的寄存器读 16bit 数据
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 返回参数 uint16 数据
+// 使用示例 spi_read_16bit_register(SPI_1, 0x1011);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint16 spi_read_16bit_register (spi_index_enum spi_n, const uint16 register_name)
+{
+ uint16 data = 0;
+
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)((register_name & 0xFF00) >> 8)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(register_name & 0x00FF)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ data |= (uint8)IfxQspi_readReceiveFifo(moudle); // 保存接收到的数据
+
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ data = ((data << 8) | (uint16)IfxQspi_readReceiveFifo(moudle)); // 保存接收到的数据
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+
+ return data;
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 接口从传感器的寄存器读 16bit 数组
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 register_name 寄存器地址
+// 参数说明 *data 数据存放缓冲区
+// 参数说明 len 发送缓冲区长度
+// 返回参数 void
+// 使用示例 spi_read_16bit_registers(SPI_1, 0x1101, data, 32);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_read_16bit_registers (spi_index_enum spi_n, const uint16 register_name, uint16 *data, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)((register_name & 0xFF00) >> 8)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(register_name & 0x00FF)); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ do
+ {
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ *data |= (uint8)IfxQspi_readReceiveFifo(moudle); // 保存接收到的数据
+
+ if(len == 1)
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, 0); // 将发送的数据写入缓冲区
+
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+
+ *data = ((*data << 8) | (uint16)IfxQspi_readReceiveFifo(moudle)); // 保存接收到的数据
+
+ data ++;
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 8bit 数据传输 发送与接收数据是同时进行的
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 write_buffer 发送的数据缓冲区地址
+// 参数说明 read_buffer 发送数据时接收到的数据的存储地址(不需要接收则传 NULL)
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 spi_transfer_8bit(SPI_1, buf, buf, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_transfer_8bit (spi_index_enum spi_n, const uint8 *write_buffer, uint8 *read_buffer, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ do
+ {
+ if(len == 1)
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, *write_buffer ++); // 将发送的数据写入缓冲区
+
+ if(read_buffer != NULL)
+ {
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+ *read_buffer ++ = (uint8)IfxQspi_readReceiveFifo(moudle); // 保存接收到的数据
+ }
+ else
+ {
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+ }
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI 16bit 数据传输 发送与接收数据是同时进行的
+// 参数说明 spi_n SPI 模块号 参照 zf_driver_spi.h 内 spi_index_enum 枚举体定义
+// 参数说明 write_buffer 发送的数据缓冲区地址
+// 参数说明 read_buffer 发送数据时接收到的数据的存储地址(不需要接收则传 NULL)
+// 参数说明 len 缓冲区长度
+// 返回参数 void
+// 使用示例 spi_transfer_16bit(SPI_1, buf, buf, 1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_transfer_16bit (spi_index_enum spi_n, const uint16 *write_buffer, uint16 *read_buffer, uint32 len)
+{
+ volatile Ifx_QSPI *moudle; // 定义SPI模块对象
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n); // 获取模块地址
+
+ IfxQspi_writeBasicConfigurationBeginStream(moudle, bacon.U); // 发送数据后CS继续保持为低
+
+ spi_clear_fifo(moudle); // 清除接收缓存区
+
+ do
+ {
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(*write_buffer & 0xFF00) >> 8); // 将发送的数据写入缓冲区
+
+ if(read_buffer != NULL)
+ {
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+ *read_buffer = ((uint16)IfxQspi_readReceiveFifo(moudle) & 0x00FF); // 保存接收到的数据
+ }
+ else
+ {
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+ }
+
+ if(len == 1)
+ {
+ IfxQspi_writeBasicConfigurationEndStream(moudle, bacon.U); // 发送数据后CS拉高
+ }
+
+ IfxQspi_writeTransmitFifo(moudle, (uint8)(*write_buffer & 0x00FF)); // 将发送的数据写入缓冲区
+
+ if(read_buffer != NULL)
+ {
+ while(moudle->STATUS.B.RXFIFOLEVEL == 0); // 等待接收完毕
+ *read_buffer = (*read_buffer << 8) | (uint16)IfxQspi_readReceiveFifo(moudle);// 保存接收到的数据
+ }
+ else
+ {
+ while(moudle->STATUS.B.TXFIFOLEVEL != 0); // 等待发送完毕
+ }
+
+ write_buffer ++;
+ read_buffer ++;
+ }while(-- len);
+
+ while(moudle->STATUS.B.PT1F == 0); // 等待结束标志位
+
+ IfxQspi_clearAllEventFlags(moudle); // 清除发送结束标志位
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 SPI初始化
+// 参数说明 spi_n 选择SPI模块(SPI_1-SPI_4)
+// 参数说明 mode SPI模式 0：CPOL=0 CPHA=0 1：CPOL=0 CPHA=1 2：CPOL=1 CPHA=0 3：CPOL=1 CPHA=1 // 具体细节可自行查阅资料
+// 参数说明 baud 设置SPI的波特率
+// 参数说明 cs_pin 选择SPI片选引脚
+// 参数说明 sck_pin 选择SPI时钟引脚
+// 参数说明 mosi_pin 选择SPI MOSI引脚
+// 参数说明 miso_pin 选择SPI MISO引脚
+// 返回参数 void
+// 使用示例 spi_init(SPI_2, SPI_MODE0, 1*1000*1000, SPI2_SCLK_P15_3, SPI2_MOSI_P15_5, SPI2_MISO_P15_4, SPI2_CS0_P15_2); // 硬件SPI初始化 模式0 波特率为1Mhz
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void spi_init (spi_index_enum spi_n, spi_mode_enum mode, uint32 baud, spi_sck_pin_enum sck_pin, spi_mosi_pin_enum mosi_pin, spi_miso_pin_enum miso_pin, spi_cs_pin_enum cs_pin)
+{
+ IfxQspi_SpiMaster_Config MasterConfig;
+ IfxQspi_SpiMaster MasterHandle;
+ IfxQspi_SpiMaster_Channel MasterChHandle;
+ IfxQspi_SpiMaster_Pins MasterPins;
+ IfxQspi_SpiMaster_Output SlsoPin;
+ volatile Ifx_QSPI *moudle;
+
+ // 检查引脚是否正确
+ // 如果从此处进入断言，则说明初始化SPI时，模块号和引脚并不是同一模块
+ zf_assert(spi_n == (sck_pin / 100));
+ zf_assert(spi_n == (mosi_pin / 100));
+ zf_assert(spi_n == (miso_pin / 100));
+ if(SPI_CS_NULL != cs_pin)
+ {
+ zf_assert(spi_n == (cs_pin / 100));
+ }
+ spi_cs_pin = cs_pin;
+
+ moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
+
+ spi_mux(spi_n, sck_pin, mosi_pin, miso_pin, cs_pin, &MasterPins, &SlsoPin);
+
+ IfxQspi_SpiMaster_initModuleConfig(&MasterConfig, moudle);
+ MasterConfig.base.mode = SpiIf_Mode_master;
+ MasterConfig.base.maximumBaudrate = MAX_BAUD;
+ MasterConfig.base.isrProvider = IfxSrc_Tos_cpu0;
+
+
+ MasterConfig.pins = &MasterPins;
+ IfxQspi_SpiMaster_initModule(&MasterHandle, &MasterConfig);
+
+ IfxQspi_SpiMaster_ChannelConfig MasterChConfig;
+ IfxQspi_SpiMaster_initChannelConfig(&MasterChConfig, &MasterHandle);
+
+
+ MasterChConfig.base.baudrate = (float)baud;
+ switch(mode)
+ {
+ case 0:
+ {
+ MasterChConfig.base.mode.clockPolarity = SpiIf_ClockPolarity_idleLow; // CPOL
+ MasterChConfig.base.mode.shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge; // CPHA
+ }break;
+ case 1:
+ {
+ MasterChConfig.base.mode.clockPolarity = SpiIf_ClockPolarity_idleLow;
+ MasterChConfig.base.mode.shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge;
+ }break;
+ case 2:
+ {
+ MasterChConfig.base.mode.clockPolarity = SpiIf_ClockPolarity_idleHigh;
+ MasterChConfig.base.mode.shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge;
+ }break;
+ case 3:
+ {
+ MasterChConfig.base.mode.clockPolarity = SpiIf_ClockPolarity_idleHigh;
+ MasterChConfig.base.mode.shiftClock = SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge;
+ }break;
+ }
+
+ MasterChConfig.base.mode.dataHeading = SpiIf_DataHeading_msbFirst;
+ MasterChConfig.base.mode.dataWidth = 8;
+
+ MasterChConfig.base.mode.csActiveLevel = Ifx_ActiveState_low;
+ MasterChConfig.sls.output = SlsoPin;
+ IfxQspi_SpiMaster_initChannel(&MasterChHandle, &MasterChConfig);
+
+ if(SPI_CS_NULL == cs_pin)
+ {
+ IfxQspi_setSlaveSelectOutputControl(moudle, IfxQspi_ChannelId_0, FALSE, FALSE);
+ spi_cs_pin = SPI_CS_NULL;
+ switch(spi_n)
+ {
+ case SPI_0: cs_pin = SPI0_CS0_P20_8; break;
+ case SPI_1: cs_pin = SPI1_CS0_P20_8; break;
+ case SPI_2: cs_pin = SPI2_CS0_P15_2; break;
+ case SPI_3: cs_pin = SPI3_CS0_P02_4; break;
+ }
+ }
+
+ IfxQspi_configPT1Event(moudle, IfxQspi_PhaseTransitionEvent_endOfFrame);
+
+ bacon.U = moudle->BACON.U;
+ bacon.B.DL = 7; // Data Length
+ bacon.B.IDLE = 1; // Idle Delay Length
+ bacon.B.IPRE = 1; // Prescaler for the Idle Delay
+ bacon.B.LEAD = 1; // Leading Delay Length
+ bacon.B.LPRE = 1; // Prescaler for the Leading Delay
+ bacon.B.MSB = 1; // Shift MSB or LSB First
+ bacon.B.PARTYP = 0; // Parity Type
+ bacon.B.BYTE = 0; // Byte
+ bacon.B.TRAIL = 1; // Trailing Delay Length
+ bacon.B.TPRE = 1; // Prescaler for the Trailing Delay
+ bacon.B.CS = cs_pin%102/6-3;
+}
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_spi.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_spi.h
new file mode 100644
index 0000000..3824b87
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_spi.h
@@ -0,0 +1,172 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_spi
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_spi_h_
+#define _zf_driver_spi_h_
+
+#include "zf_common_typedef.h"
+
+typedef enum // SPI模块号
+{
+ SPI_0,
+ SPI_1,
+ SPI_2,
+ SPI_3,
+}spi_index_enum;
+
+typedef enum // 枚举 SPI 模式 此枚举定义不允许用户修改
+{
+ SPI_MODE0,
+ SPI_MODE1,
+ SPI_MODE2,
+ SPI_MODE3,
+}spi_mode_enum;
+
+typedef enum // 枚举SPI CLK引脚 此枚举定义不允许用户修改
+{
+ SPI0_SCLK_P20_11 = 0*102+0*6 , SPI0_SCLK_P20_13, // SPI0 CLK 引脚可选范围
+
+ SPI1_SCLK_P10_2 = 1*102+0*6 , SPI1_SCLK_P11_6, // SPI1 CLK 引脚可选范围
+
+ SPI2_SCLK_P13_0 = 2*102+0*6 , SPI2_SCLK_P13_1, SPI2_SCLK_P15_3, SPI2_SCLK_P15_6, SPI2_SCLK_P15_8, // SPI2 CLK 引脚可选范围
+
+ SPI3_SCLK_P02_7 = 3*102+0*6 , SPI3_SCLK_P22_0, SPI3_SCLK_P22_1, SPI3_SCLK_P22_3, SPI3_SCLK_P33_11, // SPI3 CLK 引脚可选范围
+}spi_sck_pin_enum;
+
+typedef enum // 枚举SPI MOSI引脚 此枚举定义不允许用户修改
+{
+ SPI0_MOSI_P20_12 = 0*102+1*6 , SPI0_MOSI_P20_14, // SPI0 MOSI引脚可选范围
+
+ SPI1_MOSI_P10_1 = 1*102+1*6 , SPI1_MOSI_P10_3, SPI1_MOSI_P11_9, // SPI1 MOSI引脚可选范围
+
+ SPI2_MOSI_P13_3 = 2*102+1*6 , SPI2_MOSI_P15_5, SPI2_MOSI_P15_6, // SPI2 MOSI引脚可选范围
+
+ SPI3_MOSI_P02_6 = 3*102+1*6 , SPI3_MOSI_P10_6, SPI3_MOSI_P22_0, SPI3_MOSI_P22_3, SPI3_MOSI_P33_12, // SPI3 MOSI引脚可选范围
+}spi_mosi_pin_enum;
+
+typedef enum // 枚举SPI MISO引脚 此枚举定义不允许用户修改
+{
+ SPI0_MISO_P20_12 = 0*102+2*6 , // SPI0 MISO引脚可选范围
+
+ SPI1_MISO_P10_1 = 1*102+2*6 , SPI1_MISO_P11_3, // SPI1 MISO引脚可选范围
+
+ SPI2_MISO_P15_2 = 2*102+2*6 , SPI2_MISO_P15_4, SPI2_MISO_P15_7, SPI2_MISO_P21_2, SPI2_MISO_P21_3, // SPI2 MISO引脚可选范围
+
+ SPI3_MISO_P02_5 = 3*102+2*6 , SPI3_MISO_P22_1, SPI3_MISO_P21_2, SPI3_MISO_P21_3, SPI3_MISO_P33_13, // SPI3 MISO引脚可选范围
+}spi_miso_pin_enum;
+
+typedef enum // 枚举SPI CS引脚 此枚举定义不允许用户修改
+{
+ SPI0_CS0_P20_8 = 0*102+3*6 , // SPI0 CS0 引脚可选范围
+ SPI0_CS1_P20_9 = 0*102+4*6 ,
+ SPI0_CS2_P20_13 = 0*102+5*6 ,
+ SPI0_CS3_P11_10 = 0*102+6*6 ,
+ SPI0_CS4_P11_11 = 0*102+7*6 ,
+ SPI0_CS5_P11_2 = 0*102+8*6 ,
+ SPI0_CS6_P20_10 = 0*102+9*6 ,
+ SPI0_CS7_P33_5 = 0*102+10*6,
+ SPI0_CS8_P20_6 = 0*102+11*6,
+ SPI0_CS9_P20_3 = 0*102+12*6,
+ SPI0_CS13_P15_0 = 0*102+16*6,
+
+ SPI1_CS0_P20_8 = 1*102+3*6 ,
+ SPI1_CS1_P20_9 = 1*102+4*6 ,
+ SPI1_CS2_P20_13 = 1*102+5*6 ,
+ SPI1_CS3_P11_10 = 1*102+6*6 ,
+ SPI1_CS4_P11_11 = 1*102+7*6 ,
+ SPI1_CS5_P11_2 = 1*102+8*6 ,
+ SPI1_CS6_P33_10 = 1*102+9*6 ,
+ SPI1_CS7_P33_5 = 1*102+10*6,
+ SPI1_CS8_P10_4 = 1*102+11*6,
+ SPI1_CS9_P10_5 = 1*102+12*6,
+
+ SPI2_CS0_P15_2 = 2*102+3*6 ,
+ SPI2_CS1_P14_2 = 2*102+4*6 ,
+ SPI2_CS2_P14_6 = 2*102+5*6 ,
+ SPI2_CS3_P14_3 = 2*102+6*6 ,
+ SPI2_CS5_P15_1 = 2*102+8*6 ,
+ SPI2_CS6_P33_13 = 2*102+9*6 ,
+ SPI2_CS7_P20_10 = 2*102+10*6,
+ SPI2_CS8_P20_6 = 2*102+11*6,
+ SPI2_CS9_P20_3 = 2*102+12*6,
+
+ SPI3_CS0_P02_4 = 3*102+3*6 ,
+ SPI3_CS1_P02_0 = 3*102+4*6 , SPI3_CS1_P33_9,
+ SPI3_CS2_P02_1 = 3*102+5*6 , SPI3_CS2_P33_8,
+ SPI3_CS3_P02_2 = 3*102+6*6 ,
+ SPI3_CS4_P02_3 = 3*102+7*6 ,
+ SPI3_CS5_P02_8 = 3*102+8*6 ,
+ SPI3_CS6_P00_8 = 3*102+9*6 ,
+ SPI3_CS7_P00_9 = 3*102+10*6, SPI3_CS7_P33_7,
+ SPI3_CS8_P10_5 = 3*102+11*6,
+ SPI3_CS11_P33_10 = 3*102+14*6,
+ SPI3_CS12_P22_2 = 3*102+15*6,
+ SPI3_CS13_P23_1 = 3*102+16*6,
+
+ SPI_CS_NULL,
+}spi_cs_pin_enum;
+
+//====================================================SPI 基础函数====================================================
+void spi_write_8bit (spi_index_enum spi_n, const uint8 data);
+void spi_write_8bit_array (spi_index_enum spi_n, const uint8 *data, uint32 len);
+
+void spi_write_16bit (spi_index_enum spi_n, const uint16 data);
+void spi_write_16bit_array (spi_index_enum spi_n, const uint16 *data, uint32 len);
+
+void spi_write_8bit_register (spi_index_enum spi_n, const uint8 register_name, const uint8 data);
+void spi_write_8bit_registers (spi_index_enum spi_n, const uint8 register_name, const uint8 *data, uint32 len);
+
+void spi_write_16bit_register (spi_index_enum spi_n, const uint16 register_name, const uint16 data);
+void spi_write_16bit_registers (spi_index_enum spi_n, const uint16 register_name, const uint16 *data, uint32 len);
+
+uint8 spi_read_8bit (spi_index_enum spi_n);
+void spi_read_8bit_array (spi_index_enum spi_n, uint8 *data, uint32 len);
+
+uint16 spi_read_16bit (spi_index_enum spi_n);
+void spi_read_16bit_array (spi_index_enum spi_n, uint16 *data, uint32 len);
+
+uint8 spi_read_8bit_register (spi_index_enum spi_n, const uint8 register_name);
+void spi_read_8bit_registers (spi_index_enum spi_n, const uint8 register_name, uint8 *data, uint32 len);
+
+uint16 spi_read_16bit_register (spi_index_enum spi_n, const uint16 register_name);
+void spi_read_16bit_registers (spi_index_enum spi_n, const uint16 register_name, uint16 *data, uint32 len);
+
+void spi_transfer_8bit (spi_index_enum spi_n, const uint8 *write_buffer, uint8 *read_buffer, uint32 len);
+void spi_transfer_16bit (spi_index_enum spi_n, const uint16 *write_buffer, uint16 *read_buffer, uint32 len);
+
+void spi_init (spi_index_enum spi_n, spi_mode_enum mode, uint32 baud, spi_sck_pin_enum sck_pin, spi_mosi_pin_enum mosi_pin, spi_miso_pin_enum miso_pin, spi_cs_pin_enum cs_pin);
+//====================================================SPI 基础函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_timer.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_timer.c
new file mode 100644
index 0000000..4fd8cd4
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_timer.c
@@ -0,0 +1,74 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_timer
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IfxStm.h"
+#include "IFXSTM_CFG.h"
+#include "zf_driver_timer.h"
+
+static uint32 systick_count[2];
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 systick定时器启动
+// 返回参数 void
+// 使用示例 system_start(); // 启动定时器，记录下当前的时间
+//-------------------------------------------------------------------------------------------------------------------
+void system_start (void)
+{
+ systick_count[(IfxCpu_getCoreId())] = IfxStm_getLower(IfxStm_getAddress((IfxStm_Index)(IfxCpu_getCoreId())));
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获得当前System tick timer的值
+// 返回参数 uint32 返回从开始到现在的时间(单位10ns)
+// 使用示例 uint32 tim = system_getval();
+// 备注信息 在核心0调用此函数则使用STM0模块 核心1则使用STM1模块
+//-------------------------------------------------------------------------------------------------------------------
+uint32 system_getval (void)
+{
+ uint32 time;
+ uint32 stm_clk;
+
+ stm_clk = IfxStm_getFrequency(IfxStm_getAddress((IfxStm_Index)(IfxCpu_getCoreId())));
+
+ time = IfxStm_getLower(IfxStm_getAddress((IfxStm_Index)(IfxCpu_getCoreId())));
+ time = time - systick_count[(IfxCpu_getCoreId())];
+ time = (uint32)((uint64)time * 100000000 / stm_clk);
+
+ return time;
+}
+
+
+
+
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_timer.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_timer.h
new file mode 100644
index 0000000..9ee2b86
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_timer.h
@@ -0,0 +1,52 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_timer
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_timer_h_
+#define _zf_driver_timer_h_
+
+#include "zf_common_typedef.h"
+
+//====================================================定时器 基础函数====================================================
+void system_start (void); // 定时器启动
+uint32 system_getval (void); // 定时器计数值获取
+//====================================================定时器 基础函数====================================================
+
+//====================================================定时器 扩展函数====================================================
+#define system_getval_ms() (system_getval() / 100000) // 获取当前计时时间 单位ms
+#define system_getval_us() (system_getval() / 100 ) // 获取当前计时时间 单位us
+#define system_getval_ns() (system_getval() * 10 ) // 获取当前计时时间 单位ns
+//====================================================定时器 扩展函数====================================================
+
+#endif
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_uart.c b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_uart.c
new file mode 100644
index 0000000..170771d
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_uart.c
@@ -0,0 +1,453 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_uart
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "IFXPORT.h"
+#include "ifxAsclin_reg.h"
+#include "ifxCpu_Irq.h"
+#include "IFXASCLIN_CFG.h"
+#include "SysSe/Bsp/Bsp.h"
+#include "isr_config.h"
+#include "zf_common_debug.h"
+#include "zf_driver_uart.h"
+
+
+// 创建串口handle变量
+IfxAsclin_Asc uart0_handle;
+IfxAsclin_Asc uart1_handle;
+IfxAsclin_Asc uart2_handle;
+IfxAsclin_Asc uart3_handle;
+
+// 创建一个ascConfig的结构体变量，只用于串口初始化
+static IfxAsclin_Asc_Config uart_config;
+
+
+// 创建串口缓存数组
+static uint8 uart0_tx_buffer[UART0_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
+static uint8 uart0_rx_buffer[UART0_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
+
+static uint8 uart1_tx_buffer[UART1_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
+static uint8 uart1_rx_buffer[UART1_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
+
+static uint8 uart2_tx_buffer[UART2_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
+static uint8 uart2_rx_buffer[UART2_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
+
+static uint8 uart3_tx_buffer[UART3_TX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
+static uint8 uart3_rx_buffer[UART3_RX_BUFFER_SIZE + sizeof(Ifx_Fifo) + 8];
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 串口中断优先级设置
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 返回参数 void
+// 使用示例 uart_set_interrupt_priority(UART_1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_set_interrupt_priority (uart_index_enum uartn)
+{
+ switch(uartn)
+ {
+ case UART_0:
+ {
+ uart_config.interrupt.txPriority = UART0_TX_INT_PRIO;
+ uart_config.interrupt.rxPriority = UART0_RX_INT_PRIO;
+ uart_config.interrupt.erPriority = UART0_ER_INT_PRIO;
+ uart_config.interrupt.typeOfService = UART0_INT_SERVICE;
+ }break;
+ case UART_1:
+ {
+ uart_config.interrupt.txPriority = UART1_TX_INT_PRIO;
+ uart_config.interrupt.rxPriority = UART1_RX_INT_PRIO;
+ uart_config.interrupt.erPriority = UART1_ER_INT_PRIO;
+ uart_config.interrupt.typeOfService = UART1_INT_SERVICE;
+ }break;
+ case UART_2:
+ {
+ uart_config.interrupt.txPriority = UART2_TX_INT_PRIO;
+ uart_config.interrupt.rxPriority = UART2_RX_INT_PRIO;
+ uart_config.interrupt.erPriority = UART2_ER_INT_PRIO;
+ uart_config.interrupt.typeOfService = UART2_INT_SERVICE;
+ }break;
+ case UART_3:
+ {
+ uart_config.interrupt.txPriority = UART3_TX_INT_PRIO;
+ uart_config.interrupt.rxPriority = UART3_RX_INT_PRIO;
+ uart_config.interrupt.erPriority = UART3_ER_INT_PRIO;
+ uart_config.interrupt.typeOfService = UART3_INT_SERVICE;
+ }break;
+ default: zf_assert(FALSE);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 设置串口缓冲区
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 返回参数 void
+// 使用示例 uart_set_buffer(UART_1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_set_buffer (uart_index_enum uartn)
+{
+ switch(uartn)
+ {
+ case UART_0:
+ {
+ uart_config.txBuffer = &uart0_tx_buffer;
+ uart_config.rxBuffer = &uart0_rx_buffer;
+ uart_config.txBufferSize = UART0_TX_BUFFER_SIZE;
+ uart_config.rxBufferSize = UART0_RX_BUFFER_SIZE;
+ }break;
+ case UART_1:
+ {
+ uart_config.txBuffer = &uart1_tx_buffer;
+ uart_config.rxBuffer = &uart1_rx_buffer;
+ uart_config.txBufferSize = UART1_TX_BUFFER_SIZE;
+ uart_config.rxBufferSize = UART1_RX_BUFFER_SIZE;
+ }break;
+ case UART_2:
+ {
+ uart_config.txBuffer = &uart2_tx_buffer;
+ uart_config.rxBuffer = &uart2_rx_buffer;
+ uart_config.txBufferSize = UART2_TX_BUFFER_SIZE;
+ uart_config.rxBufferSize = UART2_RX_BUFFER_SIZE;
+ }break;
+ case UART_3:
+ {
+ uart_config.txBuffer = &uart3_tx_buffer;
+ uart_config.rxBuffer = &uart3_rx_buffer;
+ uart_config.txBufferSize = UART3_TX_BUFFER_SIZE;
+ uart_config.rxBufferSize = UART3_RX_BUFFER_SIZE;
+ }break;
+ default: IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 获取串口中断配置信息
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 返回参数 void
+// 使用示例 uart_get_handle(UART_1);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+IfxAsclin_Asc* uart_get_handle (uart_index_enum uartn)
+{
+ IfxAsclin_Asc* uart_handle = NULL;
+ switch(uartn)
+ {
+ case UART_0: uart_handle = &uart0_handle; break;
+ case UART_1: uart_handle = &uart1_handle; break;
+ case UART_2: uart_handle = &uart2_handle; break;
+ case UART_3: uart_handle = &uart3_handle; break;
+ default: IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+ }
+ return uart_handle;
+}
+
+
+void uart_mux (uart_index_enum uartn, uart_tx_pin_enum tx_pin, uart_rx_pin_enum rx_pin, uint32 *set_tx_pin, uint32 *set_rx_pin)
+{
+ switch(uartn)
+ {
+ case UART_0:
+ {
+ if (UART0_TX_P14_0 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin0_TX_P14_0_OUT;
+ else if(UART0_TX_P14_1 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin0_TX_P14_1_OUT;
+ else if(UART0_TX_P15_2 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin0_TX_P15_2_OUT;
+ else if(UART0_TX_P15_3 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin0_TX_P15_3_OUT;
+ else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+ if (UART0_RX_P14_1 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin0_RXA_P14_1_IN;
+ else if(UART0_RX_P15_3 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin0_RXB_P15_3_IN;
+ else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+ }break;
+ case UART_1:
+ {
+ if (UART1_TX_P02_2 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P02_2_OUT;
+ else if(UART1_TX_P11_12 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P11_12_OUT;
+ else if(UART1_TX_P15_0 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P15_0_OUT;
+ else if(UART1_TX_P15_1 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P15_1_OUT;
+ else if(UART1_TX_P15_4 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P15_4_OUT;
+ else if(UART1_TX_P15_5 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P15_5_OUT;
+ else if(UART1_TX_P20_10 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P20_10_OUT;
+ else if(UART1_TX_P33_12 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P33_12_OUT;
+ else if(UART1_TX_P33_13 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin1_TX_P33_13_OUT;
+ else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+ if (UART1_RX_P15_1 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin1_RXA_P15_1_IN;
+ else if(UART1_RX_P15_5 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin1_RXB_P15_5_IN;
+ else if(UART1_RX_P20_9 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin1_RXC_P20_9_IN;
+ else if(UART1_RX_P11_10 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin1_RXE_P11_10_IN;
+ else if(UART1_RX_P33_13 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin1_RXF_P33_13_IN;
+ else if(UART1_RX_P02_3 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin1_RXG_P02_3_IN;
+ else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+ }break;
+ case UART_2:
+ {
+ if (UART2_TX_P02_0 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin2_TX_P02_0_OUT;
+ else if(UART2_TX_P10_5 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin2_TX_P10_5_OUT;
+ else if(UART2_TX_P14_2 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin2_TX_P14_2_OUT;
+ else if(UART2_TX_P14_3 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin2_TX_P14_3_OUT;
+ else if(UART2_TX_P33_8 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin2_TX_P33_8_OUT;
+ else if(UART2_TX_P33_9 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin2_TX_P33_9_OUT;
+ else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+ if (UART2_RX_P14_3 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin2_RXA_P14_3_IN;
+ else if(UART2_RX_P02_1 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin2_RXB_P02_1_IN;
+ else if(UART2_RX_P10_6 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin2_RXD_P10_6_IN;
+ else if(UART2_RX_P33_8 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin2_RXE_P33_8_IN;
+ else if(UART2_RX_P02_0 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin2_RXG_P02_0_IN;
+
+ else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+ }break;
+ case UART_3:
+ {
+ if (UART3_TX_P00_0 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin3_TX_P00_0_OUT;
+ else if(UART3_TX_P00_1 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin3_TX_P00_1_OUT;
+ else if(UART3_TX_P15_6 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin3_TX_P15_6_OUT;
+ else if(UART3_TX_P15_7 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin3_TX_P15_7_OUT;
+ else if(UART3_TX_P20_0 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin3_TX_P20_0_OUT;
+ else if(UART3_TX_P20_3 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin3_TX_P20_3_OUT;
+ else if(UART3_TX_P21_7 == tx_pin) *set_tx_pin = (uint32)&IfxAsclin3_TX_P21_7_OUT;
+ else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+ if (UART3_RX_P15_7 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin3_RXA_P15_7_IN;
+ else if(UART3_RX_P20_3 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin3_RXC_P20_3_IN;
+ else if(UART3_RX_P00_1 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin3_RXE_P00_1_IN;
+ else if(UART3_RX_P21_6 == rx_pin) *set_rx_pin = (uint32)&IfxAsclin3_RXF_P21_6_IN;
+ else IFX_ASSERT(IFX_VERBOSE_LEVEL_ERROR, FALSE);
+
+ }break;
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 串口等待发送
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 参数说明 dat 需要发送的字节
+// 返回参数 void
+// 使用示例 uart_write_byte_wait(UART_1, 0xA5); // 往串口1的发送缓冲区写入0xA5，并等待数据发送完成
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_write_byte_wait (uart_index_enum uart_n, const uint8 dat)
+{
+ Ifx_SizeT count = 1;
+ (void)IfxAsclin_Asc_write(uart_get_handle(uart_n), &dat, &count, TIME_INFINITE);
+ while(TRUE == uart_get_handle(uart_n)->txInProgress);
+}
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 串口发送写入
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 参数说明 dat 需要发送的字节
+// 返回参数 void
+// 使用示例 uart_write_byte(UART_1, 0xA5); // 往串口1的发送缓冲区写入0xA5，写入后仍然会发送数据，但是会减少CPU在串口的执行时
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_write_byte (uart_index_enum uart_n, const uint8 dat)
+{
+ Ifx_SizeT count = 1;
+ (void)IfxAsclin_Asc_write(uart_get_handle(uart_n), &dat, &count, TIME_INFINITE);
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 串口发送数组
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 参数说明 *buff 要发送的数组地址
+// 参数说明 len 发送长度
+// 返回参数 void
+// 使用示例 uart_write_buffer(UART_1, &a[0], 5);
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_write_buffer (uart_index_enum uart_n, const uint8 *buff, uint32 len)
+{
+ while(len)
+ {
+ uart_write_byte(uart_n, *buff);
+ len--;
+ buff++;
+ }
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 串口发送字符串
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 参数说明 *str 要发送的字符串地址
+// 返回参数 void
+// 使用示例 uart_write_string(UART_1, "seekfree");
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_write_string (uart_index_enum uart_n, const char *str)
+{
+ while(*str)
+ {
+ uart_write_byte(uart_n, *str++);
+ }
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 读取串口接收的数据（whlie等待）
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 参数说明 *dat 接收数据的地址
+// 返回参数 uint8 接收的数据
+// 使用示例 uint8 dat = uart_read_byte(UART_1); // 接收 UART_1 数据 存在在 dat 变量里
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 uart_read_byte (uart_index_enum uart_n)
+{
+ while(!IfxAsclin_Asc_getReadCount(uart_get_handle(uart_n)));
+ return (uint8)IfxAsclin_Asc_blockingRead(uart_get_handle(uart_n));
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 读取串口接收的数据（查询接收）
+// 参数说明 uart_n 串口模块号 参照 zf_driver_uart.h 内 uart_index_enum 枚举体定义
+// 参数说明 *dat 接收数据的地址
+// 返回参数 uint8 1：接收成功 0：未接收到数据
+// 使用示例 uint8 dat; uart_query_byte(UART_1, &dat); // 接收 UART_1 数据 存在在 dat 变量里
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+uint8 uart_query_byte (uart_index_enum uart_n, uint8 *dat)
+{
+ uint8 return_num = 0;
+ if(IfxAsclin_Asc_getReadCount(uart_get_handle(uart_n)) >0)
+ {
+ *dat = IfxAsclin_Asc_blockingRead(uart_get_handle(uart_n));
+ return_num = 1;
+ }
+ return return_num;
+}
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 串口发送中断设置
+// 参数说明 uart_n 串口模块号
+// 参数说明 status 1：打开中断 0：关闭中断
+// 返回参数 void
+// 使用示例 uart_tx_interrupt(UART_1, 1); // 打开串口1发送中断
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_tx_interrupt (uart_index_enum uart_n, uint32 status)
+{
+ Ifx_ASCLIN *asclinSFR = uart_config.asclin;
+ volatile Ifx_SRC_SRCR *src;
+ volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uart_n);
+
+ IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); // 初始化化配置结构体
+ src = IfxAsclin_getSrcPointerTx(asclinSFR);
+ IfxAsclin_enableTxFifoFillLevelFlag(asclinSFR, (boolean)status);
+ if(status)
+ {
+ IfxSrc_enable(src);
+ }
+ else
+ {
+ IfxSrc_disable(src);
+ }
+ IfxAsclin_enableTxFifoOutlet(asclinSFR, (boolean)status);
+}
+
+
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 串口接收中断设置
+// 参数说明 uart_n 串口模块号
+// 参数说明 status 1：打开中断 0：关闭中断
+// 返回参数 void
+// 使用示例 uart_rx_interrupt(UART_1, 1); // 打开串口1接收中断
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_rx_interrupt (uart_index_enum uart_n, uint32 status)
+{
+ Ifx_ASCLIN *asclinSFR = uart_config.asclin;
+ volatile Ifx_SRC_SRCR *src;
+ volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uart_n);
+
+ IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); // 初始化化配置结构体
+ src = IfxAsclin_getSrcPointerRx(asclinSFR);
+ IfxAsclin_enableRxFifoFillLevelFlag(asclinSFR, (boolean)status);
+ if(status)
+ {
+ IfxSrc_enable(src);
+ }
+ else
+ {
+ IfxSrc_disable(src);
+ }
+ IfxAsclin_enableRxFifoInlet(asclinSFR, (boolean)status);
+
+}
+//-------------------------------------------------------------------------------------------------------------------
+// 函数简介 串口初始化
+// 参数说明 uartn 串口模块号(UART_0,UART_1,UART_2,UART_3)
+// 参数说明 baud 串口波特率
+// 参数说明 tx_pin 串口发送引脚
+// 参数说明 rx_pin 串口接收引脚
+// 返回参数 uint32 实际波特率
+// 使用示例 uart_init(UART_0,115200,UART0_TX_P14_0,UART0_RX_P14_1); // 初始化串口0 波特率115200 发送引脚使用P14_0 接收引脚使用P14_1
+// 备注信息
+//-------------------------------------------------------------------------------------------------------------------
+void uart_init (uart_index_enum uart_n, uint32 baud, uart_tx_pin_enum tx_pin, uart_rx_pin_enum rx_pin)
+{
+
+
+ boolean interrupt_state = disableInterrupts();
+
+ volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uart_n);
+
+ IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); // 初始化化配置结构体
+
+ uart_set_buffer(uart_n); // 设置缓冲区
+
+ uart_set_interrupt_priority(uart_n); // 设置中断优先级
+
+ uart_config.baudrate.prescaler = 4;
+ uart_config.baudrate.baudrate = (float32)baud;
+ uart_config.baudrate.oversampling = IfxAsclin_OversamplingFactor_8;
+
+ IfxAsclin_Asc_Pins pins; // 设置引脚
+ pins.cts = NULL;
+ pins.rts = NULL;
+ uart_mux(uart_n, tx_pin, rx_pin, (uint32 *)&pins.tx, (uint32 *)&pins.rx);
+ pins.rxMode = IfxPort_InputMode_pullUp;
+ pins.txMode = IfxPort_OutputMode_pushPull;
+ pins.pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
+ uart_config.pins = &pins;
+
+ IfxAsclin_Asc_initModule(uart_get_handle(uart_n), &uart_config);
+
+ restoreInterrupts(interrupt_state);
+}
diff --git a/Example/E15_fft_demo/libraries/zf_driver/zf_driver_uart.h b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_uart.h
new file mode 100644
index 0000000..0fe4a9b
--- /dev/null
+++ b/Example/E15_fft_demo/libraries/zf_driver/zf_driver_uart.h
@@ -0,0 +1,158 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 zf_driver_uart
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _zf_driver_uart_h_
+#define _zf_driver_uart_h_
+
+#include "ifxAsclin_Asc.h"
+#include "zf_common_typedef.h"
+
+#define UART0_TX_BUFFER_SIZE 256 // 定义串口0发送缓冲区大小
+#define UART0_RX_BUFFER_SIZE 16 // 定义串口0接收缓冲区大小
+
+#define UART1_TX_BUFFER_SIZE 256
+#define UART1_RX_BUFFER_SIZE 16
+
+#define UART2_TX_BUFFER_SIZE 256
+#define UART2_RX_BUFFER_SIZE 16
+
+#define UART3_TX_BUFFER_SIZE 256
+#define UART3_RX_BUFFER_SIZE 16
+
+
+typedef enum // 枚举串口引脚 此枚举定义不允许用户修改
+{
+ UART0_TX_P14_0, // 串口0 发送引脚可选范围
+ UART0_TX_P14_1,
+ UART0_TX_P15_2,
+ UART0_TX_P15_3,
+
+ UART1_TX_P02_2, // 串口1 发送引脚可选范围
+ UART1_TX_P11_12,
+ UART1_TX_P15_0,
+ UART1_TX_P15_1,
+ UART1_TX_P15_4,
+ UART1_TX_P15_5,
+ UART1_TX_P20_10,
+ UART1_TX_P33_12,
+ UART1_TX_P33_13,
+
+ UART2_TX_P02_0, // 串口2 发送引脚可选范围
+ UART2_TX_P10_5,
+ UART2_TX_P14_2,
+ UART2_TX_P14_3,
+ UART2_TX_P33_8,
+ UART2_TX_P33_9,
+
+ UART3_TX_P00_0, // 串口3 发送引脚可选范围
+ UART3_TX_P00_1,
+ UART3_TX_P15_6,
+ UART3_TX_P15_7,
+ UART3_TX_P20_0,
+ UART3_TX_P20_3,
+ UART3_TX_P21_7,
+}uart_tx_pin_enum;
+
+
+typedef enum // 枚举串口引脚 此枚举定义不允许用户修改
+{
+
+ UART0_RX_P14_1, // 串口0 接收引脚可选范围
+ UART0_RX_P15_3,
+
+ UART1_RX_P02_3, // 串口1 接收引脚可选范围
+ UART1_RX_P11_10,
+ UART1_RX_P15_1,
+ UART1_RX_P15_5,
+ UART1_RX_P20_9,
+ UART1_RX_P33_13,
+
+ UART2_RX_P02_0, // 串口2 接收引脚可选范围
+ UART2_RX_P02_1,
+ UART2_RX_P10_6,
+ UART2_RX_P14_3,
+ UART2_RX_P33_8,
+
+ UART3_RX_P00_1, // 串口3 接收引脚可选范围
+ UART3_RX_P15_7,
+ UART3_RX_P20_3,
+ UART3_RX_P21_6,
+}uart_rx_pin_enum;
+
+
+typedef enum // 枚举串口号 此枚举定义不允许用户修改
+{
+ UART_0,
+ UART_1,
+ UART_2,
+ UART_3,
+}uart_index_enum;
+
+//创建串口handle变量
+extern IfxAsclin_Asc uart0_handle;
+extern IfxAsclin_Asc uart1_handle;
+extern IfxAsclin_Asc uart2_handle;
+extern IfxAsclin_Asc uart3_handle;
+
+//====================================================串口 基础函数====================================================
+void uart_write_byte_wait (uart_index_enum uart_n, const uint8 dat);
+void uart_write_byte (uart_index_enum uartn, const uint8 dat);
+void uart_write_buffer (uart_index_enum uartn, const uint8 *buff, uint32 len);
+void uart_write_string (uart_index_enum uartn, const char *str);
+
+uint8 uart_read_byte (uart_index_enum uartn);
+uint8 uart_query_byte (uart_index_enum uartn, uint8 *dat);
+
+void uart_tx_interrupt (uart_index_enum uartn, uint32 status);
+void uart_rx_interrupt (uart_index_enum uartn, uint32 status);
+
+void uart_init (uart_index_enum uartn, uint32 baud, uart_tx_pin_enum tx_pin, uart_rx_pin_enum rx_pin);
+//====================================================串口 基础函数====================================================
+
+//=================================================兼容旧版本开源库接口名称=================================================
+#ifdef COMPATIBLE_WITH_OLDER_VERSIONS
+#define uart_putchar(uart_n, dat) (uart_write_byte((uart_n), (dat)))
+#define uart_putbuff(uart_n, buff, len) (uart_write_buffer((uart_n), (buff), (len)))
+#define uart_putstr(uart_n, str) (uart_write_string((uart_n), (str)))
+
+#define uart_getchar(uart_n, dat) (*(dat) = uart_read_byte((uart_n)))
+#define uart_query(uart_n, dat) (uart_query_byte((uart_n), (dat)))
+
+#define uart_tx_irq(uart_n, status) (uart_tx_interrupt((uart_n), (status)))
+#define uart_rx_irq(uart_n, status) (uart_rx_interrupt((uart_n), (status)))
+#endif
+//=================================================兼容旧版本开源库接口名称=================================================
+
+#endif
diff --git a/Example/E15_fft_demo/user/cpu0_main.c b/Example/E15_fft_demo/user/cpu0_main.c
new file mode 100644
index 0000000..c73d005
--- /dev/null
+++ b/Example/E15_fft_demo/user/cpu0_main.c
@@ -0,0 +1,95 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 cpu0_main
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+#include "zf_common_headfile.h"
+#include "SysSe/Math/Ifx_FftF32.h"
+#pragma section all "cpu0_dsram"
+// 将本语句与#pragma section all restore语句之间的全局变量都放在CPU0的RAM中
+
+
+#define SAMPLE_FREQUENCY (0.01) // 定义采样频率 单位： 秒
+#define SIZE_N (2000) // 定义采集数量
+
+
+cfloat32 fft_in [SIZE_N];
+cfloat32 fft_out[SIZE_N];
+uint32 use_time;
+
+// 工程导入到软件之后，应该选中工程然后点击refresh刷新一下之后再编译
+// 工程默认设置为关闭优化，可以自己右击工程选择properties->C/C++ Build->Setting
+// 然后在右侧的窗口中找到C/C++ Compiler->Optimization->Optimization level处设置优化等级
+// 一般默认新建立的工程都会默认开2级优化，因此大家也可以设置为2级优化
+
+// 对于TC系列默认是不支持中断嵌套的，希望支持中断嵌套需要在中断内使用 interrupt_global_enable(0); 来开启中断嵌套
+// 简单点说实际上进入中断后TC系列的硬件自动调用了 interrupt_global_disable(); 来拒绝响应任何的中断，因此需要我们自己手动调用 interrupt_global_enable(0); 来开启中断的响应。
+
+float x1, x2;
+
+// **************************** 代码区域 ****************************
+int core0_main(void)
+{
+ clock_init(); // 获取时钟频率<务必保留>
+ debug_init(); // 初始化默认调试串口
+ // 此处编写用户代码 例如外设初始化代码等
+
+ for (int i = 0; i < SIZE_N; i ++) // 生成输入信号
+ {
+ // 计算 x
+ x1 = 3 * IFX_PI * (float)i * SAMPLE_FREQUENCY;
+ x2 = (7 * IFX_PI * (float)i * SAMPLE_FREQUENCY) + (IFX_PI / 2);
+
+ // 代入x计算y
+ // 函数为 y = 1024*(cos(3 * pi * x)) + 512 * (cos(7 * pi * x) + pi / 2) + 2047
+ fft_in[i].real = (float32)(1024 * cosf(x1) + 512 * cosf(x2) + 2047);
+ fft_in[i].imag = 0.0;
+ }
+
+ // 此处编写用户代码 例如外设初始化代码等
+ cpu_wait_event_ready(); // 等待所有核心初始化完毕
+ while (TRUE)
+ {
+ // 此处编写需要循环执行的代码
+
+ system_start(); // 开始计时
+ Ifx_FftF32_radix2(fft_out, fft_in, SIZE_N); // 进行FFT运算 Ifx_FftF32_radix2I 为IFT（FFT逆变换）运算
+ use_time = system_getval_us(); // 获取计时时间
+ printf("use_time: %ldus\n", use_time); // 将结果通过串口打印, 打印fft一次耗时多久
+
+ // 此处编写需要循环执行的代码
+ }
+}
+
+#pragma section all restore
+// **************************** 代码区域 ****************************
+
diff --git a/Example/E15_fft_demo/user/cpu0_main.h b/Example/E15_fft_demo/user/cpu0_main.h
new file mode 100644
index 0000000..6a761dd
--- /dev/null
+++ b/Example/E15_fft_demo/user/cpu0_main.h
@@ -0,0 +1,85 @@
+/**
+ * \file Cpu0_Main.h
+ * \brief System initialization and main program implementation.
+ *
+ * \version iLLD_Demos_1_0_1_11_0
+ * \copyright Copyright (c) 2014 Infineon Technologies AG. All rights reserved.
+ *
+ *
+ * IMPORTANT NOTICE
+ *
+ *
+ * Use of this file is subject to the terms of use agreed between (i) you or
+ * the company in which ordinary course of business you are acting and (ii)
+ * Infineon Technologies AG or its licensees. If and as long as no such
+ * terms of use are agreed, use of this file is subject to following:
+
+
+ * Boost Software License - Version 1.0 - August 17th, 2003
+
+ * Permission is hereby granted, free of charge, to any person or
+ * organization obtaining a copy of the software and accompanying
+ * documentation covered by this license (the "Software") to use, reproduce,
+ * display, distribute, execute, and transmit the Software, and to prepare
+ * derivative works of the Software, and to permit third-parties to whom the
+ * Software is furnished to do so, all subject to the following:
+
+ * The copyright notices in the Software and this entire statement, including
+ * the above license grant, this restriction and the following disclaimer, must
+ * be included in all copies of the Software, in whole or in part, and all
+ * derivative works of the Software, unless such copies or derivative works are
+ * solely in the form of machine-executable object code generated by a source
+ * language processor.
+
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT
+ * SHALL THE COPYRIGHT HOLDERS OR ANYONE DISTRIBUTING THE SOFTWARE BE LIABLE
+ * FOR ANY DAMAGES OR OTHER LIABILITY, WHETHER IN CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+
+ *
+ * \defgroup IfxLld_Demo_STMDemo_SrcDoc Source code documentation
+ * \ingroup IfxLld_Demo_STMDemo
+ *
+ */
+
+#ifndef CPU0_MAIN_H
+#define CPU0_MAIN_H
+
+/******************************************************************************/
+/*----------------------------------Includes----------------------------------*/
+/******************************************************************************/
+
+
+#include "Cpu/Std/Ifx_Types.h"
+/******************************************************************************/
+/*-----------------------------------Macros-----------------------------------*/
+/******************************************************************************/
+
+/******************************************************************************/
+/*------------------------------Type Definitions------------------------------*/
+/******************************************************************************/
+
+typedef struct
+{
+ float32 sysFreq; /**< \brief Actual SPB frequency */
+ float32 cpuFreq; /**< \brief Actual CPU frequency */
+ float32 pllFreq; /**< \brief Actual PLL frequency */
+ float32 stmFreq; /**< \brief Actual STM frequency */
+} AppInfo;
+
+/** \brief Application information */
+typedef struct
+{
+ AppInfo info; /**< \brief Info object */
+} App_Cpu0;
+
+/******************************************************************************/
+/*------------------------------Global variables------------------------------*/
+/******************************************************************************/
+
+IFX_EXTERN App_Cpu0 g_AppCpu0;
+
+#endif
diff --git a/Example/E15_fft_demo/user/cpu1_main.c b/Example/E15_fft_demo/user/cpu1_main.c
new file mode 100644
index 0000000..1fad39d
--- /dev/null
+++ b/Example/E15_fft_demo/user/cpu1_main.c
@@ -0,0 +1,72 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 cpu1_main
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "zf_common_headfile.h"
+#pragma section all "cpu1_dsram"
+// 将本语句与#pragma section all restore语句之间的全局变量都放在CPU1的RAM中
+
+
+// 工程导入到软件之后，应该选中工程然后点击refresh刷新一下之后再编译
+// 工程默认设置为关闭优化，可以自己右击工程选择properties->C/C++ Build->Setting
+// 然后在右侧的窗口中找到C/C++ Compiler->Optimization->Optimization level处设置优化等级
+// 一般默认新建立的工程都会默认开2级优化，因此大家也可以设置为2级优化
+
+// 对于TC系列默认是不支持中断嵌套的，希望支持中断嵌套需要在中断内使用 enableInterrupts(); 来开启中断嵌套
+// 简单点说实际上进入中断后TC系列的硬件自动调用了 disableInterrupts(); 来拒绝响应任何的中断，因此需要我们自己手动调用 enableInterrupts(); 来开启中断的响应。
+
+
+// **************************** 代码区域 ****************************
+void core1_main(void)
+{
+ disable_Watchdog(); // 关闭看门狗
+ interrupt_global_enable(0); // 打开全局中断
+ // 此处编写用户代码 例如外设初始化代码等
+
+
+
+
+ // 此处编写用户代码 例如外设初始化代码等
+ cpu_wait_event_ready(); // 等待所有核心初始化完毕
+ while (TRUE)
+ {
+ // 此处编写需要循环执行的代码
+
+
+
+
+ // 此处编写需要循环执行的代码
+ }
+}
+#pragma section all restore
diff --git a/Example/E15_fft_demo/user/isr.c b/Example/E15_fft_demo/user/isr.c
new file mode 100644
index 0000000..a33da8c
--- /dev/null
+++ b/Example/E15_fft_demo/user/isr.c
@@ -0,0 +1,274 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 isr
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#include "isr_config.h"
+#include "isr.h"
+
+// **************************** PIT中断函数 ****************************
+IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ pit_clear_flag(CCU60_CH0);
+
+
+}
+
+
+IFX_INTERRUPT(cc60_pit_ch1_isr, 0, CCU6_0_CH1_ISR_PRIORITY)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ pit_clear_flag(CCU60_CH1);
+
+
+
+
+}
+
+IFX_INTERRUPT(cc61_pit_ch0_isr, 0, CCU6_1_CH0_ISR_PRIORITY)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ pit_clear_flag(CCU61_CH0);
+
+
+
+
+}
+
+IFX_INTERRUPT(cc61_pit_ch1_isr, 0, CCU6_1_CH1_ISR_PRIORITY)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ pit_clear_flag(CCU61_CH1);
+ tsl1401_collect_pit_handler(); // 线阵CCD采集
+
+
+
+
+}
+// **************************** PIT中断函数 ****************************
+
+
+// **************************** 外部中断函数 ****************************
+IFX_INTERRUPT(exti_ch0_ch4_isr, 0, EXTI_CH0_CH4_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ if(exti_flag_get(ERU_CH0_REQ0_P15_4)) // 通道0中断
+ {
+ exti_flag_clear(ERU_CH0_REQ0_P15_4);
+
+ }
+
+ if(exti_flag_get(ERU_CH4_REQ13_P15_5)) // 通道4中断
+ {
+ exti_flag_clear(ERU_CH4_REQ13_P15_5);
+
+
+
+
+ }
+}
+
+IFX_INTERRUPT(exti_ch1_ch5_isr, 0, EXTI_CH1_CH5_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ if(exti_flag_get(ERU_CH1_REQ10_P14_3)) // 通道1中断
+ {
+ exti_flag_clear(ERU_CH1_REQ10_P14_3);
+
+
+
+ }
+
+ if(exti_flag_get(ERU_CH5_REQ1_P15_8)) // 通道5中断
+ {
+ exti_flag_clear(ERU_CH5_REQ1_P15_8);
+
+
+ }
+}
+
+// 由于摄像头pclk引脚默认占用了 2通道，用于触发DMA，因此这里不再定义中断函数
+// IFX_INTERRUPT(exti_ch2_ch6_isr, 0, EXTI_CH2_CH6_INT_PRIO)
+// {
+// interrupt_global_enable(0); // 开启中断嵌套
+// if(exti_flag_get(ERU_CH2_REQ7_P00_4)) // 通道2中断
+// {
+// exti_flag_clear(ERU_CH2_REQ7_P00_4);
+// }
+// if(exti_flag_get(ERU_CH6_REQ9_P20_0)) // 通道6中断
+// {
+// exti_flag_clear(ERU_CH6_REQ9_P20_0);
+// }
+// }
+
+IFX_INTERRUPT(exti_ch3_ch7_isr, 0, EXTI_CH3_CH7_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ if(exti_flag_get(ERU_CH3_REQ6_P02_0)) // 通道3中断
+ {
+ exti_flag_clear(ERU_CH3_REQ6_P02_0);
+ camera_vsync_handler(); // 摄像头触发采集统一回调函数
+ }
+ if(exti_flag_get(ERU_CH7_REQ16_P15_1)) // 通道7中断
+ {
+ exti_flag_clear(ERU_CH7_REQ16_P15_1);
+
+
+
+
+ }
+}
+// **************************** 外部中断函数 ****************************
+
+
+// **************************** DMA中断函数 ****************************
+IFX_INTERRUPT(dma_ch5_isr, 0, DMA_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ camera_dma_handler(); // 摄像头采集完成统一回调函数
+}
+// **************************** DMA中断函数 ****************************
+
+
+// **************************** 串口中断函数 ****************************
+IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrTransmit(&uart0_handle);
+
+
+}
+IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrReceive(&uart0_handle);
+
+#if DEBUG_UART_USE_INTERRUPT // 如果开启 debug 串口中断
+ debug_interrupr_handler(); // 调用 debug 串口接收处理函数 数据会被 debug 环形缓冲区读取
+#endif // 如果修改了 DEBUG_UART_INDEX 那这段代码需要放到对应的串口中断去
+
+}
+IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrError(&uart0_handle);
+
+
+
+}
+
+// 串口1默认连接到摄像头配置串口
+IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrTransmit(&uart1_handle);
+
+
+
+
+}
+IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrReceive(&uart1_handle);
+ camera_uart_handler(); // 摄像头参数配置统一回调函数
+}
+IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrError(&uart1_handle);
+
+
+
+
+}
+
+
+// 串口2默认连接到无线转串口模块
+IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrTransmit(&uart2_handle);
+
+
+
+
+
+}
+IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrReceive(&uart2_handle);
+ wireless_module_uart_handler(); // 无线模块统一回调函数
+
+}
+IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrError(&uart2_handle);
+
+}
+
+
+
+IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrTransmit(&uart3_handle);
+
+
+
+
+}
+IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrReceive(&uart3_handle);
+
+ gps_uart_callback(); // GPS 串口回调函数
+
+
+
+}
+IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
+{
+ interrupt_global_enable(0); // 开启中断嵌套
+ IfxAsclin_Asc_isrError(&uart3_handle);
+
+
+
+
+
+}
+// **************************** 串口中断函数 ****************************
diff --git a/Example/E15_fft_demo/user/isr.h b/Example/E15_fft_demo/user/isr.h
new file mode 100644
index 0000000..14367d3
--- /dev/null
+++ b/Example/E15_fft_demo/user/isr.h
@@ -0,0 +1,52 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 isr
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _isr_h
+#define _isr_h
+
+#include "zf_common_headfile.h"
+
+
+
+
+
+
+
+
+
+
+
+#endif
+
diff --git a/Example/E15_fft_demo/user/isr_config.h b/Example/E15_fft_demo/user/isr_config.h
new file mode 100644
index 0000000..ce77b6b
--- /dev/null
+++ b/Example/E15_fft_demo/user/isr_config.h
@@ -0,0 +1,115 @@
+/*********************************************************************************************************************
+* TC264 Opensourec Library 即（TC264 开源库）是一个基于官方 SDK 接口的第三方开源库
+* Copyright (c) 2022 SEEKFREE 逐飞科技
+*
+* 本文件是 TC264 开源库的一部分
+*
+* TC264 开源库 是免费软件
+* 您可以根据自由软件基金会发布的 GPL（GNU General Public License，即 GNU通用公共许可证）的条款
+* 即 GPL 的第3版（即 GPL3.0）或（您选择的）任何后来的版本，重新发布和/或修改它
+*
+* 本开源库的发布是希望它能发挥作用，但并未对其作任何的保证
+* 甚至没有隐含的适销性或适合特定用途的保证
+* 更多细节请参见 GPL
+*
+* 您应该在收到本开源库的同时收到一份 GPL 的副本
+* 如果没有，请参阅
+*
+* 额外注明：
+* 本开源库使用 GPL3.0 开源许可证协议 以上许可申明为译文版本
+* 许可申明英文版在 libraries/doc 文件夹下的 GPL3_permission_statement.txt 文件中
+* 许可证副本在 libraries 文件夹下 即该文件夹下的 LICENSE 文件
+* 欢迎各位使用并传播本程序 但修改内容时必须保留逐飞科技的版权声明（即本声明）
+*
+* 文件名称 isr_config
+* 公司名称 成都逐飞科技有限公司
+* 版本信息 查看 libraries/doc 文件夹内 version 文件 版本说明
+* 开发环境 ADS v1.8.0
+* 适用平台 TC264D
+* 店铺链接 https://seekfree.taobao.com/
+*
+* 修改记录
+* 日期 作者 备注
+* 2022-09-15 pudding first version
+********************************************************************************************************************/
+
+#ifndef _isr_config_h
+#define _isr_config_h
+
+
+
+//======================================================特别注意====================================================
+// 中断优先级不能设置为相同值，所有中断优先级都必须设置为不一样的值
+//======================================================特别注意====================================================
+//======================================================特别注意====================================================
+// 中断优先级不能设置为相同值，所有中断优先级都必须设置为不一样的值
+//======================================================特别注意====================================================
+//======================================================特别注意====================================================
+// 中断优先级不能设置为相同值，所有中断优先级都必须设置为不一样的值
+//======================================================特别注意====================================================
+
+// ISR_PRIORITY： TC264具有255个中断优先级可以设置 1-255，0优先级表示不开启中断，255为最高优先级
+// INT_SERVICE： 宏定义决定中断由谁处理，也称为服务提供者（在TC264中，中断被叫做服务），可设置范围IfxSrc_Tos_cpu0 IfxSrc_Tos_cpu1 IfxSrc_Tos_dma 不可设置为其他值
+// 如果INT_SERVICE设置为IfxSrc_Tos_dma的话，ISR_PRIORITY的可设置范围则是0-47。
+
+//================================================PIT中断参数相关定义===============================================
+#define CCU6_0_CH0_INT_SERVICE IfxSrc_Tos_cpu0 // 定义CCU6_0 PIT通道0中断服务类型，即中断是由谁响应处理 IfxSrc_Tos_cpu0 IfxSrc_Tos_cpu1 IfxSrc_Tos_dma 不可设置为其他值
+#define CCU6_0_CH0_ISR_PRIORITY 30 // 定义CCU6_0 PIT通道0中断优先级 优先级范围1-255 越大优先级越高 与平时使用的单片机不一样
+
+#define CCU6_0_CH1_INT_SERVICE IfxSrc_Tos_cpu0
+#define CCU6_0_CH1_ISR_PRIORITY 31
+
+#define CCU6_1_CH0_INT_SERVICE IfxSrc_Tos_cpu0
+#define CCU6_1_CH0_ISR_PRIORITY 32
+
+#define CCU6_1_CH1_INT_SERVICE IfxSrc_Tos_cpu0
+#define CCU6_1_CH1_ISR_PRIORITY 33
+
+
+
+//================================================GPIO中断参数相关定义===============================================
+// 通道0与通道4是公用一个中断函数 在中断内部通过标志位判断是谁触发的中断
+#define EXTI_CH0_CH4_INT_SERVICE IfxSrc_Tos_cpu0 // 定义ERU通道0和通道4中断服务类型，即中断是由谁响应处理 IfxSrc_Tos_cpu0 IfxSrc_Tos_cpu1 IfxSrc_Tos_dma 不可设置为其他值
+#define EXTI_CH0_CH4_INT_PRIO 40 // 定义ERU通道0和通道4中断优先级 优先级范围1-255 越大优先级越高 与平时使用的单片机不一样
+
+// 通道1与通道5是公用一个中断函数 在中断内部通过标志位 判断是谁触发的中断
+#define EXTI_CH1_CH5_INT_SERVICE IfxSrc_Tos_cpu0 // 定义ERU通道1和通道5中断服务类型，同上
+#define EXTI_CH1_CH5_INT_PRIO 41 // 定义ERU通道1和通道5中断优先级 同上
+
+// 通道2与通道6是公用一个中断函数 在中断内部通过标志位 判断是谁触发的中断
+#define EXTI_CH2_CH6_INT_SERVICE IfxSrc_Tos_dma // 定义ERU通道2和通道6中断服务类型，同上
+#define EXTI_CH2_CH6_INT_PRIO 5 // 定义ERU通道2和通道6中断优先级 可设置范围为0-47
+
+// 通道3与通道7是公用一个中断函数 在中断内部通过标志位 判断是谁触发的中断
+#define EXTI_CH3_CH7_INT_SERVICE IfxSrc_Tos_cpu0 // 定义ERU通道3和通道7中断服务类型，同上
+#define EXTI_CH3_CH7_INT_PRIO 43 // 定义ERU通道3和通道7中断优先级 同上
+
+
+//===================================================DMA中断参数相关定义===============================================
+#define DMA_INT_SERVICE IfxSrc_Tos_cpu0 // ERU触发DMA中断服务类型，即中断是由谁响应处理 IfxSrc_Tos_cpu0 IfxSrc_Tos_cpu1 IfxSrc_Tos_dma 不可设置为其他值
+#define DMA_INT_PRIO 60 // ERU触发DMA中断优先级 优先级范围1-255 越大优先级越高 与平时使用的单片机不一样
+
+
+//===================================================串口中断参数相关定义===============================================
+#define UART0_INT_SERVICE IfxSrc_Tos_cpu0 // 定义串口0中断服务类型，即中断是由谁响应处理 IfxSrc_Tos_cpu0 IfxSrc_Tos_cpu1 IfxSrc_Tos_dma 不可设置为其他值
+#define UART0_TX_INT_PRIO 11 // 定义串口0发送中断优先级 优先级范围1-255 越大优先级越高 与平时使用的单片机不一样
+#define UART0_RX_INT_PRIO 10 // 定义串口0接收中断优先级 优先级范围1-255 越大优先级越高 与平时使用的单片机不一样
+#define UART0_ER_INT_PRIO 12 // 定义串口0错误中断优先级 优先级范围1-255 越大优先级越高 与平时使用的单片机不一样
+
+#define UART1_INT_SERVICE IfxSrc_Tos_cpu0
+#define UART1_TX_INT_PRIO 13
+#define UART1_RX_INT_PRIO 14
+#define UART1_ER_INT_PRIO 15
+
+#define UART2_INT_SERVICE IfxSrc_Tos_cpu0
+#define UART2_TX_INT_PRIO 16
+#define UART2_RX_INT_PRIO 17
+#define UART2_ER_INT_PRIO 18
+
+#define UART3_INT_SERVICE IfxSrc_Tos_cpu0
+#define UART3_TX_INT_PRIO 19
+#define UART3_RX_INT_PRIO 20
+#define UART3_ER_INT_PRIO 21
+
+
+#endif
diff --git a/Example/E15_fft_demo/鍒犻櫎涓存椂鏂囦欢.bat b/Example/E15_fft_demo/鍒犻櫎涓存椂鏂囦欢.bat
new file mode 100644
index 0000000..fa499b1
--- /dev/null
+++ b/Example/E15_fft_demo/鍒犻櫎涓存椂鏂囦欢.bat
@@ -0,0 +1,6 @@
+
+rmdir Debug /s /q
+
+del *.launch /s
+
+exit
diff --git a/Example/E15_fft_demo/灏介噺涓嶈浣跨敤鐨勫紩鑴.txt b/Example/E15_fft_demo/灏介噺涓嶈浣跨敤鐨勫紩鑴.txt
new file mode 100644
index 0000000..e5bde1c
--- /dev/null
+++ b/Example/E15_fft_demo/灏介噺涓嶈浣跨敤鐨勫紩鑴.txt
@@ -0,0 +1,14 @@
+
+尽量不要使用以下引脚，以下引脚属于boot引脚，不合理的使用容易导致单片机无法启动等问题，
+因此建议大家尽量不要使用。
+P14.2
+P14.3
+P14.4
+P14.5
+P14.6
+P10.5
+P10.6
+
+P20.2 这个引脚只能输入不能输出
+
+P21.6 在TC264DA芯片中这个引脚无法使用，在TC264D中可以正常使用
\ No newline at end of file
diff --git a/Example/E15_fft_demo/鎺ㄨ崘IO鍒嗛厤.txt b/Example/E15_fft_demo/鎺ㄨ崘IO鍒嗛厤.txt
new file mode 100644
index 0000000..16df2d5
--- /dev/null
+++ b/Example/E15_fft_demo/鎺ㄨ崘IO鍒嗛厤.txt
@@ -0,0 +1,47 @@
+
+摄像头 8个数据口 一个串口 两eru中断
+ 数据口：00_0 00_1 00_2 00_3 00_4 00_5 00_6 00_7
+ 配置串口：摄像头RX：02_2 摄像头TX：02_3
+ VSY：02_0
+ HREF：程序不需要，所以不接
+ PCLK：02_1
+
+四路运放 A0 A1 A2 A3 等
+
+四个编码器
+ LSB：33_7 DIR：33_6
+ LSB：02_8 DIR：00_9
+ LSB：10_3 DIR：10_1
+ LSB：20_3 DIR：20_0
+
+8路pwm 21_2 21_3 21_4 21_5 02_4 02_5 02_6 02_7
+
+ICM20602
+ CLK： P20_11
+ MOSI： P20_14
+ MISO： P20_12
+ CS： P20_13
+ SPI0
+
+TFT屏幕
+ CLK 15_3
+ MOSI 15_5
+ MISO 15_4 //实际上TFT没有这个引脚 这里仅仅占位而已
+ CS0 15_2
+ BL 15_4 //复用控制背光
+ REST 15_1
+ DC 15_0
+ SPI2
+
+舵机 P33_9
+
+
+尽量不要使用以下引脚，以下引脚属于boot引脚，不合理的使用容易导致单片机无法启动等问题，
+因此建议大家尽量不要使用。
+P14_2
+P14_3
+P14_4
+P14_5
+P14_6
+P10_5
+P10_6
\ No newline at end of file
diff --git a/Example/渚嬬▼鍔熻兘璇存槑.xlsx b/Example/渚嬬▼鍔熻兘璇存槑.xlsx
index 59fc8cc..e2f4534 100644
Binary files a/Example/渚嬬▼鍔熻兘璇存槑.xlsx and b/Example/渚嬬▼鍔熻兘璇存槑.xlsx differ