mirror of
https://gitee.com/seekfree/TC264_Library.git
synced 2026-06-04 03:32:56 +00:00
V1.0.3
对spi、uart、pit中部分变量加入volatile修饰,避免出现问题
This commit is contained in:
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@@ -267,7 +267,11 @@
|
|||||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||||
<storageModule addStartupFiles="false" moduleId="com.tasking.processor"/>
|
<storageModule addStartupFiles="false" moduleId="com.tasking.processor"/>
|
||||||
<storageModule moduleId="com.tasking.toolInfo">
|
<storageModule moduleId="com.tasking.toolInfo">
|
||||||
|
<toolInfo>TASKING VX-toolset for TriCore: control program v6.3r1 Build 19041558</toolInfo>
|
||||||
|
<toolInfo>TASKING VX-toolset for TriCore: object linker v6.3r1 Build 19041558</toolInfo>
|
||||||
|
<toolInfo>TASKING VX-toolset for TriCore: assembler v6.3r1 Build 19041558</toolInfo>
|
||||||
<toolInfo>TASKING program builder v6.3r1 Build 19041558</toolInfo>
|
<toolInfo>TASKING program builder v6.3r1 Build 19041558</toolInfo>
|
||||||
|
<toolInfo>TASKING VX-toolset for TriCore: C compiler v6.3r1 Build 19041558</toolInfo>
|
||||||
</storageModule>
|
</storageModule>
|
||||||
</cconfiguration>
|
</cconfiguration>
|
||||||
<cconfiguration id="com.tasking.config.ctc.abs.release.2134260939">
|
<cconfiguration id="com.tasking.config.ctc.abs.release.2134260939">
|
||||||
|
|||||||
@@ -14,4 +14,7 @@ V1.0.2
|
|||||||
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
<09><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD>DMA<4D><41>Ϊlink<6E><6B><EFBFBD>䣬<EFBFBD><E4A3AC><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>DMA<4D>жϴ<D0B6><CFB4><EFBFBD>
|
||||||
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
<09><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD>
|
||||||
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
<09><>6050<35><30> <20><>Ҫ<EFBFBD>õ<EFBFBD><C3B5><EFBFBD><EFBFBD><EFBFBD>IIC<49><43>ģ<EFBFBD>飬<EFBFBD>ڳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʼ<EFBFBD><CABC>
|
||||||
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<09><><EFBFBD><EFBFBD>С<EFBFBD><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|
||||||
|
V1.0.3
|
||||||
|
<09><>spi<70><69>uart<72><74>pit<69>в<EFBFBD><D0B2>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>volatile<6C><65><EFBFBD>Σ<EFBFBD><CEA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
@@ -37,7 +37,7 @@
|
|||||||
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
void pit_init(CCU6N_enum ccu6n, CCU6_CHN_enum pit_ch, uint32 time)
|
||||||
{
|
{
|
||||||
uint8 i;
|
uint8 i;
|
||||||
Ifx_CCU6 *module;
|
volatile Ifx_CCU6 *module;
|
||||||
uint64 timer_input_clk;
|
uint64 timer_input_clk;
|
||||||
IfxCcu6_Timer g_Ccu6Timer;
|
IfxCcu6_Timer g_Ccu6Timer;
|
||||||
IfxCcu6_TimerId timer_id;
|
IfxCcu6_TimerId timer_id;
|
||||||
|
|||||||
@@ -28,9 +28,9 @@
|
|||||||
// @return void
|
// @return void
|
||||||
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
// Sample usage: <20>ļ<EFBFBD><C4BC>ڲ<EFBFBD>ʹ<EFBFBD>ã<EFBFBD><C3A3>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
Ifx_P* get_port(PIN_enum pin)
|
volatile Ifx_P* get_port(PIN_enum pin)
|
||||||
{
|
{
|
||||||
Ifx_P *port;
|
volatile Ifx_P *port;
|
||||||
|
|
||||||
switch(pin&0xffe0)
|
switch(pin&0xffe0)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -44,13 +44,14 @@ typedef enum //ö
|
|||||||
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3INA_P02_6, GPT12_T3INB_P10_4, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T3EUDA_P02_7, GPT12_T3EUDB_P10_7, //T3<54><33>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8 <20><>P10_0
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_8
|
||||||
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4INA_P02_8, GPT12_T4INB_P10_8, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T4EUDA_P00_9, GPT12_T4EUDB_P33_5, //T4<54><34>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5INB_P10_3, GPT12_T5INA_P21_7, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T5EUDB_P10_1, GPT12_T5EUDA_P21_6, //T5<54><35>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
|
|
||||||
|
//<2F><>LQFP144<34><34>װ<EFBFBD><D7B0>û<EFBFBD><C3BB>P10_0
|
||||||
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6INB_P10_2, GPT12_T6INA_P20_3, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
GPT12_T6EUDB_P10_0, GPT12_T6EUDA_P20_0, //T6<54><36>ʱ<EFBFBD><CAB1> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ſ<EFBFBD>ѡ<EFBFBD><D1A1>Χ
|
||||||
}GPT_PIN_enum;
|
}GPT_PIN_enum;
|
||||||
|
|||||||
@@ -206,7 +206,7 @@ void spi_init(SPIN_enum spi_n, SPI_PIN_enum sck_pin, SPI_PIN_enum mosi_pin, SPI_
|
|||||||
IfxQspi_SpiMaster_Channel MasterChHandle;
|
IfxQspi_SpiMaster_Channel MasterChHandle;
|
||||||
IfxQspi_SpiMaster_Pins MasterPins;
|
IfxQspi_SpiMaster_Pins MasterPins;
|
||||||
IfxQspi_SpiMaster_Output SlsoPin;
|
IfxQspi_SpiMaster_Output SlsoPin;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
@@ -275,7 +275,7 @@ void spi_mosi(SPIN_enum spi_n, SPI_PIN_enum cs_pin, uint8 *modata, uint8 *midata
|
|||||||
{
|
{
|
||||||
uint32 i;
|
uint32 i;
|
||||||
Ifx_QSPI_BACON bacon;
|
Ifx_QSPI_BACON bacon;
|
||||||
Ifx_QSPI *moudle;
|
volatile Ifx_QSPI *moudle;
|
||||||
|
|
||||||
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
moudle = IfxQspi_getAddress((IfxQspi_Index)spi_n);
|
||||||
|
|
||||||
|
|||||||
@@ -244,7 +244,7 @@ void uart_init(UARTN_enum uartn, uint32 baud, UART_PIN_enum tx_pin, UART_PIN_enu
|
|||||||
{
|
{
|
||||||
boolean interrupt_state = disableInterrupts();
|
boolean interrupt_state = disableInterrupts();
|
||||||
|
|
||||||
Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
volatile Ifx_ASCLIN *moudle = IfxAsclin_getAddress((IfxAsclin_Index)uartn);
|
||||||
|
|
||||||
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
IfxAsclin_Asc_initModuleConfig(&uart_config, moudle); //<2F><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ýṹ<C3BD><E1B9B9>
|
||||||
|
|
||||||
|
|||||||
@@ -82,6 +82,6 @@ void data_conversion(int16 data1, int16 data2, int16 data3, int16 data4, uint8 *
|
|||||||
dat[8] = (uint8)(CRC16&0xff);
|
dat[8] = (uint8)(CRC16&0xff);
|
||||||
dat[9] = (uint8)(CRC16>>8);
|
dat[9] = (uint8)(CRC16>>8);
|
||||||
|
|
||||||
//uart_putbuff(USART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
//uart_putbuff(UART_0,dat,10); //<2F><><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD><EFBFBD>ɺ<EFBFBD><C9BA><EFBFBD>ʹ<EFBFBD>ô<EFBFBD><C3B4>ڷ<EFBFBD><DAB7>ͽ<EFBFBD><CDBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݷ<EFBFBD><DDB7>ͳ<EFBFBD>ȥ
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
Binary file not shown.
Reference in New Issue
Block a user