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V1.1.0

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对ISR文件内的中断函数全部添加enableInterrupts(); 以实现中断嵌套的功能
 增加RDA5807获取RSSI功能函数
 对DMA连接传输所用到的变量，根据ERU_DMA_INT_SERVICE来将变量放到对应的CPU中
This commit is contained in:
SEEKFREE_Kang
2020-07-08 18:43:29 +08:00
parent 46593c25d4
commit 238051f635
140 changed files with 1339 additions and 285 deletions
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11
Example/5-UART_Demo/Libraries/doc/version.txt
View File

@@ -64,4 +64,13 @@ V1.0.8
<09>޸<EFBFBD>CCU61 ͨ<><CDA8>1<EFBFBD>ж<EFBFBD><D0B6><EFBFBD><EFBFBD>ô<EFBFBD><C3B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
<09>޸<EFBFBD>CCU6<55><36><EFBFBD>ߵ<EFBFBD><DFB5>Ե<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD>ֹͣ<CDA3><D6B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ߵ<EFBFBD><DFB5><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>жϵ<D0B6><CFB5><EFBFBD><EFBFBD><EFBFBD>
<09><>CCU6<55><36><EFBFBD><EFBFBD>pit_close<73><65>pit_start<72><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD><DABF>ƶ<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD>Ŀ<EFBFBD>ʼ<EFBFBD><CABC>ֹͣ
<09><>CCU6<55><36><EFBFBD><EFBFBD>pit_disable_interrupt<70><74>pit_enable_interrupt<70><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD><EFBFBD>жϿ<D0B6><CFBF><EFBFBD>
<09><>CCU6<55><36><EFBFBD><EFBFBD>pit_disable_interrupt<70><74>pit_enable_interrupt<70><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD><EFBFBD>жϿ<D0B6><CFBF><EFBFBD>
V1.0.9
<09>޸<EFBFBD>RDA5807<30><37><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA>֤<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>1S<31>ڲ<EFBFBD><DAB2><EFBFBD>FMģ<4D><C4A3>
V1.1.0
<09><>ISR<53>ļ<EFBFBD><C4BC>ڵ<EFBFBD><DAB5>жϺ<D0B6><CFBA><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD><EFBFBD>enableInterrupts(); <20><>ʵ<EFBFBD><CAB5><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD>׵Ĺ<D7B5><C4B9><EFBFBD>
<09><><EFBFBD><EFBFBD>RDA5807<30><37>ȡRSSI<53><49><EFBFBD>ܺ<EFBFBD><DCBA><EFBFBD>
<09><>DMA<4D><41><EFBFBD>Ӵ<EFBFBD><D3B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>õ<EFBFBD><C3B5>ı<EFBFBD><C4B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ERU_DMA_INT_SERVICE<43><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ŵ<EFBFBD><C5B5><EFBFBD>Ӧ<EFBFBD><D3A6>CPU<50><55>

2
Example/5-UART_Demo/Libraries/seekfree_libraries/zf_eeprom.c
View File

@@ -49,7 +49,7 @@ uint8 flash_check(uint32 sector_num, uint32 page_num)
// @param sector_num <09><>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ0-11
// @return void
// @since v1.0
// Sample usage: flash_erase_sector(0);
// Sample usage: eeprom_erase_sector(0);
//-------------------------------------------------------------------------------------------------------------------
void eeprom_erase_sector(uint32 sector_num)
{

11
Example/5-UART_Demo/Libraries/seekfree_libraries/zf_eru_dma.c
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@@ -31,9 +31,18 @@ typedef struct
IfxDma_Dma_Channel channel; //DMAͨ<41><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}DMA_LINK;
#if(0 == ERU_DMA_INT_SERVICE)
#pragma section all "cpu0_dsram"
DMA_LINK dma_link_list;
#elif(1 == ERU_DMA_INT_SERVICE)
#pragma section all "cpu1_dsram"
DMA_LINK dma_link_list;
#endif
#pragma section all restore
//-------------------------------------------------------------------------------------------------------------------
// @brief eru<72><75><EFBFBD><EFBFBD>dma<6D><61>ʼ<EFBFBD><CABC>
// @param dma_ch ѡ<><D1A1>DMAͨ<41><CDA8>

2
Example/5-UART_Demo/Libraries/seekfree_peripheral/SEEKFREE_IIC.c
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@@ -50,7 +50,7 @@ uint8 IIC_num; //
static uint16 simiic_delay_time = SIMIIC_DELAY_TIME; //ICM<43>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>Ϊ20
uint16 simiic_delay_time = SIMIIC_DELAY_TIME; //ICM<43>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>Ϊ20
//-------------------------------------------------------------------------------------------------------------------

4
Example/5-UART_Demo/Libraries/seekfree_peripheral/SEEKFREE_IIC.h
View File

@@ -41,13 +41,13 @@
#define SIMIIC_DELAY_TIME 20
typedef enum IIC //DACģ<EFBFBD><EFBFBD>
typedef enum IIC //IIC<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ö<EFBFBD><EFBFBD>
{
SIMIIC,
SCCB
} IIC_type;
extern uint16 simiic_delay_time; //ICM<43>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD>Ϊ20
void simiic_delay_set(uint16 time);
void simiic_start(void);

1
Example/5-UART_Demo/Libraries/seekfree_peripheral/SEEKFREE_MT9V03X.c
View File

@@ -357,7 +357,6 @@ void mt9v03x_dma(void)
mt9v03x_dma_int_num = 0;
mt9v03x_finish_flag = 1;//һ<><D2BB>ͼ<EFBFBD><CDBC><EFBFBD>Ӳɼ<D3B2><C9BC><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ3.8MS<EFBFBD><EFBFBD><EFBFBD><EFBFBD>(50FPS<50><53>188*120<32>ֱ<EFBFBD><D6B1><EFBFBD>)
dma_stop(MT9V03X_DMA_CH);
}
}

47
Example/5-UART_Demo/Libraries/seekfree_peripheral/SEEKFREE_RDA5807.c
View File

@@ -43,7 +43,7 @@
#define FM_ADDRESS 0x20>>1
uint8 rda5807_config_reg[] = {
0xc1, 0x03, // Register 0x2
0xc0, 0x03, // Register 0x2
0x00, 0x00, // Register 0x3
0x0a, 0x00, // Register 0x4
0x88, 0x0f, // Register 0x5
@@ -63,6 +63,12 @@ uint8 rda5807_config_reg[] = {
void rad5807m_simiic_write(uint8 dev_add, uint8 data[], uint8 num)
{
uint8 i;
uint16 temp_delay_time = 0;
temp_delay_time = simiic_delay_time;
simiic_delay_set(RAD5807_DELAY_TIME);//<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪĬ<CEAA><C4AC><EFBFBD><EFBFBD><EFBFBD>ʽϸ<CABD>
simiic_start();
send_ch( (dev_add<<1) | 0x00); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD><D6B7>дλ
@@ -70,6 +76,8 @@ void rad5807m_simiic_write(uint8 dev_add, uint8 data[], uint8 num)
send_ch(data[i]); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
simiic_stop();
simiic_delay_set(temp_delay_time); //<2F><>ԭģ<D4AD><C4A3>IICĬ<43><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
@@ -84,6 +92,11 @@ void rad5807m_simiic_write(uint8 dev_add, uint8 data[], uint8 num)
//-------------------------------------------------------------------------------------------------------------------
void rda5807m_simiic_read(uint8 dev_add,uint8 *dat_add,uint8 num)
{
uint16 temp_delay_time = 0;
temp_delay_time = simiic_delay_time;
simiic_delay_set(RAD5807_DELAY_TIME);//<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪĬ<CEAA><C4AC><EFBFBD><EFBFBD><EFBFBD>ʽϸ<CABD>
simiic_start();
send_ch( (dev_add<<1) | 0x01); //<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ<EFBFBD>Ӷ<EFBFBD>λ
@@ -96,6 +109,8 @@ void rda5807m_simiic_read(uint8 dev_add,uint8 *dat_add,uint8 num)
*dat_add = read_ch(no_ack); //<2F><>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD>
simiic_stop();
simiic_delay_set(temp_delay_time); //<2F><>ԭģ<D4AD><C4A3>IICĬ<43><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}
@@ -176,7 +191,22 @@ void rda5807_read_id(void)
rda5807m_simiic_read(FM_ADDRESS,rda5807_read_reg,10);
}
//-------------------------------------------------------------------------------------------------------------------
// @brief rda5807<30><37>ȡRSSI(<28>ź<EFBFBD>ǿ<EFBFBD><C7BF>)
// @param NULL
// @return void
// @since v1.0
// Sample usage:
//-------------------------------------------------------------------------------------------------------------------
uint8 rda5807_read_rssi(void)
{
uint8 rssi;
rda5807m_simiic_read(FM_ADDRESS,rda5807_read_reg,3);
rssi = rda5807_read_reg[2] >> 1;
return rssi;
}
//-------------------------------------------------------------------------------------------------------------------
// @brief rda5807<30><37>ʼ<EFBFBD><CABC>
@@ -192,19 +222,20 @@ void rda5807_init(float freq)
//iic<69><63>ʼ<EFBFBD><CABC>
simiic_init();
simiic_delay_set(100);//<2F><><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>IIC<49><43>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪĬ<CEAA><C4AC><EFBFBD><EFBFBD><EFBFBD>ʽϸ<CABD>
//<2F><>λ
rad5807m_simiic_write(FM_ADDRESS,dat,2);
systick_delay_ms(STM0, 50);
systick_delay_ms(STM0, 1000);//<2F><>Ҫ<EFBFBD><D2AA>֤<EFBFBD>ϵ<EFBFBD><CFB5><EFBFBD>1S<31>ڲ<EFBFBD><DAB2><EFBFBD> FMģ<4D><C4A3>
while(rda5807_read_reg[8] != 0x58)
{
//<2F><>λ
rad5807m_simiic_write(FM_ADDRESS,dat,2);
systick_delay_ms(STM0, 10);
//<2F><>ȡ<EFBFBD>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Լ졣
rda5807m_simiic_read(FM_ADDRESS,rda5807_read_reg,10);
systick_delay_ms(STM0, 50);
//<2F><><EFBFBD><EFBFBD>һֱ<D2BB><D6B1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>鿴SCL<43><4C>SDA<44>Ƿ<EFBFBD><C7B7><EFBFBD><EFBFBD>Ӻá<D3BA>
//<2F><>Ҫ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>SEEKFREE_IIC.h<>ļ<EFBFBD><C4BC>е<EFBFBD>SIMIIC_DELAY_TIMEֵ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>60
//Ҳ<EFBFBD><EFBFBD><EFBFBD>Գ<EFBFBD><EFBFBD><EFBFBD> <20>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD>5807.h<>ļ<EFBFBD><C4BC>е<EFBFBD>RAD5807_DELAY_TIME<EFBFBD>궨<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ
//<2F><><EFBFBD><EFBFBD>SDA SCLû<4C>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>裨<EFBFBD><E8A3A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ŷ<EFBFBD><C5B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Գ<EFBFBD><D4B3><EFBFBD><EFBFBD>޸ĵײ<C4B5><D7B2><EFBFBD><EFBFBD>ļ<EFBFBD>
//<2F><>gpio_init<69><74><EFBFBD><EFBFBD><EFBFBD>е<EFBFBD>IfxPort_PadDriver_cmosAutomotiveSpeed1<64><31>ΪIfxPort_PadDriver_cmosAutomotiveSpeed4
}
//<2F><><EFBFBD><EFBFBD>
@@ -212,7 +243,7 @@ void rda5807_init(float freq)
//Ƶ<><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
rda5807_set_channel(freq);
simiic_delay_set(SIMIIC_DELAY_TIME);//<2F><>ԭģ<D4AD><C4A3>IICĬ<43><C4AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}

4
Example/5-UART_Demo/Libraries/seekfree_peripheral/SEEKFREE_RDA5807.h
View File

@@ -40,8 +40,7 @@
#define RAD5807_DELAY_TIME 200
void rda5807_init(float freq);
@@ -49,6 +48,7 @@ void rda5807_set_transimt(void);
void rda5807_set_idle(void);
void rda5807_set_channel(float freq);
void rda5807_channel_config(uint16 reg_chn);
uint8 rda5807_read_rssi(void);
#endif

21
Example/5-UART_Demo/USER/isr.c
View File

@@ -26,6 +26,7 @@
//PIT<49>жϺ<D0B6><CFBA><EFBFBD> ʾ<><CABE>
IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
PIT_CLEAR_FLAG(CCU6_0, PIT_CH0);
}
@@ -33,18 +34,21 @@ IFX_INTERRUPT(cc60_pit_ch0_isr, 0, CCU6_0_CH0_ISR_PRIORITY)
IFX_INTERRUPT(cc60_pit_ch1_isr, 0, CCU6_0_CH1_ISR_PRIORITY)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
PIT_CLEAR_FLAG(CCU6_0, PIT_CH1);
}
IFX_INTERRUPT(cc61_pit_ch0_isr, 0, CCU6_1_CH0_ISR_PRIORITY)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
PIT_CLEAR_FLAG(CCU6_1, PIT_CH0);
}
IFX_INTERRUPT(cc61_pit_ch1_isr, 0, CCU6_1_CH1_ISR_PRIORITY)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
PIT_CLEAR_FLAG(CCU6_1, PIT_CH1);
}
@@ -54,6 +58,7 @@ IFX_INTERRUPT(cc61_pit_ch1_isr, 0, CCU6_1_CH1_ISR_PRIORITY)
IFX_INTERRUPT(eru_ch0_ch4_isr, 0, ERU_CH0_CH4_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
if(GET_GPIO_FLAG(ERU_CH0_REQ4_P10_7))//ͨ<><CDA8>0<EFBFBD>ж<EFBFBD>
{
CLEAR_GPIO_FLAG(ERU_CH0_REQ4_P10_7);
@@ -67,6 +72,7 @@ IFX_INTERRUPT(eru_ch0_ch4_isr, 0, ERU_CH0_CH4_INT_PRIO)
IFX_INTERRUPT(eru_ch1_ch5_isr, 0, ERU_CH1_CH5_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
if(GET_GPIO_FLAG(ERU_CH1_REQ5_P10_8))//ͨ<><CDA8>1<EFBFBD>ж<EFBFBD>
{
CLEAR_GPIO_FLAG(ERU_CH1_REQ5_P10_8);
@@ -81,6 +87,7 @@ IFX_INTERRUPT(eru_ch1_ch5_isr, 0, ERU_CH1_CH5_INT_PRIO)
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷpclk<6C><6B><EFBFBD><EFBFBD>Ĭ<EFBFBD><C4AC>ռ<EFBFBD><D5BC><EFBFBD><EFBFBD> 2ͨ<32><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD>DMA<4D><41><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ﲻ<EFBFBD>ٶ<EFBFBD><D9B6><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD>
//IFX_INTERRUPT(eru_ch2_ch6_isr, 0, ERU_CH2_CH6_INT_PRIO)
//{
// enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
// if(GET_GPIO_FLAG(ERU_CH2_REQ7_P00_4))//ͨ<><CDA8>2<EFBFBD>ж<EFBFBD>
// {
// CLEAR_GPIO_FLAG(ERU_CH2_REQ7_P00_4);
@@ -97,6 +104,7 @@ IFX_INTERRUPT(eru_ch1_ch5_isr, 0, ERU_CH1_CH5_INT_PRIO)
IFX_INTERRUPT(eru_ch3_ch7_isr, 0, ERU_CH3_CH7_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
if(GET_GPIO_FLAG(ERU_CH3_REQ6_P02_0))//ͨ<><CDA8>3<EFBFBD>ж<EFBFBD>
{
CLEAR_GPIO_FLAG(ERU_CH3_REQ6_P02_0);
@@ -115,6 +123,7 @@ IFX_INTERRUPT(eru_ch3_ch7_isr, 0, ERU_CH3_CH7_INT_PRIO)
IFX_INTERRUPT(dma_ch5_isr, 0, ERU_DMA_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
if (1 == camera_type) mt9v03x_dma();
else if (3 == camera_type) ov7725_dma();
@@ -124,29 +133,35 @@ IFX_INTERRUPT(dma_ch5_isr, 0, ERU_DMA_INT_PRIO)
//<2F><><EFBFBD><EFBFBD><EFBFBD>жϺ<D0B6><CFBA><EFBFBD> ʾ<><CABE>
IFX_INTERRUPT(uart0_tx_isr, 0, UART0_TX_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrTransmit(&uart0_handle);
}
IFX_INTERRUPT(uart0_rx_isr, 0, UART0_RX_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrReceive(&uart0_handle);
}
IFX_INTERRUPT(uart0_er_isr, 0, UART0_ER_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrError(&uart0_handle);
}
//<2F><><EFBFBD><EFBFBD>1Ĭ<31><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>
IFX_INTERRUPT(uart1_tx_isr, 0, UART1_TX_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrTransmit(&uart1_handle);
}
IFX_INTERRUPT(uart1_rx_isr, 0, UART1_RX_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrReceive(&uart1_handle);
mt9v03x_uart_callback();
}
IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrError(&uart1_handle);
}
@@ -154,15 +169,18 @@ IFX_INTERRUPT(uart1_er_isr, 0, UART1_ER_INT_PRIO)
//<2F><><EFBFBD><EFBFBD>2Ĭ<32><C4AC><EFBFBD><EFBFBD><EFBFBD>ӵ<EFBFBD><D3B5><EFBFBD><EFBFBD><EFBFBD>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ģ<EFBFBD><C4A3>
IFX_INTERRUPT(uart2_tx_isr, 0, UART2_TX_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrTransmit(&uart2_handle);
}
IFX_INTERRUPT(uart2_rx_isr, 0, UART2_RX_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrReceive(&uart2_handle);
wireless_uart_callback();
}
IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrError(&uart2_handle);
}
@@ -170,13 +188,16 @@ IFX_INTERRUPT(uart2_er_isr, 0, UART2_ER_INT_PRIO)
IFX_INTERRUPT(uart3_tx_isr, 0, UART3_TX_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrTransmit(&uart3_handle);
}
IFX_INTERRUPT(uart3_rx_isr, 0, UART3_RX_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrReceive(&uart3_handle);
}
IFX_INTERRUPT(uart3_er_isr, 0, UART3_ER_INT_PRIO)
{
enableInterrupts();//<2F><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxAsclin_Asc_isrError(&uart3_handle);
}