mirror of
https://gitee.com/seekfree/TC264_Library.git
synced 2026-06-03 19:32:55 +00:00
V3.2.12
修复核心1运行异常的问题
This commit is contained in:
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -1,3 +1,5 @@
|
|||||||
|
V3.2.12
|
||||||
|
<20><EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>1<EFBFBD><31><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
V3.2.11
|
V3.2.11
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
<20><EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
||||||
|
|||||||
@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
|
|||||||
stm0_isr_flag = 0;
|
stm0_isr_flag = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
|
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
|
||||||
{
|
{
|
||||||
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
|
||||||
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
|
||||||
|
|||||||
@@ -50,7 +50,7 @@
|
|||||||
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
// ʹ<><CAB9>ʾ<EFBFBD><CABE> soft_iic_delay(1);
|
||||||
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
// <20><>ע<EFBFBD><D7A2>Ϣ <20>ڲ<EFBFBD><DAB2><EFBFBD><EFBFBD><EFBFBD>
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
#define soft_iic_delay(x) for(uint32 i = x; i--; )
|
#define soft_iic_delay(x) for(vuint32 i = x; i--; )
|
||||||
|
|
||||||
//-------------------------------------------------------------------------------------------------------------------
|
//-------------------------------------------------------------------------------------------------------------------
|
||||||
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> IIC GPIO<49><4F><EFBFBD><EFBFBD>
|
||||||
|
|||||||
Reference in New Issue
Block a user