lhye200/TC264_Library_seekfree
1
0
Fork 0
mirror of https://gitee.com/seekfree/TC264_Library.git synced 2026-06-04 03:32:56 +00:00
Code Issues Packages Projects Releases Wiki Activity

V3.2.11

Browse Source 
修复凌瞳高帧率版画质噪点问题
        修复延时函数在多中断时可能异常的问题
This commit is contained in:
SEEKFREE_BUDING
2024-03-09 17:58:13 +08:00
parent 9a30f1ec33
commit 146043d92e
115 changed files with 396 additions and 248 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
Example/E09_timer_demo/.cproject
View File

@@ -113,7 +113,7 @@
</toolChain>
</folderInfo>
<sourceEntries>
<entry excluding="libraries/infineon_libraries/iLLD/TC26B/Tricore/Asclin/Spi|libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent|libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Timer|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts|libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Sent|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TimerWithTrigger|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/PwmHl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Io|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Fft|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/PwmBc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Dts|libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/PwmHl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Rdc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Msc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TPwm|libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Can|libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Timer|libraries/infineon_libraries/iLLD/TC26B/Tricore/Asclin/Lin|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/Icu|libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Trig|libraries/infineon_libraries/Service/CpuGeneric/SysSe/Time|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce|libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Psi5s|libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Dsadc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth|libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5|libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Eray|libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build|libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim/In|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Trap|libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiSlave|libraries/infineon_libraries/Service/CpuGeneric/SysSe/General|libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Psi5|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/PwmHl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Pwm|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Phy_Pef7071|libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Std|libraries/infineon_libraries/Service/CpuGeneric/SysSe/Comm|libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem|libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Crc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s|libraries/doc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/I2c|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Timer|libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Hssl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Driver|libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Cam" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
<entry excluding="libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Msc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Asclin/Lin|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Cam|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent|libraries/infineon_libraries/Service/CpuGeneric/SysSe/Time|libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray|libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Cpu/Trap|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim/In|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/Icu|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth|libraries/infineon_libraries/iLLD/TC26B/Tricore/_Lib/InternalMux|libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Std|libraries/doc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Timer|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tim|libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce/Crc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Asclin/Spi|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft|libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Rdc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/PwmHl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Can|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Trig|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/Pwm|libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/Timer|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TimerWithTrigger|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/TPwm|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom|libraries/infineon_libraries/iLLD/TC26B/Tricore/Smu|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Psi5|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eth/Phy_Pef7071|libraries/infineon_libraries/iLLD/TC26B/Tricore/Cif/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Atom/PwmHl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Hssl/Hssl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Iom/Driver|libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Gtm/Tom/PwmHl|libraries/infineon_libraries/iLLD/TC26B/Tricore/Ccu6/PwmBc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dsadc/Dsadc|libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican|libraries/infineon_libraries/iLLD/TC26B/Tricore/Msc|libraries/infineon_libraries/iLLD/TC26B/Tricore/I2c/I2c|libraries/infineon_libraries/iLLD/TC26B/Tricore/Multican/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Stm/Timer|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fft/Fft|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Dts/Dts|libraries/infineon_libraries/iLLD/TC26B/Tricore/Eray/Eray|libraries/infineon_libraries/iLLD/TC26B/Tricore/_Build|libraries/infineon_libraries/iLLD/TC26B/Tricore/Sent/Sent|libraries/infineon_libraries/iLLD/TC26B/Tricore/Psi5s/Psi5s|libraries/infineon_libraries/iLLD/TC26B/Tricore/Qspi/SpiSlave|libraries/infineon_libraries/Service/CpuGeneric/SysSe/Comm|libraries/infineon_libraries/iLLD/TC26B/Tricore/Port/Io|libraries/infineon_libraries/iLLD/TC26B/Tricore/Emem/Std|libraries/infineon_libraries/iLLD/TC26B/Tricore/Fce|libraries/infineon_libraries/Service/CpuGeneric/SysSe/General" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
</sourceEntries>
</configuration>
</storageModule>

3
Example/E09_timer_demo/libraries/doc/version.txt
View File

@@ -1,3 +1,6 @@
V3.2.11
<20>޸<EFBFBD><DEB8><EFBFBD>ͫ<EFBFBD><CDAB>֡<EFBFBD>ʰ滭<CAB0><E6BBAD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
<20>޸<EFBFBD><DEB8><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>ڶ<EFBFBD><DAB6>ж<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD>쳣<EFBFBD><ECB3A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
V3.2.10
<20>޸<EFBFBD>spi-wifi<66><69>ʼ<EFBFBD><CABC>ʧ<EFBFBD>ܵ<EFBFBD><DCB5><EFBFBD><EFBFBD><EFBFBD>
<20>޸<EFBFBD>spi-wifi<66><69>ȡ<EFBFBD><C8A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϣ<EFBFBD><CFA2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>

2
Example/E09_timer_demo/libraries/zf_device/zf_device_camera.c
View File

@@ -115,7 +115,7 @@ void camera_fifo_init (void)
// @return void
// Sample usage: camera_init();
//-------------------------------------------------------------------------------------------------------------------
uint8 camera_init (uint8 *source_addr, uint8 *destination_addr, uint16 image_size)
uint8 camera_init (uint8 *source_addr, uint8 *destination_addr, uint32 image_size)
{
uint8 num;
uint8 link_list_num;

2
Example/E09_timer_demo/libraries/zf_device/zf_device_camera.h
View File

@@ -52,7 +52,7 @@ extern uint8 camera_send_image_frame_header[4]; //
void camera_binary_image_decompression (const uint8 *data1, uint8 *data2, uint32 image_size); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͼ<EFBFBD><CDBC><EFBFBD><EFBFBD><EFBFBD>ݽ<EFBFBD>ѹΪʮ<CEAA><CAAE><EFBFBD><EFBFBD><EFBFBD>ư<EFBFBD>λ<EFBFBD><CEBB><EFBFBD><EFBFBD> С<><D0A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
void camera_send_image (uart_index_enum uartn, const uint8 *image_addr, uint32 image_size); // <20><><EFBFBD><EFBFBD>ͷͼ<CDB7><CDBC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λ<EFBFBD><CEBB><EFBFBD>鿴ͼ<E9BFB4><CDBC>
void camera_fifo_init (void); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD> FIFO <20><>ʼ<EFBFBD><CABC>
uint8 camera_init (uint8 *source_addr, uint8 *destination_addr, uint16 image_size); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD>ʼ<EFBFBD><CABC>
uint8 camera_init (uint8 *source_addr, uint8 *destination_addr, uint32 image_size); // <20><><EFBFBD><EFBFBD>ͷ<EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD>ʼ<EFBFBD><CABC>
//=================================================<3D><><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>================================================
#endif

2
Example/E09_timer_demo/libraries/zf_device/zf_device_scc8660.h
View File

@@ -79,7 +79,7 @@
#define SCC8660_AUTO_EXP_DEF (0 ) // <20>Զ<EFBFBD><D4B6>ع<EFBFBD> Ĭ<>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><D4B6>ع<EFBFBD><D8B9><EFBFBD><EFBFBD><EFBFBD> <20><>Χ [0-1] 0Ϊ<30>ر<EFBFBD>
#define SCC8660_BRIGHT_DEF (500) // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20>ֶ<EFBFBD><D6B6>ع<EFBFBD>Ĭ<EFBFBD>ϣ<EFBFBD>300 <20>ֶ<EFBFBD><D6B6>ع<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Χ0-65535 <20>Զ<EFBFBD><D4B6>ع<EFBFBD><D8B9>Ƽ<EFBFBD>ֵ<EFBFBD><D6B5>100 <20>Զ<EFBFBD><D4B6>ع<EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>÷<EFBFBD>Χ0-255
#define SCC8660_FPS_DEF (50 ) // ͼ<><CDBC>֡<EFBFBD><D6A1> Ĭ<>ϣ<EFBFBD>50 <20><>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>60 50 30 25<32><35> ʵ<><CAB5>֡<EFBFBD>ʻ<EFBFBD><CABB><EFBFBD>Ҫ<EFBFBD><D2AA>SCC8660_PCLK_DIV<49><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SCC8660_FPS_DEF (60 ) // ͼ<><CDBC>֡<EFBFBD><D6A1> Ĭ<>ϣ<EFBFBD>50 <20><>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA>60 50 30 25<32><35> ʵ<><CAB5>֡<EFBFBD>ʻ<EFBFBD><CABB><EFBFBD>Ҫ<EFBFBD><D2AA>SCC8660_PCLK_DIV<49><56><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
#define SCC8660_PCLK_DIV_DEF (2 ) // PCLK<4C><4B>Ƶϵ<C6B5><CFB5> Ĭ<>ϣ<EFBFBD>5 <20><>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><0:1/1> <1:2/3> <2:1/2> <3:1/3> <4:1/4> <5:1/8>
// <20><>Ƶϵ<C6B5><CFB5>Խ<EFBFBD><D4BD><EFBFBD><EFBFBD>PCLKƵ<4B><C6B5>Խ<EFBFBD>ͣ<EFBFBD><CDA3><EFBFBD><EFBFBD><EFBFBD>PCLK<4C><4B><EFBFBD>Լ<EFBFBD><D4BC><EFBFBD>DVP<56>ӿڵĸ<DAB5><C4B8>ţ<EFBFBD><C5A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>PCLKƵ<4B><C6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӱ<EFBFBD><D3B0>֡<EFBFBD>ʡ<EFBFBD><CAA1><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>뱣<EFBFBD><EBB1A3>Ĭ<EFBFBD>ϡ<EFBFBD>
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>FPSΪ50֡<30><D6A1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>pclk<6C><6B>Ƶϵ<C6B5><CFB5>ѡ<EFBFBD><D1A1><EFBFBD><EFBFBD>Ϊ5<CEAA><35><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͷ<EFBFBD><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֡<EFBFBD><D6A1>Ϊ50*<2A><>1/8<><38>=6.25֡

12
Example/E09_timer_demo/libraries/zf_driver/zf_driver_delay.c
View File

@@ -54,7 +54,7 @@ IFX_INTERRUPT(stm0_isr, 0, IFX_INTPRIO_STM0_SR0)
stm0_isr_flag = 0;
}
IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
IFX_INTERRUPT(stm1_isr, 1, IFX_INTPRIO_STM1_SR0)
{
interrupt_global_enable(0); // <20><><EFBFBD><EFBFBD><EFBFBD>ж<EFBFBD>Ƕ<EFBFBD><C7B6>
IfxStm_clearCompareFlag(&MODULE_STM1, IfxStm_Comparator_0);
@@ -68,6 +68,8 @@ IFX_INTERRUPT(stm1_isr, 0, IFX_INTPRIO_STM1_SR0)
//-------------------------------------------------------------------------------------------------------------------
void system_delay_10ns (uint32 time)
{
uint32 interrupt_global_state;
IfxStm_Index stm_index;
stm_index = (IfxStm_Index)IfxCpu_getCoreId();
@@ -83,15 +85,19 @@ void system_delay_10ns (uint32 time)
case IfxStm_Index_0:
{
Ifx_STM *stm_sfr = &MODULE_STM0;
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
stm0_isr_flag = 1;
interrupt_global_state = interrupt_global_disable(); // <20>ر<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
interrupt_global_enable(interrupt_global_state); // <20><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
while(stm0_isr_flag);
}break;
case IfxStm_Index_1:
{
Ifx_STM *stm_sfr = &MODULE_STM1;
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
stm1_isr_flag = 1;
interrupt_global_state = interrupt_global_disable(); // <20>ر<EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
stm_sfr->CMP[0].U = stm_sfr->TIM0.U + time;
interrupt_global_enable(interrupt_global_state); // <20><><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD>ж<EFBFBD>
while(stm1_isr_flag);
}break;
case IfxStm_Index_none: break;

16
Example/E09_timer_demo/libraries/zf_driver/zf_driver_dma.c
View File

@@ -41,7 +41,7 @@
typedef struct
{
Ifx_DMA_CH linked_list[8]; // DMA<4D><41><EFBFBD><EFBFBD>
Ifx_DMA_CH linked_list[10]; // DMA<4D><41><EFBFBD><EFBFBD>
IfxDma_Dma_Channel channel; // DMAͨ<41><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}DMA_LINK;
@@ -67,7 +67,7 @@ IFX_ALIGN(256) DMA_LINK dma_link_list;
// ʹ<><CAB9>ʾ<EFBFBD><CABE> dma_init(MT9V03X_DMA_CH, MT9V03X_DATA_ADD, mt9v03x_image[0], MT9V03X_PCLK_PIN, EXTI_TRIGGER_RISING, MT9V03X_IMAGE_SIZE);
// <20><>ע<EFBFBD><D7A2>Ϣ
//-------------------------------------------------------------------------------------------------------------------
uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, exti_pin_enum exti_pin, exti_trigger_enum trigger, uint16 dma_count)
uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, exti_pin_enum exti_pin, exti_trigger_enum trigger, uint32 dma_count)
{
IfxDma_Dma_Channel dmaChn;
@@ -83,7 +83,7 @@ uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_
IfxDma_Dma_initChannelConfig(&cfg, &dma);
uint8 list_num, i;
uint16 single_channel_dma_count;
uint32 single_channel_dma_count;
zf_assert(!(dma_count % 8)); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ8<CEAA>ı<EFBFBD><C4B1><EFBFBD>
@@ -100,7 +100,7 @@ uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_
break;
}
list_num++;
if(list_num > 8)
if(list_num > 10)
{
zf_assert(FALSE);
}
@@ -141,7 +141,7 @@ uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_
cfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr);
cfg.transferCount = single_channel_dma_count;
cfg.transferCount = (uint16)single_channel_dma_count;
IfxDma_Dma_initChannel(&dmaChn, &cfg);
@@ -153,13 +153,13 @@ uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_
cfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr + single_channel_dma_count * i);
if(i == (list_num - 1))
{
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[0]);
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&dma_link_list.linked_list[0]);
}
else
{
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[i+1]);
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&dma_link_list.linked_list[i+1]);
}
cfg.transferCount = single_channel_dma_count;
cfg.transferCount = (uint16)single_channel_dma_count;
IfxDma_Dma_initLinkedListEntry((void *)&dma_link_list.linked_list[i], &cfg);
i++;

2
Example/E09_timer_demo/libraries/zf_driver/zf_driver_dma.h
View File

@@ -45,7 +45,7 @@
#define dma_set_destination(dma_ch, destination_addr) (IfxDma_setChannelDestinationAddress(&MODULE_DMA, (dma_ch), (void *)IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (destination_addr))))
//====================================================DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================
uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, exti_pin_enum eru_pin, exti_trigger_enum trigger, uint16 dma_count);
uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, exti_pin_enum eru_pin, exti_trigger_enum trigger, uint32 dma_count);
void dma_disable (IfxDma_ChannelId dma_ch);
void dma_enable (IfxDma_ChannelId dma_ch);
//====================================================DMA <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>====================================================

11
Example/E09_timer_demo/user/cpu0_main.c
View File

@@ -70,23 +70,26 @@ int core0_main(void)
debug_init(); // <20><>ʼ<EFBFBD><CABC>Ĭ<EFBFBD>ϵ<EFBFBD><CFB5>Դ<EFBFBD><D4B4><EFBFBD>
// <20>˴<EFBFBD><CBB4><EFBFBD>д<EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
system_start();
printf("time start.\r\n");
system_start();
system_delay_us(540);
printf("Timer counted %lu us.\r\n", system_getval_us());
system_delay_ms(1000);
system_start();
printf("time start.\r\n");
system_start();
system_delay_ms(65);
printf("Timer counted %lu ms.\r\n", system_getval_ms());
system_delay_ms(1000);
system_start();
printf("time start.\r\n");
system_delay_ms(32700);
system_start();
system_delay_ms(1234);
printf("Timer counted %lu ms.\r\n", system_getval_ms());
// <20>˴<EFBFBD><CBB4><EFBFBD>д<EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
cpu_wait_event_ready(); // <20>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD>к<EFBFBD><D0BA>ij<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD>