初始化仓库

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/*********************************************************************************************************************
* TC264 Opensourec Library <20><><EFBFBD><EFBFBD>TC264 <20><>Դ<EFBFBD><EFBFBD><E2A3A9>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD>ڹٷ<DAB9> SDK <20>ӿڵĵ<DAB5><C4B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>
* Copyright (c) 2022 SEEKFREE <20><><EFBFBD>ɿƼ<C9BF>
*
* <20><><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD> TC264 <20><>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD>
*
* TC264 <20><>Դ<EFBFBD><D4B4> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <20><><EFBFBD><EFBFBD><EFBFBD>Ը<EFBFBD><D4B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><E1B7A2><EFBFBD><EFBFBD> GPL<50><4C>GNU General Public License<73><65><EFBFBD><EFBFBD> GNUͨ<55>ù<EFBFBD><C3B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>֤<EFBFBD><D6A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <20><> GPL <20>ĵ<EFBFBD>3<EFBFBD><EFBFBD><E6A3A8> GPL3.0<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѡ<EFBFBD><EFBFBD><EFBFBD>ģ<EFBFBD><EFBFBD>κκ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>İ汾<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>·<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>/<2F><><EFBFBD>޸<EFBFBD><DEB8><EFBFBD>
*
* <20><><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>ķ<EFBFBD><C4B7><EFBFBD><EFBFBD><EFBFBD>ϣ<EFBFBD><CFA3><EFBFBD><EFBFBD><EFBFBD>ܷ<EFBFBD><DCB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ã<EFBFBD><C3A3><EFBFBD><EFBFBD><EFBFBD>δ<EFBFBD><CEB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>κεı<CEB5>֤
* <20><><EFBFBD><EFBFBD>û<EFBFBD><C3BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ի<EFBFBD><D4BB>ʺ<EFBFBD><CABA>ض<EFBFBD><D8B6><EFBFBD>;<EFBFBD>ı<EFBFBD>֤
* <20><><EFBFBD><EFBFBD>ϸ<EFBFBD><CFB8><EFBFBD><EFBFBD><EFBFBD>μ<EFBFBD> GPL
*
* <20><>Ӧ<EFBFBD><D3A6><EFBFBD><EFBFBD><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>ͬʱ<CDAC>յ<EFBFBD>һ<EFBFBD><D2BB> GPL <20>ĸ<EFBFBD><C4B8><EFBFBD>
* <20><><EFBFBD><EFBFBD>û<EFBFBD>У<EFBFBD><D0A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><https://www.gnu.org/licenses/>
*
* <20><><EFBFBD><EFBFBD>ע<EFBFBD><D7A2><EFBFBD><EFBFBD>
* <20><><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ʹ<EFBFBD><CAB9> GPL3.0 <20><>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD>֤Э<D6A4><D0AD> <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD>İ汾
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ӣ<EFBFBD>İ<EFBFBD><C4B0><EFBFBD> libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>µ<EFBFBD> GPL3_permission_statement.txt <20>ļ<EFBFBD><C4BC><EFBFBD>
* <20><><EFBFBD><EFBFBD>֤<EFBFBD><D6A4><EFBFBD><EFBFBD><EFBFBD><EFBFBD> libraries <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD><EFBFBD>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD>µ<EFBFBD> LICENSE <20>ļ<EFBFBD>
* <20><>ӭ<EFBFBD><D3AD>λʹ<CEBB>ò<EFBFBD><C3B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> <20><><EFBFBD>޸<EFBFBD><DEB8><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EBB1A3><EFBFBD><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC>İ<EFBFBD>Ȩ<EFBFBD><C8A8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
*
* <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> zf_driver_dma
* <20><>˾<EFBFBD><CBBE><EFBFBD><EFBFBD> <20>ɶ<EFBFBD><C9B6><EFBFBD><EFBFBD>ɿƼ<C9BF><C6BC><EFBFBD><EFBFBD>޹<EFBFBD>˾
* <20><EFBFBD><E6B1BE>Ϣ <20>鿴 libraries/doc <20>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD> version <20>ļ<EFBFBD> <20>汾˵<E6B1BE><CBB5>
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> ADS v1.10.2
* <20><><EFBFBD><EFBFBD>ƽ̨ TC264D
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> https://seekfree.taobao.com/
*
* <20>޸ļ<DEB8>¼
* <20><><EFBFBD><EFBFBD> <20><><EFBFBD><EFBFBD> <20><>ע
* 2022-09-15 pudding first version
********************************************************************************************************************/
#include "IfxDma_Dma.h"
#include "IfxScuEru.h"
#include "isr_config.h"
#include "zf_common_debug.h"
#include "zf_driver_dma.h"
typedef struct
{
Ifx_DMA_CH linked_list[10]; // DMA<4D><41><EFBFBD><EFBFBD>
IfxDma_Dma_Channel channel; // DMAͨ<41><CDA8><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
}DMA_LINK;
#if(0 == DMA_INT_SERVICE)
#pragma section all "cpu0_dsram"
IFX_ALIGN(256) DMA_LINK dma_link_list;
#elif(1 == DMA_INT_SERVICE)
#pragma section all "cpu1_dsram"
IFX_ALIGN(256) DMA_LINK dma_link_list;
#endif
#pragma section all restore
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> dma<6D><61>ʼ<EFBFBD><CABC>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> dma_ch ѡ<><D1A1>DMAͨ<41><CDA8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> source_addr <20><><EFBFBD><EFBFBD>Դ<EFBFBD><D4B4>ַ
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> destination_addr <20><><EFBFBD><EFBFBD>Ŀ<EFBFBD>ĵ<EFBFBD>ַ
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> exti_pin <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD><EFBFBD><EFBFBD>eruͨ<75><CDA8>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> trigger <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD><EFBFBD><EFBFBD>ʽ
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> dma_count <20><><EFBFBD><EFBFBD>dma<6D><61><EFBFBD>ƴ<EFBFBD><C6B4><EFBFBD>
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> uint8
// ʹ<><CAB9>ʾ<EFBFBD><CABE> dma_init(MT9V03X_DMA_CH, MT9V03X_DATA_ADD, mt9v03x_image[0], MT9V03X_PCLK_PIN, EXTI_TRIGGER_RISING, MT9V03X_IMAGE_SIZE);
// <20><>ע<EFBFBD><D7A2>Ϣ
//-------------------------------------------------------------------------------------------------------------------
uint8 dma_init (IfxDma_ChannelId dma_ch, uint8 *source_addr, uint8 *destination_addr, exti_pin_enum exti_pin, exti_trigger_enum trigger, uint32 dma_count)
{
IfxDma_Dma_Channel dmaChn;
exti_init(exti_pin, trigger); // eru<72><75><EFBFBD><EFBFBD>DMAͨ<41><CDA8><EFBFBD><EFBFBD> <20><>eru<72>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>eru<72><75><EFBFBD><EFBFBD><EFBFBD>ȼ<EFBFBD><C8BC><EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><CEAA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ͨ<EFBFBD><CDA8>
IfxDma_Dma_Config dmaConfig;
IfxDma_Dma_initModuleConfig(&dmaConfig, &MODULE_DMA);
IfxDma_Dma dma;
IfxDma_Dma_initModule(&dma, &dmaConfig);
IfxDma_Dma_ChannelConfig cfg;
IfxDma_Dma_initChannelConfig(&cfg, &dma);
uint8 list_num, i;
uint32 single_channel_dma_count;
zf_assert(!(dma_count % 8)); // <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ϊ8<CEAA>ı<EFBFBD><C4B1><EFBFBD>
list_num = 1;
single_channel_dma_count = dma_count / list_num;
if(16384 < single_channel_dma_count)
{
while(TRUE)
{
single_channel_dma_count = dma_count / list_num;
if((single_channel_dma_count <= 16384) && !(dma_count % list_num))
{
break;
}
list_num++;
if(list_num > 10)
{
zf_assert(FALSE);
}
}
}
if(1 == list_num)
{
cfg.shadowControl = IfxDma_ChannelShadow_none;
cfg.operationMode = IfxDma_ChannelOperationMode_single;
cfg.shadowAddress = 0;
}
else
{
cfg.shadowControl = IfxDma_ChannelShadow_linkedList;
cfg.operationMode = IfxDma_ChannelOperationMode_continuous;
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (unsigned)&dma_link_list.linked_list[1]);
}
cfg.requestMode = IfxDma_ChannelRequestMode_oneTransferPerRequest;
cfg.moveSize = IfxDma_ChannelMoveSize_8bit;
cfg.busPriority = IfxDma_ChannelBusPriority_high;
cfg.sourceAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), source_addr);
cfg.sourceAddressCircularRange = IfxDma_ChannelIncrementCircular_none;
cfg.sourceCircularBufferEnabled = TRUE;
cfg.destinationAddressIncrementStep = IfxDma_ChannelIncrementStep_1;
cfg.channelId = (IfxDma_ChannelId)dma_ch;
cfg.hardwareRequestEnabled = FALSE;
cfg.channelInterruptEnabled = TRUE;
cfg.channelInterruptPriority = DMA_INT_PRIO;
cfg.channelInterruptTypeOfService = DMA_INT_SERVICE;
cfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr);
cfg.transferCount = (uint16)single_channel_dma_count;
IfxDma_Dma_initChannel(&dmaChn, &cfg);
if(1 < list_num)
{
i = 0;
while(i < list_num)
{
cfg.destinationAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), destination_addr + single_channel_dma_count * i);
if(i == (list_num - 1))
{
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&dma_link_list.linked_list[0]);
}
else
{
cfg.shadowAddress = IFXCPU_GLB_ADDR_DSPR(IfxCpu_getCoreId(), (uint32)&dma_link_list.linked_list[i+1]);
}
cfg.transferCount = (uint16)single_channel_dma_count;
IfxDma_Dma_initLinkedListEntry((void *)&dma_link_list.linked_list[i], &cfg);
i++;
}
}
IfxDma_Dma_getSrcPointer(&dma_link_list.channel)->B.CLRR = 1;
return list_num;
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> dma <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֹ
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch ѡ<><D1A1> dma ͨ<><CDA8> (<28><><EFBFBD><EFBFBD> zf_driver_dma.h <20><>ö<EFBFBD><C3B6> dma_channel_enum <20><><EFBFBD><EFBFBD>)
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> dma_disable(MT9V03X_DMA_CH);
// <20><>ע<EFBFBD><D7A2>Ϣ
//-------------------------------------------------------------------------------------------------------------------
void dma_disable (IfxDma_ChannelId dma_ch)
{
IfxDma_disableChannelTransaction(&MODULE_DMA, dma_ch);
}
//-------------------------------------------------------------------------------------------------------------------
// <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> dma <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
// <20><><EFBFBD><EFBFBD>˵<EFBFBD><CBB5> ch ѡ<><D1A1> dma ͨ<><CDA8> (<28><><EFBFBD><EFBFBD> zf_driver_dma.h <20><>ö<EFBFBD><C3B6> dma_channel_enum <20><><EFBFBD><EFBFBD>)
// <20><><EFBFBD>ز<EFBFBD><D8B2><EFBFBD> void
// ʹ<><CAB9>ʾ<EFBFBD><CABE> dma_enable(MT9V03X_DMA_CH);
// <20><>ע<EFBFBD><D7A2>Ϣ
//-------------------------------------------------------------------------------------------------------------------
void dma_enable (IfxDma_ChannelId dma_ch)
{
IfxDma_enableChannelTransaction(&MODULE_DMA, dma_ch);
}